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Diffstat (limited to 'modules/CIAO/tests/IDL_Test/IDL3_Plus/KitchenSink.idl')
-rw-r--r-- | modules/CIAO/tests/IDL_Test/IDL3_Plus/KitchenSink.idl | 118 |
1 files changed, 118 insertions, 0 deletions
diff --git a/modules/CIAO/tests/IDL_Test/IDL3_Plus/KitchenSink.idl b/modules/CIAO/tests/IDL_Test/IDL3_Plus/KitchenSink.idl new file mode 100644 index 00000000000..3b0b7b4cda0 --- /dev/null +++ b/modules/CIAO/tests/IDL_Test/IDL3_Plus/KitchenSink.idl @@ -0,0 +1,118 @@ +// $Id$ +/** + * @file KitchenSink.idl + * @author Jeff Parsons <j.parsons@vanderbilt.edu> + * + * Tests TAO_IDL generation of CIAO servant, executor IDL + * and executor implementation stencil for a variety of + * IDL3+ constructs. + */ + +#include <Components.idl> + +module mod +{ + valuetype future_key : Components::PrimaryKeyBase + { + public string info; + }; +}; + +interface iface +{ + exception iface_excep {}; +}; + +eventtype ev +{ +}; + +typedef sequence<iface> ifaceSeq; + +module second<exception X, typename W> +{ + typedef short sho; + + valuetype pkey : Components::PrimaryKeyBase + { + public long id_key; + }; +}; + +module Ast<typename T, + eventtype E, + exception S, + valuetype V, + sequence<T> TSeq, + const unsigned long M> +{ + interface Foo : T + { + attribute T Foo_Attr; + + void Foo_Op (in TSeq inarg) raises (S); + }; + + alias second<T, S> second_ref; + + valuetype VT_T : V supports T + { + }; + + porttype PT_T + { + provides iface iface_facet; + uses multiple T T_Recep; + }; + + component Comp_T + { + uses multiple T Comp_T_Recep; + mirrorport PT_T Comp_T_Mirror_Port; + provides T Comp_T_Facet; + emits E Comp_T_Emit; + + // Tests unique lookup mechanism for types referenced + // from an aliased template module. + attribute second_ref::sho sho_attr; + }; + + home Comp_T_Home manages Comp_T primarykey second_ref::pkey + { + factory create_Comp_T (in TSeq inarg); + finder find_Comp_T (in T inarg); + }; + + // TAO IDL compiler uses the same code for both component + // and home 'supports' constructs, so we test it here + // where there is no conflict with the port interfaces. + home Comp_T_Home_2 supports T manages Comp_T primarykey V + { + }; + + connector Conn_T + { + port PT_T Conn_T_Port; + provides T Conn_T_Facet; + }; + + const unsigned long Ast_Const = M; + const unsigned long LC = 7; + typedef sequence<T, M> AnotherTSeq; + + struct boo + { + T T_field; + }; + + typedef T T_array[M][Ast_Const][LC]; +}; + +module Ast<iface, + ev, + iface::iface_excep, + mod::future_key, + ifaceSeq, + 101> + Ast_Inst; + |