diff options
| author | Alison Schofield <alison.schofield@intel.com> | 2022-07-12 20:39:31 -0700 |
|---|---|---|
| committer | Alison Schofield <alison.schofield@intel.com> | 2022-09-16 15:56:42 -0700 |
| commit | 2d8dc0383d3c908389053afbdc329bbd52f009ce (patch) | |
| tree | 0baef9b867782b902d09238b6fc34c62cf29c3ce | |
| parent | 7021087eedb0d7156286e9e4f255e93c07816921 (diff) | |
| download | acpica-2d8dc0383d3c908389053afbdc329bbd52f009ce.tar.gz | |
Add CXL 3.0 structures (CXIMS & RDPAS) to the CEDT table
The CXL 3.0 Specification[1] adds two new structures to
the CXL Early Discovery Table (CEDT). The CEDT may include
zero or more entries of these types:
CXIMS: CXL XOR Interleave Math Structure
Enables the host to find a targets position in an
Interleave Target List when XOR Math is used.
RDPAS: RCEC Downstream Post Association Structure
Enables the host to locate the Downstream Port(s)
that report errors to a given Root Complex Event
Collector (RCEC).
[1]https://www.computeexpresslink.org/spec-landing
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
| -rw-r--r-- | source/include/actbl1.h | 34 |
1 files changed, 33 insertions, 1 deletions
diff --git a/source/include/actbl1.h b/source/include/actbl1.h index 3de78b0d8..6041e8f4c 100644 --- a/source/include/actbl1.h +++ b/source/include/actbl1.h @@ -525,7 +525,9 @@ enum AcpiCedtType { ACPI_CEDT_TYPE_CHBS = 0, ACPI_CEDT_TYPE_CFMWS = 1, - ACPI_CEDT_TYPE_RESERVED = 2, + ACPI_CEDT_TYPE_CXIMS = 2, + ACPI_CEDT_TYPE_RDPAS = 3, + ACPI_CEDT_TYPE_RESERVED = 4, }; /* Values for version field above */ @@ -583,6 +585,7 @@ typedef struct acpi_cedt_cfmws_target_element /* Values for Interleave Arithmetic field above */ #define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0) +#define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1) /* Values for Restrictions field above */ @@ -592,6 +595,35 @@ typedef struct acpi_cedt_cfmws_target_element #define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3) #define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4) +/* 2: CXL XOR Interleave Math Structure */ + +struct acpi_cedt_cxims { + ACPI_CEDT_HEADER Header; + UINT16 Reserved1; + UINT8 Hbig; + UINT8 NrXormaps; + UINT64 XormapList[]; +}; + +/* 3: CXL RCEC Downstream Port Association Structure */ + +struct acpi_cedt_rdpas { + ACPI_CEDT_HEADER Header; + UINT8 Reserved1; + UINT16 Length; + UINT16 Segment; + UINT16 Bdf; + UINT8 Protocol; + UINT64 Address; +}; + +/* Masks for bdf field above */ +#define ACPI_CEDT_RDPAS_BUS_MASK 0xff00 +#define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8 +#define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007 + +#define ACPI_CEDT_RDPAS_PROTOCOL_IO (0) +#define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1) /******************************************************************************* * |