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| author | Robert Moore <Robert.Moore@intel.com> | 2022-08-17 10:33:44 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-08-17 10:33:44 -0700 |
| commit | 3103c689316a41e3b16d40cc8bcbbb804b8d961a (patch) | |
| tree | e84f4b625161c2d343821ab202f23b5d2761ef8f | |
| parent | 99acb896fbea14d5e5b10bd73ccd559363a719f7 (diff) | |
| parent | c717cfd3b368f5068c228a0389df5ec822586fff (diff) | |
| download | acpica-3103c689316a41e3b16d40cc8bcbbb804b8d961a.tar.gz | |
Merge pull request #789 from sathyaintel/ccel-v1
iASL: Add CCEL table to both compiler/disassembler
| -rw-r--r-- | source/common/dmtbinfo3.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/source/common/dmtbinfo3.c b/source/common/dmtbinfo3.c index a944ce331..b8ddb7aad 100644 --- a/source/common/dmtbinfo3.c +++ b/source/common/dmtbinfo3.c @@ -198,11 +198,11 @@ ACPI_DMTABLE_INFO AcpiDmTableInfoCcel[] = { - {ACPI_DMT_UINT8, ACPI_TDEL_OFFSET (CCType), "CC Type", 0}, - {ACPI_DMT_UINT8, ACPI_TDEL_OFFSET (CCSubType), "CC Sub Type", 0}, - {ACPI_DMT_UINT32, ACPI_TDEL_OFFSET (Reserved), "Reserved", 0}, - {ACPI_DMT_UINT64, ACPI_TDEL_OFFSET (LogAreaMinimumLength), "Log Area Minimum Length", 0}, - {ACPI_DMT_UINT64, ACPI_TDEL_OFFSET (LogAreaStartAddress), "Log Area Start Address", 0}, + {ACPI_DMT_UINT8, ACPI_CCEL_OFFSET (CCType), "CC Type", 0}, + {ACPI_DMT_UINT8, ACPI_CCEL_OFFSET (CCSubType), "CC Sub Type", 0}, + {ACPI_DMT_UINT32, ACPI_CCEL_OFFSET (Reserved), "Reserved", 0}, + {ACPI_DMT_UINT64, ACPI_CCEL_OFFSET (LogAreaMinimumLength), "Log Area Minimum Length", 0}, + {ACPI_DMT_UINT64, ACPI_CCEL_OFFSET (LogAreaStartAddress), "Log Area Start Address", 0}, ACPI_DMT_TERMINATOR }; |