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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-07-17 16:16:53 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-07-18 14:12:03 +0200 |
| commit | d9cebd6dee36abcc5fa8f1b7a5e25f0ef88f8fa4 (patch) | |
| tree | dcc05bec8a4c19f9d5e0da87e57fb54c2d1da9ac | |
| parent | 1507b614f69ceda9b1a2c68314628b3f385147f6 (diff) | |
| download | barebox-d9cebd6dee36abcc5fa8f1b7a5e25f0ef88f8fa4.tar.gz | |
ARM: i.MX: esdctl: i.MX53 has esdctl v4, not v3
On the i.MX53 this has the effect that in early init only
half of the memory bank is detected and the barebox image
is place in the middle of SDRAM.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | arch/arm/mach-imx/esdctl.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c index bb8fec2d45..811592f7da 100644 --- a/arch/arm/mach-imx/esdctl.c +++ b/arch/arm/mach-imx/esdctl.c @@ -549,9 +549,9 @@ void __naked __noreturn imx53_barebox_entry(void *boarddata) unsigned long base, size; upper_or_coalesced_range(MX53_CSD0_BASE_ADDR, - imx_v3_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 0), + imx_v4_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 0), MX53_CSD1_BASE_ADDR, - imx_v3_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 1), + imx_v4_sdram_size((void *)MX53_ESDCTL_BASE_ADDR, 1), &base, &size); barebox_arm_entry(base, size, boarddata); |