diff options
30 files changed, 572 insertions, 231 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 372257413d..dfb18777b2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -253,6 +253,7 @@ config ARCH_UEMD config ARCH_ZYNQ bool "Xilinx Zynq-based boards" select HAS_DEBUG_LL + select PBL_IMAGE config ARCH_ZYNQMP bool "Xilinx ZynqMP-based boards" diff --git a/arch/arm/boards/avnet-zedboard/Makefile b/arch/arm/boards/avnet-zedboard/Makefile index a2c3104e6c..01c7a259e9 100644 --- a/arch/arm/boards/avnet-zedboard/Makefile +++ b/arch/arm/boards/avnet-zedboard/Makefile @@ -1,3 +1,2 @@ obj-y += board.o lwl-y += lowlevel.o -lwl-y += flash_header.o diff --git a/arch/arm/boards/avnet-zedboard/board.c b/arch/arm/boards/avnet-zedboard/board.c index 722bda302e..f53dde47c2 100644 --- a/arch/arm/boards/avnet-zedboard/board.c +++ b/arch/arm/boards/avnet-zedboard/board.c @@ -17,38 +17,14 @@ #include <environment.h> #include <generated/mach-types.h> #include <init.h> -#include <mach/devices.h> #include <mach/zynq7000-regs.h> #include <linux/sizes.h> -static int zedboard_mem_init(void) -{ - arm_add_mem_device("ram0", 0, SZ_512M); - - return 0; -} -mem_initcall(zedboard_mem_init); - -static struct macb_platform_data macb_pdata = { - .phy_interface = PHY_INTERFACE_MODE_RGMII, - .phy_addr = 0x0, -}; - -static int zedboard_device_init(void) -{ - zynq_add_eth0(&macb_pdata); - - return 0; -} -device_initcall(zedboard_device_init); static int zedboard_console_init(void) { - barebox_set_model("Avnet ZedBoard"); barebox_set_hostname("zedboard"); - zynq_add_uart1(); - return 0; } console_initcall(zedboard_console_init); diff --git a/arch/arm/boards/avnet-zedboard/flash_header.c b/arch/arm/boards/avnet-zedboard/flash_header.c deleted file mode 100644 index d9eb35b0d5..0000000000 --- a/arch/arm/boards/avnet-zedboard/flash_header.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * Copyright (C) 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include <common.h> -#include <asm/byteorder.h> -#include <mach/zynq-flash-header.h> -#include <mach/zynq7000-regs.h> -#include <asm/barebox-arm-head.h> - -#define REG(a, v) { .addr = cpu_to_le32(a), .val = cpu_to_le32(v), } - -struct zynq_reg_entry __ps7reg_entry_section reg_entry[] = { - REG(ZYNQ_SLCR_UNLOCK, 0x0000DF0D), - REG(ZYNQ_CLOCK_CTRL_BASE + ZYNQ_CLK_621_TRUE, 0x00000001), - REG(ZYNQ_CLOCK_CTRL_BASE + ZYNQ_APER_CLK_CTRL, 0x01FC044D), - - REG(ZYNQ_CLOCK_CTRL_BASE + ZYNQ_ARM_PLL_CTRL, 0x00028008), - REG(ZYNQ_CLOCK_CTRL_BASE + ZYNQ_ARM_PLL_CFG, 0x000FA220), - REG(ZYNQ_CLOCK_CTRL_BASE + ZYNQ_ARM_PLL_CTRL, 0x00028010), - REG(ZYNQ_CLOCK_CTRL_BASE + ZYNQ_ARM_PLL_CTRL, 0x00028011), - REG(ZYNQ_CLOCK_CTRL_BASE + ZYNQ_ARM_PLL_CTRL, 0x00028010), - REG(ZYNQ_CLOCK_CTRL_BASE + ZYNQ_ARM_PLL_CTRL, 0x00028000), - - REG(ZYNQ_CLOCK_CTRL_BASE + ZYNQ_IO_PLL_CTRL, 0x0001E008), - REG(ZYNQ_CLOCK_CTRL_BASE + ZYNQ_IO_PLL_CFG, 0x001452C0), - REG(ZYNQ_CLOCK_CTRL_BASE + ZYNQ_IO_PLL_CTRL, 0x0001E010), - REG(ZYNQ_CLOCK_CTRL_BASE + ZYNQ_IO_PLL_CTRL, 0x0001E011), - REG(ZYNQ_CLOCK_CTRL_BASE + ZYNQ_IO_PLL_CTRL, 0x0001E010), - REG(ZYNQ_CLOCK_CTRL_BASE + ZYNQ_IO_PLL_CTRL, 0x0001E000), - - REG(0xf8000150, 0x00000a03), - - /* stop */ - REG(0xFFFFFFFF, 0x00000000), -}; - -struct zynq_flash_header __flash_header_section flash_header = { - .width_det = WIDTH_DETECTION_MAGIC, - .image_id = IMAGE_IDENTIFICATION, - .enc_stat = 0x0, - .user = 0x0, - .flash_offset = 0x8c0, - .length = (unsigned int)&_barebox_image_size, - .res0 = 0x0, - .start_of_exec = 0x0, - .total_len = (unsigned int)&_barebox_image_size, - .res1 = 0x1, - .checksum = 0x0, - .res2 = 0x0, -}; diff --git a/arch/arm/boards/avnet-zedboard/lowlevel.c b/arch/arm/boards/avnet-zedboard/lowlevel.c index cf3c4ebd0c..93e4da96ec 100644 --- a/arch/arm/boards/avnet-zedboard/lowlevel.c +++ b/arch/arm/boards/avnet-zedboard/lowlevel.c @@ -27,8 +27,13 @@ #define PLL_DDR_LOCK (1 << 1) #define PLL_IO_LOCK (1 << 2) -void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) +extern char __dtb_zynq_zed_start[]; + +ENTRY_FUNCTION(start_avnet_zedboard, r0, r1, r2) { + + void *fdt = __dtb_zynq_zed_start + get_runtime_offset(); + /* open sesame */ writel(0x0000DF0D, ZYNQ_SLCR_UNLOCK); @@ -257,5 +262,6 @@ void __naked barebox_arm_reset_vector(uint32_t r0, uint32_t r1, uint32_t r2) writel(0x0000767B, ZYNQ_SLCR_LOCK); arm_cpu_lowlevel_init(); - barebox_arm_entry(0, SZ_512M, NULL); + + barebox_arm_entry(0, SZ_512M, fdt); } diff --git a/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg b/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg new file mode 100644 index 0000000000..3f8808d3d7 --- /dev/null +++ b/arch/arm/boards/avnet-zedboard/zedboard.zynqcfg @@ -0,0 +1,24 @@ +#include <mach/zynq7000-header-regs.h> + +wm 32 ZYNQ_SLCR_UNLOCK 0x0000DF0D +wm 32 ZYNQ_CLK_621_TRUE 0x00000001 +wm 32 ZYNQ_APER_CLK_CTRL 0x01FC044D + +wm 32 ZYNQ_ARM_PLL_CTRL 0x00028008 +wm 32 ZYNQ_ARM_PLL_CFG 0x000FA220 +wm 32 ZYNQ_ARM_PLL_CTRL 0x00028010 +wm 32 ZYNQ_ARM_PLL_CTRL 0x00028011 +wm 32 ZYNQ_ARM_PLL_CTRL 0x00028010 +wm 32 ZYNQ_ARM_PLL_CTRL 0x00028000 + +wm 32 ZYNQ_IO_PLL_CTRL 0x0001E008 +wm 32 ZYNQ_IO_PLL_CFG 0x001452C0 +wm 32 ZYNQ_IO_PLL_CTRL 0x0001E010 +wm 32 ZYNQ_IO_PLL_CTRL 0x0001E011 +wm 32 ZYNQ_IO_PLL_CTRL 0x0001E010 +wm 32 ZYNQ_IO_PLL_CTRL 0x0001E000 + +wm 32 ZYNQ_SDIO_CLK_CTRL 0x00000a03 + +/* stop */ +wm 32 0xFFFFFFFF 0x00000000
\ No newline at end of file diff --git a/arch/arm/configs/zedboard_defconfig b/arch/arm/configs/zynq_defconfig index cc03368751..a16c57d5ce 100644 --- a/arch/arm/configs/zedboard_defconfig +++ b/arch/arm/configs/zynq_defconfig @@ -1,7 +1,7 @@ CONFIG_ARCH_ZYNQ=y +CONFIG_MACH_ZEDBOARD=y CONFIG_AEABI=y CONFIG_ARM_UNWIND=y -CONFIG_PBL_IMAGE=y CONFIG_MMU=y CONFIG_STACK_SIZE=0xf000 CONFIG_MALLOC_SIZE=0x8000000 @@ -40,6 +40,8 @@ CONFIG_CMD_OFTREE=y CONFIG_CMD_TIME=y CONFIG_NET=y CONFIG_DRIVER_SERIAL_CADENCE=y +CONFIG_DRIVER_NET_MACB=y # CONFIG_SPI is not set +# CONFIG_PINCTRL is not set CONFIG_FS_TFTP=y CONFIG_DIGEST=y diff --git a/arch/arm/configs/zynqmp_defconfig b/arch/arm/configs/zynqmp_defconfig index 834212e30f..762103c541 100644 --- a/arch/arm/configs/zynqmp_defconfig +++ b/arch/arm/configs/zynqmp_defconfig @@ -33,7 +33,9 @@ CONFIG_CMD_TIMEOUT=y CONFIG_CMD_CLK=y CONFIG_CMD_OFTREE=y CONFIG_CMD_TIME=y +CONFIG_NET=y CONFIG_DRIVER_SERIAL_CADENCE=y +CONFIG_DRIVER_NET_MACB=y # CONFIG_SPI is not set -CONFIG_FIRMWARE_ZYNQMP_PL=y +CONFIG_FIRMWARE_ZYNQMP_FPGA=y CONFIG_DIGEST=y diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9566e97555..5c9a311c5f 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -144,5 +144,6 @@ lwl-dtb-$(CONFIG_MACH_ZII_IMX7D_DEV) += imx7d-zii-rpu2.dtb.o imx7d-zii-rmu2.dtb. lwl-dtb-$(CONFIG_MACH_WAGO_PFC_AM35XX) += am35xx-pfc-750_820x.dtb.o lwl-dtb-$(CONFIG_MACH_LS1046ARDB) += fsl-ls1046a-rdb.dtb.o lwl-dtb-$(CONFIG_MACH_TQMLS1046A) += fsl-tqmls1046a-mbls10xxa.dtb.o +lwl-dtb-$(CONFIG_MACH_ZEDBOARD) += zynq-zed.dtb.o clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.lzo diff --git a/arch/arm/dts/zynq-zed.dts b/arch/arm/dts/zynq-zed.dts new file mode 100644 index 0000000000..52d6833249 --- /dev/null +++ b/arch/arm/dts/zynq-zed.dts @@ -0,0 +1,7 @@ +#include <arm/zynq-zed.dts> + +/ { + chosen { + stdout-path = &uart1; + }; +}; diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig index d35bd41232..3e07633e5f 100644 --- a/arch/arm/mach-zynq/Kconfig +++ b/arch/arm/mach-zynq/Kconfig @@ -2,34 +2,33 @@ if ARCH_ZYNQ config ARCH_TEXT_BASE hex - default 0x1ff00000 if MACH_ZEDBOARD + default 0x0 config ZYNQ_DEBUG_LL_UART_BASE hex default 0xe0001000 if MACH_ZEDBOARD -choice - prompt "Xilinx Zynq type board" - config ARCH_ZYNQ7000 - bool "Zynq-7000" + bool select CPU_V7 select CLKDEV_LOOKUP select COMMON_CLK + select COMMON_CLK_OF_PROVIDER select ARM_SMP_TWD select HAS_MACB + select HAVE_PBL_MULTI_IMAGES + select OFTREE + select OFDEVICE + select RELOCATABLE -endchoice -if ARCH_ZYNQ7000 -choice - prompt "Zynq-7000 Board Type" +menu "select Zynq boards to be built" config MACH_ZEDBOARD bool "Avnet Zynq-7000 ZedBoard" + select ARCH_ZYNQ7000 -endchoice -endif +endmenu endif diff --git a/arch/arm/mach-zynq/Makefile b/arch/arm/mach-zynq/Makefile index 459c957622..3252247d17 100644 --- a/arch/arm/mach-zynq/Makefile +++ b/arch/arm/mach-zynq/Makefile @@ -1 +1 @@ -obj-y += zynq.o devices.o clk-zynq7000.o +obj-y += zynq.o diff --git a/arch/arm/mach-zynq/devices.c b/arch/arm/mach-zynq/devices.c deleted file mode 100644 index 55e9433c51..0000000000 --- a/arch/arm/mach-zynq/devices.c +++ /dev/null @@ -1,13 +0,0 @@ -#include <common.h> -#include <driver.h> -#include <mach/devices.h> - -struct device_d *zynq_add_uart(resource_size_t base, int id) -{ - return add_generic_device("cadence-uart", id, NULL, base, 0x1000, IORESOURCE_MEM, NULL); -} - -struct device_d *zynq_add_eth(resource_size_t base, int id, struct macb_platform_data *pdata) -{ - return add_generic_device("macb", id, NULL, base, 0x1000, IORESOURCE_MEM, pdata); -} diff --git a/arch/arm/mach-zynq/include/mach/barebox.lds.h b/arch/arm/mach-zynq/include/mach/barebox.lds.h deleted file mode 100644 index 3d35fe9880..0000000000 --- a/arch/arm/mach-zynq/include/mach/barebox.lds.h +++ /dev/null @@ -1,8 +0,0 @@ -#define PRE_IMAGE \ - .pre_image : { \ - . = 0x20; \ - KEEP(*(.flash_header_0x0*)) \ - . = 0xa0; \ - KEEP(*(.ps7reg_entry_0x0A0)) \ - . = 0x8c0; \ - } diff --git a/arch/arm/mach-zynq/include/mach/devices.h b/arch/arm/mach-zynq/include/mach/devices.h deleted file mode 100644 index c9670b02f3..0000000000 --- a/arch/arm/mach-zynq/include/mach/devices.h +++ /dev/null @@ -1,20 +0,0 @@ -#include <mach/zynq7000-regs.h> -#include <platform_data/macb.h> - -struct device_d *zynq_add_uart(resource_size_t base, int id); -struct device_d *zynq_add_eth(resource_size_t base, int id, struct macb_platform_data *pdata); - -static inline struct device_d *zynq_add_uart0(void) -{ - return zynq_add_uart((resource_size_t)ZYNQ_UART0_BASE_ADDR, 0); -} - -static inline struct device_d *zynq_add_uart1(void) -{ - return zynq_add_uart((resource_size_t)ZYNQ_UART1_BASE_ADDR, 1); -} - -static inline struct device_d *zynq_add_eth0(struct macb_platform_data *pdata) -{ - return zynq_add_eth((resource_size_t)ZYNQ_GEM0_BASE_ADDR, 0, pdata); -} diff --git a/arch/arm/mach-zynq/include/mach/zynq-flash-header.h b/arch/arm/mach-zynq/include/mach/zynq-flash-header.h index 3b67e55a71..ba4b67f479 100644 --- a/arch/arm/mach-zynq/include/mach/zynq-flash-header.h +++ b/arch/arm/mach-zynq/include/mach/zynq-flash-header.h @@ -1,38 +1,27 @@ #ifndef __MACH_FLASH_HEADER_H #define __MACH_FLASH_HEADER_H -#include <asm-generic/sections.h> +#include <stdint.h> -#define __flash_header_section __section(.flash_header_0x0) -#define __ps7reg_entry_section __section(.ps7reg_entry_0x0A0) -#define __image_len_section __section(.image_len_0x08c0) -#define FLASH_HEADER_OFFSET 0x0 +#define REGINIT_OFFSET 0x0a0 #define IMAGE_OFFSET 0x8c0 -#define DEST_BASE 0x8c0 -#define FLASH_HEADER_BASE (DEST_BASE + FLASH_HEADER_OFFSET) - -struct zynq_reg_entry { - __le32 addr; - __le32 val; -}; - #define WIDTH_DETECTION_MAGIC 0xAA995566 #define IMAGE_IDENTIFICATION 0x584C4E58 /* "XLNX" */ struct zynq_flash_header { - __le32 width_det; - __le32 image_id; - __le32 enc_stat; - __le32 user; - __le32 flash_offset; - __le32 length; - __le32 res0; - __le32 start_of_exec; - __le32 total_len; - __le32 res1; - __le32 checksum; - __le32 res2; + uint32_t width_det; + uint32_t image_id; + uint32_t enc_stat; + uint32_t user; + uint32_t flash_offset; + uint32_t length; + uint32_t res0; + uint32_t start_of_exec; + uint32_t total_len; + uint32_t res1; + uint32_t checksum; + uint32_t res2; }; #endif /* __MACH_FLASH_HEADER_H */ diff --git a/arch/arm/mach-zynq/include/mach/zynq7000-header-regs.h b/arch/arm/mach-zynq/include/mach/zynq7000-header-regs.h new file mode 100644 index 0000000000..4e24064746 --- /dev/null +++ b/arch/arm/mach-zynq/include/mach/zynq7000-header-regs.h @@ -0,0 +1,49 @@ +/* + * (c) 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#define ZYNQ_SLCR_LOCK 0xF8000004 +#define ZYNQ_SLCR_UNLOCK 0xF8000008 +#define ZYNQ_ARM_PLL_CTRL 0xF8000100 +#define ZYNQ_DDR_PLL_CTRL 0xF8000104 +#define ZYNQ_IO_PLL_CTRL 0xF8000108 +#define ZYNQ_PLL_STATUS 0xF800010C +#define ZYNQ_ARM_PLL_CFG 0xF8000110 +#define ZYNQ_DDR_PLL_CFG 0xF8000114 +#define ZYNQ_IO_PLL_CFG 0xF8000118 +#define ZYNQ_ARM_CLK_CTRL 0xF8000120 +#define ZYNQ_DDR_CLK_CTRL 0xF8000124 +#define ZYNQ_DCI_CLK_CTRL 0xF8000128 +#define ZYNQ_APER_CLK_CTRL 0xF800012C +#define ZYNQ_USB0_CLK_CTRL 0xF8000130 +#define ZYNQ_USB1_CLK_CTRL 0xF8000134 +#define ZYNQ_GEM0_RCLK_CTRL 0xF8000138 +#define ZYNQ_GEM1_RCLK_CTRL 0xF800013C +#define ZYNQ_GEM0_CLK_CTRL 0xF8000140 +#define ZYNQ_GEM1_CLK_CTRL 0xF8000144 +#define ZYNQ_SMC_CLK_CTRL 0xF8000148 +#define ZYNQ_LQSPI_CLK_CTRL 0xF800014C +#define ZYNQ_SDIO_CLK_CTRL 0xF8000150 +#define ZYNQ_UART_CLK_CTRL 0xF8000154 +#define ZYNQ_SPI_CLK_CTRL 0xF8000158 +#define ZYNQ_CAN_CLK_CTRL 0xF800015C +#define ZYNQ_CAN_MIOCLK_CTRL 0xF8000160 +#define ZYNQ_DBG_CLK_CTRL 0xF8000164 +#define ZYNQ_PCAP_CLK_CTRL 0xF8000168 +#define ZYNQ_TOPSW_CLK_CTRL 0xF800016C +#define ZYNQ_FPGA0_CLK_CTRL 0xF8000170 +#define ZYNQ_FPGA1_CLK_CTRL 0xF8000180 +#define ZYNQ_FPGA2_CLK_CTRL 0xF8000190 +#define ZYNQ_FPGA3_CLK_CTRL 0xF80001A0 +#define ZYNQ_CLK_621_TRUE 0xF80001C4 diff --git a/arch/arm/mach-zynq/include/mach/zynq7000-regs.h b/arch/arm/mach-zynq/include/mach/zynq7000-regs.h index dd02f5b407..eeecfe1ded 100644 --- a/arch/arm/mach-zynq/include/mach/zynq7000-regs.h +++ b/arch/arm/mach-zynq/include/mach/zynq7000-regs.h @@ -63,6 +63,7 @@ #define ZYNQ_FPGA3_CLK_CTRL 0x0A0 #define ZYNQ_CLK_621_TRUE 0x0C4 #define ZYNQ_RST_CTRL_BASE (ZYNQ_SLCR_BASE + 0x200) +#define ZYNQ_SLCR_BOOT_MODE (ZYNQ_SLCR_BASE + 0x25C) #define ZYNQ_PSS_RST_CTRL (ZYNQ_RST_CTRL_BASE + 0x000) #define ZYNQ_DDR_RST_CTRL (ZYNQ_RST_CTRL_BASE + 0x004) #define ZYNQ_TOPSW_RST_CTRL (ZYNQ_RST_CTRL_BASE + 0x008) diff --git a/arch/arm/mach-zynq/zynq.c b/arch/arm/mach-zynq/zynq.c index f6112fd249..79a6b908e0 100644 --- a/arch/arm/mach-zynq/zynq.c +++ b/arch/arm/mach-zynq/zynq.c @@ -14,11 +14,12 @@ */ #include <asm/system.h> -#include <io.h> +#include <bootsource.h> #include <common.h> #include <init.h> -#include <restart.h> +#include <io.h> #include <mach/zynq7000-regs.h> +#include <restart.h> static void __noreturn zynq_restart_soc(struct restart_handler *rst) { @@ -30,6 +31,26 @@ static void __noreturn zynq_restart_soc(struct restart_handler *rst) hang(); } +static enum bootsource zynq_bootsource_get(void) +{ + u32 boot_mode = readl(ZYNQ_SLCR_BOOT_MODE); + + switch (boot_mode & 0x7) { + case 0x0: + return BOOTSOURCE_JTAG; + case 0x1: + return BOOTSOURCE_SPI; + case 0x2: + return BOOTSOURCE_NOR; + case 0x4: + return BOOTSOURCE_NAND; + case 0x5: + return BOOTSOURCE_MMC; + default: + return BOOTSOURCE_UNKNOWN; + } +} + static int zynq_init(void) { u32 val; @@ -48,11 +69,10 @@ static int zynq_init(void) writel(val, 0xf8f00000); dmb(); - add_generic_device("zynq-clock", 0, NULL, ZYNQ_SLCR_BASE, 0x4000, IORESOURCE_MEM, NULL); - add_generic_device("smp_twd", 0, NULL, CORTEXA9_SCU_TIMER_BASE_ADDR, - 0x4000, IORESOURCE_MEM, NULL); restart_handler_register_fn(zynq_restart_soc); + bootsource_set(zynq_bootsource_get()); + return 0; } postcore_initcall(zynq_init); diff --git a/common/bootsource.c b/common/bootsource.c index 4ef8d8ad95..1f2bf87e99 100644 --- a/common/bootsource.c +++ b/common/bootsource.c @@ -37,6 +37,7 @@ static const char *bootsource_str[] = { [BOOTSOURCE_USB] = "usb", [BOOTSOURCE_NET] = "net", [BOOTSOURCE_CAN] = "can", + [BOOTSOURCE_JTAG] = "jtag", }; static enum bootsource bootsource = BOOTSOURCE_UNKNOWN; diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 1bd5f90358..8160620dc6 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -9,6 +9,7 @@ obj-$(CONFIG_ARCH_MVEBU) += mvebu/ obj-$(CONFIG_ARCH_MXS) += mxs/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ obj-$(CONFIG_ARCH_TEGRA) += tegra/ +obj-$(CONFIG_ARCH_ZYNQ) += zynq/ obj-$(CONFIG_ARCH_ZYNQMP) += zynqmp/ obj-$(CONFIG_CLK_SOCFPGA) += socfpga/ obj-$(CONFIG_SOC_QCA_AR9331) += clk-ar933x.o diff --git a/drivers/clk/zynq/Makefile b/drivers/clk/zynq/Makefile new file mode 100644 index 0000000000..8fedfc77e4 --- /dev/null +++ b/drivers/clk/zynq/Makefile @@ -0,0 +1 @@ +obj-y += clkc.o diff --git a/arch/arm/mach-zynq/clk-zynq7000.c b/drivers/clk/zynq/clkc.c index cd49d8478f..30ca5a60fa 100644 --- a/arch/arm/mach-zynq/clk-zynq7000.c +++ b/drivers/clk/zynq/clkc.c @@ -29,10 +29,16 @@ #include <mach/zynq7000-regs.h> #include <malloc.h> -enum zynq_clks { - dummy, ps_clk, arm_pll, ddr_pll, io_pll, uart_clk, uart0, uart1, - cpu_clk, cpu_6x4x, cpu_3x2x, cpu_2x, cpu_1x, - gem_clk, gem0, gem1, clks_max +enum zynq_clk { + armpll, ddrpll, iopll, + cpu_6or4x, cpu_3or2x, cpu_2x, cpu_1x, + ddr2x, ddr3x, dci, + lqspi, smc, pcap, gem0, gem1, fclk0, fclk1, fclk2, fclk3, can0, can1, + sdio0, sdio1, uart0, uart1, spi0, spi1, dma, + usb0_aper, usb1_aper, gem0_aper, gem1_aper, + sdio0_aper, sdio1_aper, spi0_aper, spi1_aper, can0_aper, can1_aper, + i2c0_aper, i2c1_aper, uart0_aper, uart1_aper, gpio_aper, lqspi_aper, + smc_aper, swdt, dbg_trc, dbg_apb, clk_max }; enum zynq_pll_type { @@ -48,8 +54,11 @@ enum zynq_pll_type { #define PLL_STATUS_DDR_PLL_STABLE (1 << 1) #define PLL_STATUS_IO_PLL_STABLE (1 << 2) #define PLL_CTRL_BYPASS_FORCE (1 << 4) +#define PLL_CTRL_PWRDOWN (1 << 1) +#define PLL_CTRL_RESET (1 << 0) -static struct clk *clks[clks_max]; +static struct clk *clks[clk_max]; +static struct clk_onecell_data clk_data; struct zynq_pll_clk { struct clk clk; @@ -75,7 +84,7 @@ static int zynq_pll_enable(struct clk *clk) int timeout = 10000; val = readl(pll->pll_ctrl); - val &= ~PLL_CTRL_BYPASS_FORCE; + val &= ~(PLL_CTRL_BYPASS_FORCE | PLL_CTRL_PWRDOWN | PLL_CTRL_RESET); writel(val, pll->pll_ctrl); while (timeout--) { @@ -89,9 +98,18 @@ static int zynq_pll_enable(struct clk *clk) return 0; } +static int zynq_pll_is_enabled(struct clk *clk) +{ + struct zynq_pll_clk *pll = to_zynq_pll_clk(clk); + u32 val = readl(pll->pll_ctrl); + + return !(val & (PLL_CTRL_PWRDOWN | PLL_CTRL_RESET)); +} + static struct clk_ops zynq_pll_clk_ops = { .recalc_rate = zynq_pll_recalc_rate, .enable = zynq_pll_enable, + .is_enabled = zynq_pll_is_enabled, }; static inline struct clk *zynq_pll_clk(enum zynq_pll_type type, @@ -360,54 +378,115 @@ static struct clk *zynq_cpu_subclk(const char *name, static int zynq_clock_probe(struct device_d *dev) { struct resource *iores; - void __iomem *slcr_base; + void __iomem *clk_base; unsigned long ps_clk_rate = 33333330; + resource_size_t slcr_offset = 0; + + iores = dev_get_resource(dev, IORESOURCE_MEM, 0); + if (IS_ERR(iores)) + return PTR_ERR(iores); - iores = dev_request_mem_resource(dev, 0); + /* + * The Zynq 7000 DT describes the SLCR child devices with a reg offset + * in the SCLR region. So we can't directly map the address we get from + * the DT, but need to add the SCLR base offset. + */ + if (dev->device_node) { + struct resource *parent_res; + + parent_res = dev_get_resource(dev->parent, IORESOURCE_MEM, 0); + if (IS_ERR(parent_res)) + return PTR_ERR(parent_res); + + slcr_offset = parent_res->start; + } + + iores = request_iomem_region(dev_name(dev), iores->start + slcr_offset, + iores->end + slcr_offset); if (IS_ERR(iores)) return PTR_ERR(iores); - slcr_base = IOMEM(iores->start); - clks[ps_clk] = clk_fixed("ps_clk", ps_clk_rate); + clk_base = IOMEM(iores->start); - clks[arm_pll] = zynq_pll_clk(ZYNQ_PLL_ARM, "arm_pll", slcr_base + 0x100); - clks[ddr_pll] = zynq_pll_clk(ZYNQ_PLL_DDR, "ddr_pll", slcr_base + 0x104); - clks[io_pll] = zynq_pll_clk(ZYNQ_PLL_IO, "io_pll", slcr_base + 0x108); + clk_fixed("ps_clk", ps_clk_rate); - clks[uart_clk] = zynq_periph_clk("uart_clk", slcr_base + 0x154); + clks[armpll] = zynq_pll_clk(ZYNQ_PLL_ARM, "arm_pll", clk_base + 0x0); + clks[ddrpll] = zynq_pll_clk(ZYNQ_PLL_DDR, "ddr_pll", clk_base + 0x4); + clks[iopll] = zynq_pll_clk(ZYNQ_PLL_IO, "io_pll", clk_base + 0x8); - clks[uart0] = clk_gate("uart0", "uart_clk", slcr_base + 0x154, 0, 0, 0); - clks[uart1] = clk_gate("uart1", "uart_clk", slcr_base + 0x154, 1, 0, 0); + zynq_periph_clk("sdio_clk", clk_base + 0x50); + clks[sdio0] = clk_gate("sdio0", "sdio_clk", clk_base + 0x50, 0, 0, 0); + clks[sdio1] = clk_gate("sdio1", "sdio_clk", clk_base + 0x50, 1, 0, 0); - clks[gem0] = clk_gate("gem0", "io_pll", slcr_base + 0x140, 0, 0, 0); - clks[gem1] = clk_gate("gem1", "io_pll", slcr_base + 0x144, 1, 0, 0); + zynq_periph_clk("uart_clk", clk_base + 0x54); + clks[uart0] = clk_gate("uart0", "uart_clk", clk_base + 0x54, 0, 0, 0); + clks[uart1] = clk_gate("uart1", "uart_clk", clk_base + 0x54, 1, 0, 0); - clks[cpu_clk] = zynq_cpu_clk("cpu_clk", slcr_base + 0x120); + zynq_periph_clk("spi_clk", clk_base + 0x58); + clks[spi0] = clk_gate("spi0", "spi_clk", clk_base + 0x58, 0, 0, 0); + clks[spi1] = clk_gate("spi1", "spi_clk", clk_base + 0x58, 1, 0, 0); - clks[cpu_6x4x] = zynq_cpu_subclk("cpu_6x4x", CPU_SUBCLK_6X4X, - slcr_base + 0x120, slcr_base + 0x1C4); - clks[cpu_3x2x] = zynq_cpu_subclk("cpu_3x2x", CPU_SUBCLK_3X2X, - slcr_base + 0x120, slcr_base + 0x1C4); - clks[cpu_2x] = zynq_cpu_subclk("cpu_2x", CPU_SUBCLK_2X, - slcr_base + 0x120, slcr_base + 0x1C4); - clks[cpu_1x] = zynq_cpu_subclk("cpu_1x", CPU_SUBCLK_1X, - slcr_base + 0x120, slcr_base + 0x1C4); + clks[gem0] = clk_gate("gem0", "io_pll", clk_base + 0x40, 0, 0, 0); + clks[gem1] = clk_gate("gem1", "io_pll", clk_base + 0x44, 1, 0, 0); - clk_register_clkdev(clks[cpu_3x2x], NULL, "arm_smp_twd"); - clk_register_clkdev(clks[uart0], NULL, "zynq_serial0"); - clk_register_clkdev(clks[uart1], NULL, "zynq_serial1"); - clk_register_clkdev(clks[gem0], NULL, "macb0"); - clk_register_clkdev(clks[gem1], NULL, "macb1"); + zynq_cpu_clk("cpu_clk", clk_base + 0x20); - clkdev_add_physbase(clks[cpu_3x2x], CORTEXA9_SCU_TIMER_BASE_ADDR, NULL); - clkdev_add_physbase(clks[uart1], ZYNQ_UART1_BASE_ADDR, NULL); + clks[cpu_6or4x] = zynq_cpu_subclk("cpu_6x4x", CPU_SUBCLK_6X4X, + clk_base + 0x20, clk_base + 0xC4); + clks[cpu_3or2x] = zynq_cpu_subclk("cpu_3x2x", CPU_SUBCLK_3X2X, + clk_base + 0x20, clk_base + 0xC4); + clks[cpu_2x] = zynq_cpu_subclk("cpu_2x", CPU_SUBCLK_2X, + clk_base + 0x20, clk_base + 0xC4); + clks[cpu_1x] = zynq_cpu_subclk("cpu_1x", CPU_SUBCLK_1X, + clk_base + 0x20, clk_base + 0xC4); + + clks[dma] = clk_gate("dma", "cpu_2x", clk_base + 0x2C, 0, 0, 0); + clks[usb0_aper] = clk_gate("usb0_aper", "cpu_1x", + clk_base + 0x2C, 2, 0, 0); + clks[usb1_aper] = clk_gate("usb1_aper", "cpu_1x", + clk_base + 0x2C, 3, 0, 0); + clks[gem0_aper] = clk_gate("gem0_aper", "cpu_1x", + clk_base + 0x2C, 6, 0, 0); + clks[gem1_aper] = clk_gate("gem1_aper", "cpu_1x", + clk_base + 0x2C, 7, 0, 0); + clks[sdio0_aper] = clk_gate("sdio0_aper", "cpu_1x", + clk_base + 0x2C, 10, 0, 0); + clks[sdio1_aper] = clk_gate("sdio1_aper", "cpu_1x", + clk_base + 0x2C, 11, 0, 0); + clks[spi0_aper] = clk_gate("spi0_aper", "cpu_1x", + clk_base + 0x2C, 14, 0, 0); + clks[spi1_aper] = clk_gate("spi1_aper", "cpu_1x", + clk_base + 0x2C, 15, 0, 0); + clks[can0_aper] = clk_gate("can0_aper", "cpu_1x", + clk_base + 0x2C, 16, 0, 0); + clks[can1_aper] = clk_gate("can1_aper", "cpu_1x", + clk_base + 0x2C, 17, 0, 0); + clks[i2c0_aper] = clk_gate("i2c0_aper", "cpu_1x", + clk_base + 0x2C, 18, 0, 0); + clks[i2c1_aper] = clk_gate("i2c1_aper", "cpu_1x", + clk_base + 0x2C, 19, 0, 0); + clks[uart0_aper] = clk_gate("uart0_aper", "cpu_1x", + clk_base + 0x2C, 20, 0, 0); + clks[uart1_aper] = clk_gate("uart1_aper", "cpu_1x", + clk_base + 0x2C, 21, 0, 0); + clks[gpio_aper] = clk_gate("gpio_aper", "cpu_1x", + clk_base + 0x2C, 22, 0, 0); + clks[lqspi_aper] = clk_gate("lqspi_aper", "cpu_1x", + clk_base + 0x2C, 23, 0, 0); + clks[smc_aper] = clk_gate("smc_aper", "cpu_1x", + clk_base + 0x2C, 24, 0, 0); + + clk_data.clks = clks; + clk_data.clk_num = ARRAY_SIZE(clks); + of_clk_add_provider(dev->device_node, of_clk_src_onecell_get, + &clk_data); return 0; } static __maybe_unused struct of_device_id zynq_clock_dt_ids[] = { { - .compatible = "xlnx,zynq-clock", + .compatible = "xlnx,ps7-clkc", }, { /* sentinel */ } diff --git a/drivers/net/macb.c b/drivers/net/macb.c index c4ab9efb63..4850e60c49 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -69,7 +69,7 @@ struct macb_device { int phy_addr; - struct clk *pclk; + struct clk *pclk, *hclk, *txclk, *rxclk; const struct device_d *dev; struct eth_device netdev; @@ -653,7 +653,7 @@ static int macb_probe(struct device_d *dev) struct resource *iores; struct eth_device *edev; struct macb_device *macb; - const char *pclk_name; + const char *pclk_name, *hclk_name; u32 ncfgr; macb = xzalloc(sizeof(*macb)); @@ -689,6 +689,7 @@ static int macb_probe(struct device_d *dev) macb->phy_addr = pdata->phy_addr; macb->phy_flags = pdata->phy_flags; pclk_name = "macb_clk"; + hclk_name = NULL; } else if (IS_ENABLED(CONFIG_OFDEVICE) && dev->device_node) { int ret; struct device_node *mdiobus; @@ -705,6 +706,7 @@ static int macb_probe(struct device_d *dev) macb->phy_addr = -1; pclk_name = "pclk"; + hclk_name = "hclk"; } else { dev_err(dev, "macb: no platform_data\n"); return -ENODEV; @@ -727,6 +729,24 @@ static int macb_probe(struct device_d *dev) clk_enable(macb->pclk); + if (hclk_name) { + macb->hclk = clk_get(dev, pclk_name); + if (IS_ERR(macb->pclk)) { + dev_err(dev, "no hclk\n"); + return PTR_ERR(macb->hclk); + } + + clk_enable(macb->hclk); + } + + macb->txclk = clk_get(dev, "tx_clk"); + if (!IS_ERR(macb->txclk)) + clk_enable(macb->txclk); + + macb->rxclk = clk_get(dev, "rx_clk"); + if (!IS_ERR(macb->rxclk)) + clk_enable(macb->rxclk); + macb->is_gem = read_is_gem(macb); if (macb_is_gem(macb)) @@ -772,6 +792,7 @@ static const struct of_device_id macb_dt_ids[] = { { .compatible = "cdns,at91sam9260-macb",}, { .compatible = "atmel,sama5d2-gem",}, { .compatible = "atmel,sama5d3-gem",}, + { .compatible = "cdns,zynq-gem",}, { .compatible = "cdns,zynqmp-gem",}, { /* sentinel */ } }; diff --git a/images/Makefile b/images/Makefile index ceb00618d2..34b7a56101 100644 --- a/images/Makefile +++ b/images/Makefile @@ -161,6 +161,7 @@ include $(srctree)/images/Makefile.tegra include $(srctree)/images/Makefile.vexpress include $(srctree)/images/Makefile.xburst include $(srctree)/images/Makefile.at91 +include $(srctree)/images/Makefile.zynq include $(srctree)/images/Makefile.zynqmp include $(srctree)/images/Makefile.layerscape @@ -208,5 +209,5 @@ $(flash-list): $(image-y-path) clean-files := *.pbl *.pblb *.map start_*.imximg *.img barebox.z start_*.kwbimg \ start_*.kwbuartimg *.socfpgaimg *.mlo *.t20img *.t20img.cfg *.t30img \ *.t30img.cfg *.t124img *.t124img.cfg *.mlospi *.mlo *.mxsbs *.mxssd \ - start_*.simximg start_*.usimximg *.image + start_*.simximg start_*.usimximg *.zynqimg *.image clean-files += pbl.lds diff --git a/images/Makefile.zynq b/images/Makefile.zynq new file mode 100644 index 0000000000..062496ac7d --- /dev/null +++ b/images/Makefile.zynq @@ -0,0 +1,23 @@ +# +# barebox image generation Makefile for Xilinx Zynq images +# + +zynqcfg_cpp_flags = -Wp,-MD,$(depfile) -nostdinc -x assembler-with-cpp \ + -I arch/arm/mach-zynq/include + +zynqcfg-tmp = $(subst $(comma),_,$(dot-target).zynqcfg.tmp) + +quiet_cmd_zynq_image = ZYNQIMG $@ + cmd_zynq_image = \ + $(CPP) $(zynqcfg_cpp_flags) -o $(zynqcfg-tmp) $(CFG_$(@F)) ; \ + $(objtree)/scripts/zynq_mkimage -c $(zynqcfg-tmp) \ + -f $(subst .zynqimg,,$@) -o $@ + +$(obj)/%.zynqimg: $(obj)/% FORCE + $(call if_changed,zynq_image) + +#------------------------------------------------------------------------------ + +CFG_start_avnet_zedboard.pblb.zynqimg = $(board)/avnet-zedboard/zedboard.zynqcfg +FILE_barebox-avnet-zedboard.img = start_avnet_zedboard.pblb.zynqimg +image-$(CONFIG_MACH_ZEDBOARD) += barebox-avnet-zedboard.img diff --git a/include/asm-generic/barebox.lds.h b/include/asm-generic/barebox.lds.h index b6ca8eb2be..68b78a13a9 100644 --- a/include/asm-generic/barebox.lds.h +++ b/include/asm-generic/barebox.lds.h @@ -7,8 +7,7 @@ #define STRUCT_ALIGN() . = ALIGN(STRUCT_ALIGNMENT) #if defined CONFIG_X86 || \ - defined CONFIG_ARCH_EP93XX || \ - defined CONFIG_ARCH_ZYNQ + defined CONFIG_ARCH_EP93XX #include <mach/barebox.lds.h> #endif diff --git a/include/bootsource.h b/include/bootsource.h index 29347aaeb0..92f7f27cd4 100644 --- a/include/bootsource.h +++ b/include/bootsource.h @@ -17,6 +17,7 @@ enum bootsource { BOOTSOURCE_USB, BOOTSOURCE_NET, BOOTSOURCE_CAN, + BOOTSOURCE_JTAG, }; #define BOOTSOURCE_INSTANCE_UNKNOWN -1 diff --git a/scripts/Makefile b/scripts/Makefile index 16bb513fbb..eb6718fadf 100644 --- a/scripts/Makefile +++ b/scripts/Makefile @@ -20,6 +20,7 @@ hostprogs-$(CONFIG_MVEBU_HOSTTOOLS) += kwbimage kwboot mvebuimg hostprogs-$(CONFIG_ARCH_OMAP) += omap_signGP mk-omap-image hostprogs-$(CONFIG_ARCH_S5PCxx) += s5p_cksum hostprogs-$(CONFIG_ARCH_DAVINCI) += mkublheader +HOSTCFLAGS_zynq_mkimage.o = -I$(srctree) -I$(srctree)/arch/arm/mach-zynq/include hostprogs-$(CONFIG_ARCH_ZYNQ) += zynq_mkimage hostprogs-$(CONFIG_ARCH_SOCFPGA) += socfpga_mkimage hostprogs-$(CONFIG_MXS_HOSTTOOLS)+= mxsimage mxsboot diff --git a/scripts/zynq_mkimage.c b/scripts/zynq_mkimage.c index a096b834d1..0a1c069472 100644 --- a/scripts/zynq_mkimage.c +++ b/scripts/zynq_mkimage.c @@ -14,40 +14,281 @@ #include <endian.h> #include <errno.h> +#include <getopt.h> +#include <linux/kernel.h> +#include <mach/zynq-flash-header.h> #include <malloc.h> +#include <stdint.h> #include <stdio.h> #include <stdlib.h> +#include <string.h> #include <sys/stat.h> +#include <sys/types.h> + +static char *prgname; static void usage(char *name) { - printf("Usage: %s barebox-flash-image <outfile>\n", name); + fprintf(stderr, "usage: %s [OPTIONS]\n\n" + "-c <config> configuration input file" + "-f <input> input image file\n" + "-o <output> output file\n" + "-h this help\n", prgname); + exit(1); +} + +#define MAXARGS 16 + +static int parse_line(char *line, char *argv[]) +{ + int nargs = 0; + + while (nargs < MAXARGS) { + + /* skip any white space */ + while ((*line == ' ') || (*line == '\t')) + ++line; + + if (*line == '\0') { /* end of line, no more args */ + argv[nargs] = NULL; + return nargs; + } + + argv[nargs++] = line; /* begin of argument string */ + + /* find end of string */ + while (*line && (*line != ' ') && (*line != '\t')) + ++line; + + if (*line == '\0') { /* end of line, no more args */ + argv[nargs] = NULL; + return nargs; + } + + *line++ = '\0'; /* terminate current arg */ + } + + printf("** Too many args (max. %d) **\n", MAXARGS); + + return nargs; +} + +struct command { + const char *name; + int (*parse)(char *buf, int argc, char *argv[]); +}; + +static int do_cmd_write_mem(char *buf, int argc, char *argv[]) +{ + unsigned int *wordbuf = (unsigned int *)(buf + REGINIT_OFFSET); + static int reginit_offset; + uint32_t addr, val, width; + char *end; + + if (argc != 4) { + fprintf(stderr, "usage: wm [8|16|32] <addr> <val>\n"); + return -EINVAL; + } + + width = strtoul(argv[1], &end, 0); + if (*end != '\0' || width != 32) { + fprintf(stderr, "illegal width token \"%s\"\n", argv[1]); + return -EINVAL; + } + + addr = strtoul(argv[2], &end, 0); + if (*end != '\0') { + fprintf(stderr, "illegal address token \"%s\"\n", argv[2]); + return -EINVAL; + } + + val = strtoul(argv[3], &end, 0); + if (*end != '\0') { + fprintf(stderr, "illegal value token \"%s\"\n", argv[3]); + return -EINVAL; + } + + wordbuf[reginit_offset] = htole32(addr); + wordbuf[reginit_offset + 1] = htole32(val); + wordbuf[reginit_offset + 1] = htole32(val); + + reginit_offset += 2; + + return 0; +} + +struct command cmds[] = { + { + .name = "wm", + .parse = do_cmd_write_mem, + }, +}; + +static char *readcmd(FILE *f) +{ + static char *buf; + char *str; + ssize_t ret; + + if (!buf) { + buf = malloc(4096); + if (!buf) + return NULL; + } + + str = buf; + *str = 0; + + while (1) { + ret = fread(str, 1, 1, f); + if (!ret) + return strlen(buf) ? buf : NULL; + + if (*str == '\n' || *str == ';') { + *str = 0; + return buf; + } + + str++; + } +} + +int parse_config(char *buf, const char *filename) +{ + FILE *f; + int lineno = 0; + char *line = NULL, *tmp; + char *argv[MAXARGS]; + int nargs, i, ret = 0; + + f = fopen(filename, "r"); + if (!f) { + fprintf(stderr, "Cannot open config file\n"); + exit(1); + } + + while (1) { + line = readcmd(f); + if (!line) + break; + + lineno++; + + tmp = strchr(line, '#'); + if (tmp) + *tmp = 0; + + nargs = parse_line(line, argv); + if (!nargs) + continue; + + ret = -ENOENT; + + for (i = 0; i < ARRAY_SIZE(cmds); i++) { + if (!strcmp(cmds[i].name, argv[0])) { + ret = cmds[i].parse(buf, nargs, argv); + if (ret) { + fprintf(stderr, "error in line %d: %s\n", + lineno, strerror(-ret)); + goto cleanup; + } + break; + } + } + + if (ret == -ENOENT) { + fprintf(stderr, "no such command: %s\n", argv[0]); + goto cleanup; + } + } + +cleanup: + fclose(f); + return ret; +} + +static void add_header(char *buf, unsigned int image_size) +{ + unsigned int *wordbuf = (unsigned int *)buf; + struct zynq_flash_header flash_header = { + .width_det = WIDTH_DETECTION_MAGIC, + .image_id = IMAGE_IDENTIFICATION, + .enc_stat = 0x0, + .user = 0x0, + .flash_offset = IMAGE_OFFSET, + .length = image_size, + .res0 = 0x0, + .start_of_exec = 0x0, + .total_len = image_size, + .res1 = 0x1, + .checksum = 0x0, + .res2 = 0x0, + }; + int i, sum = 0; + + memcpy(wordbuf + 0x8, &flash_header, sizeof(flash_header)); + + for (i = 0x8; i < 0x12; i++) + sum += htole32(wordbuf[i]); + + sum = ~sum; + wordbuf[i] = sum; } int main(int argc, char *argv[]) { FILE *ifile, *ofile; - unsigned int *buf; - const char *infile; - const char *outfile; + char *buf; + const char *infile = NULL, *outfile = NULL, *cfgfile = NULL; struct stat st; - unsigned int i; - unsigned long sum = 0; + int opt; + + prgname = argv[0]; + + while ((opt = getopt(argc, argv, "c:f:ho:")) != -1) { + switch (opt) { + case 'c': + cfgfile = optarg; + break; + case 'f': + infile = optarg; + break; + case 'o': + outfile = optarg; + break; + case 'h': + usage(argv[0]); + default: + exit(1); + } + } - if (argc != 3) { - usage(argv[0]); + if (!infile) { + fprintf(stderr, "input file not given\n"); exit(1); } - infile = argv[1]; - outfile = argv[2]; + if (!outfile) { + fprintf(stderr, "output file not given\n"); + exit(1); + } + + if (!cfgfile) { + fprintf(stderr, "config file not given\n"); + exit(1); + } if (stat(infile, &st) == -1) { perror("stat"); exit(EXIT_FAILURE); } - buf = malloc(st.st_size); + if (st.st_size > 192 * 1024) { + fprintf(stderr, "Image too big, will not fit in OCRAM!\n"); + exit(EXIT_FAILURE); + } + + buf = calloc(st.st_size + IMAGE_OFFSET, sizeof(char)); if (!buf) { fprintf(stderr, "Unable to allocate buffer\n"); return -1; @@ -68,15 +309,14 @@ int main(int argc, char *argv[]) exit(EXIT_FAILURE); } - fread(buf, 4, st.st_size, ifile); + fread(buf + IMAGE_OFFSET, sizeof(char), st.st_size, ifile); - for (i = 0x8; i < 0x12; i++) - sum += htole32(buf[i]); + add_header(buf, st.st_size); - sum = ~sum; - buf[i] = sum; + if (cfgfile) + parse_config(buf, cfgfile); - fwrite(buf, st.st_size / 4, 4, ofile); + fwrite(buf, sizeof(char), st.st_size + IMAGE_OFFSET, ofile); fclose(ofile); fclose(ifile); |