diff options
136 files changed, 1066 insertions, 4633 deletions
diff --git a/Documentation/boards/imx.rst b/Documentation/boards/imx.rst index 6c16923340..5cc4676a96 100644 --- a/Documentation/boards/imx.rst +++ b/Documentation/boards/imx.rst @@ -86,8 +86,8 @@ The images can also always be started as second stage on the target: BootROM Reboot mode codes (bmode) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ -For select SoCs, barebox supports communicating an alternative boot medium -that BootROM should select after a warm reset:: +For selected SoCs, barebox supports communicating an alternative boot medium +that the BootROM should select after a warm reset:: barebox@FSL i.MX8MM EVK board:/ devinfo gpr.reboot_mode Driver: syscon-reboot-mode @@ -107,10 +107,17 @@ that BootROM should select after a warm reset:: barebox@FSL i.MX8MM EVK board:/ gpr.reboot_mode.next=serial reset -w -This will cause barebox to fall into serial download mode on an i.MX8MM. +The example above will cause barebox to jump back into serial download mode on +an i.MX8MM by writing 0x10 into the *SRC_GPR9* register (offset 0x30390094) and +0x40000000 into the *SRC_GPR10* register (offset 0x30390098), and then issuing a +warm :ref:`reset <command_reset>`. Different SoCs may have more possible reboot modes available. -See the section on :ref:`Reboot modes<reboot_mode>` for more information. +Look for documentation of the *SRC_SBMR* and *SRC_GPR* registers in the +Reference Manual of your SoC; the values for the ``mode-*`` properties often +correspond directly to the boot fusemap settings. + +See the section on :ref:`Reboot modes<reboot_mode>` for general information. High Assurance Boot ^^^^^^^^^^^^^^^^^^^ @@ -161,13 +168,13 @@ keys/certificates are expected in these config variables (assuming HABv4): CONFIG_HABV4_IMG_CRT_PEM A CSF template is located in -``arch/arm/mach-imx/include/mach/habv4-imx6-gencsf.h`` which is preprocessed +``include/mach/imx/habv4-imx6-gencsf.h`` which is preprocessed by barebox. It must be included in the board's flash header: .. code-block:: none - #include <mach/habv4-imx6-gencsf.h> + #include <mach/imx/habv4-imx6-gencsf.h> Analogous to HABv4 options and a template exist for HABv3. diff --git a/Documentation/boards/imx/nxp-imx8mm-evk.rst b/Documentation/boards/imx/nxp-imx8mm-evk.rst index f0dfc53ed0..aa70419139 100644 --- a/Documentation/boards/imx/nxp-imx8mm-evk.rst +++ b/Documentation/boards/imx/nxp-imx8mm-evk.rst @@ -85,5 +85,16 @@ installation to the eMMC boot partition requires special handling: then afterwards, the newly written boot partition is activated (This is controlled by the barebox ``mmcX.boot`` variable). +The following steps are required to write the image to the QSPI NOR flash: + + - The 32KiB preamble MMC preamble must be stripped. + + - The QSPI NOR partition ``barebox`` must be erased before the stripped + image is written. The erase size depends on the stripped image size but + always start at offset 0. + + - Write the stripped barebox image to the QSPI NOR partition ``barebox`` + at offset 0. + The ``barebox_update`` command takes care of this and need just be supplied a barebox image as argument. diff --git a/Documentation/boards/imx/nxp-imx8mn-evk.rst b/Documentation/boards/imx/nxp-imx8mn-evk.rst index 177fc59c10..597db57eaf 100644 --- a/Documentation/boards/imx/nxp-imx8mn-evk.rst +++ b/Documentation/boards/imx/nxp-imx8mn-evk.rst @@ -80,5 +80,17 @@ installation to the eMMC boot partition requires special handling: start at an offset when booting from eMMC boot partitions, thus the first 32KiB must be stripped. +The following steps are required to write the image to the QSPI NOR flash: + + - Strip the 32KiB preamble, like it is done for the eMMC boot partition case + (see above). + + - The QSPI NOR partition ``barebox`` must be erased before the stripped + image is written. The erase size depends on the stripped image size but + always start at offset 0. + + - Write the stripped barebox image to the QSPI NOR partition ``barebox`` + at offset 0. + The ``barebox_update`` command takes care of this and need just be supplied a barebox image as argument. diff --git a/Documentation/boards/imx/nxp-imx8mp-evk.rst b/Documentation/boards/imx/nxp-imx8mp-evk.rst index 53cdd904ab..cfd1153e15 100644 --- a/Documentation/boards/imx/nxp-imx8mp-evk.rst +++ b/Documentation/boards/imx/nxp-imx8mp-evk.rst @@ -88,5 +88,17 @@ installation to the eMMC boot partition requires special handling: start at an offset when booting from eMMC boot partitions, thus the first 32KiB must be stripped. +The following steps are required to write the image to the QSPI NOR flash: + + - Strip the 32KiB preamble, like it is done for the eMMC boot partition case + (see above). + + - The QSPI NOR partition ``barebox`` must be erased before the stripped + image is written. The erase size depends on the stripped image size but + always start at offset 0. + + - Write the stripped barebox image to the QSPI NOR partition ``barebox`` + at offset 0. + The ``barebox_update`` command takes care of this and need just be supplied a barebox image as argument. diff --git a/Documentation/devicetree/index.rst b/Documentation/devicetree/index.rst index 36fa69058d..f85ce6608d 100644 --- a/Documentation/devicetree/index.rst +++ b/Documentation/devicetree/index.rst @@ -151,3 +151,25 @@ Contents: bindings/regulator/* bindings/rtc/* bindings/watchdog/* + +Automatic Boot Argument Fixups to the Devicetree +------------------------------------------------ + +barebox automatically fixes up some boot and system information in the device tree. + +In the device tree root, barebox fixes up + + * serial-number (if available) + * machine compatible (if overridden) + +In the ``chosen``-node, barebox fixes up + + * barebox-version + * reset-source + * reset-source-instance (if available) + * reset-source-device (node-path, only if available) + * bootsource + * boot-hartid (only on RISC-V) + +These values can be read from the booted linux system in ``/proc/device-tree/`` +or ``/sys/firmware/devicetree/base``. @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 VERSION = 2023 -PATCHLEVEL = 03 +PATCHLEVEL = 04 SUBLEVEL = 0 EXTRAVERSION = NAME = None @@ -364,7 +364,7 @@ KCONFIG_CONFIG ?= .config CROSS_PKG_CONFIG ?= $(CROSS_COMPILE)pkg-config -export KCONFIG_CONFIG +export KCONFIG_CONFIG CROSS_PKG_CONFIG # SHELL used by kbuild CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \ diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 9bd7db6ba9..a506f1e3a3 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -42,6 +42,7 @@ endif # Note that GCC does not numerically define an architecture version # macro, but instead defines a whole series of macros which makes # testing for a specific architecture or later rather impossible. +arch-y := -include asm/arch-check.h arch-$(CONFIG_CPU_64v8) := -D__LINUX_ARM_ARCH__=8 $(call cc-option,-march=armv8-a) arch-$(CONFIG_CPU_32v7) :=-D__LINUX_ARM_ARCH__=7 $(call cc-option,-march=armv7-a,-march=armv5t -Wa$(comma)-march=armv7-a) arch-$(CONFIG_CPU_32v6) :=-D__LINUX_ARM_ARCH__=6 $(call cc-option,-march=armv6,-march=armv5t -Wa$(comma)-march=armv6) diff --git a/arch/arm/boards/ls1021aiot/lowlevel.c b/arch/arm/boards/ls1021aiot/lowlevel.c index a66d3490b1..f255c425b7 100644 --- a/arch/arm/boards/ls1021aiot/lowlevel.c +++ b/arch/arm/boards/ls1021aiot/lowlevel.c @@ -85,7 +85,6 @@ static noinline __noreturn void ls1021aiot_r_entry(void) __dtb_fsl_ls1021a_iot_start); } - arm_cpu_lowlevel_init(); ls102xa_init_lowlevel(); ls102xa_debug_ll_init(); diff --git a/arch/arm/boards/nxp-imx8mm-evk/board.c b/arch/arm/boards/nxp-imx8mm-evk/board.c index fd748262f7..c8e17570ca 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/board.c +++ b/arch/arm/boards/nxp-imx8mm-evk/board.c @@ -53,6 +53,7 @@ static int imx8mm_evk_probe(struct device *dev) imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", sd_bbu_flag); imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); + imx8m_bbu_internal_flexspi_nor_register_handler("QSPI", "/dev/m25p0.barebox", 0); phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK, ar8031_phy_fixup); diff --git a/arch/arm/boards/nxp-imx8mm-evk/flash-header-imx8mm-evk.imxcfg b/arch/arm/boards/nxp-imx8mm-evk/flash-header-imx8mm-evk.imxcfg index 10606ce29c..d6a536053e 100644 --- a/arch/arm/boards/nxp-imx8mm-evk/flash-header-imx8mm-evk.imxcfg +++ b/arch/arm/boards/nxp-imx8mm-evk/flash-header-imx8mm-evk.imxcfg @@ -5,3 +5,6 @@ soc imx8mm loadaddr 0x007e1000 max_load_size 0x3f000 ivtofs 0x400 + +flexspi_ivtofs 0x1000 +flexspi_fcfbofs 0x0 diff --git a/arch/arm/boards/nxp-imx8mn-evk/board.c b/arch/arm/boards/nxp-imx8mn-evk/board.c index 13efc62a58..3e90ba284c 100644 --- a/arch/arm/boards/nxp-imx8mn-evk/board.c +++ b/arch/arm/boards/nxp-imx8mn-evk/board.c @@ -51,6 +51,7 @@ static int imx8mn_evk_probe(struct device *dev) imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", sd_bbu_flag); imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); + imx8m_bbu_internal_flexspi_nor_register_handler("QSPI", "/dev/m25p0.barebox", 0); phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK, ar8031_phy_fixup); diff --git a/arch/arm/boards/nxp-imx8mn-evk/flash-header-imx8mn-evk.imxcfg b/arch/arm/boards/nxp-imx8mn-evk/flash-header-imx8mn-evk.imxcfg index 27a2138e43..a9b592e624 100644 --- a/arch/arm/boards/nxp-imx8mn-evk/flash-header-imx8mn-evk.imxcfg +++ b/arch/arm/boards/nxp-imx8mn-evk/flash-header-imx8mn-evk.imxcfg @@ -5,3 +5,6 @@ soc imx8mn loadaddr 0x912000 max_load_size 0x3f000 ivtofs 0x0 + +flexspi_ivtofs 0x0 +flexspi_fcfbofs 0x400 diff --git a/arch/arm/boards/nxp-imx8mn-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mn-evk/lowlevel.c index 8e7383c9d2..398dfb33ae 100644 --- a/arch/arm/boards/nxp-imx8mn-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mn-evk/lowlevel.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 #include <io.h> +#include <image-metadata.h> #include <common.h> #include <debug_ll.h> #include <mach/imx/debug_ll.h> @@ -154,5 +155,8 @@ ENTRY_FUNCTION(start_nxp_imx8mn_evk, r0, r1, r2) relocate_to_current_adr(); setup_c(); + IMD_USED_OF(imx8mn_evk); + IMD_USED_OF(imx8mn_ddr4_evk); + nxp_imx8mn_evk_start(); } diff --git a/arch/arm/boards/nxp-imx8mp-evk/board.c b/arch/arm/boards/nxp-imx8mp-evk/board.c index 0c9fe7835b..2aa551e504 100644 --- a/arch/arm/boards/nxp-imx8mp-evk/board.c +++ b/arch/arm/boards/nxp-imx8mp-evk/board.c @@ -36,6 +36,7 @@ static int nxp_imx8mp_evk_probe(struct device *dev) imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", sd_bbu_flag); imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", emmc_bbu_flag); + imx8m_bbu_internal_flexspi_nor_register_handler("QSPI", "/dev/m25p0.barebox", 0); /* Enable RGMII TX clk output */ val = readl(MX8MP_IOMUXC_GPR_BASE_ADDR + MX8MP_IOMUXC_GPR1); diff --git a/arch/arm/boards/nxp-imx8mp-evk/flash-header-imx8mp-evk.imxcfg b/arch/arm/boards/nxp-imx8mp-evk/flash-header-imx8mp-evk.imxcfg index 663bd102e9..3bb44d199c 100644 --- a/arch/arm/boards/nxp-imx8mp-evk/flash-header-imx8mp-evk.imxcfg +++ b/arch/arm/boards/nxp-imx8mp-evk/flash-header-imx8mp-evk.imxcfg @@ -5,3 +5,6 @@ soc imx8mp loadaddr 0x920000 max_load_size 0x3f000 ivtofs 0x0 + +flexspi_ivtofs 0x0 +flexspi_fcfbofs 0x400 diff --git a/arch/arm/boards/protonic-imx6/board.c b/arch/arm/boards/protonic-imx6/board.c index 97d8bb87b2..e7958dd76b 100644 --- a/arch/arm/boards/protonic-imx6/board.c +++ b/arch/arm/boards/protonic-imx6/board.c @@ -530,7 +530,7 @@ static int prt_imx6_bbu(struct prt_imx6_priv *priv) emmc_flags = BBU_HANDLER_FLAG_DEFAULT; } - devicefile = basprintf("mmc%d", dcfg->emmc_usdhc); + devicefile = basprintf("/dev/mmc%d", dcfg->emmc_usdhc); if (!devicefile) { ret = -ENOMEM; goto exit_bbu; @@ -540,7 +540,7 @@ static int prt_imx6_bbu(struct prt_imx6_priv *priv) if (ret) goto exit_bbu; - devicefile = basprintf("mmc%d", dcfg->sd_usdhc); + devicefile = basprintf("/dev/mmc%d", dcfg->sd_usdhc); if (!devicefile) { ret = -ENOMEM; goto exit_bbu; diff --git a/arch/arm/boards/radxa-rock3/board.c b/arch/arm/boards/radxa-rock3/board.c index 4b4e0613d3..0d425e2667 100644 --- a/arch/arm/boards/radxa-rock3/board.c +++ b/arch/arm/boards/radxa-rock3/board.c @@ -21,14 +21,13 @@ static int rock3_probe(struct device *dev) barebox_set_model(model->name); barebox_set_hostname(model->shortname); - if (bootsource == BOOTSOURCE_MMC && instance == 0) + if (bootsource == BOOTSOURCE_MMC && instance == 1) of_device_enable_path("/chosen/environment-sd"); else of_device_enable_path("/chosen/environment-emmc"); - rk3568_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, - "/dev/mmc1"); - rk3568_bbu_mmc_register("sd", 0, "/dev/mmc0"); + rk3568_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, "/dev/mmc0"); + rk3568_bbu_mmc_register("sd", 0, "/dev/mmc1"); return 0; } diff --git a/arch/arm/boards/sama5d4_wifx/lowlevel.c b/arch/arm/boards/sama5d4_wifx/lowlevel.c index 0c3529e659..c47b14c55b 100644 --- a/arch/arm/boards/sama5d4_wifx/lowlevel.c +++ b/arch/arm/boards/sama5d4_wifx/lowlevel.c @@ -2,8 +2,8 @@ // SPDX-FileCopyrightText: 2022 Ahmad Fatoum, Pengutronix #include <debug_ll.h> -#include <mach/barebox-arm.h> -#include <mach/ddramc.h> +#include <mach/at91/barebox-arm.h> +#include <mach/at91/ddramc.h> SAMA5D4_ENTRY_FUNCTION(start_sama5d4_wifx_l1, r4) { diff --git a/arch/arm/configs/at91_multi_defconfig b/arch/arm/configs/at91_multi_defconfig index bbba137be8..c93c2f5786 100644 --- a/arch/arm/configs/at91_multi_defconfig +++ b/arch/arm/configs/at91_multi_defconfig @@ -7,6 +7,7 @@ CONFIG_MACH_MICROCHIP_KSZ9477_EVB=y CONFIG_MACH_SAMA5D3_XPLAINED=y CONFIG_MACH_SAMA5D27_SOM1=y CONFIG_MACH_SAMA5D27_GIANTBOARD=y +CONFIG_MACH_SAMA5D4_WIFX=y CONFIG_AEABI=y CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y CONFIG_ARM_UNWIND=y diff --git a/arch/arm/cpu/setupc_64.S b/arch/arm/cpu/setupc_64.S index d64281c148..f38f893be9 100644 --- a/arch/arm/cpu/setupc_64.S +++ b/arch/arm/cpu/setupc_64.S @@ -14,7 +14,7 @@ ENTRY(setup_c) mov x1, #0 ldr x2, =__bss_stop sub x2, x2, x0 - bl memset /* clear bss */ + bl __memset /* clear bss */ mov x30, x15 ret ENDPROC(setup_c) @@ -63,7 +63,7 @@ ENTRY(relocate_to_adr) sub x19, x19, x1 /* sub address where we are actually running */ add x19, x19, x0 /* add address where we are going to run */ - bl memcpy /* copy binary */ + bl __memcpy /* copy binary */ bl sync_caches_for_execution diff --git a/arch/arm/dts/imx8mm-evk.dtsi b/arch/arm/dts/imx8mm-evk.dtsi index 4d64dcad1c..a657faa6bc 100644 --- a/arch/arm/dts/imx8mm-evk.dtsi +++ b/arch/arm/dts/imx8mm-evk.dtsi @@ -19,6 +19,25 @@ }; }; +&{flexspi/flash@0} { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0xe0000>; + }; + + partition@e0000 { + label = "barebox-environment"; + reg = <0xe0000 0x20000>; + }; + }; + +}; + ®_usdhc2_vmmc { off-on-delay-us = <20000>; }; diff --git a/arch/arm/dts/imx8mn-evk.dtsi b/arch/arm/dts/imx8mn-evk.dtsi index d15f66ff40..c23075216e 100644 --- a/arch/arm/dts/imx8mn-evk.dtsi +++ b/arch/arm/dts/imx8mn-evk.dtsi @@ -21,6 +21,25 @@ }; }; +&flash0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0xe0000>; + }; + + partition@e0000 { + label = "barebox-environment"; + reg = <0xe0000 0x20000>; + }; + }; + +}; + &usdhc2 { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/dts/imx8mp-evk.dts b/arch/arm/dts/imx8mp-evk.dts index c7c661028c..0376743068 100644 --- a/arch/arm/dts/imx8mp-evk.dts +++ b/arch/arm/dts/imx8mp-evk.dts @@ -37,6 +37,25 @@ reset-deassert-us = <100000>; }; +&{flexspi/flash@0} { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0xe0000>; + }; + + partition@e0000 { + label = "barebox-environment"; + reg = <0xe0000 0x20000>; + }; + }; + +}; + ®_usdhc2_vmmc { off-on-delay-us = <20000>; }; diff --git a/arch/arm/dts/imx8mp.dtsi b/arch/arm/dts/imx8mp.dtsi index 6962d11e85..3bec843262 100644 --- a/arch/arm/dts/imx8mp.dtsi +++ b/arch/arm/dts/imx8mp.dtsi @@ -10,6 +10,15 @@ }; }; +/* Temporary workaround until snps,gfladj-refclk-lpm-sel-quirk is supported */ +&usb_dwc3_0 { + snps,dis-u2-freeclk-exists-quirk; +}; + +&usb_dwc3_1 { + snps,dis-u2-freeclk-exists-quirk; +}; + /* * The DSP reserved memory will collide with the Barebox malloc area for some * DRAM sizes, even though the DSP itself is disabled in most configurations. diff --git a/arch/arm/dts/rk3568-pinctrl.dtsi b/arch/arm/dts/rk3568-pinctrl.dtsi deleted file mode 100644 index a588ca95ac..0000000000 --- a/arch/arm/dts/rk3568-pinctrl.dtsi +++ /dev/null @@ -1,3111 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - */ - -#include <dt-bindings/pinctrl/rockchip.h> -#include "rockchip-pinconf.dtsi" - -/* - * This file is auto generated by pin2dts tool, please keep these code - * by adding changes at end of this file. - */ -&pinctrl { - acodec { - /omit-if-no-ref/ - acodec_pins: acodec-pins { - rockchip,pins = - /* acodec_adc_sync */ - <1 RK_PB1 5 &pcfg_pull_none>, - /* acodec_adcclk */ - <1 RK_PA1 5 &pcfg_pull_none>, - /* acodec_adcdata */ - <1 RK_PA0 5 &pcfg_pull_none>, - /* acodec_dac_datal */ - <1 RK_PA7 5 &pcfg_pull_none>, - /* acodec_dac_datar */ - <1 RK_PB0 5 &pcfg_pull_none>, - /* acodec_dacclk */ - <1 RK_PA3 5 &pcfg_pull_none>, - /* acodec_dacsync */ - <1 RK_PA5 5 &pcfg_pull_none>; - }; - }; - - audiopwm { - /omit-if-no-ref/ - audiopwm_lout: audiopwm-lout { - rockchip,pins = - /* audiopwm_lout */ - <1 RK_PA0 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - audiopwm_loutn: audiopwm-loutn { - rockchip,pins = - /* audiopwm_loutn */ - <1 RK_PA1 6 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - audiopwm_loutp: audiopwm-loutp { - rockchip,pins = - /* audiopwm_loutp */ - <1 RK_PA0 6 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - audiopwm_rout: audiopwm-rout { - rockchip,pins = - /* audiopwm_rout */ - <1 RK_PA1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - audiopwm_routn: audiopwm-routn { - rockchip,pins = - /* audiopwm_routn */ - <1 RK_PA7 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - audiopwm_routp: audiopwm-routp { - rockchip,pins = - /* audiopwm_routp */ - <1 RK_PA6 4 &pcfg_pull_none>; - }; - }; - - bt656 { - /omit-if-no-ref/ - bt656m0_pins: bt656m0-pins { - rockchip,pins = - /* bt656_clkm0 */ - <3 RK_PA0 2 &pcfg_pull_none>, - /* bt656_d0m0 */ - <2 RK_PD0 2 &pcfg_pull_none>, - /* bt656_d1m0 */ - <2 RK_PD1 2 &pcfg_pull_none>, - /* bt656_d2m0 */ - <2 RK_PD2 2 &pcfg_pull_none>, - /* bt656_d3m0 */ - <2 RK_PD3 2 &pcfg_pull_none>, - /* bt656_d4m0 */ - <2 RK_PD4 2 &pcfg_pull_none>, - /* bt656_d5m0 */ - <2 RK_PD5 2 &pcfg_pull_none>, - /* bt656_d6m0 */ - <2 RK_PD6 2 &pcfg_pull_none>, - /* bt656_d7m0 */ - <2 RK_PD7 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - bt656m1_pins: bt656m1-pins { - rockchip,pins = - /* bt656_clkm1 */ - <4 RK_PB4 5 &pcfg_pull_none>, - /* bt656_d0m1 */ - <3 RK_PC6 5 &pcfg_pull_none>, - /* bt656_d1m1 */ - <3 RK_PC7 5 &pcfg_pull_none>, - /* bt656_d2m1 */ - <3 RK_PD0 5 &pcfg_pull_none>, - /* bt656_d3m1 */ - <3 RK_PD1 5 &pcfg_pull_none>, - /* bt656_d4m1 */ - <3 RK_PD2 5 &pcfg_pull_none>, - /* bt656_d5m1 */ - <3 RK_PD3 5 &pcfg_pull_none>, - /* bt656_d6m1 */ - <3 RK_PD4 5 &pcfg_pull_none>, - /* bt656_d7m1 */ - <3 RK_PD5 5 &pcfg_pull_none>; - }; - }; - - bt1120 { - /omit-if-no-ref/ - bt1120_pins: bt1120-pins { - rockchip,pins = - /* bt1120_clk */ - <3 RK_PA6 2 &pcfg_pull_none>, - /* bt1120_d0 */ - <3 RK_PA1 2 &pcfg_pull_none>, - /* bt1120_d1 */ - <3 RK_PA2 2 &pcfg_pull_none>, - /* bt1120_d2 */ - <3 RK_PA3 2 &pcfg_pull_none>, - /* bt1120_d3 */ - <3 RK_PA4 2 &pcfg_pull_none>, - /* bt1120_d4 */ - <3 RK_PA5 2 &pcfg_pull_none>, - /* bt1120_d5 */ - <3 RK_PA7 2 &pcfg_pull_none>, - /* bt1120_d6 */ - <3 RK_PB0 2 &pcfg_pull_none>, - /* bt1120_d7 */ - <3 RK_PB1 2 &pcfg_pull_none>, - /* bt1120_d8 */ - <3 RK_PB2 2 &pcfg_pull_none>, - /* bt1120_d9 */ - <3 RK_PB3 2 &pcfg_pull_none>, - /* bt1120_d10 */ - <3 RK_PB4 2 &pcfg_pull_none>, - /* bt1120_d11 */ - <3 RK_PB5 2 &pcfg_pull_none>, - /* bt1120_d12 */ - <3 RK_PB6 2 &pcfg_pull_none>, - /* bt1120_d13 */ - <3 RK_PC1 2 &pcfg_pull_none>, - /* bt1120_d14 */ - <3 RK_PC2 2 &pcfg_pull_none>, - /* bt1120_d15 */ - <3 RK_PC3 2 &pcfg_pull_none>; - }; - }; - - cam { - /omit-if-no-ref/ - cam_clkout0: cam-clkout0 { - rockchip,pins = - /* cam_clkout0 */ - <4 RK_PA7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - cam_clkout1: cam-clkout1 { - rockchip,pins = - /* cam_clkout1 */ - <4 RK_PB0 1 &pcfg_pull_none>; - }; - }; - - can0 { - /omit-if-no-ref/ - can0m0_pins: can0m0-pins { - rockchip,pins = - /* can0_rxm0 */ - <0 RK_PB4 2 &pcfg_pull_none>, - /* can0_txm0 */ - <0 RK_PB3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - can0m1_pins: can0m1-pins { - rockchip,pins = - /* can0_rxm1 */ - <2 RK_PA2 4 &pcfg_pull_none>, - /* can0_txm1 */ - <2 RK_PA1 4 &pcfg_pull_none>; - }; - }; - - can1 { - /omit-if-no-ref/ - can1m0_pins: can1m0-pins { - rockchip,pins = - /* can1_rxm0 */ - <1 RK_PA0 3 &pcfg_pull_none>, - /* can1_txm0 */ - <1 RK_PA1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - can1m1_pins: can1m1-pins { - rockchip,pins = - /* can1_rxm1 */ - <4 RK_PC2 3 &pcfg_pull_none>, - /* can1_txm1 */ - <4 RK_PC3 3 &pcfg_pull_none>; - }; - }; - - can2 { - /omit-if-no-ref/ - can2m0_pins: can2m0-pins { - rockchip,pins = - /* can2_rxm0 */ - <4 RK_PB4 3 &pcfg_pull_none>, - /* can2_txm0 */ - <4 RK_PB5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - can2m1_pins: can2m1-pins { - rockchip,pins = - /* can2_rxm1 */ - <2 RK_PB1 4 &pcfg_pull_none>, - /* can2_txm1 */ - <2 RK_PB2 4 &pcfg_pull_none>; - }; - }; - - cif { - /omit-if-no-ref/ - cif_clk: cif-clk { - rockchip,pins = - /* cif_clkout */ - <4 RK_PC0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - cif_dvp_clk: cif-dvp-clk { - rockchip,pins = - /* cif_clkin */ - <4 RK_PC1 1 &pcfg_pull_none>, - /* cif_href */ - <4 RK_PB6 1 &pcfg_pull_none>, - /* cif_vsync */ - <4 RK_PB7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - cif_dvp_bus16: cif-dvp-bus16 { - rockchip,pins = - /* cif_d8 */ - <3 RK_PD6 1 &pcfg_pull_none>, - /* cif_d9 */ - <3 RK_PD7 1 &pcfg_pull_none>, - /* cif_d10 */ - <4 RK_PA0 1 &pcfg_pull_none>, - /* cif_d11 */ - <4 RK_PA1 1 &pcfg_pull_none>, - /* cif_d12 */ - <4 RK_PA2 1 &pcfg_pull_none>, - /* cif_d13 */ - <4 RK_PA3 1 &pcfg_pull_none>, - /* cif_d14 */ - <4 RK_PA4 1 &pcfg_pull_none>, - /* cif_d15 */ - <4 RK_PA5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - cif_dvp_bus8: cif-dvp-bus8 { - rockchip,pins = - /* cif_d0 */ - <3 RK_PC6 1 &pcfg_pull_none>, - /* cif_d1 */ - <3 RK_PC7 1 &pcfg_pull_none>, - /* cif_d2 */ - <3 RK_PD0 1 &pcfg_pull_none>, - /* cif_d3 */ - <3 RK_PD1 1 &pcfg_pull_none>, - /* cif_d4 */ - <3 RK_PD2 1 &pcfg_pull_none>, - /* cif_d5 */ - <3 RK_PD3 1 &pcfg_pull_none>, - /* cif_d6 */ - <3 RK_PD4 1 &pcfg_pull_none>, - /* cif_d7 */ - <3 RK_PD5 1 &pcfg_pull_none>; - }; - }; - - clk32k { - /omit-if-no-ref/ - clk32k_in: clk32k-in { - rockchip,pins = - /* clk32k_in */ - <0 RK_PB0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - clk32k_out0: clk32k-out0 { - rockchip,pins = - /* clk32k_out0 */ - <0 RK_PB0 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - clk32k_out1: clk32k-out1 { - rockchip,pins = - /* clk32k_out1 */ - <2 RK_PC6 1 &pcfg_pull_none>; - }; - }; - - cpu { - /omit-if-no-ref/ - cpu_pins: cpu-pins { - rockchip,pins = - /* cpu_avs */ - <0 RK_PB7 2 &pcfg_pull_none>; - }; - }; - - ebc { - /omit-if-no-ref/ - ebc_extern: ebc-extern { - rockchip,pins = - /* ebc_sdce1 */ - <4 RK_PA7 2 &pcfg_pull_none>, - /* ebc_sdce2 */ - <4 RK_PB0 2 &pcfg_pull_none>, - /* ebc_sdce3 */ - <4 RK_PB1 2 &pcfg_pull_none>, - /* ebc_sdshr */ - <4 RK_PB5 2 &pcfg_pull_none>, - /* ebc_vcom */ - <4 RK_PB2 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - ebc_pins: ebc-pins { - rockchip,pins = - /* ebc_gdclk */ - <4 RK_PC0 2 &pcfg_pull_none>, - /* ebc_gdoe */ - <4 RK_PB3 2 &pcfg_pull_none>, - /* ebc_gdsp */ - <4 RK_PB4 2 &pcfg_pull_none>, - /* ebc_sdce0 */ - <4 RK_PA6 2 &pcfg_pull_none>, - /* ebc_sdclk */ - <4 RK_PC1 2 &pcfg_pull_none>, - /* ebc_sddo0 */ - <3 RK_PC6 2 &pcfg_pull_none>, - /* ebc_sddo1 */ - <3 RK_PC7 2 &pcfg_pull_none>, - /* ebc_sddo2 */ - <3 RK_PD0 2 &pcfg_pull_none>, - /* ebc_sddo3 */ - <3 RK_PD1 2 &pcfg_pull_none>, - /* ebc_sddo4 */ - <3 RK_PD2 2 &pcfg_pull_none>, - /* ebc_sddo5 */ - <3 RK_PD3 2 &pcfg_pull_none>, - /* ebc_sddo6 */ - <3 RK_PD4 2 &pcfg_pull_none>, - /* ebc_sddo7 */ - <3 RK_PD5 2 &pcfg_pull_none>, - /* ebc_sddo8 */ - <3 RK_PD6 2 &pcfg_pull_none>, - /* ebc_sddo9 */ - <3 RK_PD7 2 &pcfg_pull_none>, - /* ebc_sddo10 */ - <4 RK_PA0 2 &pcfg_pull_none>, - /* ebc_sddo11 */ - <4 RK_PA1 2 &pcfg_pull_none>, - /* ebc_sddo12 */ - <4 RK_PA2 2 &pcfg_pull_none>, - /* ebc_sddo13 */ - <4 RK_PA3 2 &pcfg_pull_none>, - /* ebc_sddo14 */ - <4 RK_PA4 2 &pcfg_pull_none>, - /* ebc_sddo15 */ - <4 RK_PA5 2 &pcfg_pull_none>, - /* ebc_sdle */ - <4 RK_PB6 2 &pcfg_pull_none>, - /* ebc_sdoe */ - <4 RK_PB7 2 &pcfg_pull_none>; - }; - }; - - edpdp { - /omit-if-no-ref/ - edpdpm0_pins: edpdpm0-pins { - rockchip,pins = - /* edpdp_hpdinm0 */ - <4 RK_PC4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - edpdpm1_pins: edpdpm1-pins { - rockchip,pins = - /* edpdp_hpdinm1 */ - <0 RK_PC2 2 &pcfg_pull_none>; - }; - }; - - emmc { - /omit-if-no-ref/ - emmc_rstnout: emmc-rstnout { - rockchip,pins = - /* emmc_rstn */ - <1 RK_PC7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - emmc_bus8: emmc-bus8 { - rockchip,pins = - /* emmc_d0 */ - <1 RK_PB4 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d1 */ - <1 RK_PB5 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d2 */ - <1 RK_PB6 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d3 */ - <1 RK_PB7 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d4 */ - <1 RK_PC0 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d5 */ - <1 RK_PC1 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d6 */ - <1 RK_PC2 1 &pcfg_pull_up_drv_level_2>, - /* emmc_d7 */ - <1 RK_PC3 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - emmc_clk: emmc-clk { - rockchip,pins = - /* emmc_clkout */ - <1 RK_PC5 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - emmc_cmd: emmc-cmd { - rockchip,pins = - /* emmc_cmd */ - <1 RK_PC4 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - emmc_datastrobe: emmc-datastrobe { - rockchip,pins = - /* emmc_datastrobe */ - <1 RK_PC6 1 &pcfg_pull_none>; - }; - }; - - eth0 { - /omit-if-no-ref/ - eth0_pins: eth0-pins { - rockchip,pins = - /* eth0_refclko25m */ - <2 RK_PC1 2 &pcfg_pull_none>; - }; - }; - - eth1 { - /omit-if-no-ref/ - eth1m0_pins: eth1m0-pins { - rockchip,pins = - /* eth1_refclko25mm0 */ - <3 RK_PB0 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - eth1m1_pins: eth1m1-pins { - rockchip,pins = - /* eth1_refclko25mm1 */ - <4 RK_PB3 3 &pcfg_pull_none>; - }; - }; - - flash { - /omit-if-no-ref/ - flash_pins: flash-pins { - rockchip,pins = - /* flash_ale */ - <1 RK_PD0 2 &pcfg_pull_none>, - /* flash_cle */ - <1 RK_PC6 3 &pcfg_pull_none>, - /* flash_cs0n */ - <1 RK_PD3 2 &pcfg_pull_none>, - /* flash_cs1n */ - <1 RK_PD4 2 &pcfg_pull_none>, - /* flash_d0 */ - <1 RK_PB4 2 &pcfg_pull_none>, - /* flash_d1 */ - <1 RK_PB5 2 &pcfg_pull_none>, - /* flash_d2 */ - <1 RK_PB6 2 &pcfg_pull_none>, - /* flash_d3 */ - <1 RK_PB7 2 &pcfg_pull_none>, - /* flash_d4 */ - <1 RK_PC0 2 &pcfg_pull_none>, - /* flash_d5 */ - <1 RK_PC1 2 &pcfg_pull_none>, - /* flash_d6 */ - <1 RK_PC2 2 &pcfg_pull_none>, - /* flash_d7 */ - <1 RK_PC3 2 &pcfg_pull_none>, - /* flash_dqs */ - <1 RK_PC5 2 &pcfg_pull_none>, - /* flash_rdn */ - <1 RK_PD2 2 &pcfg_pull_none>, - /* flash_rdy */ - <1 RK_PD1 2 &pcfg_pull_none>, - /* flash_volsel */ - <0 RK_PA7 1 &pcfg_pull_none>, - /* flash_wpn */ - <1 RK_PC7 3 &pcfg_pull_none>, - /* flash_wrn */ - <1 RK_PC4 2 &pcfg_pull_none>; - }; - }; - - fspi { - /omit-if-no-ref/ - fspi_pins: fspi-pins { - rockchip,pins = - /* fspi_clk */ - <1 RK_PD0 1 &pcfg_pull_none>, - /* fspi_cs0n */ - <1 RK_PD3 1 &pcfg_pull_none>, - /* fspi_d0 */ - <1 RK_PD1 1 &pcfg_pull_none>, - /* fspi_d1 */ - <1 RK_PD2 1 &pcfg_pull_none>, - /* fspi_d2 */ - <1 RK_PC7 2 &pcfg_pull_none>, - /* fspi_d3 */ - <1 RK_PD4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - fspi_cs1: fspi-cs1 { - rockchip,pins = - /* fspi_cs1n */ - <1 RK_PC6 2 &pcfg_pull_up>; - }; - }; - - gmac0 { - /omit-if-no-ref/ - gmac0_miim: gmac0-miim { - rockchip,pins = - /* gmac0_mdc */ - <2 RK_PC3 2 &pcfg_pull_none>, - /* gmac0_mdio */ - <2 RK_PC4 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_clkinout: gmac0-clkinout { - rockchip,pins = - /* gmac0_mclkinout */ - <2 RK_PC2 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_rx_er: gmac0-rx-er { - rockchip,pins = - /* gmac0_rxer */ - <2 RK_PC5 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_rx_bus2: gmac0-rx-bus2 { - rockchip,pins = - /* gmac0_rxd0 */ - <2 RK_PB6 1 &pcfg_pull_none>, - /* gmac0_rxd1 */ - <2 RK_PB7 2 &pcfg_pull_none>, - /* gmac0_rxdvcrs */ - <2 RK_PC0 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_tx_bus2: gmac0-tx-bus2 { - rockchip,pins = - /* gmac0_txd0 */ - <2 RK_PB3 1 &pcfg_pull_none_drv_level_2>, - /* gmac0_txd1 */ - <2 RK_PB4 1 &pcfg_pull_none_drv_level_2>, - /* gmac0_txen */ - <2 RK_PB5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_rgmii_clk: gmac0-rgmii-clk { - rockchip,pins = - /* gmac0_rxclk */ - <2 RK_PA5 2 &pcfg_pull_none>, - /* gmac0_txclk */ - <2 RK_PB0 2 &pcfg_pull_none_drv_level_1>; - }; - - /omit-if-no-ref/ - gmac0_rgmii_bus: gmac0-rgmii-bus { - rockchip,pins = - /* gmac0_rxd2 */ - <2 RK_PA3 2 &pcfg_pull_none>, - /* gmac0_rxd3 */ - <2 RK_PA4 2 &pcfg_pull_none>, - /* gmac0_txd2 */ - <2 RK_PA6 2 &pcfg_pull_none_drv_level_2>, - /* gmac0_txd3 */ - <2 RK_PA7 2 &pcfg_pull_none_drv_level_2>; - }; - }; - - gmac1 { - /omit-if-no-ref/ - gmac1m0_miim: gmac1m0-miim { - rockchip,pins = - /* gmac1_mdcm0 */ - <3 RK_PC4 3 &pcfg_pull_none>, - /* gmac1_mdiom0 */ - <3 RK_PC5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m0_clkinout: gmac1m0-clkinout { - rockchip,pins = - /* gmac1_mclkinoutm0 */ - <3 RK_PC0 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m0_rx_er: gmac1m0-rx-er { - rockchip,pins = - /* gmac1_rxerm0 */ - <3 RK_PB4 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m0_rx_bus2: gmac1m0-rx-bus2 { - rockchip,pins = - /* gmac1_rxd0m0 */ - <3 RK_PB1 3 &pcfg_pull_none>, - /* gmac1_rxd1m0 */ - <3 RK_PB2 3 &pcfg_pull_none>, - /* gmac1_rxdvcrsm0 */ - <3 RK_PB3 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m0_tx_bus2: gmac1m0-tx-bus2 { - rockchip,pins = - /* gmac1_txd0m0 */ - <3 RK_PB5 3 &pcfg_pull_none_drv_level_2>, - /* gmac1_txd1m0 */ - <3 RK_PB6 3 &pcfg_pull_none_drv_level_2>, - /* gmac1_txenm0 */ - <3 RK_PB7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m0_rgmii_clk: gmac1m0-rgmii-clk { - rockchip,pins = - /* gmac1_rxclkm0 */ - <3 RK_PA7 3 &pcfg_pull_none>, - /* gmac1_txclkm0 */ - <3 RK_PA6 3 &pcfg_pull_none_drv_level_1>; - }; - - /omit-if-no-ref/ - gmac1m0_rgmii_bus: gmac1m0-rgmii-bus { - rockchip,pins = - /* gmac1_rxd2m0 */ - <3 RK_PA4 3 &pcfg_pull_none>, - /* gmac1_rxd3m0 */ - <3 RK_PA5 3 &pcfg_pull_none>, - /* gmac1_txd2m0 */ - <3 RK_PA2 3 &pcfg_pull_none_drv_level_2>, - /* gmac1_txd3m0 */ - <3 RK_PA3 3 &pcfg_pull_none_drv_level_2>; - }; - - /omit-if-no-ref/ - gmac1m1_miim: gmac1m1-miim { - rockchip,pins = - /* gmac1_mdcm1 */ - <4 RK_PB6 3 &pcfg_pull_none>, - /* gmac1_mdiom1 */ - <4 RK_PB7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m1_clkinout: gmac1m1-clkinout { - rockchip,pins = - /* gmac1_mclkinoutm1 */ - <4 RK_PC1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m1_rx_er: gmac1m1-rx-er { - rockchip,pins = - /* gmac1_rxerm1 */ - <4 RK_PB2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m1_rx_bus2: gmac1m1-rx-bus2 { - rockchip,pins = - /* gmac1_rxd0m1 */ - <4 RK_PA7 3 &pcfg_pull_none>, - /* gmac1_rxd1m1 */ - <4 RK_PB0 3 &pcfg_pull_none>, - /* gmac1_rxdvcrsm1 */ - <4 RK_PB1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m1_tx_bus2: gmac1m1-tx-bus2 { - rockchip,pins = - /* gmac1_txd0m1 */ - <4 RK_PA4 3 &pcfg_pull_none_drv_level_2>, - /* gmac1_txd1m1 */ - <4 RK_PA5 3 &pcfg_pull_none_drv_level_2>, - /* gmac1_txenm1 */ - <4 RK_PA6 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m1_rgmii_clk: gmac1m1-rgmii-clk { - rockchip,pins = - /* gmac1_rxclkm1 */ - <4 RK_PA3 3 &pcfg_pull_none>, - /* gmac1_txclkm1 */ - <4 RK_PA0 3 &pcfg_pull_none_drv_level_1>; - }; - - /omit-if-no-ref/ - gmac1m1_rgmii_bus: gmac1m1-rgmii-bus { - rockchip,pins = - /* gmac1_rxd2m1 */ - <4 RK_PA1 3 &pcfg_pull_none>, - /* gmac1_rxd3m1 */ - <4 RK_PA2 3 &pcfg_pull_none>, - /* gmac1_txd2m1 */ - <3 RK_PD6 3 &pcfg_pull_none_drv_level_2>, - /* gmac1_txd3m1 */ - <3 RK_PD7 3 &pcfg_pull_none_drv_level_2>; - }; - }; - - gpu { - /omit-if-no-ref/ - gpu_pins: gpu-pins { - rockchip,pins = - /* gpu_avs */ - <0 RK_PC0 2 &pcfg_pull_none>, - /* gpu_pwren */ - <0 RK_PA6 4 &pcfg_pull_none>; - }; - }; - - hdmitx { - /omit-if-no-ref/ - hdmitxm0_cec: hdmitxm0-cec { - rockchip,pins = - /* hdmitxm0_cec */ - <4 RK_PD1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmitxm1_cec: hdmitxm1-cec { - rockchip,pins = - /* hdmitxm1_cec */ - <0 RK_PC7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmitx_scl: hdmitx-scl { - rockchip,pins = - /* hdmitx_scl */ - <4 RK_PC7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - hdmitx_sda: hdmitx-sda { - rockchip,pins = - /* hdmitx_sda */ - <4 RK_PD0 1 &pcfg_pull_none>; - }; - }; - - i2c0 { - /omit-if-no-ref/ - i2c0_xfer: i2c0-xfer { - rockchip,pins = - /* i2c0_scl */ - <0 RK_PB1 1 &pcfg_pull_none_smt>, - /* i2c0_sda */ - <0 RK_PB2 1 &pcfg_pull_none_smt>; - }; - }; - - i2c1 { - /omit-if-no-ref/ - i2c1_xfer: i2c1-xfer { - rockchip,pins = - /* i2c1_scl */ - <0 RK_PB3 1 &pcfg_pull_none_smt>, - /* i2c1_sda */ - <0 RK_PB4 1 &pcfg_pull_none_smt>; - }; - }; - - i2c2 { - /omit-if-no-ref/ - i2c2m0_xfer: i2c2m0-xfer { - rockchip,pins = - /* i2c2_sclm0 */ - <0 RK_PB5 1 &pcfg_pull_none_smt>, - /* i2c2_sdam0 */ - <0 RK_PB6 1 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c2m1_xfer: i2c2m1-xfer { - rockchip,pins = - /* i2c2_sclm1 */ - <4 RK_PB5 1 &pcfg_pull_none_smt>, - /* i2c2_sdam1 */ - <4 RK_PB4 1 &pcfg_pull_none_smt>; - }; - }; - - i2c3 { - /omit-if-no-ref/ - i2c3m0_xfer: i2c3m0-xfer { - rockchip,pins = - /* i2c3_sclm0 */ - <1 RK_PA1 1 &pcfg_pull_none_smt>, - /* i2c3_sdam0 */ - <1 RK_PA0 1 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c3m1_xfer: i2c3m1-xfer { - rockchip,pins = - /* i2c3_sclm1 */ - <3 RK_PB5 4 &pcfg_pull_none_smt>, - /* i2c3_sdam1 */ - <3 RK_PB6 4 &pcfg_pull_none_smt>; - }; - }; - - i2c4 { - /omit-if-no-ref/ - i2c4m0_xfer: i2c4m0-xfer { - rockchip,pins = - /* i2c4_sclm0 */ - <4 RK_PB3 1 &pcfg_pull_none_smt>, - /* i2c4_sdam0 */ - <4 RK_PB2 1 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c4m1_xfer: i2c4m1-xfer { - rockchip,pins = - /* i2c4_sclm1 */ - <2 RK_PB2 2 &pcfg_pull_none_smt>, - /* i2c4_sdam1 */ - <2 RK_PB1 2 &pcfg_pull_none_smt>; - }; - }; - - i2c5 { - /omit-if-no-ref/ - i2c5m0_xfer: i2c5m0-xfer { - rockchip,pins = - /* i2c5_sclm0 */ - <3 RK_PB3 4 &pcfg_pull_none_smt>, - /* i2c5_sdam0 */ - <3 RK_PB4 4 &pcfg_pull_none_smt>; - }; - - /omit-if-no-ref/ - i2c5m1_xfer: i2c5m1-xfer { - rockchip,pins = - /* i2c5_sclm1 */ - <4 RK_PC7 2 &pcfg_pull_none_smt>, - /* i2c5_sdam1 */ - <4 RK_PD0 2 &pcfg_pull_none_smt>; - }; - }; - - i2s1 { - /omit-if-no-ref/ - i2s1m0_lrckrx: i2s1m0-lrckrx { - rockchip,pins = - /* i2s1m0_lrckrx */ - <1 RK_PA6 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_lrcktx: i2s1m0-lrcktx { - rockchip,pins = - /* i2s1m0_lrcktx */ - <1 RK_PA5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_mclk: i2s1m0-mclk { - rockchip,pins = - /* i2s1m0_mclk */ - <1 RK_PA2 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sclkrx: i2s1m0-sclkrx { - rockchip,pins = - /* i2s1m0_sclkrx */ - <1 RK_PA4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sclktx: i2s1m0-sclktx { - rockchip,pins = - /* i2s1m0_sclktx */ - <1 RK_PA3 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdi0: i2s1m0-sdi0 { - rockchip,pins = - /* i2s1m0_sdi0 */ - <1 RK_PB3 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdi1: i2s1m0-sdi1 { - rockchip,pins = - /* i2s1m0_sdi1 */ - <1 RK_PB2 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdi2: i2s1m0-sdi2 { - rockchip,pins = - /* i2s1m0_sdi2 */ - <1 RK_PB1 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdi3: i2s1m0-sdi3 { - rockchip,pins = - /* i2s1m0_sdi3 */ - <1 RK_PB0 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdo0: i2s1m0-sdo0 { - rockchip,pins = - /* i2s1m0_sdo0 */ - <1 RK_PA7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdo1: i2s1m0-sdo1 { - rockchip,pins = - /* i2s1m0_sdo1 */ - <1 RK_PB0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdo2: i2s1m0-sdo2 { - rockchip,pins = - /* i2s1m0_sdo2 */ - <1 RK_PB1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m0_sdo3: i2s1m0-sdo3 { - rockchip,pins = - /* i2s1m0_sdo3 */ - <1 RK_PB2 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_lrckrx: i2s1m1-lrckrx { - rockchip,pins = - /* i2s1m1_lrckrx */ - <4 RK_PA7 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_lrcktx: i2s1m1-lrcktx { - rockchip,pins = - /* i2s1m1_lrcktx */ - <3 RK_PD0 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_mclk: i2s1m1-mclk { - rockchip,pins = - /* i2s1m1_mclk */ - <3 RK_PC6 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sclkrx: i2s1m1-sclkrx { - rockchip,pins = - /* i2s1m1_sclkrx */ - <4 RK_PA6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sclktx: i2s1m1-sclktx { - rockchip,pins = - /* i2s1m1_sclktx */ - <3 RK_PC7 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdi0: i2s1m1-sdi0 { - rockchip,pins = - /* i2s1m1_sdi0 */ - <3 RK_PD2 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdi1: i2s1m1-sdi1 { - rockchip,pins = - /* i2s1m1_sdi1 */ - <3 RK_PD3 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdi2: i2s1m1-sdi2 { - rockchip,pins = - /* i2s1m1_sdi2 */ - <3 RK_PD4 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdi3: i2s1m1-sdi3 { - rockchip,pins = - /* i2s1m1_sdi3 */ - <3 RK_PD5 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdo0: i2s1m1-sdo0 { - rockchip,pins = - /* i2s1m1_sdo0 */ - <3 RK_PD1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdo1: i2s1m1-sdo1 { - rockchip,pins = - /* i2s1m1_sdo1 */ - <4 RK_PB0 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdo2: i2s1m1-sdo2 { - rockchip,pins = - /* i2s1m1_sdo2 */ - <4 RK_PB1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m1_sdo3: i2s1m1-sdo3 { - rockchip,pins = - /* i2s1m1_sdo3 */ - <4 RK_PB5 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_lrckrx: i2s1m2-lrckrx { - rockchip,pins = - /* i2s1m2_lrckrx */ - <3 RK_PC5 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_lrcktx: i2s1m2-lrcktx { - rockchip,pins = - /* i2s1m2_lrcktx */ - <2 RK_PD2 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_mclk: i2s1m2-mclk { - rockchip,pins = - /* i2s1m2_mclk */ - <2 RK_PD0 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sclkrx: i2s1m2-sclkrx { - rockchip,pins = - /* i2s1m2_sclkrx */ - <3 RK_PC3 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sclktx: i2s1m2-sclktx { - rockchip,pins = - /* i2s1m2_sclktx */ - <2 RK_PD1 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdi0: i2s1m2-sdi0 { - rockchip,pins = - /* i2s1m2_sdi0 */ - <2 RK_PD3 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdi1: i2s1m2-sdi1 { - rockchip,pins = - /* i2s1m2_sdi1 */ - <2 RK_PD4 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdi2: i2s1m2-sdi2 { - rockchip,pins = - /* i2s1m2_sdi2 */ - <2 RK_PD5 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdi3: i2s1m2-sdi3 { - rockchip,pins = - /* i2s1m2_sdi3 */ - <2 RK_PD6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdo0: i2s1m2-sdo0 { - rockchip,pins = - /* i2s1m2_sdo0 */ - <2 RK_PD7 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdo1: i2s1m2-sdo1 { - rockchip,pins = - /* i2s1m2_sdo1 */ - <3 RK_PA0 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdo2: i2s1m2-sdo2 { - rockchip,pins = - /* i2s1m2_sdo2 */ - <3 RK_PC1 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s1m2_sdo3: i2s1m2-sdo3 { - rockchip,pins = - /* i2s1m2_sdo3 */ - <3 RK_PC2 5 &pcfg_pull_none>; - }; - }; - - i2s2 { - /omit-if-no-ref/ - i2s2m0_lrckrx: i2s2m0-lrckrx { - rockchip,pins = - /* i2s2m0_lrckrx */ - <2 RK_PC0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_lrcktx: i2s2m0-lrcktx { - rockchip,pins = - /* i2s2m0_lrcktx */ - <2 RK_PC3 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_mclk: i2s2m0-mclk { - rockchip,pins = - /* i2s2m0_mclk */ - <2 RK_PC1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_sclkrx: i2s2m0-sclkrx { - rockchip,pins = - /* i2s2m0_sclkrx */ - <2 RK_PB7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_sclktx: i2s2m0-sclktx { - rockchip,pins = - /* i2s2m0_sclktx */ - <2 RK_PC2 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_sdi: i2s2m0-sdi { - rockchip,pins = - /* i2s2m0_sdi */ - <2 RK_PC5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m0_sdo: i2s2m0-sdo { - rockchip,pins = - /* i2s2m0_sdo */ - <2 RK_PC4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_lrckrx: i2s2m1-lrckrx { - rockchip,pins = - /* i2s2m1_lrckrx */ - <4 RK_PA5 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_lrcktx: i2s2m1-lrcktx { - rockchip,pins = - /* i2s2m1_lrcktx */ - <4 RK_PA4 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_mclk: i2s2m1-mclk { - rockchip,pins = - /* i2s2m1_mclk */ - <4 RK_PB6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_sclkrx: i2s2m1-sclkrx { - rockchip,pins = - /* i2s2m1_sclkrx */ - <4 RK_PC1 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_sclktx: i2s2m1-sclktx { - rockchip,pins = - /* i2s2m1_sclktx */ - <4 RK_PB7 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_sdi: i2s2m1-sdi { - rockchip,pins = - /* i2s2m1_sdi */ - <4 RK_PB2 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s2m1_sdo: i2s2m1-sdo { - rockchip,pins = - /* i2s2m1_sdo */ - <4 RK_PB3 5 &pcfg_pull_none>; - }; - }; - - i2s3 { - /omit-if-no-ref/ - i2s3m0_lrck: i2s3m0-lrck { - rockchip,pins = - /* i2s3m0_lrck */ - <3 RK_PA4 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m0_mclk: i2s3m0-mclk { - rockchip,pins = - /* i2s3m0_mclk */ - <3 RK_PA2 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m0_sclk: i2s3m0-sclk { - rockchip,pins = - /* i2s3m0_sclk */ - <3 RK_PA3 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m0_sdi: i2s3m0-sdi { - rockchip,pins = - /* i2s3m0_sdi */ - <3 RK_PA6 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m0_sdo: i2s3m0-sdo { - rockchip,pins = - /* i2s3m0_sdo */ - <3 RK_PA5 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m1_lrck: i2s3m1-lrck { - rockchip,pins = - /* i2s3m1_lrck */ - <4 RK_PC4 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m1_mclk: i2s3m1-mclk { - rockchip,pins = - /* i2s3m1_mclk */ - <4 RK_PC2 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m1_sclk: i2s3m1-sclk { - rockchip,pins = - /* i2s3m1_sclk */ - <4 RK_PC3 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m1_sdi: i2s3m1-sdi { - rockchip,pins = - /* i2s3m1_sdi */ - <4 RK_PC6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - i2s3m1_sdo: i2s3m1-sdo { - rockchip,pins = - /* i2s3m1_sdo */ - <4 RK_PC5 5 &pcfg_pull_none>; - }; - }; - - isp { - /omit-if-no-ref/ - isp_pins: isp-pins { - rockchip,pins = - /* isp_flashtrigin */ - <4 RK_PB4 4 &pcfg_pull_none>, - /* isp_flashtrigout */ - <4 RK_PA6 1 &pcfg_pull_none>, - /* isp_prelighttrig */ - <4 RK_PB1 1 &pcfg_pull_none>; - }; - }; - - jtag { - /omit-if-no-ref/ - jtag_pins: jtag-pins { - rockchip,pins = - /* jtag_tck */ - <1 RK_PD7 2 &pcfg_pull_none>, - /* jtag_tms */ - <2 RK_PA0 2 &pcfg_pull_none>; - }; - }; - - lcdc { - /omit-if-no-ref/ - lcdc_ctl: lcdc-ctl { - rockchip,pins = - /* lcdc_clk */ - <3 RK_PA0 1 &pcfg_pull_none>, - /* lcdc_d0 */ - <2 RK_PD0 1 &pcfg_pull_none>, - /* lcdc_d1 */ - <2 RK_PD1 1 &pcfg_pull_none>, - /* lcdc_d2 */ - <2 RK_PD2 1 &pcfg_pull_none>, - /* lcdc_d3 */ - <2 RK_PD3 1 &pcfg_pull_none>, - /* lcdc_d4 */ - <2 RK_PD4 1 &pcfg_pull_none>, - /* lcdc_d5 */ - <2 RK_PD5 1 &pcfg_pull_none>, - /* lcdc_d6 */ - <2 RK_PD6 1 &pcfg_pull_none>, - /* lcdc_d7 */ - <2 RK_PD7 1 &pcfg_pull_none>, - /* lcdc_d8 */ - <3 RK_PA1 1 &pcfg_pull_none>, - /* lcdc_d9 */ - <3 RK_PA2 1 &pcfg_pull_none>, - /* lcdc_d10 */ - <3 RK_PA3 1 &pcfg_pull_none>, - /* lcdc_d11 */ - <3 RK_PA4 1 &pcfg_pull_none>, - /* lcdc_d12 */ - <3 RK_PA5 1 &pcfg_pull_none>, - /* lcdc_d13 */ - <3 RK_PA6 1 &pcfg_pull_none>, - /* lcdc_d14 */ - <3 RK_PA7 1 &pcfg_pull_none>, - /* lcdc_d15 */ - <3 RK_PB0 1 &pcfg_pull_none>, - /* lcdc_d16 */ - <3 RK_PB1 1 &pcfg_pull_none>, - /* lcdc_d17 */ - <3 RK_PB2 1 &pcfg_pull_none>, - /* lcdc_d18 */ - <3 RK_PB3 1 &pcfg_pull_none>, - /* lcdc_d19 */ - <3 RK_PB4 1 &pcfg_pull_none>, - /* lcdc_d20 */ - <3 RK_PB5 1 &pcfg_pull_none>, - /* lcdc_d21 */ - <3 RK_PB6 1 &pcfg_pull_none>, - /* lcdc_d22 */ - <3 RK_PB7 1 &pcfg_pull_none>, - /* lcdc_d23 */ - <3 RK_PC0 1 &pcfg_pull_none>, - /* lcdc_den */ - <3 RK_PC3 1 &pcfg_pull_none>, - /* lcdc_hsync */ - <3 RK_PC1 1 &pcfg_pull_none>, - /* lcdc_vsync */ - <3 RK_PC2 1 &pcfg_pull_none>; - }; - }; - - mcu { - /omit-if-no-ref/ - mcu_pins: mcu-pins { - rockchip,pins = - /* mcu_jtagtck */ - <0 RK_PB4 4 &pcfg_pull_none>, - /* mcu_jtagtdi */ - <0 RK_PC1 4 &pcfg_pull_none>, - /* mcu_jtagtdo */ - <0 RK_PB3 4 &pcfg_pull_none>, - /* mcu_jtagtms */ - <0 RK_PC2 4 &pcfg_pull_none>, - /* mcu_jtagtrstn */ - <0 RK_PC3 4 &pcfg_pull_none>; - }; - }; - - npu { - /omit-if-no-ref/ - npu_pins: npu-pins { - rockchip,pins = - /* npu_avs */ - <0 RK_PC1 2 &pcfg_pull_none>; - }; - }; - - pcie20 { - /omit-if-no-ref/ - pcie20m0_pins: pcie20m0-pins { - rockchip,pins = - /* pcie20_clkreqnm0 */ - <0 RK_PA5 3 &pcfg_pull_none>, - /* pcie20_perstnm0 */ - <0 RK_PB6 3 &pcfg_pull_none>, - /* pcie20_wakenm0 */ - <0 RK_PB5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie20m1_pins: pcie20m1-pins { - rockchip,pins = - /* pcie20_clkreqnm1 */ - <2 RK_PD0 4 &pcfg_pull_none>, - /* pcie20_perstnm1 */ - <3 RK_PC1 4 &pcfg_pull_none>, - /* pcie20_wakenm1 */ - <2 RK_PD1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie20m2_pins: pcie20m2-pins { - rockchip,pins = - /* pcie20_clkreqnm2 */ - <1 RK_PB0 4 &pcfg_pull_none>, - /* pcie20_perstnm2 */ - <1 RK_PB2 4 &pcfg_pull_none>, - /* pcie20_wakenm2 */ - <1 RK_PB1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie20_buttonrstn: pcie20-buttonrstn { - rockchip,pins = - /* pcie20_buttonrstn */ - <0 RK_PB4 3 &pcfg_pull_none>; - }; - }; - - pcie30x1 { - /omit-if-no-ref/ - pcie30x1m0_pins: pcie30x1m0-pins { - rockchip,pins = - /* pcie30x1_clkreqnm0 */ - <0 RK_PA4 3 &pcfg_pull_none>, - /* pcie30x1_perstnm0 */ - <0 RK_PC3 3 &pcfg_pull_none>, - /* pcie30x1_wakenm0 */ - <0 RK_PC2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x1m1_pins: pcie30x1m1-pins { - rockchip,pins = - /* pcie30x1_clkreqnm1 */ - <2 RK_PD2 4 &pcfg_pull_none>, - /* pcie30x1_perstnm1 */ - <3 RK_PA1 4 &pcfg_pull_none>, - /* pcie30x1_wakenm1 */ - <2 RK_PD3 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x1m2_pins: pcie30x1m2-pins { - rockchip,pins = - /* pcie30x1_clkreqnm2 */ - <1 RK_PA5 4 &pcfg_pull_none>, - /* pcie30x1_perstnm2 */ - <1 RK_PA2 4 &pcfg_pull_none>, - /* pcie30x1_wakenm2 */ - <1 RK_PA3 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x1_buttonrstn: pcie30x1-buttonrstn { - rockchip,pins = - /* pcie30x1_buttonrstn */ - <0 RK_PB3 3 &pcfg_pull_none>; - }; - }; - - pcie30x2 { - /omit-if-no-ref/ - pcie30x2m0_pins: pcie30x2m0-pins { - rockchip,pins = - /* pcie30x2_clkreqnm0 */ - <0 RK_PA6 2 &pcfg_pull_none>, - /* pcie30x2_perstnm0 */ - <0 RK_PC6 3 &pcfg_pull_none>, - /* pcie30x2_wakenm0 */ - <0 RK_PC5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x2m1_pins: pcie30x2m1-pins { - rockchip,pins = - /* pcie30x2_clkreqnm1 */ - <2 RK_PD4 4 &pcfg_pull_none>, - /* pcie30x2_perstnm1 */ - <2 RK_PD6 4 &pcfg_pull_none>, - /* pcie30x2_wakenm1 */ - <2 RK_PD5 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x2m2_pins: pcie30x2m2-pins { - rockchip,pins = - /* pcie30x2_clkreqnm2 */ - <4 RK_PC2 4 &pcfg_pull_none>, - /* pcie30x2_perstnm2 */ - <4 RK_PC4 4 &pcfg_pull_none>, - /* pcie30x2_wakenm2 */ - <4 RK_PC3 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pcie30x2_buttonrstn: pcie30x2-buttonrstn { - rockchip,pins = - /* pcie30x2_buttonrstn */ - <0 RK_PB0 3 &pcfg_pull_none>; - }; - }; - - pdm { - /omit-if-no-ref/ - pdmm0_clk: pdmm0-clk { - rockchip,pins = - /* pdm_clk0m0 */ - <1 RK_PA6 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm0_clk1: pdmm0-clk1 { - rockchip,pins = - /* pdmm0_clk1 */ - <1 RK_PA4 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm0_sdi0: pdmm0-sdi0 { - rockchip,pins = - /* pdmm0_sdi0 */ - <1 RK_PB3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm0_sdi1: pdmm0-sdi1 { - rockchip,pins = - /* pdmm0_sdi1 */ - <1 RK_PB2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm0_sdi2: pdmm0-sdi2 { - rockchip,pins = - /* pdmm0_sdi2 */ - <1 RK_PB1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm0_sdi3: pdmm0-sdi3 { - rockchip,pins = - /* pdmm0_sdi3 */ - <1 RK_PB0 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm1_clk: pdmm1-clk { - rockchip,pins = - /* pdm_clk0m1 */ - <3 RK_PD6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm1_clk1: pdmm1-clk1 { - rockchip,pins = - /* pdmm1_clk1 */ - <4 RK_PA0 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm1_sdi0: pdmm1-sdi0 { - rockchip,pins = - /* pdmm1_sdi0 */ - <3 RK_PD7 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm1_sdi1: pdmm1-sdi1 { - rockchip,pins = - /* pdmm1_sdi1 */ - <4 RK_PA1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm1_sdi2: pdmm1-sdi2 { - rockchip,pins = - /* pdmm1_sdi2 */ - <4 RK_PA2 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm1_sdi3: pdmm1-sdi3 { - rockchip,pins = - /* pdmm1_sdi3 */ - <4 RK_PA3 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm2_clk1: pdmm2-clk1 { - rockchip,pins = - /* pdmm2_clk1 */ - <3 RK_PC4 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm2_sdi0: pdmm2-sdi0 { - rockchip,pins = - /* pdmm2_sdi0 */ - <3 RK_PB3 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm2_sdi1: pdmm2-sdi1 { - rockchip,pins = - /* pdmm2_sdi1 */ - <3 RK_PB4 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm2_sdi2: pdmm2-sdi2 { - rockchip,pins = - /* pdmm2_sdi2 */ - <3 RK_PB7 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pdmm2_sdi3: pdmm2-sdi3 { - rockchip,pins = - /* pdmm2_sdi3 */ - <3 RK_PC0 5 &pcfg_pull_none>; - }; - }; - - pmic { - /omit-if-no-ref/ - pmic_pins: pmic-pins { - rockchip,pins = - /* pmic_sleep */ - <0 RK_PA2 1 &pcfg_pull_none>; - }; - }; - - pmu { - /omit-if-no-ref/ - pmu_pins: pmu-pins { - rockchip,pins = - /* pmu_debug0 */ - <0 RK_PA5 4 &pcfg_pull_none>, - /* pmu_debug1 */ - <0 RK_PA6 3 &pcfg_pull_none>, - /* pmu_debug2 */ - <0 RK_PC4 4 &pcfg_pull_none>, - /* pmu_debug3 */ - <0 RK_PC5 4 &pcfg_pull_none>, - /* pmu_debug4 */ - <0 RK_PC6 4 &pcfg_pull_none>, - /* pmu_debug5 */ - <0 RK_PC7 4 &pcfg_pull_none>; - }; - }; - - pwm0 { - /omit-if-no-ref/ - pwm0m0_pins: pwm0m0-pins { - rockchip,pins = - /* pwm0_m0 */ - <0 RK_PB7 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm0m1_pins: pwm0m1-pins { - rockchip,pins = - /* pwm0_m1 */ - <0 RK_PC7 2 &pcfg_pull_none>; - }; - }; - - pwm1 { - /omit-if-no-ref/ - pwm1m0_pins: pwm1m0-pins { - rockchip,pins = - /* pwm1_m0 */ - <0 RK_PC0 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm1m1_pins: pwm1m1-pins { - rockchip,pins = - /* pwm1_m1 */ - <0 RK_PB5 4 &pcfg_pull_none>; - }; - }; - - pwm2 { - /omit-if-no-ref/ - pwm2m0_pins: pwm2m0-pins { - rockchip,pins = - /* pwm2_m0 */ - <0 RK_PC1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm2m1_pins: pwm2m1-pins { - rockchip,pins = - /* pwm2_m1 */ - <0 RK_PB6 4 &pcfg_pull_none>; - }; - }; - - pwm3 { - /omit-if-no-ref/ - pwm3_pins: pwm3-pins { - rockchip,pins = - /* pwm3_ir */ - <0 RK_PC2 1 &pcfg_pull_none>; - }; - }; - - pwm4 { - /omit-if-no-ref/ - pwm4_pins: pwm4-pins { - rockchip,pins = - /* pwm4 */ - <0 RK_PC3 1 &pcfg_pull_none>; - }; - }; - - pwm5 { - /omit-if-no-ref/ - pwm5_pins: pwm5-pins { - rockchip,pins = - /* pwm5 */ - <0 RK_PC4 1 &pcfg_pull_none>; - }; - }; - - pwm6 { - /omit-if-no-ref/ - pwm6_pins: pwm6-pins { - rockchip,pins = - /* pwm6 */ - <0 RK_PC5 1 &pcfg_pull_none>; - }; - }; - - pwm7 { - /omit-if-no-ref/ - pwm7_pins: pwm7-pins { - rockchip,pins = - /* pwm7_ir */ - <0 RK_PC6 1 &pcfg_pull_none>; - }; - }; - - pwm8 { - /omit-if-no-ref/ - pwm8m0_pins: pwm8m0-pins { - rockchip,pins = - /* pwm8_m0 */ - <3 RK_PB1 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm8m1_pins: pwm8m1-pins { - rockchip,pins = - /* pwm8_m1 */ - <1 RK_PD5 4 &pcfg_pull_none>; - }; - }; - - pwm9 { - /omit-if-no-ref/ - pwm9m0_pins: pwm9m0-pins { - rockchip,pins = - /* pwm9_m0 */ - <3 RK_PB2 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm9m1_pins: pwm9m1-pins { - rockchip,pins = - /* pwm9_m1 */ - <1 RK_PD6 4 &pcfg_pull_none>; - }; - }; - - pwm10 { - /omit-if-no-ref/ - pwm10m0_pins: pwm10m0-pins { - rockchip,pins = - /* pwm10_m0 */ - <3 RK_PB5 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm10m1_pins: pwm10m1-pins { - rockchip,pins = - /* pwm10_m1 */ - <2 RK_PA1 2 &pcfg_pull_none>; - }; - }; - - pwm11 { - /omit-if-no-ref/ - pwm11m0_pins: pwm11m0-pins { - rockchip,pins = - /* pwm11_irm0 */ - <3 RK_PB6 5 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm11m1_pins: pwm11m1-pins { - rockchip,pins = - /* pwm11_irm1 */ - <4 RK_PC0 3 &pcfg_pull_none>; - }; - }; - - pwm12 { - /omit-if-no-ref/ - pwm12m0_pins: pwm12m0-pins { - rockchip,pins = - /* pwm12_m0 */ - <3 RK_PB7 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm12m1_pins: pwm12m1-pins { - rockchip,pins = - /* pwm12_m1 */ - <4 RK_PC5 1 &pcfg_pull_none>; - }; - }; - - pwm13 { - /omit-if-no-ref/ - pwm13m0_pins: pwm13m0-pins { - rockchip,pins = - /* pwm13_m0 */ - <3 RK_PC0 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm13m1_pins: pwm13m1-pins { - rockchip,pins = - /* pwm13_m1 */ - <4 RK_PC6 1 &pcfg_pull_none>; - }; - }; - - pwm14 { - /omit-if-no-ref/ - pwm14m0_pins: pwm14m0-pins { - rockchip,pins = - /* pwm14_m0 */ - <3 RK_PC4 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm14m1_pins: pwm14m1-pins { - rockchip,pins = - /* pwm14_m1 */ - <4 RK_PC2 1 &pcfg_pull_none>; - }; - }; - - pwm15 { - /omit-if-no-ref/ - pwm15m0_pins: pwm15m0-pins { - rockchip,pins = - /* pwm15_irm0 */ - <3 RK_PC5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - pwm15m1_pins: pwm15m1-pins { - rockchip,pins = - /* pwm15_irm1 */ - <4 RK_PC3 1 &pcfg_pull_none>; - }; - }; - - refclk { - /omit-if-no-ref/ - refclk_pins: refclk-pins { - rockchip,pins = - /* refclk_ou */ - <0 RK_PA0 1 &pcfg_pull_none>; - }; - }; - - sata { - /omit-if-no-ref/ - sata_pins: sata-pins { - rockchip,pins = - /* sata_cpdet */ - <0 RK_PA4 2 &pcfg_pull_none>, - /* sata_cppod */ - <0 RK_PA6 1 &pcfg_pull_none>, - /* sata_mpswitch */ - <0 RK_PA5 2 &pcfg_pull_none>; - }; - }; - - sata0 { - /omit-if-no-ref/ - sata0_pins: sata0-pins { - rockchip,pins = - /* sata0_actled */ - <4 RK_PC6 3 &pcfg_pull_none>; - }; - }; - - sata1 { - /omit-if-no-ref/ - sata1_pins: sata1-pins { - rockchip,pins = - /* sata1_actled */ - <4 RK_PC5 3 &pcfg_pull_none>; - }; - }; - - sata2 { - /omit-if-no-ref/ - sata2_pins: sata2-pins { - rockchip,pins = - /* sata2_actled */ - <4 RK_PC4 3 &pcfg_pull_none>; - }; - }; - - scr { - /omit-if-no-ref/ - scr_pins: scr-pins { - rockchip,pins = - /* scr_clk */ - <1 RK_PA2 3 &pcfg_pull_none>, - /* scr_det */ - <1 RK_PA7 3 &pcfg_pull_up>, - /* scr_io */ - <1 RK_PA3 3 &pcfg_pull_up>, - /* scr_rst */ - <1 RK_PA5 3 &pcfg_pull_none>; - }; - }; - - sdmmc0 { - /omit-if-no-ref/ - sdmmc0_bus4: sdmmc0-bus4 { - rockchip,pins = - /* sdmmc0_d0 */ - <1 RK_PD5 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc0_d1 */ - <1 RK_PD6 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc0_d2 */ - <1 RK_PD7 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc0_d3 */ - <2 RK_PA0 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc0_clk: sdmmc0-clk { - rockchip,pins = - /* sdmmc0_clk */ - <2 RK_PA2 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc0_cmd: sdmmc0-cmd { - rockchip,pins = - /* sdmmc0_cmd */ - <2 RK_PA1 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc0_det: sdmmc0-det { - rockchip,pins = - /* sdmmc0_det */ - <0 RK_PA4 1 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - sdmmc0_pwren: sdmmc0-pwren { - rockchip,pins = - /* sdmmc0_pwren */ - <0 RK_PA5 1 &pcfg_pull_none>; - }; - }; - - sdmmc1 { - /omit-if-no-ref/ - sdmmc1_bus4: sdmmc1-bus4 { - rockchip,pins = - /* sdmmc1_d0 */ - <2 RK_PA3 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc1_d1 */ - <2 RK_PA4 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc1_d2 */ - <2 RK_PA5 1 &pcfg_pull_up_drv_level_2>, - /* sdmmc1_d3 */ - <2 RK_PA6 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc1_clk: sdmmc1-clk { - rockchip,pins = - /* sdmmc1_clk */ - <2 RK_PB0 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc1_cmd: sdmmc1-cmd { - rockchip,pins = - /* sdmmc1_cmd */ - <2 RK_PA7 1 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc1_det: sdmmc1-det { - rockchip,pins = - /* sdmmc1_det */ - <2 RK_PB2 1 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - sdmmc1_pwren: sdmmc1-pwren { - rockchip,pins = - /* sdmmc1_pwren */ - <2 RK_PB1 1 &pcfg_pull_none>; - }; - }; - - sdmmc2 { - /omit-if-no-ref/ - sdmmc2m0_bus4: sdmmc2m0-bus4 { - rockchip,pins = - /* sdmmc2_d0m0 */ - <3 RK_PC6 3 &pcfg_pull_up_drv_level_2>, - /* sdmmc2_d1m0 */ - <3 RK_PC7 3 &pcfg_pull_up_drv_level_2>, - /* sdmmc2_d2m0 */ - <3 RK_PD0 3 &pcfg_pull_up_drv_level_2>, - /* sdmmc2_d3m0 */ - <3 RK_PD1 3 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc2m0_clk: sdmmc2m0-clk { - rockchip,pins = - /* sdmmc2_clkm0 */ - <3 RK_PD3 3 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc2m0_cmd: sdmmc2m0-cmd { - rockchip,pins = - /* sdmmc2_cmdm0 */ - <3 RK_PD2 3 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc2m0_det: sdmmc2m0-det { - rockchip,pins = - /* sdmmc2_detm0 */ - <3 RK_PD4 3 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - sdmmc2m0_pwren: sdmmc2m0-pwren { - rockchip,pins = - /* sdmmc2m0_pwren */ - <3 RK_PD5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - sdmmc2m1_bus4: sdmmc2m1-bus4 { - rockchip,pins = - /* sdmmc2_d0m1 */ - <3 RK_PA1 5 &pcfg_pull_up_drv_level_2>, - /* sdmmc2_d1m1 */ - <3 RK_PA2 5 &pcfg_pull_up_drv_level_2>, - /* sdmmc2_d2m1 */ - <3 RK_PA3 5 &pcfg_pull_up_drv_level_2>, - /* sdmmc2_d3m1 */ - <3 RK_PA4 5 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc2m1_clk: sdmmc2m1-clk { - rockchip,pins = - /* sdmmc2_clkm1 */ - <3 RK_PA6 5 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc2m1_cmd: sdmmc2m1-cmd { - rockchip,pins = - /* sdmmc2_cmdm1 */ - <3 RK_PA5 5 &pcfg_pull_up_drv_level_2>; - }; - - /omit-if-no-ref/ - sdmmc2m1_det: sdmmc2m1-det { - rockchip,pins = - /* sdmmc2_detm1 */ - <3 RK_PA7 4 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - sdmmc2m1_pwren: sdmmc2m1-pwren { - rockchip,pins = - /* sdmmc2m1_pwren */ - <3 RK_PB0 4 &pcfg_pull_none>; - }; - }; - - spdif { - /omit-if-no-ref/ - spdifm0_tx: spdifm0-tx { - rockchip,pins = - /* spdifm0_tx */ - <1 RK_PA4 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spdifm1_tx: spdifm1-tx { - rockchip,pins = - /* spdifm1_tx */ - <3 RK_PC5 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spdifm2_tx: spdifm2-tx { - rockchip,pins = - /* spdifm2_tx */ - <4 RK_PC4 2 &pcfg_pull_none>; - }; - }; - - spi0 { - /omit-if-no-ref/ - spi0m0_pins: spi0m0-pins { - rockchip,pins = - /* spi0_clkm0 */ - <0 RK_PB5 2 &pcfg_pull_none>, - /* spi0_misom0 */ - <0 RK_PC5 2 &pcfg_pull_none>, - /* spi0_mosim0 */ - <0 RK_PB6 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi0m0_cs0: spi0m0-cs0 { - rockchip,pins = - /* spi0_cs0m0 */ - <0 RK_PC6 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi0m0_cs1: spi0m0-cs1 { - rockchip,pins = - /* spi0_cs1m0 */ - <0 RK_PC4 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi0m1_pins: spi0m1-pins { - rockchip,pins = - /* spi0_clkm1 */ - <2 RK_PD3 3 &pcfg_pull_none>, - /* spi0_misom1 */ - <2 RK_PD0 3 &pcfg_pull_none>, - /* spi0_mosim1 */ - <2 RK_PD1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi0m1_cs0: spi0m1-cs0 { - rockchip,pins = - /* spi0_cs0m1 */ - <2 RK_PD2 3 &pcfg_pull_none>; - }; - }; - - spi1 { - /omit-if-no-ref/ - spi1m0_pins: spi1m0-pins { - rockchip,pins = - /* spi1_clkm0 */ - <2 RK_PB5 3 &pcfg_pull_none>, - /* spi1_misom0 */ - <2 RK_PB6 3 &pcfg_pull_none>, - /* spi1_mosim0 */ - <2 RK_PB7 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi1m0_cs0: spi1m0-cs0 { - rockchip,pins = - /* spi1_cs0m0 */ - <2 RK_PC0 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi1m0_cs1: spi1m0-cs1 { - rockchip,pins = - /* spi1_cs1m0 */ - <2 RK_PC6 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi1m1_pins: spi1m1-pins { - rockchip,pins = - /* spi1_clkm1 */ - <3 RK_PC3 3 &pcfg_pull_none>, - /* spi1_misom1 */ - <3 RK_PC2 3 &pcfg_pull_none>, - /* spi1_mosim1 */ - <3 RK_PC1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi1m1_cs0: spi1m1-cs0 { - rockchip,pins = - /* spi1_cs0m1 */ - <3 RK_PA1 3 &pcfg_pull_none>; - }; - }; - - spi2 { - /omit-if-no-ref/ - spi2m0_pins: spi2m0-pins { - rockchip,pins = - /* spi2_clkm0 */ - <2 RK_PC1 4 &pcfg_pull_none>, - /* spi2_misom0 */ - <2 RK_PC2 4 &pcfg_pull_none>, - /* spi2_mosim0 */ - <2 RK_PC3 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi2m0_cs0: spi2m0-cs0 { - rockchip,pins = - /* spi2_cs0m0 */ - <2 RK_PC4 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi2m0_cs1: spi2m0-cs1 { - rockchip,pins = - /* spi2_cs1m0 */ - <2 RK_PC5 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi2m1_pins: spi2m1-pins { - rockchip,pins = - /* spi2_clkm1 */ - <3 RK_PA0 3 &pcfg_pull_none>, - /* spi2_misom1 */ - <2 RK_PD7 3 &pcfg_pull_none>, - /* spi2_mosim1 */ - <2 RK_PD6 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi2m1_cs0: spi2m1-cs0 { - rockchip,pins = - /* spi2_cs0m1 */ - <2 RK_PD5 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi2m1_cs1: spi2m1-cs1 { - rockchip,pins = - /* spi2_cs1m1 */ - <2 RK_PD4 3 &pcfg_pull_none>; - }; - }; - - spi3 { - /omit-if-no-ref/ - spi3m0_pins: spi3m0-pins { - rockchip,pins = - /* spi3_clkm0 */ - <4 RK_PB3 4 &pcfg_pull_none>, - /* spi3_misom0 */ - <4 RK_PB0 4 &pcfg_pull_none>, - /* spi3_mosim0 */ - <4 RK_PB2 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi3m0_cs0: spi3m0-cs0 { - rockchip,pins = - /* spi3_cs0m0 */ - <4 RK_PA6 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi3m0_cs1: spi3m0-cs1 { - rockchip,pins = - /* spi3_cs1m0 */ - <4 RK_PA7 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi3m1_pins: spi3m1-pins { - rockchip,pins = - /* spi3_clkm1 */ - <4 RK_PC2 2 &pcfg_pull_none>, - /* spi3_misom1 */ - <4 RK_PC5 2 &pcfg_pull_none>, - /* spi3_mosim1 */ - <4 RK_PC3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi3m1_cs0: spi3m1-cs0 { - rockchip,pins = - /* spi3_cs0m1 */ - <4 RK_PC6 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - spi3m1_cs1: spi3m1-cs1 { - rockchip,pins = - /* spi3_cs1m1 */ - <4 RK_PD1 2 &pcfg_pull_none>; - }; - }; - - tsadc { - /omit-if-no-ref/ - tsadcm0_shut: tsadcm0-shut { - rockchip,pins = - /* tsadcm0_shut */ - <0 RK_PA1 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - tsadcm1_shut: tsadcm1-shut { - rockchip,pins = - /* tsadcm1_shut */ - <0 RK_PA2 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - tsadc_shutorg: tsadc-shutorg { - rockchip,pins = - /* tsadc_shutorg */ - <0 RK_PA1 2 &pcfg_pull_none>; - }; - }; - - uart0 { - /omit-if-no-ref/ - uart0_xfer: uart0-xfer { - rockchip,pins = - /* uart0_rx */ - <0 RK_PC0 3 &pcfg_pull_up>, - /* uart0_tx */ - <0 RK_PC1 3 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart0_ctsn: uart0-ctsn { - rockchip,pins = - /* uart0_ctsn */ - <0 RK_PC7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart0_rtsn: uart0-rtsn { - rockchip,pins = - /* uart0_rtsn */ - <0 RK_PC4 3 &pcfg_pull_none>; - }; - }; - - uart1 { - /omit-if-no-ref/ - uart1m0_xfer: uart1m0-xfer { - rockchip,pins = - /* uart1_rxm0 */ - <2 RK_PB3 2 &pcfg_pull_up>, - /* uart1_txm0 */ - <2 RK_PB4 2 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart1m0_ctsn: uart1m0-ctsn { - rockchip,pins = - /* uart1m0_ctsn */ - <2 RK_PB6 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart1m0_rtsn: uart1m0-rtsn { - rockchip,pins = - /* uart1m0_rtsn */ - <2 RK_PB5 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart1m1_xfer: uart1m1-xfer { - rockchip,pins = - /* uart1_rxm1 */ - <3 RK_PD7 4 &pcfg_pull_up>, - /* uart1_txm1 */ - <3 RK_PD6 4 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart1m1_ctsn: uart1m1-ctsn { - rockchip,pins = - /* uart1m1_ctsn */ - <4 RK_PC1 4 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart1m1_rtsn: uart1m1-rtsn { - rockchip,pins = - /* uart1m1_rtsn */ - <4 RK_PB6 4 &pcfg_pull_none>; - }; - }; - - uart2 { - /omit-if-no-ref/ - uart2m0_xfer: uart2m0-xfer { - rockchip,pins = - /* uart2_rxm0 */ - <0 RK_PD0 1 &pcfg_pull_up>, - /* uart2_txm0 */ - <0 RK_PD1 1 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart2m1_xfer: uart2m1-xfer { - rockchip,pins = - /* uart2_rxm1 */ - <1 RK_PD6 2 &pcfg_pull_up>, - /* uart2_txm1 */ - <1 RK_PD5 2 &pcfg_pull_up>; - }; - }; - - uart3 { - /omit-if-no-ref/ - uart3m0_xfer: uart3m0-xfer { - rockchip,pins = - /* uart3_rxm0 */ - <1 RK_PA0 2 &pcfg_pull_up>, - /* uart3_txm0 */ - <1 RK_PA1 2 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart3m0_ctsn: uart3m0-ctsn { - rockchip,pins = - /* uart3m0_ctsn */ - <1 RK_PA3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart3m0_rtsn: uart3m0-rtsn { - rockchip,pins = - /* uart3m0_rtsn */ - <1 RK_PA2 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart3m1_xfer: uart3m1-xfer { - rockchip,pins = - /* uart3_rxm1 */ - <3 RK_PC0 4 &pcfg_pull_up>, - /* uart3_txm1 */ - <3 RK_PB7 4 &pcfg_pull_up>; - }; - }; - - uart4 { - /omit-if-no-ref/ - uart4m0_xfer: uart4m0-xfer { - rockchip,pins = - /* uart4_rxm0 */ - <1 RK_PA4 2 &pcfg_pull_up>, - /* uart4_txm0 */ - <1 RK_PA6 2 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart4m0_ctsn: uart4m0-ctsn { - rockchip,pins = - /* uart4m0_ctsn */ - <1 RK_PA7 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart4m0_rtsn: uart4m0-rtsn { - rockchip,pins = - /* uart4m0_rtsn */ - <1 RK_PA5 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart4m1_xfer: uart4m1-xfer { - rockchip,pins = - /* uart4_rxm1 */ - <3 RK_PB1 4 &pcfg_pull_up>, - /* uart4_txm1 */ - <3 RK_PB2 4 &pcfg_pull_up>; - }; - }; - - uart5 { - /omit-if-no-ref/ - uart5m0_xfer: uart5m0-xfer { - rockchip,pins = - /* uart5_rxm0 */ - <2 RK_PA1 3 &pcfg_pull_up>, - /* uart5_txm0 */ - <2 RK_PA2 3 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart5m0_ctsn: uart5m0-ctsn { - rockchip,pins = - /* uart5m0_ctsn */ - <1 RK_PD7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart5m0_rtsn: uart5m0-rtsn { - rockchip,pins = - /* uart5m0_rtsn */ - <2 RK_PA0 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart5m1_xfer: uart5m1-xfer { - rockchip,pins = - /* uart5_rxm1 */ - <3 RK_PC3 4 &pcfg_pull_up>, - /* uart5_txm1 */ - <3 RK_PC2 4 &pcfg_pull_up>; - }; - }; - - uart6 { - /omit-if-no-ref/ - uart6m0_xfer: uart6m0-xfer { - rockchip,pins = - /* uart6_rxm0 */ - <2 RK_PA3 3 &pcfg_pull_up>, - /* uart6_txm0 */ - <2 RK_PA4 3 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart6m0_ctsn: uart6m0-ctsn { - rockchip,pins = - /* uart6m0_ctsn */ - <2 RK_PC0 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart6m0_rtsn: uart6m0-rtsn { - rockchip,pins = - /* uart6m0_rtsn */ - <2 RK_PB7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart6m1_xfer: uart6m1-xfer { - rockchip,pins = - /* uart6_rxm1 */ - <1 RK_PD6 3 &pcfg_pull_up>, - /* uart6_txm1 */ - <1 RK_PD5 3 &pcfg_pull_up>; - }; - }; - - uart7 { - /omit-if-no-ref/ - uart7m0_xfer: uart7m0-xfer { - rockchip,pins = - /* uart7_rxm0 */ - <2 RK_PA5 3 &pcfg_pull_up>, - /* uart7_txm0 */ - <2 RK_PA6 3 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart7m0_ctsn: uart7m0-ctsn { - rockchip,pins = - /* uart7m0_ctsn */ - <2 RK_PC2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart7m0_rtsn: uart7m0-rtsn { - rockchip,pins = - /* uart7m0_rtsn */ - <2 RK_PC1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart7m1_xfer: uart7m1-xfer { - rockchip,pins = - /* uart7_rxm1 */ - <3 RK_PC5 4 &pcfg_pull_up>, - /* uart7_txm1 */ - <3 RK_PC4 4 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart7m2_xfer: uart7m2-xfer { - rockchip,pins = - /* uart7_rxm2 */ - <4 RK_PA3 4 &pcfg_pull_up>, - /* uart7_txm2 */ - <4 RK_PA2 4 &pcfg_pull_up>; - }; - }; - - uart8 { - /omit-if-no-ref/ - uart8m0_xfer: uart8m0-xfer { - rockchip,pins = - /* uart8_rxm0 */ - <2 RK_PC6 2 &pcfg_pull_up>, - /* uart8_txm0 */ - <2 RK_PC5 3 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart8m0_ctsn: uart8m0-ctsn { - rockchip,pins = - /* uart8m0_ctsn */ - <2 RK_PB2 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart8m0_rtsn: uart8m0-rtsn { - rockchip,pins = - /* uart8m0_rtsn */ - <2 RK_PB1 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart8m1_xfer: uart8m1-xfer { - rockchip,pins = - /* uart8_rxm1 */ - <3 RK_PA0 4 &pcfg_pull_up>, - /* uart8_txm1 */ - <2 RK_PD7 4 &pcfg_pull_up>; - }; - }; - - uart9 { - /omit-if-no-ref/ - uart9m0_xfer: uart9m0-xfer { - rockchip,pins = - /* uart9_rxm0 */ - <2 RK_PA7 3 &pcfg_pull_up>, - /* uart9_txm0 */ - <2 RK_PB0 3 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart9m0_ctsn: uart9m0-ctsn { - rockchip,pins = - /* uart9m0_ctsn */ - <2 RK_PC4 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart9m0_rtsn: uart9m0-rtsn { - rockchip,pins = - /* uart9m0_rtsn */ - <2 RK_PC3 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - uart9m1_xfer: uart9m1-xfer { - rockchip,pins = - /* uart9_rxm1 */ - <4 RK_PC6 4 &pcfg_pull_up>, - /* uart9_txm1 */ - <4 RK_PC5 4 &pcfg_pull_up>; - }; - - /omit-if-no-ref/ - uart9m2_xfer: uart9m2-xfer { - rockchip,pins = - /* uart9_rxm2 */ - <4 RK_PA5 4 &pcfg_pull_up>, - /* uart9_txm2 */ - <4 RK_PA4 4 &pcfg_pull_up>; - }; - }; - - vop { - /omit-if-no-ref/ - vopm0_pins: vopm0-pins { - rockchip,pins = - /* vop_pwmm0 */ - <0 RK_PC3 2 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - vopm1_pins: vopm1-pins { - rockchip,pins = - /* vop_pwmm1 */ - <3 RK_PC4 2 &pcfg_pull_none>; - }; - }; -}; - -/* - * This part is edited handly. - */ -&pinctrl { - spi0-hs { - /omit-if-no-ref/ - spi0m0_pins_hs: spi0m0-pins { - rockchip,pins = - /* spi0_clkm0 */ - <0 RK_PB5 2 &pcfg_pull_up_drv_level_1>, - /* spi0_misom0 */ - <0 RK_PC5 2 &pcfg_pull_up_drv_level_1>, - /* spi0_mosim0 */ - <0 RK_PB6 2 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m0_cs0_hs: spi0m0-cs0 { - rockchip,pins = - /* spi0_cs0m0 */ - <0 RK_PC6 2 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m0_cs1_hs: spi0m0-cs1 { - rockchip,pins = - /* spi0_cs1m0 */ - <0 RK_PC4 2 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m1_pins_hs: spi0m1-pins { - rockchip,pins = - /* spi0_clkm1 */ - <2 RK_PD3 3 &pcfg_pull_up_drv_level_1>, - /* spi0_misom1 */ - <2 RK_PD0 3 &pcfg_pull_up_drv_level_1>, - /* spi0_mosim1 */ - <2 RK_PD1 3 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi0m1_cs0_hs: spi0m1-cs0 { - rockchip,pins = - /* spi0_cs0m1 */ - <2 RK_PD2 3 &pcfg_pull_up_drv_level_1>; - }; - }; - - spi1-hs { - /omit-if-no-ref/ - spi1m0_pins_hs: spi1m0-pins { - rockchip,pins = - /* spi1_clkm0 */ - <2 RK_PB5 3 &pcfg_pull_up_drv_level_1>, - /* spi1_misom0 */ - <2 RK_PB6 3 &pcfg_pull_up_drv_level_1>, - /* spi1_mosim0 */ - <2 RK_PB7 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m0_cs0_hs: spi1m0-cs0 { - rockchip,pins = - /* spi1_cs0m0 */ - <2 RK_PC0 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m0_cs1_hs: spi1m0-cs1 { - rockchip,pins = - /* spi1_cs1m0 */ - <2 RK_PC6 3 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m1_pins_hs: spi1m1-pins { - rockchip,pins = - /* spi1_clkm1 */ - <3 RK_PC3 3 &pcfg_pull_up_drv_level_1>, - /* spi1_misom1 */ - <3 RK_PC2 3 &pcfg_pull_up_drv_level_1>, - /* spi1_mosim1 */ - <3 RK_PC1 3 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi1m1_cs0_hs: spi1m1-cs0 { - rockchip,pins = - /* spi1_cs0m1 */ - <3 RK_PA1 3 &pcfg_pull_up_drv_level_1>; - }; - }; - - spi2-hs { - /omit-if-no-ref/ - spi2m0_pins_hs: spi2m0-pins { - rockchip,pins = - /* spi2_clkm0 */ - <2 RK_PC1 4 &pcfg_pull_up_drv_level_1>, - /* spi2_misom0 */ - <2 RK_PC2 4 &pcfg_pull_up_drv_level_1>, - /* spi2_mosim0 */ - <2 RK_PC3 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m0_cs0_hs: spi2m0-cs0 { - rockchip,pins = - /* spi2_cs0m0 */ - <2 RK_PC4 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m0_cs1_hs: spi2m0-cs1 { - rockchip,pins = - /* spi2_cs1m0 */ - <2 RK_PC5 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m1_pins_hs: spi2m1-pins { - rockchip,pins = - /* spi2_clkm1 */ - <3 RK_PA0 3 &pcfg_pull_up_drv_level_1>, - /* spi2_misom1 */ - <2 RK_PD7 3 &pcfg_pull_up_drv_level_1>, - /* spi2_mosim1 */ - <2 RK_PD6 3 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m1_cs0_hs: spi2m1-cs0 { - rockchip,pins = - /* spi2_cs0m1 */ - <2 RK_PD5 3 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi2m1_cs1_hs: spi2m1-cs1 { - rockchip,pins = - /* spi2_cs1m1 */ - <2 RK_PD4 3 &pcfg_pull_up_drv_level_1>; - }; - }; - - spi3-hs { - /omit-if-no-ref/ - spi3m0_pins_hs: spi3m0-pins { - rockchip,pins = - /* spi3_clkm0 */ - <4 RK_PB3 4 &pcfg_pull_up_drv_level_1>, - /* spi3_misom0 */ - <4 RK_PB0 4 &pcfg_pull_up_drv_level_1>, - /* spi3_mosim0 */ - <4 RK_PB2 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m0_cs0_hs: spi3m0-cs0 { - rockchip,pins = - /* spi3_cs0m0 */ - <4 RK_PA6 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m0_cs1_hs: spi3m0-cs1 { - rockchip,pins = - /* spi3_cs1m0 */ - <4 RK_PA7 4 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m1_pins_hs: spi3m1-pins { - rockchip,pins = - /* spi3_clkm1 */ - <4 RK_PC2 2 &pcfg_pull_up_drv_level_1>, - /* spi3_misom1 */ - <4 RK_PC5 2 &pcfg_pull_up_drv_level_1>, - /* spi3_mosim1 */ - <4 RK_PC3 2 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m1_cs0_hs: spi3m1-cs0 { - rockchip,pins = - /* spi3_cs0m1 */ - <4 RK_PC6 2 &pcfg_pull_up_drv_level_1>; - }; - - /omit-if-no-ref/ - spi3m1_cs1_hs: spi3m1-cs1 { - rockchip,pins = - /* spi3_cs1m1 */ - <4 RK_PD1 2 &pcfg_pull_up_drv_level_1>; - }; - }; - - gmac-txd-level3 { - /omit-if-no-ref/ - gmac0_tx_bus2_level3: gmac0-tx-bus2-level3 { - rockchip,pins = - /* gmac0_txd0 */ - <2 RK_PB3 1 &pcfg_pull_none_drv_level_3>, - /* gmac0_txd1 */ - <2 RK_PB4 1 &pcfg_pull_none_drv_level_3>, - /* gmac0_txen */ - <2 RK_PB5 1 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac0_rgmii_bus_level3: gmac0-rgmii-bus-level3 { - rockchip,pins = - /* gmac0_rxd2 */ - <2 RK_PA3 2 &pcfg_pull_none>, - /* gmac0_rxd3 */ - <2 RK_PA4 2 &pcfg_pull_none>, - /* gmac0_txd2 */ - <2 RK_PA6 2 &pcfg_pull_none_drv_level_3>, - /* gmac0_txd3 */ - <2 RK_PA7 2 &pcfg_pull_none_drv_level_3>; - }; - - /omit-if-no-ref/ - gmac1m0_tx_bus2_level3: gmac1m0-tx-bus2-level3 { - rockchip,pins = - /* gmac1_txd0m0 */ - <3 RK_PB5 3 &pcfg_pull_none_drv_level_3>, - /* gmac1_txd1m0 */ - <3 RK_PB6 3 &pcfg_pull_none_drv_level_3>, - /* gmac1_txenm0 */ - <3 RK_PB7 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m0_rgmii_bus_level3: gmac1m0-rgmii-bus-level3 { - rockchip,pins = - /* gmac1_rxd2m0 */ - <3 RK_PA4 3 &pcfg_pull_none>, - /* gmac1_rxd3m0 */ - <3 RK_PA5 3 &pcfg_pull_none>, - /* gmac1_txd2m0 */ - <3 RK_PA2 3 &pcfg_pull_none_drv_level_3>, - /* gmac1_txd3m0 */ - <3 RK_PA3 3 &pcfg_pull_none_drv_level_3>; - }; - - /omit-if-no-ref/ - gmac1m1_tx_bus2_level3: gmac1m1-tx-bus2-level3 { - rockchip,pins = - /* gmac1_txd0m1 */ - <4 RK_PA4 3 &pcfg_pull_none_drv_level_3>, - /* gmac1_txd1m1 */ - <4 RK_PA5 3 &pcfg_pull_none_drv_level_3>, - /* gmac1_txenm1 */ - <4 RK_PA6 3 &pcfg_pull_none>; - }; - - /omit-if-no-ref/ - gmac1m1_rgmii_bus_level3: gmac1m1-rgmii-bus-level3 { - rockchip,pins = - /* gmac1_rxd2m1 */ - <4 RK_PA1 3 &pcfg_pull_none>, - /* gmac1_rxd3m1 */ - <4 RK_PA2 3 &pcfg_pull_none>, - /* gmac1_txd2m1 */ - <3 RK_PD6 3 &pcfg_pull_none_drv_level_3>, - /* gmac1_txd3m1 */ - <3 RK_PD7 3 &pcfg_pull_none_drv_level_3>; - }; - }; - - gmac-txc-level2 { - /omit-if-no-ref/ - gmac0_rgmii_clk_level2: gmac0-rgmii-clk-level2 { - rockchip,pins = - /* gmac0_rxclk */ - <2 RK_PA5 2 &pcfg_pull_none>, - /* gmac0_txclk */ - <2 RK_PB0 2 &pcfg_pull_none_drv_level_2>; - }; - - /omit-if-no-ref/ - gmac1m0_rgmii_clk_level2: gmac1m0-rgmii-clk-level2 { - rockchip,pins = - /* gmac1_rxclkm0 */ - <3 RK_PA7 3 &pcfg_pull_none>, - /* gmac1_txclkm0 */ - <3 RK_PA6 3 &pcfg_pull_none_drv_level_2>; - }; - - /omit-if-no-ref/ - gmac1m1_rgmii_clk_level2: gmac1m1-rgmii-clk-level2 { - rockchip,pins = - /* gmac1_rxclkm1 */ - <4 RK_PA3 3 &pcfg_pull_none>, - /* gmac1_txclkm1 */ - <4 RK_PA0 3 &pcfg_pull_none_drv_level_2>; - }; - }; -}; diff --git a/arch/arm/dts/rk3568.dtsi b/arch/arm/dts/rk3568.dtsi deleted file mode 100644 index 3c458754af..0000000000 --- a/arch/arm/dts/rk3568.dtsi +++ /dev/null @@ -1,1084 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - */ - -#include <dt-bindings/clock/rk3568-cru.h> -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/interrupt-controller/irq.h> -#include <dt-bindings/phy/phy.h> -#include <dt-bindings/pinctrl/rockchip.h> -#include <dt-bindings/soc/rockchip,boot-mode.h> -#include <dt-bindings/thermal/thermal.h> - -/ { - compatible = "rockchip,rk3568"; - - interrupt-parent = <&gic>; - #address-cells = <2>; - #size-cells = <2>; - - aliases { - ethernet0 = &gmac0; - ethernet1 = &gmac1; - gpio0 = &gpio0; - gpio1 = &gpio1; - gpio2 = &gpio2; - gpio3 = &gpio3; - gpio4 = &gpio4; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - serial3 = &uart3; - serial4 = &uart4; - serial5 = &uart5; - serial6 = &uart6; - serial7 = &uart7; - serial8 = &uart8; - serial9 = &uart9; - }; - - cpus { - #address-cells = <2>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x0>; - clocks = <&scmi_clk 0>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu1: cpu@100 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x100>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu2: cpu@200 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x200>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - }; - - cpu3: cpu@300 { - device_type = "cpu"; - compatible = "arm,cortex-a55"; - reg = <0x0 0x300>; - enable-method = "psci"; - operating-points-v2 = <&cpu0_opp_table>; - }; - }; - - cpu0_opp_table: cpu0-opp-table { - compatible = "operating-points-v2"; - opp-shared; - - opp-408000000 { - opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <900000 900000 1150000>; - clock-latency-ns = <40000>; - }; - - opp-600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <900000 900000 1150000>; - }; - - opp-816000000 { - opp-hz = /bits/ 64 <816000000>; - opp-microvolt = <900000 900000 1150000>; - opp-suspend; - }; - - opp-1104000000 { - opp-hz = /bits/ 64 <1104000000>; - opp-microvolt = <900000 900000 1150000>; - }; - - opp-1416000000 { - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <900000 900000 1150000>; - }; - - opp-1608000000 { - opp-hz = /bits/ 64 <1608000000>; - opp-microvolt = <975000 975000 1150000>; - }; - - opp-1800000000 { - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1050000 1050000 1150000>; - }; - - opp-1992000000 { - opp-hz = /bits/ 64 <1992000000>; - opp-microvolt = <1150000 1150000 1150000>; - }; - }; - - firmware { - scmi: scmi { - compatible = "arm,scmi-smc"; - arm,smc-id = <0x82000010>; - shmem = <&scmi_shmem>; - #address-cells = <1>; - #size-cells = <0>; - - scmi_clk: protocol@14 { - reg = <0x14>; - #clock-cells = <1>; - }; - }; - - }; - - pmu { - compatible = "arm,cortex-a55-pmu"; - interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - psci { - compatible = "arm,psci-1.0"; - method = "smc"; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>, - <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>, - <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>; - arm,no-tick-in-suspend; - }; - - xin24m: xin24m { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "xin24m"; - #clock-cells = <0>; - }; - - xin32k: xin32k { - compatible = "fixed-clock"; - clock-frequency = <32768>; - clock-output-names = "xin32k"; - pinctrl-0 = <&clk32k_out0>; - pinctrl-names = "default"; - #clock-cells = <0>; - }; - - sram@10f000 { - compatible = "mmio-sram"; - reg = <0x0 0x0010f000 0x0 0x100>; - - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x0 0x0010f000 0x100>; - - scmi_shmem: sram@0 { - compatible = "arm,scmi-shmem"; - reg = <0x0 0x100>; - }; - }; - - usb_host0_xhci: usb@fcc00000 { - compatible = "rockchip,rk3568-dwc3", "snps,dwc3"; - reg = <0x0 0xfcc00000 0x0 0x400000>; - interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru CLK_USB3OTG0_REF>, <&cru CLK_USB3OTG0_SUSPEND>, - <&cru ACLK_USB3OTG0>; - clock-names = "ref_clk", "suspend_clk", - "bus_clk"; - dr_mode = "otg"; - phys = <&u2phy0_otg>, <&combphy0_us PHY_TYPE_USB3>; - phy-names = "usb2-phy", "usb3-phy"; - phy_type = "utmi_wide"; - resets = <&cru SRST_USB3OTG0>; - snps,dis_u2_susphy_quirk; - status = "disabled"; - }; - - usb_host1_xhci: usb@fd000000 { - compatible = "rockchip,rk3568-dwc3", "snps,dwc3"; - reg = <0x0 0xfd000000 0x0 0x400000>; - interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru CLK_USB3OTG1_REF>, <&cru CLK_USB3OTG1_SUSPEND>, - <&cru ACLK_USB3OTG1>; - clock-names = "ref_clk", "suspend_clk", - "bus_clk"; - dr_mode = "host"; - phys = <&u2phy0_host>, <&combphy1_usq PHY_TYPE_USB3>; - phy-names = "usb2-phy", "usb3-phy"; - phy_type = "utmi_wide"; - resets = <&cru SRST_USB3OTG1>; - snps,dis_u2_susphy_quirk; - status = "disabled"; - }; - - gic: interrupt-controller@fd400000 { - compatible = "arm,gic-v3"; - reg = <0x0 0xfd400000 0 0x10000>, /* GICD */ - <0x0 0xfd460000 0 0x80000>; /* GICR */ - interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; - interrupt-controller; - #interrupt-cells = <3>; - mbi-alias = <0x0 0xfd100000>; - mbi-ranges = <296 24>; - msi-controller; - }; - - usb_host0_ehci: usb@fd800000 { - compatible = "generic-ehci"; - reg = <0x0 0xfd800000 0x0 0x40000>; - interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>, - <&cru PCLK_USB>, <&usb2phy1>; - clock-names = "usbhost", "arbiter", "pclk", "utmi"; - phys = <&u2phy1_otg>; - phy-names = "usb"; - status = "disabled"; - }; - - usb_host0_ohci: usb@fd840000 { - compatible = "generic-ohci"; - reg = <0x0 0xfd840000 0x0 0x40000>; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>, - <&cru PCLK_USB>, <&usb2phy1>; - clock-names = "usbhost", "arbiter", "pclk", "utmi"; - phys = <&u2phy1_otg>; - phy-names = "usb"; - status = "disabled"; - }; - - usb_host1_ehci: usb@fd880000 { - compatible = "generic-ehci"; - reg = <0x0 0xfd880000 0x0 0x40000>; - interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>, - <&cru PCLK_USB>, <&usb2phy1>; - clock-names = "usbhost", "arbiter", "pclk", "utmi"; - phys = <&u2phy1_host>; - phy-names = "usb"; - status = "disabled"; - }; - - usb_host1_ohci: usb@fd8c0000 { - compatible = "generic-ohci"; - reg = <0x0 0xfd8c0000 0x0 0x40000>; - interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>, - <&cru PCLK_USB>, <&usb2phy1>; - clock-names = "usbhost", "arbiter", "pclk", "utmi"; - phys = <&u2phy1_host>; - phy-names = "usb"; - status = "disabled"; - }; - - usb2phy0: usb2-phy@fe8a0000 { - compatible = "rockchip,rk3568-usb2phy"; - reg = <0x0 0xfe8a0000 0x0 0x10000>; - interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&pmucru CLK_USBPHY0_REF>; - clock-names = "phyclk"; - #clock-cells = <0>; - assigned-clocks = <&cru USB480M>; - assigned-clock-parents = <&usb2phy0>; - clock-output-names = "usb480m_phy"; - rockchip,usbgrf = <&usb2phy0_grf>; - status = "disabled"; - - u2phy0_host: host-port { - #phy-cells = <0>; - status = "disabled"; - }; - - u2phy0_otg: otg-port { - #phy-cells = <0>; - status = "disabled"; - }; - }; - - usb2phy1: usb2-phy@fe8b0000 { - compatible = "rockchip,rk3568-usb2phy"; - reg = <0x0 0xfe8b0000 0x0 0x10000>; - interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&pmucru CLK_USBPHY1_REF>; - clock-names = "phyclk"; - #clock-cells = <0>; - rockchip,usbgrf = <&usb2phy1_grf>; - status = "disabled"; - - u2phy1_host: host-port { - #phy-cells = <0>; - status = "disabled"; - }; - - u2phy1_otg: otg-port { - #phy-cells = <0>; - status = "disabled"; - }; - }; - - combphy0_us: phy@fe820000 { - compatible = "rockchip,rk3568-naneng-combphy"; - reg = <0x0 0xfe820000 0x0 0x100>; - #phy-cells = <1>; - clocks = <&pmucru CLK_PCIEPHY0_REF>, <&cru PCLK_PIPEPHY0>, - <&cru PCLK_PIPE>; - clock-names = "ref", "apb", "pipe"; - assigned-clocks = <&pmucru CLK_PCIEPHY0_REF>; - assigned-clock-rates = <24000000>; - resets = <&cru SRST_PIPEPHY0>; - rockchip,pipe-grf = <&pipegrf>; - rockchip,pipe-phy-grf = <&pipe_phy_grf0>; - status = "disabled"; - }; - - combphy1_usq: phy@fe830000 { - compatible = "rockchip,rk3568-naneng-combphy"; - reg = <0x0 0xfe830000 0x0 0x100>; - #phy-cells = <1>; - clocks = <&pmucru CLK_PCIEPHY1_REF>, <&cru PCLK_PIPEPHY1>, - <&cru PCLK_PIPE>; - clock-names = "ref", "apb", "pipe"; - assigned-clocks = <&pmucru CLK_PCIEPHY1_REF>; - assigned-clock-rates = <24000000>; - resets = <&cru SRST_PIPEPHY1>; - rockchip,pipe-grf = <&pipegrf>; - rockchip,pipe-phy-grf = <&pipe_phy_grf1>; - status = "disabled"; - }; - - pipe_phy_grf0: syscon@fdc70000 { - compatible = "rockchip,pipe-phy-grf", "syscon"; - reg = <0x0 0xfdc70000 0x0 0x1000>; - }; - - pipe_phy_grf1: syscon@fdc80000 { - compatible = "rockchip,pipe-phy-grf", "syscon"; - reg = <0x0 0xfdc80000 0x0 0x1000>; - }; - - pipe_phy_grf2: syscon@fdc90000 { - compatible = "rockchip,pipe-phy-grf", "syscon"; - reg = <0x0 0xfdc90000 0x0 0x1000>; - }; - - usb2phy0_grf: syscon@fdca0000 { - compatible = "rockchip,rk3568-usb2phy-grf", "syscon"; - reg = <0x0 0xfdca0000 0x0 0x8000>; - }; - - usb2phy1_grf: syscon@fdca8000 { - compatible = "rockchip,rk3568-usb2phy-grf", "syscon"; - reg = <0x0 0xfdca8000 0x0 0x8000>; - }; - - pipegrf: syscon@fdc50000 { - compatible = "rockchip,rk3568-pipegrf", "syscon"; - reg = <0x0 0xfdc50000 0x0 0x1000>; - }; - - pmugrf: syscon@fdc20000 { - compatible = "rockchip,rk3568-pmugrf", "syscon", "simple-mfd"; - reg = <0x0 0xfdc20000 0x0 0x10000>; - }; - - grf: syscon@fdc60000 { - compatible = "rockchip,rk3568-grf", "syscon", "simple-mfd"; - reg = <0x0 0xfdc60000 0x0 0x10000>; - }; - - pmucru: clock-controller@fdd00000 { - compatible = "rockchip,rk3568-pmucru"; - reg = <0x0 0xfdd00000 0x0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - rockchip,grf = <&grf>; - }; - - cru: clock-controller@fdd20000 { - compatible = "rockchip,rk3568-cru"; - reg = <0x0 0xfdd20000 0x0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; - rockchip,grf = <&grf>; - }; - - i2c0: i2c@fdd40000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfdd40000 0x0 0x1000>; - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&pmucru CLK_I2C0>, <&pmucru PCLK_I2C0>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - uart0: serial@fdd50000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfdd50000 0x0 0x100>; - interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&pmucru SCLK_UART0>, <&pmucru PCLK_UART0>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 0>, <&dmac0 1>; - pinctrl-0 = <&uart0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - pwm0: pwm@fdd70000 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfdd70000 0x0 0x10>; - clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm0m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm1: pwm@fdd70010 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfdd70010 0x0 0x10>; - clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm1m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm2: pwm@fdd70020 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfdd70020 0x0 0x10>; - clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm2m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm3: pwm@fdd70030 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfdd70030 0x0 0x10>; - clocks = <&pmucru CLK_PWM0>, <&pmucru PCLK_PWM0>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm3_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - sdmmc2: mmc@fe000000 { - compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xfe000000 0x0 0x4000>; - interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_SDMMC2>, <&cru CLK_SDMMC2>, - <&cru SCLK_SDMMC2_DRV>, <&cru SCLK_SDMMC2_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - resets = <&cru SRST_SDMMC2>; - reset-names = "reset"; - status = "disabled"; - }; - - gmac1: ethernet@fe010000 { - compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a"; - reg = <0x0 0xfe010000 0x0 0x10000>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "macirq", "eth_wake_irq"; - rockchip,grf = <&grf>; - clocks = <&cru SCLK_GMAC1>, <&cru SCLK_GMAC1_RX_TX>, - <&cru SCLK_GMAC1_RX_TX>, <&cru CLK_MAC1_REFOUT>, - <&cru ACLK_GMAC1>, <&cru PCLK_GMAC1>, - <&cru SCLK_GMAC1_RX_TX>, <&cru CLK_GMAC1_PTP_REF>, - <&cru PCLK_XPCS>; - clock-names = "stmmaceth", "mac_clk_rx", - "mac_clk_tx", "clk_mac_refout", - "aclk_mac", "pclk_mac", - "clk_mac_speed", "ptp_ref", - "pclk_xpcs"; - resets = <&cru SRST_A_GMAC1>; - reset-names = "stmmaceth"; - - snps,mixed-burst; - snps,tso; - - snps,axi-config = <&gmac1_stmmac_axi_setup>; - snps,mtl-rx-config = <&gmac1_mtl_rx_setup>; - snps,mtl-tx-config = <&gmac1_mtl_tx_setup>; - status = "disabled"; - - mdio1: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <0x1>; - #size-cells = <0x0>; - }; - - gmac1_stmmac_axi_setup: stmmac-axi-config { - snps,wr_osr_lmt = <4>; - snps,rd_osr_lmt = <8>; - snps,blen = <0 0 0 0 16 8 4>; - }; - - gmac1_mtl_rx_setup: rx-queues-config { - snps,rx-queues-to-use = <1>; - queue0 {}; - }; - - gmac1_mtl_tx_setup: tx-queues-config { - snps,tx-queues-to-use = <1>; - queue0 {}; - }; - }; - - gmac0: ethernet@fe2a0000 { - compatible = "rockchip,rk3568-gmac", "snps,dwmac-4.20a"; - reg = <0x0 0xfe2a0000 0x0 0x10000>; - interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "macirq", "eth_wake_irq"; - rockchip,grf = <&grf>; - clocks = <&cru SCLK_GMAC0>, <&cru SCLK_GMAC0_RX_TX>, - <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_MAC0_REFOUT>, - <&cru ACLK_GMAC0>, <&cru PCLK_GMAC0>, - <&cru SCLK_GMAC0_RX_TX>, <&cru CLK_GMAC0_PTP_REF>, - <&cru PCLK_XPCS>; - clock-names = "stmmaceth", "mac_clk_rx", - "mac_clk_tx", "clk_mac_refout", - "aclk_mac", "pclk_mac", - "clk_mac_speed", "ptp_ref", - "pclk_xpcs"; - resets = <&cru SRST_A_GMAC0>; - reset-names = "stmmaceth"; - - snps,mixed-burst; - snps,tso; - - snps,axi-config = <&gmac0_stmmac_axi_setup>; - snps,mtl-rx-config = <&gmac0_mtl_rx_setup>; - snps,mtl-tx-config = <&gmac0_mtl_tx_setup>; - status = "disabled"; - - mdio0: mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <0x1>; - #size-cells = <0x0>; - }; - - gmac0_stmmac_axi_setup: stmmac-axi-config { - snps,wr_osr_lmt = <4>; - snps,rd_osr_lmt = <8>; - snps,blen = <0 0 0 0 16 8 4>; - }; - - gmac0_mtl_rx_setup: rx-queues-config { - snps,rx-queues-to-use = <1>; - queue0 {}; - }; - - gmac0_mtl_tx_setup: tx-queues-config { - snps,tx-queues-to-use = <1>; - queue0 {}; - }; - }; - - sdmmc0: mmc@fe2b0000 { - compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xfe2b0000 0x0 0x4000>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_SDMMC0>, <&cru CLK_SDMMC0>, - <&cru SCLK_SDMMC0_DRV>, <&cru SCLK_SDMMC0_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - resets = <&cru SRST_SDMMC0>; - reset-names = "reset"; - status = "disabled"; - }; - - sdmmc1: mmc@fe2c0000 { - compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; - reg = <0x0 0xfe2c0000 0x0 0x4000>; - interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru HCLK_SDMMC1>, <&cru CLK_SDMMC1>, - <&cru SCLK_SDMMC1_DRV>, <&cru SCLK_SDMMC1_SAMPLE>; - clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; - fifo-depth = <0x100>; - max-frequency = <150000000>; - resets = <&cru SRST_SDMMC1>; - reset-names = "reset"; - status = "disabled"; - }; - - sdhci: mmc@fe310000 { - compatible = "rockchip,rk3568-dwcmshc"; - reg = <0x0 0xfe310000 0x0 0x10000>; - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; - assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>; - assigned-clock-rates = <200000000>, <24000000>; - clocks = <&cru CCLK_EMMC>, <&cru HCLK_EMMC>, - <&cru ACLK_EMMC>, <&cru BCLK_EMMC>, - <&cru TCLK_EMMC>; - clock-names = "core", "bus", "axi", "block", "timer"; - status = "disabled"; - }; - - dmac0: dmac@fe530000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xfe530000 0x0 0x4000>; - interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; - arm,pl330-periph-burst; - clocks = <&cru ACLK_BUS>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - dmac1: dmac@fe550000 { - compatible = "arm,pl330", "arm,primecell"; - reg = <0x0 0xfe550000 0x0 0x4000>; - interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; - arm,pl330-periph-burst; - clocks = <&cru ACLK_BUS>; - clock-names = "apb_pclk"; - #dma-cells = <1>; - }; - - i2c1: i2c@fe5a0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5a0000 0x0 0x1000>; - interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c1_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c2: i2c@fe5b0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5b0000 0x0 0x1000>; - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c2m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c3: i2c@fe5c0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5c0000 0x0 0x1000>; - interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c3m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c4: i2c@fe5d0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5d0000 0x0 0x1000>; - interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c4m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c5: i2c@fe5e0000 { - compatible = "rockchip,rk3568-i2c", "rockchip,rk3399-i2c"; - reg = <0x0 0xfe5e0000 0x0 0x1000>; - interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>; - clock-names = "i2c", "pclk"; - pinctrl-0 = <&i2c5m0_xfer>; - pinctrl-names = "default"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - wdt: watchdog@fe600000 { - compatible = "rockchip,rk3568-wdt", "snps,dw-wdt"; - reg = <0x0 0xfe600000 0x0 0x100>; - interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru TCLK_WDT_NS>, <&cru PCLK_WDT_NS>; - clock-names = "tclk", "pclk"; - }; - - uart1: serial@fe650000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe650000 0x0 0x100>; - interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 2>, <&dmac0 3>; - pinctrl-0 = <&uart1m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart2: serial@fe660000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe660000 0x0 0x100>; - interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 4>, <&dmac0 5>; - pinctrl-0 = <&uart2m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart3: serial@fe670000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe670000 0x0 0x100>; - interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 6>, <&dmac0 7>; - pinctrl-0 = <&uart3m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart4: serial@fe680000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe680000 0x0 0x100>; - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART4>, <&cru PCLK_UART4>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 8>, <&dmac0 9>; - pinctrl-0 = <&uart4m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart5: serial@fe690000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe690000 0x0 0x100>; - interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART5>, <&cru PCLK_UART5>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 10>, <&dmac0 11>; - pinctrl-0 = <&uart5m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart6: serial@fe6a0000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe6a0000 0x0 0x100>; - interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART6>, <&cru PCLK_UART6>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 12>, <&dmac0 13>; - pinctrl-0 = <&uart6m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart7: serial@fe6b0000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe6b0000 0x0 0x100>; - interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART7>, <&cru PCLK_UART7>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 14>, <&dmac0 15>; - pinctrl-0 = <&uart7m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart8: serial@fe6c0000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe6c0000 0x0 0x100>; - interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART8>, <&cru PCLK_UART8>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 16>, <&dmac0 17>; - pinctrl-0 = <&uart8m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - uart9: serial@fe6d0000 { - compatible = "rockchip,rk3568-uart", "snps,dw-apb-uart"; - reg = <0x0 0xfe6d0000 0x0 0x100>; - interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru SCLK_UART9>, <&cru PCLK_UART9>; - clock-names = "baudclk", "apb_pclk"; - dmas = <&dmac0 18>, <&dmac0 19>; - pinctrl-0 = <&uart9m0_xfer>; - pinctrl-names = "default"; - reg-io-width = <4>; - reg-shift = <2>; - status = "disabled"; - }; - - pwm4: pwm@fe6e0000 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6e0000 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm4_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm5: pwm@fe6e0010 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6e0010 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm5_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm6: pwm@fe6e0020 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6e0020 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm6_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm7: pwm@fe6e0030 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6e0030 0x0 0x10>; - clocks = <&cru CLK_PWM1>, <&cru PCLK_PWM1>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm7_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm8: pwm@fe6f0000 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6f0000 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm8m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm9: pwm@fe6f0010 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6f0010 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm9m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm10: pwm@fe6f0020 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6f0020 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm10m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm11: pwm@fe6f0030 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe6f0030 0x0 0x10>; - clocks = <&cru CLK_PWM2>, <&cru PCLK_PWM2>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm11m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm12: pwm@fe700000 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe700000 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm12m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm13: pwm@fe700010 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe700010 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm13m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm14: pwm@fe700020 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe700020 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm14m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm15: pwm@fe700030 { - compatible = "rockchip,rk3568-pwm", "rockchip,rk3328-pwm"; - reg = <0x0 0xfe700030 0x0 0x10>; - clocks = <&cru CLK_PWM3>, <&cru PCLK_PWM3>; - clock-names = "pwm", "pclk"; - pinctrl-0 = <&pwm15m0_pins>; - pinctrl-names = "active"; - #pwm-cells = <3>; - status = "disabled"; - }; - - saradc: saradc@fe720000 { - compatible = "rockchip,rk3568-saradc"; - reg = <0x0 0xfe720000 0x0 0x100>; - interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru CLK_SARADC>, <&cru PCLK_SARADC>; - clock-names = "saradc", "apb_pclk"; - resets = <&cru SRST_P_SARADC>; - reset-names = "saradc-apb"; - #io-channel-cells = <1>; - status = "disabled"; - }; - - pinctrl: pinctrl { - compatible = "rockchip,rk3568-pinctrl"; - rockchip,grf = <&grf>; - rockchip,pmu = <&pmugrf>; - #address-cells = <2>; - #size-cells = <2>; - ranges; - - gpio0: gpio0@fdd60000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfdd60000 0x0 0x100>; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio1@fe740000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfe740000 0x0 0x100>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio2@fe750000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfe750000 0x0 0x100>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio3@fe760000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfe760000 0x0 0x100>; - interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio4: gpio4@fe770000 { - compatible = "rockchip,gpio-bank"; - reg = <0x0 0xfe770000 0x0 0x100>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; -}; - -#include "rk3568-pinctrl.dtsi" diff --git a/arch/arm/include/asm/arch-check.h b/arch/arm/include/asm/arch-check.h new file mode 100644 index 0000000000..2cf1b624a4 --- /dev/null +++ b/arch/arm/include/asm/arch-check.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __ARM_ASM_ARCH_CHECK_H__ +#define __ARM_ASM_ARCH_CHECK_H__ + +#ifndef __LINUX_ARM_ARCH__ +#error No boards/CPUs selected in Kconfig +#endif + +#endif diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 5d70e79b57..f49bbea2b4 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile @@ -31,3 +31,4 @@ obj-$(CONFIG_BAREBOX_UPDATE_IMX_EXTERNAL_NAND) += imx-bbu-external-nand.o obj-$(CONFIG_RESET_IMX_SRC) += src.o lwl-y += cpu_init.o pbl-y += xload-spi.o xload-common.o xload-imx-nand.o xload-gpmi-nand.o +pbl-y += xload-qspi.o diff --git a/arch/arm/mach-imx/atf.c b/arch/arm/mach-imx/atf.c index 2b667cf583..92820d9392 100644 --- a/arch/arm/mach-imx/atf.c +++ b/arch/arm/mach-imx/atf.c @@ -112,6 +112,9 @@ void imx8mm_load_bl33(void *bl33) } break; + case BOOTSOURCE_SPI: + imx8mm_qspi_load_image(instance, false); + break; default: printf("Unhandled bootsource BOOTSOURCE_%d\n", src); hang(); @@ -156,6 +159,9 @@ void imx8mp_load_bl33(void *bl33) case BOOTSOURCE_SERIAL: imx8mp_bootrom_load_image(); break; + case BOOTSOURCE_SPI: + imx8mp_qspi_load_image(instance, false); + break; default: printf("Unhandled bootsource BOOTSOURCE_%d\n", src); hang(); @@ -202,6 +208,9 @@ void imx8mn_load_bl33(void *bl33) case BOOTSOURCE_SERIAL: imx8mn_bootrom_load_image(); break; + case BOOTSOURCE_SPI: + imx8mn_qspi_load_image(instance, false); + break; default: printf("Unhandled bootsource BOOTSOURCE_%d\n", src); hang(); diff --git a/arch/arm/mach-imx/boot.c b/arch/arm/mach-imx/boot.c index a6322e4850..c6134f35b6 100644 --- a/arch/arm/mach-imx/boot.c +++ b/arch/arm/mach-imx/boot.c @@ -243,6 +243,11 @@ static unsigned int imx8mp_get_bmod(uint32_t r) return FIELD_GET(IMX8MP_SRC_SBMR_BMOD, r); } +static unsigned int imx8mm_get_bcfg(uint32_t r) +{ + return FIELD_GET(BOOT_CFG2(6, 4), r); +} + static int imx53_bootsource_internal(uint32_t r) { return FIELD_GET(BOOT_CFG1(7, 4), r); @@ -323,6 +328,7 @@ void imx53_boot_save_loc(void) #define IMX6_SRC_GPR10 0x44 #define IMX6_BMOD_SERIAL 0b01 #define IMX6_BMOD_RESERVED 0b11 +#define IMX8MM_BCFG_FSPI 0b100 #define IMX8MP_BMOD_FUSES 0b0000 #define IMX8MP_BMOD_SERIAL 0b0001 #define IMX6_BMOD_FUSES 0b00 @@ -358,6 +364,11 @@ static bool imx8mp_bootsource_serial(uint32_t sbmr2) !(sbmr2 & BT_FUSE_SEL)); } +static bool imx8mm_bootsource_qspi(uint32_t sbmr1) +{ + return imx8mm_get_bcfg(sbmr1) == IMX8MM_BCFG_FSPI; +} + static bool imx6_bootsource_serial_forced(uint32_t bootmode) { if (cpu_mx6_is_mx6ul() || cpu_mx6_is_mx6ull()) @@ -535,6 +546,7 @@ static void __imx7_get_boot_source(enum bootsource *src, int *instance, break; case 4: *src = BOOTSOURCE_SPI; /* Really: qspi */ + *instance = info->boot_device_instance; break; case 5: *src = BOOTSOURCE_NOR; @@ -691,6 +703,7 @@ void imx8mm_get_boot_source(enum bootsource *src, int *instance) { unsigned long addr; void __iomem *src_base = IOMEM(MX8MM_SRC_BASE_ADDR); + uint32_t sbmr1 = readl(src_base + 0x58); uint32_t sbmr2 = readl(src_base + 0x70); if (imx6_bootsource_serial(sbmr2)) { @@ -698,6 +711,12 @@ void imx8mm_get_boot_source(enum bootsource *src, int *instance) return; } + if (imx8mm_bootsource_qspi(sbmr1)) { + *src = BOOTSOURCE_SPI; /* Really: qspi */ + *instance = 0; + return; + } + addr = IMX8M_BOOT_SW_INFO_POINTER_ADDR_A0; __imx7_get_boot_source(src, instance, addr, sbmr2); diff --git a/arch/arm/mach-imx/iim.c b/arch/arm/mach-imx/iim.c index d403fa9f86..092cf5bcd3 100644 --- a/arch/arm/mach-imx/iim.c +++ b/arch/arm/mach-imx/iim.c @@ -291,7 +291,7 @@ err_out: return ret; } -static ssize_t imx_iim_reg_write(void *ctx, unsigned int reg, unsigned int val) +static int imx_iim_reg_write(void *ctx, unsigned int reg, unsigned int val) { struct iim_bank *bank = ctx; diff --git a/arch/arm/mach-imx/imx-bbu-internal.c b/arch/arm/mach-imx/imx-bbu-internal.c index a86bd75253..8cdaab5c16 100644 --- a/arch/arm/mach-imx/imx-bbu-internal.c +++ b/arch/arm/mach-imx/imx-bbu-internal.c @@ -19,15 +19,15 @@ #include <environment.h> #include <mach/imx/bbu.h> #include <mach/imx/generic.h> +#include <mach/imx/imx-header.h> #include <libfile.h> -#define IMX_INTERNAL_FLAG_ERASE BIT(30) - struct imx_internal_bbu_handler { struct bbu_handler handler; int (*write_device)(struct imx_internal_bbu_handler *, struct bbu_data *); unsigned long flash_header_offset; + unsigned long filetype_offset; size_t device_size; enum filetype expected_type; }; @@ -35,7 +35,7 @@ struct imx_internal_bbu_handler { static bool imx_bbu_erase_required(struct imx_internal_bbu_handler *imx_handler) { - return imx_handler->handler.flags & IMX_INTERNAL_FLAG_ERASE; + return imx_handler->handler.flags & IMX_BBU_FLAG_ERASE; } static int imx_bbu_protect(int fd, struct imx_internal_bbu_handler *imx_handler, @@ -163,8 +163,8 @@ static int imx_bbu_check_prereq(struct imx_internal_bbu_handler *imx_handler, if (expected_type == filetype_unknown) break; - blob = data->image + imx_handler->flash_header_offset; - len = data->len - imx_handler->flash_header_offset; + blob = data->image + imx_handler->filetype_offset; + len = data->len - imx_handler->filetype_offset; type = file_detect_type(blob, len); if (type != expected_type) { @@ -472,6 +472,7 @@ imx_bbu_internal_mmc_register_handler(const char *name, const char *devicefile, imx_handler = __init_handler(name, devicefile, flags | IMX_BBU_FLAG_KEEP_HEAD); imx_handler->flash_header_offset = imx_bbu_flash_header_offset_mmc(); + imx_handler->filetype_offset = imx_handler->flash_header_offset; return __register_handler(imx_handler); } @@ -484,8 +485,9 @@ imx_bbu_internal_spi_i2c_register_handler(const char *name, struct imx_internal_bbu_handler *imx_handler; imx_handler = __init_handler(name, devicefile, flags | - IMX_INTERNAL_FLAG_ERASE); + IMX_BBU_FLAG_ERASE); imx_handler->flash_header_offset = imx_bbu_flash_header_offset_mmc(); + imx_handler->filetype_offset = imx_handler->flash_header_offset; return __register_handler(imx_handler); } @@ -531,6 +533,7 @@ int imx53_bbu_internal_nand_register_handler(const char *name, imx_handler = __init_handler(name, "/dev/nand0", flags); imx_handler->flash_header_offset = imx_bbu_flash_header_offset_mmc(); + imx_handler->filetype_offset = imx_handler->flash_header_offset; imx_handler->device_size = partition_size; imx_handler->write_device = imx_bbu_internal_v2_write_nand_dbbt; @@ -582,6 +585,7 @@ static int imx_bbu_internal_mmcboot_register_handler(const char *name, imx_handler = __init_handler(name, devicefile, flags); imx_handler->flash_header_offset = flash_header_offset; + imx_handler->filetype_offset = flash_header_offset; imx_handler->handler.handler = imx_bbu_internal_mmcboot_update; @@ -646,9 +650,40 @@ int imx_bbu_external_nor_register_handler(const char *name, struct imx_internal_bbu_handler *imx_handler; imx_handler = __init_handler(name, devicefile, flags | - IMX_INTERNAL_FLAG_ERASE); + IMX_BBU_FLAG_ERASE); imx_handler->expected_type = filetype_unknown; return __register_handler(imx_handler); } + +static unsigned long imx_bbu_filetype_offset_flexspi(void) +{ + unsigned int sd_flash_header_gap = SZ_32K; + + if (cpu_is_mx8mm()) + return sd_flash_header_gap; + + return sd_flash_header_gap + SZ_1K; +} + +static int +imx_bbu_internal_flexspi_nor_register_handler(const char *name, + const char *devicefile, + unsigned long flags) +{ + struct imx_internal_bbu_handler *imx_handler; + + flags |= IMX_BBU_FLAG_ERASE | IMX_BBU_FLAG_PARTITION_STARTS_AT_HEADER; + imx_handler = __init_handler(name, devicefile, flags); + imx_handler->flash_header_offset = SZ_32K; + imx_handler->expected_type = filetype_nxp_fspi_image; + imx_handler->filetype_offset = imx_bbu_filetype_offset_flexspi(); + + return __register_handler(imx_handler); +} + +int imx8m_bbu_internal_flexspi_nor_register_handler(const char *name, + const char *devicefile, + unsigned long flags) + __alias(imx_bbu_internal_flexspi_nor_register_handler); diff --git a/arch/arm/mach-imx/xload-common.c b/arch/arm/mach-imx/xload-common.c index 5a437b185d..0d3e6be1b1 100644 --- a/arch/arm/mach-imx/xload-common.c +++ b/arch/arm/mach-imx/xload-common.c @@ -1,11 +1,13 @@ // SPDX-License-Identifier: GPL-2.0-only #include <common.h> +#include <asm/cache.h> #include <asm/sections.h> #include <linux/sizes.h> #include <mach/imx/xload.h> #include <mach/imx/esdctl.h> #include <mach/imx/imx8m-regs.h> +#include <mach/imx/imx-header.h> #include <asm/barebox-arm.h> int imx_image_size(void) @@ -26,3 +28,121 @@ struct imx_scratch_space *__imx8m_scratch_space(int ddr_buswidth) return (void *)__arm_mem_scratch(endmem); } + +#define HDR_SIZE 512 + +static int +imx_search_header(struct imx_flash_header_v2 **header_pointer, + void *buffer, u32 *offset, u32 ivt_offset, + int (*read)(void *dest, size_t len, void *priv), + void *priv) +{ + int ret; + int i, header_count = 1; + void *buf = buffer; + struct imx_flash_header_v2 *hdr; + + for (i = 0; i < header_count; i++) { + ret = read(buf, *offset + ivt_offset + HDR_SIZE, priv); + if (ret) + return ret; + + hdr = buf + *offset + ivt_offset; + + if (!is_imx_flash_header_v2(hdr)) { + pr_debug("No IVT header! " + "Found tag: 0x%02x length: 0x%04x " + "version: %02x\n", + hdr->header.tag, hdr->header.length, + hdr->header.version); + return -EINVAL; + } + + if (IS_ENABLED(CONFIG_ARCH_IMX8MQ) && + hdr->boot_data.plugin & PLUGIN_HDMI_IMAGE) { + /* + * In images that include signed HDMI + * firmware, first v2 header would be + * dedicated to that and would not contain any + * useful for us information. In order for us + * to pull the rest of the bootloader image + * in, we need to re-read header from SD/MMC, + * this time skipping anything HDMI firmware + * related. + */ + *offset += hdr->boot_data.size + hdr->header.length; + header_count++; + } + } + *header_pointer = hdr; + return 0; +} + +int imx_load_image(ptrdiff_t address, ptrdiff_t entry, u32 offset, + u32 ivt_offset, bool start, unsigned int alignment, + int (*read)(void *dest, size_t len, void *priv), + void *priv) +{ + + void *buf = (void *)address; + struct imx_flash_header_v2 *hdr = NULL; + int ret, len; + void __noreturn (*bb)(void); + unsigned int ofs; + + len = imx_image_size(); + if (alignment) + len = ALIGN(len, alignment); + + ret = imx_search_header(&hdr, buf, &offset, ivt_offset, read, priv); + if (ret) + return ret; + + pr_debug("Check ok, loading image\n"); + + ofs = offset + hdr->entry - hdr->boot_data.start; + + if (entry != address) { + /* + * Passing entry different from address is interpreted + * as a request to place the image such that its entry + * point would be exactly at 'entry', that is: + * + * buf + ofs = entry + * + * solving the above for 'buf' gives us the + * adjustment that needs to be made: + * + * buf = entry - ofs + * + */ + if (WARN_ON(entry - ofs < address)) { + /* + * We want to make sure we won't try to place + * the start of the image before the beginning + * of the memory buffer we were given in + * address. + */ + return -EINVAL; + } + + buf = (void *)(entry - ofs); + } + + ret = read(buf, ofs + len, priv); + if (ret) { + pr_err("Loading image failed with %d\n", ret); + return ret; + } + + pr_debug("Image loaded successfully\n"); + + if (!start) + return 0; + + bb = buf + ofs; + + sync_caches_for_execution(); + + bb(); +} diff --git a/arch/arm/mach-imx/xload-qspi.c b/arch/arm/mach-imx/xload-qspi.c new file mode 100644 index 0000000000..6bf5bba5e6 --- /dev/null +++ b/arch/arm/mach-imx/xload-qspi.c @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include <common.h> +#include <linux/sizes.h> +#include <mach/imx/atf.h> +#include <mach/imx/imx8m-regs.h> +#include <mach/imx/xload.h> + +#define IMX8M_QSPI_MMAP 0x8000000 + +/* Make use of AHB reads */ +static +int imx8m_qspi_read(void *dest, size_t len, void *priv) +{ + void __iomem *qspi_ahb = priv; + + memcpy(dest, qspi_ahb, len); + + return 0; +} + +/** + * imx8mm_qspi_start_image - Load and optionally start an image from the + * FlexSPI controller. + * @instance: The FlexSPI controller instance + * @start: Whether to directly start the loaded image + * + * This uses imx8m_qspi_load_image() to load an image from QSPI. It is assumed + * that the image is the currently running barebox image (This information + * is used to calculate the length of the image). + * The image is started afterwards. + * + * Return: If successful, this function does not return (if directly started) + * or 0. A negative error code is returned when this function fails. + */ +static +int imx8m_qspi_load_image(int instance, bool start, off_t offset, off_t ivt_offset) +{ + void __iomem *qspi_ahb = IOMEM(IMX8M_QSPI_MMAP); + + return imx_load_image(MX8M_DDR_CSD1_BASE_ADDR, MX8M_ATF_BL33_BASE_ADDR, + offset, ivt_offset, start, 0, + imx8m_qspi_read, qspi_ahb); +} + +int imx8mm_qspi_load_image(int instance, bool start) +{ + return imx8m_qspi_load_image(instance, start, 0, SZ_4K); +} + +int imx8mn_qspi_load_image(int instance, bool start) +{ + return imx8m_qspi_load_image(instance, start, SZ_4K, 0); +} + +int imx8mp_qspi_load_image(int instance, bool start) + __alias(imx8mn_qspi_load_image); diff --git a/arch/arm/mach-layerscape/lowlevel-ls102xa.c b/arch/arm/mach-layerscape/lowlevel-ls102xa.c index 7f4fcdf55c..259d8866d5 100644 --- a/arch/arm/mach-layerscape/lowlevel-ls102xa.c +++ b/arch/arm/mach-layerscape/lowlevel-ls102xa.c @@ -6,6 +6,7 @@ #include <common.h> #include <io.h> #include <clock.h> +#include <asm/barebox-arm-head.h> #include <asm/syscounter.h> #include <asm/system.h> #include <mach/layerscape/errata.h> @@ -311,6 +312,9 @@ void ls102xa_init_lowlevel(void) uint32_t state, major, ctrl, freq; uint64_t val; + cortex_a7_lowlevel_init(); + arm_cpu_lowlevel_init(); + init_csu(); writel(SYS_COUNTER_CTRL_ENABLE, LSCH2_SYS_COUNTER_ADDR); diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 1371f17e7c..71ca82fe8d 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -22,6 +22,9 @@ toolchain-need-zicsr-zifencei := $(call cc-option-yn, -march=$(riscv-march-y)_zi riscv-march-$(toolchain-need-zicsr-zifencei) := $(riscv-march-y)_zicsr_zifencei KBUILD_CPPFLAGS += -march=$(riscv-march-y) +KBUILD_CFLAGS += -mno-save-restore +KBUILD_CFLAGS += -fno-asynchronous-unwind-tables -fno-unwind-tables +KBUILD_CFLAGS += $(call cc-option,-mstrict-align) KBUILD_CPPFLAGS += -Wstrict-prototypes -mcmodel=medany -fpic riscv-ldflags-y += -pie -static diff --git a/arch/riscv/boards/riscvemu/Makefile b/arch/riscv/boards/riscvemu/Makefile index 56949c2357..ec7e89479e 100644 --- a/arch/riscv/boards/riscvemu/Makefile +++ b/arch/riscv/boards/riscvemu/Makefile @@ -3,3 +3,6 @@ obj-y += board.o obj-y += overlay-of-sram.dtb.o bbenv-$(CONFIG_CMD_TUTORIAL) += defaultenv-riscvemu + +clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.z +clean-files += *.dtbo *.dtbo.S .*.dtso diff --git a/arch/riscv/boot/board-dt-2nd.c b/arch/riscv/boot/board-dt-2nd.c index 8b78e1b11d..f1479d8346 100644 --- a/arch/riscv/boot/board-dt-2nd.c +++ b/arch/riscv/boot/board-dt-2nd.c @@ -50,6 +50,12 @@ static void noinline __noreturn start_dt_2nd_nonnaked(unsigned long hartid, if (!fdt) hang(); + /* + * We need to call this here, as a multiplatform build + * depends on querying mode for riscv_vendor_id() + */ + riscv_set_flags(RISCV_S_MODE); + relocate_to_current_adr(); setup_c(); diff --git a/arch/riscv/configs/rv64i_defconfig b/arch/riscv/configs/rv64i_defconfig index 2c5bfd2df1..53c367c5e4 100644 --- a/arch/riscv/configs/rv64i_defconfig +++ b/arch/riscv/configs/rv64i_defconfig @@ -97,7 +97,6 @@ CONFIG_NET_FASTBOOT=y CONFIG_OF_BAREBOX_DRIVERS=y CONFIG_OF_BAREBOX_ENV_IN_FS=y CONFIG_DRIVER_SERIAL_NS16550=y -CONFIG_SERIAL_SBI=y CONFIG_VIRTIO_CONSOLE=y CONFIG_SERIAL_SIFIVE=y CONFIG_DRIVER_NET_MACB=y diff --git a/arch/riscv/dts/hifive-unleashed-a00.dts b/arch/riscv/dts/hifive-unleashed-a00.dts index 65694bfd24..3b82c16ff0 100644 --- a/arch/riscv/dts/hifive-unleashed-a00.dts +++ b/arch/riscv/dts/hifive-unleashed-a00.dts @@ -1,3 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0 OR X11 */ #include <riscv/sifive/hifive-unleashed-a00.dts> + +/* probing on QEMU v5.2.0 triggers load access fault @0x10040014 */ +&qspi0 { status = "disabled"; }; +&qspi2 { status = "disabled"; }; diff --git a/arch/riscv/dts/hifive-unmatched-a00.dts b/arch/riscv/dts/hifive-unmatched-a00.dts index b8793e9105..24a4c798a9 100644 --- a/arch/riscv/dts/hifive-unmatched-a00.dts +++ b/arch/riscv/dts/hifive-unmatched-a00.dts @@ -1,3 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0 OR X11 */ #include <riscv/sifive/hifive-unmatched-a00.dts> + +/* probing on QEMU v5.2.0 triggers load access fault @0x10040014 */ +&qspi0 { status = "disabled"; }; +&qspi1 { status = "disabled"; }; +&spi0 { status = "disabled"; }; diff --git a/commands/Kconfig b/commands/Kconfig index ec15f4e543..76dfca2dfd 100644 --- a/commands/Kconfig +++ b/commands/Kconfig @@ -1383,7 +1383,7 @@ config CMD_EDIT depends on CONSOLE_FULL || CONSOLE_SIMPLE prompt "edit" help - A small fill-screen editor. + A small full-screen editor. Usage: edit FILE @@ -1950,12 +1950,14 @@ config CMD_NAND help NAND flash handling - Usage: nand [-adb] NANDDEV + Usage: nand [-adbgi] NANDDEV Options: -a register a bad block aware device ontop of a normal NAND device -d deregister a bad block aware device -b OFFS mark block at OFFSet as bad + -g OFFS mark block at OFFSet as good + -i info. Show information about bad blocks config CMD_NANDTEST tristate diff --git a/commands/nand.c b/commands/nand.c index 67e43eba30..d07444aee0 100644 --- a/commands/nand.c +++ b/commands/nand.c @@ -165,7 +165,7 @@ BAREBOX_CMD_HELP_END BAREBOX_CMD_START(nand) .cmd = do_nand, BAREBOX_CMD_DESC("NAND flash handling") - BAREBOX_CMD_OPTS("[-adb] NANDDEV") + BAREBOX_CMD_OPTS("[-adbgi] NANDDEV") BAREBOX_CMD_GROUP(CMD_GRP_HWMANIP) BAREBOX_CMD_HELP(cmd_nand_help) BAREBOX_CMD_END diff --git a/commands/of_overlay.c b/commands/of_overlay.c index 37d29b88e5..b80f371c5c 100644 --- a/commands/of_overlay.c +++ b/commands/of_overlay.c @@ -10,6 +10,7 @@ #include <getopt.h> #include <libfile.h> #include <of.h> +#include <linux/clk.h> static int do_of_overlay(int argc, char *argv[]) { @@ -49,8 +50,11 @@ static int do_of_overlay(int argc, char *argv[]) if (live_tree) { ret = of_overlay_apply_tree(of_get_root_node(), overlay); - if (!ret) - ret = of_probe(); + if (ret) + goto err; + + of_clk_init(); + of_probe(); } else { ret = of_register_overlay(overlay); } diff --git a/common/Kconfig b/common/Kconfig index d951947463..ac3df75acb 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -1342,6 +1342,7 @@ config DEBUG_IMX53_UART config DEBUG_IMX6Q_UART bool "i.MX6Q Debug UART" depends on ARCH_IMX6 + select DEBUG_IMX_UART help Say Y here if you want kernel low-level debugging support on i.MX6Q. diff --git a/common/bbu.c b/common/bbu.c index 3ec17216cb..ed41c92f38 100644 --- a/common/bbu.c +++ b/common/bbu.c @@ -154,36 +154,47 @@ struct bbu_handler *bbu_find_handler_by_device(const char *devicepath) return NULL; } -static int bbu_check_of_compat(struct bbu_data *data) +static int bbu_check_of_compat(struct bbu_data *data, unsigned short of_compat_nr) { + const struct imd_header *imd = data->imd_data; + const struct imd_header *of_compat; struct device_node *root_node; const char *machine, *str; int ret; - const struct imd_header *of_compat; if (!IS_ENABLED(CONFIG_OFDEVICE) || !IS_ENABLED(CONFIG_IMD)) return 0; - of_compat = imd_find_type(data->imd_data, IMD_TYPE_OF_COMPATIBLE); - if (!of_compat) - return 0; - root_node = of_get_root_node(); if (!root_node) return 0; - str = imd_string_data(of_compat, 0); - - if (of_machine_is_compatible(str)) { - pr_info("Devicetree compatible \"%s\" matches current machine\n", str); + if (!of_compat_nr) return 0; - } ret = of_property_read_string(root_node, "compatible", &machine); if (ret) return 0; - if (!bbu_force(data, "machine is incompatible with \"%s\", have \"%s\"\n", str, machine)) + for (; of_compat_nr; of_compat_nr--) { + of_compat = imd_find_type(imd, IMD_TYPE_OF_COMPATIBLE); + if (!of_compat) + return 0; + + str = imd_string_data(of_compat, 0); + + if (of_machine_is_compatible(str)) { + pr_info("Devicetree compatible \"%s\" matches current machine\n", str); + return 0; + } + + pr_debug("machine is incompatible with \"%s\", have \"%s\"\n", + str, machine); + + imd = of_compat; + } + + if (!bbu_force(data, "incompatible machine \"%s\"\n", machine)) return -EINVAL; return 0; @@ -191,6 +202,7 @@ static int bbu_check_of_compat(struct bbu_data *data) static int bbu_check_metadata(struct bbu_data *data) { + unsigned short imd_of_compat_nr = 0; const struct imd_header *imd; int ret; char *str; @@ -211,6 +223,9 @@ static int bbu_check_metadata(struct bbu_data *data) imd_for_each(data->imd_data, imd) { uint32_t type = imd_read_type(imd); + if (imd_read_type(imd) == IMD_TYPE_OF_COMPATIBLE) + imd_of_compat_nr++; + if (!imd_is_string(type)) continue; @@ -220,7 +235,7 @@ static int bbu_check_metadata(struct bbu_data *data) free(str); } - ret = bbu_check_of_compat(data); + ret = bbu_check_of_compat(data, imd_of_compat_nr); if (ret) return ret; diff --git a/common/boards/qemu-virt/Makefile b/common/boards/qemu-virt/Makefile index 00bfdfbda6..8cacfafee7 100644 --- a/common/boards/qemu-virt/Makefile +++ b/common/boards/qemu-virt/Makefile @@ -1,7 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-only obj-y += board.o -obj-y += overlay-of-flash.dtb.o fitimage-pubkey.dtb.o +obj-y += overlay-of-flash.dtb.o ifeq ($(CONFIG_RISCV),y) DTC_CPP_FLAGS_overlay-of-flash.dtb := -DRISCV_VIRT=1 endif + +clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.z +clean-files += *.dtbo *.dtbo.S .*.dtso diff --git a/common/boards/qemu-virt/board.c b/common/boards/qemu-virt/board.c index 2669e9de5a..d0f4412cde 100644 --- a/common/boards/qemu-virt/board.c +++ b/common/boards/qemu-virt/board.c @@ -35,11 +35,10 @@ static inline void arm_virt_init(void) {} #endif extern char __dtb_overlay_of_flash_start[]; -extern char __dtb_fitimage_pubkey_start[]; static int virt_probe(struct device *dev) { - struct device_node *overlay, *pubkey; + struct device_node *overlay; void (*init)(void); init = device_get_match_data(dev); @@ -48,10 +47,6 @@ static int virt_probe(struct device *dev) overlay = of_unflatten_dtb(__dtb_overlay_of_flash_start, INT_MAX); of_overlay_apply_tree(dev->of_node, overlay); - - pubkey = of_unflatten_dtb(__dtb_fitimage_pubkey_start, INT_MAX); - of_merge_nodes(dev->of_node, pubkey); - /* of_probe() will happen later at of_populate_initcall */ return 0; @@ -70,14 +65,4 @@ static struct driver virt_board_driver = { .of_compatible = virt_of_match, }; -static int virt_board_driver_init(void) -{ - int ret; - - ret = platform_driver_register(&virt_board_driver); - if (ret) - return ret; - - return of_devices_ensure_probed_by_dev_id(virt_of_match); -} -postcore_initcall(virt_board_driver_init); +postcore_platform_driver(virt_board_driver); diff --git a/common/boards/qemu-virt/fitimage-pubkey.dts b/common/boards/qemu-virt/fitimage-pubkey.dts deleted file mode 100644 index 497799fa4b..0000000000 --- a/common/boards/qemu-virt/fitimage-pubkey.dts +++ /dev/null @@ -1,7 +0,0 @@ -/dts-v1/; - -#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY -#include CONFIG_BOOTM_FITIMAGE_PUBKEY -#endif - -/{ }; diff --git a/common/filetype.c b/common/filetype.c index 68ea45861d..820bc89ea6 100644 --- a/common/filetype.c +++ b/common/filetype.c @@ -69,6 +69,7 @@ static const struct filetype_str filetype_str[] = { [filetype_imx_image_v2] = { "i.MX image (v2)", "imx-image-v2" }, [filetype_layerscape_image] = { "Layerscape image", "layerscape-PBL" }, [filetype_layerscape_qspi_image] = { "Layerscape QSPI image", "layerscape-qspi-PBL" }, + [filetype_nxp_fspi_image] = { "NXP FlexSPI image", "nxp-fspi-image" }, [filetype_ubootvar] = { "U-Boot environmemnt variable data", "ubootvar" }, [filetype_stm32_image_fsbl_v1] = { "STM32MP FSBL image (v1)", "stm32-fsbl-v1" }, @@ -409,6 +410,10 @@ enum filetype file_detect_type(const void *_buf, size_t bufsize) if (is_imx_flash_header_v2(_buf)) return filetype_imx_image_v2; + if (buf[0] == cpu_to_be32(FCFB_HEAD_TAG) && + buf[1] == cpu_to_le32(FCFB_VERSION)) + return filetype_nxp_fspi_image; + if (buf[8] == 0xAA995566 && buf[9] == 0x584C4E58) return filetype_zynq_image; diff --git a/common/hush.c b/common/hush.c index 5138a1a45a..608c0e4937 100644 --- a/common/hush.c +++ b/common/hush.c @@ -1837,7 +1837,7 @@ static char **make_list_in(char **inp, char *name) p3 = insert_var_value(inp[i]); p1 = p3; while (*p1) { - if ((*p1 == ' ')) { + if (*p1 == ' ') { p1++; continue; } diff --git a/drivers/aiodev/am335x_adc.c b/drivers/aiodev/am335x_adc.c index ceb7531dc0..491866ca36 100644 --- a/drivers/aiodev/am335x_adc.c +++ b/drivers/aiodev/am335x_adc.c @@ -19,7 +19,7 @@ #include <io.h> #include <linux/log2.h> #include <aiodev.h> -#include <mach/am33xx-clock.h> +#include <mach/omap/am33xx-clock.h> #include "ti_am335x_tscadc.h" struct am335x_adc_data { diff --git a/drivers/aiodev/imx_thermal.c b/drivers/aiodev/imx_thermal.c index 4d24f6cae3..0b1670708f 100644 --- a/drivers/aiodev/imx_thermal.c +++ b/drivers/aiodev/imx_thermal.c @@ -22,7 +22,7 @@ #include <linux/math64.h> #include <linux/log2.h> #include <linux/clk.h> -#include <mach/imx6-anadig.h> +#include <mach/imx/imx6-anadig.h> #include <io.h> #include <aiodev.h> #include <mfd/syscon.h> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 0faea6488e..076e77c859 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -38,6 +38,11 @@ config COMMON_CLK_SCMI This driver uses SCMI Message Protocol to interact with the firmware providing all the clock controls. +config COMMON_CLK_GPIO + bool + default y + depends on COMMON_CLK_OF_PROVIDER + source "drivers/clk/sifive/Kconfig" endif diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index baf452de98..c865e4c274 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -2,7 +2,7 @@ obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed.o clk-divider.o clk-fixed-factor.o \ clk-mux.o clk-gate.o clk-composite.o \ clk-fractional-divider.o clk-conf.o \ - clk-gate-shared.o clk-gpio.o \ + clk-gate-shared.o \ clk-bulk.o obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o @@ -28,3 +28,4 @@ obj-$(CONFIG_COMMON_CLK_STM32F) += clk-stm32f4.o obj-$(CONFIG_MACH_RPI_COMMON) += clk-rpi.o obj-y += bcm/ obj-$(CONFIG_COMMON_CLK_SCMI) += clk-scmi.o +obj-$(CONFIG_COMMON_CLK_GPIO) += clk-gpio.o diff --git a/drivers/clk/clk-gpio.c b/drivers/clk/clk-gpio.c index 6ac2e820fa..8cc0c5fc97 100644 --- a/drivers/clk/clk-gpio.c +++ b/drivers/clk/clk-gpio.c @@ -50,8 +50,9 @@ static struct clk_ops clk_gpio_ops = { .is_enabled = clk_gpio_is_enabled, }; -static int of_gpio_clk_setup(struct device_node *node) +static int of_gpio_clk_probe(struct device *dev) { + struct device_node *node = dev->device_node; struct clk_gpio *clk_gpio; enum of_gpio_flags of_flags; unsigned long flags; @@ -105,16 +106,15 @@ no_parent: return ret; } -/* Can't use OF_CLK_DECLARE due to need to run after GPIOcontrollers have - * registrered */ - static const struct of_device_id clk_gpio_device_id[] = { - { .compatible = "gpio-gate-clock", .data = of_gpio_clk_setup, }, + { .compatible = "gpio-gate-clock", }, {} }; -static int clk_gpio_init(void) -{ - return of_clk_init(NULL, clk_gpio_device_id); -} -coredevice_initcall(clk_gpio_init); +static struct driver gpio_gate_clock_driver = { + .probe = of_gpio_clk_probe, + .name = "gpio-gate-clock", + .of_compatible = DRV_OF_COMPAT(clk_gpio_device_id), +}; + +core_platform_driver(gpio_gate_clock_driver); diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 30fe43032b..7406dba260 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -847,18 +847,30 @@ static int parent_ready(struct device_node *np) } } +static LIST_HEAD(probed_clks); + +static bool of_clk_probed(struct device_node *np) +{ + struct clock_provider *clk_provider; + + list_for_each_entry(clk_provider, &probed_clks, node) + if (clk_provider->np == np) + return true; + return false; +} + /** * of_clk_init() - Scan and init clock providers from the DT - * @root: parent of the first level to probe or NULL for the root of the tree - * @matches: array of compatible values and init functions for providers. * * This function scans the device tree for matching clock providers and * calls their initialization functions * * Returns 0 on success, < 0 on failure. */ -int of_clk_init(struct device_node *root, const struct of_device_id *matches) +int of_clk_init(void) { + struct device_node *root = of_get_root_node(); + const struct of_device_id *matches = __clk_of_table_start; struct clock_provider *clk_provider, *next; bool is_init_done; bool force = false; @@ -866,11 +878,7 @@ int of_clk_init(struct device_node *root, const struct of_device_id *matches) const struct of_device_id *match; if (!root) - root = of_find_node_by_path("/"); - if (!root) return -EINVAL; - if (!matches) - matches = __clk_of_table_start; /* First prepare the list of the clocks providers */ for_each_matching_node_and_match(root, matches, &match) { @@ -879,6 +887,11 @@ int of_clk_init(struct device_node *root, const struct of_device_id *matches) if (!of_device_is_available(root)) continue; + if (of_clk_probed(root)) { + pr_debug("%s: already probed: %pOF\n", __func__, root); + continue; + } + parent = xzalloc(sizeof(*parent)); parent->clk_init_cb = match->data; @@ -898,8 +911,7 @@ int of_clk_init(struct device_node *root, const struct of_device_id *matches) clk_provider->clk_init_cb(np); of_clk_set_defaults(np, true); - list_del(&clk_provider->node); - free(clk_provider); + list_move_tail(&clk_provider->node, &probed_clks); is_init_done = true; } } diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 7362798758..6ec63b1119 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -583,7 +583,7 @@ int dev_gpiod_get_index(struct device *dev, buf = NULL; if (!label) { - if (con_id) + if (_con_id) label = buf = basprintf("%s-%s", dev_name(dev), _con_id); else label = dev_name(dev); diff --git a/drivers/hab/hab.c b/drivers/hab/hab.c index 65384a6c10..5bb97c4b68 100644 --- a/drivers/hab/hab.c +++ b/drivers/hab/hab.c @@ -5,7 +5,7 @@ #include <fcntl.h> #include <environment.h> #include <libfile.h> -#include <mach/generic.h> +#include <mach/imx/generic.h> #include <hab.h> #include <regmap.h> #include <fs.h> diff --git a/drivers/mci/dw_mmc.c b/drivers/mci/dw_mmc.c index 8f3317deb5..73a8ebbc15 100644 --- a/drivers/mci/dw_mmc.c +++ b/drivers/mci/dw_mmc.c @@ -570,7 +570,7 @@ static int dw_mmc_probe(struct device *dev) clk_enable(host->clk_biu); clk_enable(host->clk_ciu); - rst = reset_control_get(dev, "reset"); + rst = reset_control_get_optional(dev, "reset"); if (IS_ERR(rst)) { dev_warn(dev, "error claiming reset: %pe\n", rst); } else if (rst) { diff --git a/drivers/mci/imx-esdhc-pbl.c b/drivers/mci/imx-esdhc-pbl.c index 40c2882dc4..7c5febb7a8 100644 --- a/drivers/mci/imx-esdhc-pbl.c +++ b/drivers/mci/imx-esdhc-pbl.c @@ -104,117 +104,17 @@ static int esdhc_read_blocks(struct fsl_esdhc_host *host, void *dst, size_t len) } #ifdef CONFIG_ARCH_IMX -static int esdhc_search_header(struct fsl_esdhc_host *host, - struct imx_flash_header_v2 **header_pointer, - void *buffer, u32 *offset, u32 ivt_offset) +static int imx_read_blocks(void *dest, size_t len, void *priv) { - int ret; - int i, header_count = 1; - void *buf = buffer; - struct imx_flash_header_v2 *hdr; - - for (i = 0; i < header_count; i++) { - ret = esdhc_read_blocks(host, buf, - *offset + ivt_offset + SECTOR_SIZE); - if (ret) - return ret; - - hdr = buf + *offset + ivt_offset; - - if (!is_imx_flash_header_v2(hdr)) { - pr_debug("IVT header not found on SD card. " - "Found tag: 0x%02x length: 0x%04x " - "version: %02x\n", - hdr->header.tag, hdr->header.length, - hdr->header.version); - return -EINVAL; - } - - if (IS_ENABLED(CONFIG_ARCH_IMX8MQ) && - hdr->boot_data.plugin & PLUGIN_HDMI_IMAGE) { - /* - * In images that include signed HDMI - * firmware, first v2 header would be - * dedicated to that and would not contain any - * useful for us information. In order for us - * to pull the rest of the bootloader image - * in, we need to re-read header from SD/MMC, - * this time skipping anything HDMI firmware - * related. - */ - *offset += hdr->boot_data.size + hdr->header.length; - header_count++; - } - } - *header_pointer = hdr; - return 0; + return esdhc_read_blocks(priv, dest, len); } static int esdhc_load_image(struct fsl_esdhc_host *host, ptrdiff_t address, ptrdiff_t entry, u32 offset, u32 ivt_offset, bool start) { - - void *buf = (void *)address; - struct imx_flash_header_v2 *hdr = NULL; - int ret, len; - void __noreturn (*bb)(void); - unsigned int ofs; - - len = imx_image_size(); - len = ALIGN(len, SECTOR_SIZE); - - ret = esdhc_search_header(host, &hdr, buf, &offset, ivt_offset); - if (ret) - return ret; - - pr_debug("Check ok, loading image\n"); - - ofs = offset + hdr->entry - hdr->boot_data.start; - - if (entry != address) { - /* - * Passing entry different from address is interpreted - * as a request to place the image such that its entry - * point would be exactly at 'entry', that is: - * - * buf + ofs = entry - * - * solving the above for 'buf' gives us the - * adjustment that needs to be made: - * - * buf = entry - ofs - * - */ - if (WARN_ON(entry - ofs < address)) { - /* - * We want to make sure we won't try to place - * the start of the image before the beginning - * of the memory buffer we were given in - * address. - */ - return -EINVAL; - } - - buf = (void *)(entry - ofs); - } - - ret = esdhc_read_blocks(host, buf, offset + len); - if (ret) { - pr_err("Loading image failed with %d\n", ret); - return ret; - } - - pr_debug("Image loaded successfully\n"); - - if (!start) - return 0; - - bb = buf + ofs; - - sync_caches_for_execution(); - - bb(); + return imx_load_image(address, entry, offset, ivt_offset, start, + SECTOR_SIZE, imx_read_blocks, host); } static void imx_esdhc_init(struct fsl_esdhc_host *host, diff --git a/drivers/mci/mci-bcm2835.c b/drivers/mci/mci-bcm2835.c index bcdf1b6196..477a3b83a0 100644 --- a/drivers/mci/mci-bcm2835.c +++ b/drivers/mci/mci-bcm2835.c @@ -148,7 +148,7 @@ static int bcm2835_mci_request(struct mci_host *mci, struct mci_cmd *cmd, command << 16 | transfer_mode); ret = bcm2835_mci_wait_command_done(host); - if (ret) { + if (ret && ret != -ETIMEDOUT) { dev_err(host->hw_dev, "Error while executing command %d\n", cmd->cmdidx); dev_err(host->hw_dev, "Status: 0x%X, Interrupt: 0x%X\n", diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index 05c6473a28..ce3789c096 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -15,7 +15,6 @@ #include <driver.h> #include <of.h> #include <spi/spi.h> -#include <spi/flash.h> #include <xfuncs.h> #include <malloc.h> #include <errno.h> @@ -205,7 +204,6 @@ static int m25p_probe(struct device *dev) { struct spi_device *spi = (struct spi_device *)dev->type_data; struct spi_mem *spimem = spi->mem; - struct flash_platform_data *data; struct m25p *flash; struct spi_nor *nor; struct spi_nor_hwcaps hwcaps = { @@ -218,8 +216,6 @@ static int m25p_probe(struct device *dev) bool use_large_blocks; int ret; - data = dev->platform_data; - flash = xzalloc(sizeof *flash); nor = &flash->spi_nor; @@ -245,14 +241,7 @@ static int m25p_probe(struct device *dev) dev->priv = (void *)flash; - if (data && data->name) - flash->mtd.name = data->name; - - if (data && data->type) - flash_name = data->type; - else if (data && data->name) - flash_name = data->name; - else if (dev->id_entry) + if (dev->id_entry) flash_name = dev->id_entry->name; else flash_name = NULL; /* auto-detect */ @@ -267,8 +256,6 @@ static int m25p_probe(struct device *dev) device_id = DEVICE_ID_SINGLE; if (dev->of_node) flash_name = of_alias_get(dev->of_node); - else if (data && data->name) - flash_name = data->name; if (!flash_name) { device_id = DEVICE_ID_DYNAMIC; diff --git a/drivers/mtd/devices/mtd_dataflash.c b/drivers/mtd/devices/mtd_dataflash.c index b6a0c79d2f..b5dbe4de3e 100644 --- a/drivers/mtd/devices/mtd_dataflash.c +++ b/drivers/mtd/devices/mtd_dataflash.c @@ -17,7 +17,6 @@ #include <clock.h> #include <spi/spi.h> -#include <spi/flash.h> #include <linux/math64.h> #include <linux/mtd/mtd.h> @@ -599,7 +598,6 @@ add_dataflash_otp(struct spi_device *spi, char *name, { struct dataflash *priv; struct mtd_info *device; - struct flash_platform_data *pdata = spi->dev.platform_data; char *otp_tag = ""; int err = 0; @@ -617,7 +615,7 @@ add_dataflash_otp(struct spi_device *spi, char *name, name); device = &priv->mtd; - device->name = (pdata && pdata->name) ? pdata->name : "dataflash"; + device->name = "dataflash"; device->size = nr_pages * (uint64_t)pagesize; device->erasesize = pagesize; device->writesize = pagesize; diff --git a/drivers/mtd/nand/atmel/legacy.c b/drivers/mtd/nand/atmel/legacy.c index 44cd4d07e8..cf402549b8 100644 --- a/drivers/mtd/nand/atmel/legacy.c +++ b/drivers/mtd/nand/atmel/legacy.c @@ -1240,19 +1240,14 @@ static int __init atmel_nand_probe(struct device *dev) nand_chip->ecc.mode = pdata->ecc_mode; nand_chip->ecc.strength = pdata->ecc_strength ? : 1; - nand_chip->ecc.size = 1 << pdata->ecc_size_shift ? : 512; + nand_chip->ecc.size = 1 << (pdata->ecc_size_shift ? : 9); - if (pdata->ecc_mode == NAND_ECC_HW) { - nand_chip->ecc.mode = NAND_ECC_HW; + if (pdata->ecc_mode == NAND_ECC_SOFT) { + nand_chip->ecc.algo = NAND_ECC_ALGO_HAMMING; } nand_chip->legacy.chip_delay = 40; /* 40us command delay time */ - if (IS_ENABLED(CONFIG_NAND_ECC_BCH) && - pdata->ecc_mode == NAND_ECC_SOFT_BCH) { - nand_chip->ecc.mode = NAND_ECC_SOFT_BCH; - } - if (host->board->bus_width_16) { /* 16-bit bus width */ nand_chip->options |= NAND_BUSWIDTH_16; nand_chip->legacy.read_buf = atmel_read_buf16; diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index f83c3f02a0..8f6726ca4b 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -19,7 +19,6 @@ #include <linux/mtd/cfi.h> #include <linux/mtd/spi-nor.h> #include <of.h> -#include <spi/flash.h> #define SPI_NOR_MAX_ID_LEN 6 #define SPI_NOR_MAX_ADDR_WIDTH 4 diff --git a/drivers/net/macb.c b/drivers/net/macb.c index 3d7627fed8..9dd273a504 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -936,8 +936,8 @@ static const struct of_device_id macb_dt_ids[] = { { .compatible = "atmel,sama5d2-gem",}, { .compatible = "atmel,sama5d3-gem",}, { .compatible = "atmel,sama5d4-gem",}, - { .compatible = "cdns,zynq-gem",}, - { .compatible = "cdns,zynqmp-gem",}, + { .compatible = "xlnx,zynq-gem",}, + { .compatible = "xlnx,zynqmp-gem",}, { .compatible = "sifive,fu540-c000-gem", .data = &fu540_c000_config }, { /* sentinel */ } }; diff --git a/drivers/net/realtek-dsa/realtek-mdio.c b/drivers/net/realtek-dsa/realtek-mdio.c index 8b32c3cf53..579eefebe2 100644 --- a/drivers/net/realtek-dsa/realtek-mdio.c +++ b/drivers/net/realtek-dsa/realtek-mdio.c @@ -23,6 +23,7 @@ #include <regmap.h> #include <clock.h> #include <gpiod.h> +#include <linux/printk.h> #include <linux/mdio.h> #include "realtek.h" diff --git a/drivers/net/realtek-dsa/realtek-smi.c b/drivers/net/realtek-dsa/realtek-smi.c index 83d197dcdf..a12cb7ffd4 100644 --- a/drivers/net/realtek-dsa/realtek-smi.c +++ b/drivers/net/realtek-dsa/realtek-smi.c @@ -31,6 +31,7 @@ #include <of.h> #include <of_device.h> #include <linux/mdio.h> +#include <linux/printk.h> #include <clock.h> #include <gpiod.h> #include <driver.h> diff --git a/drivers/net/realtek-dsa/rtl8365mb.c b/drivers/net/realtek-dsa/rtl8365mb.c index 1f11ed4ed4..d8e8ac714d 100644 --- a/drivers/net/realtek-dsa/rtl8365mb.c +++ b/drivers/net/realtek-dsa/rtl8365mb.c @@ -94,6 +94,8 @@ #include <linux/bitops.h> #include <linux/mutex.h> #include <linux/spinlock.h> +#include <linux/printk.h> +#include <linux/export.h> #include <regmap.h> #include <net.h> #include <linux/if_bridge.h> diff --git a/drivers/net/realtek-dsa/rtl8366rb.c b/drivers/net/realtek-dsa/rtl8366rb.c index 67dcb7fb70..5449b9481c 100644 --- a/drivers/net/realtek-dsa/rtl8366rb.c +++ b/drivers/net/realtek-dsa/rtl8366rb.c @@ -15,6 +15,8 @@ #include <linux/bitops.h> #include <net.h> #include <linux/if_bridge.h> +#include <linux/printk.h> +#include <linux/export.h> #include <regmap.h> #include "realtek.h" diff --git a/drivers/net/realtek-dsa/tag_rtl4_a.c b/drivers/net/realtek-dsa/tag_rtl4_a.c index dabd4ccba2..30c6a712d9 100644 --- a/drivers/net/realtek-dsa/tag_rtl4_a.c +++ b/drivers/net/realtek-dsa/tag_rtl4_a.c @@ -16,6 +16,7 @@ */ #include <net.h> +#include <linux/printk.h> #include "realtek.h" #include "dsa_priv.h" diff --git a/drivers/net/realtek-dsa/tag_rtl8_4.c b/drivers/net/realtek-dsa/tag_rtl8_4.c index a6762fc4e9..80e977a65d 100644 --- a/drivers/net/realtek-dsa/tag_rtl8_4.c +++ b/drivers/net/realtek-dsa/tag_rtl8_4.c @@ -74,6 +74,7 @@ */ #include <linux/bitfield.h> +#include <linux/printk.h> #include <net.h> #include "realtek.h" diff --git a/drivers/nvmem/ocotp.c b/drivers/nvmem/ocotp.c index ff1e815c6b..f3bd377f84 100644 --- a/drivers/nvmem/ocotp.c +++ b/drivers/nvmem/ocotp.c @@ -30,8 +30,8 @@ #include <mach/imx/ocotp.h> #include <mach/imx/ocotp-fusemap.h> #else -#include <mach/ocotp.h> -#include <mach/ocotp-fusemap.h> +#include <mach/mxs/ocotp.h> +#include <mach/mxs/ocotp-fusemap.h> #endif #include <soc/imx8m/featctrl.h> #include <linux/nvmem-provider.h> diff --git a/drivers/of/base.c b/drivers/of/base.c index 9eaa93b5bb..5644e8e953 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -1757,7 +1757,7 @@ int barebox_register_of(struct device_node *root) of_fix_tree(root); if (IS_ENABLED(CONFIG_OFDEVICE)) { - of_clk_init(root, NULL); + of_clk_init(); if (!deep_probe_is_supported()) return of_probe(); } @@ -2529,13 +2529,13 @@ static int of_probe_memory(void) } mem_initcall(of_probe_memory); -struct device *of_platform_device_create_root(struct device_node *np) +static void of_platform_device_create_root(struct device_node *np) { static struct device *dev; int ret; if (dev) - return dev; + return; dev = xzalloc(sizeof(*dev)); dev->id = DEVICE_ID_SINGLE; @@ -2543,12 +2543,8 @@ struct device *of_platform_device_create_root(struct device_node *np) dev_set_name(dev, "machine"); ret = platform_device_register(dev); - if (ret) { + if (ret) free_device(dev); - return ERR_PTR(ret); - } - - return dev; } static const struct of_device_id reserved_mem_matches[] = { diff --git a/drivers/of/platform.c b/drivers/of/platform.c index 683a7821ad..23b8fa7934 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -419,7 +419,7 @@ static struct device *of_device_create_on_demand(struct device_node *np) parent = of_get_parent(np); if (!parent) - return of_platform_device_create_root(np); + return NULL; if (!np->dev && parent->dev) device_rescan(parent->dev); diff --git a/drivers/pci/pci-imx6.c b/drivers/pci/pci-imx6.c index 6212a00913..40bcf3d890 100644 --- a/drivers/pci/pci-imx6.c +++ b/drivers/pci/pci-imx6.c @@ -30,9 +30,9 @@ #include <mfd/imx6q-iomuxc-gpr.h> #include <mfd/imx7-iomuxc-gpr.h> -#include <mach/imx6-regs.h> -#include <mach/imx7-regs.h> -#include <mach/imx8mq-regs.h> +#include <mach/imx/imx6-regs.h> +#include <mach/imx/imx7-regs.h> +#include <mach/imx/imx8mq-regs.h> #include "pcie-designware.h" diff --git a/drivers/pinctrl/imx-iomux-v2.c b/drivers/pinctrl/imx-iomux-v2.c index 806c3f882c..cc5b8f11bc 100644 --- a/drivers/pinctrl/imx-iomux-v2.c +++ b/drivers/pinctrl/imx-iomux-v2.c @@ -7,7 +7,7 @@ #include <io.h> #include <init.h> #include <linux/err.h> -#include <mach/iomux-mx31.h> +#include <mach/imx/iomux-mx31.h> /* * IOMUX register (base) addresses diff --git a/drivers/pinctrl/pinctrl-stm32.c b/drivers/pinctrl/pinctrl-stm32.c index 15d845e0ad..1eed5473f6 100644 --- a/drivers/pinctrl/pinctrl-stm32.c +++ b/drivers/pinctrl/pinctrl-stm32.c @@ -348,11 +348,6 @@ static int stm32_pinctrl_probe(struct device *dev) struct device_node *np = dev->of_node, *child; int ret; - if (!of_find_property(np, "pins-are-numbered", NULL)) { - dev_err(dev, "only pins-are-numbered format supported\n"); - return -EINVAL; - } - for_each_available_child_of_node(np, child) if (of_property_read_bool(child, "gpio-controller")) nbanks++; diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c index e579fcaed6..923a170844 100644 --- a/drivers/spi/atmel-quadspi.c +++ b/drivers/spi/atmel-quadspi.c @@ -21,9 +21,9 @@ #include <of_gpio.h> #include <io.h> #include <spi/spi.h> -#include <mach/iomux.h> -#include <mach/board.h> -#include <mach/cpu.h> +#include <mach/at91/iomux.h> +#include <mach/at91/board.h> +#include <mach/at91/cpu.h> #include <linux/clk.h> #include <linux/err.h> diff --git a/drivers/video/imx-ipu-fb.c b/drivers/video/imx-ipu-fb.c index 77c0ba2c9c..e2ff01929b 100644 --- a/drivers/video/imx-ipu-fb.c +++ b/drivers/video/imx-ipu-fb.c @@ -8,14 +8,14 @@ #include <dma.h> #include <init.h> #include <io.h> -#include <mach/imx35-regs.h> +#include <mach/imx/imx35-regs.h> #include <fb.h> #include <platform_data/imxfb.h> #include <malloc.h> #include <errno.h> #include <linux/math64.h> #include <mmu.h> -#include <mach/imx-ipu-fb.h> +#include <mach/imx/imx-ipu-fb.h> #include <linux/clk.h> #include <linux/err.h> diff --git a/drivers/video/ramfb.c b/drivers/video/ramfb.c index 26e01196fc..3442e81b9e 100644 --- a/drivers/video/ramfb.c +++ b/drivers/video/ramfb.c @@ -131,7 +131,7 @@ static int ramfb_probe(struct device *parent_dev, int fd) ret = fw_cfg_find_file(parent_dev, fd, "etc/ramfb"); if (ret < 0) { - dev_err(parent_dev, "ramfb: fw_cfg (etc/ramfb) file not found\n"); + dev_dbg(parent_dev, "ramfb: fw_cfg (etc/ramfb) file not found\n"); return -ENODEV; } diff --git a/dts/Bindings/mtd/jedec,spi-nor.yaml b/dts/Bindings/mtd/jedec,spi-nor.yaml index 3fe981b14e..5473636237 100644 --- a/dts/Bindings/mtd/jedec,spi-nor.yaml +++ b/dts/Bindings/mtd/jedec,spi-nor.yaml @@ -76,6 +76,13 @@ properties: If "broken-flash-reset" is present then having this property does not make any difference. + spi-cpol: true + spi-cpha: true + +dependencies: + spi-cpol: [ spi-cpha ] + spi-cpha: [ spi-cpol ] + unevaluatedProperties: false examples: diff --git a/dts/Bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml b/dts/Bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml index 5e90051ed3..8f60a9113e 100644 --- a/dts/Bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml +++ b/dts/Bindings/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml @@ -96,9 +96,11 @@ $defs: 2: Lower Slew rate (slower edges) 3: Reserved (No adjustments) + bias-bus-hold: true bias-pull-down: true bias-pull-up: true bias-disable: true + input-enable: true output-high: true output-low: true diff --git a/dts/Bindings/serial/renesas,scif.yaml b/dts/Bindings/serial/renesas,scif.yaml index 1989bd67d0..54e4f41be9 100644 --- a/dts/Bindings/serial/renesas,scif.yaml +++ b/dts/Bindings/serial/renesas,scif.yaml @@ -92,7 +92,7 @@ properties: - description: Error interrupt - description: Receive buffer full interrupt - description: Transmit buffer empty interrupt - - description: Transmit End interrupt + - description: Break interrupt - items: - description: Error interrupt - description: Receive buffer full interrupt @@ -107,7 +107,7 @@ properties: - const: eri - const: rxi - const: txi - - const: tei + - const: bri - items: - const: eri - const: rxi diff --git a/dts/src/arm/e60k02.dtsi b/dts/src/arm/e60k02.dtsi index 94944cc219..dd03e3860f 100644 --- a/dts/src/arm/e60k02.dtsi +++ b/dts/src/arm/e60k02.dtsi @@ -311,6 +311,7 @@ &usbotg1 { pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg1>; disable-over-current; srp-disable; hnp-disable; diff --git a/dts/src/arm/e70k02.dtsi b/dts/src/arm/e70k02.dtsi index ace3eb8a97..4e1bf080ea 100644 --- a/dts/src/arm/e70k02.dtsi +++ b/dts/src/arm/e70k02.dtsi @@ -321,6 +321,7 @@ &usbotg1 { pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg1>; disable-over-current; srp-disable; hnp-disable; diff --git a/dts/src/arm/imx6sl-tolino-shine2hd.dts b/dts/src/arm/imx6sl-tolino-shine2hd.dts index da13990576..815119c12b 100644 --- a/dts/src/arm/imx6sl-tolino-shine2hd.dts +++ b/dts/src/arm/imx6sl-tolino-shine2hd.dts @@ -625,6 +625,7 @@ &usbotg1 { pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg1>; disable-over-current; srp-disable; hnp-disable; diff --git a/dts/src/arm/qcom-apq8026-lg-lenok.dts b/dts/src/arm/qcom-apq8026-lg-lenok.dts index de2fb1c01b..b82381229a 100644 --- a/dts/src/arm/qcom-apq8026-lg-lenok.dts +++ b/dts/src/arm/qcom-apq8026-lg-lenok.dts @@ -27,6 +27,16 @@ }; reserved-memory { + sbl_region: sbl@2f00000 { + reg = <0x02f00000 0x100000>; + no-map; + }; + + external_image_region: external-image@3100000 { + reg = <0x03100000 0x200000>; + no-map; + }; + adsp_region: adsp@3300000 { reg = <0x03300000 0x1400000>; no-map; diff --git a/dts/src/arm64/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dts b/dts/src/arm64/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dts index af9194eca5..73eb6061c7 100644 --- a/dts/src/arm64/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dts +++ b/dts/src/arm64/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dts @@ -56,14 +56,10 @@ }; &enetc_port2 { - nvmem-cells = <&base_mac_address 2>; - nvmem-cell-names = "mac-address"; status = "okay"; }; &enetc_port3 { - nvmem-cells = <&base_mac_address 3>; - nvmem-cell-names = "mac-address"; status = "okay"; }; @@ -84,8 +80,6 @@ managed = "in-band-status"; phy-handle = <&qsgmii_phy0>; phy-mode = "qsgmii"; - nvmem-cells = <&base_mac_address 4>; - nvmem-cell-names = "mac-address"; status = "okay"; }; @@ -94,8 +88,6 @@ managed = "in-band-status"; phy-handle = <&qsgmii_phy1>; phy-mode = "qsgmii"; - nvmem-cells = <&base_mac_address 5>; - nvmem-cell-names = "mac-address"; status = "okay"; }; @@ -104,8 +96,6 @@ managed = "in-band-status"; phy-handle = <&qsgmii_phy2>; phy-mode = "qsgmii"; - nvmem-cells = <&base_mac_address 6>; - nvmem-cell-names = "mac-address"; status = "okay"; }; @@ -114,8 +104,6 @@ managed = "in-band-status"; phy-handle = <&qsgmii_phy3>; phy-mode = "qsgmii"; - nvmem-cells = <&base_mac_address 7>; - nvmem-cell-names = "mac-address"; status = "okay"; }; diff --git a/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28-var1.dts b/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28-var1.dts index 1f34c75534..7cd29ab970 100644 --- a/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28-var1.dts +++ b/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28-var1.dts @@ -55,7 +55,5 @@ &enetc_port1 { phy-handle = <&phy0>; phy-mode = "rgmii-id"; - nvmem-cells = <&base_mac_address 0>; - nvmem-cell-names = "mac-address"; status = "okay"; }; diff --git a/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28-var2.dts b/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28-var2.dts index aac41192ca..113b1df74b 100644 --- a/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28-var2.dts +++ b/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28-var2.dts @@ -36,14 +36,10 @@ }; &enetc_port2 { - nvmem-cells = <&base_mac_address 2>; - nvmem-cell-names = "mac-address"; status = "okay"; }; &enetc_port3 { - nvmem-cells = <&base_mac_address 3>; - nvmem-cell-names = "mac-address"; status = "okay"; }; @@ -56,8 +52,6 @@ managed = "in-band-status"; phy-handle = <&phy0>; phy-mode = "sgmii"; - nvmem-cells = <&base_mac_address 0>; - nvmem-cell-names = "mac-address"; status = "okay"; }; @@ -66,8 +60,6 @@ managed = "in-band-status"; phy-handle = <&phy1>; phy-mode = "sgmii"; - nvmem-cells = <&base_mac_address 1>; - nvmem-cell-names = "mac-address"; status = "okay"; }; diff --git a/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28-var4.dts b/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28-var4.dts index a4421db378..9b5e92fb75 100644 --- a/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28-var4.dts +++ b/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28-var4.dts @@ -43,7 +43,5 @@ &enetc_port1 { phy-handle = <&phy1>; phy-mode = "rgmii-id"; - nvmem-cells = <&base_mac_address 1>; - nvmem-cell-names = "mac-address"; status = "okay"; }; diff --git a/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28.dts b/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28.dts index 8b65af4a71..4ab17b984b 100644 --- a/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28.dts +++ b/dts/src/arm64/freescale/fsl-ls1028a-kontron-sl28.dts @@ -92,8 +92,6 @@ phy-handle = <&phy0>; phy-mode = "sgmii"; managed = "in-band-status"; - nvmem-cells = <&base_mac_address 0>; - nvmem-cell-names = "mac-address"; status = "okay"; }; @@ -156,21 +154,6 @@ label = "bootloader environment"; }; }; - - otp-1 { - compatible = "user-otp"; - - nvmem-layout { - compatible = "kontron,sl28-vpd"; - - serial_number: serial-number { - }; - - base_mac_address: base-mac-address { - #nvmem-cell-cells = <1>; - }; - }; - }; }; }; diff --git a/dts/src/arm64/freescale/imx8-ss-lsio.dtsi b/dts/src/arm64/freescale/imx8-ss-lsio.dtsi index 1f3d225e64..06b94bbc2b 100644 --- a/dts/src/arm64/freescale/imx8-ss-lsio.dtsi +++ b/dts/src/arm64/freescale/imx8-ss-lsio.dtsi @@ -117,7 +117,7 @@ lsio_subsys: bus@5d000000 { interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX_SC_R_FSPI_0 IMX_SC_PM_CLK_PER>, <&clk IMX_SC_R_FSPI_0 IMX_SC_PM_CLK_PER>; - clock-names = "fspi", "fspi_en"; + clock-names = "fspi_en", "fspi"; power-domains = <&pd IMX_SC_R_FSPI_0>; status = "disabled"; }; diff --git a/dts/src/arm64/freescale/imx8dxl-evk.dts b/dts/src/arm64/freescale/imx8dxl-evk.dts index 1bcf228a22..852420349c 100644 --- a/dts/src/arm64/freescale/imx8dxl-evk.dts +++ b/dts/src/arm64/freescale/imx8dxl-evk.dts @@ -121,8 +121,6 @@ phy-handle = <ðphy0>; nvmem-cells = <&fec_mac1>; nvmem-cell-names = "mac-address"; - snps,reset-gpios = <&pca6416_1 2 GPIO_ACTIVE_LOW>; - snps,reset-delays-us = <10 20 200000>; status = "okay"; mdio { @@ -136,6 +134,9 @@ eee-broken-1000t; qca,disable-smarteee; qca,disable-hibernation-mode; + reset-gpios = <&pca6416_1 2 GPIO_ACTIVE_LOW>; + reset-assert-us = <20>; + reset-deassert-us = <200000>; vddio-supply = <&vddio0>; vddio0: vddio-regulator { diff --git a/dts/src/arm64/freescale/imx8mm-nitrogen-r2.dts b/dts/src/arm64/freescale/imx8mm-nitrogen-r2.dts index 6357078185..0e8f0d7161 100644 --- a/dts/src/arm64/freescale/imx8mm-nitrogen-r2.dts +++ b/dts/src/arm64/freescale/imx8mm-nitrogen-r2.dts @@ -247,7 +247,7 @@ compatible = "wlf,wm8960"; reg = <0x1a>; clocks = <&clk IMX8MM_CLK_SAI1_ROOT>; - clock-names = "mclk1"; + clock-names = "mclk"; wlf,shared-lrclk; #sound-dai-cells = <0>; }; diff --git a/dts/src/arm64/freescale/imx8mn.dtsi b/dts/src/arm64/freescale/imx8mn.dtsi index ed9ac6c504..9e0ddd6b7a 100644 --- a/dts/src/arm64/freescale/imx8mn.dtsi +++ b/dts/src/arm64/freescale/imx8mn.dtsi @@ -296,6 +296,7 @@ sai2: sai@30020000 { compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; reg = <0x30020000 0x10000>; + #sound-dai-cells = <0>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MN_CLK_SAI2_IPG>, <&clk IMX8MN_CLK_DUMMY>, @@ -310,6 +311,7 @@ sai3: sai@30030000 { compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; reg = <0x30030000 0x10000>; + #sound-dai-cells = <0>; interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MN_CLK_SAI3_IPG>, <&clk IMX8MN_CLK_DUMMY>, @@ -324,6 +326,7 @@ sai5: sai@30050000 { compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; reg = <0x30050000 0x10000>; + #sound-dai-cells = <0>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MN_CLK_SAI5_IPG>, <&clk IMX8MN_CLK_DUMMY>, @@ -340,6 +343,7 @@ sai6: sai@30060000 { compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; reg = <0x30060000 0x10000>; + #sound-dai-cells = <0>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MN_CLK_SAI6_IPG>, <&clk IMX8MN_CLK_DUMMY>, @@ -397,6 +401,7 @@ sai7: sai@300b0000 { compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; reg = <0x300b0000 0x10000>; + #sound-dai-cells = <0>; interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MN_CLK_SAI7_IPG>, <&clk IMX8MN_CLK_DUMMY>, diff --git a/dts/src/arm64/freescale/imx8mp.dtsi b/dts/src/arm64/freescale/imx8mp.dtsi index a19224fe1a..2dd60e3252 100644 --- a/dts/src/arm64/freescale/imx8mp.dtsi +++ b/dts/src/arm64/freescale/imx8mp.dtsi @@ -1131,8 +1131,8 @@ reg = <0x32e90000 0x238>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX_ROOT>, - <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>, - <&clk IMX8MP_CLK_MEDIA_APB_ROOT>; + <&clk IMX8MP_CLK_MEDIA_APB_ROOT>, + <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>; clock-names = "pix", "axi", "disp_axi"; assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>, <&clk IMX8MP_VIDEO_PLL1>; diff --git a/dts/src/arm64/freescale/imx93.dtsi b/dts/src/arm64/freescale/imx93.dtsi index 2076f9c998..41efd97dd6 100644 --- a/dts/src/arm64/freescale/imx93.dtsi +++ b/dts/src/arm64/freescale/imx93.dtsi @@ -164,6 +164,8 @@ lpi2c1: i2c@44340000 { compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x44340000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX93_CLK_LPI2C1_GATE>, <&clk IMX93_CLK_BUS_AON>; @@ -174,6 +176,8 @@ lpi2c2: i2c@44350000 { compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x44350000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX93_CLK_LPI2C2_GATE>, <&clk IMX93_CLK_BUS_AON>; @@ -343,6 +347,8 @@ lpi2c3: i2c@42530000 { compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x42530000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX93_CLK_LPI2C3_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; @@ -353,6 +359,8 @@ lpi2c4: i2c@42540000 { compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x42540000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX93_CLK_LPI2C4_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; @@ -455,6 +463,8 @@ lpi2c5: i2c@426b0000 { compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x426b0000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX93_CLK_LPI2C5_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; @@ -465,6 +475,8 @@ lpi2c6: i2c@426c0000 { compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x426c0000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX93_CLK_LPI2C6_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; @@ -475,6 +487,8 @@ lpi2c7: i2c@426d0000 { compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x426d0000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX93_CLK_LPI2C7_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; @@ -485,6 +499,8 @@ lpi2c8: i2c@426e0000 { compatible = "fsl,imx93-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x426e0000 0x10000>; + #address-cells = <1>; + #size-cells = <0>; interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX93_CLK_LPI2C8_GATE>, <&clk IMX93_CLK_BUS_WAKEUP>; @@ -580,9 +596,9 @@ eqos: ethernet@428a0000 { compatible = "nxp,imx93-dwmac-eqos", "snps,dwmac-5.10a"; reg = <0x428a0000 0x10000>; - interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "eth_wake_irq", "macirq"; + interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq", "eth_wake_irq"; clocks = <&clk IMX93_CLK_ENET_QOS_GATE>, <&clk IMX93_CLK_ENET_QOS_GATE>, <&clk IMX93_CLK_ENET_TIMER2>, @@ -595,7 +611,7 @@ <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>; assigned-clock-rates = <100000000>, <250000000>; intf_mode = <&wakeupmix_gpr 0x28>; - clk_csr = <0>; + snps,clk-csr = <0>; status = "disabled"; }; diff --git a/dts/src/arm64/nvidia/tegra194.dtsi b/dts/src/arm64/nvidia/tegra194.dtsi index 133dbe5b42..7096b999b3 100644 --- a/dts/src/arm64/nvidia/tegra194.dtsi +++ b/dts/src/arm64/nvidia/tegra194.dtsi @@ -22,7 +22,7 @@ #address-cells = <2>; #size-cells = <2>; - ranges = <0x0 0x0 0x0 0x0 0x0 0x40000000>; + ranges = <0x0 0x0 0x0 0x0 0x100 0x0>; apbmisc: misc@100000 { compatible = "nvidia,tegra194-misc"; diff --git a/dts/src/arm64/nvidia/tegra234.dtsi b/dts/src/arm64/nvidia/tegra234.dtsi index 8fe8eda765..f1748cff8a 100644 --- a/dts/src/arm64/nvidia/tegra234.dtsi +++ b/dts/src/arm64/nvidia/tegra234.dtsi @@ -20,7 +20,7 @@ #address-cells = <2>; #size-cells = <2>; - ranges = <0x0 0x0 0x0 0x0 0x0 0x40000000>; + ranges = <0x0 0x0 0x0 0x0 0x100 0x0>; misc@100000 { compatible = "nvidia,tegra234-misc"; diff --git a/dts/src/arm64/qcom/msm8916-thwc-uf896.dts b/dts/src/arm64/qcom/msm8916-thwc-uf896.dts index c492db8561..82e2603751 100644 --- a/dts/src/arm64/qcom/msm8916-thwc-uf896.dts +++ b/dts/src/arm64/qcom/msm8916-thwc-uf896.dts @@ -33,7 +33,3 @@ &gpio_leds_default { pins = "gpio81", "gpio82", "gpio83"; }; - -&sim_ctrl_default { - pins = "gpio1", "gpio2"; -}; diff --git a/dts/src/arm64/qcom/msm8916-thwc-ufi001c.dts b/dts/src/arm64/qcom/msm8916-thwc-ufi001c.dts index 700cf81cbf..8433c9710b 100644 --- a/dts/src/arm64/qcom/msm8916-thwc-ufi001c.dts +++ b/dts/src/arm64/qcom/msm8916-thwc-ufi001c.dts @@ -25,6 +25,11 @@ gpios = <&msmgpio 20 GPIO_ACTIVE_HIGH>; }; +&mpss { + pinctrl-0 = <&sim_ctrl_default>; + pinctrl-names = "default"; +}; + &button_default { pins = "gpio37"; bias-pull-down; @@ -34,6 +39,25 @@ pins = "gpio20", "gpio21", "gpio22"; }; -&sim_ctrl_default { - pins = "gpio1", "gpio2"; +/* This selects the external SIM card slot by default */ +&msmgpio { + sim_ctrl_default: sim-ctrl-default-state { + esim-sel-pins { + pins = "gpio0", "gpio3"; + bias-disable; + output-low; + }; + + sim-en-pins { + pins = "gpio1"; + bias-disable; + output-low; + }; + + sim-sel-pins { + pins = "gpio2"; + bias-disable; + output-high; + }; + }; }; diff --git a/dts/src/arm64/qcom/msm8916-ufi.dtsi b/dts/src/arm64/qcom/msm8916-ufi.dtsi index 790a9696da..cdf34b74fa 100644 --- a/dts/src/arm64/qcom/msm8916-ufi.dtsi +++ b/dts/src/arm64/qcom/msm8916-ufi.dtsi @@ -92,9 +92,6 @@ }; &mpss { - pinctrl-0 = <&sim_ctrl_default>; - pinctrl-names = "default"; - status = "okay"; }; @@ -240,11 +237,4 @@ drive-strength = <2>; bias-disable; }; - - sim_ctrl_default: sim-ctrl-default-state { - function = "gpio"; - drive-strength = <2>; - bias-disable; - output-low; - }; }; diff --git a/dts/src/arm64/qcom/sa8540p-ride.dts b/dts/src/arm64/qcom/sa8540p-ride.dts index 3ccb5ffdb3..24fa449d48 100644 --- a/dts/src/arm64/qcom/sa8540p-ride.dts +++ b/dts/src/arm64/qcom/sa8540p-ride.dts @@ -241,7 +241,7 @@ }; &remoteproc_nsp0 { - firmware-name = "qcom/sa8540p/cdsp.mbn"; + firmware-name = "qcom/sa8540p/cdsp0.mbn"; status = "okay"; }; diff --git a/dts/src/arm64/qcom/sc7280.dtsi b/dts/src/arm64/qcom/sc7280.dtsi index bdcb749253..8f4ab6bd28 100644 --- a/dts/src/arm64/qcom/sc7280.dtsi +++ b/dts/src/arm64/qcom/sc7280.dtsi @@ -2131,6 +2131,8 @@ pinctrl-names = "default"; pinctrl-0 = <&pcie1_clkreq_n>; + dma-coherent; + iommus = <&apps_smmu 0x1c80 0x1>; iommu-map = <0x0 &apps_smmu 0x1c80 0x1>, diff --git a/dts/src/arm64/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/dts/src/arm64/qcom/sc8280xp-lenovo-thinkpad-x13s.dts index 98e71b9334..99c6d65745 100644 --- a/dts/src/arm64/qcom/sc8280xp-lenovo-thinkpad-x13s.dts +++ b/dts/src/arm64/qcom/sc8280xp-lenovo-thinkpad-x13s.dts @@ -370,6 +370,7 @@ regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-always-on; }; vreg_s11b: smps11 { @@ -377,6 +378,7 @@ regulator-min-microvolt = <1272000>; regulator-max-microvolt = <1272000>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-always-on; }; vreg_s12b: smps12 { @@ -384,6 +386,7 @@ regulator-min-microvolt = <984000>; regulator-max-microvolt = <984000>; regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + regulator-always-on; }; vreg_l3b: ldo3 { @@ -441,6 +444,7 @@ regulator-min-microvolt = <3008000>; regulator-max-microvolt = <3960000>; regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; + regulator-always-on; }; }; @@ -772,75 +776,88 @@ pmic-die-temp@3 { reg = <PMK8350_ADC7_DIE_TEMP>; qcom,pre-scaling = <1 1>; + label = "pmk8350_die_temp"; }; xo-therm@44 { reg = <PMK8350_ADC7_AMUX_THM1_100K_PU>; qcom,hw-settle-time = <200>; qcom,ratiometric; + label = "pmk8350_xo_therm"; }; pmic-die-temp@103 { reg = <PM8350_ADC7_DIE_TEMP(1)>; qcom,pre-scaling = <1 1>; + label = "pmc8280_1_die_temp"; }; sys-therm@144 { reg = <PM8350_ADC7_AMUX_THM1_100K_PU(1)>; qcom,hw-settle-time = <200>; qcom,ratiometric; + label = "sys_therm1"; }; sys-therm@145 { reg = <PM8350_ADC7_AMUX_THM2_100K_PU(1)>; qcom,hw-settle-time = <200>; qcom,ratiometric; + label = "sys_therm2"; }; sys-therm@146 { reg = <PM8350_ADC7_AMUX_THM3_100K_PU(1)>; qcom,hw-settle-time = <200>; qcom,ratiometric; + label = "sys_therm3"; }; sys-therm@147 { reg = <PM8350_ADC7_AMUX_THM4_100K_PU(1)>; qcom,hw-settle-time = <200>; qcom,ratiometric; + label = "sys_therm4"; }; pmic-die-temp@303 { reg = <PM8350_ADC7_DIE_TEMP(3)>; qcom,pre-scaling = <1 1>; + label = "pmc8280_2_die_temp"; }; sys-therm@344 { reg = <PM8350_ADC7_AMUX_THM1_100K_PU(3)>; qcom,hw-settle-time = <200>; qcom,ratiometric; + label = "sys_therm5"; }; sys-therm@345 { reg = <PM8350_ADC7_AMUX_THM2_100K_PU(3)>; qcom,hw-settle-time = <200>; qcom,ratiometric; + label = "sys_therm6"; }; sys-therm@346 { reg = <PM8350_ADC7_AMUX_THM3_100K_PU(3)>; qcom,hw-settle-time = <200>; qcom,ratiometric; + label = "sys_therm7"; }; sys-therm@347 { reg = <PM8350_ADC7_AMUX_THM4_100K_PU(3)>; qcom,hw-settle-time = <200>; qcom,ratiometric; + label = "sys_therm8"; }; pmic-die-temp@403 { reg = <PMR735A_ADC7_DIE_TEMP>; qcom,pre-scaling = <1 1>; + label = "pmr735a_die_temp"; }; }; @@ -884,9 +901,9 @@ "VA DMIC0", "MIC BIAS1", "VA DMIC1", "MIC BIAS1", "VA DMIC2", "MIC BIAS3", - "TX DMIC0", "MIC BIAS1", - "TX DMIC1", "MIC BIAS2", - "TX DMIC2", "MIC BIAS3", + "VA DMIC0", "VA MIC BIAS1", + "VA DMIC1", "VA MIC BIAS1", + "VA DMIC2", "VA MIC BIAS3", "TX SWR_ADC1", "ADC2_OUTPUT"; wcd-playback-dai-link { @@ -937,7 +954,7 @@ va-dai-link { link-name = "VA Capture"; cpu { - sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>; + sound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>; }; platform { @@ -1062,7 +1079,7 @@ vdd-micb-supply = <&vreg_s10b>; - qcom,dmic-sample-rate = <600000>; + qcom,dmic-sample-rate = <4800000>; status = "okay"; }; diff --git a/dts/src/arm64/qcom/sc8280xp.dtsi b/dts/src/arm64/qcom/sc8280xp.dtsi index 0d02599d88..42bfa9fa5b 100644 --- a/dts/src/arm64/qcom/sc8280xp.dtsi +++ b/dts/src/arm64/qcom/sc8280xp.dtsi @@ -2504,12 +2504,12 @@ qcom,ports-sinterval-low = /bits/ 8 <0x03 0x1f 0x1f 0x07 0x00>; qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0B 0x01 0x00>; qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0B 0x00 0x00>; - qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff>; - qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff>; + qcom,ports-hstart = /bits/ 8 <0xff 0x03 0x00 0xff 0xff>; + qcom,ports-hstop = /bits/ 8 <0xff 0x06 0x0f 0xff 0xff>; qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff>; - qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff>; + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0x01 0xff 0xff>; qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00>; - qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0x00>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff>; #sound-dai-cells = <1>; #address-cells = <2>; @@ -2600,7 +2600,7 @@ <&intc GIC_SPI 520 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "core", "wake"; - clocks = <&vamacro>; + clocks = <&txmacro>; clock-names = "iface"; label = "TX"; #sound-dai-cells = <1>; @@ -2609,15 +2609,15 @@ qcom,din-ports = <4>; qcom,dout-ports = <0>; - qcom,ports-sinterval-low = /bits/ 8 <0x01 0x03 0x03 0x03>; - qcom,ports-offset1 = /bits/ 8 <0x01 0x00 0x02 0x01>; + qcom,ports-sinterval-low = /bits/ 8 <0x01 0x01 0x03 0x03>; + qcom,ports-offset1 = /bits/ 8 <0x01 0x00 0x02 0x00>; qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00 0x00>; qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff 0xff>; qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff>; qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff>; - qcom,ports-word-length = /bits/ 8 <0xff 0x00 0xff 0xff>; + qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff>; qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff>; - qcom,ports-lane-control = /bits/ 8 <0x00 0x01 0x00 0x00>; + qcom,ports-lane-control = /bits/ 8 <0x00 0x01 0x00 0x01>; status = "disabled"; }; diff --git a/dts/src/arm64/qcom/sm6115.dtsi b/dts/src/arm64/qcom/sm6115.dtsi index 4d6ec815b7..fbd67d2c8d 100644 --- a/dts/src/arm64/qcom/sm6115.dtsi +++ b/dts/src/arm64/qcom/sm6115.dtsi @@ -1078,6 +1078,7 @@ dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; + status = "disabled"; }; }; diff --git a/dts/src/arm64/qcom/sm6375.dtsi b/dts/src/arm64/qcom/sm6375.dtsi index 31b88c7385..068ee4f724 100644 --- a/dts/src/arm64/qcom/sm6375.dtsi +++ b/dts/src/arm64/qcom/sm6375.dtsi @@ -1209,6 +1209,7 @@ clock-names = "xo"; power-domains = <&rpmpd SM6375_VDDCX>; + power-domain-names = "cx"; memory-region = <&pil_cdsp_mem>; diff --git a/dts/src/arm64/qcom/sm8150.dtsi b/dts/src/arm64/qcom/sm8150.dtsi index fd20096cfc..13e0ce8286 100644 --- a/dts/src/arm64/qcom/sm8150.dtsi +++ b/dts/src/arm64/qcom/sm8150.dtsi @@ -1826,7 +1826,7 @@ "slave_q2a", "tbu"; - iommus = <&apps_smmu 0x1d80 0x7f>; + iommus = <&apps_smmu 0x1d80 0x3f>; iommu-map = <0x0 &apps_smmu 0x1d80 0x1>, <0x100 &apps_smmu 0x1d81 0x1>; @@ -1925,7 +1925,7 @@ assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>; assigned-clock-rates = <19200000>; - iommus = <&apps_smmu 0x1e00 0x7f>; + iommus = <&apps_smmu 0x1e00 0x3f>; iommu-map = <0x0 &apps_smmu 0x1e00 0x1>, <0x100 &apps_smmu 0x1e01 0x1>; diff --git a/dts/src/arm64/qcom/sm8250-xiaomi-elish.dts b/dts/src/arm64/qcom/sm8250-xiaomi-elish.dts index acaa99c5ff..a85d47f7a9 100644 --- a/dts/src/arm64/qcom/sm8250-xiaomi-elish.dts +++ b/dts/src/arm64/qcom/sm8250-xiaomi-elish.dts @@ -625,6 +625,6 @@ }; &venus { - firmware-name = "qcom/sm8250/elish/venus.mbn"; + firmware-name = "qcom/sm8250/xiaomi/elish/venus.mbn"; status = "okay"; }; diff --git a/dts/src/arm64/qcom/sm8350.dtsi b/dts/src/arm64/qcom/sm8350.dtsi index 1c97e28da6..1a5a612d42 100644 --- a/dts/src/arm64/qcom/sm8350.dtsi +++ b/dts/src/arm64/qcom/sm8350.dtsi @@ -1664,6 +1664,7 @@ power-domains = <&gcc UFS_PHY_GDSC>; iommus = <&apps_smmu 0xe0 0x0>; + dma-coherent; clock-names = "core_clk", diff --git a/dts/src/arm64/qcom/sm8450.dtsi b/dts/src/arm64/qcom/sm8450.dtsi index 1a744a33bc..b285b1530c 100644 --- a/dts/src/arm64/qcom/sm8450.dtsi +++ b/dts/src/arm64/qcom/sm8450.dtsi @@ -2143,8 +2143,8 @@ <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, <&vamacro>; clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; - assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, - <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; assigned-clock-rates = <19200000>, <19200000>; #clock-cells = <0>; @@ -4003,6 +4003,7 @@ power-domains = <&gcc UFS_PHY_GDSC>; iommus = <&apps_smmu 0xe0 0x0>; + dma-coherent; interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>; diff --git a/dts/src/arm64/qcom/sm8550.dtsi b/dts/src/arm64/qcom/sm8550.dtsi index ff4d342c07..5d0888398b 100644 --- a/dts/src/arm64/qcom/sm8550.dtsi +++ b/dts/src/arm64/qcom/sm8550.dtsi @@ -66,7 +66,7 @@ CPU0: cpu@0 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a510"; reg = <0 0>; enable-method = "psci"; next-level-cache = <&L2_0>; @@ -89,7 +89,7 @@ CPU1: cpu@100 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a510"; reg = <0 0x100>; enable-method = "psci"; next-level-cache = <&L2_100>; @@ -108,7 +108,7 @@ CPU2: cpu@200 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a510"; reg = <0 0x200>; enable-method = "psci"; next-level-cache = <&L2_200>; @@ -127,7 +127,7 @@ CPU3: cpu@300 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a715"; reg = <0 0x300>; enable-method = "psci"; next-level-cache = <&L2_300>; @@ -146,7 +146,7 @@ CPU4: cpu@400 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a715"; reg = <0 0x400>; enable-method = "psci"; next-level-cache = <&L2_400>; @@ -165,7 +165,7 @@ CPU5: cpu@500 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a710"; reg = <0 0x500>; enable-method = "psci"; next-level-cache = <&L2_500>; @@ -184,7 +184,7 @@ CPU6: cpu@600 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-a710"; reg = <0 0x600>; enable-method = "psci"; next-level-cache = <&L2_600>; @@ -203,7 +203,7 @@ CPU7: cpu@700 { device_type = "cpu"; - compatible = "qcom,kryo"; + compatible = "arm,cortex-x3"; reg = <0 0x700>; enable-method = "psci"; next-level-cache = <&L2_700>; @@ -1905,6 +1905,7 @@ required-opps = <&rpmhpd_opp_nom>; iommus = <&apps_smmu 0x60 0x0>; + dma-coherent; interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>; @@ -1997,7 +1998,7 @@ lpass_tlmm: pinctrl@6e80000 { compatible = "qcom,sm8550-lpass-lpi-pinctrl"; reg = <0 0x06e80000 0 0x20000>, - <0 0x0725a000 0 0x10000>; + <0 0x07250000 0 0x10000>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&lpass_tlmm 0 0 23>; @@ -2691,7 +2692,7 @@ pins = "gpio28", "gpio29"; function = "qup1_se0"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; qup_i2c1_data_clk: qup-i2c1-data-clk-state { @@ -2699,7 +2700,7 @@ pins = "gpio32", "gpio33"; function = "qup1_se1"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; qup_i2c2_data_clk: qup-i2c2-data-clk-state { @@ -2707,7 +2708,7 @@ pins = "gpio36", "gpio37"; function = "qup1_se2"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; qup_i2c3_data_clk: qup-i2c3-data-clk-state { @@ -2715,7 +2716,7 @@ pins = "gpio40", "gpio41"; function = "qup1_se3"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; qup_i2c4_data_clk: qup-i2c4-data-clk-state { @@ -2723,7 +2724,7 @@ pins = "gpio44", "gpio45"; function = "qup1_se4"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; qup_i2c5_data_clk: qup-i2c5-data-clk-state { @@ -2731,7 +2732,7 @@ pins = "gpio52", "gpio53"; function = "qup1_se5"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; qup_i2c6_data_clk: qup-i2c6-data-clk-state { @@ -2739,7 +2740,7 @@ pins = "gpio48", "gpio49"; function = "qup1_se6"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; qup_i2c8_data_clk: qup-i2c8-data-clk-state { @@ -2747,14 +2748,14 @@ pins = "gpio57"; function = "qup2_se0_l1_mira"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; sda-pins { pins = "gpio56"; function = "qup2_se0_l0_mira"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; }; @@ -2763,7 +2764,7 @@ pins = "gpio60", "gpio61"; function = "qup2_se1"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; qup_i2c10_data_clk: qup-i2c10-data-clk-state { @@ -2771,7 +2772,7 @@ pins = "gpio64", "gpio65"; function = "qup2_se2"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; qup_i2c11_data_clk: qup-i2c11-data-clk-state { @@ -2779,7 +2780,7 @@ pins = "gpio68", "gpio69"; function = "qup2_se3"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; qup_i2c12_data_clk: qup-i2c12-data-clk-state { @@ -2787,7 +2788,7 @@ pins = "gpio2", "gpio3"; function = "qup2_se4"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; qup_i2c13_data_clk: qup-i2c13-data-clk-state { @@ -2795,7 +2796,7 @@ pins = "gpio80", "gpio81"; function = "qup2_se5"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; qup_i2c15_data_clk: qup-i2c15-data-clk-state { @@ -2803,7 +2804,7 @@ pins = "gpio72", "gpio106"; function = "qup2_se7"; drive-strength = <2>; - bias-pull-up; + bias-pull-up = <2200>; }; qup_spi0_cs: qup-spi0-cs-state { diff --git a/include/filetype.h b/include/filetype.h index 1a7d145555..783418c652 100644 --- a/include/filetype.h +++ b/include/filetype.h @@ -59,6 +59,7 @@ enum filetype { filetype_rockchip_rkns_image, filetype_fip, filetype_qemu_fw_cfg, + filetype_nxp_fspi_image, filetype_max, }; diff --git a/include/linux/clk.h b/include/linux/clk.h index bffed2bdcf..29c697a00b 100644 --- a/include/linux/clk.h +++ b/include/linux/clk.h @@ -686,7 +686,7 @@ struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec); unsigned int of_clk_get_parent_count(struct device_node *np); int of_clk_parent_fill(struct device_node *np, const char **parents, unsigned int size); -int of_clk_init(struct device_node *root, const struct of_device_id *matches); +int of_clk_init(void); int of_clk_add_provider(struct device_node *np, struct clk *(*clk_src_get)(struct of_phandle_args *args, void *data), @@ -742,8 +742,7 @@ static inline unsigned int of_clk_get_parent_count(struct device_node *np) { return 0; } -static inline int of_clk_init(struct device_node *root, - const struct of_device_id *matches) +static inline int of_clk_init(void) { return 0; } diff --git a/include/linux/mdio.h b/include/linux/mdio.h index a4aee49d8d..c441a074ec 100644 --- a/include/linux/mdio.h +++ b/include/linux/mdio.h @@ -13,6 +13,7 @@ #include <linux/types.h> #include <linux/mii.h> +#include <init.h> /* MDIO Manageable Devices (MMDs). */ #define MDIO_MMD_PMAPMD 1 /* Physical Medium Attachment/ diff --git a/include/mach/imx/bbu.h b/include/mach/imx/bbu.h index c9b239c698..451ae15740 100644 --- a/include/mach/imx/bbu.h +++ b/include/mach/imx/bbu.h @@ -26,6 +26,8 @@ struct imx_dcd_v2_entry; */ #define IMX_BBU_FLAG_PARTITION_STARTS_AT_HEADER (1 << 17) +#define IMX_BBU_FLAG_ERASE BIT(30) + /* * The upper 16 bit of the flags passes to the below functions are reserved * for i.MX specific flags @@ -84,6 +86,10 @@ int imx8m_bbu_internal_mmcboot_register_handler(const char *name, const char *de int imx_bbu_external_nor_register_handler(const char *name, const char *devicefile, unsigned long flags); +int imx8m_bbu_internal_flexspi_nor_register_handler(const char *name, + const char *devicefile, + unsigned long flags); + #else static inline int imx51_bbu_internal_mmc_register_handler(const char *name, const char *devicefile, @@ -196,6 +202,13 @@ imx7_bbu_internal_spi_i2c_register_handler(const char *name, char *devicefile, return -ENOSYS; } +static inline int +imx8m_bbu_internal_flexspi_nor_register_handler(const char *name, const char *devicefile, + unsigned long flags); +{ + return -ENOSYS; +} + #endif #if defined(CONFIG_BAREBOX_UPDATE_IMX_EXTERNAL_NAND) diff --git a/include/mach/imx/imx-header.h b/include/mach/imx/imx-header.h index 8e968e6efb..b11b57c372 100644 --- a/include/mach/imx/imx-header.h +++ b/include/mach/imx/imx-header.h @@ -97,6 +97,8 @@ static inline bool is_imx_flash_header_v2(const void *blob) struct config_data { uint32_t image_load_addr; uint32_t image_ivt_offset; + uint32_t image_flexspi_ivt_offset; + uint32_t image_flexspi_fcfb_offset; uint32_t image_size; uint32_t max_load_size; uint32_t load_size; @@ -149,4 +151,120 @@ enum imx_dcd_v2_check_cond { until_any_bit_set = 3, /* until ((*address & mask) != 0) { ...} */ } __attribute__((packed)); +/* FlexSPI conifguration block FCFB */ +#define FCFB_HEAD_TAG 0x46434642 /* "FCFB" */ +#define FCFB_VERSION 0x56010000 /* V<major><minor><bugfix> = V100 */ +#define FCFB_SAMLPE_CLK_SRC_INTERNAL 0 +#define FCFB_DEVTYPE_SERIAL_NOR 1 +#define FCFB_SFLASH_PADS_SINGLE 1 +#define FCFB_SFLASH_PADS_DUAL 2 +#define FCFB_SFLASH_PADS_QUAD 4 +#define FCFB_SFLASH_PADS_OCTAL 8 +#define FCFB_SERIAL_CLK_FREQ_30MHZ 1 +#define FCFB_SERIAL_CLK_FREQ_50MHZ 2 +#define FCFB_SERIAL_CLK_FREQ_60MHZ 3 +#define FCFB_SERIAL_CLK_FREQ_75MHZ 4 +#define FCFB_SERIAL_CLK_FREQ_80MHZ 5 +#define FCFB_SERIAL_CLK_FREQ_100MHZ 6 +#define FCFB_SERIAL_CLK_FREQ_133MHZ 7 +#define FCFB_SERIAL_CLK_FREQ_166MHZ 8 + +/* Instruction set for the LUT register. */ +#define LUT_STOP 0x00 +#define LUT_CMD 0x01 +#define LUT_ADDR 0x02 +#define LUT_CADDR_SDR 0x03 +#define LUT_MODE 0x04 +#define LUT_MODE2 0x05 +#define LUT_MODE4 0x06 +#define LUT_MODE8 0x07 +#define LUT_NXP_WRITE 0x08 +#define LUT_NXP_READ 0x09 +#define LUT_LEARN_SDR 0x0A +#define LUT_DATSZ_SDR 0x0B +#define LUT_DUMMY 0x0C +#define LUT_DUMMY_RWDS_SDR 0x0D +#define LUT_JMP_ON_CS 0x1F +#define LUT_CMD_DDR 0x21 +#define LUT_ADDR_DDR 0x22 +#define LUT_CADDR_DDR 0x23 +#define LUT_MODE_DDR 0x24 +#define LUT_MODE2_DDR 0x25 +#define LUT_MODE4_DDR 0x26 +#define LUT_MODE8_DDR 0x27 +#define LUT_WRITE_DDR 0x28 +#define LUT_READ_DDR 0x29 +#define LUT_LEARN_DDR 0x2A +#define LUT_DATSZ_DDR 0x2B +#define LUT_DUMMY_DDR 0x2C +#define LUT_DUMMY_RWDS_DDR 0x2D + +/* + * Macro for constructing the LUT entries with the following + * register layout: + * + * ----------------------- + * | INSTR | PAD | OPRND | + * ----------------------- + */ +#define PAD_SHIFT 8 +#define INSTR_SHIFT 10 +#define OPRND_SHIFT 16 + +/* Macros for constructing the LUT register. */ +#define LUT_DEF(ins, pad, opr) \ + (((ins) << INSTR_SHIFT) | ((pad) << PAD_SHIFT) | (opr)) + +struct imx_fcfb_common { + uint32_t tag; + uint32_t version; + uint32_t reserved1; + uint8_t read_sample; + uint8_t datahold; + uint8_t datasetup; + uint8_t coladdrwidth; + uint8_t devcfgenable; + uint8_t reserved2[3]; + uint32_t devmodeseq; + uint32_t devmodearg; + uint8_t cmd_enable; + uint8_t reserved3[3]; + uint32_t cmd_seq[4]; + uint32_t cmd_arg[4]; + uint32_t controllermisc; + uint8_t dev_type; + uint8_t sflash_pad; + uint8_t serial_clk; + uint8_t lut_custom; + uint32_t reserved4[2]; + uint32_t sflashA1; + uint32_t sflashA2; + uint32_t sflashB1; + uint32_t sflashB2; + uint32_t cspadover; + uint32_t sclkpadover; + uint32_t datapadover; + uint32_t dqspadover; + uint32_t timeout_ms; + uint32_t commandInt_ns; + uint32_t datavalid_ns; + uint16_t busyoffset; + uint16_t busybitpolarity; + struct { + struct { + uint16_t instr[8]; + } seq[16]; + } lut; + uint16_t lut_custom_seq[24]; + uint8_t reserved5[16]; +} __attribute__((packed)); + +struct imx_fcfb_nor { + struct imx_fcfb_common memcfg; + uint32_t page_sz; + uint32_t sector_sz; + uint32_t ipcmd_serial_clk; + uint8_t reserved[52]; +} __attribute__((packed)); + #endif diff --git a/include/mach/imx/xload.h b/include/mach/imx/xload.h index 88757c7ebf..a52b1e8ea1 100644 --- a/include/mach/imx/xload.h +++ b/include/mach/imx/xload.h @@ -17,6 +17,9 @@ int imx7_nand_start_image(void); int imx8m_esdhc_load_image(int instance, bool start); int imx8mn_esdhc_load_image(int instance, bool start); int imx8mp_esdhc_load_image(int instance, bool start); +int imx8mm_qspi_load_image(int instance, bool start); +int imx8mn_qspi_load_image(int instance, bool start); +int imx8mp_qspi_load_image(int instance, bool start); void imx8mm_load_bl33(void *bl33); void imx8mn_load_bl33(void *bl33); @@ -26,6 +29,11 @@ void __noreturn imx8mm_load_and_start_image_via_tfa(void); void __noreturn imx8mn_load_and_start_image_via_tfa(void); void __noreturn imx8mp_load_and_start_image_via_tfa(void); +int imx_load_image(ptrdiff_t address, ptrdiff_t entry, u32 offset, + u32 ivt_offset, bool start, unsigned int alignment, + int (*read)(void *dest, size_t len, void *priv), + void *priv); + int imx_image_size(void); int piggydata_size(void); diff --git a/include/of.h b/include/of.h index 106a570418..4b0266fd31 100644 --- a/include/of.h +++ b/include/of.h @@ -301,7 +301,6 @@ extern void of_platform_device_dummy_drv(struct device *dev); extern int of_platform_populate(struct device_node *root, const struct of_device_id *matches, struct device *parent); -extern struct device *of_platform_device_create_root(struct device_node *np); extern struct device *of_find_device_by_node(struct device_node *np); extern struct device *of_device_enable_and_register(struct device_node *np); extern struct device *of_device_enable_and_register_by_name(const char *name); diff --git a/include/spi/flash.h b/include/spi/flash.h deleted file mode 100644 index 796d649d9a..0000000000 --- a/include/spi/flash.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef LINUX_SPI_FLASH_H -#define LINUX_SPI_FLASH_H - -struct mtd_partition; - -/** - * struct flash_platform_data: board-specific flash data - * @name: optional flash device name (eg, as used with mtdparts=) - * @parts: optional array of mtd_partitions for static partitioning - * @nr_parts: number of mtd_partitions for static partitoning - * @type: optional flash device type (e.g. m25p80 vs m25p64), for use - * with chips that can't be queried for JEDEC or other IDs - * - * Board init code (in arch/.../mach-xxx/board-yyy.c files) can - * provide information about SPI flash parts (such as DataFlash) to - * help set up the device and its appropriate default partitioning. - * - * Note that for DataFlash, sizes for pages, blocks, and sectors are - * rarely powers of two; and partitions should be sector-aligned. - */ -struct flash_platform_data { - char *name; - struct mtd_partition *parts; - unsigned int nr_parts; - char *type; - - /* we'll likely add more ... use JEDEC IDs, etc */ -}; - -#endif diff --git a/lib/libfile.c b/lib/libfile.c index b967232d19..ebd1de3d8e 100644 --- a/lib/libfile.c +++ b/lib/libfile.c @@ -542,8 +542,10 @@ int compare_file(const char *f1, const char *f2) if (ret) goto err_out2; - if (s1.st_size != s2.st_size) - return 1; + if (s1.st_size != s2.st_size) { + ret = 1; + goto err_out2; + } buf1 = xmalloc(RW_BUF_SIZE); buf2 = xmalloc(RW_BUF_SIZE); diff --git a/scripts/imx/imx-image.c b/scripts/imx/imx-image.c index 439912a805..1f96b38390 100644 --- a/scripts/imx/imx-image.c +++ b/scripts/imx/imx-image.c @@ -20,6 +20,7 @@ #include "imx.h" #include <include/filetype.h> +#include <include/linux/sizes.h> #define FLASH_HEADER_OFFSET 0x400 #define ARM_HEAD_SIZE_INDEX (ARM_HEAD_SIZE_OFFSET / sizeof(uint32_t)) @@ -34,7 +35,7 @@ static uint32_t dcdtable[MAX_DCD]; static int curdcd; -static int create_usb_image; +static bool create_usb_image; static char *prgname; /* @@ -289,17 +290,30 @@ static int write_mem_v1(uint32_t addr, uint32_t val, int width, int set_bits, in return 0; } +static bool flexspi_image(const struct config_data *data) +{ + /* + * | FlexSPI-FCFB | FlexSPI-IVT + * ----------------------------------------- + * i.MX8MM | 0x0 | 0x1000 + * i.MX8MN/P | 0x400 | 0x0 + */ + + return data->image_flexspi_ivt_offset || data->image_flexspi_fcfb_offset; +} + /* * ============================================================================ * i.MX flash header v2 handling. Found on i.MX50, i.MX53 and i.MX6 * ============================================================================ */ -static size_t add_header_v2(const struct config_data *data, void *buf) +static size_t +add_header_v2(const struct config_data *data, void *buf, uint32_t offset, + size_t header_len) { struct imx_flash_header_v2 *hdr; int dcdsize = curdcd * sizeof(uint32_t); - int offset = data->image_ivt_offset; uint32_t loadaddr = data->image_load_addr; uint32_t imagesize = data->load_size; @@ -308,7 +322,7 @@ static size_t add_header_v2(const struct config_data *data, void *buf) * Restrict the imagesize to the PBL if given. * Also take the alignment for CSF into account. */ - imagesize = roundup(data->pbl_code_size + HEADER_LEN, 0x4); + imagesize = roundup(data->pbl_code_size + header_len, 0x4); if (data->csf) imagesize = roundup(imagesize, 0x1000); } @@ -320,7 +334,7 @@ static size_t add_header_v2(const struct config_data *data, void *buf) hdr->header.length = htobe16(32); hdr->header.version = IVT_VERSION; - hdr->entry = loadaddr + HEADER_LEN; + hdr->entry = loadaddr + header_len; if (dcdsize) hdr->dcd_ptr = loadaddr + offset + offsetof(struct imx_flash_header_v2, dcd_header); if (create_usb_image) { @@ -362,6 +376,114 @@ static size_t add_header_v2(const struct config_data *data, void *buf) return imagesize; } +#define LUT_PAD_1 0 +#define LUT_PAD_2 1 +#define LUT_PAD_4 2 +#define LUT_PAD_8 3 + +static size_t add_flexspi_fcfb_header(const struct config_data *data, void *buf) +{ + uint32_t fcfb_offset = data->image_flexspi_fcfb_offset; + const struct imx_fcfb_nor nor_conf = { + .memcfg = { + .tag = htobe32(FCFB_HEAD_TAG), + .version = htole32(FCFB_VERSION), + .read_sample = FCFB_SAMLPE_CLK_SRC_INTERNAL, + /* flash CS hold time, recommended by RM */ + .datahold = 0x03, + /* flash CS setup time, recommended by RM */ + .datasetup = 0x03, + /* 3 - Hyperflash, 12/13 serial NAND, 0 - other */ + .coladdrwidth = 0, + .devcfgenable = 0, + .cmd_enable = 0, + .controllermisc = 0, + .dev_type = FCFB_DEVTYPE_SERIAL_NOR, + .sflash_pad = FCFB_SFLASH_PADS_SINGLE, + .serial_clk = FCFB_SERIAL_CLK_FREQ_50MHZ, + .sflashA1 = htole32(SZ_256M), + .lut.seq[0] = { + .instr = { + htole16(LUT_DEF(LUT_CMD, LUT_PAD_1, 0x0b)), + htole16(LUT_DEF(LUT_ADDR, LUT_PAD_1, 24)), + htole16(LUT_DEF(LUT_DUMMY, LUT_PAD_1, 8)), + htole16(LUT_DEF(LUT_NXP_READ, LUT_PAD_1, 4)), + htole16(LUT_DEF(LUT_STOP, LUT_PAD_1, 0)), + }, + }, + }, + }; + + buf += fcfb_offset; + memcpy(buf, &nor_conf, sizeof(nor_conf)); + + return sizeof(nor_conf); +} + +#define FLEXSPI_HEADER_LEN HEADER_LEN + +static size_t +add_flexspi_header(const struct config_data *data, void **_buf, size_t *header_len) +{ + uint32_t ivt_offset = data->image_flexspi_ivt_offset; + size_t size; + size_t len; + void *buf; + + if (!flexspi_image(data)) + return 0; + + if (data->signed_hdmi_firmware_file) { + free(*_buf); + fprintf(stderr, "Signed HDMI firmware and FlexSPI compatible image is not supported!\n"); + exit(1); + } + + /* + * Extend the header to be able to build build one image which can be + * used for: USB/SD/eMMC/eMMC-Boot/QSPI/barebox-chainload. + */ + buf = realloc(*_buf, *header_len + FLEXSPI_HEADER_LEN); + if (!buf) + exit(1); + + *_buf = buf; + + size = add_flexspi_fcfb_header(data, buf); + + /* + * The following table list the offsets we need to ensure for + * the one image approach. + * + * | i.MX8MM | i.MX8MN/P | + * -----------------------------+---------+-----------+ + * SD/eMMC primary image offset | 0 | 0/32K | + * FlexSPI primary image offset | 0 | 4K | + * SD/eMMC-IVT offset | 1K | 0 | + * SD/eMMC-IVT image entry | 8K | 8K | + * FlexSPI-IVT offset | 4K | 0 | + * FlexSPI-IVT image entry | 8K | 4K | + * + * According the above table the rom-loader for i.MX8MM will + * search for the image on the same place (8K). On the other + * hand the rom-loader for the i.MX8MN/P will look for it at + * 8K for SD/eMMC case or at 4K for FlexSPI case. + */ + len = *header_len; + if (data->cpu_type == IMX_CPU_IMX8MM) + len += FLEXSPI_HEADER_LEN; + + if (data->cpu_type == IMX_CPU_IMX8MP || + data->cpu_type == IMX_CPU_IMX8MN) + buf += SZ_4K; + + size += add_header_v2(data, buf, ivt_offset, len); + + *header_len += FLEXSPI_HEADER_LEN; + + return size; +} + static void usage(const char *prgname) { fprintf(stderr, "usage: %s [OPTIONS]\n\n" @@ -739,9 +861,9 @@ int main(int argc, char *argv[]) void *infile; struct stat s; int outfd; - int dcd_only = 0; + bool dcd_only = false; int now = 0; - int add_barebox_header = 0; + bool add_barebox_header = false; uint32_t barebox_image_size = 0; struct config_data data = { .image_ivt_offset = 0xffffffff, @@ -771,16 +893,16 @@ int main(int argc, char *argv[]) data.pbl_code_size = strtoul(optarg, NULL, 0); break; case 'b': - add_barebox_header = 1; + add_barebox_header = true; break; case 'd': - dcd_only = 1; + dcd_only = true; break; case 's': data.sign_image = 1; break; case 'u': - create_usb_image = 1; + create_usb_image = true; break; case 'e': data.encrypt_image = 1; @@ -904,8 +1026,10 @@ int main(int argc, char *argv[]) } } + barebox_image_size += add_flexspi_header(&data, &buf, &header_len); barebox_image_size += add_header_v2(&data, buf + - signed_hdmi_firmware_size); + signed_hdmi_firmware_size, + data.image_ivt_offset, header_len); break; default: fprintf(stderr, "Congratulations! You're welcome to implement header version %d\n", diff --git a/scripts/imx/imx.c b/scripts/imx/imx.c index 87560ad27d..e3169bace6 100644 --- a/scripts/imx/imx.c +++ b/scripts/imx/imx.c @@ -609,6 +609,26 @@ do_signed_hdmi_firmware(struct config_data *data, int argc, char *argv[]) return 0; } +static int do_flexspi_ivtofs(struct config_data *data, int argc, char *argv[]) +{ + if (argc < 2) + return -EINVAL; + + data->image_flexspi_ivt_offset = strtoul(argv[1], NULL, 0); + + return 0; +} + +static int do_flexspi_fcfbofs(struct config_data *data, int argc, char *argv[]) +{ + if (argc < 2) + return -EINVAL; + + data->image_flexspi_fcfb_offset = strtoul(argv[1], NULL, 0); + + return 0; +} + struct command cmds[] = { { .name = "wm", @@ -667,6 +687,12 @@ struct command cmds[] = { }, { .name = "signed_hdmi_firmware", .parse = do_signed_hdmi_firmware, + }, { + .name = "flexspi_fcfbofs", + .parse = do_flexspi_fcfbofs, + }, { + .name = "flexspi_ivtofs", + .parse = do_flexspi_ivtofs, }, }; @@ -675,6 +701,7 @@ static char *readcmd(struct config_data *data, FILE *f) static char *buf; char *str; ssize_t ret; + int inquotes = 0; if (!buf) { buf = malloc(4096); @@ -689,8 +716,9 @@ static char *readcmd(struct config_data *data, FILE *f) ret = fread(str, 1, 1, f); if (!ret) return strlen(buf) ? buf : NULL; - - if (*str == '\n' || *str == ';') { + if (*str == '"') { + inquotes = !inquotes; + } else if ((*str == '\n' || *str == ';') && !inquotes) { *str = 0; return buf; } diff --git a/scripts/regsubst.pl b/scripts/regsubst.pl index 026c4eed2f..1aaab4f6a2 100755 --- a/scripts/regsubst.pl +++ b/scripts/regsubst.pl @@ -47,8 +47,8 @@ First you have to add the right #include directives to your file: loadaddr 0x20000000 ivtofs 0x400 - #include <mach/imx6-ddr-regs.h> - #include <mach/imx6dl-ddr-regs.h> + #include <mach/imx/imx6-ddr-regs.h> + #include <mach/imx/imx6dl-ddr-regs.h> wm 32 0x020e0774 0x000C0000 wm 32 0x020e0754 0x00000000 @@ -61,8 +61,8 @@ Then you can process the file with B<regsubst.pl>: loadaddr 0x20000000 ivtofs 0x400 - #include <mach/imx6-ddr-regs.h> - #include <mach/imx6dl-ddr-regs.h> + #include <mach/imx/imx6-ddr-regs.h> + #include <mach/imx/imx6dl-ddr-regs.h> wm 32 MX6_IOM_GRP_DDR_TYPE 0x000C0000 wm 32 MX6_IOM_GRP_DDRPKE 0x00000000 diff --git a/scripts/socfpga_xml_to_config.sh b/scripts/socfpga_xml_to_config.sh index 1e6056cfb4..2ec2788865 100755 --- a/scripts/socfpga_xml_to_config.sh +++ b/scripts/socfpga_xml_to_config.sh @@ -41,7 +41,7 @@ pll_config() { sed -e "s/^/\t./g" | sort` - echo "#include <mach/arria10-clock-manager.h>" > $tgt + echo "#include <mach/socfpga/arria10-clock-manager.h>" > $tgt echo >> $tgt echo "static struct arria10_mainpll_cfg mainpll_cfg = {" >> $tgt echo "$MAINPLL" >> $tgt @@ -107,7 +107,7 @@ pinmux_config() { sed -e "s/\.sel' value='/] = /g" | \ sed -e "s/' \/>/,/g"` - echo "#include <mach/arria10-pinmux.h>" > $tgt + echo "#include <mach/socfpga/arria10-pinmux.h>" > $tgt echo >> $tgt echo "static uint32_t pinmux[] = {" >> $tgt echo "$SHARED" >> $tgt diff --git a/test/emulate.pl b/test/emulate.pl index b5e2188b86..a4ca6b7aee 100755 --- a/test/emulate.pl +++ b/test/emulate.pl @@ -18,6 +18,17 @@ my @QEMU_INTERACTIVE_OPTS = qw(-serial mon:stdio -trace file=/dev/null); my %targets; +my $LG_BUILDDIR; + +if (exists $ENV{KBUILD_OUTPUT}) { + $LG_BUILDDIR = $ENV{KBUILD_OUTPUT}; +} elsif (-d 'build') { + $LG_BUILDDIR = 'build'; +} else { + $LG_BUILDDIR = getcwd(); +} + + for my $arch (glob dirname(__FILE__) . "/*/") { for my $cfg (glob "$arch/*.yaml") { my $linkdest = readlink $cfg // ''; @@ -152,7 +163,7 @@ sub process { or die "Failed to download resource `$v': $?\n"; } - symlink_force("$dir/$k", "$k") unless $tuxmake; + symlink_force("$dir/$k", "$LG_BUILDDIR/$k") unless $tuxmake; } if ($shell) { @@ -388,20 +399,11 @@ sub rel2abs { sub abs_configpath { my ($path, $args) = @_; - my $LG_BUILDDIR; return unless defined $path; $path = $args->{target}{images}{$path}; return unless defined $path; - if (exists $ENV{KBUILD_OUTPUT}) { - $LG_BUILDDIR = $ENV{KBUILD_OUTPUT}; - } elsif (-d 'build') { - $LG_BUILDDIR = 'build'; - } else { - $LG_BUILDDIR = getcwd(); - } - $path =~ s/\$LG_BUILDDIR\b/$LG_BUILDDIR/g; return rel2abs($path, $args->{builddir}) diff --git a/test/riscv/qemu@virt64_defconfig.yaml b/test/riscv/qemu-virt64@rv64i_defconfig.yaml index fefbd20e5c..fefbd20e5c 100644 --- a/test/riscv/qemu@virt64_defconfig.yaml +++ b/test/riscv/qemu-virt64@rv64i_defconfig.yaml diff --git a/test/riscv/rv64i_defconfig.yaml b/test/riscv/rv64i_defconfig.yaml new file mode 120000 index 0000000000..46080baed6 --- /dev/null +++ b/test/riscv/rv64i_defconfig.yaml @@ -0,0 +1 @@ +qemu-virt64@rv64i_defconfig.yaml
\ No newline at end of file diff --git a/test/riscv/sifive_defconfig.yaml b/test/riscv/sifive@rv64i_defconfig.yaml index f7299453a4..f7299453a4 100644 --- a/test/riscv/sifive_defconfig.yaml +++ b/test/riscv/sifive@rv64i_defconfig.yaml diff --git a/test/riscv/tinyemu@virt64_defconfig.yaml b/test/riscv/tinyemu@rv64i_defconfig.yaml index e9624160ef..e9624160ef 100644 --- a/test/riscv/tinyemu@virt64_defconfig.yaml +++ b/test/riscv/tinyemu@rv64i_defconfig.yaml diff --git a/test/riscv/virt64_defconfig.yaml b/test/riscv/virt64_defconfig.yaml deleted file mode 120000 index ab419d5e7f..0000000000 --- a/test/riscv/virt64_defconfig.yaml +++ /dev/null @@ -1 +0,0 @@ -qemu@virt64_defconfig.yaml
\ No newline at end of file diff --git a/test/self/Makefile b/test/self/Makefile index 4d2c0374c9..d55d9133be 100644 --- a/test/self/Makefile +++ b/test/self/Makefile @@ -8,3 +8,6 @@ obj-$(CONFIG_SELFTEST_OF_MANIPULATION) += of_manipulation.o of_manipulation.dtb. obj-$(CONFIG_SELFTEST_ENVIRONMENT_VARIABLES) += envvar.o obj-$(CONFIG_SELFTEST_FS_RAMFS) += ramfs.o obj-$(CONFIG_SELFTEST_JSON) += json.o + +clean-files := *.dtb *.dtb.S .*.dtc .*.pre .*.dts *.dtb.z +clean-files += *.dtbo *.dtbo.S .*.dtso |