x86/MPX: fix address size handling

While address overrides are ignored in 64-bit mode (and hence shouldn't
really result in an error, but upon v1 converting this to a warning I
was told otherwise), trying to use 16-bit addressing is documented to
result in #UD, and hence the assembler should reject the attempt. (The
added test case at once also checks that bndc{l,n,u} won't accept
16-bit register operands.)

5 files changed, 223 insertions, 4 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2e14703bc3e..89e4a1ef13c 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,13 @@
 2016-07-01  Jan Beulich  <jbeulich@suse.com>
 
+	* tc-i386.c (md_assemble): Alter address size checking for MPX
+	instructions.
+	* testsuite/gas/i386/mpx-inval-2.s: New.
+	* testsuite/gas/i386/mpx-inval-2.l: New.
+	* testsuite/gas/i386/i386.exp: Run new test.
+
+2016-07-01  Jan Beulich  <jbeulich@suse.com>
+
 	PR gas/20318
 	* config/tc-i386.c (match_template): Add char parameter,
 	consumed in Intel mode for an extra suffix check.
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 9f1b7f0ce2f..db904964c59 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -3666,10 +3666,15 @@ md_assemble (char *line)
   if (i.bnd_prefix && !i.tm.opcode_modifier.bndprefixok)
     as_bad (_("expecting valid branch instruction after `bnd'"));
 
-  if (i.tm.cpu_flags.bitfield.cpumpx
-      && flag_code == CODE_64BIT
-      && i.prefix[ADDR_PREFIX])
-    as_bad (_("32-bit address isn't allowed in 64-bit MPX instructions."));
+  if (i.tm.cpu_flags.bitfield.cpumpx)
+    {
+      if (flag_code == CODE_64BIT && i.prefix[ADDR_PREFIX])
+	as_bad (_("32-bit address isn't allowed in 64-bit MPX instructions."));
+      else if (flag_code != CODE_16BIT
+	       ? i.prefix[ADDR_PREFIX]
+	       : i.mem_operands && !i.prefix[ADDR_PREFIX])
+	as_bad (_("16-bit address isn't allowed in MPX instructions"));
+    }
 
   /* Insert BND prefix.  */
   if (add_bnd_prefix
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 6e002627f00..61b6b2711d9 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -283,6 +283,7 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_dump_test "smap"
     run_dump_test "mpx"
     run_list_test "mpx-inval-1" "-al"
+    run_list_test "mpx-inval-2" "-al"
     run_dump_test "mpx-add-bnd-prefix"
     run_dump_test "sha"
     run_dump_test "clflushopt"
diff --git a/gas/testsuite/gas/i386/mpx-inval-2.l b/gas/testsuite/gas/i386/mpx-inval-2.l
new file mode 100644
index 00000000000..9a6deb09373
--- /dev/null
+++ b/gas/testsuite/gas/i386/mpx-inval-2.l
@@ -0,0 +1,145 @@
+.*: Assembler messages:
+.*:5: Error: 16-bit address isn't allowed in MPX instructions
+.*:6: Error: 16-bit address isn't allowed in MPX instructions
+.*:7: Error: 16-bit address isn't allowed in MPX instructions
+.*:8: Error: 16-bit address isn't allowed in MPX instructions
+.*:9: Error: 16-bit address isn't allowed in MPX instructions
+.*:10: Error: 16-bit address isn't allowed in MPX instructions
+.*:11: Error: 16-bit address isn't allowed in MPX instructions
+.*:12: Error: 16-bit address isn't allowed in MPX instructions
+.*:14: Error: .* `bndcl'
+.*:15: Error: .* `bndcn'
+.*:16: Error: .* `bndcu'
+.*:19: Error: 16-bit address isn't allowed in MPX instructions
+.*:20: Error: 16-bit address isn't allowed in MPX instructions
+.*:21: Error: 16-bit address isn't allowed in MPX instructions
+.*:22: Error: 16-bit address isn't allowed in MPX instructions
+.*:23: Error: 16-bit address isn't allowed in MPX instructions
+.*:24: Error: 16-bit address isn't allowed in MPX instructions
+.*:25: Error: 16-bit address isn't allowed in MPX instructions
+.*:26: Error: 16-bit address isn't allowed in MPX instructions
+.*:28: Error: .* `bndcl'
+.*:29: Error: .* `bndcn'
+.*:30: Error: .* `bndcu'
+.*:35: Error: 16-bit address isn't allowed in MPX instructions
+.*:36: Error: 16-bit address isn't allowed in MPX instructions
+.*:37: Error: 16-bit address isn't allowed in MPX instructions
+.*:38: Error: 16-bit address isn't allowed in MPX instructions
+.*:39: Error: 16-bit address isn't allowed in MPX instructions
+.*:40: Error: 16-bit address isn't allowed in MPX instructions
+.*:41: Error: 16-bit address isn't allowed in MPX instructions
+.*:42: Error: 16-bit address isn't allowed in MPX instructions
+.*:44: Error: .* `bndcl'
+.*:45: Error: .* `bndcn'
+.*:46: Error: .* `bndcu'
+.*:49: Error: 16-bit address isn't allowed in MPX instructions
+.*:50: Error: 16-bit address isn't allowed in MPX instructions
+.*:51: Error: 16-bit address isn't allowed in MPX instructions
+.*:52: Error: 16-bit address isn't allowed in MPX instructions
+.*:53: Error: 16-bit address isn't allowed in MPX instructions
+.*:54: Error: 16-bit address isn't allowed in MPX instructions
+.*:55: Error: 16-bit address isn't allowed in MPX instructions
+.*:56: Error: 16-bit address isn't allowed in MPX instructions
+.*:58: Error: .* `bndcl'
+.*:59: Error: .* `bndcn'
+.*:60: Error: .* `bndcu'
+GAS LISTING .*
+#...
+[ 	]*[1-9][0-9]*[ 	]+mpx32:
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndcl	\(%bx,%si\), %bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndcn	\(%bx,%di\), %bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndcu	\(%bp,%si\), %bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndldx	\(%bp,%di\), %bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndmk	\(%bx\), %bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndmov	\(%bp\), %bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndmov	%bnd0, \(%si\)
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndstx	%bnd0, \(%di\)
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndcl	bnd0, \[bx\]
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndcn	bnd0, \[bp\]
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndcu	bnd0, \[si\]
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndldx	bnd0, \[di\]
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndmk	bnd0, \[bx\+si\]
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndmov	bnd0, \[bx\+di\]
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndmov	\[bp\+si\], bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndstx	\[bp\+di\], bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+mpx16:
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndcl	\(%bx,%si\), %bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndcn	\(%bx,%di\), %bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndcu	\(%bp,%si\), %bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndldx	\(%bp,%di\), %bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndmk	\(%bx\), %bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndmov	\(%bp\), %bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndmov	%bnd0, \(%si\)
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndstx	%bnd0, \(%di\)
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndcl	bnd0, \[bx\]
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndcn	bnd0, \[bp\]
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndcu	bnd0, \[si\]
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndldx	bnd0, \[di\]
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndmk	bnd0, \[bx\+si\]
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndmov	bnd0, \[bx\+di\]
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndmov	\[bp\+si\], bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
+[ 	]*[1-9][0-9]*[ 	]+[?0-9A-F 	]*bndstx	\[bp\+di\], bnd0
+.*  Error: 16-bit address isn't allowed in MPX instructions
+#...
diff --git a/gas/testsuite/gas/i386/mpx-inval-2.s b/gas/testsuite/gas/i386/mpx-inval-2.s
new file mode 100644
index 00000000000..d1c99bfc8bb
--- /dev/null
+++ b/gas/testsuite/gas/i386/mpx-inval-2.s
@@ -0,0 +1,60 @@
+# MPX instructions
+	.text
+	.code32
+mpx32:
+	bndcl	(%bx,%si), %bnd0
+	bndcn	(%bx,%di), %bnd0
+	bndcu	(%bp,%si), %bnd0
+	bndldx	(%bp,%di), %bnd0
+	bndmk	(%bx), %bnd0
+	bndmov	(%bp), %bnd0
+	bndmov	%bnd0, (%si)
+	bndstx	%bnd0, (%di)
+
+	bndcl	%di, %bnd1
+	bndcn	%si, %bnd2
+	bndcu	%bp, %bnd3
+
+	.intel_syntax noprefix
+	bndcl	bnd0, [bx]
+	bndcn	bnd0, [bp]
+	bndcu	bnd0, [si]
+	bndldx	bnd0, [di]
+	bndmk	bnd0, [bx+si]
+	bndmov	bnd0, [bx+di]
+	bndmov	[bp+si], bnd0
+	bndstx	[bp+di], bnd0
+
+	bndcl	bnd3, ax
+	bndcn	bnd2, cx
+	bndcu	bnd1, dx
+
+	.att_syntax prefix
+	.code16
+mpx16:
+	bndcl	(%bx,%si), %bnd0
+	bndcn	(%bx,%di), %bnd0
+	bndcu	(%bp,%si), %bnd0
+	bndldx	(%bp,%di), %bnd0
+	bndmk	(%bx), %bnd0
+	bndmov	(%bp), %bnd0
+	bndmov	%bnd0, (%si)
+	bndstx	%bnd0, (%di)
+
+	bndcl	%di, %bnd1
+	bndcn	%si, %bnd2
+	bndcu	%bp, %bnd3
+
+	.intel_syntax noprefix
+	bndcl	bnd0, [bx]
+	bndcn	bnd0, [bp]
+	bndcu	bnd0, [si]
+	bndldx	bnd0, [di]
+	bndmk	bnd0, [bx+si]
+	bndmov	bnd0, [bx+di]
+	bndmov	[bp+si], bnd0
+	bndstx	[bp+di], bnd0
+
+	bndcl	bnd3, ax
+	bndcn	bnd2, cx
+	bndcu	bnd1, dx