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authorJan Beulich <jbeulich@novell.com>2005-05-25 06:50:23 +0000
committerJan Beulich <jbeulich@novell.com>2005-05-25 06:50:23 +0000
commit3d456fa193c525d78728ce37289c06be939b888c (patch)
tree28ef44aeae38abfea0e7951fc32242cefb4ed3df
parentc7e2e997e4681ed5de3c3b19a583b637dd81332b (diff)
downloadbinutils-gdb-3d456fa193c525d78728ce37289c06be939b888c.tar.gz
gas/testsuite/
2005-05-25 Jan Beulich <jbeulich@novell.com> * gas/i386/intelok.d: Account for 32-bit displacements being shown in hex. opcodes/ 2005-05-25 Jan Beulich <jbeulich@novell.com> * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in hex (but retain it being displayed as signed). Remove redundant checks. Add handling of displacements for 16-bit addressing in Intel mode.
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/i386/intelok.d6
-rw-r--r--opcodes/ChangeLog7
-rw-r--r--opcodes/i386-dis.c66
4 files changed, 64 insertions, 20 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 7705ed47621..14a58c3af22 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2005-05-25 Jan Beulich <jbeulich@novell.com>
+
+ * gas/i386/intelok.d: Account for 32-bit displacements being shown
+ in hex.
+
2005-05-24 H.J. Lu <hongjiu.lu@intel.com>
* gas/elf/group0b.d: Updated.
diff --git a/gas/testsuite/gas/i386/intelok.d b/gas/testsuite/gas/i386/intelok.d
index e8a80a7b42c..fb84866816e 100644
--- a/gas/testsuite/gas/i386/intelok.d
+++ b/gas/testsuite/gas/i386/intelok.d
@@ -104,8 +104,8 @@ Disassembly of section .text:
[ ]*[0-9a-f]+: 8b 40 0c[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+12\]
[ ]*[0-9a-f]+: 8b 40 12[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+18\]
[ ]*[0-9a-f]+: 8b 40 12[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+18\]
-[ ]*[0-9a-f]+: 8b 04 85 02 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*4\+2\]
-[ ]*[0-9a-f]+: 8b 04 85 02 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*4\+2\]
+[ ]*[0-9a-f]+: 8b 04 85 02 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*4\+(0x)?2\]
+[ ]*[0-9a-f]+: 8b 04 85 02 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*4\+(0x)?2\]
[ ]*[0-9a-f]+: 8b 04 45 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*2\]
[ ]*[0-9a-f]+: 8b 04 45 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\*2\]
[ ]*[0-9a-f]+: 8b 04 8d 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[ecx\*4\]
@@ -156,7 +156,7 @@ Disassembly of section .text:
[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\]
[ ]*[0-9a-f]+: 8b 40 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+1]
[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\]
-[ ]*[0-9a-f]+: 8b 80 01 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+1\]
+[ ]*[0-9a-f]+: 8b 80 01 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+(0x)?1\]
[ ]*[0-9a-f]+: 8b 80 00 00 00 00[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\]
[ ]*[0-9a-f]+: 8b 40 01[ ]+mov[ ]+eax,(DWORD PTR )?\[eax\+1\]
[ ]*[0-9a-f]+: a1 01 00 00 00[ ]+mov[ ]+eax,ds:0x1
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 7b57e5b7388..6713f2d4a55 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,12 @@
2005-05-25 Jan Beulich <jbeulich@novell.com>
+ * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
+ hex (but retain it being displayed as signed). Remove redundant
+ checks. Add handling of displacements for 16-bit addressing in Intel
+ mode.
+
+2005-05-25 Jan Beulich <jbeulich@novell.com>
+
* i386-dis.c (prefix_name): Remove pointless mode_64bit check.
(OP_E): Remove redundant REX_EXTZ handling. Remove pointless
masking of 'rm' in 16-bit memory address handling.
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 9a8b73f48cf..16c80b657be 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -3337,22 +3337,23 @@ OP_E (int bytemode, int sizeflag)
oappend (scratchbuf);
}
}
- if (intel_syntax)
- if (mod != 0 || (base & 7) == 5)
- {
- /* Don't print zero displacements. */
- if (disp != 0)
- {
- if ((bfd_signed_vma) disp > 0)
- {
- *obufp++ = '+';
- *obufp = '\0';
- }
-
- print_operand_value (scratchbuf, 0, disp);
- oappend (scratchbuf);
- }
- }
+ if (intel_syntax && disp)
+ {
+ if ((bfd_signed_vma) disp > 0)
+ {
+ *obufp++ = '+';
+ *obufp = '\0';
+ }
+ else if (mod != 1)
+ {
+ *obufp++ = '-';
+ *obufp = '\0';
+ disp = - (bfd_signed_vma) disp;
+ }
+
+ print_operand_value (scratchbuf, mod != 1, disp);
+ oappend (scratchbuf);
+ }
*obufp++ = close_char;
*obufp = '\0';
@@ -3410,10 +3411,41 @@ OP_E (int bytemode, int sizeflag)
{
*obufp++ = open_char;
*obufp = '\0';
- oappend (index16[rm + add]);
+ oappend (index16[rm]);
+ if (intel_syntax && disp)
+ {
+ if ((bfd_signed_vma) disp > 0)
+ {
+ *obufp++ = '+';
+ *obufp = '\0';
+ }
+ else if (mod != 1)
+ {
+ *obufp++ = '-';
+ *obufp = '\0';
+ disp = - (bfd_signed_vma) disp;
+ }
+
+ print_operand_value (scratchbuf, mod != 1, disp);
+ oappend (scratchbuf);
+ }
+
*obufp++ = close_char;
*obufp = '\0';
}
+ else if (intel_syntax)
+ {
+ if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
+ | PREFIX_ES | PREFIX_FS | PREFIX_GS))
+ ;
+ else
+ {
+ oappend (names_seg[ds_reg - es_reg]);
+ oappend (":");
+ }
+ print_operand_value (scratchbuf, 1, disp & 0xffff);
+ oappend (scratchbuf);
+ }
}
}