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| author | Chua Zheng Leong <chuazl@comp.nus.edu.sg> | 2016-05-25 13:09:51 +0100 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2016-05-25 13:09:51 +0100 |
| commit | 934c26326909f953aaa15edb423dd4af6f33c448 (patch) | |
| tree | d8b0fece63410f56a53b6e5a6b0a82ea206c07df | |
| parent | 2bbad2ea1102733a2a4143be4afe195caf730cd0 (diff) | |
| download | binutils-gdb-934c26326909f953aaa15edb423dd4af6f33c448.tar.gz | |
Only generate VMOV.I64 instructions for loading constant floating point values if this instruction is supported by the currently selected fpu.
PR target/2006764
* config/tc-arm.c (move_or_literal_pool): Only generate a VMOV.I64
instruction if supported by the currently selected fpu variant.
* testsuite/gas/arm/vfpv3-ldr_immediate.s: Add test of this PR.
* testsuite/gas/arm/vfpv3-ldr_immediate.d: Update expected disassembly.
| -rw-r--r-- | gas/ChangeLog | 10 | ||||
| -rw-r--r-- | gas/config/tc-arm.c | 2 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/vfpv3-ldr_immediate.d | 1 | ||||
| -rw-r--r-- | gas/testsuite/gas/arm/vfpv3-ldr_immediate.s | 4 |
4 files changed, 14 insertions, 3 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 03f331955c7..39814fcd4d0 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,13 @@ +2016-05-25 Chua Zheng Leong <chuazl@comp.nus.edu.sg> + + PR target/2006764 + * config/tc-arm.c (move_or_literal_pool): Only generate a VMOV.I64 + instruction if supported by the currently selected fpu variant. + * testsuite/gas/arm/vfpv3-ldr_immediate.s: Add test of this PR. + * testsuite/gas/arm/vfpv3-ldr_immediate.d: Update expected disassembly. + 2016-05-24 Maciej W. Rozycki <macro@imgtec.com> - + * config/tc-mips.c (mips_fix_adjustable): Also return 0 for jump relocations against MIPS16 or microMIPS symbols on RELA targets. diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 50a658b8c15..fe46cc43898 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -8000,7 +8000,7 @@ move_or_literal_pool (int i, enum lit_type t, bfd_boolean mode_3) return TRUE; } } - else if (t == CONST_VEC) + else if (t == CONST_VEC && ARM_CPU_HAS_FEATURE (cpu_variant, fpu_neon_ext_v1)) { int op = 0; unsigned immbits = 0; diff --git a/gas/testsuite/gas/arm/vfpv3-ldr_immediate.d b/gas/testsuite/gas/arm/vfpv3-ldr_immediate.d index e443530414b..b5ad34d2752 100644 --- a/gas/testsuite/gas/arm/vfpv3-ldr_immediate.d +++ b/gas/testsuite/gas/arm/vfpv3-ldr_immediate.d @@ -32,4 +32,5 @@ Disassembly of section \.text: 0[0-9a-fx]+ .*(00000000|40400000) .* 0[0-9a-fx]+ .*(40400000|00000000) .* 0[0-9a-fx]+ .*42000000 .* +0[0-9a-fx]+ .*ed1fbb01 vldr d11, \[pc, #-4\].* #pass diff --git a/gas/testsuite/gas/arm/vfpv3-ldr_immediate.s b/gas/testsuite/gas/arm/vfpv3-ldr_immediate.s index 172b57d62d5..542206f38ad 100644 --- a/gas/testsuite/gas/arm/vfpv3-ldr_immediate.s +++ b/gas/testsuite/gas/arm/vfpv3-ldr_immediate.s @@ -42,5 +42,7 @@ vldr s0,=0x42000000 .pool - nop + # PR 20067 + FLDD D11, =0 + .pool |