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| author | James Bowman <james.bowman@ftdichip.com> | 2015-09-29 23:47:34 +0000 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2015-09-29 23:39:24 -0400 |
| commit | 395b0d8a3fdd8915a4897b9b925d56fa42745dcc (patch) | |
| tree | 7d4b430d391c6653320b2a51b0c27f7542cb2272 | |
| parent | 71c34ca7a0f54c8c8ad39b72ea1badf9f9a1ade7 (diff) | |
| download | binutils-gdb-395b0d8a3fdd8915a4897b9b925d56fa42745dcc.tar.gz | |
sim: ft32: correct simulation of MEMCPY and MEMSET
The MEMCPY and MEMSET instructions should only examine the low 15 bits of
their length arguments.
| -rw-r--r-- | sim/ft32/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/ft32/interp.c | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/sim/ft32/ChangeLog b/sim/ft32/ChangeLog index 47218b4e652..f5b14ec15ad 100644 --- a/sim/ft32/ChangeLog +++ b/sim/ft32/ChangeLog @@ -1,5 +1,10 @@ 2015-09-29 James Bowman <james.bowman@ftdichip.com> + * interp.c (step_once): Correct length for MEMSET and MEMCPY + instructions. + +2015-09-29 James Bowman <james.bowman@ftdichip.com> + * interp.c (cpu_mem_write): Do no write PM when locked. 2015-09-22 James Bowman <james.bowman@ftdichip.com> diff --git a/sim/ft32/interp.c b/sim/ft32/interp.c index c769ff7a3be..f7daf1c1679 100644 --- a/sim/ft32/interp.c +++ b/sim/ft32/interp.c @@ -602,7 +602,7 @@ step_once (SIM_DESC sd) uint32_t src = r_1v; uint32_t dst = cpu->state.regs[r_d]; uint32_t i; - for (i = 0; i < rimmv; i++) + for (i = 0; i < (rimmv & 0x7fff); i++) PUT_BYTE (dst + i, GET_BYTE (src + i)); } break; @@ -621,7 +621,7 @@ step_once (SIM_DESC sd) /* memset instruction. */ uint32_t dst = cpu->state.regs[r_d]; uint32_t i; - for (i = 0; i < rimmv; i++) + for (i = 0; i < (rimmv & 0x7fff); i++) PUT_BYTE (dst + i, r_1v); } break; |