diff options
| author | John Baldwin <jhb@FreeBSD.org> | 2017-06-26 18:18:19 -0700 |
|---|---|---|
| committer | John Baldwin <jhb@FreeBSD.org> | 2017-07-11 09:47:14 -0700 |
| commit | 0aa37b654c0f31e446ab47826f0bcbec15d0112f (patch) | |
| tree | 2bb5bea9eb9b56fd636727aceb5f48b376f38be9 | |
| parent | 48aeef91c248291dd03583798904612426b1f40a (diff) | |
| download | binutils-gdb-0aa37b654c0f31e446ab47826f0bcbec15d0112f.tar.gz | |
Support the fs_base and gs_base registers on FreeBSD/amd64 native processes.
Use ptrace operations to fetch and store the fs_base and gs_base registers
for FreeBSD/amd64 processes. Note that FreeBSD does not currently store the
value of these registers in core dumps, so these registers are only
available when inspecting a running process.
gdb/ChangeLog:
* amd64-bsd-nat.c (amd64bsd_fetch_inferior_registers): Use
PT_GETFSBASE and PT_GETGSBASE.
(amd64bsd_store_inferior_registers): Use PT_SETFSBASE and
PT_SETGSBASE.
| -rw-r--r-- | gdb/ChangeLog | 7 | ||||
| -rw-r--r-- | gdb/amd64-bsd-nat.c | 54 |
2 files changed, 61 insertions, 0 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 39d3680a948..012b3e43311 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,12 @@ 2017-07-11 John Baldwin <jhb@FreeBSD.org> + * amd64-bsd-nat.c (amd64bsd_fetch_inferior_registers): Use + PT_GETFSBASE and PT_GETGSBASE. + (amd64bsd_store_inferior_registers): Use PT_SETFSBASE and + PT_SETGSBASE. + +2017-07-11 John Baldwin <jhb@FreeBSD.org> + * features/Makefile (amd64.dat, amd64-avx.dat, amd64-mpx.dat) (amd64-avx-mpx.dat, amd64-avx-avx512.dat) (amd64-avx-mpx-avx512-pku.dat): Add i386/64bit-segments.xml in diff --git a/gdb/amd64-bsd-nat.c b/gdb/amd64-bsd-nat.c index ca61a3551b7..41dee842697 100644 --- a/gdb/amd64-bsd-nat.c +++ b/gdb/amd64-bsd-nat.c @@ -57,6 +57,33 @@ amd64bsd_fetch_inferior_registers (struct target_ops *ops, return; } +#ifdef PT_GETFSBASE + if (regnum == -1 || regnum == AMD64_FSBASE_REGNUM) + { + register_t base; + + if (ptrace (PT_GETFSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1) + perror_with_name (_("Couldn't get segment register fs_base")); + + regcache_raw_supply (regcache, AMD64_FSBASE_REGNUM, &base); + if (regnum != -1) + return; + } +#endif +#ifdef PT_GETGSBASE + if (regnum == -1 || regnum == AMD64_GSBASE_REGNUM) + { + register_t base; + + if (ptrace (PT_GETGSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1) + perror_with_name (_("Couldn't get segment register gs_base")); + + regcache_raw_supply (regcache, AMD64_GSBASE_REGNUM, &base); + if (regnum != -1) + return; + } +#endif + if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum)) { struct fpreg fpregs; @@ -108,6 +135,33 @@ amd64bsd_store_inferior_registers (struct target_ops *ops, return; } +#ifdef PT_SETFSBASE + if (regnum == -1 || regnum == AMD64_FSBASE_REGNUM) + { + register_t base; + + regcache_raw_collect (regcache, AMD64_FSBASE_REGNUM, &base); + + if (ptrace (PT_SETFSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1) + perror_with_name (_("Couldn't write segment register fs_base")); + if (regnum != -1) + return; + } +#endif +#ifdef PT_SETGSBASE + if (regnum == -1 || regnum == AMD64_GSBASE_REGNUM) + { + register_t base; + + regcache_raw_collect (regcache, AMD64_GSBASE_REGNUM, &base); + + if (ptrace (PT_SETGSBASE, pid, (PTRACE_TYPE_ARG3) &base, 0) == -1) + perror_with_name (_("Couldn't write segment register gs_base")); + if (regnum != -1) + return; + } +#endif + if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum)) { struct fpreg fpregs; |