This commit was manufactured by cvs2svn to create branch 'binutils-

2_15-branch'.

Sprout from cagney_bfdfile-20040213-branch 2004-02-14 00:00:34 UTC nobody 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2004-02-18 16:37:21 UTC Nathan Sidwell <nathan@codesourcery.com> '	* ldgram.y (statement_anywhere): Add assert rule.':
    bfd/ChangeLog
    bfd/bfd-in.h
    bfd/bfd-in2.h
    bfd/configure.host
    bfd/elfxx-mips.c
    bfd/version.h
    binutils/ChangeLog
    binutils/ar.c
    binutils/arsup.c
    gas/ChangeLog
    gas/config/tc-arm.c
    gas/testsuite/ChangeLog
    gas/testsuite/gas/arm/maverick.c
    gas/testsuite/gas/arm/maverick.d
    gas/testsuite/gas/arm/maverick.s
    ld/ChangeLog
    ld/emulparams/elf32bmipn32-defs.sh
    ld/ldgram.y
    ld/ldlang.c
    ld/ldmain.c
    ld/testsuite/ChangeLog
    ld/testsuite/ld-mips-elf/elf-rel-got-n32.d
    ld/testsuite/ld-mips-elf/elf-rel-got-n64-linux.d
    ld/testsuite/ld-mips-elf/elf-rel-xgot-n32.d
    ld/testsuite/ld-mips-elf/elf-rel-xgot-n64-linux.d
    ld/testsuite/ld-scripts/assert.exp
    ld/testsuite/ld-scripts/assert.s
    ld/testsuite/ld-scripts/assert.t
    libiberty/ChangeLog
    libiberty/regex.c
    opcodes/ChangeLog
    opcodes/arm-opc.h
Cherrypick from master 2004-02-19 14:08:31 UTC Nathan Sidwell <nathan@codesourcery.com> '	* ldlang.c (map_input_to_output_sections): Initialize sections':
    ld/testsuite/ld-scripts/data.d
    ld/testsuite/ld-scripts/data.exp
    ld/testsuite/ld-scripts/data.s
    ld/testsuite/ld-scripts/data.t
Delete:
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    sim/testsuite/sim/m32r/jmp.cgs
    sim/testsuite/sim/m32r/ld-d.cgs
    sim/testsuite/sim/m32r/ld-plus.cgs
    sim/testsuite/sim/m32r/ld.cgs
    sim/testsuite/sim/m32r/ld24.cgs
    sim/testsuite/sim/m32r/ldb-d.cgs
    sim/testsuite/sim/m32r/ldb.cgs
    sim/testsuite/sim/m32r/ldh-d.cgs
    sim/testsuite/sim/m32r/ldh.cgs
    sim/testsuite/sim/m32r/ldi16.cgs
    sim/testsuite/sim/m32r/ldi8.cgs
    sim/testsuite/sim/m32r/ldub-d.cgs
    sim/testsuite/sim/m32r/ldub.cgs
    sim/testsuite/sim/m32r/lduh-d.cgs
    sim/testsuite/sim/m32r/lduh.cgs
    sim/testsuite/sim/m32r/lock.cgs
    sim/testsuite/sim/m32r/machi.cgs
    sim/testsuite/sim/m32r/maclo.cgs
    sim/testsuite/sim/m32r/macwhi.cgs
    sim/testsuite/sim/m32r/macwlo.cgs
    sim/testsuite/sim/m32r/misc.exp
    sim/testsuite/sim/m32r/mul.cgs
    sim/testsuite/sim/m32r/mulhi.cgs
    sim/testsuite/sim/m32r/mullo.cgs
    sim/testsuite/sim/m32r/mulwhi.cgs
    sim/testsuite/sim/m32r/mulwlo.cgs
    sim/testsuite/sim/m32r/mv.cgs
    sim/testsuite/sim/m32r/mvfachi.cgs
    sim/testsuite/sim/m32r/mvfaclo.cgs
    sim/testsuite/sim/m32r/mvfacmi.cgs
    sim/testsuite/sim/m32r/mvfc.cgs
    sim/testsuite/sim/m32r/mvtachi.cgs
    sim/testsuite/sim/m32r/mvtaclo.cgs
    sim/testsuite/sim/m32r/mvtc.cgs
    sim/testsuite/sim/m32r/neg.cgs
    sim/testsuite/sim/m32r/nop.cgs
    sim/testsuite/sim/m32r/not.cgs
    sim/testsuite/sim/m32r/or.cgs
    sim/testsuite/sim/m32r/or3.cgs
    sim/testsuite/sim/m32r/rac.cgs
    sim/testsuite/sim/m32r/rach.cgs
    sim/testsuite/sim/m32r/rem.cgs
    sim/testsuite/sim/m32r/remu.cgs
    sim/testsuite/sim/m32r/rte.cgs
    sim/testsuite/sim/m32r/seth.cgs
    sim/testsuite/sim/m32r/sll.cgs
    sim/testsuite/sim/m32r/sll3.cgs
    sim/testsuite/sim/m32r/slli.cgs
    sim/testsuite/sim/m32r/sra.cgs
    sim/testsuite/sim/m32r/sra3.cgs
    sim/testsuite/sim/m32r/srai.cgs
    sim/testsuite/sim/m32r/srl.cgs
    sim/testsuite/sim/m32r/srl3.cgs
    sim/testsuite/sim/m32r/srli.cgs
    sim/testsuite/sim/m32r/st-d.cgs
    sim/testsuite/sim/m32r/st-minus.cgs
    sim/testsuite/sim/m32r/st-plus.cgs
    sim/testsuite/sim/m32r/st.cgs
    sim/testsuite/sim/m32r/stb-d.cgs
    sim/testsuite/sim/m32r/stb.cgs
    sim/testsuite/sim/m32r/sth-d.cgs
    sim/testsuite/sim/m32r/sth.cgs
    sim/testsuite/sim/m32r/sub.cgs
    sim/testsuite/sim/m32r/subv.cgs
    sim/testsuite/sim/m32r/subx.cgs
    sim/testsuite/sim/m32r/testutils.inc
    sim/testsuite/sim/m32r/trap.cgs
    sim/testsuite/sim/m32r/unlock.cgs
    sim/testsuite/sim/m32r/uread16.ms
    sim/testsuite/sim/m32r/uread32.ms
    sim/testsuite/sim/m32r/uwrite16.ms
    sim/testsuite/sim/m32r/uwrite32.ms
    sim/testsuite/sim/m32r/xor.cgs
    sim/testsuite/sim/m32r/xor3.cgs
    sim/testsuite/sim/mips/ChangeLog
    sim/testsuite/sim/mips/basic.exp
    sim/testsuite/sim/mips/sanity.s
    sim/testsuite/sim/mips/testutils.inc
    sim/testsuite/sim/sh/ChangeLog
    sim/testsuite/sim/sh/add.s
    sim/testsuite/sim/sh/allinsn.exp
    sim/testsuite/sim/sh/and.s
    sim/testsuite/sim/sh/dmxy.s
    sim/testsuite/sim/sh/fabs.s
    sim/testsuite/sim/sh/fadd.s
    sim/testsuite/sim/sh/fcmpeq.s
    sim/testsuite/sim/sh/fcmpgt.s
    sim/testsuite/sim/sh/fcnvds.s
    sim/testsuite/sim/sh/fcnvsd.s
    sim/testsuite/sim/sh/fdiv.s
    sim/testsuite/sim/sh/fipr.s
    sim/testsuite/sim/sh/fldi0.s
    sim/testsuite/sim/sh/fldi1.s
    sim/testsuite/sim/sh/flds.s
    sim/testsuite/sim/sh/float.s
    sim/testsuite/sim/sh/fmac.s
    sim/testsuite/sim/sh/fmov.s
    sim/testsuite/sim/sh/fmul.s
    sim/testsuite/sim/sh/fneg.s
    sim/testsuite/sim/sh/fpchg.s
    sim/testsuite/sim/sh/frchg.s
    sim/testsuite/sim/sh/fschg.s
    sim/testsuite/sim/sh/fsqrt.s
    sim/testsuite/sim/sh/fsub.s
    sim/testsuite/sim/sh/ftrc.s
    sim/testsuite/sim/sh/ldrc.s
    sim/testsuite/sim/sh/loop.s
    sim/testsuite/sim/sh/macl.s
    sim/testsuite/sim/sh/macw.s
    sim/testsuite/sim/sh/movi.s
    sim/testsuite/sim/sh/movli.s
    sim/testsuite/sim/sh/movua.s
    sim/testsuite/sim/sh/movxy.s
    sim/testsuite/sim/sh/pabs.s
    sim/testsuite/sim/sh/padd.s
    sim/testsuite/sim/sh/paddc.s
    sim/testsuite/sim/sh/pand.s
    sim/testsuite/sim/sh/pclr.s
    sim/testsuite/sim/sh/pdec.s
    sim/testsuite/sim/sh/pdmsb.s
    sim/testsuite/sim/sh/pinc.s
    sim/testsuite/sim/sh/pmuls.s
    sim/testsuite/sim/sh/prnd.s
    sim/testsuite/sim/sh/pshai.s
    sim/testsuite/sim/sh/pshar.s
    sim/testsuite/sim/sh/pshli.s
    sim/testsuite/sim/sh/pshlr.s
    sim/testsuite/sim/sh/psub.s
    sim/testsuite/sim/sh/pswap.s
    sim/testsuite/sim/sh/sett.s
    sim/testsuite/sim/sh/shll.s
    sim/testsuite/sim/sh/shll16.s
    sim/testsuite/sim/sh/shll2.s
    sim/testsuite/sim/sh/shll8.s
    sim/testsuite/sim/sh/shlr.s
    sim/testsuite/sim/sh/shlr16.s
    sim/testsuite/sim/sh/shlr2.s
    sim/testsuite/sim/sh/shlr8.s
    sim/testsuite/sim/sh/swap.s
    sim/testsuite/sim/sh/testutils.inc
    sim/v850/ChangeLog
    sim/v850/Makefile.in
    sim/v850/acconfig.h
    sim/v850/config.in
    sim/v850/configure
    sim/v850/configure.in
    sim/v850/interp.c
    sim/v850/sim-main.h
    sim/v850/simops.c
    sim/v850/simops.h
    sim/v850/v850-dc
    sim/v850/v850.igen
    sim/v850/v850_sim.h
    sim/z8k/ChangeLog
    sim/z8k/Makefile.in
    sim/z8k/acconfig.h
    sim/z8k/comped1.c
    sim/z8k/comped2.c
    sim/z8k/comped3.c
    sim/z8k/compedb3.c
    sim/z8k/config.in
    sim/z8k/configure
    sim/z8k/configure.in
    sim/z8k/iface.c
    sim/z8k/inlines.h
    sim/z8k/mem.c
    sim/z8k/mem.h
    sim/z8k/quick.c
    sim/z8k/sim.h
    sim/z8k/support.c
    sim/z8k/syscall.h
    sim/z8k/tconfig.in
    sim/z8k/tm.h
    sim/z8k/writecode.c

4 files changed, 78 insertions, 72 deletions

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 89535f02039..595d680f4ec 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2004-02-17  Petko Manolov  <petkan@nucleusys.com>
+
+	* gas/arm/maverick.c: DSPSC to/from opcode fixes.
+	* gas/arm/maverick.d: Likewise.
+	* gas/arm/maverick.s: Likewise.
+
 2004-02-09  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 
 	* gas/sh/basic.exp: Don't do sh4a tests for sh5.
diff --git a/gas/testsuite/gas/arm/maverick.c b/gas/testsuite/gas/arm/maverick.c
index b55e9aaee89..5f55e86aff2 100644
--- a/gas/testsuite/gas/arm/maverick.c
+++ b/gas/testsuite/gas/arm/maverick.c
@@ -360,8 +360,8 @@ MVfxa (am32, 32am, 1);
 MVfxa (ah32, 32ah, 2);
 MVfxa (a32, 32a, 3);
 MVdxa (a64, 64a, 4);
-MCRC2 (mvsc32, 6, 0, 1, 5, dspsc, mvreg ("fx", 16));
-MCRC2 (mv32sc, 6, 0, 0, 5, mvreg ("fx", 0), dspsc);
+MCRC2 (mvsc32, 4, 1, 0, 7, dspsc, mvreg ("dx", 12));
+MCRC2 (mv32sc, 4, 0, 1, 7, mvreg ("dx", 12), dspsc);
 CDP2 (cpys, , 4, 0, 0, "f", "f");
 CDP2 (cpyd, , 4, 0, 1, "d", "d");
 
diff --git a/gas/testsuite/gas/arm/maverick.d b/gas/testsuite/gas/arm/maverick.d
index e09c67215c6..26e82dfdb09 100644
--- a/gas/testsuite/gas/arm/maverick.d
+++ b/gas/testsuite/gas/arm/maverick.d
@@ -179,66 +179,66 @@ Disassembly of section .text:
 0*29c <move\+0xbc> 1e ?16 ?65 ?30 ? *	cfmvr64hne	r6, ?mvdx6
 0*2a0 <move\+0xc0> be ?17 ?05 ?30 ? *	cfmvr64hlt	r0, ?mvdx7
 0*2a4 <move\+0xc4> 5e ?13 ?75 ?30 ? *	cfmvr64hpl	r7, ?mvdx3
-0*2a8 <move\+0xc8> ce ?11 ?06 ?11 ? *	cfmval32gt	mvax1, ?mvfx1
-0*2ac <move\+0xcc> 8e ?1d ?06 ?13 ? *	cfmval32hi	mvax3, ?mvfx13
-0*2b0 <move\+0xd0> 6e ?14 ?06 ?13 ? *	cfmval32vs	mvax3, ?mvfx4
-0*2b4 <move\+0xd4> 2e ?10 ?06 ?11 ? *	cfmval32cs	mvax1, ?mvfx0
-0*2b8 <move\+0xd8> 5e ?1a ?06 ?13 ? *	cfmval32pl	mvax3, ?mvfx10
-0*2bc <move\+0xdc> 9e ?01 ?06 ?14 ? *	cfmv32alls	mvfx4, ?mvax1
-0*2c0 <move\+0xe0> 3e ?03 ?06 ?18 ? *	cfmv32alcc	mvfx8, ?mvax3
-0*2c4 <move\+0xe4> 7e ?03 ?06 ?12 ? *	cfmv32alvc	mvfx2, ?mvax3
-0*2c8 <move\+0xe8> ce ?01 ?06 ?16 ? *	cfmv32algt	mvfx6, ?mvax1
-0*2cc <move\+0xec> 0e ?03 ?06 ?17 ? *	cfmv32aleq	mvfx7, ?mvax3
-0*2d0 <move\+0xf0> ee ?1c ?06 ?32 ? *	cfmvam32	mvax2, ?mvfx12
-0*2d4 <move\+0xf4> ae ?18 ?06 ?33 ? *	cfmvam32ge	mvax3, ?mvfx8
-0*2d8 <move\+0xf8> ee ?16 ?06 ?32 ? *	cfmvam32	mvax2, ?mvfx6
-0*2dc <move\+0xfc> be ?12 ?06 ?32 ? *	cfmvam32lt	mvax2, ?mvfx2
-0*2e0 <move\+0x100> 9e ?15 ?06 ?30 ? *	cfmvam32ls	mvax0, ?mvfx5
-0*2e4 <move\+0x104> ee ?02 ?06 ?3a ? *	cfmv32am	mvfx10, ?mvax2
-0*2e8 <move\+0x108> 4e ?03 ?06 ?3e ? *	cfmv32ammi	mvfx14, ?mvax3
-0*2ec <move\+0x10c> 8e ?02 ?06 ?3d ? *	cfmv32amhi	mvfx13, ?mvax2
-0*2f0 <move\+0x110> 2e ?02 ?06 ?31 ? *	cfmv32amcs	mvfx1, ?mvax2
-0*2f4 <move\+0x114> 6e ?00 ?06 ?3b ? *	cfmv32amvs	mvfx11, ?mvax0
-0*2f8 <move\+0x118> 7e ?1e ?06 ?53 ? *	cfmvah32vc	mvax3, ?mvfx14
-0*2fc <move\+0x11c> 3e ?1a ?06 ?50 ? *	cfmvah32cc	mvax0, ?mvfx10
-0*300 <move\+0x120> 1e ?1f ?06 ?51 ? *	cfmvah32ne	mvax1, ?mvfx15
-0*304 <move\+0x124> de ?1b ?06 ?50 ? *	cfmvah32le	mvax0, ?mvfx11
-0*308 <move\+0x128> 4e ?19 ?06 ?50 ? *	cfmvah32mi	mvax0, ?mvfx9
-0*30c <move\+0x12c> 0e ?03 ?06 ?55 ? *	cfmv32aheq	mvfx5, ?mvax3
-0*310 <move\+0x130> ae ?00 ?06 ?59 ? *	cfmv32ahge	mvfx9, ?mvax0
-0*314 <move\+0x134> ee ?01 ?06 ?53 ? *	cfmv32ah	mvfx3, ?mvax1
-0*318 <move\+0x138> de ?00 ?06 ?57 ? *	cfmv32ahle	mvfx7, ?mvax0
-0*31c <move\+0x13c> 1e ?00 ?06 ?5c ? *	cfmv32ahne	mvfx12, ?mvax0
-0*320 <move\+0x140> be ?17 ?06 ?70 ? *	cfmva32lt	mvax0, ?mvfx7
-0*324 <move\+0x144> 5e ?13 ?06 ?72 ? *	cfmva32pl	mvax2, ?mvfx3
-0*328 <move\+0x148> ce ?11 ?06 ?71 ? *	cfmva32gt	mvax1, ?mvfx1
-0*32c <move\+0x14c> 8e ?1d ?06 ?73 ? *	cfmva32hi	mvax3, ?mvfx13
-0*330 <move\+0x150> 6e ?14 ?06 ?73 ? *	cfmva32vs	mvax3, ?mvfx4
-0*334 <move\+0x154> 2e ?00 ?06 ?79 ? *	cfmv32acs	mvfx9, ?mvax0
-0*338 <move\+0x158> 5e ?02 ?06 ?7f ? *	cfmv32apl	mvfx15, ?mvax2
-0*33c <move\+0x15c> 9e ?01 ?06 ?74 ? *	cfmv32als	mvfx4, ?mvax1
-0*340 <move\+0x160> 3e ?03 ?06 ?78 ? *	cfmv32acc	mvfx8, ?mvax3
-0*344 <move\+0x164> 7e ?03 ?06 ?72 ? *	cfmv32avc	mvfx2, ?mvax3
-0*348 <move\+0x168> ce ?1b ?06 ?90 ? *	cfmva64gt	mvax0, ?mvdx11
-0*34c <move\+0x16c> 0e ?15 ?06 ?91 ? *	cfmva64eq	mvax1, ?mvdx5
-0*350 <move\+0x170> ee ?1c ?06 ?92 ? *	cfmva64	mvax2, ?mvdx12
-0*354 <move\+0x174> ae ?18 ?06 ?93 ? *	cfmva64ge	mvax3, ?mvdx8
-0*358 <move\+0x178> ee ?16 ?06 ?92 ? *	cfmva64	mvax2, ?mvdx6
-0*35c <move\+0x17c> be ?00 ?06 ?94 ? *	cfmv64alt	mvdx4, ?mvax0
-0*360 <move\+0x180> 9e ?01 ?06 ?90 ? *	cfmv64als	mvdx0, ?mvax1
-0*364 <move\+0x184> ee ?02 ?06 ?9a ? *	cfmv64a	mvdx10, ?mvax2
-0*368 <move\+0x188> 4e ?03 ?06 ?9e ? *	cfmv64ami	mvdx14, ?mvax3
-0*36c <move\+0x18c> 8e ?02 ?06 ?9d ? *	cfmv64ahi	mvdx13, ?mvax2
-0*370 <move\+0x190> 2e ?1c ?06 ?b0 ? *	cfmvsc32cs	dspsc, ?mvfx12
-0*374 <move\+0x194> 6e ?10 ?06 ?b0 ? *	cfmvsc32vs	dspsc, ?mvfx0
-0*378 <move\+0x198> 7e ?1e ?06 ?b0 ? *	cfmvsc32vc	dspsc, ?mvfx14
-0*37c <move\+0x19c> 3e ?1a ?06 ?b0 ? *	cfmvsc32cc	dspsc, ?mvfx10
-0*380 <move\+0x1a0> 1e ?1f ?06 ?b0 ? *	cfmvsc32ne	dspsc, ?mvfx15
-0*384 <move\+0x1a4> de ?00 ?06 ?b6 ? *	cfmv32scle	mvfx6, ?dspsc
-0*388 <move\+0x1a8> 4e ?00 ?06 ?b2 ? *	cfmv32scmi	mvfx2, ?dspsc
-0*38c <move\+0x1ac> 0e ?00 ?06 ?b5 ? *	cfmv32sceq	mvfx5, ?dspsc
-0*390 <move\+0x1b0> ae ?00 ?06 ?b9 ? *	cfmv32scge	mvfx9, ?dspsc
-0*394 <move\+0x1b4> ee ?00 ?06 ?b3 ? *	cfmv32sc	mvfx3, ?dspsc
+0*2a8 <move\+0xc8> ce ?21 ?14 ?40 ? *	cfmval32gt	mvax1, ?mvfx1
+0*2ac <move\+0xcc> 8e ?2d ?34 ?40 ? *	cfmval32hi	mvax3, ?mvfx13
+0*2b0 <move\+0xd0> 6e ?24 ?34 ?40 ? *	cfmval32vs	mvax3, ?mvfx4
+0*2b4 <move\+0xd4> 2e ?20 ?14 ?40 ? *	cfmval32cs	mvax1, ?mvfx0
+0*2b8 <move\+0xd8> 5e ?2a ?34 ?40 ? *	cfmval32pl	mvax3, ?mvfx10
+0*2bc <move\+0xdc> 9e ?11 ?44 ?40 ? *	cfmv32alls	mvfx4, ?mvax1
+0*2c0 <move\+0xe0> 3e ?13 ?84 ?40 ? *	cfmv32alcc	mvfx8, ?mvax3
+0*2c4 <move\+0xe4> 7e ?13 ?24 ?40 ? *	cfmv32alvc	mvfx2, ?mvax3
+0*2c8 <move\+0xe8> ce ?11 ?64 ?40 ? *	cfmv32algt	mvfx6, ?mvax1
+0*2cc <move\+0xec> 0e ?13 ?74 ?40 ? *	cfmv32aleq	mvfx7, ?mvax3
+0*2d0 <move\+0xf0> ee ?2c ?24 ?60 ? *	cfmvam32	mvax2, ?mvfx12
+0*2d4 <move\+0xf4> ae ?28 ?34 ?60 ? *	cfmvam32ge	mvax3, ?mvfx8
+0*2d8 <move\+0xf8> ee ?26 ?24 ?60 ? *	cfmvam32	mvax2, ?mvfx6
+0*2dc <move\+0xfc> be ?22 ?24 ?60 ? *	cfmvam32lt	mvax2, ?mvfx2
+0*2e0 <move\+0x100> 9e ?25 ?04 ?60 ? *	cfmvam32ls	mvax0, ?mvfx5
+0*2e4 <move\+0x104> ee ?12 ?a4 ?60 ? *	cfmv32am	mvfx10, ?mvax2
+0*2e8 <move\+0x108> 4e ?13 ?e4 ?60 ? *	cfmv32ammi	mvfx14, ?mvax3
+0*2ec <move\+0x10c> 8e ?12 ?d4 ?60 ? *	cfmv32amhi	mvfx13, ?mvax2
+0*2f0 <move\+0x110> 2e ?12 ?14 ?60 ? *	cfmv32amcs	mvfx1, ?mvax2
+0*2f4 <move\+0x114> 6e ?10 ?b4 ?60 ? *	cfmv32amvs	mvfx11, ?mvax0
+0*2f8 <move\+0x118> 7e ?2e ?34 ?80 ? *	cfmvah32vc	mvax3, ?mvfx14
+0*2fc <move\+0x11c> 3e ?2a ?04 ?80 ? *	cfmvah32cc	mvax0, ?mvfx10
+0*300 <move\+0x120> 1e ?2f ?14 ?80 ? *	cfmvah32ne	mvax1, ?mvfx15
+0*304 <move\+0x124> de ?2b ?04 ?80 ? *	cfmvah32le	mvax0, ?mvfx11
+0*308 <move\+0x128> 4e ?29 ?04 ?80 ? *	cfmvah32mi	mvax0, ?mvfx9
+0*30c <move\+0x12c> 0e ?13 ?54 ?80 ? *	cfmv32aheq	mvfx5, ?mvax3
+0*310 <move\+0x130> ae ?10 ?94 ?80 ? *	cfmv32ahge	mvfx9, ?mvax0
+0*314 <move\+0x134> ee ?11 ?34 ?80 ? *	cfmv32ah	mvfx3, ?mvax1
+0*318 <move\+0x138> de ?10 ?74 ?80 ? *	cfmv32ahle	mvfx7, ?mvax0
+0*31c <move\+0x13c> 1e ?10 ?c4 ?80 ? *	cfmv32ahne	mvfx12, ?mvax0
+0*320 <move\+0x140> be ?27 ?04 ?a0 ? *	cfmva32lt	mvax0, ?mvfx7
+0*324 <move\+0x144> 5e ?23 ?24 ?a0 ? *	cfmva32pl	mvax2, ?mvfx3
+0*328 <move\+0x148> ce ?21 ?14 ?a0 ? *	cfmva32gt	mvax1, ?mvfx1
+0*32c <move\+0x14c> 8e ?2d ?34 ?a0 ? *	cfmva32hi	mvax3, ?mvfx13
+0*330 <move\+0x150> 6e ?24 ?34 ?a0 ? *	cfmva32vs	mvax3, ?mvfx4
+0*334 <move\+0x154> 2e ?10 ?94 ?a0 ? *	cfmv32acs	mvfx9, ?mvax0
+0*338 <move\+0x158> 5e ?12 ?f4 ?a0 ? *	cfmv32apl	mvfx15, ?mvax2
+0*33c <move\+0x15c> 9e ?11 ?44 ?a0 ? *	cfmv32als	mvfx4, ?mvax1
+0*340 <move\+0x160> 3e ?13 ?84 ?a0 ? *	cfmv32acc	mvfx8, ?mvax3
+0*344 <move\+0x164> 7e ?13 ?24 ?a0 ? *	cfmv32avc	mvfx2, ?mvax3
+0*348 <move\+0x168> ce ?2b ?04 ?c0 ? *	cfmva64gt	mvax0, ?mvdx11
+0*34c <move\+0x16c> 0e ?25 ?14 ?c0 ? *	cfmva64eq	mvax1, ?mvdx5
+0*350 <move\+0x170> ee ?2c ?24 ?c0 ? *	cfmva64	mvax2, ?mvdx12
+0*354 <move\+0x174> ae ?28 ?34 ?c0 ? *	cfmva64ge	mvax3, ?mvdx8
+0*358 <move\+0x178> ee ?26 ?24 ?c0 ? *	cfmva64	mvax2, ?mvdx6
+0*35c <move\+0x17c> be ?10 ?44 ?c0 ? *	cfmv64alt	mvdx4, ?mvax0
+0*360 <move\+0x180> 9e ?11 ?04 ?c0 ? *	cfmv64als	mvdx0, ?mvax1
+0*364 <move\+0x184> ee ?12 ?a4 ?c0 ? *	cfmv64a	mvdx10, ?mvax2
+0*368 <move\+0x188> 4e ?13 ?e4 ?c0 ? *	cfmv64ami	mvdx14, ?mvax3
+0*36c <move\+0x18c> 8e ?12 ?d4 ?c0 ? *	cfmv64ahi	mvdx13, ?mvax2
+0*370 <move\+0x190> 2e ?20 ?c4 ?e0 ? *	cfmvsc32cs	dspsc, ?mvdx12
+0*374 <move\+0x194> 6e ?20 ?04 ?e0 ? *	cfmvsc32vs	dspsc, ?mvdx0
+0*378 <move\+0x198> 7e ?20 ?e4 ?e0 ? *	cfmvsc32vc	dspsc, ?mvdx14
+0*37c <move\+0x19c> 3e ?20 ?a4 ?e0 ? *	cfmvsc32cc	dspsc, ?mvdx10
+0*380 <move\+0x1a0> 1e ?20 ?f4 ?e0 ? *	cfmvsc32ne	dspsc, ?mvdx15
+0*384 <move\+0x1a4> de ?10 ?64 ?e0 ? *	cfmv32scle	mvdx6, ?dspsc
+0*388 <move\+0x1a8> 4e ?10 ?24 ?e0 ? *	cfmv32scmi	mvdx2, ?dspsc
+0*38c <move\+0x1ac> 0e ?10 ?54 ?e0 ? *	cfmv32sceq	mvdx5, ?dspsc
+0*390 <move\+0x1b0> ae ?10 ?94 ?e0 ? *	cfmv32scge	mvdx9, ?dspsc
+0*394 <move\+0x1b4> ee ?10 ?34 ?e0 ? *	cfmv32sc	mvdx3, ?dspsc
 0*398 <move\+0x1b8> de ?02 ?74 ?00 ? *	cfcpysle	mvf7, ?mvf2
 0*39c <move\+0x1bc> 1e ?06 ?c4 ?00 ? *	cfcpysne	mvf12, ?mvf6
 0*3a0 <move\+0x1c0> be ?07 ?04 ?00 ? *	cfcpyslt	mvf0, ?mvf7
diff --git a/gas/testsuite/gas/arm/maverick.s b/gas/testsuite/gas/arm/maverick.s
index cb6c4712fef..c044348d8dd 100644
--- a/gas/testsuite/gas/arm/maverick.s
+++ b/gas/testsuite/gas/arm/maverick.s
@@ -222,16 +222,16 @@ move:
 	cfmv64a	mvdx10, mvax2
 	cfmv64ami	mvdx14, mvax3
 	cfmv64ahi	mvdx13, mvax2
-	cfmvsc32cs	dspsc, mvfx12
-	cfmvsc32vs	dspsc, mvfx0
-	cfmvsc32vc	dspsc, mvfx14
-	cfmvsc32cc	dspsc, mvfx10
-	cfmvsc32ne	dspsc, mvfx15
-	cfmv32scle	mvfx6, dspsc
-	cfmv32scmi	mvfx2, dspsc
-	cfmv32sceq	mvfx5, dspsc
-	cfmv32scge	mvfx9, dspsc
-	cfmv32scal	mvfx3, dspsc
+	cfmvsc32cs	dspsc, mvdx12
+	cfmvsc32vs	dspsc, mvdx0
+	cfmvsc32vc	dspsc, mvdx14
+	cfmvsc32cc	dspsc, mvdx10
+	cfmvsc32ne	dspsc, mvdx15
+	cfmv32scle	mvdx6, dspsc
+	cfmv32scmi	mvdx2, dspsc
+	cfmv32sceq	mvdx5, dspsc
+	cfmv32scge	mvdx9, dspsc
+	cfmv32scal	mvdx3, dspsc
 	cfcpysle	mvf7, mvf2
 	cfcpysne	mvf12, mvf6
 	cfcpyslt	mvf0, mvf7