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authorPeter Bergner <bergner@vnet.ibm.com>2015-06-19 17:17:07 -0500
committerPeter Bergner <bergner@vnet.ibm.com>2015-06-19 17:17:07 -0500
commit11a0cf2ec0ed6e70ff25e9a50c2223dcd98c1c10 (patch)
tree96fac8de70d991e96a623a704973dd1eb3f6b349 /gas
parent18a94d75a0a9baca8e2db2563fa3e637415ad86e (diff)
downloadbinutils-gdb-11a0cf2ec0ed6e70ff25e9a50c2223dcd98c1c10.tar.gz
Allow for optional operands with non-zero default values.
ISA 2.07 (ie, POWER8) added the rfebb instruction which takes one operand with the value of either a 0 or 1. It also defines an extended mnemonic with no operands (ie, "rfebb") that is supposed to be equivalent to "rfebb 1". I implemented rfebb's lone operand with PPC_OPERAND_OPTIONAL, but the problem is, optional operands that are ommitted always default to the value 0, which is wrong in this case. I have added support for allowing non-zero default values by adding an additional flag PPC_OPERAND_OPTIONAL_VALUE that specifies that the default operand value to be used is stored in the SHIFT field of the operand field immediately following this one. This fixes the rfebb issue. I also fixed the mftb and mfcr instructions so they use the same mechanism. This allows us to flag invalid uses of mfcr where we explicitly pass in a zero FXM value, like the use in a2.[sd]. include/opcode/ * ppc.h (PPC_OPERAND_OPTIONAL_VALUE): New. (ppc_optional_operand_value): New inline function. opcodes/ * ppc-dis.h (skip_optional_operands): Use ppc_optional_operand_value. * ppc-opc.c (FXM4): Add non-zero optional value. (TBR): Likewise. (SXL): Likewise. (insert_fxm): Handle new default operand value. (extract_fxm): Likewise. (insert_tbr): Likewise. (extract_tbr): Likewise. gas/ * config/tc-ppc.c (md_assemble): Use ppc_optional_operand_value. Allow for optional operands without insert functions. gas/testsuite/ * gas/ppc/power8.d: Fixup rfebb test results. * gas/ppc/a2.s: Fix invalid mfcr test. * gas/ppc/a2.d: Likewise.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-ppc.c8
-rw-r--r--gas/testsuite/ChangeLog6
-rw-r--r--gas/testsuite/gas/ppc/a2.d2
-rw-r--r--gas/testsuite/gas/ppc/a2.s2
-rw-r--r--gas/testsuite/gas/ppc/power8.d6
6 files changed, 23 insertions, 6 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 0a1326e4241..8d0f28fed96 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2015-06-19 Peter Bergner <bergner@vnet.ibm.com>
+
+ * config/tc-ppc.c (md_assemble): Use ppc_optional_operand_value.
+ Allow for optional operands without insert functions.
+
2015-06-18 Nick Clifton <nickc@redhat.com>
PR gas/18541
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index 3f6de73d1b8..18a11bedbbd 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -2752,12 +2752,18 @@ md_assemble (char *str)
if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
&& skip_optional)
{
+ long val = ppc_optional_operand_value (operand);
if (operand->insert)
{
- insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
+ insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
if (errmsg != (const char *) NULL)
as_bad ("%s", errmsg);
}
+ else if (operand->shift >= 0)
+ insn |= ((long) val & operand->bitm) << operand->shift;
+ else
+ insn |= ((long) val & operand->bitm) >> -operand->shift;
+
if ((operand->flags & PPC_OPERAND_NEXT) != 0)
next_opindex = *opindex_ptr + 1;
continue;
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 64e8cd7b18d..511dce3d34b 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2015-06-19 Peter Bergner <bergner@vnet.ibm.com>
+
+ * gas/ppc/power8.d: Fixup rfebb test results.
+ * gas/ppc/a2.s: Fix invalid mfcr test.
+ * gas/ppc/a2.d: Likewise.
+
2015-06-18 Nick Clifton <nickc@redhat.com>
PR gas/18541
diff --git a/gas/testsuite/gas/ppc/a2.d b/gas/testsuite/gas/ppc/a2.d
index aa05cbca5f2..bb60275afe4 100644
--- a/gas/testsuite/gas/ppc/a2.d
+++ b/gas/testsuite/gas/ppc/a2.d
@@ -347,7 +347,7 @@ Disassembly of section \.text:
4fc: (7c 00 04 00|00 04 00 7c) mcrxr cr0
500: (7d 80 04 00|00 04 80 7d) mcrxr cr3
504: (7c 60 00 26|26 00 60 7c) mfcr r3
- 508: (7c 60 00 26|26 00 60 7c) mfcr r3
+ 508: (7c 70 20 26|26 20 70 7c) mfocrf r3,2
50c: (7c 70 10 26|26 10 70 7c) mfocrf r3,1
510: (7c 78 00 26|26 00 78 7c) mfocrf r3,128
514: (7d 4a 3a 87|87 3a 4a 7d) mfdcr\. r10,234
diff --git a/gas/testsuite/gas/ppc/a2.s b/gas/testsuite/gas/ppc/a2.s
index 7d0ddc77561..ecb8668a51a 100644
--- a/gas/testsuite/gas/ppc/a2.s
+++ b/gas/testsuite/gas/ppc/a2.s
@@ -322,7 +322,7 @@ start:
mcrxr 0
mcrxr 3
mfcr 3
- mfcr 3,0
+ mfcr 3,0x02
mfcr 3,0x01
mfcr 3,0x80
mfdcr. 10,234
diff --git a/gas/testsuite/gas/ppc/power8.d b/gas/testsuite/gas/ppc/power8.d
index e66951e2100..61e1cabb7f0 100644
--- a/gas/testsuite/gas/ppc/power8.d
+++ b/gas/testsuite/gas/ppc/power8.d
@@ -27,9 +27,9 @@ Disassembly of section \.text:
44: (60 42 00 00|00 00 42 60) ori r2,r2,0
48: (60 00 00 00|00 00 00 60) nop
4c: (60 42 00 00|00 00 42 60) ori r2,r2,0
- 50: (4c 00 01 24|24 01 00 4c) rfebb
- 54: (4c 00 01 24|24 01 00 4c) rfebb
- 58: (4c 00 09 24|24 09 00 4c) rfebb 1
+ 50: (4c 00 01 24|24 01 00 4c) rfebb 0
+ 54: (4c 00 09 24|24 09 00 4c) rfebb
+ 58: (4c 00 09 24|24 09 00 4c) rfebb
5c: (4d 95 04 60|60 04 95 4d) bctar- 12,4\*cr5\+gt
60: (4c 87 04 61|61 04 87 4c) bctarl- 4,4\*cr1\+so
64: (4d ac 04 60|60 04 ac 4d) bctar\+ 12,4\*cr3\+lt