This commit was manufactured by cvs2svn to create branch

'kseitz_interps-20020528-branch'. Cherrypick from cagney_regbuf-20020515-branch 2002-06-15 12:26:32 UTC nobody 'This commit was manufactured by cvs2svn to create branch': .cvsignore COPYING COPYING.LIB COPYING.NEWLIB MAINTAINERS README README-maintainer-mode bfd/COPYING bfd/ChangeLog-0001 bfd/ChangeLog-9193 bfd/ChangeLog-9495 bfd/ChangeLog-9697 bfd/ChangeLog-9899 bfd/MAINTAINERS bfd/PORTING bfd/README bfd/TODO bfd/aix386-core.c bfd/aout-arm.c bfd/aout-cris.c bfd/aout-encap.c bfd/aout-ns32k.c bfd/aout-sparcle.c bfd/aout0.c bfd/aout32.c bfd/aout64.c bfd/aoutf1.h bfd/aoutx.h bfd/archive.c bfd/archive64.c bfd/armnetbsd.c bfd/bfd-in.h bfd/cache.c bfd/cf-i386lynx.c bfd/cf-m68klynx.c bfd/cf-sparclynx.c bfd/cisco-core.c bfd/coff-a29k.c bfd/coff-alpha.c bfd/coff-apollo.c bfd/coff-aux.c bfd/coff-go32.c bfd/coff-h8300.c bfd/coff-h8500.c bfd/coff-i386.c bfd/coff-i860.c bfd/coff-i960.c bfd/coff-ia64.c bfd/coff-m68k.c bfd/coff-m88k.c bfd/coff-mcore.c bfd/coff-mips.c bfd/coff-or32.c bfd/coff-pmac.c bfd/coff-ppc.c bfd/coff-sparc.c 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gdb/config/m68k/tm-m68kv4.h gdb/config/m68k/tm-mac.h gdb/config/m68k/tm-monitor.h gdb/config/m68k/tm-os68k.h gdb/config/m68k/tm-st2000.h gdb/config/m68k/tm-sun2.h gdb/config/m68k/tm-sun2os4.h gdb/config/m68k/tm-sun3.h gdb/config/m68k/tm-sun3os4.h gdb/config/m68k/tm-vx68.h gdb/config/m68k/vxworks68.mt gdb/config/m68k/xm-3b1.h gdb/config/m68k/xm-apollo68b.h gdb/config/m68k/xm-apollo68v.h gdb/config/m68k/xm-delta68.h gdb/config/m68k/xm-dpx2.h gdb/config/m68k/xm-hp300bsd.h gdb/config/m68k/xm-hp300hpux.h gdb/config/m68k/xm-linux.h gdb/config/m68k/xm-m68k.h gdb/config/m68k/xm-m68kv4.h gdb/config/m68k/xm-nbsd.h gdb/config/m68k/xm-sun2.h gdb/config/m68k/xm-sun3.h gdb/config/m68k/xm-sun3os4.h gdb/config/m88k/delta88.mh gdb/config/m88k/delta88.mt gdb/config/m88k/delta88v4.mh gdb/config/m88k/delta88v4.mt gdb/config/m88k/m88k.mh gdb/config/m88k/m88k.mt gdb/config/m88k/nm-delta88v4.h gdb/config/m88k/nm-m88k.h gdb/config/m88k/tm-delta88.h gdb/config/m88k/tm-delta88v4.h gdb/config/m88k/tm-m88k.h gdb/config/m88k/xm-delta88.h gdb/config/m88k/xm-delta88v4.h gdb/config/m88k/xm-dgux.h gdb/config/mcore/mcore.mt gdb/config/mcore/tm-mcore.h gdb/config/mips/bigmips.mt gdb/config/mips/bigmips64.mt gdb/config/mips/decstation.mh gdb/config/mips/decstation.mt gdb/config/mips/embed.mt gdb/config/mips/embed64.mt gdb/config/mips/embedl.mt gdb/config/mips/embedl64.mt gdb/config/mips/irix3.mh gdb/config/mips/irix3.mt gdb/config/mips/irix4.mh gdb/config/mips/irix5.mh gdb/config/mips/irix5.mt gdb/config/mips/irix6.mh gdb/config/mips/irix6.mt gdb/config/mips/linux.mh gdb/config/mips/linux.mt gdb/config/mips/littlemips.mh gdb/config/mips/littlemips.mt gdb/config/mips/mipsm3.mh gdb/config/mips/mipsm3.mt gdb/config/mips/mipsv4.mh gdb/config/mips/mipsv4.mt gdb/config/mips/news-mips.mh gdb/config/mips/nm-irix3.h gdb/config/mips/nm-irix4.h gdb/config/mips/nm-irix5.h gdb/config/mips/nm-irix6.h gdb/config/mips/nm-linux.h gdb/config/mips/nm-mips.h gdb/config/mips/nm-news-mips.h gdb/config/mips/nm-riscos.h gdb/config/mips/riscos.mh gdb/config/mips/tm-bigmips.h gdb/config/mips/tm-bigmips64.h gdb/config/mips/tm-embed.h gdb/config/mips/tm-embed64.h gdb/config/mips/tm-embedl.h gdb/config/mips/tm-embedl64.h gdb/config/mips/tm-irix3.h gdb/config/mips/tm-irix5.h gdb/config/mips/tm-irix6.h gdb/config/mips/tm-linux.h gdb/config/mips/tm-mips.h gdb/config/mips/tm-mips64.h gdb/config/mips/tm-mipsm3.h gdb/config/mips/tm-mipsv4.h gdb/config/mips/tm-tx39.h gdb/config/mips/tm-tx39l.h gdb/config/mips/tm-vr4100.h gdb/config/mips/tm-vr4300.h gdb/config/mips/tm-vr4300el.h gdb/config/mips/tm-vr4xxx.h gdb/config/mips/tm-vr4xxxel.h gdb/config/mips/tm-vr5000.h gdb/config/mips/tm-vr5000el.h gdb/config/mips/tm-vxmips.h gdb/config/mips/tm-wince.h gdb/config/mips/tx39.mt gdb/config/mips/tx39l.mt gdb/config/mips/vr4100.mt gdb/config/mips/vr4300.mt gdb/config/mips/vr4300el.mt gdb/config/mips/vr4xxx.mt gdb/config/mips/vr4xxxel.mt gdb/config/mips/vr5000.mt gdb/config/mips/vr5000el.mt gdb/config/mips/vxmips.mt gdb/config/mips/wince.mt gdb/config/mips/xm-irix3.h gdb/config/mips/xm-irix4.h gdb/config/mips/xm-irix5.h gdb/config/mips/xm-irix6.h gdb/config/mips/xm-linux.h gdb/config/mips/xm-mips.h gdb/config/mips/xm-mipsm3.h gdb/config/mips/xm-mipsv4.h gdb/config/mips/xm-riscos.h gdb/config/mn10200/mn10200.mt gdb/config/mn10200/tm-mn10200.h gdb/config/mn10300/mn10300.mt gdb/config/nm-gnu.h gdb/config/nm-linux.h gdb/config/nm-lynx.h gdb/config/nm-m3.h gdb/config/nm-sysv4.h gdb/config/none/nm-none.h gdb/config/none/none.mh gdb/config/none/none.mt gdb/config/none/tm-none.h gdb/config/none/xm-none.h gdb/config/ns32k/xm-nbsd.h gdb/config/pa/hppa64.mt gdb/config/pa/hppabsd.mh gdb/config/pa/hppabsd.mt gdb/config/pa/hppahpux.mh gdb/config/pa/hppahpux.mt gdb/config/pa/hppaosf.mh gdb/config/pa/hppaosf.mt gdb/config/pa/hppapro.mt gdb/config/pa/hpux1020.mh gdb/config/pa/hpux1020.mt gdb/config/pa/hpux11.mh gdb/config/pa/hpux11.mt gdb/config/pa/hpux11w.mt gdb/config/pa/nm-hppab.h gdb/config/pa/nm-hppah.h gdb/config/pa/nm-hppah11.h gdb/config/pa/nm-hppao.h gdb/config/pa/tm-hppa.h gdb/config/pa/tm-hppa64.h gdb/config/pa/tm-hppab.h gdb/config/pa/tm-hppah.h gdb/config/pa/tm-hppao.h gdb/config/pa/tm-pro.h gdb/config/pa/xm-hppab.h gdb/config/pa/xm-hppah.h gdb/config/pa/xm-pa.h gdb/config/powerpc/aix.mh gdb/config/powerpc/aix.mt gdb/config/powerpc/gdbserve.mt gdb/config/powerpc/linux.mh gdb/config/powerpc/linux.mt gdb/config/powerpc/nm-aix.h gdb/config/powerpc/nm-linux.h gdb/config/powerpc/ppc-eabi.mt gdb/config/powerpc/ppc-sim.mt gdb/config/powerpc/ppcle-eabi.mt gdb/config/powerpc/ppcle-sim.mt gdb/config/powerpc/tm-linux.h gdb/config/powerpc/tm-ppc-aix.h gdb/config/powerpc/tm-ppc-eabi.h gdb/config/powerpc/tm-ppc-sim.h gdb/config/powerpc/tm-ppcle-eabi.h gdb/config/powerpc/tm-ppcle-sim.h gdb/config/powerpc/tm-vxworks.h gdb/config/powerpc/vxworks.mt gdb/config/powerpc/xm-aix.h gdb/config/powerpc/xm-linux.h gdb/config/romp/rtbsd.mh gdb/config/romp/xm-rtbsd.h gdb/config/rs6000/aix4.mh gdb/config/rs6000/aix4.mt gdb/config/rs6000/nm-rs6000.h gdb/config/rs6000/nm-rs6000ly.h gdb/config/rs6000/rs6000.mh gdb/config/rs6000/rs6000.mt gdb/config/rs6000/rs6000lynx.mh gdb/config/rs6000/rs6000lynx.mt gdb/config/rs6000/tm-rs6000-aix4.h gdb/config/rs6000/tm-rs6000.h gdb/config/rs6000/tm-rs6000ly.h gdb/config/rs6000/xm-aix4.h gdb/config/rs6000/xm-rs6000.h gdb/config/s390/nm-linux.h gdb/config/s390/s390.mh gdb/config/s390/s390.mt gdb/config/s390/s390x.mt gdb/config/s390/tm-linux.h gdb/config/s390/tm-s390.h gdb/config/s390/xm-linux.h gdb/config/sh/embed.mt gdb/config/sh/linux.mt gdb/config/sh/nbsd.mh gdb/config/sh/nbsd.mt gdb/config/sh/nm-nbsd.h gdb/config/sh/tm-linux.h gdb/config/sh/tm-nbsd.h gdb/config/sh/tm-wince.h gdb/config/sh/wince.mt gdb/config/sparc/fbsd.mh gdb/config/sparc/fbsd.mt gdb/config/sparc/linux.mh gdb/config/sparc/linux.mt gdb/config/sparc/nbsd64.mh gdb/config/sparc/nbsd64.mt gdb/config/sparc/nm-fbsd.h gdb/config/sparc/nm-linux.h gdb/config/sparc/nm-nbsd.h gdb/config/sparc/nm-sparclynx.h gdb/config/sparc/nm-sun4os4.h gdb/config/sparc/nm-sun4sol2.h gdb/config/sparc/sp64.mt gdb/config/sparc/sp64linux.mt gdb/config/sparc/sp64sim.mt gdb/config/sparc/sp64sol2.mt gdb/config/sparc/sparc-em.mt gdb/config/sparc/sparclet.mt gdb/config/sparc/sparclite.mt gdb/config/sparc/sparclynx.mh gdb/config/sparc/sparclynx.mt gdb/config/sparc/sun4os4.mh gdb/config/sparc/sun4os4.mt gdb/config/sparc/sun4sol2.mh gdb/config/sparc/sun4sol2.mt gdb/config/sparc/tm-fbsd.h gdb/config/sparc/tm-linux.h gdb/config/sparc/tm-nbsd64.h gdb/config/sparc/tm-sp64.h gdb/config/sparc/tm-sp64linux.h gdb/config/sparc/tm-sp64sim.h gdb/config/sparc/tm-sparc.h gdb/config/sparc/tm-sparclet.h gdb/config/sparc/tm-sparclite.h gdb/config/sparc/tm-sparclynx.h gdb/config/sparc/tm-spc-em.h gdb/config/sparc/tm-sun4os4.h gdb/config/sparc/tm-sun4sol2.h gdb/config/sparc/tm-vxsparc.h gdb/config/sparc/vxsparc.mt gdb/config/sparc/xm-linux.h gdb/config/sparc/xm-nbsd.h gdb/config/sparc/xm-sun4sol2.h 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gdb/doc/configure.in gdb/doc/fdl.texi gdb/doc/gpl.texi gdb/doc/lpsrc.sed gdb/doc/psrc.sed gdb/doc/refcard.tex gdb/doc/stabs.texinfo gdb/doublest.c gdb/doublest.h gdb/dpx2-nat.c gdb/dsrec.c gdb/dst.h gdb/dstread.c gdb/dve3900-rom.c gdb/dwarf2cfi.h gdb/dwarfread.c gdb/elfread.c gdb/environ.c gdb/environ.h gdb/eval.c gdb/event-loop.h gdb/exc_request.defs gdb/exec.c gdb/expprint.c gdb/expression.h gdb/f-exp.y gdb/f-lang.c gdb/f-lang.h gdb/f-typeprint.c gdb/f-valprint.c gdb/fbsd-proc.c gdb/findvar.c gdb/fork-child.c gdb/fr30-tdep.c gdb/frame.c gdb/gcore.c gdb/gdb-events.c gdb/gdb-events.h gdb/gdb-events.sh gdb/gdb-stabs.h gdb/gdb.1 gdb/gdb.gdb gdb/gdb.h gdb/gdb_assert.h gdb/gdb_dirent.h gdb/gdb_proc_service.h gdb/gdb_regex.h gdb/gdb_stat.h gdb/gdb_string.h gdb/gdb_thread_db.h gdb/gdb_vfork.h gdb/gdb_wait.h gdb/gdbcmd.h gdb/gdbcore.h gdb/gdbinit.in gdb/gdbserver/Makefile.in gdb/gdbserver/README gdb/gdbserver/acconfig.h gdb/gdbserver/acinclude.m4 gdb/gdbserver/aclocal.m4 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include/opcode/pj.h include/opcode/pn.h include/opcode/ppc.h include/opcode/pyr.h include/opcode/s390.h include/opcode/tahoe.h include/opcode/tic30.h include/opcode/tic54x.h include/opcode/tic80.h include/opcode/v850.h include/opcode/vax.h include/os9k.h include/partition.h include/progress.h include/regs/ChangeLog include/remote-sim.h include/safe-ctype.h include/sort.h include/splay-tree.h include/symcat.h include/ternary.h include/xregex.h include/xregex2.h install-sh intl/ChangeLog intl/Makefile.in intl/acconfig.h intl/aclocal.m4 intl/bindtextdom.c intl/cat-compat.c intl/config.in intl/configure intl/configure.in intl/dcgettext.c intl/dgettext.c intl/explodename.c intl/finddomain.c intl/gettext.c intl/gettext.h intl/gettextP.h intl/hash-string.h intl/intl-compat.c intl/intlh.inst.in intl/l10nflist.c intl/libgettext.h intl/libintl.glibc intl/linux-msg.sed intl/loadinfo.h intl/loadmsgcat.c intl/localealias.c intl/po2tbl.sed.in intl/textdomain.c intl/xopen-msg.sed libiberty/COPYING.LIB libiberty/Makefile.in libiberty/README libiberty/_doprnt.c libiberty/aclocal.m4 libiberty/alloca.c libiberty/argv.c libiberty/asprintf.c libiberty/atexit.c libiberty/basename.c libiberty/bcmp.c libiberty/bcopy.c libiberty/bsearch.c libiberty/bzero.c libiberty/calloc.c libiberty/choose-temp.c libiberty/clock.c libiberty/concat.c libiberty/config.h-vms libiberty/config.in libiberty/config/mh-aix libiberty/config/mh-cxux7 libiberty/config/mh-fbsd21 libiberty/config/mh-openedition libiberty/config/mh-windows libiberty/configure libiberty/configure.in libiberty/copying-lib.texi libiberty/copysign.c libiberty/cp-demangle.c libiberty/cplus-dem.c libiberty/dyn-string.c libiberty/fdmatch.c libiberty/ffs.c libiberty/fibheap.c libiberty/floatformat.c libiberty/fnmatch.c libiberty/fnmatch.txh libiberty/functions.texi libiberty/gather-docs libiberty/getcwd.c libiberty/getopt.c libiberty/getopt1.c libiberty/getpagesize.c libiberty/getpwd.c libiberty/getruntime.c libiberty/hashtab.c libiberty/hex.c libiberty/index.c libiberty/insque.c libiberty/lbasename.c libiberty/libiberty.texi libiberty/maint-tool libiberty/make-temp-file.c libiberty/makefile.vms libiberty/md5.c libiberty/memchr.c libiberty/memcmp.c libiberty/memcpy.c libiberty/memmove.c libiberty/memset.c libiberty/mkstemps.c libiberty/mpw-config.in libiberty/mpw-make.sed libiberty/mpw.c libiberty/msdos.c libiberty/objalloc.c libiberty/obstack.c libiberty/obstacks.texi libiberty/partition.c libiberty/pexecute.c libiberty/putenv.c libiberty/random.c libiberty/regex.c libiberty/rename.c libiberty/rindex.c libiberty/safe-ctype.c libiberty/setenv.c libiberty/sigsetmask.c libiberty/sort.c libiberty/spaces.c libiberty/splay-tree.c libiberty/strcasecmp.c libiberty/strchr.c libiberty/strdup.c libiberty/strerror.c libiberty/strncasecmp.c libiberty/strncmp.c libiberty/strrchr.c libiberty/strsignal.c libiberty/strstr.c libiberty/strtod.c libiberty/strtol.c libiberty/strtoul.c libiberty/ternary.c libiberty/testsuite/Makefile.in libiberty/testsuite/demangle-expected libiberty/testsuite/regress-demangle libiberty/tmpnam.c libiberty/vasprintf.c libiberty/vfork.c libiberty/vfprintf.c libiberty/vmsbuild.com libiberty/vprintf.c libiberty/vsprintf.c libiberty/waitpid.c libiberty/xatexit.c libiberty/xexit.c libiberty/xmalloc.c libiberty/xmemdup.c libiberty/xstrdup.c libiberty/xstrerror.c libtool.m4 ltcf-c.sh ltcf-cxx.sh ltcf-gcj.sh ltconfig ltmain.sh makefile.vms missing mkdep mkinstalldirs mmalloc/COPYING.LIB mmalloc/ChangeLog mmalloc/MAINTAINERS mmalloc/Makefile.in mmalloc/TODO mmalloc/acinclude.m4 mmalloc/aclocal.m4 mmalloc/attach.c mmalloc/configure mmalloc/configure.in mmalloc/detach.c mmalloc/keys.c mmalloc/mcalloc.c mmalloc/mfree.c mmalloc/mm.c mmalloc/mmalloc.c mmalloc/mmalloc.h mmalloc/mmalloc.texi mmalloc/mmap-sup.c mmalloc/mmcheck.c mmalloc/mmemalign.c mmalloc/mmprivate.h mmalloc/mmstats.c mmalloc/mmtrace.awk mmalloc/mmtrace.c mmalloc/mrealloc.c mmalloc/mvalloc.c mmalloc/sbrk-sup.c move-if-change mpw-README mpw-build.in mpw-config.in mpw-configure mpw-install opcodes/ChangeLog-9297 opcodes/ChangeLog-9899 opcodes/MAINTAINERS opcodes/a29k-dis.c opcodes/alpha-dis.c opcodes/alpha-opc.c opcodes/arc-dis.h opcodes/arc-ext.c opcodes/arc-ext.h opcodes/arc-opc.c opcodes/arm-opc.h opcodes/avr-dis.c opcodes/cgen-asm.c opcodes/cgen-asm.in opcodes/cgen-dis.c opcodes/cgen-dis.in opcodes/cgen-ibld.in opcodes/cgen-opc.c opcodes/cgen.sh opcodes/config.in opcodes/cris-dis.c opcodes/cris-opc.c opcodes/d10v-dis.c opcodes/d10v-opc.c opcodes/d30v-dis.c opcodes/d30v-opc.c opcodes/dep-in.sed opcodes/dis-buf.c opcodes/fr30-desc.h opcodes/fr30-ibld.c opcodes/fr30-opc.c opcodes/fr30-opc.h opcodes/h8300-dis.c opcodes/h8500-dis.c opcodes/h8500-opc.h opcodes/hppa-dis.c opcodes/i370-dis.c opcodes/i370-opc.c opcodes/i386-dis.c opcodes/i860-dis.c opcodes/i960-dis.c opcodes/ia64-asmtab.c opcodes/ia64-asmtab.h opcodes/ia64-dis.c opcodes/ia64-gen.c opcodes/ia64-ic.tbl opcodes/ia64-opc-a.c opcodes/ia64-opc-b.c opcodes/ia64-opc-d.c opcodes/ia64-opc-f.c opcodes/ia64-opc-i.c opcodes/ia64-opc-m.c opcodes/ia64-opc-x.c opcodes/ia64-opc.c opcodes/ia64-opc.h opcodes/ia64-raw.tbl opcodes/ia64-war.tbl opcodes/ia64-waw.tbl opcodes/m10200-dis.c opcodes/m10200-opc.c opcodes/m10300-dis.c opcodes/m10300-opc.c opcodes/m32r-desc.h opcodes/m32r-ibld.c opcodes/m32r-opc.c opcodes/m32r-opc.h opcodes/m32r-opinst.c opcodes/m68hc11-dis.c opcodes/m68hc11-opc.c opcodes/m68k-opc.c opcodes/m88k-dis.c opcodes/makefile.vms opcodes/mcore-dis.c opcodes/mcore-opc.h opcodes/mips16-opc.c opcodes/mmix-dis.c opcodes/mmix-opc.c opcodes/mpw-config.in opcodes/mpw-make.sed opcodes/ns32k-dis.c opcodes/openrisc-desc.h opcodes/openrisc-ibld.c opcodes/openrisc-opc.c opcodes/openrisc-opc.h opcodes/opintl.h opcodes/or32-dis.c opcodes/or32-opc.c opcodes/pdp11-dis.c opcodes/pdp11-opc.c opcodes/pj-dis.c opcodes/pj-opc.c opcodes/po/.cvsignore opcodes/po/Make-in opcodes/po/POTFILES.in opcodes/po/da.po opcodes/po/de.po opcodes/po/es.po opcodes/po/fr.po opcodes/po/id.po opcodes/po/opcodes.pot opcodes/po/sv.po opcodes/po/tr.po opcodes/ppc-dis.c opcodes/ppc-opc.c opcodes/s390-dis.c opcodes/s390-mkopc.c opcodes/s390-opc.c opcodes/s390-opc.txt opcodes/sh-opc.h opcodes/sh64-opc.c opcodes/sh64-opc.h opcodes/sparc-dis.c opcodes/sparc-opc.c opcodes/stamp-h.in opcodes/sysdep.h opcodes/tic30-dis.c opcodes/tic54x-dis.c opcodes/tic54x-opc.c opcodes/tic80-dis.c opcodes/tic80-opc.c opcodes/v850-dis.c opcodes/v850-opc.c opcodes/vax-dis.c opcodes/w65-dis.c opcodes/w65-opc.h opcodes/xstormy16-desc.h opcodes/xstormy16-ibld.c opcodes/xstormy16-opc.c opcodes/xstormy16-opc.h opcodes/z8k-dis.c opcodes/z8k-opc.h opcodes/z8kgen.c readline/CHANGELOG readline/CHANGES readline/COPYING readline/ChangeLog.gdb readline/INSTALL readline/MANIFEST readline/Makefile.in readline/README readline/USAGE readline/acconfig.h readline/aclocal.m4 readline/ansi_stdlib.h readline/bind.c readline/callback.c readline/chardefs.h readline/complete.c readline/config.h.bot readline/config.h.in readline/configure readline/configure.in readline/cross-build/cygwin.cache readline/display.c readline/doc/ChangeLog.gdb readline/doc/Makefile.in readline/doc/hist.texinfo readline/doc/hstech.texinfo readline/doc/hsuser.texinfo readline/doc/inc-hist.texinfo readline/doc/manvers.texinfo readline/doc/readline.3 readline/doc/rlman.texinfo readline/doc/rltech.texinfo readline/doc/rluser.texinfo readline/doc/rluserman.texinfo readline/doc/texi2dvi readline/doc/texi2html readline/emacs_keymap.c readline/examples/ChangeLog.gdb readline/examples/Inputrc readline/examples/Makefile.in readline/examples/excallback.c readline/examples/fileman.c readline/examples/histexamp.c readline/examples/manexamp.c readline/examples/rl.c readline/examples/rlfe.c readline/examples/rltest.c readline/examples/rlversion.c readline/funmap.c readline/histexpand.c readline/histfile.c readline/histlib.h readline/history.c readline/history.h readline/histsearch.c readline/input.c readline/isearch.c readline/keymaps.c readline/keymaps.h readline/kill.c readline/macro.c readline/nls.c readline/parens.c readline/posixdir.h readline/posixjmp.h readline/posixstat.h readline/readline.c readline/readline.h readline/rlconf.h readline/rldefs.h readline/rlprivate.h readline/rlshell.h readline/rlstdc.h readline/rltty.c readline/rltty.h readline/rlwinsize.h readline/savestring.c readline/search.c readline/shell.c readline/shlib/Makefile.in readline/signals.c readline/support/config.guess readline/support/config.sub readline/support/install.sh readline/support/mkdirs readline/support/mkdist readline/support/shlib-install readline/support/shobj-conf readline/tcap.h readline/terminal.c readline/tilde.c readline/tilde.h readline/undo.c readline/util.c readline/vi_keymap.c readline/vi_mode.c readline/xmalloc.c readline/xmalloc.h setup.com sim/Makefile.in sim/README-HACKING sim/arm/COPYING sim/arm/README.Cygnus sim/arm/acconfig.h sim/arm/armdefs.h sim/arm/armemu.h sim/arm/armfpe.h sim/arm/arminit.c sim/arm/armopts.h sim/arm/armos.h sim/arm/armrdi.c sim/arm/bag.c sim/arm/bag.h sim/arm/communicate.c sim/arm/communicate.h sim/arm/config.in sim/arm/configure sim/arm/configure.in sim/arm/dbg_conf.h sim/arm/dbg_cp.h sim/arm/dbg_hif.h sim/arm/gdbhost.c sim/arm/gdbhost.h sim/arm/kid.c sim/arm/main.c sim/arm/parent.c sim/arm/tconfig.in sim/common/Make-common.in sim/common/Makefile.in sim/common/acconfig.h sim/common/aclocal.m4 sim/common/callback.c sim/common/cgen-accfp.c sim/common/cgen-cpu.h sim/common/cgen-defs.h sim/common/cgen-engine.h sim/common/cgen-fpu.c sim/common/cgen-fpu.h sim/common/cgen-mem.h sim/common/cgen-ops.h sim/common/cgen-par.c sim/common/cgen-par.h sim/common/cgen-run.c sim/common/cgen-scache.c sim/common/cgen-scache.h sim/common/cgen-sim.h sim/common/cgen-trace.c sim/common/cgen-trace.h sim/common/cgen-types.h sim/common/cgen-utils.c sim/common/cgen.sh sim/common/config.in sim/common/configure sim/common/configure.in sim/common/dv-core.c sim/common/dv-glue.c sim/common/dv-pal.c sim/common/dv-sockser.c sim/common/dv-sockser.h sim/common/gdbinit.in sim/common/genmloop.sh sim/common/gennltvals.sh sim/common/gentmap.c sim/common/gentvals.sh sim/common/hw-alloc.c sim/common/hw-alloc.h sim/common/hw-base.c sim/common/hw-base.h sim/common/hw-device.c sim/common/hw-device.h sim/common/hw-events.c sim/common/hw-events.h sim/common/hw-handles.c sim/common/hw-handles.h sim/common/hw-instances.c sim/common/hw-instances.h sim/common/hw-main.h sim/common/hw-ports.c sim/common/hw-ports.h sim/common/hw-properties.c sim/common/hw-properties.h sim/common/hw-tree.c sim/common/hw-tree.h sim/common/nltvals.def sim/common/nrun.c sim/common/run.1 sim/common/sim-abort.c sim/common/sim-alu.h sim/common/sim-arange.c sim/common/sim-arange.h sim/common/sim-assert.h sim/common/sim-base.h sim/common/sim-basics.h sim/common/sim-bits.c sim/common/sim-bits.h sim/common/sim-break.c sim/common/sim-break.h sim/common/sim-config.c sim/common/sim-config.h sim/common/sim-core.c sim/common/sim-core.h sim/common/sim-cpu.c sim/common/sim-cpu.h sim/common/sim-endian.c sim/common/sim-endian.h sim/common/sim-engine.c sim/common/sim-engine.h sim/common/sim-events.c sim/common/sim-events.h sim/common/sim-fpu.c sim/common/sim-fpu.h sim/common/sim-hload.c sim/common/sim-hrw.c sim/common/sim-hw.c sim/common/sim-hw.h sim/common/sim-info.c sim/common/sim-inline.c sim/common/sim-inline.h sim/common/sim-io.c sim/common/sim-io.h sim/common/sim-load.c sim/common/sim-memopt.c sim/common/sim-memopt.h sim/common/sim-model.c sim/common/sim-model.h sim/common/sim-module.c sim/common/sim-module.h sim/common/sim-n-bits.h sim/common/sim-n-core.h sim/common/sim-n-endian.h sim/common/sim-options.h sim/common/sim-profile.c sim/common/sim-profile.h sim/common/sim-reason.c sim/common/sim-reg.c sim/common/sim-resume.c sim/common/sim-run.c sim/common/sim-signal.c sim/common/sim-signal.h sim/common/sim-stop.c sim/common/sim-trace.c sim/common/sim-trace.h sim/common/sim-types.h sim/common/sim-utils.c sim/common/sim-utils.h sim/common/sim-watch.c sim/common/sim-watch.h sim/common/syscall.c sim/common/tconfig.in sim/configure sim/configure.in sim/d10v/acconfig.h sim/d10v/config.in sim/d10v/configure sim/d10v/configure.in sim/d10v/d10v_sim.h sim/d10v/endian.c sim/d10v/gencode.c sim/d30v/ChangeLog sim/d30v/Makefile.in sim/d30v/acconfig.h sim/d30v/alu.h sim/d30v/config.in sim/d30v/configure sim/d30v/configure.in sim/d30v/cpu.c sim/d30v/cpu.h sim/d30v/d30v-insns sim/d30v/dc-short sim/d30v/engine.c sim/d30v/ic-d30v sim/d30v/sim-calls.c sim/d30v/sim-main.h sim/d30v/tconfig.in sim/erc32/ChangeLog sim/erc32/Makefile.in sim/erc32/NEWS sim/erc32/README.erc32 sim/erc32/README.gdb sim/erc32/README.sis sim/erc32/acconfig.h sim/erc32/config.in sim/erc32/configure sim/erc32/configure.in sim/erc32/end.c sim/erc32/erc32.c sim/erc32/exec.c sim/erc32/float.c sim/erc32/func.c sim/erc32/help.c sim/erc32/interf.c sim/erc32/sis.c sim/erc32/sis.h sim/erc32/startsim sim/fr30/ChangeLog sim/fr30/Makefile.in sim/fr30/README sim/fr30/TODO sim/fr30/arch.c sim/fr30/arch.h sim/fr30/config.in sim/fr30/configure sim/fr30/configure.in sim/fr30/cpu.c sim/fr30/cpu.h sim/fr30/cpuall.h sim/fr30/decode.c sim/fr30/decode.h sim/fr30/devices.c sim/fr30/fr30-sim.h sim/fr30/fr30.c sim/fr30/mloop.in sim/fr30/model.c sim/fr30/sem-switch.c sim/fr30/sem.c sim/fr30/sim-if.c sim/fr30/sim-main.h sim/fr30/tconfig.in sim/fr30/traps.c sim/h8300/Makefile.in sim/h8300/acconfig.h sim/h8300/config.in sim/h8300/configure sim/h8300/configure.in sim/h8300/tconfig.in sim/h8300/writecode.c sim/h8500/ChangeLog sim/h8500/Makefile.in sim/h8500/acconfig.h sim/h8500/compile.c sim/h8500/config.in sim/h8500/configure sim/h8500/configure.in sim/h8500/inst.h sim/h8500/tconfig.in sim/i960/ChangeLog sim/i960/Makefile.in sim/i960/README sim/i960/TODO sim/i960/acconfig.h sim/i960/arch.c sim/i960/arch.h sim/i960/config.in sim/i960/configure sim/i960/configure.in sim/i960/cpu.c sim/i960/cpu.h sim/i960/cpuall.h sim/i960/decode.c sim/i960/decode.h sim/i960/devices.c sim/i960/i960-desc.c sim/i960/i960-desc.h sim/i960/i960-opc.h sim/i960/i960-sim.h sim/i960/i960.c sim/i960/mloop.in sim/i960/model.c sim/i960/sem-switch.c sim/i960/sem.c sim/i960/sim-if.c sim/i960/sim-main.h sim/i960/tconfig.in sim/i960/traps.c sim/igen/ChangeLog sim/igen/Makefile.in sim/igen/acconfig.h sim/igen/config.in sim/igen/configure sim/igen/configure.in sim/igen/filter.c sim/igen/filter.h sim/igen/filter_host.c sim/igen/filter_host.h sim/igen/gen-engine.c sim/igen/gen-engine.h sim/igen/gen-icache.c sim/igen/gen-icache.h sim/igen/gen-idecode.c sim/igen/gen-idecode.h sim/igen/gen-itable.c sim/igen/gen-itable.h sim/igen/gen-model.c sim/igen/gen-model.h sim/igen/gen-semantics.c sim/igen/gen-semantics.h sim/igen/gen-support.c sim/igen/gen-support.h sim/igen/gen.c sim/igen/gen.h sim/igen/igen.c sim/igen/igen.h sim/igen/ld-cache.c sim/igen/ld-cache.h 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sim/testsuite/sim/m32r/srli.cgs sim/testsuite/sim/m32r/st-d.cgs sim/testsuite/sim/m32r/st-minus.cgs sim/testsuite/sim/m32r/st-plus.cgs sim/testsuite/sim/m32r/st.cgs sim/testsuite/sim/m32r/stb-d.cgs sim/testsuite/sim/m32r/stb.cgs sim/testsuite/sim/m32r/sth-d.cgs sim/testsuite/sim/m32r/sth.cgs sim/testsuite/sim/m32r/sub.cgs sim/testsuite/sim/m32r/subv.cgs sim/testsuite/sim/m32r/subx.cgs sim/testsuite/sim/m32r/testutils.inc sim/testsuite/sim/m32r/trap.cgs sim/testsuite/sim/m32r/unlock.cgs sim/testsuite/sim/m32r/uread16.ms sim/testsuite/sim/m32r/uread32.ms sim/testsuite/sim/m32r/uwrite16.ms sim/testsuite/sim/m32r/uwrite32.ms sim/testsuite/sim/m32r/xor.cgs sim/testsuite/sim/m32r/xor3.cgs sim/tic80/ChangeLog sim/tic80/Makefile.in sim/tic80/acconfig.h sim/tic80/alu.h sim/tic80/config.in sim/tic80/configure sim/tic80/configure.in sim/tic80/cpu.h sim/tic80/interp.c sim/tic80/misc.c sim/tic80/sim-calls.c sim/tic80/sim-main.h sim/tic80/tic80.dc sim/tic80/tic80.ic sim/tic80/tic80.igen sim/v850/ChangeLog sim/v850/Makefile.in sim/v850/acconfig.h sim/v850/config.in sim/v850/configure sim/v850/configure.in sim/v850/interp.c sim/v850/sim-main.h sim/v850/simops.c sim/v850/simops.h sim/v850/v850-dc sim/v850/v850.igen sim/v850/v850_sim.h sim/w65/ChangeLog sim/w65/Makefile.in sim/w65/acconfig.h sim/w65/config.in sim/w65/configure sim/w65/configure.in sim/w65/gencode.c sim/w65/interp.c sim/w65/interp.h sim/w65/run.c sim/z8k/ChangeLog sim/z8k/Makefile.in sim/z8k/acconfig.h sim/z8k/comped1.c sim/z8k/comped2.c sim/z8k/comped3.c sim/z8k/compedb3.c sim/z8k/config.in sim/z8k/configure sim/z8k/configure.in sim/z8k/iface.c sim/z8k/inlines.h sim/z8k/list.c sim/z8k/mem.c sim/z8k/mem.h sim/z8k/quick.c sim/z8k/sim.h sim/z8k/support.c sim/z8k/syscall.h sim/z8k/tconfig.in sim/z8k/tm.h sim/z8k/writecode.c symlink-tree texinfo/texinfo.tex ylwrap Cherrypick from cagney_regbuf-20020515-branch 2002-05-15 21:19:22 UTC nobody 'This commit was manufactured by cvs2svn to create branch': gdb/blockframe.c gdb/frame.h gdb/gdbarch.c gdb/gdbarch.h gdb/gdbarch.sh gdb/infcmd.c gdb/inferior.h gdb/infrun.c gdb/regcache.c gdb/regcache.h gdb/valops.c gdb/value.h gdb/values.c Cherrypick from master 2002-05-28 20:06:27 UTC Marek Michalkiewicz <marekm@amelek.gda.pl> '2002-05-28 Marek Michalkiewicz <marekm@amelek.gda.pl>': ChangeLog Makefile.in bfd/ChangeLog bfd/Makefile.am bfd/Makefile.in bfd/acinclude.m4 bfd/aclocal.m4 bfd/aix5ppc-core.c bfd/aout-adobe.c bfd/aout-target.h bfd/aout-tic30.c bfd/archures.c bfd/bfd-in2.h bfd/bfd.c bfd/binary.c bfd/bout.c bfd/coff-arm.c bfd/coff-rs6000.c bfd/coff-sh.c bfd/coff64-rs6000.c bfd/coffcode.h bfd/config.bfd bfd/config.in bfd/configure bfd/configure.in bfd/cpu-dlx.c bfd/cpu-mips.c bfd/doc/ChangeLog bfd/doc/Makefile.in bfd/doc/chew.c bfd/elf-bfd.h bfd/elf-eh-frame.c bfd/elf.c bfd/elf32-arm.h bfd/elf32-dlx.c bfd/elf32-i386.c bfd/elf32-m68k.c bfd/elf32-mips.c bfd/elf64-ppc.c bfd/elf64-x86-64.c bfd/elflink.h bfd/elfxx-ia64.c bfd/elfxx-mips.c bfd/elfxx-target.h bfd/hash.c bfd/i386msdos.c bfd/i386os9k.c bfd/ieee.c bfd/ihex.c bfd/libbfd-in.h bfd/libbfd.h bfd/libecoff.h bfd/linker.c bfd/mmo.c bfd/nlm-target.h bfd/oasys.c bfd/peXXigen.c bfd/ppcboot.c bfd/reloc.c bfd/rs6000-core.c bfd/section.c bfd/som.c bfd/srec.c bfd/syms.c bfd/targets.c bfd/tekhex.c bfd/versados.c bfd/version.h bfd/vms.c config-ml.in config.guess config.sub config/ChangeLog config/acinclude.m4 config/mh-apollo68 config/mh-dgux config/mh-dgux386 configure configure.in gdb/MAINTAINERS gdb/NEWS gdb/PROBLEMS gdb/alpha-linux-tdep.c gdb/alpha-osf1-tdep.c gdb/alpha-tdep.c gdb/alpha-tdep.h gdb/alphafbsd-tdep.c gdb/alphanbsd-tdep.c gdb/arm-linux-tdep.c gdb/arm-tdep.c gdb/arm-tdep.h gdb/armnbsd-tdep.c gdb/c-exp.y gdb/c-lang.c gdb/c-lang.h gdb/cli/cli-dump.c gdb/config/alpha/nm-nbsd.h gdb/config/alpha/tm-nbsd.h gdb/config/arm/nbsd.mt gdb/config/arm/nbsdaout.mh gdb/config/arm/nbsdelf.mh gdb/config/arm/nm-nbsd.h gdb/config/arm/nm-nbsdaout.h gdb/config/avr/avr.mt gdb/config/djgpp/fnchange.lst gdb/config/h8300/tm-h8300.h gdb/config/i386/nbsdaout.mh gdb/config/i386/nbsdaout.mt gdb/config/i386/nbsdelf.mh gdb/config/i386/nbsdelf.mt gdb/config/i386/nm-cygwin.h gdb/config/i386/nm-go32.h gdb/config/i386/nm-nbsd.h gdb/config/i386/nm-nbsdaout.h gdb/config/i386/tm-nbsd.h gdb/config/i386/tm-nbsdaout.h gdb/config/m68k/nbsdaout.mh gdb/config/m68k/nbsdaout.mt gdb/config/m68k/nm-nbsd.h gdb/config/m68k/nm-nbsdaout.h gdb/config/m68k/tm-nbsd.h gdb/config/mips/nbsd.mh gdb/config/mips/nbsd.mt gdb/config/mips/nm-nbsd.h gdb/config/mips/tm-nbsd.h gdb/config/nm-nbsd.h gdb/config/nm-nbsdaout.h gdb/config/ns32k/nbsdaout.mh gdb/config/ns32k/nbsdaout.mt gdb/config/ns32k/nm-nbsd.h gdb/config/ns32k/nm-nbsdaout.h gdb/config/ns32k/tm-nbsd.h gdb/config/ns32k/tm-ns32k.h gdb/config/pa/hpux11w.mh gdb/config/powerpc/nbsd.mh gdb/config/powerpc/nbsd.mt gdb/config/powerpc/nm-nbsd.h gdb/config/powerpc/tm-nbsd.h gdb/config/sh/tm-sh.h gdb/config/sparc/nbsdaout.mh gdb/config/sparc/nbsdaout.mt gdb/config/sparc/nbsdelf.mh gdb/config/sparc/nbsdelf.mt gdb/config/sparc/nm-nbsdaout.h gdb/config/sparc/tm-nbsd.h gdb/config/sparc/tm-nbsdaout.h gdb/config/v850/v850.mt gdb/configure.host gdb/configure.tgt gdb/corelow.c gdb/d10v-tdep.c gdb/doc/ChangeLog gdb/doc/gdb.texinfo gdb/doc/gdbint.texinfo gdb/dwarf2cfi.c gdb/dwarf2read.c gdb/gdb_indent.sh gdb/gdbserver/server.c gdb/gdbtypes.c gdb/gdbtypes.h gdb/h8300-tdep.c gdb/hpread.c gdb/i386-tdep.c gdb/macrocmd.c gdb/macroscope.c gdb/macroscope.h gdb/macrotab.c gdb/mi/ChangeLog gdb/mips-tdep.c gdb/mipsnbsd-nat.c gdb/mipsnbsd-tdep.c gdb/mipsnbsd-tdep.h gdb/ns32k-tdep.c gdb/ns32k-tdep.h gdb/ns32knbsd-tdep.c gdb/osabi.c gdb/osabi.h gdb/p-exp.y gdb/parse.c gdb/parser-defs.h gdb/ppcnbsd-nat.c gdb/ppcnbsd-tdep.c gdb/ppcnbsd-tdep.h gdb/remote.c gdb/rs6000-tdep.c gdb/ser-tcp.c gdb/sh-tdep.c gdb/sh-tdep.h gdb/sh3-rom.c gdb/shnbsd-tdep.c gdb/testsuite/ChangeLog gdb/testsuite/configure gdb/testsuite/configure.in gdb/testsuite/gdb.arch/Makefile.in gdb/testsuite/gdb.arch/altivec-abi.c gdb/testsuite/gdb.arch/altivec-abi.exp gdb/testsuite/gdb.arch/altivec-regs.c gdb/testsuite/gdb.arch/altivec-regs.exp gdb/testsuite/gdb.arch/configure gdb/testsuite/gdb.arch/configure.in gdb/testsuite/gdb.base/all-bin.exp gdb/testsuite/gdb.base/call-rt-st.exp gdb/testsuite/gdb.base/completion.exp gdb/testsuite/gdb.c++/inherit.exp gdb/testsuite/gdb.c++/local.exp gdb/testsuite/gdb.c++/m-data.cc gdb/testsuite/gdb.c++/m-data.exp gdb/testsuite/gdb.c++/try_catch.cc gdb/testsuite/gdb.c++/try_catch.exp gdb/testsuite/lib/gdb.exp gdb/v850-tdep.c gdb/version.in gdb/x86-64-tdep.c include/ChangeLog include/bfdlink.h include/dis-asm.h include/elf/ChangeLog include/elf/common.h include/elf/dlx.h include/elf/i386.h include/elf/ia64.h include/gdb/ChangeLog include/gdb/sim-d10v.h include/opcode/ChangeLog include/opcode/dlx.h include/opcode/h8300.h include/opcode/ia64.h include/opcode/mips.h include/opcode/sparc.h libiberty/ChangeLog libiberty/config.table opcodes/ChangeLog opcodes/Makefile.am opcodes/Makefile.in opcodes/acinclude.m4 opcodes/aclocal.m4 opcodes/arc-dis.c opcodes/arm-dis.c opcodes/configure opcodes/configure.in opcodes/disassemble.c opcodes/dlx-dis.c opcodes/fr30-asm.c opcodes/fr30-desc.c opcodes/fr30-dis.c opcodes/m32r-asm.c opcodes/m32r-desc.c opcodes/m32r-dis.c opcodes/m68k-dis.c opcodes/mips-dis.c opcodes/mips-opc.c opcodes/openrisc-asm.c opcodes/openrisc-desc.c opcodes/openrisc-dis.c opcodes/sh-dis.c opcodes/sh64-dis.c opcodes/xstormy16-asm.c opcodes/xstormy16-desc.c opcodes/xstormy16-dis.c sim/ChangeLog sim/MAINTAINERS sim/arm/ChangeLog sim/arm/Makefile.in sim/arm/armcopro.c sim/arm/armemu.c sim/arm/armos.c sim/arm/armsupp.c sim/arm/armvirt.c sim/arm/dbg_rdi.h sim/arm/thumbemu.c sim/arm/wrapper.c sim/common/ChangeLog sim/common/run-sim.h sim/common/run.c sim/common/sim-options.c sim/d10v/ChangeLog sim/d10v/Makefile.in sim/d10v/interp.c sim/d10v/simops.c sim/h8300/ChangeLog sim/h8300/compile.c sim/h8300/inst.h
author: nobody <> 2002-06-15 12:26:33 +0000
committer: nobody <> 2002-06-15 12:26:33 +0000
commit: 2c830de8f260ebb1feb0b13c17eefdf12722d9f7 (patch)
tree: 5d09e3d1de5fadbc55de87767b0a9eed41d4636f /gdb/config
parent: 554e81cff7bca83fe562cd2c841cb7562a95b6db (diff)
download: binutils-gdb-2c830de8f260ebb1feb0b13c17eefdf12722d9f7.tar.gz
561 files changed, 23091 insertions, 0 deletions
diff --git a/gdb/config/alpha/alpha-linux.mh b/gdb/config/alpha/alpha-linux.mh
new file mode 100644
index 00000000000..39f35320188
--- /dev/null
+++ b/gdb/config/alpha/alpha-linux.mh
@@ -0,0 +1,10 @@
+# Host: Little-endian Alpha running Linux
+XM_FILE= xm-alphalinux.h
+NAT_FILE= nm-linux.h
+NATDEPFILES= infptrace.o inftarg.o corelow.o alpha-nat.o linux-proc.o \
+	fork-child.o proc-service.o thread-db.o lin-lwp.o gcore.o
+
+LOADLIBES = -ldl -rdynamic
+
+MMALLOC = 
+MMALLOC_CFLAGS = -DNO_MMALLOC 
diff --git a/gdb/config/alpha/alpha-linux.mt b/gdb/config/alpha/alpha-linux.mt
new file mode 100644
index 00000000000..25538b34589
--- /dev/null
+++ b/gdb/config/alpha/alpha-linux.mt
@@ -0,0 +1,3 @@
+# Target: Little-endian Alpha
+TDEPFILES= alpha-tdep.o alpha-linux-tdep.o solib.o solib-svr4.o solib-legacy.o
+TM_FILE= tm-alphalinux.h
diff --git a/gdb/config/alpha/alpha-osf1.mh b/gdb/config/alpha/alpha-osf1.mh
new file mode 100644
index 00000000000..6d53b44505b
--- /dev/null
+++ b/gdb/config/alpha/alpha-osf1.mh
@@ -0,0 +1,5 @@
+# Host: Little-endian Alpha running OSF/1-1.x
+XM_FILE= xm-alphaosf.h
+NAT_FILE= nm-osf.h
+NATDEPFILES= infptrace.o inftarg.o corelow.o alpha-nat.o fork-child.o \
+	solib-osf.o solib.o
diff --git a/gdb/config/alpha/alpha-osf1.mt b/gdb/config/alpha/alpha-osf1.mt
new file mode 100644
index 00000000000..29212c9a957
--- /dev/null
+++ b/gdb/config/alpha/alpha-osf1.mt
@@ -0,0 +1,3 @@
+# Target: Little-endian Alpha
+TDEPFILES= alpha-tdep.o alpha-osf1-tdep.o
+TM_FILE= tm-alpha.h
diff --git a/gdb/config/alpha/alpha-osf2.mh b/gdb/config/alpha/alpha-osf2.mh
new file mode 100644
index 00000000000..b853ebb30a9
--- /dev/null
+++ b/gdb/config/alpha/alpha-osf2.mh
@@ -0,0 +1,6 @@
+# Host: Little-endian Alpha running OSF/1-2.x using procfs
+XM_FILE= xm-alphaosf.h
+NAT_FILE= nm-osf2.h
+NATDEPFILES= infptrace.o inftarg.o corelow.o alpha-nat.o fork-child.o \
+	solib-osf.o solib.o procfs.o proc-api.o proc-events.o proc-flags.o \
+	proc-why.o
diff --git a/gdb/config/alpha/alpha-osf3.mh b/gdb/config/alpha/alpha-osf3.mh
new file mode 100644
index 00000000000..f074444fae0
--- /dev/null
+++ b/gdb/config/alpha/alpha-osf3.mh
@@ -0,0 +1,6 @@
+# Host: Little-endian Alpha running OSF/1-3.x and higher using procfs
+XM_FILE= xm-alphaosf.h
+NAT_FILE= nm-osf3.h
+NATDEPFILES= infptrace.o inftarg.o corelow.o alpha-nat.o fork-child.o \
+	solib-osf.o solib.o procfs.o proc-api.o proc-events.o proc-flags.o \
+	proc-why.o
diff --git a/gdb/config/alpha/fbsd.mh b/gdb/config/alpha/fbsd.mh
new file mode 100644
index 00000000000..7e036e43a47
--- /dev/null
+++ b/gdb/config/alpha/fbsd.mh
@@ -0,0 +1,5 @@
+# Host: FreeBSD/Alpha
+NATDEPFILES= fork-child.o infptrace.o inftarg.o \
+	solib.o solib-svr4.o solib-legacy.o \
+	corelow.o core-regset.o alphabsd-nat.o
+NAT_FILE= nm-fbsd.h
diff --git a/gdb/config/alpha/fbsd.mt b/gdb/config/alpha/fbsd.mt
new file mode 100644
index 00000000000..4b4ecbf6235
--- /dev/null
+++ b/gdb/config/alpha/fbsd.mt
@@ -0,0 +1,3 @@
+# Target: FreeBSD/Alpha
+TDEPFILES= alpha-tdep.o alphabsd-tdep.o alphafbsd-tdep.o
+TM_FILE= tm-fbsd.h
diff --git a/gdb/config/alpha/nbsd.mh b/gdb/config/alpha/nbsd.mh
new file mode 100644
index 00000000000..52754a3065d
--- /dev/null
+++ b/gdb/config/alpha/nbsd.mh
@@ -0,0 +1,4 @@
+# Host: Alpha running NetBSD
+NAT_CLIBS=
+NATDEPFILES= infptrace.o inftarg.o fork-child.o alphabsd-nat.o
+NAT_FILE= nm-nbsd.h
diff --git a/gdb/config/alpha/nbsd.mt b/gdb/config/alpha/nbsd.mt
new file mode 100644
index 00000000000..7fd9c503255
--- /dev/null
+++ b/gdb/config/alpha/nbsd.mt
@@ -0,0 +1,4 @@
+# Target: Alpha running NetBSD
+TDEPFILES= alpha-tdep.o alphabsd-tdep.o alphanbsd-tdep.o corelow.o \
+	nbsd-tdep.o solib.o solib-svr4.o
+TM_FILE= tm-nbsd.h
diff --git a/gdb/config/alpha/nm-fbsd.h b/gdb/config/alpha/nm-fbsd.h
new file mode 100644
index 00000000000..f3fb129997c
--- /dev/null
+++ b/gdb/config/alpha/nm-fbsd.h
@@ -0,0 +1,45 @@
+/* Native-dependent definitions for FreeBSD/Alpha.
+   Copyright 1986, 1987, 1989, 1992, 1996, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_FBSD_H
+#define NM_FBSD_H
+
+/* Type of the third argument to the `ptrace' system call.  */
+#define PTRACE_ARG3_TYPE caddr_t
+
+/* Override copies of {fetch,store}_inferior_registers in `infptrace.c'.  */
+#define FETCH_INFERIOR_REGISTERS
+
+/* We can attach and detach.  */
+#define ATTACH_DETACH
+
+/* The Alpha does not step over a breakpoint.  */
+#define CANNOT_STEP_BREAKPOINT
+
+
+/* Shared library support.  */
+
+#define SVR4_SHARED_LIBS
+
+#include "solib.h"		/* Support for shared libraries. */
+#include "elf/common.h"		/* Additional ELF shared library info. */
+
+#endif /* NM_FBSD_H */
diff --git a/gdb/config/alpha/nm-linux.h b/gdb/config/alpha/nm-linux.h
new file mode 100644
index 00000000000..c59b88cb21e
--- /dev/null
+++ b/gdb/config/alpha/nm-linux.h
@@ -0,0 +1,48 @@
+/* Native definitions for alpha running GNU/Linux.
+
+   Copyright 1993, 1994, 1996, 1998, 2000, 2001, 2002 Free Software
+   Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_LINUX_H
+#define NM_LINUX_H
+
+#include "nm-linux.h"
+
+/* ptrace register ``addresses'' are absolute.  */
+
+#define U_REGS_OFFSET 0
+
+/* FIXME: This is probably true, or should be, on all GNU/Linux ports.
+   IA64?  Sparc64?  */
+#define PTRACE_ARG3_TYPE long
+
+/* ptrace transfers longs, the ptrace man page is lying.  */
+
+#define PTRACE_XFER_TYPE long
+
+/* The alpha does not step over a breakpoint, the manpage is lying again.  */
+
+#define CANNOT_STEP_BREAKPOINT
+
+/* Given a pointer to either a gregset_t or fpregset_t, return a
+   pointer to the first register.  */
+#define ALPHA_REGSET_BASE(regsetp)  ((long *) (regsetp))
+
+#endif /* NM_LINUX_H */
diff --git a/gdb/config/alpha/nm-nbsd.h b/gdb/config/alpha/nm-nbsd.h
new file mode 100644
index 00000000000..caf1c237cfb
--- /dev/null
+++ b/gdb/config/alpha/nm-nbsd.h
@@ -0,0 +1,31 @@
+/* Native-dependent definitions for Alpha running NetBSD, for GDB.
+   Copyright 2002 Free Software Foundation, Inc.
+   Contributed by Wasabi Systems, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSD_H
+#define NM_NBSD_H
+
+/* Get generic NetBSD native definitions.  */
+#include "config/nm-nbsd.h"
+
+/* The Alpha does not step over a breakpoint.  */
+#define CANNOT_STEP_BREAKPOINT
+
+#endif /* NM_NBSD_H */
diff --git a/gdb/config/alpha/nm-osf.h b/gdb/config/alpha/nm-osf.h
new file mode 100644
index 00000000000..20b5ae4a39a
--- /dev/null
+++ b/gdb/config/alpha/nm-osf.h
@@ -0,0 +1,43 @@
+/* Native definitions for alpha running OSF/1.
+   Copyright 1993, 1994, 1995, 1998, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* ptrace register ``addresses'' are absolute.  */
+
+#define U_REGS_OFFSET 0
+
+/* FIXME: Shouldn't the default definition in inferior.h be int* ? */
+
+#define PTRACE_ARG3_TYPE int*
+
+/* ptrace transfers longs, the ptrace man page is lying.  */
+
+#define PTRACE_XFER_TYPE long
+
+/* The alpha does not step over a breakpoint, the manpage is lying again.  */
+
+#define CANNOT_STEP_BREAKPOINT
+
+/* Support for shared libraries.  */
+
+#include "solib.h"
+
+/* Given a pointer to either a gregset_t or fpregset_t, return a
+   pointer to the first register.  */
+#define ALPHA_REGSET_BASE(regsetp)     ((regsetp)->regs)
diff --git a/gdb/config/alpha/nm-osf2.h b/gdb/config/alpha/nm-osf2.h
new file mode 100644
index 00000000000..4b225af237f
--- /dev/null
+++ b/gdb/config/alpha/nm-osf2.h
@@ -0,0 +1,55 @@
+/* Native definitions for alpha running OSF/1-2.x, using procfs.
+   Copyright 1995, 1996, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Get generic OSF/1 definitions.  */
+#include "alpha/nm-osf.h"
+
+/* OSF/1-2.x has optional /proc support, try to use it instead of ptrace.  */
+#define USE_PROC_FS
+#define HAVE_OPTIONAL_PROC_FS
+
+/* OSF/1 doesn't provide the standard fault definitions, so don't use them.  */
+#define FAULTED_USE_SIGINFO
+
+/* Don't trace faults under OSF/1, rely on the posting of the appropriate
+   signal if fault tracing is disabled.
+   Tracing T_IFAULT under Alpha OSF/1 causes a `floating point enable'
+   fault from which we cannot continue (except by disabling the
+   tracing).
+   And as OSF/1 doesn't provide the standard fault definitions, the
+   mapping of faults to appropriate signals in procfs_wait is difficult.  */
+#define PROCFS_DONT_TRACE_FAULTS
+
+/* Work around some peculiarities in the OSF/1 procfs implementation.  */
+#define PROCFS_SIGPEND_OFFSET
+#define PROCFS_NEED_PIOCSSIG_FOR_KILL
+#define PROCFS_DONT_PIOCSSIG_CURSIG
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size (void);
+
+/* poll() doesn't seem to work properly for /proc in this version of the OS.
+   If we only specify POLLPRI, things hang.  It seems to get better when we set
+   POLLOUT, but that always returns POLLNVAL!!!  Also, POLLOUT causes problems
+   on other OSes.  */
+
+#define LOSING_POLL
diff --git a/gdb/config/alpha/nm-osf3.h b/gdb/config/alpha/nm-osf3.h
new file mode 100644
index 00000000000..e2818d51afc
--- /dev/null
+++ b/gdb/config/alpha/nm-osf3.h
@@ -0,0 +1,27 @@
+/* Native definitions for alpha running OSF/1-3.x and higher, using procfs.
+   Copyright 1995 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* OSF/1-3.x fixes some OSF/1-2.x procfs peculiarities and adds
+   a new one.  */
+#include "alpha/nm-osf2.h"
+
+#undef PROCFS_NEED_PIOCSSIG_FOR_KILL
+#undef PROCFS_DONT_PIOCSSIG_CURSIG
+#define PROCFS_NEED_CLEAR_CURSIG_FOR_KILL
diff --git a/gdb/config/alpha/tm-alpha.h b/gdb/config/alpha/tm-alpha.h
new file mode 100644
index 00000000000..feb752a1495
--- /dev/null
+++ b/gdb/config/alpha/tm-alpha.h
@@ -0,0 +1,86 @@
+/* Definitions to make GDB run on an Alpha box under OSF1.  This is
+   also used by the Alpha/Netware and Alpha GNU/Linux targets.
+
+   Copyright 1993, 1994, 1995, 1996, 1998, 1999, 2000, 2002 Free
+   Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_ALPHA_H
+#define TM_ALPHA_H
+
+#define GDB_MULTI_ARCH GDB_MULTI_ARCH_PARTIAL
+
+#include "bfd.h"
+#include "coff/sym.h"		/* Needed for PDR below.  */
+#include "coff/symconst.h"
+
+struct frame_info;
+struct symbol;
+
+/* Number of traps that happen between exec'ing the shell
+   to run an inferior, and when we finally get to
+   the inferior code.  This is 2 on most implementations.  */
+#define START_INFERIOR_TRAPS_EXPECTED 3
+
+/* Special symbol found in blocks associated with routines.  We can hang
+   alpha_extra_func_info_t's off of this.  */
+
+#define MIPS_EFI_SYMBOL_NAME "__GDB_EFI_INFO__"
+extern void ecoff_relocate_efi (struct symbol *, CORE_ADDR);
+
+#define RA_REGNUM 26		/* XXXJRT needed by mdebugread.c */
+
+/* Specific information about a procedure.
+   This overlays the ALPHA's PDR records, 
+   alpharead.c (ab)uses this to save memory */
+
+typedef struct alpha_extra_func_info
+  {
+    long numargs;		/* number of args to procedure (was iopt) */
+    PDR pdr;			/* Procedure descriptor record */
+  }
+ *alpha_extra_func_info_t;
+
+/* Define the extra_func_info that mipsread.c needs.
+   FIXME: We should define our own PDR interface, perhaps in a separate
+   header file. This would get rid of the <bfd.h> inclusion in all sources
+   and would abstract the mips/alpha interface from ecoff.  */
+#define mips_extra_func_info alpha_extra_func_info
+#define mips_extra_func_info_t alpha_extra_func_info_t
+
+
+#define PRINT_EXTRA_FRAME_INFO(fi) alpha_print_extra_frame_info ((fi))
+extern void alpha_print_extra_frame_info (struct frame_info *);
+
+
+/* It takes two values to specify a frame on the ALPHA.  Sigh.
+
+   In fact, at the moment, the *PC* is the primary value that sets up
+   a frame.  The PC is looked up to see what function it's in; symbol
+   information from that function tells us which register is the frame
+   pointer base, and what offset from there is the "virtual frame pointer".
+   (This is usually an offset from SP.)  FIXME -- this should be cleaned
+   up so that the primary value is the SP, and the PC is used to disambiguate
+   multiple functions with the same SP that are at different stack levels. */
+
+#define SETUP_ARBITRARY_FRAME(argc, argv) \
+  alpha_setup_arbitrary_frame (argc, argv)
+extern struct frame_info *alpha_setup_arbitrary_frame (int, CORE_ADDR *);
+
+#endif /* TM_ALPHA_H */
diff --git a/gdb/config/alpha/tm-alphalinux.h b/gdb/config/alpha/tm-alphalinux.h
new file mode 100644
index 00000000000..27ff45722af
--- /dev/null
+++ b/gdb/config/alpha/tm-alphalinux.h
@@ -0,0 +1,45 @@
+/* Definitions to make GDB run on an Alpha box under GNU/Linux.  The
+   definitions here are used when the _target_ system is running
+   GNU/Linux.
+
+   Copyright 1996, 1998, 1999, 2000, 2002 Free Software Foundation,
+   Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_LINUXALPHA_H
+#define TM_LINUXALPHA_H
+
+#include "alpha/tm-alpha.h"
+
+/* Get start and end address of sigtramp handler.  */
+
+extern LONGEST alpha_linux_sigtramp_offset (CORE_ADDR);
+#define SIGTRAMP_START(pc)	(pc - alpha_linux_sigtramp_offset (pc))
+#define SIGTRAMP_END(pc)	(SIGTRAMP_START(pc) + 3*4)
+
+
+/* Number of traps that happen between exec'ing the shell to run an
+   inferior, and when we finally get to the inferior code.  This is 2
+   on GNU/Linux and most implementations.  */
+#undef START_INFERIOR_TRAPS_EXPECTED
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+#include "tm-linux.h"
+
+#endif /* TM_LINUXALPHA_H */
diff --git a/gdb/config/alpha/tm-fbsd.h b/gdb/config/alpha/tm-fbsd.h
new file mode 100644
index 00000000000..d1d525466ec
--- /dev/null
+++ b/gdb/config/alpha/tm-fbsd.h
@@ -0,0 +1,32 @@
+/* Target-dependent definitions for FreeBSD/Alpha.
+   Copyright 2000, 2001, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_FBSD_H
+#define TM_FBSD_H
+
+#include "alpha/tm-alpha.h"
+
+/* Number of traps that happen between exec'ing the shell to run an
+   inferior, and when we finally get to the inferior code.  The
+   default is right for FreeBSD.  */
+
+#undef START_INFERIOR_TRAPS_EXPECTED
+
+#endif /* TM_FBSD_H */
diff --git a/gdb/config/alpha/tm-nbsd.h b/gdb/config/alpha/tm-nbsd.h
new file mode 100644
index 00000000000..90a75a78fd6
--- /dev/null
+++ b/gdb/config/alpha/tm-nbsd.h
@@ -0,0 +1,33 @@
+/* Target-dependent definitions for NetBSD/Alpha.
+   Copyright 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_NBSD_H
+#define TM_NBSD_H
+
+#include "alpha/tm-alpha.h"
+#include "solib.h"
+
+/* Number of traps that happen between exec'ing the shell to run an
+   inferior, and when we finally get to the inferior code.  The
+   default is right for NetBSD.  */
+
+#undef START_INFERIOR_TRAPS_EXPECTED
+
+#endif /* TM_NBSD_H */
diff --git a/gdb/config/alpha/xm-alphalinux.h b/gdb/config/alpha/xm-alphalinux.h
new file mode 100644
index 00000000000..f1bc14da4bd
--- /dev/null
+++ b/gdb/config/alpha/xm-alphalinux.h
@@ -0,0 +1,26 @@
+/* Host definitions for GDB running on an Alpha under GNU/Linux.
+
+   Copyright 1996, 2001, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* The alpha has no siginterrupt routine.  */
+#define NO_SIGINTERRUPT
+
+#define HAVE_TERMIOS
+#define USG
diff --git a/gdb/config/alpha/xm-alphaosf.h b/gdb/config/alpha/xm-alphaosf.h
new file mode 100644
index 00000000000..67d3cc4af8a
--- /dev/null
+++ b/gdb/config/alpha/xm-alphaosf.h
@@ -0,0 +1,24 @@
+/* Host definitions for GDB running on an alpha under OSF/1
+   Copyright 1992, 1993, 1996 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* The alpha has no siginterrupt routine.  */
+#define NO_SIGINTERRUPT
+
+#define HAVE_TERMIOS
diff --git a/gdb/config/arc/arc.mt b/gdb/config/arc/arc.mt
new file mode 100644
index 00000000000..8ee8c3d0619
--- /dev/null
+++ b/gdb/config/arc/arc.mt
@@ -0,0 +1,3 @@
+# Target: ARC processor
+TDEPFILES = arc-tdep.o
+TM_FILE = tm-arc.h
diff --git a/gdb/config/arc/tm-arc.h b/gdb/config/arc/tm-arc.h
new file mode 100644
index 00000000000..cbdcf41e0e9
--- /dev/null
+++ b/gdb/config/arc/tm-arc.h
@@ -0,0 +1,336 @@
+/* Parameters for target machine ARC, for GDB, the GNU debugger.
+   Copyright 1995, 1996, 1998, 1999, 2000 Free Software Foundation, Inc.
+   Contributed by Cygnus Support.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+/* Used by arc-tdep.c to set the default cpu type.  */
+#define DEFAULT_ARC_CPU_TYPE "base"
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+   to reach some "real" code.  */
+
+#define SKIP_PROLOGUE(pc) (arc_skip_prologue (pc, 0))
+extern CORE_ADDR arc_skip_prologue (CORE_ADDR, int);
+
+#define PROLOGUE_FRAMELESS_P(pc) arc_prologue_frameless_p(pc)
+extern int arc_prologue_frameless_p (CORE_ADDR);
+
+/* Sequence of bytes for breakpoint instruction.
+   ??? The current value is "sr -1,[-1]" and is for the simulator only.
+   The simulator watches for this and does the right thing.
+   The hardware version will have to associate with each breakpoint
+   the sequence "flag 1; nop; nop; nop".  IE: The breakpoint insn will not
+   be a fixed set of bits but instead will be a branch to a semi-random
+   address.  Presumably this will be cleaned up for "second silicon".  */
+#define BIG_BREAKPOINT { 0x12, 0x1f, 0xff, 0xff }
+#define LITTLE_BREAKPOINT { 0xff, 0xff, 0x1f, 0x12 }
+
+/* Given the exposed pipeline, there isn't any one correct value.
+   However, this value must be 4.  GDB can't handle any other value (other than
+   zero).  See for example infrun.c:
+   "prev_pc != stop_pc - DECR_PC_AFTER_BREAK"  */
+/* FIXME */
+#define DECR_PC_AFTER_BREAK 8
+
+/* We don't have a reliable single step facility.
+   ??? We do have a cycle single step facility, but that won't work.  */
+#define SOFTWARE_SINGLE_STEP_P() 1
+extern void arc_software_single_step (enum target_signal, int);
+#define SOFTWARE_SINGLE_STEP(sig,bp_p) arc_software_single_step (sig, bp_p)
+
+/* FIXME: Need to set STEP_SKIPS_DELAY.  */
+
+/* Given a pc value as defined by the hardware, return the real address.
+   Remember that on the ARC blink contains that status register which
+   includes PC + flags (so we have to mask out the flags).  */
+#define ARC_PC_TO_REAL_ADDRESS(pc) (((pc) & 0xffffff) << 2)
+
+/* Immediately after a function call, return the saved pc.
+   Can't always go through the frames for this because on some machines
+   the new frame is not set up until the new function
+   executes some instructions.  */
+
+#define SAVED_PC_AFTER_CALL(frame) \
+  (ARC_PC_TO_REAL_ADDRESS (read_register (BLINK_REGNUM)))
+
+/* Stack grows upward */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Say how long (ordinary) registers are.  This is a piece of bogosity
+   used in push_word and a few other places; REGISTER_RAW_SIZE is the
+   real way to know how big a register is.  */
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+#define NUM_REGS 92
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+
+#define REGISTER_NAMES \
+{ \
+    /*  0 */ "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7", \
+    /*  8 */ "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15", \
+    /* 16 */ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
+    /* 24 */ "r24", "r25", "r26", "fp", "sp", "ilink1", "ilink2", "blink", \
+    /* 32 */ "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", \
+    /* 40 */ "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", \
+    /* 48 */ "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", \
+    /* 56 */ "r56", "mlo", "mmid", "mhi", "lp_count", \
+    /* 61 */ "status", "sema", "lp_start", "lp_end", "identity", "debug", \
+    /* 67 */ "aux10", "aux11", "aux12", "aux13", "aux14", \
+    /* 72 */ "aux15", "aux16", "aux17", "aux18", "aux19", \
+    /* 77 */ "aux1a", "aux1b", "aux1c", "aux1d", "aux1e", \
+    /* 82 */ "aux1f", "aux20", "aux21", "aux22", \
+    /* 86 */ "aux30", "aux31", "aux32", "aux33", "aux40", \
+    /* 91 */ "pc" \
+}
+
+/* Register numbers of various important registers (used to index
+   into arrays of register names and register values).  */
+
+#define R0_REGNUM   0		/* First local register           */
+#define R59_REGNUM 59		/* Last local register            */
+#define FP_REGNUM  27		/* Contains address of executing stack frame */
+#define SP_REGNUM  28		/* stack pointer */
+#define BLINK_REGNUM 31		/* link register */
+#define	STA_REGNUM 61		/* processor status word */
+#define PC_REGNUM  91		/* instruction pointer */
+#define AUX_BEG_REGNUM  61	/* aux reg begins */
+#define AUX_END_REGNUM  90	/* aux reg ends, pc not real aux reg */
+
+/* Fake registers used to mark immediate data.  */
+#define SHIMM_FLAG_REGNUM 61
+#define LIMM_REGNUM 62
+#define SHIMM_REGNUM 63
+
+#define AUX_REG_MAP \
+{ \
+   {  0,  1,  2,  3,  4,  5, \
+     16, -1, -1, -1, -1, \
+     -1, -1, -1, -1, -1, \
+     -1, -1, -1, -1, 30, \
+     -1, 32, 33, -1, \
+      48, 49, 50, 51, 64, \
+      0 \
+    }, \
+   {  0,  1,  2,  3,  4,  5, \
+     16, -1, -1, -1, -1, \
+     -1, -1, -1, -1, -1, \
+     -1, -1, -1, -1, 30, \
+     31, 32, 33, -1, \
+     -1, -1, -1, -1, -1, \
+      0 \
+    }, \
+   {  0,  1,  2,  3,  4,  5, \
+      16, 17, 18, 19, 20, \
+      21, 22, 23, 24, 25, \
+      26, 27, 28, 29, 30, \
+      31, 32, 33, 34, \
+     -1, -1, -1, -1, -1, \
+      0 \
+    } \
+}
+
+#define PFP_REGNUM R0_REGNUM	/* Previous frame pointer */
+
+/* Total amount of space needed to store our copies of the machine's
+   register state, the array `registers'.  */
+#define REGISTER_BYTES (NUM_REGS * 4)
+
+/* Index within `registers' of the first byte of the space for register N.  */
+#define REGISTER_BYTE(N) (4*(N))
+
+/* Number of bytes of storage in the actual machine representation
+   for register N. */
+#define REGISTER_RAW_SIZE(N) 4
+
+/* Number of bytes of storage in the program's representation for register N. */
+#define REGISTER_VIRTUAL_SIZE(N) 4
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+#define REGISTER_VIRTUAL_TYPE(N) (builtin_type_int)
+
+
+/* Macros for understanding function return values... */
+
+/* Does the specified function use the "struct returning" convention
+   or the "value returning" convention?  The "value returning" convention
+   almost invariably returns the entire value in registers.  The
+   "struct returning" convention often returns the entire value in
+   memory, and passes a pointer (out of or into the function) saying
+   where the value (is or should go).
+
+   Since this sometimes depends on whether it was compiled with GCC,
+   this is also an argument.  This is used in call_function to build a
+   stack, and in value_being_returned to print return values.
+
+   On arc, a structure is always retunred with pointer in r0. */
+
+#define USE_STRUCT_CONVENTION(gcc_p, type) 1
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  This is only called if USE_STRUCT_CONVENTION for this
+   type is 0.
+ */
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+	memcpy(VALBUF, REGBUF+REGISTER_BYTE(R0_REGNUM), TYPE_LENGTH (TYPE))
+
+/* If USE_STRUCT_CONVENTION produces a 1, 
+   extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one). */
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+   (error("Don't know where large structure is returned on arc"), 0)
+
+/* Write into appropriate registers a function return value
+   of type TYPE, given in virtual format, for "value returning" functions.
+   For 'return' command:  not (yet) implemented for arc.  */
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+    error ("Returning values from functions is not implemented in arc gdb")
+
+/* Store the address of the place in which to copy the structure the
+   subroutine will return.  This is called from call_function. */
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+    error ("Returning values from functions is not implemented in arc gdb")
+
+
+/* Describe the pointer in each stack frame to the previous stack frame
+   (its caller).  */
+
+/* We cache information about saved registers in the frame structure,
+   to save us from having to re-scan function prologues every time
+   a register in a non-current frame is accessed.  */
+
+#define EXTRA_FRAME_INFO \
+	struct frame_saved_regs *fsr; \
+	CORE_ADDR arg_pointer;
+
+/* Zero the frame_saved_regs pointer when the frame is initialized,
+   so that FRAME_FIND_SAVED_REGS () will know to allocate and
+   initialize a frame_saved_regs struct the first time it is called.
+   Set the arg_pointer to -1, which is not valid; 0 and other values
+   indicate real, cached values.  */
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
+	((fi)->fsr = 0, (fi)->arg_pointer = -1)
+
+/* FRAME_CHAIN takes a frame's nominal address
+   and produces the frame's chain-pointer.
+   However, if FRAME_CHAIN_VALID returns zero,
+   it means the given frame is the outermost one and has no caller.  */
+/* On the arc, we get the chain pointer by reading the PFP saved
+   on the stack. */
+/* The PFP and RPC is in fp and fp+4.  */
+
+#define FRAME_CHAIN(thisframe) \
+  (read_memory_integer (FRAME_FP (thisframe), 4))
+
+/* FRAME_CHAIN_VALID returns zero if the given frame is the outermost one
+   and has no caller.  */
+#define FRAME_CHAIN_VALID(chain, thisframe) nonnull_frame_chain_valid (chain, thisframe)
+
+/* An expression that tells us whether the function invocation represented
+   by FI does not have a frame on the stack associated with it. */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI) \
+     (((FI)->signal_handler_caller) ? 0 : frameless_look_for_prologue (FI))
+
+/* Where is the PC for a specific frame.
+   A leaf function may never save blink, so we have to check for that here.  */
+
+#define FRAME_SAVED_PC(frame) (arc_frame_saved_pc (frame))
+struct frame_info;		/* in case frame.h not included yet */
+CORE_ADDR arc_frame_saved_pc (struct frame_info *);
+
+/* If the argument is on the stack, it will be here.
+   We cache this value in the frame info if we've already looked it up.  */
+/* ??? Is the arg_pointer check necessary?  */
+
+#define FRAME_ARGS_ADDRESS(fi) \
+  (((fi)->arg_pointer != -1) ? (fi)->arg_pointer : (fi)->frame)
+
+/* This is the same except it should return 0 when
+   it does not really know where the args are, rather than guessing.
+   This value is not cached since it is only used infrequently.  */
+
+#define FRAME_LOCALS_ADDRESS(fi)	((fi)->frame)
+
+/* Set NUMARGS to the number of args passed to a frame.
+   Can return -1, meaning no way to tell.  */
+
+#define FRAME_NUM_ARGS(fi)	(-1)
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Produce the positions of the saved registers in a stack frame.  */
+
+#define FRAME_FIND_SAVED_REGS(frame_info_addr, sr) \
+	frame_find_saved_regs (frame_info_addr, &sr)
+extern void frame_find_saved_regs ();	/* See arc-tdep.c */
+
+
+/* Things needed for making calls to functions in the inferior process */
+void arc_push_dummy_frame (void);
+#define PUSH_DUMMY_FRAME \
+	arc_push_dummy_frame ()
+
+/* Discard from the stack the innermost frame, restoring all registers.  */
+void arc_pop_frame (void);
+#define POP_FRAME \
+	arc_pop_frame ()
+
+/* This sequence of words is the instructions  bl xxxx, flag 1 */
+#define CALL_DUMMY { 0x28000000, 0x1fbe8001 }
+#define CALL_DUMMY_LENGTH 8
+
+/* Start execution at beginning of dummy */
+#define CALL_DUMMY_START_OFFSET 0
+
+/* Insert the specified number of args and function address
+   into a call sequence of the above form stored at 'dummyname'. */
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+{ \
+        int from, to, delta, loc; \
+        loc = (int)(read_register (SP_REGNUM) - CALL_DUMMY_LENGTH); \
+        from = loc + 4; \
+        to = (int)(fun); \
+        delta = (to - from) >> 2; \
+        *((char *)(dummyname) + 1) = (delta & 0x1); \
+        *((char *)(dummyname) + 2) = ((delta >> 1) & 0xff); \
+        *((char *)(dummyname) + 3) = ((delta >> 9) & 0xff); \
+        *((char *)(dummyname) + 4) = ((delta >> 17) & 0x7); \
+}
diff --git a/gdb/config/arm/embed.mt b/gdb/config/arm/embed.mt
new file mode 100644
index 00000000000..c854d17a71a
--- /dev/null
+++ b/gdb/config/arm/embed.mt
@@ -0,0 +1,7 @@
+# Target: ARM embedded system
+TDEPFILES= arm-tdep.o remote-rdp.o remote-rdi.o
+TDEPLIBS= rdi-share/libangsd.a
+TM_FILE= tm-embed.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/arm/libsim.a
diff --git a/gdb/config/arm/linux.mh b/gdb/config/arm/linux.mh
new file mode 100644
index 00000000000..fa1eb63d67f
--- /dev/null
+++ b/gdb/config/arm/linux.mh
@@ -0,0 +1,11 @@
+# Host: ARM based machine running GNU/Linux
+
+XM_FILE= xm-linux.h
+
+NAT_FILE= nm-linux.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o	\
+	core-regset.o arm-linux-nat.o linux-proc.o gcore.o	\
+	proc-service.o thread-db.o lin-lwp.o
+
+LOADLIBES= -ldl -rdynamic
+
diff --git a/gdb/config/arm/linux.mt b/gdb/config/arm/linux.mt
new file mode 100644
index 00000000000..e1996ab0639
--- /dev/null
+++ b/gdb/config/arm/linux.mt
@@ -0,0 +1,5 @@
+# Target: ARM based machine running GNU/Linux
+TM_FILE= tm-linux.h
+TDEPFILES= arm-tdep.o arm-linux-tdep.o solib.o solib-svr4.o solib-legacy.o
+
+GDBSERVER_DEPFILES = linux-low.o linux-arm-low.o reg-arm.o
diff --git a/gdb/config/arm/nbsd.mt b/gdb/config/arm/nbsd.mt
new file mode 100644
index 00000000000..94971369506
--- /dev/null
+++ b/gdb/config/arm/nbsd.mt
@@ -0,0 +1,2 @@
+# Target: ARM running NetBSD
+TDEPFILES= arm-tdep.o armnbsd-tdep.o solib.o solib-svr4.o nbsd-tdep.o
diff --git a/gdb/config/arm/nbsdaout.mh b/gdb/config/arm/nbsdaout.mh
new file mode 100644
index 00000000000..100e40b42bb
--- /dev/null
+++ b/gdb/config/arm/nbsdaout.mh
@@ -0,0 +1,5 @@
+# Host ARM running NetBSD
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o armnbsd-nat.o \
+	solib-sunos.o
+XM_FILE=xm-nbsd.h
+NAT_FILE=nm-nbsdaout.h
diff --git a/gdb/config/arm/nbsdelf.mh b/gdb/config/arm/nbsdelf.mh
new file mode 100644
index 00000000000..481d5cc92a5
--- /dev/null
+++ b/gdb/config/arm/nbsdelf.mh
@@ -0,0 +1,4 @@
+# Host ARM running NetBSD
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o armnbsd-nat.o
+XM_FILE=xm-nbsd.h
+NAT_FILE=nm-nbsd.h
diff --git a/gdb/config/arm/nm-linux.h b/gdb/config/arm/nm-linux.h
new file mode 100644
index 00000000000..2a0ebb3804b
--- /dev/null
+++ b/gdb/config/arm/nm-linux.h
@@ -0,0 +1,42 @@
+/* Definitions to make GDB run on an ARM based machine under GNU/Linux.
+   Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_ARMLINUX_H
+#define NM_ARMLINUX_H
+
+#include "nm-linux.h"
+
+/* ptrace register ``addresses'' are absolute.  */
+
+#define U_REGS_OFFSET 0
+
+#ifdef GDBSERVER
+#define REGISTER_U_ADDR(addr,blockend,regno) \
+	 (addr) = arm_register_u_addr ((blockend),(regno))
+#endif /* GDBSERVER */
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+extern int kernel_u_size (void);
+#define KERNEL_U_SIZE	arm_linux_kernel_u_size()
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
+#define FETCH_INFERIOR_REGISTERS
+
+#endif /* NM_ARMLINUX_H */
diff --git a/gdb/config/arm/nm-nbsd.h b/gdb/config/arm/nm-nbsd.h
new file mode 100644
index 00000000000..63be920092f
--- /dev/null
+++ b/gdb/config/arm/nm-nbsd.h
@@ -0,0 +1,27 @@
+/* Native-dependent definitions for ARM running NetBSD, for GDB.
+   Copyright 1986, 1987, 1989, 1992, 1994, 1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSD_H
+#define NM_NBSD_H
+
+/* Get generic NetBSD native definitions. */
+#include "config/nm-nbsd.h"
+
+#endif /* NM_NBSD_H */
diff --git a/gdb/config/arm/nm-nbsdaout.h b/gdb/config/arm/nm-nbsdaout.h
new file mode 100644
index 00000000000..3f7fee9de1a
--- /dev/null
+++ b/gdb/config/arm/nm-nbsdaout.h
@@ -0,0 +1,29 @@
+/* Native-dependent definitions for ARM running NetBSD, for GDB.
+   Copyright 1986, 1987, 1989, 1992, 1994, 1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSDAOUT_H
+#define NM_NBSDAOUT_H
+
+#include "arm/nm-nbsd.h"
+
+/* Get generic NetBSD a.out native definitions. */
+#include "config/nm-nbsdaout.h"
+
+#endif /* NM_NBSDAOUT_H */
diff --git a/gdb/config/arm/tm-arm.h b/gdb/config/arm/tm-arm.h
new file mode 100644
index 00000000000..369917524d4
--- /dev/null
+++ b/gdb/config/arm/tm-arm.h
@@ -0,0 +1,34 @@
+/* Definitions to target GDB to ARM targets.
+   Copyright 1986, 1987, 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997,
+   1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_ARM_H
+#define TM_ARM_H
+
+#ifndef GDB_MULTI_ARCH
+#define GDB_MULTI_ARCH 1
+#endif
+
+/* Specify that for the native compiler variables for a particular
+   lexical context are listed after the beginning LBRAC instead of
+   before in the executables list of symbols.  */
+#define VARIABLES_INSIDE_BLOCK(desc, gcc_p) (!(gcc_p))
+
+#endif /* TM_ARM_H */
diff --git a/gdb/config/arm/tm-embed.h b/gdb/config/arm/tm-embed.h
new file mode 100644
index 00000000000..5990311e4a6
--- /dev/null
+++ b/gdb/config/arm/tm-embed.h
@@ -0,0 +1,52 @@
+/* Definitions to target GDB to ARM embedded systems.
+   Copyright 1986, 1987, 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997,
+   1998, 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_ARMEMBED_H
+#define TM_ARMEMBED_H
+
+/* Include the common ARM definitions. */
+#include "arm/tm-arm.h"
+
+/* The remote stub should be able to single-step. */
+#undef SOFTWARE_SINGLE_STEP_P
+#define SOFTWARE_SINGLE_STEP_P() 0
+
+/* The first 0x20 bytes are the trap vectors.  */
+#undef LOWEST_PC
+#define LOWEST_PC	0x20
+
+/* Override defaults.  */
+
+#undef THUMB_LE_BREAKPOINT
+#define THUMB_LE_BREAKPOINT {0xbe,0xbe}       
+#undef THUMB_BE_BREAKPOINT
+#define THUMB_BE_BREAKPOINT {0xbe,0xbe}       
+
+/* Functions for dealing with Thumb call thunks.  */
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name)	arm_in_call_stub (pc, name)
+#define SKIP_TRAMPOLINE_CODE(pc)		arm_skip_stub (pc)
+extern int arm_in_call_stub (CORE_ADDR pc, char *name);
+extern CORE_ADDR arm_skip_stub (CORE_ADDR pc);
+
+#undef  IN_SIGTRAMP
+#define IN_SIGTRAMP(pc, name) 0
+
+#endif /* TM_ARMEMBED_H */
diff --git a/gdb/config/arm/tm-linux.h b/gdb/config/arm/tm-linux.h
new file mode 100644
index 00000000000..6a0d0e42c96
--- /dev/null
+++ b/gdb/config/arm/tm-linux.h
@@ -0,0 +1,94 @@
+/* Target definitions for GNU/Linux on ARM, for GDB.
+   Copyright 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_ARMLINUX_H
+#define TM_ARMLINUX_H
+
+#ifdef GDBSERVER
+#define	ARM_GNULINUX_TARGET
+#endif
+
+/* Include the common ARM target definitions.  */
+#include "arm/tm-arm.h"
+
+#include "tm-linux.h"
+
+/* Use target-specific function to define link map offsets.  */
+extern struct link_map_offsets *arm_linux_svr4_fetch_link_map_offsets (void);
+#define SVR4_FETCH_LINK_MAP_OFFSETS() arm_linux_svr4_fetch_link_map_offsets ()
+
+/* Offset to saved PC in sigcontext structure, from <asm/sigcontext.h> */
+#define SIGCONTEXT_PC_OFFSET	(sizeof(unsigned long) * 18)
+
+/* We've multi-arched this.  */
+#undef IN_SOLIB_CALL_TRAMPOLINE
+
+/* On ARM GNU/Linux, a call to a library routine does not have to go
+   through any trampoline code.  */
+#define IN_SOLIB_RETURN_TRAMPOLINE(pc, name)	0
+
+/* We've multi-arched this.  */
+#undef SKIP_TRAMPOLINE_CODE
+
+/* When we call a function in a shared library, and the PLT sends us
+   into the dynamic linker to find the function's real address, we
+   need to skip over the dynamic linker call.  This function decides
+   when to skip, and where to skip to.  See the comments for
+   SKIP_SOLIB_RESOLVER at the top of infrun.c.  */
+extern CORE_ADDR arm_linux_skip_solib_resolver (CORE_ADDR pc);
+#define SKIP_SOLIB_RESOLVER arm_linux_skip_solib_resolver
+
+/* When we call a function in a shared library, and the PLT sends us
+   into the dynamic linker to find the function's real address, we
+   need to skip over the dynamic linker call.  This function decides
+   when to skip, and where to skip to.  See the comments for
+   SKIP_SOLIB_RESOLVER at the top of infrun.c.  */
+#if 0   
+#undef IN_SOLIB_DYNSYM_RESOLVE_CODE
+extern CORE_ADDR arm_in_solib_dynsym_resolve_code (CORE_ADDR pc, char *name);
+#define IN_SOLIB_DYNSYM_RESOLVE_CODE  arm_in_solib_dynsym_resolve_code
+/* ScottB: Current definition is 
+extern CORE_ADDR in_svr4_dynsym_resolve_code (CORE_ADDR pc, char *name);
+#define IN_SOLIB_DYNSYM_RESOLVE_CODE  in_svr4_dynsym_resolve_code */
+#endif
+
+/* When the ARM Linux kernel invokes a signal handler, the return
+   address points at a special instruction which'll trap back into
+   the kernel.  These definitions are used to identify this bit of
+   code as a signal trampoline in order to support backtracing
+   through calls to signal handlers. */
+
+int arm_linux_in_sigtramp (CORE_ADDR pc, char *name);
+#define IN_SIGTRAMP(pc, name) arm_linux_in_sigtramp (pc, name)
+
+/* Each OS has different mechanisms for accessing the various
+   registers stored in the sigcontext structure.  These definitions
+   provide a mechanism by which the generic code in arm-tdep.c can
+   find the addresses at which various registers are saved at in the
+   sigcontext structure.  If SIGCONTEXT_REGISTER_ADDRESS is not
+   defined, arm-tdep.c will define it to be 0.  (See ia64-tdep.c and
+   ia64-linux-tdep.c to see what a similar mechanism looks like when
+   multi-arched.) */
+
+extern CORE_ADDR arm_linux_sigcontext_register_address (CORE_ADDR, CORE_ADDR,
+                                                        int);
+#define SIGCONTEXT_REGISTER_ADDRESS arm_linux_sigcontext_register_address
+
+#endif /* TM_ARMLINUX_H */
diff --git a/gdb/config/arm/tm-wince.h b/gdb/config/arm/tm-wince.h
new file mode 100644
index 00000000000..82f97ad7b8f
--- /dev/null
+++ b/gdb/config/arm/tm-wince.h
@@ -0,0 +1,34 @@
+/* Definitions to target GDB for Windows CE target
+   Copyright 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_WINCE_H
+#define TM_WINCE_H
+
+#include "arm/tm-arm.h"
+
+#undef SOFTWARE_SINGLE_STEP_P
+#define SOFTWARE_SINGLE_STEP_P() 1
+
+#undef SOFTWARE_SINGLE_STEP
+#define SOFTWARE_SINGLE_STEP(sig, bp_p) wince_software_single_step (sig, bp_p)
+
+void wince_software_single_step (unsigned int, int);
+
+#endif /* TM_WINCE_H */
diff --git a/gdb/config/arm/wince.mt b/gdb/config/arm/wince.mt
new file mode 100644
index 00000000000..10fe0eb3f38
--- /dev/null
+++ b/gdb/config/arm/wince.mt
@@ -0,0 +1,5 @@
+# Target: Acorn RISC machine (ARM) with simulator
+TDEPFILES= arm-tdep.o wince.o
+TM_FILE= tm-wince.h
+MT_CFLAGS=-DARM -U_X86_ -U_M_IX86 -U__i386__ -U__i486__ -U__i586__ -U__i686__ -DUNICODE -D_WIN32_WCE -DWINCE_STUB='"${target_alias}-stub.exe"'
+WIN32LIBS=-lrapi
diff --git a/gdb/config/arm/xm-linux.h b/gdb/config/arm/xm-linux.h
new file mode 100644
index 00000000000..fa82a1e8f39
--- /dev/null
+++ b/gdb/config/arm/xm-linux.h
@@ -0,0 +1,28 @@
+/* Host definitions for ARM GNU/Linux, for GDB, the GNU debugger.
+   Copyright 1999, 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef XM_ARMLINUX_H
+#define XM_ARMLINUX_H
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+#define KERNEL_U_ADDR 0x0
+
+#endif /* XM_ARMLINUX_H */
diff --git a/gdb/config/arm/xm-nbsd.h b/gdb/config/arm/xm-nbsd.h
new file mode 100644
index 00000000000..c5348d39629
--- /dev/null
+++ b/gdb/config/arm/xm-nbsd.h
@@ -0,0 +1,22 @@
+/* Parameters for execution on an ARM running NetBSD, for GDB.
+   Copyright 1994 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Get generic NetBSD host definitions. */
+#include "xm-nbsd.h"
diff --git a/gdb/config/avr/avr.mt b/gdb/config/avr/avr.mt
new file mode 100644
index 00000000000..0354a421101
--- /dev/null
+++ b/gdb/config/avr/avr.mt
@@ -0,0 +1,12 @@
+# Target: AVR
+TDEPFILES= avr-tdep.o
+
+#
+# There is no simulator provided with gdb (yet).
+#
+# See <http://savannah.gnu.org/projects/simulavr/> for the simulator
+# used during development of avr support for gdb.
+#
+# Simulator: AVR
+#SIM_OBS = remote-sim.o
+#SIM = ../sim/avr/libsim.a
diff --git a/gdb/config/cris/cris.mt b/gdb/config/cris/cris.mt
new file mode 100644
index 00000000000..9304d365960
--- /dev/null
+++ b/gdb/config/cris/cris.mt
@@ -0,0 +1,2 @@
+TDEPFILES= cris-tdep.o corelow.o solib.o solib-svr4.o
+TM_FILE= tm-cris.h
diff --git a/gdb/config/cris/tm-cris.h b/gdb/config/cris/tm-cris.h
new file mode 100644
index 00000000000..fed260112c3
--- /dev/null
+++ b/gdb/config/cris/tm-cris.h
@@ -0,0 +1,2 @@
+#define GDB_MULTI_ARCH 1
+#include "solib.h"
diff --git a/gdb/config/d10v/d10v.mt b/gdb/config/d10v/d10v.mt
new file mode 100644
index 00000000000..72680e22dfb
--- /dev/null
+++ b/gdb/config/d10v/d10v.mt
@@ -0,0 +1,4 @@
+# Target: Mitsubishi D10V processor
+TDEPFILES= d10v-tdep.o
+SIM_OBS= remote-sim.o
+SIM= ../sim/d10v/libsim.a
diff --git a/gdb/config/d30v/d30v.mt b/gdb/config/d30v/d30v.mt
new file mode 100644
index 00000000000..da0af2fd2eb
--- /dev/null
+++ b/gdb/config/d30v/d30v.mt
@@ -0,0 +1,5 @@
+# Target: Mitsubishi D30V processor
+TDEPFILES= d30v-tdep.o
+TM_FILE= tm-d30v.h
+SIM_OBS= remote-sim.o
+SIM= ../sim/d30v/libsim.a
diff --git a/gdb/config/d30v/tm-d30v.h b/gdb/config/d30v/tm-d30v.h
new file mode 100644
index 00000000000..7a14e39132c
--- /dev/null
+++ b/gdb/config/d30v/tm-d30v.h
@@ -0,0 +1,323 @@
+/* Target-specific definition for the Mitsubishi D30V
+   Copyright 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_D30V_H
+#define TM_D30V_H
+
+#include "regcache.h"
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+
+#define FUNCTION_START_OFFSET 0
+
+/* these are the addresses the D30V-EVA board maps data */
+/* and instruction memory to. */
+
+#define DMEM_START	0x20000000
+#define IMEM_START	0x00000000	/* was 0x10000000 */
+#define STACK_START	0x20007ffe
+
+/* Forward decls for prototypes */
+struct frame_info;
+struct frame_saved_regs;
+struct type;
+struct value;
+
+/* Advance PC across any function entry prologue instructions
+   to reach some "real" code.  */
+
+extern CORE_ADDR d30v_skip_prologue (CORE_ADDR);
+#define SKIP_PROLOGUE(ip) (d30v_skip_prologue (ip))
+
+
+/* Stack grows downward.  */
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* for a breakpoint, use "dbt || nop" */
+#define BREAKPOINT {0x00, 0xb0, 0x00, 0x00,\
+		    0x00, 0xf0, 0x00, 0x00}
+
+/* If your kernel resets the pc after the trap happens you may need to
+   define this before including this file.  */
+#define DECR_PC_AFTER_BREAK 0
+
+#define REGISTER_NAMES \
+{   "r0",  "r1",  "r2",  "r3",  "r4",  "r5",  "r6",  "r7",	\
+    "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",	\
+    "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",	\
+    "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",	\
+    "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39",	\
+    "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47",	\
+    "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55",	\
+    "r56", "r57", "r58", "r59", "r60", "r61", "r62", "r63",	\
+    "spi", "spu", \
+    "psw", "bpsw", "pc", "bpc", "dpsw", "dpc", "cr6", "rpt_c",	\
+    "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "eit_vb",\
+    "int_s", "int_m", "a0", "a1" \
+    }
+
+#define NUM_REGS 86
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define R0_REGNUM	0
+#define FP_REGNUM	61
+#define LR_REGNUM 	62
+#define SP_REGNUM 	63
+#define SPI_REGNUM	64	/* Interrupt stack pointer */
+#define SPU_REGNUM	65	/* User stack pointer */
+#define CREGS_START	66
+
+#define PSW_REGNUM 	(CREGS_START + 0)	/* psw, bpsw, or dpsw??? */
+#define     PSW_SM (((unsigned long)0x80000000) >> 0)	/* Stack mode: 0/SPI */
+							/*             1/SPU */
+#define     PSW_EA (((unsigned long)0x80000000) >> 2)	/* Execution status */
+#define     PSW_DB (((unsigned long)0x80000000) >> 3)	/* Debug mode */
+#define     PSW_DS (((unsigned long)0x80000000) >> 4)	/* Debug EIT status */
+#define     PSW_IE (((unsigned long)0x80000000) >> 5)	/* Interrupt enable */
+#define     PSW_RP (((unsigned long)0x80000000) >> 6)	/* Repeat enable */
+#define     PSW_MD (((unsigned long)0x80000000) >> 7)	/* Modulo enable */
+#define     PSW_F0 (((unsigned long)0x80000000) >> 17)	/* F0 flag */
+#define     PSW_F1 (((unsigned long)0x80000000) >> 19)	/* F1 flag */
+#define     PSW_F2 (((unsigned long)0x80000000) >> 21)	/* F2 flag */
+#define     PSW_F3 (((unsigned long)0x80000000) >> 23)	/* F3 flag */
+#define     PSW_S  (((unsigned long)0x80000000) >> 25)	/* Saturation flag */
+#define     PSW_V  (((unsigned long)0x80000000) >> 27)	/* Overflow flag */
+#define     PSW_VA (((unsigned long)0x80000000) >> 29)	/* Accum. overflow */
+#define     PSW_C  (((unsigned long)0x80000000) >> 31)	/* Carry/Borrow flag */
+
+#define BPSW_REGNUM	(CREGS_START + 1)	/* Backup PSW (on interrupt) */
+#define PC_REGNUM 	(CREGS_START + 2)	/* pc, bpc, or dpc??? */
+#define BPC_REGNUM 	(CREGS_START + 3)	/* Backup PC (on interrupt) */
+#define DPSW_REGNUM	(CREGS_START + 4)	/* Backup PSW (on debug trap) */
+#define DPC_REGNUM 	(CREGS_START + 5)	/* Backup PC (on debug trap) */
+#define RPT_C_REGNUM	(CREGS_START + 7)	/* Loop count */
+#define RPT_S_REGNUM	(CREGS_START + 8)	/* Loop start address */
+#define RPT_E_REGNUM	(CREGS_START + 9)	/* Loop end address */
+#define MOD_S_REGNUM	(CREGS_START + 10)
+#define MOD_E_REGNUM	(CREGS_START + 11)
+#define IBA_REGNUM	(CREGS_START + 14)	/* Instruction break address */
+#define EIT_VB_REGNUM	(CREGS_START + 15)	/* Vector base address */
+#define INT_S_REGNUM	(CREGS_START + 16)	/* Interrupt status */
+#define INT_M_REGNUM	(CREGS_START + 17)	/* Interrupt mask */
+#define A0_REGNUM 	84
+#define A1_REGNUM 	85
+
+/* Say how much memory is needed to store a copy of the register set */
+#define REGISTER_BYTES    ((NUM_REGS - 2) * 4 + 2 * 8)
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+
+#define REGISTER_BYTE(N)  \
+( ((N) >= A0_REGNUM) ? ( ((N) - A0_REGNUM) * 8 + A0_REGNUM * 4 ) : ((N) * 4) )
+
+/* Number of bytes of storage in the actual machine representation
+   for register N.  */
+
+#define REGISTER_RAW_SIZE(N) ( ((N) >= A0_REGNUM) ? 8 : 4 )
+
+/* Number of bytes of storage in the program's representation
+   for register N.  */
+#define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+( ((N) < A0_REGNUM ) ? builtin_type_long : builtin_type_long_long)
+
+/* Writing to r0 is a noop (not an error or exception or anything like
+   that, however).  */
+
+#define CANNOT_STORE_REGISTER(regno) ((regno) == R0_REGNUM)
+
+void d30v_do_registers_info (int regnum, int fpregs);
+
+#define DO_REGISTERS_INFO d30v_do_registers_info
+
+/* Store the address of the place in which to copy the structure the
+   subroutine will return.  This is called from call_function. 
+
+   We store structs through a pointer passed in R2 */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+    { write_register (2, (ADDR));  }
+
+
+/* Write into appropriate registers a function return value
+   of type TYPE, given in virtual format.  
+
+   Things always get returned in R2/R3 */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+  write_register_bytes (REGISTER_BYTE(2), VALBUF, TYPE_LENGTH (TYPE))
+
+
+/* Extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one).  */
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (((CORE_ADDR *)(REGBUF))[2])
+
+
+/* Define other aspects of the stack frame. 
+   we keep a copy of the worked out return pc lying around, since it
+   is a useful bit of info */
+
+#define EXTRA_FRAME_INFO \
+    CORE_ADDR return_pc; \
+    CORE_ADDR dummy; \
+    int frameless; \
+    int size;
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
+    d30v_init_extra_frame_info(fromleaf, fi)
+
+extern void d30v_init_extra_frame_info (int fromleaf, struct frame_info *fi);
+
+/* A macro that tells us whether the function invocation represented
+   by FI does not have a frame on the stack associated with it.  If it
+   does not, FRAMELESS is set to 1, else 0.  */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI) \
+  (frameless_look_for_prologue (FI))
+
+CORE_ADDR d30v_frame_chain (struct frame_info *frame);
+#define FRAME_CHAIN(FRAME)       d30v_frame_chain(FRAME)
+extern int d30v_frame_chain_valid (CORE_ADDR, struct frame_info *);
+#define FRAME_CHAIN_VALID(chain, thisframe) d30v_frame_chain_valid (chain, thisframe)
+#define FRAME_SAVED_PC(FRAME)    ((FRAME)->return_pc)
+#define FRAME_ARGS_ADDRESS(fi)   (fi)->frame
+#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
+
+void d30v_init_frame_pc (int fromleaf, struct frame_info *prev);
+#define INIT_FRAME_PC_FIRST(fromleaf, prev)	d30v_init_frame_pc(fromleaf, prev)
+#define INIT_FRAME_PC(fromleaf, prev)	/* nada */
+
+/* Immediately after a function call, return the saved pc.  We can't */
+/* use frame->return_pc beause that is determined by reading R62 off the */
+/* stack and that may not be written yet. */
+
+#define SAVED_PC_AFTER_CALL(frame) (read_register(LR_REGNUM))
+
+/* Set VAL to the number of args passed to frame described by FI.
+   Can set VAL to -1, meaning no way to tell.  */
+/* We can't tell how many args there are */
+
+#define FRAME_NUM_ARGS(fi) (-1)
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#define FRAME_ARGS_SKIP 0
+
+
+/* Put here the code to store, into a struct frame_saved_regs,
+   the addresses of the saved registers of frame described by FRAME_INFO.
+   This includes special registers such as pc and fp saved in special
+   ways in the stack frame.  sp is even more special:
+   the address we return for it IS the sp for the next frame.  */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs)	    \
+   d30v_frame_find_saved_regs(frame_info, &(frame_saved_regs))
+
+extern void d30v_frame_find_saved_regs (struct frame_info *,
+					struct frame_saved_regs *);
+
+/* DUMMY FRAMES.  Need these to support inferior function calls.
+   They work like this on D30V:
+   First we set a breakpoint at 0 or __start.
+   Then we push all the registers onto the stack.
+   Then put the function arguments in the proper registers and set r13
+   to our breakpoint address.
+   Finally call the function directly.
+   When it hits the breakpoint, clear the break point and pop the old
+   register contents off the stack. */
+
+#define CALL_DUMMY		{ 0 }
+#define PUSH_DUMMY_FRAME
+#define CALL_DUMMY_START_OFFSET	0
+#define CALL_DUMMY_LOCATION	AT_ENTRY_POINT
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+
+extern CORE_ADDR d30v_call_dummy_address (void);
+#define CALL_DUMMY_ADDRESS() d30v_call_dummy_address()
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+sp = d30v_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
+
+#define PC_IN_CALL_DUMMY(pc, sp, frame_address)	( pc == IMEM_START + 4 )
+
+extern CORE_ADDR d30v_fix_call_dummy (char *, CORE_ADDR, CORE_ADDR,
+				      int, struct value **,
+				      struct type *, int);
+#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
+  (d30v_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr)))
+extern CORE_ADDR d30v_push_arguments (int, struct value **, CORE_ADDR, int,
+				      CORE_ADDR);
+
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+d30v_extract_return_value(TYPE, REGBUF, VALBUF)
+extern void d30v_extract_return_value (struct type *, char *, char *);
+
+
+/* Discard from the stack the innermost frame,
+   restoring all saved registers.  */
+#define POP_FRAME d30v_pop_frame();
+extern void d30v_pop_frame (void);
+
+#define REGISTER_SIZE 4
+
+/* Need to handle SP special, as we need to select between spu and spi.  */
+#if 0				/* XXX until the simulator is fixed */
+#define TARGET_READ_SP() ((read_register (PSW_REGNUM) & PSW_SM) \
+			  ? read_register (SPU_REGNUM) \
+			  : read_register (SPI_REGNUM))
+
+#define TARGET_WRITE_SP(val) ((read_register (PSW_REGNUM) & PSW_SM) \
+			  ? write_register (SPU_REGNUM, (val)) \
+			  : write_register (SPI_REGNUM, (val)))
+#endif
+
+#define STACK_ALIGN(len)	(((len) + 7 ) & ~7)
+
+/* Turn this on to cause remote-sim.c to use sim_set/clear_breakpoint. */
+
+#define SIM_HAS_BREAKPOINTS
+
+#endif /* TM_D30V_H */
diff --git a/gdb/config/djgpp/README b/gdb/config/djgpp/README
new file mode 100644
index 00000000000..805e1df1f8f
--- /dev/null
+++ b/gdb/config/djgpp/README
@@ -0,0 +1,189 @@
+
+       How to build and install the DJGPP native version of GDB
+       ********************************************************
+
+General
+=======
+
+GDB built with DJGPP supports native DJGPP debugging, whereby you run
+gdb.exe and the program being debugged on the same machine.  In
+addition, this version supports remote debugging via a serial port,
+provided that the target machine has a GDB-compatible debugging stub
+which can be linked with the target program (see the section "Remote
+Serial" in the GDB manual for more details).
+
+
+Installation of the binary distribution
+=======================================
+
+Simply unzip the gdbNNNb.zip file (where NNN is the version number)
+from the top DJGPP installation directory.  Be sure to preserve the
+directory structure while you unzip (use -d switch if you do this with
+PKUNZIP).  On Windows 9X and Windows 2000, use an unzip program which
+supports long file names; one such program is unzip32.exe, available
+from the DJGPP sites.
+
+If you need the libraries which are built as part of GDB, install the
+companion file gdbNNNa.zip.  This allows to develop applications which
+use the same functions as GDB.  For example, you can build your own
+front end to the debugger.
+
+
+Rebuilding GDB from sources
+===========================
+
+1. Prerequisites
+   -------------
+To build the package, you will need the DJGPP development environment
+(GCC, header files, and the libraries), and also DJGPP ports of the
+following tools:
+
+	- GNU Make 3.79.1 or later
+	- Bash 2.03 or later
+	- GNU Sed
+	- GNU Fileutils
+	- GNU Textutils 2.0 or later
+	- GNU Sh-utils
+	- GNU Grep 2.4 or later
+	- GNU Findutils
+	- GNU Awk 3.04 or later
+	- GNU Bison (only if you change one of the gdb/*.y files)
+	- Groff (only if you need to format the man pages)
+	- GNU Diffutils (only if you run the test suite)
+
+These programs should be available from the DJGPP sites, in the v2gnu
+directory.  In addition, the configuration script invokes the `update'
+and `utod' utilities which are part of the basic DJGPP development kit
+(djdevNNN.zip).
+
+
+2. Unpacking the sources
+   ---------------------
+If you download the source distribution from one of the DJGPP sites,
+just unzip it while preserving the directory structure (I suggest to
+use unzip32.exe available with the rest of DJGPP), and proceed to the
+section "How to build", below.
+
+Source distributions downloaded from one of the GNU FTP sites need
+some more work to unpack.  First, you MUST use the `djunpack' batch
+file to unzip the package.  That's because some file names in the
+official distributions need to be changed to avoid problems on the
+various platforms supported by DJGPP.  `djunpack' invokes the `djtar'
+program (that is part of the basic DJGPP development kit) to rename
+these files on the fly given a file with name mappings; the
+distribution includes a file `gdb/config/djgpp/fnchange.lst' with the
+necessary mappings.  So you need first to retrieve that batch file,
+and then invoke it to unpack the distribution.  Here's how:
+
+ djtar -x -p -o gdb-5.2/djunpack.bat gdb-5.2.tar.gz > djunpack.bat
+ djunpack gdb-5.2.tar.gz
+
+(The name of the distribution archive and the leading directory of the
+path to `djunpack.bat' in the distribution will be different for
+versions of GDB other than 5.2.)
+
+If the argument to `djunpack.bat' include leading directories, it MUST
+be given with the DOS-style backslashes; Unix-style forward slashes
+will NOT work.
+
+If the distribution comes as a .tar.bz2 archive, and your version of
+`djtar' doesn't support bzip2 decompression, you need to unpack it as
+follows:
+
+ bnzip2 gdb-5.2.tar.bz2
+ djtar -x -p -o gdb-5.2/djunpack.bat gdb-5.2.tar > djunpack.bat
+ djunpack gdb-5.2.tar
+
+
+3. How to build
+   ------------
+
+If the source distribution available from DJGPP archives is already
+configured for DJGPP v2.x (if it is, you will find files named
+`Makefile' in each subdirectory), then just invoke Make:
+
+		make
+
+To build a package that is not yet configured, or if you downloaded
+GDB from a GNU FTP site, you will need to configure it first.  You
+will also need to configure it if you want to change the configuration
+options (e.g., compile without support for the GDBMI interface).  To
+configure GDB, type this command:
+
+		sh ./gdb/config/djgpp/djconfig.sh
+
+This script checks the unpacked distribution, then edits the configure
+scripts in the various subdirectories, to make them suitable for
+DJGPP, and finally invokes the top-level configure script, which
+recursively configures all the subdirectories.
+
+You may pass optional switches to djconfig.sh.  It accepts all the
+switches accepted by the original GDB configure script.  These
+switches are described in the file gdb/README, and their full list can
+be displayed by running the following command:
+
+		sh ./gdb/configure --help
+
+NOTE: if you *do* use optional command-line switches, you MUST pass
+to the script the name of the directory where GDB sources are
+unpacked--even if you are building GDB in-place!  For example:
+
+	sh ./gdb/config/djgpp/djconfig.sh . --disable-gdbmi
+
+It is also possible to build GDB in a directory that is different from
+the one where the sources were unpacked.  In that case, you have to
+pass the source directory as the first argument to the script:
+
+	sh ./gdb/config/djgpp/djconfig.sh d:/gnu/gdb-5.2
+
+You MUST use forward slashes in the first argument.
+
+After the configure script finishes, run Make:
+
+	make
+
+If you want to produce the documentation (for example, if you changed
+some of the Texinfo sources), type this:
+
+	make info
+
+When Make finishes, you can install the package:
+
+	make install prefix='${DJDIR}' INSTALL='ginstall -c'
+
+The above doesn't install the docs; for that you will need to say
+this:
+
+	make install-info prefix='${DJDIR}' INSTALL='ginstall -c'
+
+The test suite has been made to work with DJGPP.  If you make a change
+in some of the programs, or want to be sure you have a fully
+functional GDB executable, it is a good idea to run the test suite.
+You cannot use "make check" for that, since it will want to run the
+`dejagnu' utility which GDB doesn't support.  Instead, use the special
+script gdb/config/djgpp/djcheck.sh, like this:
+
+		cd gdb/testsuite
+		sh ../config/djgpp/djcheck.sh
+
+This will run for a while and should not print anything, except the
+messages "Running tests in DIR", where DIR is one of the
+subdirectories of the testsuite.  Any test that fails to produce the
+expected output will cause the diffs between the expected and the
+actual output be printed, and in addition will leave behind a file
+SOMETHING.tst (where SOMETHING is the name of the failed test).  You
+should compare each of the *.tst files with the corresponding *.out
+file and convince yourself that the differences do not indicate a real
+problem.  Examples of differences you can disregard are changes in the
+copyright blurb printed by GDB, values of unitialized variables,
+addresses of global variables like argv[] and envp[] (which depend on
+the size of your environment), etc.
+
+Note that djcheck.sh only recurses into those of the subdirectories of
+the test suite which test features supported by the DJGPP port of GDB.
+For example, the tests in the gdb.gdbtk, gdb.threads, and gdb.hp
+directories are not run.
+
+
+Enjoy,
+                                    Eli Zaretskii <eliz@is.elta.co.il>
diff --git a/gdb/config/djgpp/config.sed b/gdb/config/djgpp/config.sed
new file mode 100644
index 00000000000..7cc9d3f3e48
--- /dev/null
+++ b/gdb/config/djgpp/config.sed
@@ -0,0 +1,34 @@
+s|po2tbl\.sed\.in|po2tblsed.in|g
+s|gdb\.c++|gdb.cxx|g
+/ac_rel_source/s|ln -s|cp -p|
+s|\.gdbinit|gdb.ini|g
+
+/ac_given_INSTALL=/,/^CEOF/ {
+  /^s%@prefix@%/a\
+  s,\\([yp*]\\)\\.tab,\\1_tab,g\
+  /^	@rm -f/s,\\$@-\\[0-9\\]\\[0-9\\],& *.i[1-9] *.i[1-9][0-9],\
+  s,standards\\.info\\*,standard*.inf*,\
+  s,configure\\.info\\*,configur*.inf*,\
+  s,\\.info\\*,.inf* *.i[1-9] *.i[1-9][0-9],\
+  s,\\.gdbinit,gdb.ini,g\
+  /TEXINPUTS=/s,:,';',g\
+  /VPATH *=/s,\\([^A-z]\\):,\1;,g\
+  /\\$\\$file-\\[0-9\\]/s,echo,& *.i[1-9] *.i[1-9][0-9],\
+  /\\$\\$file-\\[0-9\\]/s,rm -f \\$\\$file,& \\${PACKAGE}.i[1-9] \\${PACKAGE}.i[1-9][0-9],\
+  s,config\\.h\\.in,config.h-in,g\
+  s,po2tbl\\.sed\\.in,po2tblsed.in,g
+}
+
+/^CONFIG_FILES=/,/^EOF/ {
+  s|po/Makefile.in\([^-:]\)|po/Makefile.in:po/Makefile.in-in\1|
+}
+
+/^ *CONFIG_HEADERS=/,/^EOF/ {
+  s|config.h\([^-:]\)|config.h:config.h-in\1|
+}
+
+/^[ 	]*\/\*)/s,/\*,/*|[A-z]:/*,
+/\$]\*) INSTALL=/s,\[/\$\]\*,&|[A-z]:/*,
+/\$]\*) ac_rel_source=/s,\[/\$\]\*,&|[A-z]:/*,
+/ac_file_inputs=/s,\( -e "s%\^%\$ac_given_srcdir/%"\)\( -e "s%:% $ac_given_srcdir/%g"\),\2\1,
+/^[ 	]*if test "x`echo /s,sed 's@/,sed -e 's@^[A-z]:@@' -e 's@/,
diff --git a/gdb/config/djgpp/djcheck.sh b/gdb/config/djgpp/djcheck.sh
new file mode 100644
index 00000000000..36f2e019080
--- /dev/null
+++ b/gdb/config/djgpp/djcheck.sh
@@ -0,0 +1,33 @@
+#!/bin/sh
+
+# A shell script to run the test suite on the DJGPP version of GDB.
+
+ORIGDIR=`pwd`
+GDB=${ORIGDIR}/../gdb.exe
+SUBDIRS=`find $ORIGDIR -type d ! -ipath $ORIGDIR`
+
+for d in $SUBDIRS
+do
+  cd $d
+  echo "Running tests in $d..."
+  for f in *.out
+  do
+    test -f $f || break
+    base=`basename $f .out`
+    if test "${base}" = "dbx" ; then
+	options=-dbx
+    else
+	options=
+    fi
+    $GDB ${options} < ${base}.in 2>&1 \
+      | sed -e '/GNU gdb /s/ [.0-9][.0-9]*//' \
+            -e '/^Copyright/s/[12][0-9][0-9][0-9]/XYZZY/g' \
+            -e '/Starting program: /s|[A-z]:/.*/||' \
+            -e '/main (/s/=0x[0-9a-f][0-9a-f]*/=XYZ/g' \
+      > ${base}.tst
+    if diff --binary -u ${base}.out ${base}.tst ; then
+      rm -f ${base}.tst
+    fi
+  done
+done
+
diff --git a/gdb/config/djgpp/djconfig.sh b/gdb/config/djgpp/djconfig.sh
new file mode 100644
index 00000000000..23be0d5fdad
--- /dev/null
+++ b/gdb/config/djgpp/djconfig.sh
@@ -0,0 +1,163 @@
+#!/bin/sh
+#
+# This shell script is a wrapper to the main configure script when
+# configuring GDB for DJGPP.  99% of it can also be used when
+# configuring other GNU programs for DJGPP.
+#
+#=====================================================================
+# Copyright 1997, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+#
+# Originally written by Robert Hoehne, revised by Eli Zaretskii.
+#  This file is part of GDB.
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330,
+# Boston, MA 02111-1307, USA.  */
+#=====================================================================
+#
+# Call this script like the main configure script with one exception.  If you
+# want to pass parameters to configure, you have to pass as the first
+# argument the srcdir, even when it is `.' !!!!!
+#
+# First, undo any CDPATH settings; they will get in our way when we
+# chdir to directories.
+unset CDPATH
+
+# Where are the sources? If you are used to having the sources
+# in a separate directory and the objects in another, then set
+# here the full path to the source directory and run this script
+# in the directory where you want to build gdb!!
+# You might give the source directory on commandline, but use
+# then only forward slashes (/) in the directories. It should be
+# an absolute path.
+
+if [ x$1 = x ]; then
+  srcdir=`pwd`
+else
+  srcdir=`cd $1 && pwd`
+  shift
+fi
+
+# Make sure they don't have some file names mangled by untarring.
+echo -n "Checking the unpacked distribution..."
+if ( ! test -f ${srcdir}/intl/po2tblsed.in || \
+     ! test -d ${srcdir}/gdb/testsuite/gdb.cxx || \
+     ! test -f ${srcdir}/readline/config.h-in ) ; then
+  echo " FAILED."
+  echo ""
+  echo "You MUST unpack the sources with the DJTAR command, like this:"
+  echo ""
+  echo "         djtar -x -n fnchange.lst gdb-X.YZ.tar.gz"
+  echo ""
+  echo "where X.YZ is the GDB version, and fnchange.lst can be found"
+  echo "in the gdb/config/djgpp/ directory in the GDB distribution."
+  echo "configure FAILED!"
+  exit 1
+else
+  echo " ok."
+fi
+
+# Where is the directory with DJGPP-specific scripts?
+DJGPPDIR=${srcdir}/gdb/config/djgpp
+
+echo "Editing configure scripts for DJGPP..."
+TMPFILE="${TMPDIR-.}/cfg.tmp"
+
+# We need to skip the build directory if it is a subdirectory of $srcdir,
+# otherwise we will have an infinite recursion on our hands...
+if test "`pwd`" == "${srcdir}" ; then
+  SKIPDIR=""
+  SKIPFILES=""
+else
+  SKIPDIR=`pwd | sed -e "s|${srcdir}|.|"`
+  SKIPFILES="${SKIPDIR}/*"
+fi
+
+# We use explicit /dev/env/DJDIR/bin/find to avoid catching
+# an incompatible DOS/Windows version that might be on their PATH.
+for fix_dir in \
+  `cd $srcdir && /dev/env/DJDIR/bin/find . -type d ! -ipath "${SKIPDIR}" ! -ipath "${SKIPFILES}"`
+do
+  if test ! -f ${fix_dir}/configure.orig ; then
+    if test -f ${srcdir}/${fix_dir}/configure ; then
+      mkdir -p ${fix_dir}
+      cp -p ${srcdir}/${fix_dir}/configure ${fix_dir}/configure.orig
+    fi
+  fi
+  if test -f ${fix_dir}/configure.orig ; then
+    sed -f ${DJGPPDIR}/config.sed ${fix_dir}/configure.orig > $TMPFILE
+    update $TMPFILE ${fix_dir}/configure
+    touch ./${fix_dir}/configure -r ${fix_dir}/configure.orig
+    rm -f $TMPFILE
+  fi
+  if test -f ${fix_dir}/INSTALL ; then
+    mv ${fix_dir}/INSTALL ${fix_dir}/INSTALL.txt
+  fi
+done
+
+# Now set the config shell. It is really needed, that the shell
+# points to a shell with full path and also it must conatain the
+# .exe suffix. I assume here, that bash is installed. If not,
+# install it. Additionally, the pathname must not contain a
+# drive letter, so use the /dev/x/foo format supported by versions
+# of Bash 2.03 and later, and by all DJGPP programs compiled with
+# v2.03 (or later) library.
+export CONFIG_SHELL=/dev/env/DJDIR/bin/sh.exe
+
+# force to have the ltmain.sh script to be in DOS text format,
+# otherwise the resulting ltconfig script will have mixed
+# (UNIX/DOS) format and is unusable with Bash ports before v2.03.
+utod $srcdir/ltmain.sh
+
+# Give the configure script some hints:
+export LD=ld
+export NM=nm
+export CC=gcc
+export CFLAGS="-O2 -g"
+export RANLIB=ranlib
+export DEFAULT_YACC="bison -y"
+export YACC="bison -y"
+export DEFAULT_LEX=flex
+# Define explicitly the .exe extension because on W95 with LFN=y
+# the check might fail
+export am_cv_exeext=.exe
+# ltconfig wants to compute the maximum command-line length, but
+# Bash 2.04 doesn't like that (it doesn't have any limit ;-), and
+# reboots the system.  We know our limit in advance, so we don't
+# need all that crap.  Assuming that the environment size is less
+# than 4KB, we can afford 12KB of command-line arguments.
+export lt_cv_sys_max_cmd_len=12288
+
+# The configure script needs to see the `install-sh' script, otherwise
+# it decides the source installation is broken.  But "make install" will
+# fail on 8+3 filesystems if it finds a file `install-', since there
+# are numerous "install-foo" targets in Makefile's.  So we rename the
+# offending file after the configure step is done.
+if test ! -f ${srcdir}/install-sh ; then
+  if test -f ${srcdir}/install-.sh ; then
+    mv ${srcdir}/install-.sh ${srcdir}/install-sh
+  fi
+fi
+
+# Now run the configure script while disabling some things like the NLS
+# support, which is nearly impossible to be supported in the current way,
+# since it relies on file names which will never work on DOS.
+echo "Running the configure script..."
+$srcdir/configure --srcdir="$srcdir" --prefix='${DJDIR}' \
+  --disable-shared --disable-nls --verbose --enable-build-warnings=\
+-Wimplicit,-Wcomment,-Wformat,-Wparentheses,-Wpointer-arith $*
+
+if test -f ${srcdir}/install- ; then
+  mv ${srcdir}/install- ${srcdir}/install-.sh
+fi
diff --git a/gdb/config/djgpp/fnchange.lst b/gdb/config/djgpp/fnchange.lst
new file mode 100644
index 00000000000..e5368446db5
--- /dev/null
+++ b/gdb/config/djgpp/fnchange.lst
@@ -0,0 +1,446 @@
+@V@/bfd/ChangeLog-0001 @V@/bfd/ChangeLog.0001
+@V@/bfd/ChangeLog-9193 @V@/bfd/ChangeLog.9193
+@V@/bfd/ChangeLog-9495 @V@/bfd/ChangeLog.9495
+@V@/bfd/ChangeLog-9697 @V@/bfd/ChangeLog.9697
+@V@/bfd/ChangeLog-9899 @V@/bfd/ChangeLog.9899
+@V@/bfd/coff-tic54x.c @V@/bfd/coff-tc54x.c
+@V@/bfd/coff-tic80.c @V@/bfd/coff-tc80.c
+@V@/bfd/cpu-ia64-opc.c @V@/bfd/cpuia64-opc.c
+@V@/bfd/cpu-m68hc11.c @V@/bfd/cm68hc11.c
+@V@/bfd/cpu-m68hc12.c @V@/bfd/cm68hc12.c
+@V@/bfd/efi-app-ia32.c @V@/bfd/efi-ia32-app.c
+@V@/bfd/efi-app-ia64.c @V@/bfd/efi-ia64-app.c
+@V@/bfd/elf32-i370.c @V@/bfd/elf32-i7.c
+@V@/bfd/elf32-m68hc11.c @V@/bfd/em68hc11.c
+@V@/bfd/elf32-m68hc12.c @V@/bfd/em68hc12.c
+@V@/bfd/elf32-m68k.c @V@/bfd/em68k.c
+@V@/bfd/elf32-sh-lin.c @V@/bfd/elf32shlin.c
+@V@/bfd/elf32-sh-nbsd.c @V@/bfd/elf32shnb.c
+@V@/bfd/elf32-sh64.c @V@/bfd/elf32sh64.c
+@V@/dejagnu/baseboards/mn10200-cygmon.exp @V@/dejagnu/baseboards/mn10200cygmon.exp
+@V@/dejagnu/baseboards/mn10200-sim.exp @V@/dejagnu/baseboards/mn10200sim.exp
+@V@/dejagnu/baseboards/mn10300-cygmon.exp @V@/dejagnu/baseboards/mn10300cygmon.exp
+@V@/dejagnu/baseboards/mn10300-sim.exp @V@/dejagnu/baseboards/mn10300sim.exp
+@V@/dejagnu/baseboards/powerpc-bug1.exp @V@/dejagnu/baseboards/powerpc1-bug.exp
+@V@/dejagnu/baseboards/powerpc-sim.exp @V@/dejagnu/baseboards/powerpcsim.exp
+@V@/dejagnu/baseboards/sparclite-coff.exp @V@/dejagnu/baseboards/sl-coff.exp
+@V@/dejagnu/baseboards/sparclite-cygmon.exp @V@/dejagnu/baseboards/sl-cygmon.exp
+@V@/dejagnu/baseboards/sparclite-sim-le.exp @V@/dejagnu/baseboards/sl-sim-le.exp
+@V@/dejagnu/baseboards/sparclite-sim.exp @V@/dejagnu/baseboards/sl-sim.exp
+@V@/dejagnu/contrib/test-g++ @V@/dejagnu/contrib/test-gxx
+@V@/dejagnu/doc/.cvsignore @V@/dejagnu/doc/_cvsignore
+@V@/dejagnu/example/calc/calc.h.in @V@/dejagnu/example/calc/calc.h-in
+@V@/expect/Dbg_cf.h.in @V@/expect/Dbg_cf.h-in
+@V@/expect/example/beer.exp.out @V@/expect/example/beer_exp.out
+@V@/expect/example/chesslib++.c @V@/expect/example/chesslibxx.c
+@V@/expect/example/chesslib.c @V@/expect/example/chesslb.c
+@V@/expect/example/chesslib2.c @V@/expect/example/chesslb2.c
+@V@/expect/example/chesslibxx.c @V@/expect/example/chesslbxx.c
+@V@/expect/exp_main_sub.c @V@/expect/exp_m_sub.c
+@V@/expect/exp_main_tk.c @V@/expect/exp_m_tk.c
+@V@/expect/expect_cf.h.in @V@/expect/expect_cf.h-in
+@V@/gdb/ChangeLog-1990 @V@/gdb/ChangeLog.90
+@V@/gdb/ChangeLog-1991 @V@/gdb/ChangeLog.91
+@V@/gdb/ChangeLog-1992 @V@/gdb/ChangeLog.92
+@V@/gdb/ChangeLog-1993 @V@/gdb/ChangeLog.93
+@V@/gdb/ChangeLog-1994 @V@/gdb/ChangeLog.94
+@V@/gdb/ChangeLog-1995 @V@/gdb/ChangeLog.95
+@V@/gdb/ChangeLog-1996 @V@/gdb/ChangeLog.96
+@V@/gdb/ChangeLog-1997 @V@/gdb/ChangeLog.97
+@V@/gdb/ChangeLog-1998 @V@/gdb/ChangeLog.98
+@V@/gdb/ChangeLog-1999 @V@/gdb/ChangeLog.99
+@V@/gdb/ChangeLog-2000 @V@/gdb/ChangeLog.000
+@V@/gdb/ChangeLog-2001 @V@/gdb/ChangeLog.001
+@V@/gdb/ChangeLog-3.x @V@/gdb/ChangeLog.3-x
+@V@/gdb/alphabsd-nat.c @V@/gdb/alphb-nat.c
+@V@/gdb/alphabsd-tdep.c @V@/gdb/alphb-tdep.c
+@V@/gdb/alphanbsd-nat.c @V@/gdb/alphnb-nat.c
+@V@/gdb/alphanbsd-tdep.c @V@/gdb/alphnb-tdep.c
+@V@/gdb/arm-linux-nat.c @V@/gdb/armlin-nat.c
+@V@/gdb/arm-linux-tdep.c @V@/gdb/armlin-tdep.c
+@V@/gdb/armnbsd-nat.c @V@/gdb/armnbd-nat.c
+@V@/gdb/armnbsd-tdep.c @V@/gdb/armnbd-tdep.c
+@V@/gdb/c-exp.tab.c @V@/gdb/c-exp_tab.c
+@V@/gdb/config/alpha/alpha-osf1.mh @V@/gdb/config/alpha/alphosf1.mh
+@V@/gdb/config/alpha/alpha-osf2.mh @V@/gdb/config/alpha/alphosf2.mh
+@V@/gdb/config/alpha/alpha-osf3.mh @V@/gdb/config/alpha/alphosf3.mh
+@V@/gdb/config/alpha/tm-alphalinux.h @V@/gdb/config/alpha/tm-alplinux.h
+@V@/gdb/config/alpha/xm-alphalinux.h @V@/gdb/config/alpha/xm-alplinux.h
+@V@/gdb/config/i386/nm-i386sco4.h @V@/gdb/config/i386/nm-sco4.h
+@V@/gdb/config/i386/nm-i386sco5.h @V@/gdb/config/i386/nm-sco5.h
+@V@/gdb/config/i386/nm-i386sol2.h @V@/gdb/config/i386/nm-sol2.h
+@V@/gdb/config/i386/nm-i386v4.h @V@/gdb/config/i386/nm-v4.h
+@V@/gdb/config/i386/nm-i386v42mp.h @V@/gdb/config/i386/nm-v42mp.h
+@V@/gdb/config/i386/tm-i386mk.h @V@/gdb/config/i386/tm-mk.h
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diff --git a/gdb/config/fr30/fr30.mt b/gdb/config/fr30/fr30.mt
new file mode 100644
index 00000000000..fac307ea01c
--- /dev/null
+++ b/gdb/config/fr30/fr30.mt
@@ -0,0 +1,5 @@
+# Target: Fujitsu FR30 processor
+TDEPFILES= fr30-tdep.o
+TM_FILE= tm-fr30.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/fr30/libsim.a
diff --git a/gdb/config/fr30/tm-fr30.h b/gdb/config/fr30/tm-fr30.h
new file mode 100644
index 00000000000..22ddd046a8e
--- /dev/null
+++ b/gdb/config/fr30/tm-fr30.h
@@ -0,0 +1,233 @@
+/* Parameters for execution on a Fujitsu FR30 processor.
+   Copyright 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+#define FR30_GENREGS		16
+#define FR30_DEDICATEDREGS	8
+#define FR30_REGSIZE		4	/* bytes */
+
+#define NUM_REGS (FR30_GENREGS + FR30_DEDICATEDREGS)
+#define REGISTER_BYTES ((FR30_GENREGS + FR30_DEDICATEDREGS)*FR30_REGSIZE)
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+#define REGISTER_BYTE(N) ((N) * FR30_REGSIZE)
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+#define REGISTER_NAMES \
+{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", \
+  "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
+  "pc", "ps", "tbr", "rp", "ssp", "usp", "mdh", "mdl" }
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+#define FUNCTION_START_OFFSET 0
+
+/* Amount PC must be decremented by after a breakpoint.
+   This is often the number of bytes in BREAKPOINT
+   but not always.  */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Stack grows downward.  */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+#define R0_REGNUM  0
+#define R1_REGNUM  1
+#define R2_REGNUM  2
+#define R3_REGNUM  3
+#define R4_REGNUM  4
+#define R5_REGNUM  5
+#define R6_REGNUM  6
+#define R7_REGNUM  7
+#define R8_REGNUM  8
+#define R9_REGNUM  9
+#define R10_REGNUM  10
+#define R11_REGNUM  11
+#define R12_REGNUM  12
+#define R13_REGNUM  13
+#define FP_REGNUM 14		/* Frame pointer */
+#define SP_REGNUM 15		/* Stack pointer */
+#define PC_REGNUM 16		/* Program counter */
+#define RP_REGNUM 19		/* Return pointer */
+
+#define FIRST_ARGREG	R4_REGNUM	/* first arg (or struct ret val addr) */
+#define LAST_ARGREG	R7_REGNUM	/* fourth (or third arg) */
+#define RETVAL_REG	R4_REGNUM	/* return vaue */
+
+/* Say how long (ordinary) registers are.  This is a piece of bogosity
+   used in push_word and a few other places; REGISTER_RAW_SIZE is the
+   real way to know how big a register is.  */
+#define REGISTER_SIZE FR30_REGSIZE
+
+/* Number of bytes of storage in the actual machine representation
+   for register N.  */
+#define REGISTER_RAW_SIZE(N) FR30_REGSIZE
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+#define MAX_REGISTER_RAW_SIZE FR30_REGSIZE
+
+/* Number of bytes of storage in the program's representation
+   for register N.  */
+#define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+#define MAX_REGISTER_VIRTUAL_SIZE FR30_REGSIZE
+
+extern void fr30_pop_frame (void);
+#define POP_FRAME fr30_pop_frame()
+
+#define USE_GENERIC_DUMMY_FRAMES 1
+#define CALL_DUMMY                   {0}
+#define CALL_DUMMY_START_OFFSET      (0)
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+#define CALL_DUMMY_LOCATION          AT_ENTRY_POINT
+#define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP)
+#define CALL_DUMMY_ADDRESS()         entry_point_address ()
+#define PUSH_RETURN_ADDRESS(PC, SP)  (write_register(RP_REGNUM, CALL_DUMMY_ADDRESS()), SP)
+#define PUSH_DUMMY_FRAME	generic_push_dummy_frame ()
+
+/* Number of bytes at start of arglist that are not really args.  */
+#define FRAME_ARGS_SKIP 0
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+#define REGISTER_VIRTUAL_TYPE(REG) builtin_type_int
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  */
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+    memcpy (VALBUF, REGBUF + REGISTER_BYTE(RETVAL_REG) +  \
+	(TYPE_LENGTH(TYPE) < 4 ? 4 - TYPE_LENGTH(TYPE) : 0), TYPE_LENGTH (TYPE))
+
+/* Extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one).  */
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+  extract_address (REGBUF + REGISTER_BYTE (RETVAL_REG), \
+		   REGISTER_RAW_SIZE (RETVAL_REG))
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+  { write_register (RETVAL_REG, (ADDR)); }
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Return number of args passed to a frame.
+   Can return -1, meaning no way to tell.  */
+#define FRAME_NUM_ARGS(fi) (-1)
+
+/* Forward decls for prototypes */
+struct frame_info;
+struct frame_saved_regs;
+struct type;
+struct value;
+
+#define EXTRA_FRAME_INFO \
+  struct frame_saved_regs fsr;  \
+  int framesize;		\
+  int frameoffset;		\
+  int framereg;
+
+extern CORE_ADDR fr30_frame_chain (struct frame_info *fi);
+#define FRAME_CHAIN(fi) fr30_frame_chain (fi)
+
+extern CORE_ADDR fr30_frame_saved_pc (struct frame_info *);
+#define FRAME_SAVED_PC(fi) (fr30_frame_saved_pc (fi))
+
+#define SAVED_PC_AFTER_CALL(fi) read_register (RP_REGNUM)
+
+extern CORE_ADDR fr30_skip_prologue (CORE_ADDR pc);
+#define SKIP_PROLOGUE(pc) (fr30_skip_prologue (pc))
+
+/* Write into appropriate registers a function return value of type
+   TYPE, given in virtual format.  VALBUF is in the target byte order;
+   it's typically the VALUE_CONTENTS of some struct value, and those
+   are in the target's byte order.  */
+extern void fr30_store_return_value (struct type *type, char *valbuf);
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+  (fr30_store_return_value ((TYPE), (VALBUF)))
+
+/* Put here the code to store, into a struct frame_saved_regs,
+   the addresses of the saved registers of frame described by FRAME_INFO.
+   This includes special registers such as pc and fp saved in special
+   ways in the stack frame.  sp is even more special:
+   the address we return for it IS the sp for the next frame.  */
+#define FRAME_FIND_SAVED_REGS(fi, regaddr) regaddr = fi->fsr
+
+/* Use INT #BREAKPOINT_INTNUM instruction for breakpoint */
+#define FR30_BREAKOP	0x1f	/* opcode, type D instruction */
+#define BREAKPOINT_INTNUM 9	/* one of the reserved traps */
+#define BREAKPOINT {FR30_BREAKOP, BREAKPOINT_INTNUM}
+
+/* Define this for Wingdb */
+#define TARGET_FR30
+
+/* Define other aspects of the stack frame.  */
+
+/* An expression that tells us whether the function invocation represented
+   by FI does not have a frame on the stack associated with it.  */
+extern int fr30_frameless_function_invocation (struct frame_info *frame);
+#define FRAMELESS_FUNCTION_INVOCATION(FI) (fr30_frameless_function_invocation (FI));
+
+extern void fr30_init_extra_frame_info (struct frame_info *fi);
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) fr30_init_extra_frame_info (fi)
+
+#define FRAME_CHAIN_VALID(FP, FI)	generic_file_frame_chain_valid (FP, FI)
+
+extern CORE_ADDR
+fr30_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
+		     int struct_return, CORE_ADDR struct_addr);
+#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
+  (fr30_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR))
+
+#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP)
+
+/* Fujitsu's ABI requires all structs to be passed using a pointer.
+   That is obviously not very efficient, so I am leaving the definitions
+   to make gdb work with GCC style struct passing, in case we decide
+   to go for better performance, rather than for compatibility with
+   Fujitsu (just change STRUCT_ALWAYS_BY_ADDR to 0) */
+
+#define STRUCT_ALWAYS_BY_ADDR	1
+
+#if(STRUCT_ALWAYS_BY_ADDR)
+#define REG_STRUCT_HAS_ADDR(gcc_p,type)		1
+#else
+/* more standard GCC (optimized) */
+#define REG_STRUCT_HAS_ADDR(gcc_p,type)		\
+		((TYPE_LENGTH(type) > 4) && (TYPE_LENGTH(type) & 0x3))
+#endif
+/* alway return struct by value by input pointer */
+#define USE_STRUCT_CONVENTION(GCC_P, TYPE)	1
+
+/* The stack should always be aligned on a four-word boundary.  */
+#define STACK_ALIGN(len) (((len) + 3) & ~3)
+
+/* I think the comment about this in value_arg_coerce is wrong; this
+   should be true on any system where you can rely on the prototyping
+   information.  When this is true, value_arg_coerce will promote
+   floats to doubles iff the function is not prototyped.  */
+#define COERCE_FLOAT_TO_DOUBLE(formal, actual) (1)
diff --git a/gdb/config/h8300/h8300.mt b/gdb/config/h8300/h8300.mt
new file mode 100644
index 00000000000..c6e25ab8ced
--- /dev/null
+++ b/gdb/config/h8300/h8300.mt
@@ -0,0 +1,6 @@
+# Target: H8300 with HMS monitor, E7000 ICE and H8 simulator
+TDEPFILES= h8300-tdep.o remote-e7000.o ser-e7kpc.o monitor.o remote-hms.o dsrec.o
+TM_FILE= tm-h8300.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/h8300/libsim.a
diff --git a/gdb/config/h8300/tm-h8300.h b/gdb/config/h8300/tm-h8300.h
new file mode 100644
index 00000000000..08c8cbd808a
--- /dev/null
+++ b/gdb/config/h8300/tm-h8300.h
@@ -0,0 +1,314 @@
+/* Parameters for execution on a H8/300 series machine.
+   Copyright 1992, 1993, 1994, 1996, 1998, 1999, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+/* Contributed by Steve Chamberlain sac@cygnus.com */
+
+struct frame_info;
+struct frame_saved_regs;
+struct value;
+struct type;
+
+/* 1 if debugging H8/300H application */ 
+
+/* NOTE: ezannoni 2000-07-18: these variables are part of sim, defined
+   in sim/h8300/compile.c.  They really should not be used this
+   way. Because of this we cannot get rid of the macro
+   GDB_TARGET_IS_H8300 in remote-e7000.c */
+extern int h8300hmode;
+extern int h8300smode;
+
+/* Number of bytes in a word */
+
+#define BINWORD (h8300hmode?4:2)
+
+#define EXTRA_FRAME_INFO 	\
+	struct frame_saved_regs *fsr;	\
+	CORE_ADDR from_pc; \
+	CORE_ADDR args_pointer;\
+        CORE_ADDR locals_pointer ;
+
+/* Zero the frame_saved_regs pointer when the frame is initialized,
+   so that FRAME_FIND_SAVED_REGS () will know to allocate and
+   initialize a frame_saved_regs struct the first time it is called.
+   Set the arg_pointer to -1, which is not valid; 0 and other values
+   indicate real, cached values.  */
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
+	h8300_init_extra_frame_info (fromleaf, fi)
+
+extern void h8300_init_extra_frame_info ();
+
+#undef TARGET_INT_BIT
+#define TARGET_INT_BIT  16
+#undef TARGET_LONG_BIT
+#define TARGET_LONG_BIT  32
+#undef TARGET_PTR_BIT
+#define TARGET_PTR_BIT  (h8300hmode ? 32:16)
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+   to reach some "real" code.  */
+
+#define SKIP_PROLOGUE(ip)   (h8300_skip_prologue(ip))
+extern CORE_ADDR h8300_skip_prologue ();
+
+/* Immediately after a function call, return the saved pc.
+   Can't always go through the frames for this because on some machines
+   the new frame is not set up until the new function executes
+   some instructions.  */
+
+#define SAVED_PC_AFTER_CALL(frame) \
+  read_memory_unsigned_integer (read_register (SP_REGNUM), BINWORD)
+
+/* Stack grows downward.  */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/*#define BREAKPOINT {0x7A, 0xFF} */
+#define BREAKPOINT {0x01, 0x80}	/* Sleep */
+#define REMOTE_BREAKPOINT { 0x57, 0x30}		/* trapa #3 */
+/* If your kernel resets the pc after the trap happens you may need to
+   define this before including this file.    */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long registers are.  */
+
+#define REGISTER_SIZE 4
+
+#define NUM_REGS 14
+
+#define REGISTER_BYTES (NUM_REGS * 4)
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+
+#define REGISTER_BYTE(N)  ((N) * 4)
+
+/* Number of bytes of storage in the actual machine representation
+   for register N.  On the H8/300, all regs are 2 bytes.  */
+
+#define REGISTER_RAW_SIZE(N) (h8300hmode ? 4 : 2)
+
+/* Number of bytes of storage in the program's representation
+   for register N.  */
+
+#define REGISTER_VIRTUAL_SIZE(N) (h8300hmode ? 4 : 2)
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+(h8300hmode ? builtin_type_unsigned_long : builtin_type_unsigned_short)
+
+/* Initializer for an array of names of registers.
+   Entries beyond the first NUM_REGS are ignored.  */
+
+#define REGISTER_NAMES \
+  {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "sp", "ccr","pc","cycles","tick","inst",""}
+
+/* An array of names of registers. */
+
+extern char **h8300_register_names;
+#define REGISTER_NAME(i) h8300_register_names[i]
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define ARG0_REGNUM    0	/* first reg in which an arg may be passed */
+#define ARGLAST_REGNUM 2	/* last  reg in which an arg may be passed */
+#define FP_REGNUM      6	/* Contain saddress of executing stack frame */
+#define SP_REGNUM      7	/* Contains address of top of stack */
+#define CCR_REGNUM     8	/* Contains processor status */
+#define PC_REGNUM      9	/* Contains program counter */
+#define EXR_REGNUM     11	/* Contains processor status */
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  */
+
+/* FIXME: Won't work with both h8/300's.  */
+
+extern void h8300_extract_return_value (struct type *, char *, char *);
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+    h8300_extract_return_value (TYPE, (char *)(REGBUF), (char *)(VALBUF))
+
+/* Write into appropriate registers a function return value
+   of type TYPE, given in virtual format.  Assumes floats are passed
+   in d0/d1.  */
+/* FIXME: Won't work with both h8/300's.  */
+
+extern void h8300_store_return_value (struct type *, char *);
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+    h8300_store_return_value(TYPE, (char *) (VALBUF))
+
+/* struct passing and returning stuff */
+#define STORE_STRUCT_RETURN(STRUCT_ADDR, SP)	\
+	write_register (0, STRUCT_ADDR)
+
+#define USE_STRUCT_CONVENTION(gcc_p, type)	(1)
+
+/* Extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one).  */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+     extract_address (REGBUF + REGISTER_BYTE (0), \
+		      REGISTER_RAW_SIZE (0))
+
+/* Describe the pointer in each stack frame to the previous stack frame
+   (its caller).  */
+
+/* FRAME_CHAIN takes a frame's nominal address
+   and produces the frame's chain-pointer.
+
+   However, if FRAME_CHAIN_VALID returns zero,
+   it means the given frame is the outermost one and has no caller.  */
+
+#define FRAME_CHAIN(FRAME) h8300_frame_chain(FRAME)
+CORE_ADDR h8300_frame_chain (struct frame_info *);
+
+/* In the case of the H8/300, the frame's nominal address
+   is the address of a 2-byte word containing the calling frame's address.  */
+
+/* Use the alternate method of avoiding running up off the end of
+   the frame chain or following frames back into the startup code.
+   See the comments in objfile.h */
+
+#define FRAME_CHAIN_VALID(fp,fi) func_frame_chain_valid (fp, fi)
+
+/* Define other aspects of the stack frame.  */
+
+/* A macro that tells us whether the function invocation represented
+   by FI does not have a frame on the stack associated with it.  If it
+   does not, FRAMELESS is set to 1, else 0.  */
+#define FRAMELESS_FUNCTION_INVOCATION(FI) \
+  (frameless_look_for_prologue (FI))
+
+/* Any function with a frame looks like this
+   SECOND ARG
+   FIRST ARG
+   RET PC
+   SAVED R2
+   SAVED R3
+   SAVED FP   <-FP POINTS HERE
+   LOCALS0
+   LOCALS1    <-SP POINTS HERE
+ */
+
+#define FRAME_SAVED_PC(FRAME) h8300_frame_saved_pc(FRAME)
+extern CORE_ADDR h8300_frame_saved_pc (struct frame_info *);
+
+#define FRAME_ARGS_ADDRESS(fi) h8300_frame_args_address(fi)
+extern CORE_ADDR h8300_frame_args_address (struct frame_info *);
+
+#define FRAME_LOCALS_ADDRESS(fi) h8300_frame_locals_address(fi)
+extern CORE_ADDR h8300_frame_locals_address (struct frame_info *);
+
+/* Set VAL to the number of args passed to frame described by FI.
+   Can set VAL to -1, meaning no way to tell.  */
+
+/* We can't tell how many args there are
+   now that the C compiler delays popping them.  */
+
+#define FRAME_NUM_ARGS(fi) (-1)
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Put here the code to store, into a struct frame_saved_regs,
+   the addresses of the saved registers of frame described by FRAME_INFO.
+   This includes special registers such as pc and fp saved in special
+   ways in the stack frame.  sp is even more special:
+   the address we return for it IS the sp for the next frame.  */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs)	    \
+   h8300_frame_find_saved_regs(frame_info, &(frame_saved_regs))
+extern void h8300_frame_find_saved_regs (struct frame_info *,
+					 struct frame_saved_regs *);
+
+
+typedef unsigned short INSN_WORD;
+
+
+#define	PRINT_REGISTER_HOOK(regno) h8300_print_register_hook(regno)
+extern void h8300_print_register_hook (int);
+
+#define GDB_TARGET_IS_H8300
+
+#define NUM_REALREGS (h8300smode?11:10)
+#define NOP { 0x01, 0x80}	/* A sleep insn */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/*
+ * CALL_DUMMY stuff:
+ */
+
+#define USE_GENERIC_DUMMY_FRAMES 1
+#define CALL_DUMMY			{0}
+#define CALL_DUMMY_LENGTH		(0)
+#define CALL_DUMMY_ADDRESS()		entry_point_address ()
+#define CALL_DUMMY_LOCATION		AT_ENTRY_POINT
+#define CALL_DUMMY_START_OFFSET		(0)
+#define CALL_DUMMY_BREAKPOINT_OFFSET	(0)
+
+extern CORE_ADDR h8300_push_arguments (int nargs,
+				       struct value **args,
+				       CORE_ADDR sp,
+				       unsigned char struct_return,
+				       CORE_ADDR struct_addr);
+extern CORE_ADDR h8300_push_return_address (CORE_ADDR, CORE_ADDR);
+extern void h8300_pop_frame (void);
+
+#define PC_IN_CALL_DUMMY(PC, SP, FP)	generic_pc_in_call_dummy (PC, SP, FP)
+#define FIX_CALL_DUMMY(DUMMY, START_SP, FUNADDR, NARGS, ARGS, TYPE, GCCP)
+#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
+  (h8300_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR))
+/* Push an empty stack frame, to record the current PC, etc.  */
+#define PUSH_DUMMY_FRAME	generic_push_dummy_frame ()
+/* Discard from the stack the innermost frame, restoring all registers.  */
+#define POP_FRAME		h8300_pop_frame ()
+#define PUSH_RETURN_ADDRESS(PC, SP)	h8300_push_return_address (PC, SP)
+
+/* override the standard get_saved_register function with 
+   one that takes account of generic CALL_DUMMY frames */
+#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
+     generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
diff --git a/gdb/config/h8500/h8500.mt b/gdb/config/h8500/h8500.mt
new file mode 100644
index 00000000000..35f6b4ddc86
--- /dev/null
+++ b/gdb/config/h8500/h8500.mt
@@ -0,0 +1,6 @@
+# Target: H8500 with HMS monitor and H8 simulator
+TDEPFILES= h8500-tdep.o monitor.o remote-hms.o dsrec.o
+TM_FILE= tm-h8500.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/h8500/libsim.a
diff --git a/gdb/config/h8500/tm-h8500.h b/gdb/config/h8500/tm-h8500.h
new file mode 100644
index 00000000000..fae6704c637
--- /dev/null
+++ b/gdb/config/h8500/tm-h8500.h
@@ -0,0 +1,288 @@
+/* Parameters for execution on a H8/500 series machine.
+   Copyright 1993, 1994, 1995, 1998, 1999, 2000, 2001
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+/* Contributed by Steve Chamberlain sac@cygnus.com */
+
+#define GDB_TARGET_IS_H8500
+
+/* Define the sizes of integers and pointers.  */
+
+#define TARGET_INT_BIT 16
+
+#define TARGET_LONG_BIT 32
+
+#define TARGET_PTR_BIT (minimum_mode ? 16 : 32)
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+   to reach some "real" code.  */
+
+#define SKIP_PROLOGUE(ip)   (h8500_skip_prologue (ip))
+extern CORE_ADDR h8500_skip_prologue (CORE_ADDR);
+
+/* Immediately after a function call, return the saved pc.
+   Can't always go through the frames for this because on some machines
+   the new frame is not set up until the new function executes
+   some instructions.  */
+
+#define SAVED_PC_AFTER_CALL(frame) saved_pc_after_call()
+extern CORE_ADDR saved_pc_after_call (void);
+
+/* Stack grows downward.  */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Illegal instruction - used by the simulator for breakpoint
+   detection */
+
+#define BREAKPOINT {0x0b}
+
+/* If your kernel resets the pc after the trap happens you may need to
+   define this before including this file.  */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long registers are.  */
+
+#define REGISTER_TYPE  unsigned long
+
+/* Say how much memory is needed to store a copy of the register set */
+
+#define REGISTER_BYTES    (NUM_REGS * 4)
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+
+#define REGISTER_BYTE(N)  ((N)*4)
+
+/* Number of bytes of storage in the actual machine representation
+   for register N.  */
+
+#define REGISTER_RAW_SIZE(N) h8500_register_size(N)
+extern int h8500_register_size (int regno);
+
+#define REGISTER_SIZE 4
+
+#define REGISTER_VIRTUAL_SIZE(N) h8500_register_size(N)
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+
+#define REGISTER_VIRTUAL_TYPE(N) h8500_register_virtual_type(N)
+extern struct type *h8500_register_virtual_type (int regno);
+
+/* Initializer for an array of names of registers.
+   Entries beyond the first NUM_REGS are ignored.  */
+
+#define REGISTER_NAMES \
+  { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+   "pr0","pr1","pr2","pr3","pr4","pr5","pr6","pr7", \
+    "cp", "dp", "ep", "tp", "sr", "pc"}
+
+/* Register numbers of various important registers.  Note that some of
+   these values are "real" register numbers, and correspond to the
+   general registers of the machine, and some are "phony" register
+   numbers which are too large to be actual register numbers as far as
+   the user is concerned but do serve to get the desired values when
+   passed to read_register.  */
+
+#define R0_REGNUM	0
+#define R1_REGNUM	1
+#define R2_REGNUM	2
+#define R3_REGNUM	3
+#define R4_REGNUM	4
+#define R5_REGNUM	5
+#define R6_REGNUM	6
+#define R7_REGNUM	7
+
+#define PR0_REGNUM	8
+#define PR1_REGNUM	9
+#define PR2_REGNUM	10
+#define PR3_REGNUM	11
+#define PR4_REGNUM	12
+#define PR5_REGNUM	13
+#define PR6_REGNUM	14
+#define PR7_REGNUM	15
+
+#define SEG_C_REGNUM	16	/* Segment registers */
+#define SEG_D_REGNUM	17
+#define SEG_E_REGNUM	18
+#define SEG_T_REGNUM	19
+
+#define CCR_REGNUM      20	/* Contains processor status */
+#define PC_REGNUM       21	/* Contains program counter */
+
+#define NUM_REGS 	22
+
+#define SP_REGNUM       PR7_REGNUM	/* Contains address of top of stack */
+#define FP_REGNUM       PR6_REGNUM	/* Contains address of executing stack frame */
+
+#define PTR_SIZE (minimum_mode ? 2 : 4)
+#define PTR_MASK (minimum_mode ? 0x0000ffff : 0x00ffffff)
+
+/* Store the address of the place in which to copy the structure the
+   subroutine will return.  This is called from call_function. */
+
+/*#define STORE_STRUCT_RETURN(ADDR, SP) \
+   { write_register (0, (ADDR)); internal_error (__FILE__, __LINE__, "failed internal consistency check"); } */
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+  memcpy (VALBUF, (char *)(REGBUF), TYPE_LENGTH(TYPE))
+
+/* Write into appropriate registers a function return value
+   of type TYPE, given in virtual format.  */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+  write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE))
+
+/* Extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one).  */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(CORE_ADDR *)(REGBUF))
+
+
+/* Define other aspects of the stack frame.  */
+
+/* A macro that tells us whether the function invocation represented
+   by FI does not have a frame on the stack associated with it.  If it
+   does not, FRAMELESS is set to 1, else 0.  */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI) \
+  (frameless_look_for_prologue (FI))
+
+/* Any function with a frame looks like this
+   SECOND ARG
+   FIRST ARG
+   RET PC
+   SAVED R2
+   SAVED R3
+   SAVED FP   <-FP POINTS HERE
+   LOCALS0
+   LOCALS1    <-SP POINTS HERE
+
+ */
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fci)  ;
+/*       (fci)->frame |= read_register(SEG_T_REGNUM) << 16; */
+
+#define FRAME_CHAIN(FRAME) h8500_frame_chain(FRAME)
+struct frame_info;
+extern CORE_ADDR h8500_frame_chain (struct frame_info *);
+
+#define FRAME_SAVED_PC(FRAME) frame_saved_pc(FRAME)
+extern CORE_ADDR frame_saved_pc (struct frame_info *frame);
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Set VAL to the number of args passed to frame described by FI.
+   Can set VAL to -1, meaning no way to tell.  */
+
+/* We can't tell how many args there are
+   now that the C compiler delays popping them.  */
+
+#define FRAME_NUM_ARGS(fi) (-1)
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Put here the code to store, into a struct frame_saved_regs,
+   the addresses of the saved registers of frame described by FRAME_INFO.
+   This includes special registers such as pc and fp saved in special
+   ways in the stack frame.  sp is even more special:
+   the address we return for it IS the sp for the next frame.  */
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs)	    \
+   frame_find_saved_regs(frame_info, &(frame_saved_regs))
+struct frame_saved_regs;
+extern void frame_find_saved_regs (struct frame_info *frame_info,
+				   struct frame_saved_regs *frame_saved_regs);
+
+
+/* Discard from the stack the innermost frame, restoring all registers.  */
+
+#define POP_FRAME { h8500_pop_frame (); }
+extern void h8500_pop_frame (void);
+
+#define SHORT_INT_MAX 32767
+#define SHORT_INT_MIN -32768
+
+typedef unsigned short INSN_WORD;
+
+extern CORE_ADDR h8500_addr_bits_remove (CORE_ADDR);
+#define ADDR_BITS_REMOVE(addr) h8500_addr_bits_remove (addr)
+
+#define read_memory_short(x)  (read_memory_integer(x,2) & 0xffff)
+
+#define	PRINT_REGISTER_HOOK(regno) print_register_hook(regno)
+extern void print_register_hook (int);
+
+extern int minimum_mode;
+
+#define CALL_DUMMY_LENGTH 10
+
+/* Fake variables to make it easy to use 24 bit register pointers */
+
+#define IS_TRAPPED_INTERNALVAR h8500_is_trapped_internalvar
+extern int h8500_is_trapped_internalvar (char *name);
+
+#define VALUE_OF_TRAPPED_INTERNALVAR h8500_value_of_trapped_internalvar
+extern struct value *h8500_value_of_trapped_internalvar ( /* struct internalvar *var */ );
+
+#define SET_TRAPPED_INTERNALVAR h8500_set_trapped_internalvar
+extern void h8500_set_trapped_internalvar ( /* struct internalvar *var, value newval, int bitpos, int bitsize, int offset */ );
+
+extern CORE_ADDR h8500_read_sp (void);
+extern void h8500_write_sp (CORE_ADDR);
+
+extern CORE_ADDR h8500_read_fp (void);
+
+extern CORE_ADDR h8500_read_pc (ptid_t);
+extern void h8500_write_pc (CORE_ADDR, ptid_t);
+
+#define TARGET_READ_SP() h8500_read_sp()
+#define TARGET_WRITE_SP(x) h8500_write_sp(x)
+
+#define TARGET_READ_PC(pid) h8500_read_pc(pid)
+#define TARGET_WRITE_PC(x,pid) h8500_write_pc(x,pid)
+
+#define TARGET_READ_FP() h8500_read_fp()
diff --git a/gdb/config/i386/cygwin.mh b/gdb/config/i386/cygwin.mh
new file mode 100644
index 00000000000..ce4656f6f51
--- /dev/null
+++ b/gdb/config/i386/cygwin.mh
@@ -0,0 +1,5 @@
+MH_CFLAGS=
+XM_FILE=xm-cygwin.h
+NATDEPFILES= i386-nat.o win32-nat.o corelow.o
+NAT_FILE=nm-cygwin.h
+XM_CLIBS=
diff --git a/gdb/config/i386/cygwin.mt b/gdb/config/i386/cygwin.mt
new file mode 100644
index 00000000000..4dfc0c23721
--- /dev/null
+++ b/gdb/config/i386/cygwin.mt
@@ -0,0 +1,6 @@
+# Target: Intel 386 run win32
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-cygwin.h
+
+
+
diff --git a/gdb/config/i386/embed.mt b/gdb/config/i386/embed.mt
new file mode 100644
index 00000000000..6925a83501d
--- /dev/null
+++ b/gdb/config/i386/embed.mt
@@ -0,0 +1,3 @@
+# Target: Embedded Intel 386 
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-i386.h
diff --git a/gdb/config/i386/fbsd.mh b/gdb/config/i386/fbsd.mh
new file mode 100644
index 00000000000..08d9e7db0c8
--- /dev/null
+++ b/gdb/config/i386/fbsd.mh
@@ -0,0 +1,7 @@
+# Host: Intel 386 running FreeBSD
+
+XM_FILE= xm-i386.h
+
+NAT_FILE= nm-fbsd.h
+# NOTE: Do not spread NATDEPFILES over several lines - it hurts BSD make.
+NATDEPFILES= fork-child.o infptrace.o inftarg.o solib.o solib-svr4.o solib-legacy.o corelow.o core-aout.o core-regset.o i386-nat.o i386bsd-nat.o i386fbsd-nat.o gcore.o fbsd-proc.o
diff --git a/gdb/config/i386/fbsd.mt b/gdb/config/i386/fbsd.mt
new file mode 100644
index 00000000000..7a95e00d6b9
--- /dev/null
+++ b/gdb/config/i386/fbsd.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running FreeBSD
+TDEPFILES= i386-tdep.o i387-tdep.o i386bsd-tdep.o
+TM_FILE= tm-fbsd.h
diff --git a/gdb/config/i386/gdbserve.mt b/gdb/config/i386/gdbserve.mt
new file mode 100644
index 00000000000..d8a7cbaf43d
--- /dev/null
+++ b/gdb/config/i386/gdbserve.mt
@@ -0,0 +1,3 @@
+# Target: GDBSERVE.NLM running on a i386
+TDEPFILES=	i386.o
+CPU_FILE=	i386
diff --git a/gdb/config/i386/go32.mh b/gdb/config/i386/go32.mh
new file mode 100644
index 00000000000..94a7a9df24c
--- /dev/null
+++ b/gdb/config/i386/go32.mh
@@ -0,0 +1,17 @@
+# Host: Intel x86 running DJGPP
+# we don't need mmalloc on DJGPP
+MH_CFLAGS= -DNO_MMALLOC
+MMALLOC=
+MMALLOC_CFLAGS=
+
+XM_FILE= xm-go32.h
+
+NAT_FILE= nm-go32.h
+NATDEPFILES= go32-nat.o i386-nat.o
+
+TERMCAP=
+HOST_IPC=
+CC= gcc
+XM_CLIBS= -ldbg
+
+
diff --git a/gdb/config/i386/go32.mt b/gdb/config/i386/go32.mt
new file mode 100644
index 00000000000..9b82c6426b4
--- /dev/null
+++ b/gdb/config/i386/go32.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running DJGPP
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-go32.h
diff --git a/gdb/config/i386/i386aix.mh b/gdb/config/i386/i386aix.mh
new file mode 100644
index 00000000000..af88729a45c
--- /dev/null
+++ b/gdb/config/i386/i386aix.mh
@@ -0,0 +1,9 @@
+# Host: IBM PS/2 (i386) running AIX PS/2
+
+XM_FILE= xm-i386aix.h
+
+NAT_FILE= nm-i386aix.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o i386aix-nat.o
+
+# Use gcc. Only coff output can be debugged
+CC=gcc
diff --git a/gdb/config/i386/i386aix.mt b/gdb/config/i386/i386aix.mt
new file mode 100644
index 00000000000..12e0e1fc79a
--- /dev/null
+++ b/gdb/config/i386/i386aix.mt
@@ -0,0 +1,7 @@
+# This port, for aix ps/2 (i386), will allow you to debug the coff
+# output generated gcc-2.3.3 + gas.  It will not understand IBM's
+# proprietary debug info.
+#
+# Target: IBM PS/2 (i386) running AIX PS/2
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-i386aix.h
diff --git a/gdb/config/i386/i386aout.mt b/gdb/config/i386/i386aout.mt
new file mode 100644
index 00000000000..1c94ba5216c
--- /dev/null
+++ b/gdb/config/i386/i386aout.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 with a.out
+TDEPFILES= i386-tdep.o
+TM_FILE= tm-i386v.h
diff --git a/gdb/config/i386/i386bsd.mh b/gdb/config/i386/i386bsd.mh
new file mode 100644
index 00000000000..01457d479b8
--- /dev/null
+++ b/gdb/config/i386/i386bsd.mh
@@ -0,0 +1,6 @@
+# Host: Intel 386 running 386BSD
+
+XM_FILE= xm-i386bsd.h
+
+NAT_FILE= nm-i386bsd.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o core-aout.o i386b-nat.o
diff --git a/gdb/config/i386/i386bsd.mt b/gdb/config/i386/i386bsd.mt
new file mode 100644
index 00000000000..ef617311115
--- /dev/null
+++ b/gdb/config/i386/i386bsd.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running BSD
+TM_FILE= tm-i386bsd.h
+TDEPFILES= i386-tdep.o
diff --git a/gdb/config/i386/i386dgux.mh b/gdb/config/i386/i386dgux.mh
new file mode 100644
index 00000000000..fd7f56c1e46
--- /dev/null
+++ b/gdb/config/i386/i386dgux.mh
@@ -0,0 +1,10 @@
+# Host: Intel 386 running DGUX, cloned from SVR4
+
+XM_FILE= xm-i386v4.h
+# for network communication
+XM_CLIBS= -lsocket -lnsl
+
+NAT_FILE= nm-i386v4.h
+NATDEPFILES= corelow.o core-regset.o fork-child.o i386v4-nat.o \
+	solib.o solib-svr4.o solib-legacy.o \
+	procfs.o proc-api.o proc-events.o proc-flags.o proc-why.o
diff --git a/gdb/config/i386/i386gnu.mh b/gdb/config/i386/i386gnu.mh
new file mode 100644
index 00000000000..da444a587b6
--- /dev/null
+++ b/gdb/config/i386/i386gnu.mh
@@ -0,0 +1,33 @@
+# Host: Intel 386 running the GNU Hurd
+NATDEPFILES= i386gnu-nat.o gnu-nat.o corelow.o core-regset.o \
+	     fork-child.o solib.o solib-svr4.o solib-legacy.o \
+	     notify_S.o process_reply_S.o msg_reply_S.o \
+	     msg_U.o exc_request_U.o exc_request_S.o
+
+XM_FILE= xm-i386gnu.h
+NAT_FILE= nm-gnu.h
+MH_CFLAGS = -D_GNU_SOURCE
+
+XM_CLIBS = -lshouldbeinlibc
+
+# Use our own user stubs for the msg rpcs, so we can make them time out, in
+# case the program is fucked, or we guess the wrong signal thread.
+msg-MIGUFLAGS = -D'MSG_IMPORTS=waittime 1000;'
+
+# ick
+MIGCOM = $(MIG) -cc cat - /dev/null
+
+# Reply servers need special massaging of the code mig generates, to make
+# them work correctly for error returns in some cases.
+%_reply_S.h %_reply_S.c: %_reply.defs
+	$(CPP) $(CPPFLAGS) -DSERVERPREFIX=S_ -x c $< \
+	| $(MIGCOM) -sheader $*_reply_S.h -server $*_reply_S.raw -user /dev/null -header /dev/null \
+	&& $(AWK) -f $(srcdir)/reply_mig_hack.awk < $*_reply_S.raw > $*_reply_S.c
+# Normal servers
+%_S.h %_S.c: %.defs
+	$(CPP) $(CPPFLAGS) -DSERVERPREFIX=S_ -x c $< \
+	| $(MIGCOM) -sheader $*_S.h -server $*_S.c -user /dev/null -header /dev/null
+# User rpc stubs
+%_U.h %_U.c: %.defs
+	$(CPP) $(CPPFLAGS) $($*-MIGUFLAGS) -x c $< \
+	| $(MIGCOM) -sheader /dev/null -server /dev/null -user $*_U.c -header $*_U.h
diff --git a/gdb/config/i386/i386gnu.mt b/gdb/config/i386/i386gnu.mt
new file mode 100644
index 00000000000..e08e2a25f91
--- /dev/null
+++ b/gdb/config/i386/i386gnu.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386/elf/GNU Hurd
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-i386gnu.h
diff --git a/gdb/config/i386/i386lynx.mh b/gdb/config/i386/i386lynx.mh
new file mode 100644
index 00000000000..edfb1b0752b
--- /dev/null
+++ b/gdb/config/i386/i386lynx.mh
@@ -0,0 +1,6 @@
+# Host: Intel 386 running LynxOS
+
+XM_CLIBS= -lbsd
+
+NAT_FILE= nm-i386lynx.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o lynx-nat.o
diff --git a/gdb/config/i386/i386lynx.mt b/gdb/config/i386/i386lynx.mt
new file mode 100644
index 00000000000..6704b43e5b9
--- /dev/null
+++ b/gdb/config/i386/i386lynx.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running LynxOS
+TDEPFILES= coff-solib.o i386-tdep.o i386ly-tdep.o
+TM_FILE= tm-i386lynx.h
diff --git a/gdb/config/i386/i386m3.mh b/gdb/config/i386/i386m3.mh
new file mode 100644
index 00000000000..41ea30c44b3
--- /dev/null
+++ b/gdb/config/i386/i386m3.mh
@@ -0,0 +1,6 @@
+# Host: Intel 386 running Mach3
+
+NATDEPFILES= i386m3-nat.o m3-nat.o fork-child.o i387-tdep.o core-aout.o
+NAT_CLIBS= -lmachid -lnetname -lmach
+XM_FILE= xm-i386m3.h
+NAT_FILE= nm-m3.h
diff --git a/gdb/config/i386/i386m3.mt b/gdb/config/i386/i386m3.mt
new file mode 100644
index 00000000000..e985ae345d9
--- /dev/null
+++ b/gdb/config/i386/i386m3.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 with a.out under Mach 3
+TDEPFILES= i386-tdep.o 
+TM_FILE= tm-i386m3.h
diff --git a/gdb/config/i386/i386mach.mh b/gdb/config/i386/i386mach.mh
new file mode 100644
index 00000000000..90dbdf4096a
--- /dev/null
+++ b/gdb/config/i386/i386mach.mh
@@ -0,0 +1,9 @@
+# Host: Intel 386 running Mach
+
+# This is for mach2, maybe, or is obsolete (and seems to have only
+# host and native, not target).  Once we get the mach3 stuff working,
+# I think it can go away.
+
+XM_FILE= xm-i386mach.h
+NAT_FILE= nm-i386mach.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o i386mach-nat.o
diff --git a/gdb/config/i386/i386mk.mh b/gdb/config/i386/i386mk.mh
new file mode 100644
index 00000000000..0c119becfda
--- /dev/null
+++ b/gdb/config/i386/i386mk.mh
@@ -0,0 +1,4 @@
+# Host: Intel 386 running Mach3 with OSF 1/MK
+
+NATDEPFILES= os-mach3.o i386mach3-xdep.o i387-tdep.o
+XM_FILE= xm-i386osf1mk.h
diff --git a/gdb/config/i386/i386mk.mt b/gdb/config/i386/i386mk.mt
new file mode 100644
index 00000000000..fc59442ac0d
--- /dev/null
+++ b/gdb/config/i386/i386mk.mt
@@ -0,0 +1,6 @@
+# Target: Intel 386 with a.out in osf 1/mk
+TDEPFILES= i386-tdep.o 
+TM_FILE= tm-i386osf1mk.h
+
+TM_CFLAGS= -I/usr/mach3/include
+TM_CLIBS= /usr/mach3/ccs/lib/libmachid.a /usr/mach3/ccs/lib/libnetname.a /usr/mach3/ccs/lib/libmach.a
diff --git a/gdb/config/i386/i386nw.mt b/gdb/config/i386/i386nw.mt
new file mode 100644
index 00000000000..3109c42149e
--- /dev/null
+++ b/gdb/config/i386/i386nw.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running NetWare
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-i386nw.h
diff --git a/gdb/config/i386/i386os9k.mt b/gdb/config/i386/i386os9k.mt
new file mode 100644
index 00000000000..5a8794db58f
--- /dev/null
+++ b/gdb/config/i386/i386os9k.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running OS9000
+TDEPFILES= i386-tdep.o remote-os9k.o
+TM_FILE= tm-i386os9k.h
diff --git a/gdb/config/i386/i386sco.mh b/gdb/config/i386/i386sco.mh
new file mode 100644
index 00000000000..d03994486d0
--- /dev/null
+++ b/gdb/config/i386/i386sco.mh
@@ -0,0 +1,12 @@
+# Host: Intel 386 running SCO Unix (pre-SVR4)
+
+XM_FILE= xm-i386sco.h
+XM_CLIBS= -lPW
+
+NAT_FILE= nm-i386sco.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o i386v-nat.o
+
+#msg The SCO C compiler cannot parse symtab.h when value.h has been included.
+#msg This is a bug in the compiler; the code is valid.
+#msg Therefore, you must use GCC to compile GDB on SCO machines.
+CC=gcc -D_POSIX_SOURCE=1
diff --git a/gdb/config/i386/i386sco4.mh b/gdb/config/i386/i386sco4.mh
new file mode 100644
index 00000000000..2507e07ec28
--- /dev/null
+++ b/gdb/config/i386/i386sco4.mh
@@ -0,0 +1,11 @@
+# Host: Intel 386 running SCO Unix 3.2v4
+
+XM_FILE= xm-i386sco.h
+XM_CLIBS= -lPW
+
+NAT_FILE= nm-i386sco4.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o i386v-nat.o
+
+# The cc compiler mishandles const in cases like 
+# struct type ** const (c_builtin_types[]) = 
+MH_CFLAGS=-Dconst=
diff --git a/gdb/config/i386/i386sco5.mh b/gdb/config/i386/i386sco5.mh
new file mode 100644
index 00000000000..7b8b8274250
--- /dev/null
+++ b/gdb/config/i386/i386sco5.mh
@@ -0,0 +1,16 @@
+# Host: Intel 386 running SCO OpenServer 5
+# Much like 3.2v4, except we don't have to avoid problems with const
+
+XM_FILE= xm-i386sco.h
+
+#
+# Not all configurations of SCO OpenServer 5 come with the TCP/IP 
+# runtime, but all come with the development system, so we always
+# have socket(), gethostbyname(), and friends.
+#
+XM_CLIBS= -lPW -lsocket
+
+NAT_FILE= nm-i386sco5.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corefile.o core-aout.o \
+	corelow.o i386v-nat.o solib.o solib-svr4.o solib-legacy.o
+
diff --git a/gdb/config/i386/i386sco5.mt b/gdb/config/i386/i386sco5.mt
new file mode 100644
index 00000000000..54dc68d16ca
--- /dev/null
+++ b/gdb/config/i386/i386sco5.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running SCO Open Server 5
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-i386sco5.h
diff --git a/gdb/config/i386/i386sol2.mh b/gdb/config/i386/i386sol2.mh
new file mode 100644
index 00000000000..ec93f4a75b9
--- /dev/null
+++ b/gdb/config/i386/i386sol2.mh
@@ -0,0 +1,8 @@
+# Host: Intel 386 running Solaris 2 (SVR4)
+
+XM_FILE= xm-i386v4.h
+XM_CLIBS= -lsocket -lnsl
+
+NAT_FILE= nm-i386sol2.h
+NATDEPFILES= core-regset.o fork-child.o i386v4-nat.o corelow.o \
+	procfs.o proc-api.o proc-events.o proc-flags.o proc-why.o gcore.o
diff --git a/gdb/config/i386/i386sol2.mt b/gdb/config/i386/i386sol2.mt
new file mode 100644
index 00000000000..86d93a378b1
--- /dev/null
+++ b/gdb/config/i386/i386sol2.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running SVR4
+TDEPFILES= i386-tdep.o i387-tdep.o solib.o solib-svr4.o solib-legacy.o
+TM_FILE= tm-i386sol2.h
diff --git a/gdb/config/i386/i386v.mh b/gdb/config/i386/i386v.mh
new file mode 100644
index 00000000000..7f0ea6eae72
--- /dev/null
+++ b/gdb/config/i386/i386v.mh
@@ -0,0 +1,7 @@
+# Host: Intel 386 running System V
+
+XM_FILE= xm-i386v.h
+XM_CLIBS= -lPW
+
+NAT_FILE= nm-i386v.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o i386v-nat.o
diff --git a/gdb/config/i386/i386v.mt b/gdb/config/i386/i386v.mt
new file mode 100644
index 00000000000..7242d3e8f38
--- /dev/null
+++ b/gdb/config/i386/i386v.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running System V
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-i386v.h
diff --git a/gdb/config/i386/i386v32.mh b/gdb/config/i386/i386v32.mh
new file mode 100644
index 00000000000..f39437276bb
--- /dev/null
+++ b/gdb/config/i386/i386v32.mh
@@ -0,0 +1,8 @@
+# Host: Intel 386 running System V release 3.2
+
+XM_FILE= xm-i386v32.h
+XM_CLIBS= -lPW
+
+NAT_FILE= nm-i386v.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o i386v-nat.o
+
diff --git a/gdb/config/i386/i386v4.mh b/gdb/config/i386/i386v4.mh
new file mode 100644
index 00000000000..a3952bc6213
--- /dev/null
+++ b/gdb/config/i386/i386v4.mh
@@ -0,0 +1,10 @@
+# Host: Intel 386 running SVR4
+
+XM_FILE= xm-i386v4.h
+# for network communication
+XM_CLIBS= -lsocket -lnsl
+
+NAT_FILE= nm-i386v4.h
+NATDEPFILES= corelow.o core-regset.o fork-child.o i386v4-nat.o \
+	solib.o solib-svr4.o solib-legacy.o \
+	procfs.o proc-api.o proc-events.o proc-flags.o proc-why.o
diff --git a/gdb/config/i386/i386v4.mt b/gdb/config/i386/i386v4.mt
new file mode 100644
index 00000000000..c22b6755985
--- /dev/null
+++ b/gdb/config/i386/i386v4.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running SVR4
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-i386v4.h
diff --git a/gdb/config/i386/i386v42mp.mh b/gdb/config/i386/i386v42mp.mh
new file mode 100644
index 00000000000..4aac5d97b84
--- /dev/null
+++ b/gdb/config/i386/i386v42mp.mh
@@ -0,0 +1,20 @@
+# Host: Intel 386 running SVR4
+
+XM_FILE= xm-i386v4.h
+# for network communication
+XM_CLIBS= -lsocket -lnsl
+
+# we don't want nm-i386v4.h since that defines LOSING_POLL which isn't
+# appropriate for i386v42mp
+NAT_FILE= nm-i386v42mp.h
+
+# NATDEPFILES must remain entirely on one line.  When building a cross
+# debugger, configure will cause this line to be commented out in the
+# Makefile.  Many non-GNU versions of make don't permit the use of a
+# continuation character (backslash) to extend a commented line.  As a
+# consequence, make considers subsequent tab-indented lines to be
+# some sort of error.
+NATDEPFILES= corelow.o core-regset.o fork-child.o i386v4-nat.o \
+	gcore.o solib.o solib-svr4.o solib-legacy.o procfs.o proc-api.o \
+	proc-events.o proc-flags.o proc-why.o uw-thread.o
+
diff --git a/gdb/config/i386/i386v42mp.mt b/gdb/config/i386/i386v42mp.mt
new file mode 100644
index 00000000000..0b2dea8af04
--- /dev/null
+++ b/gdb/config/i386/i386v42mp.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running SVR4.2MP
+TDEPFILES= i386-tdep.o i387-tdep.o
+TM_FILE= tm-i386v42mp.h
diff --git a/gdb/config/i386/linux.mh b/gdb/config/i386/linux.mh
new file mode 100644
index 00000000000..494ccf1a4a4
--- /dev/null
+++ b/gdb/config/i386/linux.mh
@@ -0,0 +1,12 @@
+# Host: Intel 386 running GNU/Linux.
+
+XM_FILE= xm-i386.h
+
+NAT_FILE= nm-linux.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o linux-proc.o \
+	core-aout.o i386-nat.o i386-linux-nat.o \
+	proc-service.o thread-db.o lin-lwp.o linux-proc.o gcore.o
+
+# The dynamically loaded libthread_db needs access to symbols in the
+# gdb executable.
+LOADLIBES = -ldl -rdynamic
diff --git a/gdb/config/i386/linux.mt b/gdb/config/i386/linux.mt
new file mode 100644
index 00000000000..43bc2d26b73
--- /dev/null
+++ b/gdb/config/i386/linux.mt
@@ -0,0 +1,6 @@
+# Target: Intel 386 running GNU/Linux
+TDEPFILES= i386-tdep.o i386-linux-tdep.o i387-tdep.o \
+	solib.o solib-svr4.o solib-legacy.o
+TM_FILE= tm-linux.h
+
+GDBSERVER_DEPFILES = linux-low.o linux-i386-low.o reg-i386.o
diff --git a/gdb/config/i386/nbsdaout.mh b/gdb/config/i386/nbsdaout.mh
new file mode 100644
index 00000000000..e52f38a5b21
--- /dev/null
+++ b/gdb/config/i386/nbsdaout.mh
@@ -0,0 +1,6 @@
+# Host: Intel 386 running NetBSD
+NATDEPFILES= fork-child.o infptrace.o inftarg.o i386bsd-nat.o \
+	solib.o solib-sunos.o
+
+XM_FILE= xm-nbsd.h
+NAT_FILE= nm-nbsdaout.h
diff --git a/gdb/config/i386/nbsdaout.mt b/gdb/config/i386/nbsdaout.mt
new file mode 100644
index 00000000000..aa88957b9ea
--- /dev/null
+++ b/gdb/config/i386/nbsdaout.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running NetBSD
+TDEPFILES= i386-tdep.o i387-tdep.o i386bsd-tdep.o i386nbsd-tdep.o corelow.o
+TM_FILE= tm-nbsdaout.h
diff --git a/gdb/config/i386/nbsdelf.mh b/gdb/config/i386/nbsdelf.mh
new file mode 100644
index 00000000000..0d1c4d1badc
--- /dev/null
+++ b/gdb/config/i386/nbsdelf.mh
@@ -0,0 +1,5 @@
+# Host: Intel 386 running NetBSD
+NATDEPFILES= fork-child.o infptrace.o inftarg.o i386bsd-nat.o \
+	solib.o solib-svr4.o solib-legacy.o
+XM_FILE= xm-nbsd.h
+NAT_FILE= nm-nbsd.h
diff --git a/gdb/config/i386/nbsdelf.mt b/gdb/config/i386/nbsdelf.mt
new file mode 100644
index 00000000000..fc80608e01e
--- /dev/null
+++ b/gdb/config/i386/nbsdelf.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running NetBSD
+TDEPFILES= i386-tdep.o i387-tdep.o i386bsd-tdep.o i386nbsd-tdep.o corelow.o
+TM_FILE= tm-nbsd.h
diff --git a/gdb/config/i386/ncr3000.mh b/gdb/config/i386/ncr3000.mh
new file mode 100644
index 00000000000..4e669ba4ad6
--- /dev/null
+++ b/gdb/config/i386/ncr3000.mh
@@ -0,0 +1,16 @@
+# Host: NCR 3000 (Intel 386 running SVR4)
+
+# The NCR 3000 ships with a MetaWare compiler installed as /bin/cc.
+# This compiler not only emits obnoxious copyright messages every time
+# you run it, but it chokes and dies on a whole bunch of GNU source
+# files.  Default to using the AT&T compiler installed in /usr/ccs/ATT/cc.
+# Unfortunately though, the AT&T compiler sometimes generates code that
+# the assembler barfs on if -g is used, so disable it by default as well.
+CC = /usr/ccs/ATT/cc
+CFLAGS =
+
+XM_FILE= xm-i386v4.h
+
+NAT_FILE= nm-i386v4.h
+NATDEPFILES= corelow.o core-regset.o fork-child.o i386v4-nat.o procfs.o \
+	proc-api.o proc-events.o proc-flags.o proc-why.o
diff --git a/gdb/config/i386/ncr3000.mt b/gdb/config/i386/ncr3000.mt
new file mode 100644
index 00000000000..11bc47426e6
--- /dev/null
+++ b/gdb/config/i386/ncr3000.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running SVR4
+TDEPFILES= i386-tdep.o i387-tdep.o solib.o solib-svr4.o solib-legacy.o
+TM_FILE= tm-i386v4.h
diff --git a/gdb/config/i386/nm-cygwin.h b/gdb/config/i386/nm-cygwin.h
new file mode 100644
index 00000000000..7eac99ba3fd
--- /dev/null
+++ b/gdb/config/i386/nm-cygwin.h
@@ -0,0 +1,36 @@
+/* Native definitions for Intel x86 running CYGWIN.
+   Copyright 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define I386_USE_GENERIC_WATCHPOINTS
+
+#include "i386/nm-i386.h"
+
+/* Support for hardware-assisted breakpoints and watchpoints.  */
+
+#define I386_DR_LOW_SET_CONTROL(VAL)	cygwin_set_dr7 (VAL)
+extern void cygwin_set_dr7 (unsigned);
+
+#define I386_DR_LOW_SET_ADDR(N,ADDR)	cygwin_set_dr (N,ADDR)
+extern void cygwin_set_dr (int, CORE_ADDR);
+
+#define I386_DR_LOW_RESET_ADDR(N)
+
+#define I386_DR_LOW_GET_STATUS()	cygwin_get_dr6 ()
+extern unsigned cygwin_get_dr6 (void);
diff --git a/gdb/config/i386/nm-fbsd.h b/gdb/config/i386/nm-fbsd.h
new file mode 100644
index 00000000000..b7919036199
--- /dev/null
+++ b/gdb/config/i386/nm-fbsd.h
@@ -0,0 +1,155 @@
+/* Native-dependent definitions for FreeBSD/i386.
+   Copyright 1986, 1987, 1989, 1992, 1994, 1996, 1997, 2000, 2001
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_FBSD_H
+#define NM_FBSD_H
+
+#ifdef HAVE_PT_GETDBREGS
+#define I386_USE_GENERIC_WATCHPOINTS
+#endif
+
+#include "i386/nm-i386.h"
+
+/* Provide access to the i386 hardware debugging registers.  */
+
+#define I386_DR_LOW_SET_CONTROL(control) \
+  i386bsd_dr_set_control (control)
+extern void i386bsd_dr_set_control (unsigned long control);
+
+#define I386_DR_LOW_SET_ADDR(regnum, addr) \
+  i386bsd_dr_set_addr (regnum, addr)
+extern void i386bsd_dr_set_addr (int regnum, CORE_ADDR addr);
+
+#define I386_DR_LOW_RESET_ADDR(regnum) \
+  i386bsd_dr_reset_addr (regnum)
+extern void i386bsd_dr_reset_addr (int regnum);
+
+#define I386_DR_LOW_GET_STATUS() \
+  i386bsd_dr_get_status ()
+extern unsigned long i386bsd_dr_get_status (void);
+
+
+/* Type of the third argument to the `ptrace' system call.  */
+#define PTRACE_ARG3_TYPE caddr_t
+
+/* Override copies of {fetch,store}_inferior_registers in `infptrace.c'.  */
+#define FETCH_INFERIOR_REGISTERS
+
+/* Override child_resume in `infptrace.c' to work around a kernel bug.  */
+#define CHILD_RESUME
+
+/* Override child_pid_to_exec_file in 'inftarg.c'.  */
+#define CHILD_PID_TO_EXEC_FILE
+
+/* We can attach and detach.  */
+#define ATTACH_DETACH
+
+
+/* Support for the user struct.  */
+
+/* Return the size of the user struct.  */
+
+#define KERNEL_U_SIZE kernel_u_size ()
+extern int kernel_u_size (void);
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+
+#include <machine/vmparam.h>
+#define KERNEL_U_ADDR USRSTACK
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+  (addr) = register_u_addr ((blockend), (regno))
+extern CORE_ADDR register_u_addr (CORE_ADDR blockend, int regno);
+
+
+/* Shared library support.  */
+
+/* The FreeBSD <link.h> uses the same condition to distinguish ELF
+   from a.out.  ELF implies SVR4 shared libraries.  */
+#if (defined (FREEBSD_ELF) || defined (__ELF__)) && !defined (FREEBSD_AOUT)
+#define SVR4_SHARED_LIBS
+#endif
+
+#include "solib.h"		/* Support for shared libraries. */
+#ifdef SVR4_SHARED_LIBS
+#include "elf/common.h"		/* Additional ELF shared library info. */
+#endif
+
+#ifndef SVR4_SHARED_LIBS
+
+/* Make structure definitions match up with those expected in `solib.c'.  */
+
+#define link_object	sod
+#define lo_name		sod_name
+#define lo_library	sod_library
+#define lo_unused	sod_reserved
+#define lo_major	sod_major
+#define lo_minor	sod_minor
+#define lo_next		sod_next
+
+#define link_map	so_map
+#define lm_addr		som_addr
+#define lm_name		som_path
+#define lm_next		som_next
+#define lm_lop		som_sod
+#define lm_lob		som_sodbase
+#define lm_rwt		som_write
+#define lm_ld		som_dynamic
+#define lm_lpd		som_spd
+
+#define link_dynamic_2	section_dispatch_table
+#define ld_loaded	sdt_loaded
+#define ld_need		sdt_sods
+#define ld_rules	sdt_filler1
+#define ld_got		sdt_got
+#define ld_plt		sdt_plt
+#define ld_rel		sdt_rel
+#define ld_hash		sdt_hash
+#define ld_stab		sdt_nzlist
+#define ld_stab_hash	sdt_filler2
+#define ld_buckets	sdt_buckets
+#define ld_symbols	sdt_strings
+#define ld_symb_size	sdt_str_sz
+#define ld_text		sdt_text_sz
+#define ld_plt_sz	sdt_plt_sz
+
+#define rtc_symb	rt_symbol
+#define rtc_sp		rt_sp
+#define rtc_next	rt_next
+
+#define ld_debug	so_debug
+#define ldd_version	dd_version
+#define ldd_in_debugger	dd_in_debugger
+#define ldd_sym_loaded	dd_sym_loaded
+#define ldd_bp_addr	dd_bpt_addr
+#define ldd_bp_inst	dd_bpt_shadow
+#define ldd_cp		dd_cc
+
+#define link_dynamic	_dynamic
+#define ld_version	d_version
+#define ldd		d_debug
+#define ld_un		d_un
+#define ld_2		d_sdt
+
+#endif /* !SVR4_SHARED_LIBS */
+
+#endif /* NM_FBSD_H */
diff --git a/gdb/config/i386/nm-gnu.h b/gdb/config/i386/nm-gnu.h
new file mode 100644
index 00000000000..fa6d829345d
--- /dev/null
+++ b/gdb/config/i386/nm-gnu.h
@@ -0,0 +1,23 @@
+/* Native-dependent definitions for Intel 386 running the GNU Hurd
+   Copyright 1994, 1995, 1996 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Include the generic hurd definitions.  */
+
+#include "nm-gnu.h"
diff --git a/gdb/config/i386/nm-go32.h b/gdb/config/i386/nm-go32.h
new file mode 100644
index 00000000000..5947b745c0e
--- /dev/null
+++ b/gdb/config/i386/nm-go32.h
@@ -0,0 +1,36 @@
+/* Native definitions for Intel x86 running DJGPP.
+   Copyright 1997, 1998, 1999, 2001, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define I386_USE_GENERIC_WATCHPOINTS
+
+#include "i386/nm-i386.h"
+
+/* Support for hardware-assisted breakpoints and watchpoints.  */
+
+#define I386_DR_LOW_SET_CONTROL(VAL)	go32_set_dr7 (VAL)
+extern void go32_set_dr7 (unsigned);
+
+#define I386_DR_LOW_SET_ADDR(N,ADDR)	go32_set_dr (N,ADDR)
+extern void go32_set_dr (int, CORE_ADDR);
+
+#define I386_DR_LOW_RESET_ADDR(N)
+
+#define I386_DR_LOW_GET_STATUS()	go32_get_dr6 ()
+extern unsigned go32_get_dr6 (void);
diff --git a/gdb/config/i386/nm-i386.h b/gdb/config/i386/nm-i386.h
new file mode 100644
index 00000000000..500bf7b5942
--- /dev/null
+++ b/gdb/config/i386/nm-i386.h
@@ -0,0 +1,120 @@
+/* Native macro definitions for GDB on an Intel i[3456]86.
+   Copyright 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_I386_H
+#define NM_I386_H 1
+
+/* Hardware-assisted breakpoints and watchpoints.  */
+
+/* Targets should define this to use the generic x86 watchpoint support.  */
+#ifdef I386_USE_GENERIC_WATCHPOINTS
+
+#ifndef TARGET_HAS_HARDWARE_WATCHPOINTS
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+#endif
+
+/* Clear the reference counts and forget everything we knew about DRi.  */
+extern void i386_cleanup_dregs (void);
+
+/* Insert a watchpoint to watch a memory region which starts at
+   address ADDR and whose length is LEN bytes.  Watch memory accesses
+   of the type TYPE.  Return 0 on success, -1 on failure.  */
+extern int i386_insert_watchpoint (CORE_ADDR addr, int len, int type);
+
+/* Remove a watchpoint that watched the memory region which starts at
+   address ADDR, whose length is LEN bytes, and for accesses of the
+   type TYPE.  Return 0 on success, -1 on failure.  */
+extern int i386_remove_watchpoint (CORE_ADDR addr, int len, int type);
+
+/* Return non-zero if we can watch a memory region that starts at
+   address ADDR and whose length is LEN bytes.  */
+extern int i386_region_ok_for_watchpoint (CORE_ADDR addr, int len);
+
+/* Return non-zero if the inferior has some break/watchpoint that
+   triggered.  */
+extern int i386_stopped_by_hwbp (void);
+
+/* If the inferior has some break/watchpoint that triggered, return
+   the address associated with that break/watchpoint.  Otherwise,
+   return zero.  */
+extern CORE_ADDR i386_stopped_data_address (void);
+
+/* Insert a hardware-assisted breakpoint at address ADDR.  SHADOW is
+   unused.  Return 0 on success, EBUSY on failure.  */
+extern int i386_insert_hw_breakpoint (CORE_ADDR addr, void *shadow);
+
+/* Remove a hardware-assisted breakpoint at address ADDR.  SHADOW is
+   unused. Return 0 on success, -1 on failure.  */
+extern int  i386_remove_hw_breakpoint (CORE_ADDR addr, void *shadow);
+
+/* Returns the number of hardware watchpoints of type TYPE that we can
+   set.  Value is positive if we can set CNT watchpoints, zero if
+   setting watchpoints of type TYPE is not supported, and negative if
+   CNT is more than the maximum number of watchpoints of type TYPE
+   that we can support.  TYPE is one of bp_hardware_watchpoint,
+   bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
+   CNT is the number of such watchpoints used so far (including this
+   one).  OTHERTYPE is non-zero if other types of watchpoints are
+   currently enabled.
+
+   We always return 1 here because we don't have enough information
+   about possible overlap of addresses that they want to watch.  As an
+   extreme example, consider the case where all the watchpoints watch
+   the same address and the same region length: then we can handle a
+   virtually unlimited number of watchpoints, due to debug register
+   sharing implemented via reference counts in i386-nat.c.  */
+
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) 1
+
+/* Returns non-zero if we can use hardware watchpoints to watch a
+   region whose address is ADDR and whose length is LEN.  */
+
+#define TARGET_REGION_OK_FOR_HW_WATCHPOINT(addr, len) \
+  i386_region_ok_for_watchpoint (addr, len)
+
+/* After a watchpoint trap, the PC points to the instruction after the
+   one that caused the trap.  Therefore we don't need to step over it.
+   But we do need to reset the status register to avoid another trap.  */
+
+#define HAVE_CONTINUABLE_WATCHPOINT
+
+#define STOPPED_BY_WATCHPOINT(W)       (i386_stopped_data_address () != 0)
+
+#define target_stopped_data_address()  i386_stopped_data_address ()
+
+/* Use these macros for watchpoint insertion/removal.  */
+
+#define target_insert_watchpoint(addr, len, type) \
+  i386_insert_watchpoint (addr, len, type)
+
+#define target_remove_watchpoint(addr, len, type) \
+  i386_remove_watchpoint (addr, len, type)
+
+#define target_insert_hw_breakpoint(addr, shadow) \
+  i386_insert_hw_breakpoint (addr, shadow)
+
+#define target_remove_hw_breakpoint(addr, shadow) \
+  i386_remove_hw_breakpoint (addr, shadow)
+
+#define DECR_PC_AFTER_HW_BREAK 0
+
+#endif /* I386_USE_GENERIC_WATCHPOINTS */
+
+#endif /* NM_I386_H */
diff --git a/gdb/config/i386/nm-i386aix.h b/gdb/config/i386/nm-i386aix.h
new file mode 100644
index 00000000000..4a6ffc1acfa
--- /dev/null
+++ b/gdb/config/i386/nm-i386aix.h
@@ -0,0 +1,43 @@
+/* Native support for i386 aix ps/2.
+   Copyright 1986, 1987, 1989, 1992, 1993 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/*
+ * Changes for IBM AIX PS/2 by Minh Tran-Le (tranle@intellicorp.com)
+ * Revision:     5-May-93 00:11:35
+ */
+
+#ifndef NM_I386AIX_H
+#define NM_I386AIX_H 1
+
+/* code to execute to print interesting information about the
+ * floating point processor (if any)
+ * No need to define if there is nothing to do.
+ */
+#define FLOAT_INFO { i386_float_info (); }
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+#undef  KERNEL_U_ADDR
+#define KERNEL_U_ADDR 0xf03fd000
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
+#define FETCH_INFERIOR_REGISTERS
+
+#endif /* NM_I386AIX_H */
diff --git a/gdb/config/i386/nm-i386bsd.h b/gdb/config/i386/nm-i386bsd.h
new file mode 100644
index 00000000000..0015af2ffb0
--- /dev/null
+++ b/gdb/config/i386/nm-i386bsd.h
@@ -0,0 +1,40 @@
+/* Native-dependent definitions for Intel 386 running BSD Unix, for GDB.
+   Copyright 1986, 1987, 1989, 1992, 1993, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_I386BSD_H
+#define NM_I386BSD_H
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+
+#include <machine/vmparam.h>
+#define KERNEL_U_ADDR USRSTACK
+
+#undef FLOAT_INFO		/* No float info yet */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+	(addr) = i386_register_u_addr ((blockend),(regno));
+
+extern int i386_register_u_addr (int, int);
+
+#define PTRACE_ARG3_TYPE char*
+
+#endif /* NM_I386BSD_H */
diff --git a/gdb/config/i386/nm-i386lynx.h b/gdb/config/i386/nm-i386lynx.h
new file mode 100644
index 00000000000..5d0d41de267
--- /dev/null
+++ b/gdb/config/i386/nm-i386lynx.h
@@ -0,0 +1,26 @@
+/* Native-dependent definitions for Intel 386 running LynxOS.
+   Copyright 1993 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_I386LYNX_H
+#define NM_I386LYNX_H
+
+#include "nm-lynx.h"
+
+#endif /* NM_I386LYNX_H */
diff --git a/gdb/config/i386/nm-i386mach.h b/gdb/config/i386/nm-i386mach.h
new file mode 100644
index 00000000000..ef10a28cf8f
--- /dev/null
+++ b/gdb/config/i386/nm-i386mach.h
@@ -0,0 +1,30 @@
+/* Native definitions for Mach on an Intel 386
+   Copyright 1986, 1987, 1989, 1991, 1992, 1996
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+/* Do implement the attach and detach commands.  */
+/* #define ATTACH_DETACH        1 */
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
+#define FETCH_INFERIOR_REGISTERS
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
diff --git a/gdb/config/i386/nm-i386sco.h b/gdb/config/i386/nm-i386sco.h
new file mode 100644
index 00000000000..b46776151b3
--- /dev/null
+++ b/gdb/config/i386/nm-i386sco.h
@@ -0,0 +1,42 @@
+/* Native support for i386.
+   Copyright 1986, 1987, 1989, 1992, 1994, 1998, 2000
+   Free Software Foundation, Inc.
+   Changes for 80386 by Pace Willisson (pace@prep.ai.mit.edu), July 1988.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#if 0
+/* code to execute to print interesting information about the
+   floating point processor (if any)
+   No need to define if there is nothing to do.
+   On the 386, unfortunately this code is host-dependent (and lives
+   in the i386-xdep.c file), so we can't
+   do this unless we *know* we aren't cross-debugging.  FIXME.
+ */
+#define FLOAT_INFO { i386_float_info (); }
+#endif /*0 */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+	(addr) = i386_register_u_addr ((blockend),(regno));
+
+extern int i386_register_u_addr (int, int);
+
+/* When calling functions on SCO, sometimes we get an error writing some
+   of the segment registers.  This would appear to be a kernel
+   bug/non-feature.  */
+#define CANNOT_STORE_REGISTER(regno) ((regno) == 14 || (regno) == 15)
diff --git a/gdb/config/i386/nm-i386sco4.h b/gdb/config/i386/nm-i386sco4.h
new file mode 100644
index 00000000000..6947f3febb1
--- /dev/null
+++ b/gdb/config/i386/nm-i386sco4.h
@@ -0,0 +1,33 @@
+/* Native support for SCO 3.2v4.
+   Copyright 1993 Free Software Foundation, Inc.
+   Contributed by Cygnus Support.  By Ian Lance Taylor
+   <ian@cygnus.com> based on work by Martin Walker <maw@netcom.com>.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* SCO 3.2v4 is actually just like SCO 3.2v2, except that it
+   additionally supports attaching to a process.  */
+
+#include "i386/nm-i386sco.h"
+
+#define ATTACH_DETACH
+
+/* SCO, in its wisdom, does not provide <sys/ptrace.h>.  infptrace.c
+   does not have defaults for these values.  */
+#define PTRACE_ATTACH 10
+#define PTRACE_DETACH 11
diff --git a/gdb/config/i386/nm-i386sco5.h b/gdb/config/i386/nm-i386sco5.h
new file mode 100644
index 00000000000..db2880c01ba
--- /dev/null
+++ b/gdb/config/i386/nm-i386sco5.h
@@ -0,0 +1,38 @@
+/* Native support for SCO OpenServer 5
+   Copyright 1996, 1998 Free Software Foundation, Inc.
+   Re-written by J. Kean Johnston <jkj@sco.com>.
+   Originally written by Robert Lipe <robertl@dgii.com>, based on 
+   work by Ian Lance Taylor <ian@cygnus.com> and 
+   Martin Walker <maw@netcom.com>.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Basically, its a lot like the older versions ... */
+#include "i386/nm-i386sco.h"
+
+/* ... but it can do a lot of SVR4 type stuff too. */
+#define SVR4_SHARED_LIBS
+#include "solib.h"		/* Pick up shared library support */
+
+#define ATTACH_DETACH
+
+/* SCO does not provide <sys/ptrace.h>.  infptrace.c does not 
+   have defaults for these values.  */
+
+#define PTRACE_ATTACH 10
+#define PTRACE_DETACH 11
diff --git a/gdb/config/i386/nm-i386sol2.h b/gdb/config/i386/nm-i386sol2.h
new file mode 100644
index 00000000000..0e6b3ef4c7f
--- /dev/null
+++ b/gdb/config/i386/nm-i386sol2.h
@@ -0,0 +1,60 @@
+/* Native support for i386 running Solaris 2.
+   Copyright 1998, 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "nm-sysv4.h"
+
+#ifdef NEW_PROC_API	/* Solaris 6 and above can do HW watchpoints */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+/* The man page for proc4 on solaris 6 and 7 says that the system
+   can support "thousands" of hardware watchpoints, but gives no
+   method for finding out how many.  So just tell GDB 'yes'.  */
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(TYPE, CNT, OT) 1
+
+/* When a hardware watchpoint fires off the PC will be left at the
+   instruction following the one which caused the watchpoint.  
+   It will *NOT* be necessary for GDB to step over the watchpoint. */
+#define HAVE_CONTINUABLE_WATCHPOINT
+
+/* Solaris x86 2.6 and 2.7 targets have a kernel bug when stepping
+   over an instruction that causes a page fault without triggering
+   a hardware watchpoint. The kernel properly notices that it shouldn't
+   stop, because the hardware watchpoint is not triggered, but it forgets
+   the step request and continues the program normally.
+   Work around the problem by removing hardware watchpoints if a step is
+   requested, GDB will check for a hardware watchpoint trigger after the
+   step anyway.  */
+#define CANNOT_STEP_HW_WATCHPOINTS
+
+extern int procfs_stopped_by_watchpoint (ptid_t);
+#define STOPPED_BY_WATCHPOINT(W) \
+  procfs_stopped_by_watchpoint(inferior_ptid)
+
+/* Use these macros for watchpoint insertion/deletion.  */
+/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
+
+extern int procfs_set_watchpoint (ptid_t, CORE_ADDR, int, int, int);
+#define target_insert_watchpoint(ADDR, LEN, TYPE) \
+        procfs_set_watchpoint (inferior_ptid, ADDR, LEN, TYPE, 1)
+#define target_remove_watchpoint(ADDR, LEN, TYPE) \
+        procfs_set_watchpoint (inferior_ptid, ADDR, 0, 0, 0)
+
+#endif /* NEW_PROC_API */
diff --git a/gdb/config/i386/nm-i386v.h b/gdb/config/i386/nm-i386v.h
new file mode 100644
index 00000000000..e7bfca4ea57
--- /dev/null
+++ b/gdb/config/i386/nm-i386v.h
@@ -0,0 +1,37 @@
+/* Native support for i386.
+   Copyright 1986, 1987, 1989, 1992, 1993, 1998, 2000
+   Free Software Foundation, Inc.
+   Changes for 80386 by Pace Willisson (pace@prep.ai.mit.edu), July 1988.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#if 0
+/* code to execute to print interesting information about the
+   floating point processor (if any)
+   No need to define if there is nothing to do.
+   On the 386, unfortunately this code is host-dependent (and lives
+   in the i386-xdep.c file), so we can't
+   do this unless we *know* we aren't cross-debugging.  FIXME.
+ */
+#define FLOAT_INFO { i386_float_info (); }
+#endif /*0 */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+	(addr) = i386_register_u_addr ((blockend),(regno));
+
+extern int i386_register_u_addr (int, int);
diff --git a/gdb/config/i386/nm-i386v4.h b/gdb/config/i386/nm-i386v4.h
new file mode 100644
index 00000000000..02d445e8bc3
--- /dev/null
+++ b/gdb/config/i386/nm-i386v4.h
@@ -0,0 +1,26 @@
+/* Native support for i386 running SVR4.
+   Copyright 1986, 1987, 1989, 1992, 1993, 1996
+   Free Software Foundation, Inc.
+   Changes for 80386 by Pace Willisson (pace@prep.ai.mit.edu), July 1988.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "nm-sysv4.h"
+
+/* Poll causes GDB to hang, at least under Unixware 1.1.2.  */
+#define LOSING_POLL
diff --git a/gdb/config/i386/nm-i386v42mp.h b/gdb/config/i386/nm-i386v42mp.h
new file mode 100644
index 00000000000..72e440d0cc4
--- /dev/null
+++ b/gdb/config/i386/nm-i386v42mp.h
@@ -0,0 +1,23 @@
+/* Native support for i386 running SVR4.
+   Copyright 1986, 1987, 1989, 1992, 1996, 1997, 1998
+   Free Software Foundation, Inc.
+   Changes for 80386 by Pace Willisson (pace@prep.ai.mit.edu), July 1988.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "nm-sysv4.h"
diff --git a/gdb/config/i386/nm-linux.h b/gdb/config/i386/nm-linux.h
new file mode 100644
index 00000000000..8ae3eceec98
--- /dev/null
+++ b/gdb/config/i386/nm-linux.h
@@ -0,0 +1,83 @@
+/* Native support for GNU/Linux x86.
+
+   Copyright 1986, 1987, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
+   1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_LINUX_H
+#define NM_LINUX_H
+
+/* GNU/Linux supports the i386 hardware debugging registers.  */
+#define I386_USE_GENERIC_WATCHPOINTS
+
+#include "i386/nm-i386.h"
+#include "nm-linux.h"
+
+/* Support for the user area.  */
+
+/* Return the size of the user struct.  */
+extern int kernel_u_size (void);
+#define KERNEL_U_SIZE kernel_u_size()
+
+/* This is the amount to substract from u.u_ar0 to get the offset in
+   the core file of the register values.  */
+#define KERNEL_U_ADDR 0
+
+/* Offset of the registers within the user area.  */
+#define U_REGS_OFFSET 0
+
+extern CORE_ADDR register_u_addr (CORE_ADDR blockend, int regnum);
+#define REGISTER_U_ADDR(addr, blockend, regnum) \
+  (addr) = register_u_addr (blockend, regnum)
+
+/* Provide access to the i386 hardware debugging registers.  */
+
+extern void i386_linux_dr_set_control (unsigned long control);
+#define I386_DR_LOW_SET_CONTROL(control) \
+  i386_linux_dr_set_control (control)
+
+extern void i386_linux_dr_set_addr (int regnum, CORE_ADDR addr);
+#define I386_DR_LOW_SET_ADDR(regnum, addr) \
+  i386_linux_dr_set_addr (regnum, addr)
+
+extern void i386_linux_dr_reset_addr (int regnum);
+#define I386_DR_LOW_RESET_ADDR(regnum) \
+  i386_linux_dr_reset_addr (regnum)
+
+extern unsigned long i386_linux_dr_get_status (void);
+#define I386_DR_LOW_GET_STATUS() \
+  i386_linux_dr_get_status ()
+
+
+/* Override copies of {fetch,store}_inferior_registers in `infptrace.c'.  */
+#define FETCH_INFERIOR_REGISTERS
+
+/* Nevertheless, define CANNOT_{FETCH,STORE}_REGISTER, because we
+   might fall back on the code `infptrace.c' (well a copy of that code
+   in `i386-linux-nat.c' for now) and we can access only the
+   general-purpose registers in that way.  */
+extern int cannot_fetch_register (int regno);
+extern int cannot_store_register (int regno);
+#define CANNOT_FETCH_REGISTER(regno) cannot_fetch_register (regno)
+#define CANNOT_STORE_REGISTER(regno) cannot_store_register (regno)
+
+/* Override child_resume in `infptrace.c'.  */
+#define CHILD_RESUME
+
+#endif /* nm-linux.h */
diff --git a/gdb/config/i386/nm-m3.h b/gdb/config/i386/nm-m3.h
new file mode 100644
index 00000000000..00128cf9ce8
--- /dev/null
+++ b/gdb/config/i386/nm-m3.h
@@ -0,0 +1,23 @@
+/* Native-dependent definitions for Intel 386 running Mach 3.
+   Copyright 1994 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Include the generic Mach 3 definitions.  */
+
+#include "nm-m3.h"
diff --git a/gdb/config/i386/nm-nbsd.h b/gdb/config/i386/nm-nbsd.h
new file mode 100644
index 00000000000..2e5adb82b3d
--- /dev/null
+++ b/gdb/config/i386/nm-nbsd.h
@@ -0,0 +1,28 @@
+/* Native-dependent definitions for Intel 386 running NetBSD, for GDB.
+   Copyright 1986, 1987, 1989, 1992, 1994, 2000, 2002
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSD_H
+#define NM_NBSD_H
+
+/* Get generic NetBSD native definitions. */
+#include "config/nm-nbsd.h"
+
+#endif /* NM_NBSD_H */
diff --git a/gdb/config/i386/nm-nbsdaout.h b/gdb/config/i386/nm-nbsdaout.h
new file mode 100644
index 00000000000..dc8aac961c4
--- /dev/null
+++ b/gdb/config/i386/nm-nbsdaout.h
@@ -0,0 +1,30 @@
+/* Native-dependent definitions for Intel 386 running NetBSD, for GDB.
+   Copyright 1986, 1987, 1989, 1992, 1994, 1996, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSDAOUT_H
+#define NM_NBSDAOUT_H
+
+#include "i386/nm-nbsd.h"
+
+/* Get generic NetBSD a.out native definitions. */
+#include "config/nm-nbsdaout.h"
+
+#endif /* NM_NBSDAOUT_H */
diff --git a/gdb/config/i386/nm-obsd.h b/gdb/config/i386/nm-obsd.h
new file mode 100644
index 00000000000..6113e140088
--- /dev/null
+++ b/gdb/config/i386/nm-obsd.h
@@ -0,0 +1,110 @@
+/* Native-dependent definitions for OpenBSD/i386.
+   Copyright 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_OBSD_H
+#define NM_OBSD_H
+
+/* Type of the third argument to the `ptrace' system call.  */
+#define PTRACE_ARG3_TYPE caddr_t
+
+/* Override copies of {fetch,store}_inferior_registers in `infptrace.c'.  */
+#define FETCH_INFERIOR_REGISTERS
+
+/* We can attach and detach.  */
+#define ATTACH_DETACH
+
+
+/* Support for the user struct.  */
+
+/* Return the size of the user struct.  */
+
+#define KERNEL_U_SIZE kernel_u_size ()
+extern int kernel_u_size (void);
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+
+#include <machine/vmparam.h>
+#define KERNEL_U_ADDR USRSTACK
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+  (addr) = register_u_addr ((blockend), (regno))
+extern CORE_ADDR register_u_addr (CORE_ADDR blockend, int regno);
+
+
+/* Shared library support.  */
+
+#include "solib.h"		/* Support for shared libraries. */
+
+/* Make structure definitions match up with those expected in `solib.c'.  */
+
+#define link_object	sod
+#define lo_name		sod_name
+#define lo_library	sod_library
+#define lo_unused	sod_reserved
+#define lo_major	sod_major
+#define lo_minor	sod_minor
+#define lo_next		sod_next
+
+#define link_map	so_map
+#define lm_addr		som_addr
+#define lm_name		som_path
+#define lm_next		som_next
+#define lm_lop		som_sod
+#define lm_lob		som_sodbase
+#define lm_rwt		som_write
+#define lm_ld		som_dynamic
+#define lm_lpd		som_spd
+
+#define link_dynamic_2	section_dispatch_table
+#define ld_loaded	sdt_loaded
+#define ld_need		sdt_sods
+#define ld_rules	sdt_filler1
+#define ld_got		sdt_got
+#define ld_plt		sdt_plt
+#define ld_rel		sdt_rel
+#define ld_hash		sdt_hash
+#define ld_stab		sdt_nzlist
+#define ld_stab_hash	sdt_filler2
+#define ld_buckets	sdt_buckets
+#define ld_symbols	sdt_strings
+#define ld_symb_size	sdt_str_sz
+#define ld_text		sdt_text_sz
+#define ld_plt_sz	sdt_plt_sz
+
+#define rtc_symb	rt_symbol
+#define rtc_sp		rt_sp
+#define rtc_next	rt_next
+
+#define ld_debug	so_debug
+#define ldd_version	dd_version
+#define ldd_in_debugger	dd_in_debugger
+#define ldd_sym_loaded	dd_sym_loaded
+#define ldd_bp_addr	dd_bpt_addr
+#define ldd_bp_inst	dd_bpt_shadow
+#define ldd_cp		dd_cc
+
+#define link_dynamic	_dynamic
+#define ld_version	d_version
+#define ldd		d_debug
+#define ld_un		d_un
+#define ld_2		d_sdt
+
+#endif /* nm-obsd.h */
diff --git a/gdb/config/i386/nm-ptx4.h b/gdb/config/i386/nm-ptx4.h
new file mode 100644
index 00000000000..32b76d24256
--- /dev/null
+++ b/gdb/config/i386/nm-ptx4.h
@@ -0,0 +1,66 @@
+/* Definitions to make GDB run on a Sequent Symmetry under ptx
+   with Weitek 1167 and i387 support.
+   Copyright 1986, 1987, 1989, 1992, 1994, 1996, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+#include "nm-sysv4.h"
+
+#undef USE_PROC_FS
+
+#include "nm-symmetry.h"
+
+#define PTRACE_READ_REGS(pid,regaddr) mptrace (XPT_RREGS, (pid), (regaddr), 0)
+#define PTRACE_WRITE_REGS(pid,regaddr) \
+  mptrace (XPT_WREGS, (pid), (regaddr), 0)
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* We must fetch all the regs before storing, since we store all at once.  */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+#define CHILD_WAIT
+struct target_waitstatus;
+extern ptid_t child_wait (ptid_t, struct target_waitstatus *);
+
+/*
+ * ptx does attach as of ptx version 2.1.  Prior to that, the interface
+ * exists but does not work.
+ *
+ * FIXME: Using attach/detach requires using the ptx MPDEBUGGER
+ * interface.  There are still problems with that, so for now don't
+ * enable attach/detach.  If you turn it on anyway, it will mostly
+ * work, but has a number of bugs. -fubar, 2/94.
+ */
+/*#define ATTACH_DETACH 1 */
+#undef ATTACH_DETACH
+#define PTRACE_ATTACH XPT_DEBUG
+#define PTRACE_DETACH XPT_UNDEBUG
+/*
+ * The following drivel is needed because there are two ptrace-ish
+ * calls on ptx: ptrace() and mptrace(), each of which does about half
+ * of the ptrace functions.
+ */
+#define PTRACE_ATTACH_CALL(pid)  ptx_do_attach(pid)
+#define PTRACE_DETACH_CALL(pid, signo) ptx_do_detach(pid, signo)
diff --git a/gdb/config/i386/nm-symmetry.h b/gdb/config/i386/nm-symmetry.h
new file mode 100644
index 00000000000..a589a3de0d5
--- /dev/null
+++ b/gdb/config/i386/nm-symmetry.h
@@ -0,0 +1,50 @@
+/* Definitions to make GDB run on a Sequent Symmetry under dynix 3.0,
+   with Weitek 1167 and i387 support.
+   Copyright 1986, 1987, 1989, 1992, 1994, 1996, 1998, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* We must fetch all the regs before storing, since we store all at once.  */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+#ifdef _SEQUENT_
+#define CHILD_WAIT
+extern ptid_t child_wait (ptid_t, struct target_waitstatus *);
+#endif
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+
+#ifdef _SEQUENT_
+#include <sys/param.h>
+#include <sys/user.h>
+#include <sys/mc_vmparam.h>
+/* VA_UAREA is defined in <sys/mc_vmparam.h>, and is dependant upon 
+   sizeof(struct user) */
+#define KERNEL_U_ADDR (VA_UAREA)	/* ptx */
+#else
+#define KERNEL_U_ADDR (0x80000000 - (UPAGES * NBPG))	/* dynix */
+#endif
diff --git a/gdb/config/i386/nm-x86-64.h b/gdb/config/i386/nm-x86-64.h
new file mode 100644
index 00000000000..30e37310222
--- /dev/null
+++ b/gdb/config/i386/nm-x86-64.h
@@ -0,0 +1,90 @@
+/* Native support for GNU/Linux x86-64.
+
+   Copyright 2001, 2002 Free Software Foundation, Inc.  Contributed by
+   Jiri Smid, SuSE Labs.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_X86_64_H
+#define NM_X86_64_H
+
+#include "nm-linux.h"
+
+#define I386_USE_GENERIC_WATCHPOINTS
+#include "i386/nm-i386.h"
+
+/* Support for 8-byte wide hw watchpoints.  */
+#define TARGET_HAS_DR_LEN_8 1
+
+/* Provide access to the i386 hardware debugging registers.  */
+
+extern void x86_64_linux_dr_set_control (unsigned long control);
+#define I386_DR_LOW_SET_CONTROL(control) \
+  x86_64_linux_dr_set_control (control)
+
+extern void x86_64_linux_dr_set_addr (int regnum, CORE_ADDR addr);
+#define I386_DR_LOW_SET_ADDR(regnum, addr) \
+  x86_64_linux_dr_set_addr (regnum, addr)
+
+extern void x86_64_linux_dr_reset_addr (int regnum);
+#define I386_DR_LOW_RESET_ADDR(regnum) \
+  x86_64_linux_dr_reset_addr (regnum)
+
+extern unsigned long x86_64_linux_dr_get_status (void);
+#define I386_DR_LOW_GET_STATUS() \
+  x86_64_linux_dr_get_status ()
+
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+	(addr) = x86_64_register_u_addr ((blockend),(regno));
+CORE_ADDR x86_64_register_u_addr (CORE_ADDR, int);
+
+/* Return the size of the user struct.  */
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size (void);
+
+/* Offset of the registers within the user area.  */
+#define U_REGS_OFFSET 0
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+#define KERNEL_U_ADDR 0x0
+
+#define PTRACE_ARG3_TYPE void*
+#define PTRACE_XFER_TYPE unsigned long
+
+
+/* We define this if link.h is available, because with ELF we use SVR4 style
+   shared libraries. */
+
+#ifdef HAVE_LINK_H
+#define SVR4_SHARED_LIBS
+#include "solib.h"		/* Support for shared libraries. */
+#endif
+
+/* Override copies of {fetch,store}_inferior_registers in `infptrace.c'.  */
+#define FETCH_INFERIOR_REGISTERS
+
+#undef PREPARE_TO_PROCEED
+
+#include <signal.h>
+
+extern void lin_thread_get_thread_signals (sigset_t * mask);
+#define GET_THREAD_SIGNALS(mask) lin_thread_get_thread_signals (mask)
+
+#endif /* NM_X86_64.h */
diff --git a/gdb/config/i386/obsd.mh b/gdb/config/i386/obsd.mh
new file mode 100644
index 00000000000..d9593ceb846
--- /dev/null
+++ b/gdb/config/i386/obsd.mh
@@ -0,0 +1,7 @@
+# Host: Intel 386 running OpenBSD
+
+XM_FILE= xm-i386.h
+
+NAT_FILE= nm-obsd.h
+# NOTE: Do not spread NATDEPFILES over several lines - it hurts BSD make.
+NATDEPFILES= fork-child.o infptrace.o inftarg.o solib.o solib-sunos.o corelow.o core-aout.o i386-nat.o i386bsd-nat.o
diff --git a/gdb/config/i386/obsd.mt b/gdb/config/i386/obsd.mt
new file mode 100644
index 00000000000..5c96426b96d
--- /dev/null
+++ b/gdb/config/i386/obsd.mt
@@ -0,0 +1,3 @@
+# Target: Intel 386 running OpenBSD
+TDEPFILES= i386-tdep.o i387-tdep.o i386bsd-tdep.o
+TM_FILE= tm-obsd.h
diff --git a/gdb/config/i386/ptx.mh b/gdb/config/i386/ptx.mh
new file mode 100644
index 00000000000..554b4119c76
--- /dev/null
+++ b/gdb/config/i386/ptx.mh
@@ -0,0 +1,7 @@
+# Host: Sequent Symmetry running ptx 1.3, with Weitek 1167 or i387
+
+XM_FILE= xm-ptx.h
+NATDEPFILES= inftarg.o fork-child.o symm-nat.o corelow.o core-aout.o
+XM_CLIBS= -lPW -lseq
+
+NAT_FILE= nm-symmetry.h
diff --git a/gdb/config/i386/ptx.mt b/gdb/config/i386/ptx.mt
new file mode 100644
index 00000000000..757df3328fc
--- /dev/null
+++ b/gdb/config/i386/ptx.mt
@@ -0,0 +1,3 @@
+# Target: Sequent Symmetry running ptx 2.0, with Weitek 1167 or i387.
+TDEPFILES= symm-tdep.o i387-tdep.o i386-tdep.o
+TM_FILE= tm-ptx.h
diff --git a/gdb/config/i386/ptx4.mh b/gdb/config/i386/ptx4.mh
new file mode 100644
index 00000000000..e4aa55e88a0
--- /dev/null
+++ b/gdb/config/i386/ptx4.mh
@@ -0,0 +1,8 @@
+# Host: Sequent Symmetry running ptx 1.3, with Weitek 1167 or i387
+
+XM_FILE= xm-ptx4.h
+NATDEPFILES= inftarg.o fork-child.o symm-nat.o corelow.o core-aout.o \
+	core-regset.o solib.o solib-svr4.o solib-legacy.o
+XM_CLIBS= -lseq
+
+NAT_FILE= nm-ptx4.h
diff --git a/gdb/config/i386/ptx4.mt b/gdb/config/i386/ptx4.mt
new file mode 100644
index 00000000000..f3478091996
--- /dev/null
+++ b/gdb/config/i386/ptx4.mt
@@ -0,0 +1,3 @@
+# Target: Sequent Symmetry running ptx 4.0, with Weitek 1167 or i387.
+TDEPFILES= symm-tdep.o i387-tdep.o i386-tdep.o
+TM_FILE= tm-ptx4.h
diff --git a/gdb/config/i386/symmetry.mh b/gdb/config/i386/symmetry.mh
new file mode 100644
index 00000000000..486a2fbe170
--- /dev/null
+++ b/gdb/config/i386/symmetry.mh
@@ -0,0 +1,4 @@
+# Host: Sequent Symmetry running Dynix 3.0, with Weitek 1167 or i387.
+XM_FILE= xm-symmetry.h
+NAT_FILE= nm-symmetry.h
+NATDEPFILES= inftarg.o fork-child.o corelow.o core-aout.o symm-nat.o
diff --git a/gdb/config/i386/symmetry.mt b/gdb/config/i386/symmetry.mt
new file mode 100644
index 00000000000..a3dba70bd82
--- /dev/null
+++ b/gdb/config/i386/symmetry.mt
@@ -0,0 +1,3 @@
+# Target: Sequent Symmetry running Dynix 3.0, with Weitek 1167 or i387.
+TDEPFILES= i386-tdep.o symm-tdep.o i387-tdep.o
+TM_FILE= tm-symmetry.h
diff --git a/gdb/config/i386/tm-cygwin.h b/gdb/config/i386/tm-cygwin.h
new file mode 100644
index 00000000000..1d49133a05b
--- /dev/null
+++ b/gdb/config/i386/tm-cygwin.h
@@ -0,0 +1,49 @@
+/* Macro definitions for i386 running under the win32 API Unix.
+   Copyright 1995, 1996, 1997, 1998, 1999, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Use SSE registers if winnt.h contains information about them.  */
+#ifdef HAVE_CONTEXT_EXTENDED_REGISTERS
+#define HAVE_SSE_REGS
+#else
+#undef HAVE_SSE_REGS
+#endif /* CONTEXT_EXTENDED_REGISTERS */
+#define HAVE_I387_REGS
+
+#include "i386/tm-i386.h"
+
+#if 0
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) skip_trampoline_code (pc, name)
+#define SKIP_TRAMPOLINE_CODE(pc)           skip_trampoline_code (pc, 0)
+extern CORE_ADDR skip_trampoline_code (CORE_ADDR pc, char *name);
+#endif
+
+#define ATTACH_NO_WAIT
+#define SOLIB_ADD(filename, from_tty, targ, readsyms) child_solib_add(filename, from_tty, targ, readsyms)
+#define SOLIB_LOADED_LIBRARY_PATHNAME(pid) child_solib_loaded_library_pathname(pid)
+#define CLEAR_SOLIB child_clear_solibs
+#define ADD_SHARED_SYMBOL_FILES dll_symbol_command
+
+struct target_ops;
+char *cygwin_pid_to_str (ptid_t ptid);
+void child_solib_add (char *, int, struct target_ops *, int);
+char *child_solib_loaded_library_pathname(int);
+void child_clear_solibs (void);
+void dll_symbol_command (char *, int);
diff --git a/gdb/config/i386/tm-fbsd.h b/gdb/config/i386/tm-fbsd.h
new file mode 100644
index 00000000000..61f5de57f4a
--- /dev/null
+++ b/gdb/config/i386/tm-fbsd.h
@@ -0,0 +1,89 @@
+/* Target-dependent definitions for FreeBSD/i386.
+   Copyright 1997, 1999, 2000, 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_FBSD_H
+#define TM_FBSD_H
+
+#define HAVE_I387_REGS
+#include "i386/tm-i386.h"
+
+/* FreeBSD/ELF uses stabs-in-ELF with the DWARF register numbering
+   scheme by default, so we must redefine STAB_REG_TO_REGNUM.  This
+   messes up the floating-point registers for a.out, but there is not
+   much we can do about that.  */
+
+#undef STAB_REG_TO_REGNUM
+#define STAB_REG_TO_REGNUM(reg) i386_dwarf_reg_to_regnum ((reg))
+
+/* FreeBSD uses the old gcc convention for struct returns.  */
+
+#define USE_STRUCT_CONVENTION(gcc_p, type) \
+  generic_use_struct_convention (1, type)
+
+
+/* Support for longjmp.  */
+
+/* Details about jmp_buf.  It's supposed to be an array of integers.  */
+
+#define JB_ELEMENT_SIZE 4	/* Size of elements in jmp_buf.  */
+#define JB_PC		0	/* Array index of saved PC.  */
+
+/* Figure out where the longjmp will land.  Store the address that
+   longjmp will jump to in *ADDR, and return non-zero if successful.  */
+
+#define GET_LONGJMP_TARGET(addr) get_longjmp_target (addr)
+extern int get_longjmp_target (CORE_ADDR *addr);
+
+
+/* Support for signal handlers.  */
+
+#define IN_SIGTRAMP(pc, name) i386bsd_in_sigtramp (pc, name)
+extern int i386bsd_in_sigtramp (CORE_ADDR pc, char *name);
+
+/* These defines allow the recognition of sigtramps as a function name
+   <sigtramp>.
+
+   FIXME: kettenis/2001-07-13: These should be added to the target
+   vector and turned into functions when we go "multi-arch".  */
+
+#define SIGTRAMP_START(pc) i386bsd_sigtramp_start
+#define SIGTRAMP_END(pc) i386bsd_sigtramp_end
+extern CORE_ADDR i386bsd_sigtramp_start;
+extern CORE_ADDR i386bsd_sigtramp_end;
+
+/* Override FRAME_SAVED_PC to enable the recognition of signal handlers.  */
+
+#undef FRAME_SAVED_PC
+#define FRAME_SAVED_PC(frame) i386bsd_frame_saved_pc (frame)
+extern CORE_ADDR i386bsd_frame_saved_pc (struct frame_info *frame);
+
+
+/* Shared library support.  */
+
+#ifndef SVR4_SHARED_LIBS
+
+/* Return non-zero if we are in a shared library trampoline code stub.  */
+
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) \
+  (name && !strcmp(name, "_DYNAMIC"))
+
+#endif /* !SVR4_SHARED_LIBS */
+
+#endif /* TM_FBSD_H */
diff --git a/gdb/config/i386/tm-go32.h b/gdb/config/i386/tm-go32.h
new file mode 100644
index 00000000000..b660827bd66
--- /dev/null
+++ b/gdb/config/i386/tm-go32.h
@@ -0,0 +1,68 @@
+/* Target-dependent definitions for Intel x86 running DJGPP.
+   Copyright 1995, 1996, 1997, 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_GO32_H
+#define TM_GO32_H
+
+#undef HAVE_SSE_REGS	/* FIXME! go32-nat.c needs to support XMMi registers */
+#define HAVE_I387_REGS
+
+#include "i386/tm-i386.h"
+
+/* FRAME_CHAIN takes a frame's nominal address and produces the frame's
+   chain-pointer.
+   In the case of the i386, the frame's nominal address
+   is the address of a 4-byte word containing the calling frame's address.
+   DJGPP doesn't have any special frames for signal handlers, they are
+   just normal C functions. */
+#undef  FRAME_CHAIN
+#define FRAME_CHAIN(thisframe) \
+  (!inside_entry_file ((thisframe)->pc) ? \
+   read_memory_integer ((thisframe)->frame, 4) :\
+   0)
+
+/* A macro that tells us whether the function invocation represented
+   by FI does not have a frame on the stack associated with it.  If it
+   does not, FRAMELESS is set to 1, else 0.  */
+#undef  FRAMELESS_FUNCTION_INVOCATION
+#define FRAMELESS_FUNCTION_INVOCATION(FI) \
+     (frameless_look_for_prologue(FI))
+
+extern CORE_ADDR i386go32_frame_saved_pc (struct frame_info *frame);
+#undef  FRAME_SAVED_PC
+#define FRAME_SAVED_PC(FRAME) (i386go32_frame_saved_pc ((FRAME)))
+
+/* Support for longjmp.  */
+
+/* Details about jmp_buf.  It's supposed to be an array of integers.  */
+
+#define JB_ELEMENT_SIZE 4	/* Size of elements in jmp_buf.  */
+#define JB_PC		8	/* Array index of saved PC inside jmp_buf.  */
+
+/* Figure out where the longjmp will land.  Slurp the args out of the
+   stack.  We expect the first arg to be a pointer to the jmp_buf
+   structure from which we extract the pc (JB_PC) that we will land
+   at.  The pc is copied into ADDR.  This routine returns true on
+   success.  */
+
+#define GET_LONGJMP_TARGET(addr) get_longjmp_target (addr)
+extern int get_longjmp_target (CORE_ADDR *addr);
+
+#endif /* TM_GO32_H */
diff --git a/gdb/config/i386/tm-i386.h b/gdb/config/i386/tm-i386.h
new file mode 100644
index 00000000000..f9326fecb9a
--- /dev/null
+++ b/gdb/config/i386/tm-i386.h
@@ -0,0 +1,379 @@
+/* Macro definitions for GDB on an Intel i[345]86.
+   Copyright 1995, 1996, 1998, 1999, 2000, 2001
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_I386_H
+#define TM_I386_H 1
+
+#define GDB_MULTI_ARCH GDB_MULTI_ARCH_PARTIAL
+
+#include "regcache.h"
+
+/* Forward declarations for prototypes.  */
+struct frame_info;
+struct frame_saved_regs;
+struct value;
+struct type;
+
+/* The format used for `long double' on almost all i386 targets is the
+   i387 extended floating-point format.  In fact, of all targets in the
+   GCC 2.95 tree, only OSF/1 does it different, and insists on having
+   a `long double' that's not `long' at all.  */
+
+#define TARGET_LONG_DOUBLE_FORMAT &floatformat_i387_ext
+
+/* Although the i386 extended floating-point has only 80 significant
+   bits, a `long double' actually takes up 96, probably to enforce
+   alignment.  */
+
+#define TARGET_LONG_DOUBLE_BIT 96
+
+/* Number of traps that happen between exec'ing the shell to run an
+   inferior, and when we finally get to the inferior code.  This is 2
+   on most implementations. */
+
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions to reach some
+   "real" code.  */
+
+#define SKIP_PROLOGUE(frompc)   (i386_skip_prologue (frompc))
+
+extern int i386_skip_prologue (int);
+
+/* Immediately after a function call, return the saved pc.  */
+
+#define SAVED_PC_AFTER_CALL(frame) i386_saved_pc_after_call (frame)
+extern CORE_ADDR i386_saved_pc_after_call (struct frame_info *frame);
+
+/* Stack grows downward.  */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Sequence of bytes for breakpoint instruction.  */
+
+#define BREAKPOINT {0xcc}
+
+/* Amount PC must be decremented by after a breakpoint.  This is often the
+   number of bytes in BREAKPOINT but not always. */
+
+#define DECR_PC_AFTER_BREAK 1
+
+/* Say how long (ordinary) registers are.  This is a piece of bogosity
+   used in push_word and a few other places; REGISTER_RAW_SIZE is the
+   real way to know how big a register is.  */
+
+#define REGISTER_SIZE 4
+
+/* This register file is parameterized by two macros:
+   HAVE_I387_REGS --- register file should include i387 registers
+   HAVE_SSE_REGS  --- register file should include SSE registers
+   If HAVE_SSE_REGS is #defined, then HAVE_I387_REGS must also be #defined.
+   
+   However, GDB code should not test those macros with #ifdef, since
+   that makes code which is annoying to multi-arch.  Instead, GDB code
+   should check the values of NUM_GREGS, NUM_FREGS, and NUM_SSE_REGS,
+   which will eventually get mapped onto architecture vector entries.
+
+   It's okay to use the macros in tm-*.h files, though, since those
+   files will get completely replaced when we multi-arch anyway.  */
+
+/* Number of general registers, present on every 32-bit x86 variant.  */
+#define NUM_GREGS (16)
+
+/* Number of floating-point unit registers.  */
+#ifdef HAVE_I387_REGS
+#define NUM_FREGS (16)
+#else
+#define NUM_FREGS (0)
+#endif
+
+/* Number of SSE registers.  */
+#ifdef HAVE_SSE_REGS
+#define NUM_SSE_REGS (9)
+#else
+#define NUM_SSE_REGS (0)
+#endif
+
+/* Largest number of registers we could have in any configuration.  */
+#define MAX_NUM_REGS (16 + 16 + 9)
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define FP_REGNUM 5		/* (ebp) Contains address of executing stack
+				   frame */
+#define SP_REGNUM 4		/* (usp) Contains address of top of stack */
+#define PC_REGNUM 8		/* (eip) Contains program counter */
+#define PS_REGNUM 9		/* (ps)  Contains processor status */
+
+/* First FPU data register.  */
+#ifdef HAVE_I387_REGS
+#define FP0_REGNUM 16
+#else
+#define FP0_REGNUM 0
+#endif
+
+/* Return the name of register REG.  */
+
+#define REGISTER_NAME(reg) i386_register_name ((reg))
+extern char *i386_register_name (int reg);
+
+/* Use the "default" register numbering scheme for stabs and COFF.  */
+
+#define STAB_REG_TO_REGNUM(reg) i386_stab_reg_to_regnum ((reg))
+#define SDB_REG_TO_REGNUM(reg) i386_stab_reg_to_regnum ((reg))
+extern int i386_stab_reg_to_regnum (int reg);
+
+/* Use the DWARF register numbering scheme for DWARF and DWARF 2.  */
+
+#define DWARF_REG_TO_REGNUM(reg) i386_dwarf_reg_to_regnum ((reg))
+#define DWARF2_REG_TO_REGNUM(reg) i386_dwarf_reg_to_regnum ((reg))
+extern int i386_dwarf_reg_to_regnum (int reg);
+
+/* We don't define ECOFF_REG_TO_REGNUM, since ECOFF doesn't seem to be
+   in use on any of the supported i386 targets.  */
+
+
+/* Sizes of individual register sets.  These cover the entire register
+   file, so summing up the sizes of those portions actually present
+   yields REGISTER_BYTES.  */
+#define SIZEOF_GREGS (NUM_GREGS * 4)
+#define SIZEOF_FPU_REGS (8 * 10)
+#define SIZEOF_FPU_CTRL_REGS (8 * 4)
+#define SIZEOF_SSE_REGS (8 * 16 + 4)
+
+
+/* Total amount of space needed to store our copies of the machine's register
+   state, the array `registers'. */
+#ifdef HAVE_SSE_REGS
+#define REGISTER_BYTES \
+  (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS)
+#else
+#ifdef HAVE_I387_REGS
+#define REGISTER_BYTES (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS)
+#else
+#define REGISTER_BYTES (SIZEOF_GREGS)
+#endif
+#endif
+
+/* Return the offset into the register array of the start of register
+   number REG.  */
+#define REGISTER_BYTE(reg) i386_register_byte ((reg))
+extern int i386_register_byte (int reg);
+
+/* Return the number of bytes of storage in GDB's register array
+   occupied by register REG.  */
+#define REGISTER_RAW_SIZE(reg) i386_register_raw_size ((reg))
+extern int i386_register_raw_size (int reg);
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+#define MAX_REGISTER_RAW_SIZE 16
+
+/* Return the size in bytes of the virtual type of register REG.  */
+#define REGISTER_VIRTUAL_SIZE(reg) i386_register_virtual_size ((reg))
+extern int i386_register_virtual_size (int reg);
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+#define MAX_REGISTER_VIRTUAL_SIZE 16
+
+/* Return the GDB type object for the "standard" data type of data in
+   register REGNUM.  */
+
+#define REGISTER_VIRTUAL_TYPE(regnum) i386_register_virtual_type (regnum)
+extern struct type *i386_register_virtual_type (int regnum);
+
+/* Return true iff register REGNUM's virtual format is different from
+   its raw format.  */
+
+#define REGISTER_CONVERTIBLE(regnum) i386_register_convertible (regnum)
+extern int i386_register_convertible (int regnum);
+
+/* Convert data from raw format for register REGNUM in buffer FROM to
+   virtual format with type TYPE in buffer TO.  */
+
+#define REGISTER_CONVERT_TO_VIRTUAL(regnum, type, from, to) \
+  i386_register_convert_to_virtual ((regnum), (type), (from), (to))
+extern void i386_register_convert_to_virtual (int regnum, struct type *type,
+					      char *from, char *to);
+
+/* Convert data from virtual format with type TYPE in buffer FROM to
+   raw format for register REGNUM in buffer TO.  */
+
+#define REGISTER_CONVERT_TO_RAW(type, regnum, from, to) \
+  i386_register_convert_to_raw ((type), (regnum), (from), (to))
+extern void i386_register_convert_to_raw (struct type *type, int regnum,
+					  char *from, char *to);
+
+/* Print out the i387 floating point state.  */
+#ifdef HAVE_I387_REGS
+extern void i387_float_info (void);
+#define FLOAT_INFO { i387_float_info (); }
+#endif
+
+
+#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
+  i386_push_arguments ((nargs), (args), (sp), (struct_return), (struct_addr))
+extern CORE_ADDR i386_push_arguments (int nargs, struct value **args,
+				      CORE_ADDR sp, int struct_return,
+				      CORE_ADDR struct_addr);
+
+/* Store the address of the place in which to copy the structure the
+   subroutine will return.  This is called from call_function.  */
+
+#define STORE_STRUCT_RETURN(addr, sp) \
+  i386_store_struct_return ((addr), (sp))
+extern void i386_store_struct_return (CORE_ADDR addr, CORE_ADDR sp);
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  */
+
+#define EXTRACT_RETURN_VALUE(type, regbuf, valbuf) \
+  i386_extract_return_value ((type), (regbuf), (valbuf))
+extern void i386_extract_return_value (struct type *type, char *regbuf,
+				       char *valbuf);
+
+/* Write into the appropriate registers a function return value stored
+   in VALBUF of type TYPE, given in virtual format.  */
+
+#define STORE_RETURN_VALUE(type, valbuf) \
+  i386_store_return_value ((type), (valbuf))
+extern void i386_store_return_value (struct type *type, char *valbuf);
+
+/* Extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR.  */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(regbuf) \
+  i386_extract_struct_value_address ((regbuf))
+extern CORE_ADDR i386_extract_struct_value_address (char *regbuf);
+
+/* The following redefines make backtracing through sigtramp work.
+   They manufacture a fake sigtramp frame and obtain the saved pc in sigtramp
+   from the sigcontext structure which is pushed by the kernel on the
+   user stack, along with a pointer to it.  */
+
+/* Return the chain-pointer for FRAME.  In the case of the i386, the
+   frame's nominal address is the address of a 4-byte word containing
+   the calling frame's address.  */
+
+#define FRAME_CHAIN(frame) i386_frame_chain ((frame))
+extern CORE_ADDR i386_frame_chain (struct frame_info *frame);
+
+/* Determine whether the function invocation represented by FRAME does
+   not have a from on the stack associated with it.  If it does not,
+   return non-zero, otherwise return zero.  */
+
+#define FRAMELESS_FUNCTION_INVOCATION(frame) \
+  i386_frameless_function_invocation (frame)
+extern int i386_frameless_function_invocation (struct frame_info *frame);
+
+/* Return the saved program counter for FRAME.  */
+
+#define FRAME_SAVED_PC(frame) i386_frame_saved_pc (frame)
+extern CORE_ADDR i386_frame_saved_pc (struct frame_info *frame);
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Return number of args passed to a frame.  Can return -1, meaning no way
+   to tell, which is typical now that the C compiler delays popping them.  */
+
+#define FRAME_NUM_ARGS(fi) (i386_frame_num_args(fi))
+
+extern int i386_frame_num_args (struct frame_info *);
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#define FRAME_ARGS_SKIP 8
+
+/* Put here the code to store, into a struct frame_saved_regs,
+   the addresses of the saved registers of frame described by FRAME_INFO.
+   This includes special registers such as pc and fp saved in special
+   ways in the stack frame.  sp is even more special:
+   the address we return for it IS the sp for the next frame.  */
+
+extern void i386_frame_init_saved_regs (struct frame_info *);
+#define FRAME_INIT_SAVED_REGS(FI) i386_frame_init_saved_regs (FI)
+
+
+
+/* Things needed for making the inferior call functions.  */
+
+/* "An argument's size is increased, if necessary, to make it a
+   multiple of [32 bit] words.  This may require tail padding,
+   depending on the size of the argument" - from the x86 ABI.  */
+#define PARM_BOUNDARY 32
+
+/* Push an empty stack frame, to record the current PC, etc.  */
+
+#define PUSH_DUMMY_FRAME { i386_push_dummy_frame (); }
+
+extern void i386_push_dummy_frame (void);
+
+/* Discard from the stack the innermost frame, restoring all registers.  */
+
+#define POP_FRAME  { i386_pop_frame (); }
+
+extern void i386_pop_frame (void);
+
+
+/* this is 
+ *   call 11223344 (32 bit relative)
+ *   int3
+ */
+
+#define CALL_DUMMY { 0x223344e8, 0xcc11 }
+
+#define CALL_DUMMY_LENGTH 8
+
+#define CALL_DUMMY_START_OFFSET 0	/* Start execution at beginning of dummy */
+
+#define CALL_DUMMY_BREAKPOINT_OFFSET 5
+
+/* Insert the specified number of args and function address
+   into a call sequence of the above form stored at DUMMYNAME.  */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+  i386_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
+extern void i386_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
+				 int nargs, struct value **args,
+				 struct type *type, int gcc_p);
+
+/* FIXME: kettenis/2000-06-12: These do not belong here.  */
+extern void print_387_control_word (unsigned int);
+extern void print_387_status_word (unsigned int);
+
+/* Offset from SP to first arg on stack at first instruction of a function */
+
+#define SP_ARG0 (1 * 4)
+
+#endif /* ifndef TM_I386_H */
diff --git a/gdb/config/i386/tm-i386aix.h b/gdb/config/i386/tm-i386aix.h
new file mode 100644
index 00000000000..a8f24eda035
--- /dev/null
+++ b/gdb/config/i386/tm-i386aix.h
@@ -0,0 +1,48 @@
+/* Macro defintions for IBM AIX PS/2 (i386).
+   Copyright 1986, 1987, 1989, 1992, 1993, 1994, 1995, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Changes for IBM AIX PS/2 by Minh Tran-Le (tranle@intellicorp.com).  */
+
+#ifndef TM_I386AIX_H
+#define TM_I386AIX_H 1
+
+#include "i386/tm-i386.h"
+#include <sys/reg.h>
+
+#ifndef I386
+#define I386 1
+#endif
+
+/* AIX/i386 has FPU support.  However, the native configuration (which
+   is the only supported configuration) doesn't make the FPU control
+   registers available.  Override the appropriate symbols such that
+   only the normal FPU registers are included in GDB's register array.  */
+
+#undef NUM_FPREGS
+#define NUM_FPREGS (8)
+
+#undef NUM_REGS
+#define NUM_REGS (NUM_GREGS + NUM_FPREGS)
+
+#undef REGISTER_BYTES
+#define REGISTER_BYTES (SIZEOF_GREGS + SIZEOF_FPU_REGS)
+
+#endif /* TM_I386AIX_H */
diff --git a/gdb/config/i386/tm-i386bsd.h b/gdb/config/i386/tm-i386bsd.h
new file mode 100644
index 00000000000..e2b2229efa7
--- /dev/null
+++ b/gdb/config/i386/tm-i386bsd.h
@@ -0,0 +1,45 @@
+/* Macro definitions for i386 running under BSD Unix.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_I386BSD_H
+#define TM_I386BSD_H 1
+
+#include "i386/tm-i386.h"
+
+/* 386BSD cannot handle the segment registers. */
+/* BSDI can't handle them either.  */
+
+#undef NUM_REGS
+#define NUM_REGS 10
+
+/* On 386 bsd, sigtramp is above the user stack and immediately below
+   the user area. Using constants here allows for cross debugging.
+   These are tested for BSDI but should work on 386BSD.  */
+
+#define SIGTRAMP_START(pc)	0xfdbfdfc0
+#define SIGTRAMP_END(pc)	0xfdbfe000
+
+/* Saved Pc.  Get it from sigcontext if within sigtramp.  */
+
+/* Offset to saved PC in sigcontext, from <sys/signal.h>.  */
+#define SIGCONTEXT_PC_OFFSET 20
+
+#endif /* ifndef TM_I386BSD_H */
diff --git a/gdb/config/i386/tm-i386gnu.h b/gdb/config/i386/tm-i386gnu.h
new file mode 100644
index 00000000000..00cb5a9f100
--- /dev/null
+++ b/gdb/config/i386/tm-i386gnu.h
@@ -0,0 +1,56 @@
+/* Macro definitions for i386 running the GNU Hurd.
+   Copyright 1992, 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_I386GNU_H
+#define TM_I386GNU_H 1
+
+/* Include common definitions for GNU systems.
+   FIXME: This does not belong here since this is supposed to contain
+   only native-dependent information.  */
+#include "nm-gnu.h"
+
+/* Thread flavors used in re-setting the T bit.
+   FIXME: This is native-dependent.  */
+#define THREAD_STATE_FLAVOR		i386_REGS_SEGS_STATE
+#define THREAD_STATE_SIZE		i386_THREAD_STATE_COUNT
+#define THREAD_STATE_SET_TRACED(state) \
+  	((struct i386_thread_state *)state)->efl |= 0x100
+#define THREAD_STATE_CLEAR_TRACED(state) \
+  	((((struct i386_thread_state *)state)->efl &= ~0x100), 1)
+
+/* We can attach and detach.
+   FIXME: This is probably native-dependent too.  */
+#define ATTACH_DETACH 1
+
+#define HAVE_I387_REGS
+#include "i386/tm-i386.h"
+
+/* We use stabs-in-ELF with the DWARF register numbering scheme.  */
+
+#undef STAB_REG_TO_REGNUM
+#define STAB_REG_TO_REGNUM(reg) i386_dwarf_reg_to_regnum ((reg))
+
+/* Offset to saved PC in sigcontext.  */
+#define SIGCONTEXT_PC_OFFSET 68
+
+/* We need this file for the SOLIB_TRAMPOLINE stuff.  */
+#include "tm-sysv4.h"
+
+#endif /* TM_I386GNU_H */
diff --git a/gdb/config/i386/tm-i386lynx.h b/gdb/config/i386/tm-i386lynx.h
new file mode 100644
index 00000000000..842f9a7738d
--- /dev/null
+++ b/gdb/config/i386/tm-i386lynx.h
@@ -0,0 +1,34 @@
+/* Macro definitions for Intel 386 running under LynxOS.
+   Copyright 1993, 1995 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_I386LYNX_H
+#define TM_I386LYNX_H
+
+#include "tm-lynx.h"
+
+/* Most definitions from sysv could be used. */
+#include "i386/tm-i386.h"
+
+#undef SAVED_PC_AFTER_CALL
+
+#define SAVED_PC_AFTER_CALL i386lynx_saved_pc_after_call
+CORE_ADDR i386lynx_saved_pc_after_call ();
+
+#endif /* TM_I386LYNX_H */
diff --git a/gdb/config/i386/tm-i386m3.h b/gdb/config/i386/tm-i386m3.h
new file mode 100644
index 00000000000..edc301da446
--- /dev/null
+++ b/gdb/config/i386/tm-i386m3.h
@@ -0,0 +1,56 @@
+/* Macro definitions for i386, Mach 3.0
+   Copyright 1992, 1993, 1995, 1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Include common definitions for Mach3 systems */
+#include "nm-m3.h"
+
+/* Define offsets to access CPROC stack when it does not have
+ * a kernel thread.
+ */
+#define MACHINE_CPROC_SP_OFFSET 20
+#define MACHINE_CPROC_PC_OFFSET 16
+#define MACHINE_CPROC_FP_OFFSET 12
+
+/* Thread flavors used in re-setting the T bit.
+ * @@ this is also bad for cross debugging.
+ */
+#define TRACE_FLAVOR		i386_THREAD_STATE
+#define TRACE_FLAVOR_SIZE	i386_THREAD_STATE_COUNT
+#define TRACE_SET(x,state) \
+  	((struct i386_thread_state *)state)->efl |= 0x100
+#define TRACE_CLEAR(x,state) \
+  	((((struct i386_thread_state *)state)->efl &= ~0x100), 1)
+
+/* we can do it */
+#define ATTACH_DETACH 1
+
+/* Sigh. There should be a file for i386 but no sysv stuff in it */
+#include "i386/tm-i386.h"
+
+/* I want to test this float info code. See comment in tm-i386v.h */
+#undef FLOAT_INFO
+#define FLOAT_INFO { i386_mach3_float_info (); }
+
+/* Address of end of stack space.
+ * for MACH, see <machine/vmparam.h>
+ * @@@ I don't know what is in the 5 ints...
+ */
+#undef  STACK_END_ADDR
+#define STACK_END_ADDR (0xc0000000-sizeof(int [5]))
diff --git a/gdb/config/i386/tm-i386mk.h b/gdb/config/i386/tm-i386mk.h
new file mode 100644
index 00000000000..e46ca55395b
--- /dev/null
+++ b/gdb/config/i386/tm-i386mk.h
@@ -0,0 +1,38 @@
+/* Macro definitions for i386, Mach 3.0, OSF 1/MK
+   Copyright 1992, 1993, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Until OSF switches to a newer Mach kernel that has
+ * a different get_emul_vector() interface.
+ */
+#define MK67 1
+
+#include "i386/tm-i386m3.h"
+
+/* FIMXE: kettenis/2000-03-26: On OSF 1, `long double' is equivalent
+   to `double'.  However, I'm not sure what is the consequence of:
+
+   #define TARGET_LONG_DOUBLE_FORMAT TARGET_DOUBLE_FORMAT
+   #define TARGET_LONG_DOUBLE_BIT TARGET_DOUBLE_BIT
+
+   So I'll go with the current status quo instead.  It looks like this
+   target won't compile anyway.  Perhaps it should be obsoleted?  */
+   
+#undef TARGET_LONG_DOUBLE_FORMAT
+#undef TARGET_LONG_DOUBLE_BIT
diff --git a/gdb/config/i386/tm-i386nw.h b/gdb/config/i386/tm-i386nw.h
new file mode 100644
index 00000000000..9ede2c040e0
--- /dev/null
+++ b/gdb/config/i386/tm-i386nw.h
@@ -0,0 +1,49 @@
+/* Macro definitions for i386 running NetWare.
+   Copyright 1993, 1994, 1995, 1998, 1999, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_I386NW_H
+#define TM_I386NW_H 1
+
+#include "i386/tm-i386.h"
+
+/* Stop backtracing when we wander into main.  */
+
+#define FRAME_CHAIN_VALID(fp,fi) func_frame_chain_valid (fp, fi)
+
+
+/* Offsets (in target ints) into jmp_buf.  Not defined in any system header
+   file, so we have to step through setjmp/longjmp with a debugger and figure
+   them out.  */
+
+#define JB_ELEMENT_SIZE 4	/* jmp_buf[] is array of ints */
+
+#define JB_PC	6		/* Setjmp()'s return PC saved here */
+
+/* Figure out where the longjmp will land.  Slurp the args out of the stack.
+   We expect the first arg to be a pointer to the jmp_buf structure from which
+   we extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int get_longjmp_target (CORE_ADDR *);
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+
+#endif /* ifndef TM_I386NW_H */
diff --git a/gdb/config/i386/tm-i386os9k.h b/gdb/config/i386/tm-i386os9k.h
new file mode 100644
index 00000000000..78fbc21a7c6
--- /dev/null
+++ b/gdb/config/i386/tm-i386os9k.h
@@ -0,0 +1,65 @@
+/* Macro definitions for i386 running under BSD Unix.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996
+   Free Software Foundation, Inc.
+
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_I386OS9K_H
+#define TM_I386OS9K_H 1
+
+#include "i386/tm-i386.h"
+
+/* Number of machine registers */
+
+#undef  NUM_REGS
+#define NUM_REGS (16)		/* Basic i*86 regs */
+
+/* Initializer for an array of names of registers.  There should be at least
+   NUM_REGS strings in this initializer.  Any excess ones are simply ignored.
+   The order of the first 8 registers must match the compiler's numbering
+   scheme (which is the same as the 386 scheme) and also regmap in the various
+   *-nat.c files. */
+
+#undef REGISTER_NAME
+#define REGISTER_NAMES { "eax", "ecx", "edx", "ebx", \
+                         "esp", "ebp", "esi", "edi", \
+                         "eip", "eflags", "cs", "ss", \
+                         "ds", "es", "fs", "gs", \
+                         }
+
+#define DATABASE_REG 	3	/* ebx */
+
+/* Amount PC must be decremented by after a breakpoint.  This is often the
+   number of bytes in BREAKPOINT but not always (such as now). */
+
+#undef DECR_PC_AFTER_BREAK
+#define DECR_PC_AFTER_BREAK 0
+
+/* On 386 bsd, sigtramp is above the user stack and immediately below
+   the user area. Using constants here allows for cross debugging.
+   These are tested for BSDI but should work on 386BSD.  */
+#define SIGTRAMP_START(pc)	0xfdbfdfc0
+#define SIGTRAMP_END(pc)	0xfdbfe000
+
+/* Saved Pc.  Get it from sigcontext if within sigtramp.  */
+
+/* Offset to saved PC in sigcontext, from <sys/signal.h>.  */
+#define SIGCONTEXT_PC_OFFSET 20
+
+#define BELIEVE_PCC_PROMOTION 1
+
+#endif /* #ifndef TM_I386OS9K_H */
diff --git a/gdb/config/i386/tm-i386sco5.h b/gdb/config/i386/tm-i386sco5.h
new file mode 100644
index 00000000000..e4cb014e990
--- /dev/null
+++ b/gdb/config/i386/tm-i386sco5.h
@@ -0,0 +1,63 @@
+/* Macro definitions for GDB on an Intel i386 running SCO Open Server 5.
+   Copyright 1998 Free Software Foundation, Inc.
+   Written by J. Kean Johnston (jkj@sco.com).
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_I386SCO5_H
+#define TM_I386SCO5_H 1
+
+/* Pick up most of what we need from the generic i386 target include file. */
+
+#include "i386/tm-i386.h"
+
+/* Pick up more stuff from the generic SYSV and SVR4 host include files. */
+#include "i386/tm-i386v.h"
+#include "tm-sysv4.h"
+
+#define KERNEL_U_SIZE kernel_u_size()
+
+/*
+ * SCO is unlike other SVR3 targets in that it has SVR4 style shared
+ * libs, with a slight twist. We expect 3 traps (2 for the exec and
+ * one for the dynamic loader).  After the third trap we insert the
+ * SOLIB breakpoints, then wait for the 4th trap.
+ */
+#undef START_INFERIOR_TRAPS_EXPECTED
+#define START_INFERIOR_TRAPS_EXPECTED 3
+
+/* We can also do hardware watchpoints */
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) 1
+
+/* After a watchpoint trap, the PC points to the instruction which
+   caused the trap.  But we can continue over it without disabling the
+   trap. */
+#define HAVE_CONTINUABLE_WATCHPOINT
+#define HAVE_STEPPABLE_WATCHPOINT
+
+#define STOPPED_BY_WATCHPOINT(W)  \
+  i386_stopped_by_watchpoint (PIDGET (inferior_ptid))
+
+#define target_insert_watchpoint(addr, len, type)  \
+  i386_insert_watchpoint (PIDGET (inferior_ptid), addr, len, type)
+
+#define target_remove_watchpoint(addr, len, type)  \
+  i386_remove_watchpoint (PIDGET (inferior_ptid), addr, len)
+
+#endif /* ifndef TM_I386SCO5_H */
diff --git a/gdb/config/i386/tm-i386sol2.h b/gdb/config/i386/tm-i386sol2.h
new file mode 100644
index 00000000000..c90e0d475ae
--- /dev/null
+++ b/gdb/config/i386/tm-i386sol2.h
@@ -0,0 +1,59 @@
+/* Macro definitions for GDB on an Intel i386 running Solaris 2.
+   Copyright 1998, 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_I386SOL2_H
+#define TM_I386SOL2_H 1
+
+#define HAVE_I387_REGS
+#include "i386/tm-i386v4.h"
+
+/* We use stabs-in-ELF with the DWARF register numbering scheme.  */
+
+#undef STAB_REG_TO_REGNUM
+#define STAB_REG_TO_REGNUM(reg) i386_dwarf_reg_to_regnum ((reg))
+
+/* If the current gcc for for this target does not produce correct
+   debugging information for float parameters, both prototyped and
+   unprototyped, then define this macro.  This forces gdb to always
+   assume that floats are passed as doubles and then converted in the
+   callee. */
+
+#define COERCE_FLOAT_TO_DOUBLE(formal, actual) (1)
+
+/* Signal handler frames under Solaris 2 are recognized by a return address
+   of 0xFFFFFFFF, the third parameter on the signal handler stack is
+   a pointer to an ucontext.  */
+#undef sigtramp_saved_pc
+#undef I386V4_SIGTRAMP_SAVED_PC
+#define SIGCONTEXT_PC_OFFSET (36 + 14 * 4)
+#undef IN_SIGTRAMP
+#define IN_SIGTRAMP(pc, name) (pc == 0xFFFFFFFF)
+
+/* The SunPRO compiler puts out 0 instead of the address in N_SO symbols,
+   and for SunPRO 3.0, N_FUN symbols too.  */
+#define SOFUN_ADDRESS_MAYBE_MISSING
+
+extern char *sunpro_static_transform_name (char *);
+#define STATIC_TRANSFORM_NAME(x) sunpro_static_transform_name (x)
+#define IS_STATIC_TRANSFORM_NAME(name) ((name)[0] == '.')
+
+#define FAULTED_USE_SIGINFO
+
+#endif /* ifndef TM_I386SOL2_H */
diff --git a/gdb/config/i386/tm-i386v.h b/gdb/config/i386/tm-i386v.h
new file mode 100644
index 00000000000..d524652e247
--- /dev/null
+++ b/gdb/config/i386/tm-i386v.h
@@ -0,0 +1,36 @@
+/* Macro definitions for i386, Unix System V.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1998, 1999,
+   2000, 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_I386V_H
+#define TM_I386V_H 1
+
+/* First pick up the generic *86 target file. */
+
+#include "i386/tm-i386.h"
+
+/* Number of traps that happen between exec'ing the shell to run an
+   inferior, and when we finally get to the inferior code.  This is
+   2 on most implementations.  Override here to 4. */
+
+#undef  START_INFERIOR_TRAPS_EXPECTED
+#define START_INFERIOR_TRAPS_EXPECTED 4
+
+#endif /* ifndef TM_I386V_H */
diff --git a/gdb/config/i386/tm-i386v4.h b/gdb/config/i386/tm-i386v4.h
new file mode 100644
index 00000000000..2003b96de2e
--- /dev/null
+++ b/gdb/config/i386/tm-i386v4.h
@@ -0,0 +1,79 @@
+/* Macro definitions for GDB on an Intel i386 running SVR4.
+   Copyright 1991, 1994, 1995, 1998, 1999, 2000
+   Free Software Foundation, Inc.
+   Written by Fred Fish at Cygnus Support (fnf@cygnus.com)
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_I386V4_H
+#define TM_I386V4_H 1
+
+/* Pick up most of what we need from the generic i386 target include file. */
+#define HAVE_I387_REGS
+#include "i386/tm-i386.h"
+
+/* Pick up more stuff from the generic SVR4 host include file. */
+
+#include "tm-sysv4.h"
+
+/* Use the alternate method of determining valid frame chains. */
+
+#define FRAME_CHAIN_VALID(fp,fi) func_frame_chain_valid (fp, fi)
+
+/* Offsets (in target ints) into jmp_buf.  Not defined in any system header
+   file, so we have to step through setjmp/longjmp with a debugger and figure
+   them out.  Note that <setjmp> defines _JBLEN as 10, which is the default
+   if no specific machine is selected, even though we only use 6 slots. */
+
+#define JB_ELEMENT_SIZE sizeof(int)	/* jmp_buf[_JBLEN] is array of ints */
+
+#define JB_EBX	0
+#define JB_ESI	1
+#define JB_EDI	2
+#define JB_EBP	3
+#define JB_ESP	4
+#define JB_EDX	5
+
+#define JB_PC	JB_EDX		/* Setjmp()'s return PC saved in EDX */
+
+/* Figure out where the longjmp will land.  Slurp the args out of the stack.
+   We expect the first arg to be a pointer to the jmp_buf structure from which
+   we extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int get_longjmp_target (CORE_ADDR *);
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+
+/* The following redefines make backtracing through sigtramp work.
+   They manufacture a fake sigtramp frame and obtain the saved pc in sigtramp
+   from the ucontext structure which is pushed by the kernel on the
+   user stack. Unfortunately there are three variants of sigtramp handlers.  */
+
+#define I386V4_SIGTRAMP_SAVED_PC
+#define IN_SIGTRAMP(pc, name) ((name)					\
+			       && (STREQ ("_sigreturn", name)		\
+				   || STREQ ("_sigacthandler", name)	\
+				   || STREQ ("sigvechandler", name)))
+
+/* Saved Pc.  Get it from ucontext if within sigtramp.  */
+
+#define sigtramp_saved_pc i386v4_sigtramp_saved_pc
+extern CORE_ADDR i386v4_sigtramp_saved_pc (struct frame_info *);
+
+#endif /* ifndef TM_I386V4_H */
diff --git a/gdb/config/i386/tm-i386v42mp.h b/gdb/config/i386/tm-i386v42mp.h
new file mode 100644
index 00000000000..5671e42944c
--- /dev/null
+++ b/gdb/config/i386/tm-i386v42mp.h
@@ -0,0 +1,93 @@
+/* Macro definitions for GDB on an Intel i386 running SVR4.2MP
+   Copyright 1991, 1994, 1997, 1999, 2000 Free Software Foundation, Inc.
+   Written by Fred Fish at Cygnus Support (fnf@cygnus.com)
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_I386V42MP_H
+#define TM_I386V42MP_H 1
+
+/* pick up more generic x86 sysv4 stuff */
+
+#include "i386/tm-i386v4.h"
+
+/* define to select for other sysv4.2mp weirdness (see procfs.c) */
+
+#define UNIXWARE
+
+#if 0
+/* The following macros extract process and lwp/thread ids from a
+   composite id.
+
+   For consistency with UnixWare core files, allocate bits 0-15 for
+   process ids and bits 16 and up for lwp ids.  Reserve bit 31 for
+   negative return values to indicate exceptions, and use bit 30 as a
+   flag to indicate a user-mode thread, leaving 14 bits for lwp
+   ids. */
+
+/* Number of bits in composite id allocated to process number. */
+#define PIDBITS 16
+
+/* Return the process id stored in composite PID. */
+#define PIDGET(PID)             (((PID) & ((1 << PIDBITS) - 1)))
+
+/* Return the thread or lwp id stored in composite PID. */
+#define TIDGET(PID)             (((PID) & 0x3fffffff) >> PIDBITS)
+#define LIDGET(PID)             TIDGET(PID)
+
+/* Construct a composite id from lwp LID and the process portion of
+   composite PID. */
+#define MERGEPID(PID, LID)      (PIDGET(PID) | ((LID) << PIDBITS))
+#define MKLID(PID, LID)         MERGEPID(PID, LID)
+
+/* Construct a composite id from thread TID and the process portion of
+   composite PID. */
+#define MKTID(PID, TID)         (MERGEPID(PID, TID) | 0x40000000)
+
+/* Return whether PID contains a user-space thread id. */
+#define ISTID(PID)              ((PID) & 0x40000000)
+#endif
+
+/* New definitions of the ptid stuff.  Due to the way the
+   code is structured in uw-thread.c, I'm overloading the thread id
+   and lwp id onto the lwp field.  The tid field is used to indicate
+   whether the lwp is a tid or not.  
+   
+   FIXME: Check that core file support is not broken.  (See original
+   #if 0'd comments above.)
+   FIXME: Restructure uw-thread.c so that the struct ptid fields
+   can be used as intended. */
+
+/* Return the process id stored in composite PID. */
+#define PIDGET(PID) (ptid_get_pid (PID))
+
+/* Return the thread or lwp id stored in composite PID. */
+#define TIDGET(PID) (ptid_get_lwp (PID))
+#define LIDGET(PID) TIDGET(PID)
+
+#define MERGEPID(PID, LID) (ptid_build ((PID), (LID), 0))
+#define MKLID(PID, LID) (ptid_build ((PID), (LID), 0))
+
+/* Construct a composite id from thread TID and the process portion of
+   composite PID. */
+#define MKTID(PID, TID) (ptid_build ((PID), (TID), 1))
+
+/* Return whether PID contains a user-space thread id. */
+#define ISTID(PID) (ptid_get_tid (PID))
+
+#endif /* ifndef TM_I386V42MP_H */
diff --git a/gdb/config/i386/tm-linux.h b/gdb/config/i386/tm-linux.h
new file mode 100644
index 00000000000..60c4b1e3e39
--- /dev/null
+++ b/gdb/config/i386/tm-linux.h
@@ -0,0 +1,131 @@
+/* Definitions to target GDB to GNU/Linux on 386.
+
+   Copyright 1992, 1993, 1995, 1996, 1998, 1999, 2000, 2001, 2002 Free
+   Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_LINUX_H
+#define TM_LINUX_H
+
+#define I386_GNULINUX_TARGET
+#define HAVE_I387_REGS
+#ifdef HAVE_PTRACE_GETFPXREGS
+#define FILL_FPXREGSET
+#define HAVE_SSE_REGS
+#endif
+
+#include "i386/tm-i386.h"
+#include "tm-linux.h"
+
+/* Register number for the "orig_eax" pseudo-register.  If this
+   pseudo-register contains a value >= 0 it is interpreted as the
+   system call number that the kernel is supposed to restart.  */
+#define I386_LINUX_ORIG_EAX_REGNUM (NUM_GREGS + NUM_FREGS + NUM_SSE_REGS)
+
+/* Adjust a few macros to deal with this extra register.  */
+
+#undef NUM_REGS
+#define NUM_REGS (NUM_GREGS + NUM_FREGS + NUM_SSE_REGS + 1)
+
+#undef MAX_NUM_REGS
+#define MAX_NUM_REGS (16 + 16 + 9 + 1)
+
+#undef REGISTER_BYTES
+#define REGISTER_BYTES \
+  (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS + 4)
+
+#undef REGISTER_NAME
+#define REGISTER_NAME(reg) i386_linux_register_name ((reg))
+extern char *i386_linux_register_name (int reg);
+
+#undef REGISTER_BYTE
+#define REGISTER_BYTE(reg) i386_linux_register_byte ((reg))
+extern int i386_linux_register_byte (int reg);
+
+#undef REGISTER_RAW_SIZE
+#define REGISTER_RAW_SIZE(reg) i386_linux_register_raw_size ((reg))
+extern int i386_linux_register_raw_size (int reg);
+
+/* GNU/Linux ELF uses stabs-in-ELF with the DWARF register numbering
+   scheme by default, so we must redefine STAB_REG_TO_REGNUM.  This
+   messes up the floating-point registers for a.out, but there is not
+   much we can do about that.  */
+#undef STAB_REG_TO_REGNUM
+#define STAB_REG_TO_REGNUM(reg) i386_dwarf_reg_to_regnum ((reg))
+
+/* Use target_specific function to define link map offsets.  */
+extern struct link_map_offsets *i386_linux_svr4_fetch_link_map_offsets (void);
+#define SVR4_FETCH_LINK_MAP_OFFSETS() i386_linux_svr4_fetch_link_map_offsets ()
+
+/* The following works around a problem with /usr/include/sys/procfs.h  */
+#define sys_quotactl 1
+
+/* When the i386 Linux kernel calls a signal handler, the return
+   address points to a bit of code on the stack.  These definitions
+   are used to identify this bit of code as a signal trampoline in
+   order to support backtracing through calls to signal handlers.  */
+
+#define IN_SIGTRAMP(pc, name) i386_linux_in_sigtramp (pc, name)
+extern int i386_linux_in_sigtramp (CORE_ADDR, char *);
+
+#undef FRAME_CHAIN
+#define FRAME_CHAIN(frame) i386_linux_frame_chain (frame)
+extern CORE_ADDR i386_linux_frame_chain (struct frame_info *frame);
+
+#undef FRAME_SAVED_PC
+#define FRAME_SAVED_PC(frame) i386_linux_frame_saved_pc (frame)
+extern CORE_ADDR i386_linux_frame_saved_pc (struct frame_info *frame);
+
+#undef SAVED_PC_AFTER_CALL
+#define SAVED_PC_AFTER_CALL(frame) i386_linux_saved_pc_after_call (frame)
+extern CORE_ADDR i386_linux_saved_pc_after_call (struct frame_info *);
+
+#define TARGET_WRITE_PC(pc, ptid) i386_linux_write_pc (pc, ptid)
+extern void i386_linux_write_pc (CORE_ADDR pc, ptid_t ptid);
+
+/* When we call a function in a shared library, and the PLT sends us
+   into the dynamic linker to find the function's real address, we
+   need to skip over the dynamic linker call.  This function decides
+   when to skip, and where to skip to.  See the comments for
+   SKIP_SOLIB_RESOLVER at the top of infrun.c.  */
+#define SKIP_SOLIB_RESOLVER i386_linux_skip_solib_resolver
+extern CORE_ADDR i386_linux_skip_solib_resolver (CORE_ADDR pc);
+
+/* N_FUN symbols in shared libaries have 0 for their values and need
+   to be relocated. */
+#define SOFUN_ADDRESS_MAYBE_MISSING
+
+
+/* Support for longjmp.  */
+
+/* Details about jmp_buf.  It's supposed to be an array of integers.  */
+
+#define JB_ELEMENT_SIZE 4	/* Size of elements in jmp_buf.  */
+#define JB_PC		5	/* Array index of saved PC.  */
+
+/* Figure out where the longjmp will land.  Slurp the args out of the
+   stack.  We expect the first arg to be a pointer to the jmp_buf
+   structure from which we extract the pc (JB_PC) that we will land
+   at.  The pc is copied into ADDR.  This routine returns true on
+   success.  */
+
+#define GET_LONGJMP_TARGET(addr) get_longjmp_target (addr)
+extern int get_longjmp_target (CORE_ADDR *addr);
+
+#endif /* #ifndef TM_LINUX_H */
diff --git a/gdb/config/i386/tm-nbsd.h b/gdb/config/i386/tm-nbsd.h
new file mode 100644
index 00000000000..b4fb7542830
--- /dev/null
+++ b/gdb/config/i386/tm-nbsd.h
@@ -0,0 +1,64 @@
+/* Macro definitions for i386 running under NetBSD.
+   Copyright 1994, 1996, 2000, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_NBSD_H
+#define TM_NBSD_H
+
+#define HAVE_I387_REGS
+#define HAVE_SSE_REGS
+
+#include "i386/tm-i386.h"
+
+#define JB_ELEMENT_SIZE sizeof(int)	/* jmp_buf[_JBLEN] is array of ints */
+#define JB_PC	0		/* Setjmp()'s return PC saved here */
+
+/* Figure out where the longjmp will land.  Slurp the args out of the stack.
+   We expect the first arg to be a pointer to the jmp_buf structure from which
+   we extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int get_longjmp_target (CORE_ADDR *);
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+
+
+/* Support for signal handlers.  */
+
+#define IN_SIGTRAMP(pc, name) i386bsd_in_sigtramp (pc, name)
+extern int i386bsd_in_sigtramp (CORE_ADDR pc, char *name);
+
+/* These defines allow the recognition of sigtramps as a function name
+   <sigtramp>.
+
+   FIXME: kettenis/2001-07-13: These should be added to the target
+   vector and turned into functions when we go "multi-arch".  */
+
+#define SIGTRAMP_START(pc) i386bsd_sigtramp_start
+#define SIGTRAMP_END(pc) i386bsd_sigtramp_end
+extern CORE_ADDR i386bsd_sigtramp_start;
+extern CORE_ADDR i386bsd_sigtramp_end;
+
+/* Override FRAME_SAVED_PC to enable the recognition of signal handlers.  */
+
+#undef FRAME_SAVED_PC
+#define FRAME_SAVED_PC(frame) i386bsd_frame_saved_pc (frame)
+extern CORE_ADDR i386bsd_frame_saved_pc (struct frame_info *frame);
+
+#endif /* TM_NBSD_H */
diff --git a/gdb/config/i386/tm-nbsdaout.h b/gdb/config/i386/tm-nbsdaout.h
new file mode 100644
index 00000000000..95fe2e74a5b
--- /dev/null
+++ b/gdb/config/i386/tm-nbsdaout.h
@@ -0,0 +1,34 @@
+/* Macro definitions for i386 running under NetBSD.
+   Copyright 2000, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_NBSDAOUT_H
+#define TM_NBSDAOUT_H
+
+#include "i386/tm-nbsd.h"
+
+/* Return non-zero if we are in a shared library trampoline code stub. */
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) \
+  (name && !strcmp(name, "_DYNAMIC"))
+
+extern use_struct_convention_fn i386nbsd_aout_use_struct_convention;
+#define USE_STRUCT_CONVENTION(gcc_p, type) \
+        i386nbsd_aout_use_struct_convention(gcc_p, type)
+
+#endif /* TM_NBSDAOUT_H */
diff --git a/gdb/config/i386/tm-obsd.h b/gdb/config/i386/tm-obsd.h
new file mode 100644
index 00000000000..d26b03bf41d
--- /dev/null
+++ b/gdb/config/i386/tm-obsd.h
@@ -0,0 +1,77 @@
+/* Target-dependent definitions for OpenBSD/i386.
+   Copyright 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_OBSD_H
+#define TM_OBSD_H
+
+#define HAVE_I387_REGS
+#include "i386/tm-i386.h"
+
+/* OpenBSD uses the old gcc convention for struct returns.  */
+
+#define USE_STRUCT_CONVENTION(gcc_p, type) \
+  generic_use_struct_convention (1, type)
+
+
+/* Support for longjmp.  */
+
+/* Details about jmp_buf.  It's supposed to be an array of integers.  */
+
+#define JB_ELEMENT_SIZE 4	/* Size of elements in jmp_buf.  */
+#define JB_PC		0	/* Array index of saved PC.  */
+
+/* Figure out where the longjmp will land.  Store the address that
+   longjmp will jump to in *ADDR, and return non-zero if successful.  */
+
+#define GET_LONGJMP_TARGET(addr) get_longjmp_target (addr)
+extern int get_longjmp_target (CORE_ADDR *addr);
+
+
+/* Support for signal handlers.  */
+
+#define IN_SIGTRAMP(pc, name) i386bsd_in_sigtramp (pc, name)
+extern int i386bsd_in_sigtramp (CORE_ADDR pc, char *name);
+
+/* These defines allow the recognition of sigtramps as a function name
+   <sigtramp>.
+
+   FIXME: kettenis/2001-07-13: These should be added to the target
+   vector and turned into functions when we go "multi-arch".  */
+
+#define SIGTRAMP_START(pc) i386bsd_sigtramp_start
+#define SIGTRAMP_END(pc) i386bsd_sigtramp_end
+extern CORE_ADDR i386bsd_sigtramp_start;
+extern CORE_ADDR i386bsd_sigtramp_end;
+
+/* Override FRAME_SAVED_PC to enable the recognition of signal handlers.  */
+
+#undef FRAME_SAVED_PC
+#define FRAME_SAVED_PC(frame) i386bsd_frame_saved_pc (frame)
+extern CORE_ADDR i386bsd_frame_saved_pc (struct frame_info *frame);
+
+
+/* Shared library support.  */
+
+/* Return non-zero if we are in a shared library trampoline code stub.  */
+
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) \
+  (name && !strcmp(name, "_DYNAMIC"))
+
+#endif /* tm-obsd.h */
diff --git a/gdb/config/i386/tm-ptx.h b/gdb/config/i386/tm-ptx.h
new file mode 100644
index 00000000000..2a1731a161c
--- /dev/null
+++ b/gdb/config/i386/tm-ptx.h
@@ -0,0 +1,233 @@
+/* Target machine definitions for GDB on a Sequent Symmetry under ptx
+   with Weitek 1167 and i387 support.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 2000
+   Free Software Foundation, Inc.
+   Symmetry version by Jay Vosburgh (fubar@sequent.com).
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_PTX_H
+#define TM_PTX_H 1
+
+/* I don't know if this will work for cross-debugging, even if you do get
+   a copy of the right include file.  */
+
+#include <sys/reg.h>
+
+#ifdef SEQUENT_PTX4
+#include "i386/tm-i386v4.h"
+#else /* !SEQUENT_PTX4 */
+#include "i386/tm-i386v.h"
+#endif
+
+/* Number of traps that happen between exec'ing the shell to run an
+   inferior, and when we finally get to the inferior code.  This is 2
+   on most implementations. Here we have to undo what tm-i386v.h gave
+   us and restore the default. */
+
+#undef START_INFERIOR_TRAPS_EXPECTED
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+/* Amount PC must be decremented by after a breakpoint.  This is often the
+   number of bytes in BREAKPOINT but not always (such as now). */
+
+#undef DECR_PC_AFTER_BREAK
+#define DECR_PC_AFTER_BREAK 0
+
+#if 0
+-- -this code can 't be used unless we know we are running native,
+since it uses host specific ptrace calls.
+/* code for 80387 fpu.  Functions are from i386-dep.c, copied into
+ * symm-dep.c.
+ */
+#define FLOAT_INFO { i386_float_info(); }
+#endif
+
+/* Number of machine registers */
+
+#undef  NUM_REGS
+#define NUM_REGS 49
+
+/* Initializer for an array of names of registers.  There should be at least
+   NUM_REGS strings in this initializer.  Any excess ones are simply ignored.
+   The order of the first 8 registers must match the compiler's numbering
+   scheme (which is the same as the 386 scheme) and also regmap in the various
+   *-nat.c files. */
+
+#undef REGISTER_NAME
+#define REGISTER_NAMES { "eax",  "ecx",    "edx",  "ebx",  \
+			 "esp",  "ebp",    "esi",  "edi",  \
+			 "eip",  "eflags", "st0",  "st1",  \
+			 "st2",  "st3",    "st4",  "st5",  \
+			 "st6",  "st7",    "fp1",  "fp2",  \
+			 "fp3",  "fp4",    "fp5",  "fp6",  \
+			 "fp7",  "fp8",    "fp9",  "fp10", \
+			 "fp11", "fp12",   "fp13", "fp14", \
+			 "fp15", "fp16",   "fp17", "fp18", \
+			 "fp19", "fp20",   "fp21", "fp22", \
+			 "fp23", "fp24",   "fp25", "fp26", \
+			 "fp27", "fp28",   "fp29", "fp30", \
+			 "fp31" }
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define EAX_REGNUM	0
+#define ECX_REGNUM	1
+#define EDX_REGNUM	2
+#define EBX_REGNUM	3
+
+#define ESP_REGNUM	4
+#define EBP_REGNUM	5
+
+#define ESI_REGNUM	6
+#define EDI_REGNUM	7
+
+#define EIP_REGNUM	8
+#define EFLAGS_REGNUM	9
+
+#define ST0_REGNUM	10
+#define ST1_REGNUM	11
+#define ST2_REGNUM	12
+#define ST3_REGNUM	13
+
+#define ST4_REGNUM	14
+#define ST5_REGNUM	15
+#define ST6_REGNUM	16
+#define ST7_REGNUM	17
+
+#define FP1_REGNUM 18		/* first 1167 register */
+/* Get %fp2 - %fp31 by addition, since they are contiguous */
+
+#undef  SP_REGNUM
+#define SP_REGNUM ESP_REGNUM	/* Contains address of top of stack */
+#undef  FP_REGNUM
+#define FP_REGNUM EBP_REGNUM	/* Contains address of executing stack frame */
+#undef  PC_REGNUM
+#define PC_REGNUM EIP_REGNUM	/* Contains program counter */
+#undef  PS_REGNUM
+#define PS_REGNUM EFLAGS_REGNUM	/* Contains processor status */
+
+/*
+ * For ptx, this is a little bit bizarre, since the register block
+ * is below the u area in memory.  This means that blockend here ends
+ * up being negative (for the call from coredep.c) since the value in
+ * u.u_ar0 will be less than KERNEL_U_ADDR (and coredep.c passes us
+ * u.u_ar0 - KERNEL_U_ADDR in blockend).  Since we also define
+ * FETCH_INFERIOR_REGISTERS (and supply our own functions for that),
+ * the core file case will be the only use of this function.
+ */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ (addr) = ptx_register_u_addr((blockend), (regno)); }
+
+extern int ptx_register_u_addr (int, int);
+
+/* Total amount of space needed to store our copies of the machine's
+   register state, the array `registers'.  10 i*86 registers, 8 i387
+   registers, and 31 Weitek 1167 registers */
+
+#undef  REGISTER_BYTES
+#define REGISTER_BYTES ((10 * 4) + (8 * 10) + (31 * 4))
+
+/* Index within `registers' of the first byte of the space for register N. */
+
+#undef  REGISTER_BYTE
+#define REGISTER_BYTE(N) 		\
+(((N) < ST0_REGNUM) ? ((N) * 4) : \
+ ((N) < FP1_REGNUM) ? (40 + (((N) - ST0_REGNUM) * 10)) : \
+ (40 + 80 + (((N) - FP1_REGNUM) * 4)))
+
+/* Number of bytes of storage in the actual machine representation for
+   register N.  All registers are 4 bytes, except 387 st(0) - st(7),
+   which are 80 bits each. */
+
+#undef  REGISTER_RAW_SIZE
+#define REGISTER_RAW_SIZE(N) \
+(((N) < ST0_REGNUM) ? 4 : \
+ ((N) < FP1_REGNUM) ? 10 : \
+ 4)
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+
+#undef  MAX_REGISTER_RAW_SIZE
+#define MAX_REGISTER_RAW_SIZE 10
+
+/* Nonzero if register N requires conversion
+   from raw format to virtual format.  */
+
+#undef REGISTER_CONVERTIBLE
+#define REGISTER_CONVERTIBLE(N) \
+((N < ST0_REGNUM) ? 0 : \
+ (N < FP1_REGNUM) ? 1 : \
+ 0)
+
+/* Convert data from raw format for register REGNUM
+   to virtual format for register REGNUM.  */
+extern const struct floatformat floatformat_i387_ext;	/* from floatformat.h */
+
+#undef REGISTER_CONVERT_TO_VIRTUAL
+#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO)	\
+((REGNUM < ST0_REGNUM) ?  (void)memcpy ((TO), (FROM), 4) : \
+ (REGNUM < FP1_REGNUM) ? (void)floatformat_to_double(&floatformat_i387_ext, \
+						       (FROM),(TO)) : \
+ (void)memcpy ((TO), (FROM), 4))
+
+/* Convert data from virtual format for register REGNUM
+   to raw format for register REGNUM.  */
+
+#undef REGISTER_CONVERT_TO_RAW
+#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO)	\
+((REGNUM < ST0_REGNUM) ?  (void)memcpy ((TO), (FROM), 4) : \
+ (REGNUM < FP1_REGNUM) ? (void)floatformat_from_double(&floatformat_i387_ext, \
+						       (FROM),(TO)) : \
+ (void)memcpy ((TO), (FROM), 4))
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+/*
+ * Note: the 1167 registers (the last line, builtin_type_float) are
+ * generally used in pairs, with each pair being treated as a double.
+ * It it also possible to use them singly as floats.  I'm not sure how
+ * in gdb to treat the register pair pseudo-doubles. -fubar
+ */
+#undef REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+((N < ST0_REGNUM) ? builtin_type_int : \
+ (N < FP1_REGNUM) ? builtin_type_double : \
+ builtin_type_float)
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  */
+
+#undef  EXTRACT_RETURN_VALUE
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+  symmetry_extract_return_value(TYPE, REGBUF, VALBUF)
+
+/*
+   #undef  FRAME_FIND_SAVED_REGS
+   #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+   { ptx_frame_find_saved_regs((frame_info), &(frame_saved_regs)); }
+ */
+
+#endif /* ifndef TM_PTX_H */
diff --git a/gdb/config/i386/tm-ptx4.h b/gdb/config/i386/tm-ptx4.h
new file mode 100644
index 00000000000..1f221ba8e2b
--- /dev/null
+++ b/gdb/config/i386/tm-ptx4.h
@@ -0,0 +1,26 @@
+/* Target machine definitions for GDB on a Sequent Symmetry under ptx
+   with Weitek 1167 and i387 support.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994
+   Free Software Foundation, Inc.
+   Symmetry version by Jay Vosburgh (fubar@sequent.com).
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define SEQUENT_PTX4
+
+#include "tm-ptx.h"
diff --git a/gdb/config/i386/tm-symmetry.h b/gdb/config/i386/tm-symmetry.h
new file mode 100644
index 00000000000..78281819dfa
--- /dev/null
+++ b/gdb/config/i386/tm-symmetry.h
@@ -0,0 +1,325 @@
+/* Target machine definitions for GDB on a Sequent Symmetry under dynix 3.0,
+   with Weitek 1167 and i387 support.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995
+   Free Software Foundation, Inc.
+   Symmetry version by Jay Vosburgh (fubar@sequent.com).
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_SYMMETRY_H
+#define TM_SYMMETRY_H 1
+
+#include "regcache.h"
+#include "doublest.h"
+
+/* I don't know if this will work for cross-debugging, even if you do get
+   a copy of the right include file.  */
+#include <machine/reg.h>
+
+#include "i386/tm-i386v.h"
+
+#undef START_INFERIOR_TRAPS_EXPECTED
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+/* Amount PC must be decremented by after a breakpoint.  This is often the
+   number of bytes in BREAKPOINT but not always (such as now). */
+
+#undef DECR_PC_AFTER_BREAK
+#define DECR_PC_AFTER_BREAK 0
+
+#if 0
+/* --- this code can't be used unless we know we are running native,
+   since it uses host specific ptrace calls. */
+/* code for 80387 fpu.  Functions are from i386-dep.c, copied into
+ * symm-dep.c.
+ */
+#define FLOAT_INFO { i386_float_info(); }
+#endif
+
+/* Number of machine registers */
+
+#undef NUM_REGS
+#define NUM_REGS 49
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+
+/* Initializer for an array of names of registers.  There should be at least
+   NUM_REGS strings in this initializer.  Any excess ones are simply ignored.
+   Symmetry registers are in this weird order to match the register numbers
+   in the symbol table entries.  If you change the order, things will probably
+   break mysteriously for no apparent reason.  Also note that the st(0)...
+   st(7) 387 registers are represented as st0...st7.  */
+
+#undef REGISTER_NAME
+#define REGISTER_NAMES {     "eax",  "edx",  "ecx",   "st0",  "st1", \
+			     "ebx",  "esi",  "edi",   "st2",  "st3", \
+			     "st4",  "st5",  "st6",   "st7",  "esp", \
+			     "ebp",  "eip",  "eflags","fp1",  "fp2", \
+			     "fp3",  "fp4",  "fp5",   "fp6",  "fp7", \
+			     "fp8",  "fp9",  "fp10",  "fp11", "fp12", \
+			     "fp13", "fp14", "fp15",  "fp16", "fp17", \
+			     "fp18", "fp19", "fp20",  "fp21", "fp22", \
+			     "fp23", "fp24", "fp25",  "fp26", "fp27", \
+			     "fp28", "fp29", "fp30",  "fp31" }
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define EAX_REGNUM	0
+#define EDX_REGNUM	1
+#define ECX_REGNUM	2
+#define ST0_REGNUM	3
+#define ST1_REGNUM	4
+#define EBX_REGNUM	5
+#define ESI_REGNUM	6
+#define EDI_REGNUM	7
+#define ST2_REGNUM	8
+#define ST3_REGNUM	9
+
+#define ST4_REGNUM	10
+#define ST5_REGNUM	11
+#define ST6_REGNUM	12
+#define ST7_REGNUM	13
+
+#define FP1_REGNUM 18		/* first 1167 register */
+/* Get %fp2 - %fp31 by addition, since they are contiguous */
+
+#undef  SP_REGNUM
+#define SP_REGNUM 14		/* (usp) Contains address of top of stack */
+#define ESP_REGNUM 14
+#undef  FP_REGNUM
+#define FP_REGNUM 15		/* (ebp) Contains address of executing stack frame */
+#define EBP_REGNUM 15
+#undef  PC_REGNUM
+#define PC_REGNUM 16		/* (eip) Contains program counter */
+#define EIP_REGNUM 16
+#undef  PS_REGNUM
+#define PS_REGNUM 17		/* (ps)  Contains processor status */
+#define EFLAGS_REGNUM 17
+
+/*
+ * Following macro translates i386 opcode register numbers to Symmetry
+ * register numbers.  This is used by i386_frame_find_saved_regs.
+ *
+ *           %eax  %ecx  %edx  %ebx  %esp  %ebp  %esi  %edi
+ * i386        0     1     2     3     4     5     6     7
+ * Symmetry    0     2     1     5    14    15     6     7
+ *
+ */
+#define I386_REGNO_TO_SYMMETRY(n) \
+((n)==0?0 :(n)==1?2 :(n)==2?1 :(n)==3?5 :(n)==4?14 :(n)==5?15 :(n))
+
+/* The magic numbers below are offsets into u_ar0 in the user struct.
+ * They live in <machine/reg.h>.  Gdb calls this macro with blockend
+ * holding u.u_ar0 - KERNEL_U_ADDR.  Only the registers listed are
+ * saved in the u area (along with a few others that aren't useful
+ * here.  See <machine/reg.h>).
+ */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+{ struct user foo;	/* needed for finding fpu regs */ \
+switch (regno) { \
+    case 0: \
+      addr = blockend + EAX * sizeof(int); break; \
+  case 1: \
+      addr = blockend + EDX * sizeof(int); break; \
+  case 2: \
+      addr = blockend + ECX * sizeof(int); break; \
+  case 3:			/* st(0) */ \
+      addr = ((int)&foo.u_fpusave.fpu_stack[0][0] - (int)&foo); \
+      break; \
+  case 4:			/* st(1) */ \
+      addr = ((int) &foo.u_fpusave.fpu_stack[1][0] - (int)&foo); \
+      break; \
+  case 5: \
+      addr = blockend + EBX * sizeof(int); break; \
+  case 6: \
+      addr = blockend + ESI * sizeof(int); break; \
+  case 7: \
+      addr = blockend + EDI * sizeof(int); break; \
+  case 8:			/* st(2) */ \
+      addr = ((int) &foo.u_fpusave.fpu_stack[2][0] - (int)&foo); \
+      break; \
+  case 9:			/* st(3) */ \
+      addr = ((int) &foo.u_fpusave.fpu_stack[3][0] - (int)&foo); \
+      break; \
+  case 10:			/* st(4) */ \
+      addr = ((int) &foo.u_fpusave.fpu_stack[4][0] - (int)&foo); \
+      break; \
+  case 11:			/* st(5) */ \
+      addr = ((int) &foo.u_fpusave.fpu_stack[5][0] - (int)&foo); \
+      break; \
+  case 12:			/* st(6) */ \
+      addr = ((int) &foo.u_fpusave.fpu_stack[6][0] - (int)&foo); \
+      break; \
+  case 13:			/* st(7) */ \
+      addr = ((int) &foo.u_fpusave.fpu_stack[7][0] - (int)&foo); \
+      break; \
+  case 14: \
+      addr = blockend + ESP * sizeof(int); break; \
+  case 15: \
+      addr = blockend + EBP * sizeof(int); break; \
+  case 16: \
+      addr = blockend + EIP * sizeof(int); break; \
+  case 17: \
+      addr = blockend + FLAGS * sizeof(int); break; \
+  case 18:			/* fp1 */ \
+  case 19:			/* fp2 */ \
+  case 20:			/* fp3 */ \
+  case 21:			/* fp4 */ \
+  case 22:			/* fp5 */ \
+  case 23:			/* fp6 */ \
+  case 24:			/* fp7 */ \
+  case 25:			/* fp8 */ \
+  case 26:			/* fp9 */ \
+  case 27:			/* fp10 */ \
+  case 28:			/* fp11 */ \
+  case 29:			/* fp12 */ \
+  case 30:			/* fp13 */ \
+  case 31:			/* fp14 */ \
+  case 32:			/* fp15 */ \
+  case 33:			/* fp16 */ \
+  case 34:			/* fp17 */ \
+  case 35:			/* fp18 */ \
+  case 36:			/* fp19 */ \
+  case 37:			/* fp20 */ \
+  case 38:			/* fp21 */ \
+  case 39:			/* fp22 */ \
+  case 40:			/* fp23 */ \
+  case 41:			/* fp24 */ \
+  case 42:			/* fp25 */ \
+  case 43:			/* fp26 */ \
+  case 44:			/* fp27 */ \
+  case 45:			/* fp28 */ \
+  case 46:			/* fp29 */ \
+  case 47:			/* fp30 */ \
+  case 48:			/* fp31 */ \
+     addr = ((int) &foo.u_fpasave.fpa_regs[(regno)-18] - (int)&foo); \
+  } \
+}
+
+/* Total amount of space needed to store our copies of the machine's
+   register state, the array `registers'.  10 i*86 registers, 8 i387
+   registers, and 31 Weitek 1167 registers */
+
+#undef  REGISTER_BYTES
+#define REGISTER_BYTES ((10 * 4) + (8 * 10) + (31 * 4))
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+
+#undef  REGISTER_BYTE
+#define REGISTER_BYTE(N) 		\
+(((N) < 3) ? ((N) * 4) :		\
+((N) < 5) ? ((((N) - 2) * 10) + 2) :	\
+((N) < 8) ? ((((N) - 5) * 4) + 32) :	\
+((N) < 14) ? ((((N) - 8) * 10) + 44) :	\
+    ((((N) - 14) * 4) + 104))
+
+/* Number of bytes of storage in the actual machine representation
+ * for register N.  All registers are 4 bytes, except 387 st(0) - st(7),
+ * which are 80 bits each. 
+ */
+
+#undef  REGISTER_RAW_SIZE
+#define REGISTER_RAW_SIZE(N) \
+(((N) < 3) ? 4 :	\
+((N) < 5) ? 10 :	\
+((N) < 8) ? 4 :		\
+((N) < 14) ? 10 :	\
+    4)
+
+/* Nonzero if register N requires conversion
+   from raw format to virtual format.  */
+
+#undef  REGISTER_CONVERTIBLE
+#define REGISTER_CONVERTIBLE(N) \
+(((N) < 3) ? 0 : \
+((N) < 5) ? 1  : \
+((N) < 8) ? 0  : \
+((N) < 14) ? 1 : \
+    0)
+
+#include "floatformat.h"
+
+/* Convert data from raw format for register REGNUM in buffer FROM
+   to virtual format with type TYPE in buffer TO.  */
+
+#undef REGISTER_CONVERT_TO_VIRTUAL
+#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
+{ \
+  DOUBLEST val; \
+  floatformat_to_doublest (&floatformat_i387_ext, (FROM), &val); \
+  store_floating ((TO), TYPE_LENGTH (TYPE), val); \
+}
+
+/* Convert data from virtual format with type TYPE in buffer FROM
+   to raw format for register REGNUM in buffer TO.  */
+
+#undef REGISTER_CONVERT_TO_RAW
+#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
+{ \
+  DOUBLEST val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
+  floatformat_from_doublest (&floatformat_i387_ext, &val, (TO)); \
+}
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+
+#undef REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+((N < 3) ? builtin_type_int : \
+(N < 5) ? builtin_type_double : \
+(N < 8) ? builtin_type_int : \
+(N < 14) ? builtin_type_double : \
+    builtin_type_int)
+
+/* Store the address of the place in which to copy the structure the
+   subroutine will return.  This is called from call_function.
+   Native cc passes the address in eax, gcc (up to version 2.5.8)
+   passes it on the stack.  gcc should be fixed in future versions to
+   adopt native cc conventions.  */
+
+#undef  PUSH_ARGUMENTS
+#undef  STORE_STRUCT_RETURN
+#define STORE_STRUCT_RETURN(ADDR, SP) write_register(0, (ADDR))
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  */
+
+#undef  EXTRACT_RETURN_VALUE
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+  symmetry_extract_return_value(TYPE, REGBUF, VALBUF)
+
+/* The following redefines make backtracing through sigtramp work.
+   They manufacture a fake sigtramp frame and obtain the saved pc in sigtramp
+   from the sigcontext structure which is pushed by the kernel on the
+   user stack, along with a pointer to it.  */
+
+#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigcode", name))
+
+/* Offset to saved PC in sigcontext, from <signal.h>.  */
+#define SIGCONTEXT_PC_OFFSET 16
+
+#endif /* ifndef TM_SYMMETRY_H */
diff --git a/gdb/config/i386/tm-vxworks.h b/gdb/config/i386/tm-vxworks.h
new file mode 100644
index 00000000000..6434a6ea2f5
--- /dev/null
+++ b/gdb/config/i386/tm-vxworks.h
@@ -0,0 +1,28 @@
+/* Target machine description for VxWorks on the 80[3456]86,
+   for GDB, the GNU debugger.
+   Copyright 1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_VXWORKS_H
+#define TM_VXWORKS_H
+
+#include "i386/tm-i386v.h"
+#include "tm-vxworks.h"
+
+#endif /* ifndef TM_VXWORKS_H */
diff --git a/gdb/config/i386/vxworks.mt b/gdb/config/i386/vxworks.mt
new file mode 100644
index 00000000000..a14aacc8cd0
--- /dev/null
+++ b/gdb/config/i386/vxworks.mt
@@ -0,0 +1,3 @@
+# Target: i386 running VxWorks
+TDEPFILES= i386-tdep.o i387-tdep.o 
+TM_FILE= tm-vxworks.h
diff --git a/gdb/config/i386/x86-64linux.mh b/gdb/config/i386/x86-64linux.mh
new file mode 100644
index 00000000000..bc79f3f235c
--- /dev/null
+++ b/gdb/config/i386/x86-64linux.mh
@@ -0,0 +1,11 @@
+# Host: AMD x86-64 running GNU/Linux
+
+XM_FILE= xm-i386.h
+
+NAT_FILE= nm-x86-64.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o \
+	core-aout.o i386-nat.o x86-64-linux-nat.o \
+	proc-service.o thread-db.o lin-lwp.o \
+	linux-proc.o gcore.o 
+
+LOADLIBES = -ldl -rdynamic
diff --git a/gdb/config/i386/x86-64linux.mt b/gdb/config/i386/x86-64linux.mt
new file mode 100644
index 00000000000..85f1972531d
--- /dev/null
+++ b/gdb/config/i386/x86-64linux.mt
@@ -0,0 +1,3 @@
+# Target: AMD x86-64 running GNU/Linux
+TDEPFILES= x86-64-tdep.o x86-64-linux-tdep.o i387-tdep.o dwarf2cfi.o \
+	solib.o solib-svr4.o solib-legacy.o
diff --git a/gdb/config/i386/xm-cygwin.h b/gdb/config/i386/xm-cygwin.h
new file mode 100644
index 00000000000..647072758fe
--- /dev/null
+++ b/gdb/config/i386/xm-cygwin.h
@@ -0,0 +1,24 @@
+/* Definitions for hosting on WIN32, for GDB.
+   Copyright 1995, 1996, 1997, 1998, 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "fopen-bin.h"
+
+/* Define this if source files use \r\n rather than just \n.  */
+#define CRLF_SOURCE_FILES
diff --git a/gdb/config/i386/xm-go32.h b/gdb/config/i386/xm-go32.h
new file mode 100644
index 00000000000..dead9f69e42
--- /dev/null
+++ b/gdb/config/i386/xm-go32.h
@@ -0,0 +1,26 @@
+/* Host-dependent definitions for Intel x86 running DJGPP.
+   Copyright 1993-1996 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "i386/xm-i386.h"
+#include "fopen-bin.h"
+
+#define GDBINIT_FILENAME "gdb.ini"
+#define CRLF_SOURCE_FILES
+#define DIRNAME_SEPARATOR ';'
diff --git a/gdb/config/i386/xm-i386.h b/gdb/config/i386/xm-i386.h
new file mode 100644
index 00000000000..151e7a6b556
--- /dev/null
+++ b/gdb/config/i386/xm-i386.h
@@ -0,0 +1,30 @@
+/* Host-dependent definitions for i386.
+   Copyright 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef XM_I386_H
+#define XM_I386_H
+
+#include "floatformat.h"
+
+#define HOST_FLOAT_FORMAT &floatformat_ieee_single_little
+#define HOST_DOUBLE_FORMAT &floatformat_ieee_double_little
+#define HOST_LONG_DOUBLE_FORMAT &floatformat_i387_ext
+
+#endif /* XM_386_H */
diff --git a/gdb/config/i386/xm-i386aix.h b/gdb/config/i386/xm-i386aix.h
new file mode 100644
index 00000000000..842eadf0632
--- /dev/null
+++ b/gdb/config/i386/xm-i386aix.h
@@ -0,0 +1,29 @@
+/* Macro defintions for AIX PS/2 (i386)
+   Copyright 1986, 1987, 1989, 1992, 1993 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/*
+ * Changed for IBM AIX ps/2 by Minh Tran Le (tranle@intellicorp.com)
+ * Revision:    23-Oct-92 17:42:49
+ */
+
+#include "i386/xm-i386v.h"
+
+#undef HAVE_TERMIO
+#define HAVE_SGTTY
diff --git a/gdb/config/i386/xm-i386bsd.h b/gdb/config/i386/xm-i386bsd.h
new file mode 100644
index 00000000000..ca0ffb2ab8f
--- /dev/null
+++ b/gdb/config/i386/xm-i386bsd.h
@@ -0,0 +1,22 @@
+/* Host-dependent definitions for Intel 386 running BSD Unix, for GDB.
+   Copyright 1986, 1987, 1989, 1992, 1995, 1996
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include <machine/limits.h>	/* for INT_MIN */
diff --git a/gdb/config/i386/xm-i386gnu.h b/gdb/config/i386/xm-i386gnu.h
new file mode 100644
index 00000000000..711aeebccfb
--- /dev/null
+++ b/gdb/config/i386/xm-i386gnu.h
@@ -0,0 +1,25 @@
+/* Definitions to make GDB run on the GNU Hurd on an Intel 386
+   Copyright 1986, 1987, 1989, 1991, 1996, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define HOST_LONG_DOUBLE_FORMAT &floatformat_i387_ext
+
+/* Do implement the attach and detach commands.  */
+#define ATTACH_DETACH	1
diff --git a/gdb/config/i386/xm-i386m3.h b/gdb/config/i386/xm-i386m3.h
new file mode 100644
index 00000000000..f25b3891210
--- /dev/null
+++ b/gdb/config/i386/xm-i386m3.h
@@ -0,0 +1,33 @@
+/* Definitions to make GDB run on Mach 3 on an Intel 386
+   Copyright 1986, 1987, 1989, 1991, 1993, 1994, 1996
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Do implement the attach and detach commands.  */
+#define ATTACH_DETACH	1
+
+/* Not needeed */
+#define KERNEL_U_ADDR 0
+
+#ifndef EMULATOR_BASE
+/* For EMULATOR_BASE and EMULATOR_END.
+ * OSF 1/MK has different values in some other place.
+ */
+#include <machine/vmparam.h>
+#endif /* EMULATOR_BASE */
diff --git a/gdb/config/i386/xm-i386mach.h b/gdb/config/i386/xm-i386mach.h
new file mode 100644
index 00000000000..e0a5d651376
--- /dev/null
+++ b/gdb/config/i386/xm-i386mach.h
@@ -0,0 +1,28 @@
+/* Definitions to make GDB run on Mach on an Intel 386
+   Copyright 1986, 1987, 1989, 1991, 1992, 1994, 1996, 2001
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+
+#define KERNEL_U_ADDR (0x80000000 - (UPAGES * NBPG))
+
+/* <errno.h> only defines this if __STDC__!!! */
+extern int errno;
diff --git a/gdb/config/i386/xm-i386mk.h b/gdb/config/i386/xm-i386mk.h
new file mode 100644
index 00000000000..cbf62710db5
--- /dev/null
+++ b/gdb/config/i386/xm-i386mk.h
@@ -0,0 +1,26 @@
+/* Definitions to make GDB run on Mach 3 OSF 1/MK on an Intel 386
+   Copyright 1992, 1993, 1998 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define HAVE_TERMIO	1
+
+#define EMULATOR_BASE	0xa0000000
+#define EMULATOR_END	0xa0040000
+
+#include "i386/xm-i386m3.h"
diff --git a/gdb/config/i386/xm-i386sco.h b/gdb/config/i386/xm-i386sco.h
new file mode 100644
index 00000000000..920ebbb3c4d
--- /dev/null
+++ b/gdb/config/i386/xm-i386sco.h
@@ -0,0 +1,40 @@
+/* Macro defintions for i386, running SCO Unix System V/386 3.2.
+   Copyright 1989, 1993, 1995 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* In 3.2v4 <sys/user.h> requires on <sys/dir.h>.  */
+#include <sys/types.h>
+#include <sys/dir.h>
+
+#include "i386/xm-i386v.h"
+
+/* Apparently there is inconsistency among various System V's about what
+   the name of this field is.  */
+#define U_FPSTATE(u) u.u_fps.u_fpstate
+
+/* SCO 3.2v2 and later have job control.  */
+/* SCO 3.2v4 I know has termios; I'm not sure about earlier versions.
+   GDB does not currently support the termio/job control combination.  */
+#undef HAVE_TERMIO
+#define HAVE_TERMIOS
+
+/* SCO's assembler doesn't grok dollar signs in identifiers.
+   So we use dots instead.  This item must be coordinated with G++. */
+#undef CPLUS_MARKER
+#define CPLUS_MARKER '.'
diff --git a/gdb/config/i386/xm-i386v.h b/gdb/config/i386/xm-i386v.h
new file mode 100644
index 00000000000..1c329054f22
--- /dev/null
+++ b/gdb/config/i386/xm-i386v.h
@@ -0,0 +1,43 @@
+/* Host support for i386.
+   Copyright 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+   Changes for 80386 by Pace Willisson (pace@prep.ai.mit.edu), July 1988.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* I'm running gdb 3.4 under 386/ix 2.0.2, which is a derivative of AT&T's
+   Sys V/386 3.2.
+
+   On some machines, gdb crashes when it's starting up while calling the
+   vendor's termio tgetent() routine.  It always works when run under
+   itself (actually, under 3.2, it's not an infinitely recursive bug.)
+   After some poking around, it appears that depending on the environment
+   size, or whether you're running YP, or the phase of the moon or something,
+   the stack is not always long-aligned when main() is called, and tgetent()
+   takes strong offense at that.  On some machines this bug never appears, but
+   on those where it does, it occurs quite reliably.  */
+#define ALIGN_STACK_ON_STARTUP
+
+/* define USG if you are using sys5 /usr/include's */
+#define USG
+
+#define HAVE_TERMIO
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+
+#define KERNEL_U_ADDR 0xe0000000
diff --git a/gdb/config/i386/xm-i386v32.h b/gdb/config/i386/xm-i386v32.h
new file mode 100644
index 00000000000..706822f30dd
--- /dev/null
+++ b/gdb/config/i386/xm-i386v32.h
@@ -0,0 +1,25 @@
+/* Macro defintions for i386, running System V 3.2.
+   Copyright (C) 1989 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "i386/xm-i386v.h"
+
+/* Apparently there is inconsistency among various System V's about what
+   the name of this field is.  */
+#define U_FPSTATE(u) u.u_fps.u_fpstate
diff --git a/gdb/config/i386/xm-i386v4.h b/gdb/config/i386/xm-i386v4.h
new file mode 100644
index 00000000000..c3241100bf7
--- /dev/null
+++ b/gdb/config/i386/xm-i386v4.h
@@ -0,0 +1,28 @@
+/* Macro definitions for GDB on an Intel i386 running SVR4.
+   Copyright 1991, 1992, 1994, 1996 Free Software Foundation, Inc.
+   Written by Fred Fish at Cygnus Support (fnf@cygnus.com).
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Pick up most of what we need from the generic i386 host include file. */
+
+#include "i386/xm-i386v.h"
+
+/* Pick up more stuff from the generic SVR4 host include file. */
+
+#include "xm-sysv4.h"
diff --git a/gdb/config/i386/xm-nbsd.h b/gdb/config/i386/xm-nbsd.h
new file mode 100644
index 00000000000..415d0fa4ffd
--- /dev/null
+++ b/gdb/config/i386/xm-nbsd.h
@@ -0,0 +1,24 @@
+/* Parameters for execution on a i386 running NetBSD, for GDB.
+   Copyright 1994, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Get generic NetBSD host definitions. */
+#include "xm-nbsd.h"
+
+#define HOST_LONG_DOUBLE_FORMAT &floatformat_i387_ext
diff --git a/gdb/config/i386/xm-ptx.h b/gdb/config/i386/xm-ptx.h
new file mode 100644
index 00000000000..6dfb9d6d4e3
--- /dev/null
+++ b/gdb/config/i386/xm-ptx.h
@@ -0,0 +1,38 @@
+/* Definitions to make GDB run on a Sequent Symmetry under ptx, with
+   Weitek 1167 and i387 support.
+   Copyright 1986, 1987, 1989, 1992, 1993, 1994, 1995
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Symmetry version by Jay Vosburgh (fubar@sequent.com) */
+
+#ifdef _SEQUENT_PTX4_
+#include "xm-sysv4.h"
+#endif /* _SEQUENT_PTX4_ */
+
+/* This machine doesn't have the siginterrupt call.  */
+#define NO_SIGINTERRUPT
+
+#define HAVE_WAIT_STRUCT
+
+#undef HAVE_TERMIO
+#define HAVE_TERMIOS
+#define USG
+
+#define USE_O_NOCTTY
diff --git a/gdb/config/i386/xm-ptx4.h b/gdb/config/i386/xm-ptx4.h
new file mode 100644
index 00000000000..2f466e62d70
--- /dev/null
+++ b/gdb/config/i386/xm-ptx4.h
@@ -0,0 +1,27 @@
+/* Definitions to make GDB run on a Sequent Symmetry under ptx, with
+   Weitek 1167 and i387 support.
+   Copyright 1986, 1987, 1989, 1992, 1993, 1994
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Symmetry version by Jay Vosburgh (fubar@sequent.com) */
+
+#include "xm-sysv4.h"
+
+#include "xm-ptx.h"
diff --git a/gdb/config/i386/xm-symmetry.h b/gdb/config/i386/xm-symmetry.h
new file mode 100644
index 00000000000..781a343961a
--- /dev/null
+++ b/gdb/config/i386/xm-symmetry.h
@@ -0,0 +1,28 @@
+/* Definitions to make GDB run on a Sequent Symmetry under
+   dynix 3.1, with Weitek 1167 and i387 support.
+   Copyright 1986, 1987, 1989, 1992, 1993, 1994
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Symmetry version by Jay Vosburgh (fubar@sequent.com) */
+
+/* This machine doesn't have the siginterrupt call.  */
+#define NO_SIGINTERRUPT
+
+#define HAVE_WAIT_STRUCT
diff --git a/gdb/config/i960/mon960.mt b/gdb/config/i960/mon960.mt
new file mode 100644
index 00000000000..6cd73459f7e
--- /dev/null
+++ b/gdb/config/i960/mon960.mt
@@ -0,0 +1,6 @@
+# Target: Intel 960 rom monitor
+TDEPFILES= i960-tdep.o monitor.o mon960-rom.o ttyflush.o xmodem.o dsrec.o
+TM_FILE= tm-mon960.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/i960/libsim.a
+
diff --git a/gdb/config/i960/nindy960.mt b/gdb/config/i960/nindy960.mt
new file mode 100644
index 00000000000..f37c1da4b7c
--- /dev/null
+++ b/gdb/config/i960/nindy960.mt
@@ -0,0 +1,3 @@
+# Target: Intel 80960, in an embedded system under the NINDY monitor
+TDEPFILES= i960-tdep.o nindy-tdep.o remote-nindy.o nindy.o Onindy.o ttyflush.o
+TM_FILE= tm-nindy960.h
diff --git a/gdb/config/i960/tm-i960.h b/gdb/config/i960/tm-i960.h
new file mode 100644
index 00000000000..a62e35da7e7
--- /dev/null
+++ b/gdb/config/i960/tm-i960.h
@@ -0,0 +1,345 @@
+/* Parameters for target machine Intel 960, for GDB, the GNU debugger.
+
+   Copyright 1990, 1991, 1993, 1994, 1996, 1998, 1999, 2000, 2002 Free
+   Software Foundation, Inc.
+
+   Contributed by Intel Corporation.
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Definitions to target GDB to any i960.  */
+
+#ifndef I80960
+#define I80960
+#endif
+
+#include "doublest.h"
+
+/* Hook for the SYMBOL_CLASS of a parameter when decoding DBX symbol
+   information.  In the i960, parameters can be stored as locals or as
+   args, depending on the type of the debug record.
+
+   From empirical observation, gcc960 uses N_LSYM to indicate
+   arguments passed in registers and then copied immediately
+   to the frame, and N_PSYM to indicate arguments passed in a
+   g14-relative argument block.  */
+
+#define	DBX_PARM_SYMBOL_CLASS(type) ((type == N_LSYM)? LOC_LOCAL_ARG: LOC_ARG)
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance ip across any function entry prologue instructions
+   to reach some "real" code.  */
+
+#define SKIP_PROLOGUE(ip)	(i960_skip_prologue (ip))
+extern CORE_ADDR i960_skip_prologue ();
+
+/* Immediately after a function call, return the saved ip.
+   Can't always go through the frames for this because on some machines
+   the new frame is not set up until the new function
+   executes some instructions.  */
+
+#define SAVED_PC_AFTER_CALL(frame) (saved_pc_after_call (frame))
+extern CORE_ADDR saved_pc_after_call ();
+
+/* Stack grows upward */
+
+#define INNER_THAN(lhs,rhs) ((lhs) > (rhs))
+
+/* Say how long (ordinary) registers are.  This is a piece of bogosity
+   used in push_word and a few other places; REGISTER_RAW_SIZE is the
+   real way to know how big a register is.  */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+#define NUM_REGS 40
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+
+#define REGISTER_NAMES { \
+	/*  0 */ "pfp", "sp",  "rip", "r3",  "r4",  "r5",  "r6",  "r7", \
+	/*  8 */ "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",\
+	/* 16 */ "g0",  "g1",  "g2",  "g3",  "g4",  "g5",  "g6",  "g7", \
+	/* 24 */ "g8",  "g9",  "g10", "g11", "g12", "g13", "g14", "fp", \
+	/* 32 */ "pcw", "ac",  "tc",  "ip",  "fp0", "fp1", "fp2", "fp3",\
+}
+
+/* Register numbers of various important registers (used to index
+   into arrays of register names and register values).  */
+
+#define R0_REGNUM   0		/* First local register           */
+#define SP_REGNUM   1		/* Contains address of top of stack */
+#define RIP_REGNUM  2		/* Return instruction pointer (local r2) */
+#define R15_REGNUM 15		/* Last local register            */
+#define G0_REGNUM  16		/* First global register  */
+#define G13_REGNUM 29		/* g13 - holds struct return address */
+#define G14_REGNUM 30		/* g14 - ptr to arg block / leafproc return address */
+#define FP_REGNUM  31		/* Contains address of executing stack frame */
+#define	PCW_REGNUM 32		/* process control word */
+#define	ACW_REGNUM 33		/* arithmetic control word */
+#define	TCW_REGNUM 34		/* trace control word */
+#define IP_REGNUM  35		/* instruction pointer */
+#define FP0_REGNUM 36		/* First floating point register */
+
+/* Some registers have more than one name */
+
+#define PC_REGNUM  IP_REGNUM	/* GDB refers to ip as the Program Counter */
+#define PFP_REGNUM R0_REGNUM	/* Previous frame pointer */
+
+/* Total amount of space needed to store our copies of the machine's
+   register state, the array `registers'.  */
+#define REGISTER_BYTES ((36*4) + (4*10))
+
+/* Index within `registers' of the first byte of the space for register N.  */
+
+#define REGISTER_BYTE(N) ( (N) < FP0_REGNUM ? \
+				(4*(N)) : ((10*(N)) - (6*FP0_REGNUM)) )
+
+/* The i960 has register windows, sort of.  */
+
+extern void i960_get_saved_register (char *raw_buffer,
+				     int *optimized,
+				     CORE_ADDR *addrp,
+				     struct frame_info *frame,
+				     int regnum,
+				     enum lval_type *lval);
+
+#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
+  i960_get_saved_register(raw_buffer, optimized, addrp, frame, regnum, lval)
+
+
+/* Number of bytes of storage in the actual machine representation
+   for register N.  On the i960, all regs are 4 bytes except for floating
+   point, which are 10.  NINDY only sends us 8 byte values for these,
+   which is a pain, but VxWorks handles this correctly, so we must.  */
+
+#define REGISTER_RAW_SIZE(N)		( (N) < FP0_REGNUM ? 4 : 10 )
+
+/* Number of bytes of storage in the program's representation for register N. */
+
+#define REGISTER_VIRTUAL_SIZE(N)	( (N) < FP0_REGNUM ? 4 : 8 )
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+
+#define MAX_REGISTER_RAW_SIZE 10
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+#include "floatformat.h"
+
+#define TARGET_LONG_DOUBLE_FORMAT &floatformat_i960_ext
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+
+struct type *i960_register_type (int regnum);
+#define REGISTER_VIRTUAL_TYPE(N) i960_register_type (N)
+
+/* Macros for understanding function return values... */
+
+/* Does the specified function use the "struct returning" convention
+   or the "value returning" convention?  The "value returning" convention
+   almost invariably returns the entire value in registers.  The
+   "struct returning" convention often returns the entire value in
+   memory, and passes a pointer (out of or into the function) saying
+   where the value (is or should go).
+
+   Since this sometimes depends on whether it was compiled with GCC,
+   this is also an argument.  This is used in call_function to build a
+   stack, and in value_being_returned to print return values.
+
+   On i960, a structure is returned in registers g0-g3, if it will fit.
+   If it's more than 16 bytes long, g13 pointed to it on entry.  */
+
+extern use_struct_convention_fn i960_use_struct_convention;
+#define USE_STRUCT_CONVENTION(gcc_p, type) i960_use_struct_convention (gcc_p, type)
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  This is only called if USE_STRUCT_CONVENTION for this
+   type is 0.
+
+   On the i960 we just take as many bytes as we need from G0 through G3.  */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+	memcpy(VALBUF, REGBUF+REGISTER_BYTE(G0_REGNUM), TYPE_LENGTH (TYPE))
+
+/* If USE_STRUCT_CONVENTION produces a 1, 
+   extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one).
+
+   Address of where to put structure was passed in in global
+   register g13 on entry.  God knows what's in g13 now.  The
+   (..., 0) below is to make it appear to return a value, though
+   actually all it does is call error().  */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+   (error("Don't know where large structure is returned on i960"), 0)
+
+/* Write into appropriate registers a function return value
+   of type TYPE, given in virtual format, for "value returning" functions.
+
+   For 'return' command:  not (yet) implemented for i960.  */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+    error ("Returning values from functions is not implemented in i960 gdb")
+
+/* Store the address of the place in which to copy the structure the
+   subroutine will return.  This is called from call_function. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+    error ("Returning values from functions is not implemented in i960 gdb")
+
+/* Describe the pointer in each stack frame to the previous stack frame
+   (its caller).  */
+
+/* FRAME_CHAIN takes a frame's nominal address
+   and produces the frame's chain-pointer.
+
+   However, if FRAME_CHAIN_VALID returns zero,
+   it means the given frame is the outermost one and has no caller.  */
+
+/* We cache information about saved registers in the frame structure,
+   to save us from having to re-scan function prologues every time
+   a register in a non-current frame is accessed.  */
+
+#define EXTRA_FRAME_INFO 	\
+	struct frame_saved_regs *fsr;	\
+	CORE_ADDR arg_pointer;
+
+/* Zero the frame_saved_regs pointer when the frame is initialized,
+   so that FRAME_FIND_SAVED_REGS () will know to allocate and
+   initialize a frame_saved_regs struct the first time it is called.
+   Set the arg_pointer to -1, which is not valid; 0 and other values
+   indicate real, cached values.  */
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
+	((fi)->fsr = 0, (fi)->arg_pointer = -1)
+
+/* On the i960, we get the chain pointer by reading the PFP saved
+   on the stack and clearing the status bits.  */
+
+#define FRAME_CHAIN(thisframe) \
+  (read_memory_integer (FRAME_FP(thisframe), 4) & ~0xf)
+
+/* FRAME_CHAIN_VALID returns zero if the given frame is the outermost one
+   and has no caller.
+
+   On the i960, each various target system type must define FRAME_CHAIN_VALID,
+   since it differs between NINDY and VxWorks, the two currently supported
+   targets types.  We leave it undefined here.  */
+
+
+/* A macro that tells us whether the function invocation represented
+   by FI does not have a frame on the stack associated with it.  If it
+   does not, FRAMELESS is set to 1, else 0.  */
+
+CORE_ADDR leafproc_return (CORE_ADDR ip);
+#define FRAMELESS_FUNCTION_INVOCATION(FI) \
+  (leafproc_return ((FI)->pc) != 0)
+
+/* Note that in the i960 architecture the return pointer is saved in the
+   *caller's* stack frame.
+
+   Make sure to zero low-order bits because of bug in 960CA A-step part
+   (instruction addresses should always be word-aligned anyway).  */
+
+#define FRAME_SAVED_PC(frame) \
+			((read_memory_integer(FRAME_CHAIN(frame)+8,4)) & ~3)
+
+/* On the i960, FRAME_ARGS_ADDRESS should return the value of
+   g14 as passed into the frame, if known.  We need a function for this.
+   We cache this value in the frame info if we've already looked it up.  */
+
+#define FRAME_ARGS_ADDRESS(fi) 	\
+  (((fi)->arg_pointer != -1)? (fi)->arg_pointer: frame_args_address (fi, 0))
+extern CORE_ADDR frame_args_address ();		/* i960-tdep.c */
+
+/* This is the same except it should return 0 when
+   it does not really know where the args are, rather than guessing.
+   This value is not cached since it is only used infrequently.  */
+
+#define	FRAME_ARGS_ADDRESS_CORRECT(fi)	(frame_args_address (fi, 1))
+
+#define FRAME_LOCALS_ADDRESS(fi)	(fi)->frame
+
+/* Set NUMARGS to the number of args passed to a frame.
+   Can return -1, meaning no way to tell.  */
+
+#define FRAME_NUM_ARGS(fi)	(-1)
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Produce the positions of the saved registers in a stack frame.  */
+
+#define FRAME_FIND_SAVED_REGS(frame_info_addr, sr) \
+	frame_find_saved_regs (frame_info_addr, &sr)
+extern void frame_find_saved_regs ();	/* See i960-tdep.c */
+
+/* Things needed for making calls to functions in the inferior process */
+
+/* Push an empty stack frame, to record the current ip, etc.
+
+   Not (yet?) implemented for i960.  */
+
+#define PUSH_DUMMY_FRAME	\
+error("Function calls into the inferior process are not supported on the i960")
+
+/* Discard from the stack the innermost frame, restoring all registers.  */
+
+
+void i960_pop_frame (void);
+#define POP_FRAME \
+	i960_pop_frame ()
+
+
+/* This sequence of words is the instructions
+
+   callx 0x00000000
+   fmark
+ */
+
+/* #define CALL_DUMMY { 0x86003000, 0x00000000, 0x66003e00 } */
+
+																			    /* #define CALL_DUMMY_START_OFFSET 0 *//* Start execution at beginning of dummy */
+
+/* Indicate that we don't support calling inferior child functions.  */
+
+#undef CALL_DUMMY
+
+/* Insert the specified number of args and function address
+   into a call sequence of the above form stored at 'dummyname'.
+
+   Ignore arg count on i960.  */
+
+/* #define FIX_CALL_DUMMY(dummyname, fun, nargs) *(((int *)dummyname)+1) = fun */
+
+#undef FIX_CALL_DUMMY
+
+
+/* Interface definitions for kernel debugger KDB */
+/* (Not relevant to i960.) */
diff --git a/gdb/config/i960/tm-mon960.h b/gdb/config/i960/tm-mon960.h
new file mode 100644
index 00000000000..98c03b137eb
--- /dev/null
+++ b/gdb/config/i960/tm-mon960.h
@@ -0,0 +1,69 @@
+/* Parameters for Intel 960 running MON960 monitor, for GDB, the GNU debugger.
+   Copyright 1990, 1991, 1996, 1999, 2000 Free Software Foundation, Inc.
+   Contributed by Intel Corporation and Cygnus Support.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/*****************************************************************************
+ * Definitions to target GDB to an i960 debugged over a serial line.
+ ******************************************************************************/
+
+#include "i960/tm-i960.h"
+
+/* forward declarations */
+struct frame_info;
+
+/* redefined from tm-i960.h */
+/* Number of machine registers */
+#undef NUM_REGS
+#define NUM_REGS 40
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+#undef REGISTER_NAMES
+#define REGISTER_NAMES { \
+	/*  0 */ "pfp", "sp",  "rip", "r3",  "r4",  "r5",  "r6",  "r7", \
+	/*  8 */ "r8",  "r9",  "r10", "r11", "r12", "r13", "r14", "r15",\
+	/* 16 */ "g0",  "g1",  "g2",  "g3",  "g4",  "g5",  "g6",  "g7", \
+	/* 24 */ "g8",  "g9",  "g10", "g11", "g12", "g13", "g14", "fp", \
+	/* 32 */ "pc",  "ac",  "tc",  "ip",  "fp0", "fp1", "fp2", "fp3",\
+}
+
+/* Override the standard gdb prompt when compiled for this target.  */
+
+#define	DEFAULT_PROMPT	"(gdb960) "
+
+/* FRAME_CHAIN_VALID returns zero if the given frame is the outermost one
+   and has no caller.
+
+   On the i960, each various target system type defines FRAME_CHAIN_VALID,
+   since it differs between Nindy, Mon960 and VxWorks, the currently supported
+   target types.  */
+
+extern int mon960_frame_chain_valid (CORE_ADDR, struct frame_info *);
+#define	FRAME_CHAIN_VALID(chain, thisframe) mon960_frame_chain_valid (chain, thisframe)
+
+/* Sequence of bytes for breakpoint instruction */
+
+#define BREAKPOINT {0x00, 0x3e, 0x00, 0x66}
+
+/* Amount ip must be decremented by after a breakpoint.
+ * This is often the number of bytes in BREAKPOINT but not always.
+ */
+
+#define DECR_PC_AFTER_BREAK 4
diff --git a/gdb/config/i960/tm-nindy960.h b/gdb/config/i960/tm-nindy960.h
new file mode 100644
index 00000000000..e9cb99c9f4b
--- /dev/null
+++ b/gdb/config/i960/tm-nindy960.h
@@ -0,0 +1,106 @@
+/* Parameters for Intel 960 running NINDY monitor, for GDB, the GNU debugger.
+   Copyright 1990, 1991, 1996, 1999, 2000 Free Software Foundation, Inc.
+   Contributed by Intel Corporation and Cygnus Support.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/*****************************************************************************
+ * Definitions to target GDB to an i960 debugged over a serial line.
+ ******************************************************************************/
+
+#include "i960/tm-i960.h"
+
+/* forward declarations */
+struct frame_info;
+
+/* Override the standard gdb prompt when compiled for this target.  */
+
+#define	DEFAULT_PROMPT	"(gdb960) "
+
+/* Additional command line options accepted by nindy gdb's, for handling
+   the remote-nindy.c interface.  These should really be target-specific
+   rather than architecture-specific.  */
+
+extern int nindy_old_protocol;	/* nonzero if old NINDY serial protocol */
+extern int nindy_initial_brk;	/* Send a BREAK to reset board first */
+extern char *nindy_ttyname;	/* Name of serial port to talk to nindy */
+
+#define	ADDITIONAL_OPTIONS \
+	{"O", no_argument, &nindy_old_protocol, 1},	\
+	{"brk", no_argument, &nindy_initial_brk, 1},	\
+	{"ser", required_argument, 0, 1004},	/* 1004 is magic cookie for ADDL_CASES */
+
+#define	ADDITIONAL_OPTION_CASES	\
+	case 1004:	/* -ser option:  remote nindy auto-start */	\
+	  nindy_ttyname = optarg;	\
+	  break;
+
+#define	ADDITIONAL_OPTION_HELP \
+	"\
+  -O                Use old protocol to talk to a Nindy target\n\
+  -brk              Send a break to a Nindy target to reset it.\n\
+  -ser SERIAL       Open remote Nindy session to SERIAL port.\n\
+"
+
+/* If specified on the command line, open tty for talking to nindy,
+   and download the executable file if one was specified.  */
+
+extern void nindy_open (char *name, int from_tty);
+#define	ADDITIONAL_OPTION_HANDLER					\
+	if (nindy_ttyname != NULL)					\
+          {								\
+            if (catch_command_errors (nindy_open, nindy_ttyname,	\
+				      !batch, RETURN_MASK_ALL))		\
+	      {								\
+                if (execarg != NULL)					\
+                  catch_command_errors (target_load, execarg, !batch,	\
+					RETURN_MASK_ALL);		\
+	      }								\
+	  }
+
+/* If configured for i960 target, we take control before main loop
+   and demand that we configure for a nindy target.  */
+
+#define	BEFORE_MAIN_LOOP_HOOK	\
+  nindy_before_main_loop();
+
+extern void
+  nindy_before_main_loop ();	/* In remote-nindy.c */
+
+/* FRAME_CHAIN_VALID returns zero if the given frame is the outermost one
+   and has no caller.
+
+   On the i960, each various target system type defines FRAME_CHAIN_VALID,
+   since it differs between NINDY and VxWorks, the two currently supported
+   targets types.  */
+
+extern int nindy_frame_chain_valid (CORE_ADDR, struct frame_info *);
+#define	FRAME_CHAIN_VALID(chain, thisframe) nindy_frame_chain_valid (chain, thisframe)
+
+extern int
+  nindy_frame_chain_valid ();	/* See nindy-tdep.c */
+
+/* Sequence of bytes for breakpoint instruction */
+
+#define BREAKPOINT {0x00, 0x3e, 0x00, 0x66}
+
+/* Amount ip must be decremented by after a breakpoint.
+ * This is often the number of bytes in BREAKPOINT but not always.
+ */
+
+#define DECR_PC_AFTER_BREAK 0
diff --git a/gdb/config/i960/tm-vx960.h b/gdb/config/i960/tm-vx960.h
new file mode 100644
index 00000000000..16fc62ac6bb
--- /dev/null
+++ b/gdb/config/i960/tm-vx960.h
@@ -0,0 +1,52 @@
+/* Parameters for VxWorks Intel 960's, for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993, 1998, 1999
+   Free Software Foundation, Inc.
+   Contributed by Cygnus Support.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "i960/tm-i960.h"
+#include "tm-vxworks.h"
+
+/* Under VxWorks the IP isn't filled in.  Skip it, go with RIP, which has
+   the real value.  */
+#undef PC_REGNUM
+#define PC_REGNUM RIP_REGNUM
+
+/* We have more complex, useful breakpoints on the target.
+   Amount ip must be decremented by after a breakpoint.  */
+
+#define	DECR_PC_AFTER_BREAK	0
+
+/* We are guaranteed to have a zero frame pointer at bottom of stack, too. */
+
+#define FRAME_CHAIN_VALID(chain, thisframe) nonnull_frame_chain_valid (chain, thisframe)
+
+/* Breakpoint patching is handled at the target end in VxWorks.  */
+/* #define BREAKPOINT {0x00, 0x3e, 0x00, 0x66} */
+
+/* Number of registers in a ptrace_getregs call. */
+
+#define VX_NUM_REGS (16 + 16 + 3)
+
+/* Number of registers in a ptrace_getfpregs call. */
+
+    /* @@ Can't use this -- the rdb library for the 960 target
+       doesn't support setting or retrieving FP regs.  KR  */
+
+/* #define VX_SIZE_FPREGS (REGISTER_RAW_SIZE (FP0_REGNUM) * 4) */
diff --git a/gdb/config/i960/vxworks960.mt b/gdb/config/i960/vxworks960.mt
new file mode 100644
index 00000000000..ad3293421f7
--- /dev/null
+++ b/gdb/config/i960/vxworks960.mt
@@ -0,0 +1,6 @@
+# Target: VxWorks running on an Intel 960
+TDEPFILES= i960-tdep.o remote-vx.o remote-vx960.o xdr_ld.o xdr_ptrace.o xdr_rdb.o
+TM_FILE= tm-vx960.h
+
+# Define this for the vx-share routines, which don't see param.h.
+MT_CFLAGS= -DI80960
diff --git a/gdb/config/ia64/aix.mh b/gdb/config/ia64/aix.mh
new file mode 100644
index 00000000000..e1805946970
--- /dev/null
+++ b/gdb/config/ia64/aix.mh
@@ -0,0 +1,8 @@
+# Host: Intel IA-64 running AIX
+
+XM_FILE= xm-aix.h
+
+NAT_FILE= nm-aix.h
+NATDEPFILES= corelow.o core-regset.o solib.o solib-aix5.o fork-child.o \
+	procfs.o proc-api.o proc-events.o proc-flags.o proc-why.o \
+	ia64-aix-nat.o
diff --git a/gdb/config/ia64/aix.mt b/gdb/config/ia64/aix.mt
new file mode 100644
index 00000000000..0348146c3f5
--- /dev/null
+++ b/gdb/config/ia64/aix.mt
@@ -0,0 +1,4 @@
+# Target: Intel IA-64 running AIX
+
+TDEPFILES= ia64-tdep.o ia64-linux-tdep.o ia64-aix-tdep.o
+TM_FILE= tm-aix.h
diff --git a/gdb/config/ia64/linux.mh b/gdb/config/ia64/linux.mh
new file mode 100644
index 00000000000..65f30284e1c
--- /dev/null
+++ b/gdb/config/ia64/linux.mh
@@ -0,0 +1,10 @@
+# Host: Intel IA-64 running GNU/Linux
+
+XM_FILE= xm-linux.h
+
+NAT_FILE= nm-linux.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o gcore.o \
+	core-aout.o core-regset.o ia64-linux-nat.o linux-proc.o \
+	proc-service.o thread-db.o lin-lwp.o
+
+LOADLIBES = -ldl -rdynamic
diff --git a/gdb/config/ia64/linux.mt b/gdb/config/ia64/linux.mt
new file mode 100644
index 00000000000..d841f75f37f
--- /dev/null
+++ b/gdb/config/ia64/linux.mt
@@ -0,0 +1,6 @@
+# Target: Intel IA-64 running GNU/Linux
+TDEPFILES= ia64-tdep.o ia64-aix-tdep.o ia64-linux-tdep.o \
+	solib.o solib-svr4.o solib-legacy.o
+TM_FILE= tm-linux.h
+
+GDBSERVER_DEPFILES = linux-low.o linux-ia64-low.o reg-ia64.o
diff --git a/gdb/config/ia64/nm-aix.h b/gdb/config/ia64/nm-aix.h
new file mode 100644
index 00000000000..3f6764c3027
--- /dev/null
+++ b/gdb/config/ia64/nm-aix.h
@@ -0,0 +1,37 @@
+/* Native support for AIX, for GDB, the GNU debugger.
+   Copyright 2000, 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_AIX_H
+#define NM_AIX_H
+
+#include "nm-sysv4.h"
+
+#ifndef AIX5
+#define AIX5 1
+#endif
+
+/* Type of the operation code for sending control messages to the
+   /proc/PID/ctl file */
+#define PROC_CTL_WORD_TYPE int
+
+#define GDB_GREGSET_T prgregset_t
+#define GDB_FPREGSET_T prfpregset_t
+
+#endif /* #ifndef NM_AIX_H */
diff --git a/gdb/config/ia64/nm-linux.h b/gdb/config/ia64/nm-linux.h
new file mode 100644
index 00000000000..2c980c0ad9a
--- /dev/null
+++ b/gdb/config/ia64/nm-linux.h
@@ -0,0 +1,79 @@
+/* Native support for GNU/Linux, for GDB, the GNU debugger.
+   Copyright 1999, 2000, 2001
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_LINUX_H
+#define NM_LINUX_H
+
+#include "nm-linux.h"
+
+/* Note:  It seems likely that we'll have to eventually define
+   FETCH_INFERIOR_REGISTERS.  But until that time, we'll make do
+   with the following. */
+
+#define CANNOT_FETCH_REGISTER(regno) ia64_cannot_fetch_register(regno)
+extern int ia64_cannot_fetch_register (int regno);
+
+#define CANNOT_STORE_REGISTER(regno) ia64_cannot_store_register(regno)
+extern int ia64_cannot_store_register (int regno);
+
+#ifdef GDBSERVER
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+	(addr) = ia64_register_u_addr ((blockend),(regno));
+
+extern int ia64_register_u_addr(int, int);
+#endif /* GDBSERVER */
+
+#define U_REGS_OFFSET 0
+
+#define PTRACE_ARG3_TYPE long
+#define PTRACE_XFER_TYPE long
+
+/* Hardware watchpoints */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) 1
+
+/* The IA-64 architecture can step over a watch point (without triggering
+   it again) if the "dd" (data debug fault disable) bit in the processor
+   status word is set.
+   
+   This PSR bit is set in ia64_linux_stopped_by_watchpoint when the
+   code there has determined that a hardware watchpoint has indeed
+   been hit.  The CPU will then be able to execute one instruction 
+   without triggering a watchpoint. */
+#define HAVE_STEPPABLE_WATCHPOINT 1
+
+#define STOPPED_BY_WATCHPOINT(W) \
+  ia64_linux_stopped_by_watchpoint (inferior_ptid)
+extern CORE_ADDR ia64_linux_stopped_by_watchpoint (ptid_t ptid);
+
+#define target_insert_watchpoint(addr, len, type) \
+  ia64_linux_insert_watchpoint (inferior_ptid, addr, len, type)
+extern int ia64_linux_insert_watchpoint (ptid_t ptid, CORE_ADDR addr,
+                                         int len, int rw);
+
+#define target_remove_watchpoint(addr, len, type) \
+  ia64_linux_remove_watchpoint (inferior_ptid, addr, len)
+extern int ia64_linux_remove_watchpoint (ptid_t ptid, CORE_ADDR addr,
+                                         int len);
+
+#endif /* #ifndef NM_LINUX_H */
diff --git a/gdb/config/ia64/tm-aix.h b/gdb/config/ia64/tm-aix.h
new file mode 100644
index 00000000000..0160140c680
--- /dev/null
+++ b/gdb/config/ia64/tm-aix.h
@@ -0,0 +1,32 @@
+/* Definitions to target GDB to GNU/Linux on IA-64 running AIX.
+   Copyright 2000, 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_AIX_H
+#define TM_AIX_H
+
+#include "ia64/tm-ia64.h"
+#include "tm-sysv4.h"
+
+#define TARGET_ELF64
+
+extern int ia64_aix_in_sigtramp (CORE_ADDR pc, char *func_name);
+#define IN_SIGTRAMP(pc,func_name) ia64_aix_in_sigtramp (pc, func_name)
+
+#endif /* #ifndef TM_AIX_H */
diff --git a/gdb/config/ia64/tm-ia64.h b/gdb/config/ia64/tm-ia64.h
new file mode 100644
index 00000000000..d08e59bccd5
--- /dev/null
+++ b/gdb/config/ia64/tm-ia64.h
@@ -0,0 +1,252 @@
+/* Definitions to target GDB to GNU/Linux on an ia64 architecture.
+   Copyright 1992, 1993, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_IA64_H
+#define TM_IA64_H
+
+#if !defined(GDBSERVER)
+
+#define GDB_MULTI_ARCH 1
+
+#else /* defines needed for GDBSERVER */
+
+/* Say how long (ordinary) registers are.  This is a piece of bogosity
+   used in push_word and a few other places; REGISTER_RAW_SIZE is the
+   real way to know how big a register is.  */
+
+#define REGISTER_SIZE 8
+
+#undef  NUM_REGS
+#define NUM_REGS 590
+
+/* Some pseudo register numbers */
+
+#define PC_REGNUM	IA64_IP_REGNUM
+#define SP_REGNUM	IA64_GR12_REGNUM
+#define FP_REGNUM	IA64_VFP_REGNUM
+
+/* Total amount of space needed to store our copies of the machine's
+   register state, the array `registers'.  On the ia64, all registers
+   fit in 64 bits except for the floating point registers which require
+   84 bits.  But 84 isn't a nice number, so we'll just allocate 128
+   bits for each of these.  The expression below says that we
+   need 8 bytes for each register, plus an additional 8 bytes for each
+   of the 128 floating point registers. */
+
+#define REGISTER_BYTES (NUM_REGS*8+128*8)
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+
+#define REGISTER_BYTE(N) (((N) * 8) \
+  + ((N) <= IA64_FR0_REGNUM ? 0 : 8 * (((N) > IA64_FR127_REGNUM) ? 128 : (N) - IA64_FR0_REGNUM)))
+
+/* Number of bytes of storage in the actual machine representation
+   for register N.  */
+
+#define REGISTER_RAW_SIZE(N) \
+  ((IA64_FR0_REGNUM <= (N) && (N) <= IA64_FR127_REGNUM) ? 16 : 8)
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+
+#define MAX_REGISTER_RAW_SIZE 16
+
+
+#define GDBSERVER_RESUME_REGS { IA64_IP_REGNUM, IA64_PSR_REGNUM, SP_REGNUM, IA64_BSP_REGNUM, IA64_CFM_REGNUM }
+
+#endif /* GDBSERVER */
+
+
+/* Register numbers of various important registers */
+
+/* General registers; there are 128 of these 64 bit wide registers.  The
+   first 32 are static and the last 96 are stacked. */
+#define IA64_GR0_REGNUM		0
+#define IA64_GR1_REGNUM		(IA64_GR0_REGNUM+1)
+#define IA64_GR2_REGNUM		(IA64_GR0_REGNUM+2)
+#define IA64_GR3_REGNUM		(IA64_GR0_REGNUM+3)
+#define IA64_GR4_REGNUM		(IA64_GR0_REGNUM+4)
+#define IA64_GR5_REGNUM		(IA64_GR0_REGNUM+5)
+#define IA64_GR6_REGNUM		(IA64_GR0_REGNUM+6)
+#define IA64_GR7_REGNUM		(IA64_GR0_REGNUM+7)
+#define IA64_GR8_REGNUM		(IA64_GR0_REGNUM+8)
+#define IA64_GR9_REGNUM		(IA64_GR0_REGNUM+9)
+#define IA64_GR10_REGNUM	(IA64_GR0_REGNUM+10)
+#define IA64_GR11_REGNUM	(IA64_GR0_REGNUM+11)
+#define IA64_GR12_REGNUM	(IA64_GR0_REGNUM+12)
+#define IA64_GR31_REGNUM	(IA64_GR0_REGNUM+31)
+#define IA64_GR32_REGNUM	(IA64_GR0_REGNUM+32)
+#define IA64_GR127_REGNUM	(IA64_GR0_REGNUM+127)
+
+/* Floating point registers; 128 82-bit wide registers */
+#define IA64_FR0_REGNUM		128
+#define IA64_FR1_REGNUM		(IA64_FR0_REGNUM+1)
+#define IA64_FR2_REGNUM		(IA64_FR0_REGNUM+2)
+#define IA64_FR8_REGNUM		(IA64_FR0_REGNUM+8)
+#define IA64_FR9_REGNUM		(IA64_FR0_REGNUM+9)
+#define IA64_FR10_REGNUM	(IA64_FR0_REGNUM+10)
+#define IA64_FR11_REGNUM	(IA64_FR0_REGNUM+11)
+#define IA64_FR12_REGNUM	(IA64_FR0_REGNUM+12)
+#define IA64_FR13_REGNUM	(IA64_FR0_REGNUM+13)
+#define IA64_FR14_REGNUM	(IA64_FR0_REGNUM+14)
+#define IA64_FR15_REGNUM	(IA64_FR0_REGNUM+15)
+#define IA64_FR16_REGNUM	(IA64_FR0_REGNUM+16)
+#define IA64_FR31_REGNUM	(IA64_FR0_REGNUM+31)
+#define IA64_FR32_REGNUM	(IA64_FR0_REGNUM+32)
+#define IA64_FR127_REGNUM	(IA64_FR0_REGNUM+127)
+
+/* Predicate registers; There are 64 of these one bit registers.
+   It'd be more convenient (implementation-wise) to use a single
+   64 bit word with all of these register in them.  Note that there's
+   also a IA64_PR_REGNUM below which contains all the bits and is used for
+   communicating the actual values to the target. */
+
+#define IA64_PR0_REGNUM		256
+#define IA64_PR1_REGNUM		(IA64_PR0_REGNUM+1)
+#define IA64_PR2_REGNUM		(IA64_PR0_REGNUM+2)
+#define IA64_PR3_REGNUM		(IA64_PR0_REGNUM+3)
+#define IA64_PR4_REGNUM		(IA64_PR0_REGNUM+4)
+#define IA64_PR5_REGNUM		(IA64_PR0_REGNUM+5)
+#define IA64_PR6_REGNUM		(IA64_PR0_REGNUM+6)
+#define IA64_PR7_REGNUM		(IA64_PR0_REGNUM+7)
+#define IA64_PR8_REGNUM		(IA64_PR0_REGNUM+8)
+#define IA64_PR9_REGNUM		(IA64_PR0_REGNUM+9)
+#define IA64_PR10_REGNUM	(IA64_PR0_REGNUM+10)
+#define IA64_PR11_REGNUM	(IA64_PR0_REGNUM+11)
+#define IA64_PR12_REGNUM	(IA64_PR0_REGNUM+12)
+#define IA64_PR13_REGNUM	(IA64_PR0_REGNUM+13)
+#define IA64_PR14_REGNUM	(IA64_PR0_REGNUM+14)
+#define IA64_PR15_REGNUM	(IA64_PR0_REGNUM+15)
+#define IA64_PR16_REGNUM	(IA64_PR0_REGNUM+16)
+#define IA64_PR17_REGNUM	(IA64_PR0_REGNUM+17)
+#define IA64_PR18_REGNUM	(IA64_PR0_REGNUM+18)
+#define IA64_PR19_REGNUM	(IA64_PR0_REGNUM+19)
+#define IA64_PR20_REGNUM	(IA64_PR0_REGNUM+20)
+#define IA64_PR21_REGNUM	(IA64_PR0_REGNUM+21)
+#define IA64_PR22_REGNUM	(IA64_PR0_REGNUM+22)
+#define IA64_PR23_REGNUM	(IA64_PR0_REGNUM+23)
+#define IA64_PR24_REGNUM	(IA64_PR0_REGNUM+24)
+#define IA64_PR25_REGNUM	(IA64_PR0_REGNUM+25)
+#define IA64_PR26_REGNUM	(IA64_PR0_REGNUM+26)
+#define IA64_PR27_REGNUM	(IA64_PR0_REGNUM+27)
+#define IA64_PR28_REGNUM	(IA64_PR0_REGNUM+28)
+#define IA64_PR29_REGNUM	(IA64_PR0_REGNUM+29)
+#define IA64_PR30_REGNUM	(IA64_PR0_REGNUM+30)
+#define IA64_PR31_REGNUM	(IA64_PR0_REGNUM+31)
+#define IA64_PR32_REGNUM	(IA64_PR0_REGNUM+32)
+#define IA64_PR33_REGNUM	(IA64_PR0_REGNUM+33)
+#define IA64_PR34_REGNUM	(IA64_PR0_REGNUM+34)
+#define IA64_PR35_REGNUM	(IA64_PR0_REGNUM+35)
+#define IA64_PR36_REGNUM	(IA64_PR0_REGNUM+36)
+#define IA64_PR37_REGNUM	(IA64_PR0_REGNUM+37)
+#define IA64_PR38_REGNUM	(IA64_PR0_REGNUM+38)
+#define IA64_PR39_REGNUM	(IA64_PR0_REGNUM+39)
+#define IA64_PR40_REGNUM	(IA64_PR0_REGNUM+40)
+#define IA64_PR41_REGNUM	(IA64_PR0_REGNUM+41)
+#define IA64_PR42_REGNUM	(IA64_PR0_REGNUM+42)
+#define IA64_PR43_REGNUM	(IA64_PR0_REGNUM+43)
+#define IA64_PR44_REGNUM	(IA64_PR0_REGNUM+44)
+#define IA64_PR45_REGNUM	(IA64_PR0_REGNUM+45)
+#define IA64_PR46_REGNUM	(IA64_PR0_REGNUM+46)
+#define IA64_PR47_REGNUM	(IA64_PR0_REGNUM+47)
+#define IA64_PR48_REGNUM	(IA64_PR0_REGNUM+48)
+#define IA64_PR49_REGNUM	(IA64_PR0_REGNUM+49)
+#define IA64_PR50_REGNUM	(IA64_PR0_REGNUM+50)
+#define IA64_PR51_REGNUM	(IA64_PR0_REGNUM+51)
+#define IA64_PR52_REGNUM	(IA64_PR0_REGNUM+52)
+#define IA64_PR53_REGNUM	(IA64_PR0_REGNUM+53)
+#define IA64_PR54_REGNUM	(IA64_PR0_REGNUM+54)
+#define IA64_PR55_REGNUM	(IA64_PR0_REGNUM+55)
+#define IA64_PR56_REGNUM	(IA64_PR0_REGNUM+56)
+#define IA64_PR57_REGNUM	(IA64_PR0_REGNUM+57)
+#define IA64_PR58_REGNUM	(IA64_PR0_REGNUM+58)
+#define IA64_PR59_REGNUM	(IA64_PR0_REGNUM+59)
+#define IA64_PR60_REGNUM	(IA64_PR0_REGNUM+60)
+#define IA64_PR61_REGNUM	(IA64_PR0_REGNUM+61)
+#define IA64_PR62_REGNUM	(IA64_PR0_REGNUM+62)
+#define IA64_PR63_REGNUM	(IA64_PR0_REGNUM+63)
+
+
+/* Branch registers: 8 64-bit registers for holding branch targets */
+#define IA64_BR0_REGNUM		320
+#define IA64_BR1_REGNUM		(IA64_BR0_REGNUM+1)
+#define IA64_BR2_REGNUM		(IA64_BR0_REGNUM+2)
+#define IA64_BR3_REGNUM		(IA64_BR0_REGNUM+3)
+#define IA64_BR4_REGNUM		(IA64_BR0_REGNUM+4)
+#define IA64_BR5_REGNUM		(IA64_BR0_REGNUM+5)
+#define IA64_BR6_REGNUM		(IA64_BR0_REGNUM+6)
+#define IA64_BR7_REGNUM		(IA64_BR0_REGNUM+7)
+
+/* Virtual frame pointer; this matches IA64_FRAME_POINTER_REGNUM in
+   gcc/config/ia64/ia64.h. */
+#define IA64_VFP_REGNUM		328
+
+/* Virtual return address pointer; this matches IA64_RETURN_ADDRESS_POINTER_REGNUM
+   in gcc/config/ia64/ia64.h. */
+#define IA64_VRAP_REGNUM	329
+
+/* Predicate registers: There are 64 of these 1-bit registers.  We
+   define a single register which is used to communicate these values
+   to/from the target.  We will somehow contrive to make it appear that
+   IA64_PR0_REGNUM thru IA64_PR63_REGNUM hold the actual values. */
+#define IA64_PR_REGNUM		330
+
+/* Instruction pointer: 64 bits wide */
+#define IA64_IP_REGNUM		331
+
+/* Process Status Register */
+#define IA64_PSR_REGNUM		332
+
+/* Current Frame Marker (Raw form may be the cr.ifs) */
+#define IA64_CFM_REGNUM		333
+
+/* Application registers; 128 64-bit wide registers possible, but some
+  of them are reserved */
+#define IA64_AR0_REGNUM		334
+#define IA64_KR0_REGNUM		(IA64_AR0_REGNUM+0)
+#define IA64_KR7_REGNUM		(IA64_KR0_REGNUM+7)
+
+#define IA64_RSC_REGNUM		(IA64_AR0_REGNUM+16)
+#define IA64_BSP_REGNUM		(IA64_AR0_REGNUM+17)
+#define IA64_BSPSTORE_REGNUM	(IA64_AR0_REGNUM+18)
+#define IA64_RNAT_REGNUM	(IA64_AR0_REGNUM+19)
+#define IA64_FCR_REGNUM		(IA64_AR0_REGNUM+21)
+#define IA64_EFLAG_REGNUM	(IA64_AR0_REGNUM+24)
+#define IA64_CSD_REGNUM		(IA64_AR0_REGNUM+25)
+#define IA64_SSD_REGNUM		(IA64_AR0_REGNUM+26)
+#define IA64_CFLG_REGNUM	(IA64_AR0_REGNUM+27)
+#define IA64_FSR_REGNUM		(IA64_AR0_REGNUM+28)
+#define IA64_FIR_REGNUM		(IA64_AR0_REGNUM+29)
+#define IA64_FDR_REGNUM		(IA64_AR0_REGNUM+30)
+#define IA64_CCV_REGNUM		(IA64_AR0_REGNUM+32)
+#define IA64_UNAT_REGNUM	(IA64_AR0_REGNUM+36)
+#define IA64_FPSR_REGNUM	(IA64_AR0_REGNUM+40)
+#define IA64_ITC_REGNUM		(IA64_AR0_REGNUM+44)
+#define IA64_PFS_REGNUM		(IA64_AR0_REGNUM+64)
+#define IA64_LC_REGNUM		(IA64_AR0_REGNUM+65)
+#define IA64_EC_REGNUM		(IA64_AR0_REGNUM+66)
+
+/* NAT (Not A Thing) Bits for the general registers; there are 128 of these */
+#define IA64_NAT0_REGNUM	462
+#define IA64_NAT31_REGNUM	(IA64_NAT0_REGNUM+31)
+#define IA64_NAT32_REGNUM	(IA64_NAT0_REGNUM+32)
+#define IA64_NAT127_REGNUM	(IA64_NAT0_REGNUM+127)
+
+#endif /* TM_IA64_H */
diff --git a/gdb/config/ia64/tm-linux.h b/gdb/config/ia64/tm-linux.h
new file mode 100644
index 00000000000..f716d83ae41
--- /dev/null
+++ b/gdb/config/ia64/tm-linux.h
@@ -0,0 +1,34 @@
+/* Definitions to target GDB to GNU/Linux on IA-64 Linux.
+   Copyright 1992, 1993, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_LINUX_H
+#define TM_LINUX_H
+
+#define IA64_GNULINUX_TARGET
+
+#include "ia64/tm-ia64.h"
+#include "tm-linux.h"
+
+#define TARGET_ELF64
+
+extern int ia64_linux_in_sigtramp (CORE_ADDR pc, char *func_name);
+#define IN_SIGTRAMP(pc,func_name) ia64_linux_in_sigtramp (pc, func_name)
+
+#endif /* #ifndef TM_LINUX_H */
diff --git a/gdb/config/ia64/xm-aix.h b/gdb/config/ia64/xm-aix.h
new file mode 100644
index 00000000000..6ca026d493f
--- /dev/null
+++ b/gdb/config/ia64/xm-aix.h
@@ -0,0 +1,28 @@
+/* Native support for AIX, for GDB, the GNU debugger.
+   Copyright 2000, 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef XM_AIX_H
+#define XM_AIX_H
+
+/* Pick up more stuff from the generic SVR4 host include file. */
+
+#include "xm-sysv4.h"
+
+#endif /* #ifndef XM_AIX_H */
diff --git a/gdb/config/ia64/xm-linux.h b/gdb/config/ia64/xm-linux.h
new file mode 100644
index 00000000000..adf6b21b4cc
--- /dev/null
+++ b/gdb/config/ia64/xm-linux.h
@@ -0,0 +1,28 @@
+/* Native support for GNU/Linux, for GDB, the GNU debugger.
+   Copyright 1999, 2000, 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef XM_LINUX_H
+#define XM_LINUX_H
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+#define KERNEL_U_ADDR 0x0
+
+#endif /* #ifndef XM_LINUX_H */
diff --git a/gdb/config/m32r/m32r.mt b/gdb/config/m32r/m32r.mt
new file mode 100644
index 00000000000..a200853b602
--- /dev/null
+++ b/gdb/config/m32r/m32r.mt
@@ -0,0 +1,5 @@
+# Target: Mitsubishi m32r processor
+TDEPFILES= m32r-tdep.o monitor.o m32r-rom.o dsrec.o
+TM_FILE= tm-m32r.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/m32r/libsim.a
diff --git a/gdb/config/m32r/tm-m32r.h b/gdb/config/m32r/tm-m32r.h
new file mode 100644
index 00000000000..75bc7b231a6
--- /dev/null
+++ b/gdb/config/m32r/tm-m32r.h
@@ -0,0 +1,234 @@
+/* Parameters for execution on a Mitsubishi m32r processor.
+   Copyright 1996, 1997 Free Software Foundation, Inc. 
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+/* Used by mswin.  */
+#define TARGET_M32R 1
+
+/* mvs_check REGISTER_NAMES */
+#define REGISTER_NAMES \
+{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+  "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp", \
+  "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch", \
+    /*  "cond", "sm", "bsm", "ie", "bie", "bcarry",  */ \
+}
+/* mvs_check  NUM_REGS */
+#define NUM_REGS 			24
+
+/* mvs_check  REGISTER_SIZE */
+#define REGISTER_SIZE 			4
+/* mvs_check  MAX_REGISTER_RAW_SIZE */
+#define MAX_REGISTER_RAW_SIZE		4
+
+/* mvs_check  *_REGNUM */
+#define R0_REGNUM	0
+#define STRUCT_RETURN_REGNUM 0
+#define ARG0_REGNUM	0
+#define ARGLAST_REGNUM	3
+#define V0_REGNUM	0
+#define V1_REGNUM	1
+#define FP_REGNUM	13
+#define RP_REGNUM	14
+#define SP_REGNUM	15
+#define PSW_REGNUM	16
+#define CBR_REGNUM	17
+#define SPI_REGNUM	18
+#define SPU_REGNUM	19
+#define BPC_REGNUM	20
+#define PC_REGNUM	21
+#define ACCL_REGNUM	22
+#define ACCH_REGNUM	23
+
+/* mvs_check  REGISTER_BYTES */
+#define REGISTER_BYTES			(NUM_REGS * 4)
+
+/* mvs_check  REGISTER_VIRTUAL_TYPE */
+#define REGISTER_VIRTUAL_TYPE(REG)	builtin_type_int
+
+/* mvs_check  REGISTER_BYTE */
+#define REGISTER_BYTE(REG) 		((REG) * 4)
+/* mvs_check  REGISTER_VIRTUAL_SIZE */
+#define REGISTER_VIRTUAL_SIZE(REG) 	4
+/* mvs_check  REGISTER_RAW_SIZE */
+#define REGISTER_RAW_SIZE(REG)     	4
+
+/* mvs_check  MAX_REGISTER_VIRTUAL_SIZE */
+#define MAX_REGISTER_VIRTUAL_SIZE 	4
+
+/* mvs_check  BREAKPOINT */
+#define BREAKPOINT {0x10, 0xf1}
+
+/* mvs_no_check  FUNCTION_START_OFFSET */
+#define FUNCTION_START_OFFSET 0
+
+/* mvs_check  DECR_PC_AFTER_BREAK */
+#define DECR_PC_AFTER_BREAK 0
+
+/* mvs_check  INNER_THAN */
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* mvs_check  SAVED_PC_AFTER_CALL */
+#define SAVED_PC_AFTER_CALL(fi) read_register (RP_REGNUM)
+
+struct frame_info;
+struct frame_saved_regs;
+struct type;
+struct value;
+
+/* Define other aspects of the stack frame. 
+   We keep the offsets of all saved registers, 'cause we need 'em a lot!
+   We also keep the current size of the stack frame, and whether 
+   the frame pointer is valid (for frameless functions, and when we're
+   still in the prologue of a function with a frame) */
+
+/* mvs_check  EXTRA_FRAME_INFO */
+#define EXTRA_FRAME_INFO  	\
+  struct frame_saved_regs fsr;	\
+  int framesize;		\
+  int using_frame_pointer;
+
+
+extern void m32r_init_extra_frame_info (struct frame_info *fi);
+/* mvs_check  INIT_EXTRA_FRAME_INFO */
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) m32r_init_extra_frame_info (fi)
+/* mvs_no_check  INIT_FRAME_PC */
+#define INIT_FRAME_PC		/* Not necessary */
+
+extern void
+m32r_frame_find_saved_regs (struct frame_info *fi,
+			    struct frame_saved_regs *regaddr);
+
+/* Put here the code to store, into a struct frame_saved_regs,
+   the addresses of the saved registers of frame described by FRAME_INFO.
+   This includes special registers such as pc and fp saved in special
+   ways in the stack frame.  sp is even more special:
+   the address we return for it IS the sp for the next frame.  */
+
+/* mvs_check  FRAME_FIND_SAVED_REGS */
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs)	    \
+   m32r_frame_find_saved_regs(frame_info, &(frame_saved_regs))
+
+extern CORE_ADDR m32r_frame_chain (struct frame_info *fi);
+/* mvs_check  FRAME_CHAIN */
+#define FRAME_CHAIN(fi) 		m32r_frame_chain (fi)
+
+#define FRAME_CHAIN_VALID(fp, frame)	generic_file_frame_chain_valid (fp, frame)
+
+extern CORE_ADDR m32r_find_callers_reg (struct frame_info *fi, int regnum);
+extern CORE_ADDR m32r_frame_saved_pc (struct frame_info *);
+/* mvs_check  FRAME_SAVED_PC */
+#define FRAME_SAVED_PC(fi)		m32r_frame_saved_pc (fi)
+
+/* mvs_check  EXTRACT_RETURN_VALUE */
+#define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
+  memcpy ((VALBUF), \
+	  (char *)(REGBUF) + REGISTER_BYTE (V0_REGNUM) + \
+	  ((TYPE_LENGTH (TYPE) > 4 ? 8 : 4) - TYPE_LENGTH (TYPE)), \
+	  TYPE_LENGTH (TYPE))
+
+/* mvs_check  STORE_RETURN_VALUE */
+#define STORE_RETURN_VALUE(TYPE, VALBUF) \
+  write_register_bytes(REGISTER_BYTE (V0_REGNUM) + \
+		       ((TYPE_LENGTH (TYPE) > 4 ? 8:4) - TYPE_LENGTH (TYPE)),\
+		       (VALBUF), TYPE_LENGTH (TYPE));
+
+extern CORE_ADDR m32r_skip_prologue (CORE_ADDR pc);
+/* mvs_check  SKIP_PROLOGUE */
+#define SKIP_PROLOGUE(pc) (m32r_skip_prologue (pc))
+
+/* mvs_no_check  FRAME_ARGS_SKIP */
+#define FRAME_ARGS_SKIP 0
+
+/* mvs_no_check  FRAME_ARGS_ADDRESS */
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+/* mvs_no_check  FRAME_LOCALS_ADDRESS */
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+/* mvs_no_check  FRAME_NUM_ARGS */
+#define FRAME_NUM_ARGS(fi) (-1)
+
+#define COERCE_FLOAT_TO_DOUBLE(formal, actual) (1)
+
+extern void m32r_write_sp (CORE_ADDR val);
+#define TARGET_WRITE_SP m32r_write_sp
+
+
+
+
+
+
+/* struct passing and returning stuff */
+#define STORE_STRUCT_RETURN(STRUCT_ADDR, SP)	\
+	write_register (0, STRUCT_ADDR)
+
+extern use_struct_convention_fn m32r_use_struct_convention;
+#define USE_STRUCT_CONVENTION(GCC_P, TYPE) m32r_use_struct_convention (GCC_P, TYPE)
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+  extract_address (REGBUF + REGISTER_BYTE (V0_REGNUM), \
+		   REGISTER_RAW_SIZE (V0_REGNUM))
+
+#define REG_STRUCT_HAS_ADDR(gcc_p,type)     (TYPE_LENGTH (type) > 8)
+
+
+/* generic dummy frame stuff */
+
+#define PUSH_DUMMY_FRAME             generic_push_dummy_frame ()
+#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP)
+
+
+/* target-specific dummy_frame stuff */
+
+extern struct frame_info *m32r_pop_frame (struct frame_info *frame);
+/* mvs_check  POP_FRAME */
+#define POP_FRAME m32r_pop_frame (get_current_frame ())
+
+/* mvs_no_check  STACK_ALIGN */
+/* #define STACK_ALIGN(x) ((x + 3) & ~3) */
+
+extern CORE_ADDR m32r_push_return_address (CORE_ADDR, CORE_ADDR);
+extern CORE_ADDR m32r_push_arguments (int nargs,
+				      struct value **args,
+				      CORE_ADDR sp,
+				      unsigned char struct_return,
+				      CORE_ADDR struct_addr);
+
+
+
+/* mvs_no_check  PUSH_ARGUMENTS */
+#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
+  (m32r_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR))
+
+#define PUSH_RETURN_ADDRESS(PC, SP)      m32r_push_return_address (PC, SP)
+
+/* override the standard get_saved_register function with 
+   one that takes account of generic CALL_DUMMY frames */
+#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
+     generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
+
+
+#define USE_GENERIC_DUMMY_FRAMES 1
+#define CALL_DUMMY                   {0}
+#define CALL_DUMMY_LENGTH            (0)
+#define CALL_DUMMY_START_OFFSET      (0)
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+#define FIX_CALL_DUMMY(DUMMY1, STARTADDR, FUNADDR, NARGS, ARGS, TYPE, GCCP)
+#define CALL_DUMMY_LOCATION          AT_ENTRY_POINT
+#define CALL_DUMMY_ADDRESS()         entry_point_address ()
diff --git a/gdb/config/m68hc11/m68hc11.mt b/gdb/config/m68hc11/m68hc11.mt
new file mode 100644
index 00000000000..5e25eeec673
--- /dev/null
+++ b/gdb/config/m68hc11/m68hc11.mt
@@ -0,0 +1,6 @@
+# Target: Motorola 68HC11 processor
+TDEPFILES= m68hc11-tdep.o
+TM_FILE= tm-m68hc11.h
+SIM_OBS= remote-sim.o
+SIM= ../sim/m68hc11/libsim.a -lm
+
diff --git a/gdb/config/m68k/3b1.mh b/gdb/config/m68k/3b1.mh
new file mode 100644
index 00000000000..e305e672d6c
--- /dev/null
+++ b/gdb/config/m68k/3b1.mh
@@ -0,0 +1,12 @@
+# Host: AT&T 3b1/Unix pc
+# I don't think cc has been tried.  -traditional for <sys/ioctl.h>
+# (not sure whether necessary).
+CC= gcc -traditional
+# GCC runs out of virtual memory.
+# A separate CC for pinsn routines is no longer supported, though.
+# FIXME -- someone unlucky enough to have a 3B1, let bug-gcc@prep.ai.mit.edu
+# know what works and what fails on the 3B1.
+#PINSN_CC= cc
+
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
+XM_FILE= xm-3b1.h
diff --git a/gdb/config/m68k/3b1.mt b/gdb/config/m68k/3b1.mt
new file mode 100644
index 00000000000..4c5d9d4bb07
--- /dev/null
+++ b/gdb/config/m68k/3b1.mt
@@ -0,0 +1,3 @@
+# Target: AT&T 3b1/Unix pc
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-3b1.h
diff --git a/gdb/config/m68k/apollo68b.mh b/gdb/config/m68k/apollo68b.mh
new file mode 100644
index 00000000000..cf2770b35ad
--- /dev/null
+++ b/gdb/config/m68k/apollo68b.mh
@@ -0,0 +1,5 @@
+# Host: Apollo m68k, BSD mode.
+
+XM_FILE= xm-apollo68b.h
+NAT_FILE= nm-apollo68b.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o a68v-nat.o
diff --git a/gdb/config/m68k/apollo68b.mt b/gdb/config/m68k/apollo68b.mt
new file mode 100644
index 00000000000..2383d3b6156
--- /dev/null
+++ b/gdb/config/m68k/apollo68b.mt
@@ -0,0 +1,3 @@
+# Target: Apollo m68k in BSD mode
+TDEPFILES= m68k-tdep.o dstread.o
+TM_FILE= tm-apollo68b.h
diff --git a/gdb/config/m68k/apollo68v.mh b/gdb/config/m68k/apollo68v.mh
new file mode 100644
index 00000000000..6610e665f48
--- /dev/null
+++ b/gdb/config/m68k/apollo68v.mh
@@ -0,0 +1,10 @@
+# Host: Apollo, System V mode (?)
+
+XM_FILE= xm-apollo68v.h
+XM_CLIBS= -lPW
+
+NAT_FILE= nm-apollo68v.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o a68v-nat.o
+
+RANLIB=echo >/dev/null
+CC= cc -A ansi -A runtype,any -A systype,any -U__STDC__ -DNO_SYS_FILE
diff --git a/gdb/config/m68k/cisco.mt b/gdb/config/m68k/cisco.mt
new file mode 100644
index 00000000000..bc2e9214d7f
--- /dev/null
+++ b/gdb/config/m68k/cisco.mt
@@ -0,0 +1,3 @@
+# Target: Cisco Router with 68K processor
+TDEPFILES= m68k-tdep.o corelow.o core-aout.o
+TM_FILE= tm-cisco.h
diff --git a/gdb/config/m68k/delta68.mh b/gdb/config/m68k/delta68.mh
new file mode 100644
index 00000000000..5492af08d73
--- /dev/null
+++ b/gdb/config/m68k/delta68.mh
@@ -0,0 +1,5 @@
+# Host: Motorola Delta Series sysV68 R3V7.1
+
+XM_FILE= xm-delta68.h
+NAT_FILE= nm-delta68.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o delta68-nat.o
diff --git a/gdb/config/m68k/delta68.mt b/gdb/config/m68k/delta68.mt
new file mode 100644
index 00000000000..2761329f2c8
--- /dev/null
+++ b/gdb/config/m68k/delta68.mt
@@ -0,0 +1,3 @@
+# Motorola Delta Series sysV68 R3V7.1
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-delta68.h
diff --git a/gdb/config/m68k/dpx2.mh b/gdb/config/m68k/dpx2.mh
new file mode 100644
index 00000000000..25ed85ee6fd
--- /dev/null
+++ b/gdb/config/m68k/dpx2.mh
@@ -0,0 +1,6 @@
+# Host: Bull DPX2 (68k, System V release 3)
+
+XM_FILE= xm-dpx2.h
+
+NAT_FILE= nm-dpx2.h
+NATDEPFILES= infptrace.o corelow.o core-aout.o inftarg.o dpx2-nat.o fork-child.o
diff --git a/gdb/config/m68k/dpx2.mt b/gdb/config/m68k/dpx2.mt
new file mode 100644
index 00000000000..5bbbbe6fd8d
--- /dev/null
+++ b/gdb/config/m68k/dpx2.mt
@@ -0,0 +1,3 @@
+# Target: Bull DPX2 (68k, System V release 3)
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-dpx2.h
diff --git a/gdb/config/m68k/es1800.mt b/gdb/config/m68k/es1800.mt
new file mode 100644
index 00000000000..d809c610718
--- /dev/null
+++ b/gdb/config/m68k/es1800.mt
@@ -0,0 +1,9 @@
+# Target:  Ericsson ES-1800 emulator (remote) for m68k.
+
+# remote-es.o should perhaps be part of the standard monitor.mt
+# configuration, if it is desirable to reduce the number of different
+# configurations.  However, before that happens remote-es.c has to be
+# fixed to compile on a DOS host.
+
+TDEPFILES= m68k-tdep.o remote-es.o 
+TM_FILE= tm-es1800.h
diff --git a/gdb/config/m68k/hp300bsd.mh b/gdb/config/m68k/hp300bsd.mh
new file mode 100644
index 00000000000..b0b186d671e
--- /dev/null
+++ b/gdb/config/m68k/hp300bsd.mh
@@ -0,0 +1,6 @@
+# Host: Hewlett-Packard 9000 series 300, running BSD
+
+XM_FILE= xm-hp300bsd.h
+
+NAT_FILE= nm-hp300bsd.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
diff --git a/gdb/config/m68k/hp300bsd.mt b/gdb/config/m68k/hp300bsd.mt
new file mode 100644
index 00000000000..cbcc5edb7db
--- /dev/null
+++ b/gdb/config/m68k/hp300bsd.mt
@@ -0,0 +1,3 @@
+# Target: Hewlett-Packard 9000 series 300, running BSD
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-hp300bsd.h
diff --git a/gdb/config/m68k/hp300hpux.mh b/gdb/config/m68k/hp300hpux.mh
new file mode 100644
index 00000000000..8ceb1872ca5
--- /dev/null
+++ b/gdb/config/m68k/hp300hpux.mh
@@ -0,0 +1,8 @@
+# Host: Hewlett-Packard 9000 series 300, running HPUX
+# The following is true because gcc uses a different .o file format
+# than the native HPUX compiler
+
+XM_FILE= xm-hp300hpux.h
+
+NAT_FILE= nm-hp300hpux.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o hp300ux-nat.o corelow.o core-aout.o
diff --git a/gdb/config/m68k/hp300hpux.mt b/gdb/config/m68k/hp300hpux.mt
new file mode 100644
index 00000000000..0fa801dee25
--- /dev/null
+++ b/gdb/config/m68k/hp300hpux.mt
@@ -0,0 +1,8 @@
+# Target: Hewlett-Packard 9000 series 300, running HPUX
+
+#msg Note that GDB can only read symbols from programs that were
+#msg compiled with GCC using GAS.
+#msg
+
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-hp300hpux.h
diff --git a/gdb/config/m68k/linux.mh b/gdb/config/m68k/linux.mh
new file mode 100644
index 00000000000..f94df64c104
--- /dev/null
+++ b/gdb/config/m68k/linux.mh
@@ -0,0 +1,14 @@
+# Host: Motorola m68k running GNU/Linux.
+
+XM_FILE= xm-linux.h
+
+NAT_FILE= nm-linux.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o \
+	corelow.o core-aout.o m68klinux-nat.o linux-proc.o gcore.o \
+	proc-service.o thread-db.o lin-lwp.o 
+
+# The dynamically loaded libthread_db needs access to symbols in the
+# gdb executable.
+LOADLIBES = -ldl -rdynamic
+
+GDBSERVER_DEPFILES = linux-low.o linux-m68k-low.o reg-m68k.o
diff --git a/gdb/config/m68k/linux.mt b/gdb/config/m68k/linux.mt
new file mode 100644
index 00000000000..7598fc5331c
--- /dev/null
+++ b/gdb/config/m68k/linux.mt
@@ -0,0 +1,3 @@
+# Target: Motorola m68k with a.out and ELF
+TDEPFILES= m68k-tdep.o solib.o solib-svr4.o solib-legacy.o
+TM_FILE= tm-linux.h
diff --git a/gdb/config/m68k/m68klynx.mh b/gdb/config/m68k/m68klynx.mh
new file mode 100644
index 00000000000..3838012a801
--- /dev/null
+++ b/gdb/config/m68k/m68klynx.mh
@@ -0,0 +1,6 @@
+# Host: Motorola 680x0 running LynxOS
+
+XM_CLIBS= -lbsd
+
+NAT_FILE= nm-m68klynx.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o lynx-nat.o
diff --git a/gdb/config/m68k/m68klynx.mt b/gdb/config/m68k/m68klynx.mt
new file mode 100644
index 00000000000..4aeac96d881
--- /dev/null
+++ b/gdb/config/m68k/m68klynx.mt
@@ -0,0 +1,4 @@
+# Target: Motorola 680x0 running LynxOS
+TDEPFILES= coff-solib.o m68k-tdep.o
+# m68kly-tdep.o
+TM_FILE= tm-m68klynx.h
diff --git a/gdb/config/m68k/m68kv4.mh b/gdb/config/m68k/m68kv4.mh
new file mode 100644
index 00000000000..7deb1309c08
--- /dev/null
+++ b/gdb/config/m68k/m68kv4.mh
@@ -0,0 +1,7 @@
+# Host: Motorola 680x0 running SVR4 (Commodore Amiga amix or Atari TT ASV)
+
+XM_FILE= xm-m68kv4.h
+
+NAT_FILE= nm-sysv4.h
+NATDEPFILES= corelow.o core-regset.o solib.o solib-svr4.o solib-legacy.o \
+	fork-child.o procfs.o proc-api.o proc-events.o proc-flags.o proc-why.o
diff --git a/gdb/config/m68k/m68kv4.mt b/gdb/config/m68k/m68kv4.mt
new file mode 100644
index 00000000000..fcabb172d50
--- /dev/null
+++ b/gdb/config/m68k/m68kv4.mt
@@ -0,0 +1,3 @@
+# Target: Motorola 680x0 running SVR4 (Commodore Amiga amix or Atari TT ASV)
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-m68kv4.h
diff --git a/gdb/config/m68k/monitor.mt b/gdb/config/m68k/monitor.mt
new file mode 100644
index 00000000000..46b1c55ad63
--- /dev/null
+++ b/gdb/config/m68k/monitor.mt
@@ -0,0 +1,3 @@
+# Target: Motorola m68k embedded (EST emulator, rom68k and bug monitors)
+TDEPFILES= m68k-tdep.o monitor.o remote-est.o cpu32bug-rom.o rom68k-rom.o abug-rom.o dbug-rom.o dsrec.o
+TM_FILE= tm-monitor.h
diff --git a/gdb/config/m68k/nbsdaout.mh b/gdb/config/m68k/nbsdaout.mh
new file mode 100644
index 00000000000..7ce279b332e
--- /dev/null
+++ b/gdb/config/m68k/nbsdaout.mh
@@ -0,0 +1,5 @@
+# Host: Motorola m68k running NetBSD
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o m68knbsd-nat.o \
+	solib.o solib-sunos.o
+XM_FILE= xm-nbsd.h
+NAT_FILE= nm-nbsdaout.h
diff --git a/gdb/config/m68k/nbsdaout.mt b/gdb/config/m68k/nbsdaout.mt
new file mode 100644
index 00000000000..b6ac5a000e1
--- /dev/null
+++ b/gdb/config/m68k/nbsdaout.mt
@@ -0,0 +1,3 @@
+# Target: Motorola m68k running NetBSD
+TDEPFILES= m68k-tdep.o m68knbsd-tdep.o
+TM_FILE= tm-nbsd.h
diff --git a/gdb/config/m68k/nm-apollo68b.h b/gdb/config/m68k/nm-apollo68b.h
new file mode 100644
index 00000000000..eca8bfa7ce6
--- /dev/null
+++ b/gdb/config/m68k/nm-apollo68b.h
@@ -0,0 +1,42 @@
+/* Macro defintions for an Apollo m68k in BSD mode
+   Copyright 1992, 1993, 1995, 1998 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define	FETCH_INFERIOR_REGISTERS
+
+/* Tell gdb that we can attach and detach other processes */
+#define ATTACH_DETACH
+
+#define U_REGS_OFFSET 6
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+
+#define KERNEL_U_ADDR 0
+
+#undef FLOAT_INFO		/* No float info yet */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+	(addr) = (6 + 4 * (regno))
+
+/* Apollos don't really have a USER area,so trying to read it from the
+ * process address space will fail. It does support a read from a faked
+ * USER area using the "PEEKUSER" ptrace call.
+ */
+#define PT_READ_U 3
diff --git a/gdb/config/m68k/nm-apollo68v.h b/gdb/config/m68k/nm-apollo68v.h
new file mode 100644
index 00000000000..496e105d303
--- /dev/null
+++ b/gdb/config/m68k/nm-apollo68v.h
@@ -0,0 +1,21 @@
+/* Macro defintions for an Apollo.
+   Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define	FETCH_INFERIOR_REGISTERS
diff --git a/gdb/config/m68k/nm-delta68.h b/gdb/config/m68k/nm-delta68.h
new file mode 100644
index 00000000000..78871a06a97
--- /dev/null
+++ b/gdb/config/m68k/nm-delta68.h
@@ -0,0 +1,22 @@
+/* Macro definitions for a Motorola Delta Series sysV68 R3V7.1.
+   Copyright 1993, 1998 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+
+#define KERNEL_U_SIZE kernel_u_size()
diff --git a/gdb/config/m68k/nm-dpx2.h b/gdb/config/m68k/nm-dpx2.h
new file mode 100644
index 00000000000..4c88a6c8a1e
--- /dev/null
+++ b/gdb/config/m68k/nm-dpx2.h
@@ -0,0 +1,29 @@
+/* Native support for a Bull DPX2.
+   Copyright 1986, 1987, 1989, 1993, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* KERNEL_U_ADDR is determined upon startup in dpx2-xdep.c. */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+	(addr) = dpx2_register_u_addr ((blockend),(regno));
+
+extern int dpx2_register_u_addr (int, int);
+
+/* Kernel is a bit tenacious about sharing text segments, disallowing bpts.  */
+#define	ONE_PROCESS_WRITETEXT
diff --git a/gdb/config/m68k/nm-hp300bsd.h b/gdb/config/m68k/nm-hp300bsd.h
new file mode 100644
index 00000000000..e0f7a1124bf
--- /dev/null
+++ b/gdb/config/m68k/nm-hp300bsd.h
@@ -0,0 +1,90 @@
+/* Parameters for Hewlett-Packard 9000/300 native support under bsd.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Detect whether this is 4.3 or 4.4.  */
+
+#include <errno.h>
+#include <sys/param.h>
+#ifdef	BSD4_4
+
+/* BSD 4.4 alpha or better */
+
+/* We can attach to processes using ptrace.  */
+
+#define	ATTACH_DETACH
+#define	PTRACE_ATTACH	10
+#define	PTRACE_DETACH	11
+
+/* The third argument of ptrace is declared as this type.  */
+
+#define	PTRACE_ARG3_TYPE	caddr_t
+
+/* U_REGS_OFFSET is the offset of the registers within the u area for
+   ptrace purposes.  */
+#define U_REGS_OFFSET \
+  ptrace (PT_READ_U, PIDGET (inferior_ptid), \
+	  (PTRACE_ARG3_TYPE) \
+	   (offsetof (struct user, u_kproc.kp_proc.p_md.md_regs)), 0) \
+    - USRSTACK
+
+/* No user structure in 4.4, registers are relative to kernel stack
+   which is fixed.  */
+#define KERNEL_U_ADDR	0xFFF00000
+
+/* FIXME: Is ONE_PROCESS_WRITETEXT still true now that the kernel has
+   copy-on-write?  It not, move it to the 4.3-specific section below
+   (now it is in xm-hp300bsd.h).  */
+
+#else
+
+/* This is BSD 4.3 or something like it.  */
+
+/* Get kernel u area address at run-time using BSD style nlist ().  */
+#define KERNEL_U_ADDR_BSD
+
+#endif
+
+/* This was once broken for 4.4, but probably because we had the wrong
+   KERNEL_U_ADDR.  */
+
+/* This is a piece of magic that is given a register number REGNO
+   and as BLOCKEND the address in the system of the end of the user structure
+   and stores in ADDR the address in the kernel or core dump
+   of that register.  */
+
+#define REGISTER_U_ADDR(addr, blockend, regno)				\
+{									\
+  if (regno < PS_REGNUM)						\
+    addr = (int) &((struct frame *)(blockend))->f_regs[regno];		\
+  else if (regno == PS_REGNUM)						\
+    addr = (int) &((struct frame *)(blockend))->f_stackadj;		\
+  else if (regno == PC_REGNUM)						\
+    addr = (int) &((struct frame *)(blockend))->f_pc;			\
+  else if (regno < FPC_REGNUM)						\
+    addr = (int)							\
+      &((struct user *)0)->u_pcb.pcb_fpregs.fpf_regs[((regno)-FP0_REGNUM)*3];\
+  else if (regno == FPC_REGNUM)						\
+    addr = (int) &((struct user *)0)->u_pcb.pcb_fpregs.fpf_fpcr;	\
+  else if (regno == FPS_REGNUM)						\
+    addr = (int) &((struct user *)0)->u_pcb.pcb_fpregs.fpf_fpsr;	\
+  else									\
+    addr = (int) &((struct user *)0)->u_pcb.pcb_fpregs.fpf_fpiar;	\
+}
diff --git a/gdb/config/m68k/nm-hp300hpux.h b/gdb/config/m68k/nm-hp300hpux.h
new file mode 100644
index 00000000000..b9547581ae8
--- /dev/null
+++ b/gdb/config/m68k/nm-hp300hpux.h
@@ -0,0 +1,55 @@
+/* Parameters for native support on HP 9000 model 320, for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1992, 1993, 1996
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Do implement the attach and detach commands.  */
+
+#define ATTACH_DETACH
+
+/* fetch_inferior_registers is in nat-hp300hpux.c.  */
+#define FETCH_INFERIOR_REGISTERS
+
+/* Get registers from a core file.  The floating point stuff is just
+   guesses.  */
+#define NEED_SYS_CORE_H
+#define REGISTER_U_ADDR(addr, blockend, regno)				\
+{									\
+  if (regno < PS_REGNUM)						\
+    addr = (int) (&((struct proc_regs *)(blockend))->d0 + regno);	\
+  else if (regno == PS_REGNUM)						\
+    addr = (int) ((char *) (&((struct proc_regs *)(blockend))->ps) - 2); \
+  else if (regno == PC_REGNUM)						\
+    addr = (int) &((struct proc_regs *)(blockend))->pc;			\
+  else if (regno < FPC_REGNUM)						\
+    addr = (int) (((struct proc_regs *)(blockend))->mc68881		\
+		  + ((regno) - FP0_REGNUM) / 2);			\
+  else									\
+    addr = (int) (((struct proc_regs *)(blockend))->p_float		\
+		  + (regno) - FPC_REGNUM);				\
+}
+
+/* HPUX 8.0, in its infinite wisdom, has chosen to prototype ptrace
+   with five arguments, so programs written for normal ptrace lose.
+
+   Idiots.
+
+   (They should have just made it varadic).  */
+
+#define FIVE_ARG_PTRACE
diff --git a/gdb/config/m68k/nm-linux.h b/gdb/config/m68k/nm-linux.h
new file mode 100644
index 00000000000..5c37af9ca12
--- /dev/null
+++ b/gdb/config/m68k/nm-linux.h
@@ -0,0 +1,41 @@
+/* Native support for linux, for GDB, the GNU debugger.
+   Copyright 1996, 1998, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_LINUX_H
+#define NM_LINUX_H
+
+#include "nm-linux.h"
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size (void);
+
+#define U_REGS_OFFSET 0
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+	(addr) = m68k_linux_register_u_addr ((blockend),(regno));
+
+extern int m68k_linux_register_u_addr (int, int);
+
+/* Override copies of {fetch,store}_inferior_registers in `infptrace.c'.  */
+#define FETCH_INFERIOR_REGISTERS
+
+#endif /* #ifndef NM_LINUX_H */
diff --git a/gdb/config/m68k/nm-m68klynx.h b/gdb/config/m68k/nm-m68klynx.h
new file mode 100644
index 00000000000..49114fc4df9
--- /dev/null
+++ b/gdb/config/m68k/nm-m68klynx.h
@@ -0,0 +1,26 @@
+/* Native-dependent definitions for Motorola 680x0 running LynxOS.
+   Copyright 1993 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_M68KLYNX_H
+#define NM_M68KLYNX_H
+
+#include "nm-lynx.h"
+
+#endif /* NM_M68KLYNX_H */
diff --git a/gdb/config/m68k/nm-nbsd.h b/gdb/config/m68k/nm-nbsd.h
new file mode 100644
index 00000000000..72c98895a78
--- /dev/null
+++ b/gdb/config/m68k/nm-nbsd.h
@@ -0,0 +1,27 @@
+/* Native-dependent definitions for Motorola m68k running NetBSD, for GDB.
+   Copyright 1996 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSD_H
+#define NM_NBSD_H
+
+/* Get generic NetBSD native definitions. */
+#include "config/nm-nbsd.h"
+
+#endif /* NM_NBSD_H */
diff --git a/gdb/config/m68k/nm-nbsdaout.h b/gdb/config/m68k/nm-nbsdaout.h
new file mode 100644
index 00000000000..cb755f0bed2
--- /dev/null
+++ b/gdb/config/m68k/nm-nbsdaout.h
@@ -0,0 +1,29 @@
+/* Native-dependent definitions for Motorola m68k running NetBSD, for GDB.
+   Copyright 1996, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSDAOUT_H
+#define NM_NBSDAOUT_H
+
+#include "m68k/nm-nbsd.h"
+
+/* Get generic NetBSD a.out native definitions. */
+#include "config/nm-nbsdaout.h"
+
+#endif /* NM_NBSDAOUT_H */
diff --git a/gdb/config/m68k/nm-sun2.h b/gdb/config/m68k/nm-sun2.h
new file mode 100644
index 00000000000..5d55caf2165
--- /dev/null
+++ b/gdb/config/m68k/nm-sun2.h
@@ -0,0 +1,34 @@
+/* Parameters for execution on a Sun2, for GDB, the GNU debugger.
+   Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Do implement the attach and detach commands.  */
+
+#define ATTACH_DETACH
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
+#define FETCH_INFERIOR_REGISTERS
+
+/* This is a piece of magic that is given a register number REGNO
+   and as BLOCKEND the address in the system of the end of the user structure
+   and stores in ADDR the address in the kernel or core dump
+   of that register.  */
+
+#define REGISTER_U_ADDR(addr, blockend, regno)		\
+{ addr = blockend + regno * 4; }
diff --git a/gdb/config/m68k/nm-sun3.h b/gdb/config/m68k/nm-sun3.h
new file mode 100644
index 00000000000..ba40db74b0b
--- /dev/null
+++ b/gdb/config/m68k/nm-sun3.h
@@ -0,0 +1,34 @@
+/* Native-only definitions for Sun-3 for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1996
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+/* Do implement the attach and detach commands.  */
+
+#define ATTACH_DETACH
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* We have to grab the regs since we store all regs at once.  */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
diff --git a/gdb/config/m68k/nm-sysv4.h b/gdb/config/m68k/nm-sysv4.h
new file mode 100644
index 00000000000..a7d0bdd3bda
--- /dev/null
+++ b/gdb/config/m68k/nm-sysv4.h
@@ -0,0 +1,23 @@
+/* Native-dependent definitions for Motorola 680x0 running SVR4.
+   Copyright 1994 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Include the generic SVR4 definitions.  */
+
+#include "nm-sysv4.h"
diff --git a/gdb/config/m68k/os68k.mt b/gdb/config/m68k/os68k.mt
new file mode 100644
index 00000000000..391dd894366
--- /dev/null
+++ b/gdb/config/m68k/os68k.mt
@@ -0,0 +1,3 @@
+# Target: VxWorks running on a 68000
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-os68k.h
diff --git a/gdb/config/m68k/st2000.mt b/gdb/config/m68k/st2000.mt
new file mode 100644
index 00000000000..06dfe5cbc0d
--- /dev/null
+++ b/gdb/config/m68k/st2000.mt
@@ -0,0 +1,3 @@
+# Target: Tandem ST-2000 phone switch
+TDEPFILES= m68k-tdep.o remote-st.o
+TM_FILE= tm-st2000.h
diff --git a/gdb/config/m68k/sun2os3.mh b/gdb/config/m68k/sun2os3.mh
new file mode 100644
index 00000000000..3d868daa4d6
--- /dev/null
+++ b/gdb/config/m68k/sun2os3.mh
@@ -0,0 +1,4 @@
+# Host: Sun 2, running SunOS 3
+XM_FILE= xm-sun2.h
+NAT_FILE= nm-sun2.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o sun3-nat.o
diff --git a/gdb/config/m68k/sun2os3.mt b/gdb/config/m68k/sun2os3.mt
new file mode 100644
index 00000000000..12b7c7fec8a
--- /dev/null
+++ b/gdb/config/m68k/sun2os3.mt
@@ -0,0 +1,7 @@
+# Target: Sun 2, running SunOS 3
+# The system-supplied assembler re-orders the symbols so that gdb
+# can't find "gcc_compiled.".
+#msg If you compile your program with GCC, use the GNU assembler.
+#msg
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-sun2.h
diff --git a/gdb/config/m68k/sun2os4.mh b/gdb/config/m68k/sun2os4.mh
new file mode 100644
index 00000000000..29fe1e89c82
--- /dev/null
+++ b/gdb/config/m68k/sun2os4.mh
@@ -0,0 +1,4 @@
+# Host: Sun 2, running SunOS 4
+XM_FILE= xm-sun2.h
+NAT_FILE= nm-sun2.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o sun3-nat.o
diff --git a/gdb/config/m68k/sun2os4.mt b/gdb/config/m68k/sun2os4.mt
new file mode 100644
index 00000000000..4d8e6decebe
--- /dev/null
+++ b/gdb/config/m68k/sun2os4.mt
@@ -0,0 +1,3 @@
+# Target: Sun 2, running SunOS 4
+TDEPFILES= solib.o solib-sunos.o m68k-tdep.o
+TM_FILE= tm-sun2os4.h
diff --git a/gdb/config/m68k/sun3os3.mh b/gdb/config/m68k/sun3os3.mh
new file mode 100644
index 00000000000..bf036229216
--- /dev/null
+++ b/gdb/config/m68k/sun3os3.mh
@@ -0,0 +1,4 @@
+# Host: Sun 3, running SunOS 3
+XM_FILE= xm-sun3.h
+NAT_FILE= nm-sun3.h
+NATDEPFILES= fork-child.o inftarg.o infptrace.o corelow.o sun3-nat.o
diff --git a/gdb/config/m68k/sun3os3.mt b/gdb/config/m68k/sun3os3.mt
new file mode 100644
index 00000000000..8f9dac85e0e
--- /dev/null
+++ b/gdb/config/m68k/sun3os3.mt
@@ -0,0 +1,8 @@
+# Target: Sun 3, running SunOS 3
+# The system-supplied assembler re-orders the symbols so that gdb
+# can't find "gcc_compiled.".
+#msg If you compile your program with GCC, use the GNU assembler.
+#msg
+
+TDEPFILES= m68k-tdep.o
+TM_FILE= tm-sun3.h
diff --git a/gdb/config/m68k/sun3os4.mh b/gdb/config/m68k/sun3os4.mh
new file mode 100644
index 00000000000..18b1f081258
--- /dev/null
+++ b/gdb/config/m68k/sun3os4.mh
@@ -0,0 +1,4 @@
+# Host: Sun 3, running SunOS 4
+XM_FILE= xm-sun3os4.h
+NAT_FILE= nm-sun3.h
+NATDEPFILES= fork-child.o inftarg.o infptrace.o corelow.o sun3-nat.o
diff --git a/gdb/config/m68k/sun3os4.mt b/gdb/config/m68k/sun3os4.mt
new file mode 100644
index 00000000000..64f1a300dbc
--- /dev/null
+++ b/gdb/config/m68k/sun3os4.mt
@@ -0,0 +1,3 @@
+# Target: Sun 3, running SunOS 4, as a target system
+TDEPFILES= solib.o solib-sunos.o m68k-tdep.o
+TM_FILE= tm-sun3os4.h
diff --git a/gdb/config/m68k/tm-3b1.h b/gdb/config/m68k/tm-3b1.h
new file mode 100644
index 00000000000..90888c66655
--- /dev/null
+++ b/gdb/config/m68k/tm-3b1.h
@@ -0,0 +1,33 @@
+/* Parameters for targeting GDB to a 3b1.
+   Copyright 1986, 1987, 1989, 1991, 1993 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* The child target can't deal with floating registers.  */
+#define CANNOT_STORE_REGISTER(regno) ((regno) >= FP0_REGNUM)
+
+/* Define BPT_VECTOR if it is different than the default.
+   This is the vector number used by traps to indicate a breakpoint. */
+
+#define BPT_VECTOR 0x1
+
+/* Address of end of stack space.  */
+
+#define STACK_END_ADDR 0x300000
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-apollo68b.h b/gdb/config/m68k/tm-apollo68b.h
new file mode 100644
index 00000000000..d43eec9d6cf
--- /dev/null
+++ b/gdb/config/m68k/tm-apollo68b.h
@@ -0,0 +1,61 @@
+/* Parameters for execution on Apollo 68k running BSD.
+   Copyright 1986, 1987, 1989, 1991, 1993, 1994, 1998
+   Free Software Foundation, Inc.
+   Contributed by Cygnus Support.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Apollos use vector 0xb for the breakpoint vector */
+
+#define BPT_VECTOR 0xb
+
+#include "m68k/tm-m68k.h"
+
+#define FRAME_CHAIN_VALID(chain, thisframe) nonnull_frame_chain_valid (chain, thisframe)
+
+/* These are the jmp_buf registers I could guess. There are 13 registers
+ * in the buffer. There are 8 data registers, 6 general address registers,
+ * the Frame Pointer, the Stack Pointer, the PC and the SR in the chip. I would
+ * guess that 12 is the SR, but we don't need that anyway. 0 and 1 have
+ * me stumped. 4 appears to be a5 for some unknown reason. If you care
+ * about this, disassemble setjmp to find out. But don't do it with gdb :)
+ */
+
+#undef JB_SP
+#undef JB_FP
+#undef JB_PC
+#undef JB_D0
+#undef JB_D1
+#undef JB_D2
+#undef JB_D3
+#undef JB_D4
+#undef JB_D5
+
+#define JB_SP 2
+#define JB_FP 3
+#define JB_PC 5
+#define JB_D0 6
+#define JB_D1 7
+#define JB_D2 8
+#define JB_D3 9
+#define JB_D4 10
+#define JB_D5 11
+
+/* How to decide if we're in a shared library function.  (Probably a wrong
+   definintion inherited from the VxWorks config file).  */
+#define	IN_SOLIB_CALL_TRAMPOLINE(pc, name) (name && strcmp(name, "<end_of_program>") == 0)
diff --git a/gdb/config/m68k/tm-cisco.h b/gdb/config/m68k/tm-cisco.h
new file mode 100644
index 00000000000..24db025bccf
--- /dev/null
+++ b/gdb/config/m68k/tm-cisco.h
@@ -0,0 +1,55 @@
+/* Parameters for CISCO m68k.
+   Copyright 1994, 1996, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define GDBINIT_FILENAME	".cisco-gdbinit"	/* Init file */
+
+#define DEFAULT_PROMPT		"(cisco-68k-gdb) "	/* Default prompt */
+
+#include "m68k/tm-m68k.h"
+
+/* Offsets (in target ints) into jmp_buf.  Defined in /csc/sys/sun/asm.S. */
+
+#define JB_ELEMENT_SIZE 4
+
+#define JB_PC 0
+#define JB_D2 1
+#define JB_D3 2
+#define JB_D4 3
+#define JB_D5 4
+#define JB_D6 5
+#define JB_D7 6
+#define JB_A2 7
+#define JB_A3 8
+#define JB_A4 9
+#define JB_A5 10
+#define JB_A6 11
+#define JB_SP 12
+
+/* Figure out where the longjmp will land.  Slurp the args out of the stack.
+   We expect the first arg to be a pointer to the jmp_buf structure from which
+   we extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) m68k_get_longjmp_target(ADDR)
+
+/* BFD handles finding the registers in the core file, so they are at
+   the start of the BFD .reg section.  */
+#define REGISTER_U_ADDR(addr,blockend,regno) (addr = REGISTER_BYTE (regno))
+#define KERNEL_U_ADDR 0
diff --git a/gdb/config/m68k/tm-delta68.h b/gdb/config/m68k/tm-delta68.h
new file mode 100644
index 00000000000..a38baea2020
--- /dev/null
+++ b/gdb/config/m68k/tm-delta68.h
@@ -0,0 +1,107 @@
+/* Target definitions for delta68.
+   Copyright 1993, 1994, 1998, 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+/* Define BPT_VECTOR if it is different than the default.
+   This is the vector number used by traps to indicate a breakpoint. */
+
+#define BPT_VECTOR 0x1
+
+#define GCC_COMPILED_FLAG_SYMBOL "gcc_compiled%"
+#define GCC2_COMPILED_FLAG_SYMBOL "gcc2_compiled%"
+
+/* Amount PC must be decremented by after a breakpoint.
+   On the Delta, the kernel decrements it for us.  */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Not sure what happens if we try to store this register, but
+   phdm@info.ucl.ac.be says we need this define.  */
+
+#define CANNOT_STORE_REGISTER(regno)	(regno == FPI_REGNUM)
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  */
+
+/* When it returns a float/double value, use fp0 in sysV68.  */
+/* When it returns a pointer value, use a0 in sysV68.  */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF)			\
+  if (TYPE_CODE (TYPE) == TYPE_CODE_FLT)				\
+    REGISTER_CONVERT_TO_VIRTUAL (FP0_REGNUM, TYPE,			\
+				 &REGBUF[REGISTER_BYTE (FP0_REGNUM)],	\
+				 VALBUF);				\
+  else									\
+    memcpy ((VALBUF),							\
+	    (char *) ((REGBUF) +					\
+		      (TYPE_CODE(TYPE) == TYPE_CODE_PTR ? 8 * 4 :	\
+		       (TYPE_LENGTH(TYPE) >= 4 ? 0 : 4 - TYPE_LENGTH(TYPE)))), \
+	    TYPE_LENGTH(TYPE))
+
+/* Write into appropriate registers a function return value
+   of type TYPE, given in virtual format.  */
+
+/* When it returns a float/double value, use fp0 in sysV68.  */
+/* When it returns a pointer value, use a0 in sysV68.  */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+  if (TYPE_CODE (TYPE) == TYPE_CODE_FLT)				\
+      {									\
+	char raw_buf[REGISTER_RAW_SIZE (FP0_REGNUM)];			\
+	REGISTER_CONVERT_TO_RAW (TYPE, FP0_REGNUM, VALBUF, raw_buf);	\
+	write_register_bytes (REGISTER_BYTE (FP0_REGNUM),		\
+			      raw_buf, REGISTER_RAW_SIZE (FP0_REGNUM)); \
+      }									\
+  else									\
+    write_register_bytes ((TYPE_CODE(TYPE) == TYPE_CODE_PTR ? 8 * 4 : 0), \
+			  VALBUF, TYPE_LENGTH (TYPE))
+
+/* Return number of args passed to a frame.
+   Can return -1, meaning no way to tell.  */
+
+extern int delta68_frame_num_args (struct frame_info *fi);
+#define FRAME_NUM_ARGS(fi) (delta68_frame_num_args ((fi)))
+
+/* On M68040 versions of sysV68 R3V7.1, ptrace(PT_WRITE_I) does not clear
+   the processor's instruction cache as it should.  */
+#define CLEAR_INSN_CACHE()	clear_insn_cache()
+
+#include "m68k/tm-m68k.h"
+
+/* Extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one).  */
+
+#undef EXTRACT_STRUCT_VALUE_ADDRESS
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF)\
+	(*(CORE_ADDR *)((char*)(REGBUF) + 8 * 4))
+
+extern int delta68_in_sigtramp (CORE_ADDR pc, char *name);
+#define IN_SIGTRAMP(pc,name) delta68_in_sigtramp (pc, name)
+
+extern CORE_ADDR delta68_frame_saved_pc (struct frame_info *fi);
+#undef FRAME_SAVED_PC
+#define FRAME_SAVED_PC(fi) delta68_frame_saved_pc (fi)
+
+extern CORE_ADDR delta68_frame_args_address (struct frame_info *fi);
+#undef FRAME_ARGS_ADDRESS
+#define FRAME_ARGS_ADDRESS(fi) delta68_frame_args_address (fi)
diff --git a/gdb/config/m68k/tm-dpx2.h b/gdb/config/m68k/tm-dpx2.h
new file mode 100644
index 00000000000..96b1c324d5a
--- /dev/null
+++ b/gdb/config/m68k/tm-dpx2.h
@@ -0,0 +1,35 @@
+/* Parameters for targeting to a Bull DPX2.
+   Copyright 1986, 1987, 1989, 1991, 1993, 1994
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Define BPT_VECTOR if it is different than the default.
+   This is the vector number used by traps to indicate a breakpoint. */
+
+#define BPT_VECTOR 0xe
+
+/* Need to get function ends by adding this to epilogue address from .bf
+   record, not using x_fsize field.  */
+#define FUNCTION_EPILOGUE_SIZE 4
+
+/* The child target can't deal with writing floating registers.  */
+#define CANNOT_STORE_REGISTER(regno) ((regno) >= FP0_REGNUM)
+
+#include <sys/types.h>
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-es1800.h b/gdb/config/m68k/tm-es1800.h
new file mode 100644
index 00000000000..46e4a641f08
--- /dev/null
+++ b/gdb/config/m68k/tm-es1800.h
@@ -0,0 +1,60 @@
+/* Parameters for execution on ES-1800 emulator for 68000.
+   The code was originally written by Johan Holmberg TT/SJ Ericsson Telecom
+   AB and later modified by Johan Henriksson TT/SJ. It was adapted to GDB 4.0
+   by Jan Norden TX/DK.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1996, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   GDB is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 1, or (at your option)
+   any later version.
+
+   GDB is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define	GDBINIT_FILENAME	".esgdbinit"
+
+#define	DEFAULT_PROMPT		"(esgdb) "
+
+#include "m68k/tm-m68k.h"
+
+/* Longjmp stuff borrowed from sun3 configuration.  Don't know if correct. 
+   FIXME.  */
+/* Offsets (in target ints) into jmp_buf.  Not defined by Sun, but at least
+   documented in a comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_PSL 4
+#define JB_D2 5
+#define JB_D3 6
+#define JB_D4 7
+#define JB_D5 8
+#define JB_D6 9
+#define JB_D7 10
+#define JB_A2 11
+#define JB_A3 12
+#define JB_A4 13
+#define JB_A5 14
+#define JB_A6 15
+
+/* Figure out where the longjmp will land.  Slurp the args out of the stack.
+   We expect the first arg to be a pointer to the jmp_buf structure from which
+   we extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) m68k_get_longjmp_target(ADDR)
diff --git a/gdb/config/m68k/tm-hp300bsd.h b/gdb/config/m68k/tm-hp300bsd.h
new file mode 100644
index 00000000000..0a033873f81
--- /dev/null
+++ b/gdb/config/m68k/tm-hp300bsd.h
@@ -0,0 +1,64 @@
+/* Parameters for target machine Hewlett-Packard 9000/300, running bsd.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1996
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Configuration file for HP9000/300 series machine running BSD,
+   including Utah, Mt. Xinu or Berkeley variants.  This is NOT for HP-UX.
+   Problems to hpbsd-bugs@cs.utah.edu.  */
+
+/* GCC is the only compiler used on this OS.  So get this right even if
+   the code which detects gcc2_compiled. is still broken.  */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* Define BPT_VECTOR if it is different than the default.
+   This is the vector number used by traps to indicate a breakpoint.
+
+   For hp300bsd the normal breakpoint vector is 0x2 (for debugging via
+   ptrace); for remote kernel debugging the breakpoint vector is 0xf.  */
+
+#define BPT_VECTOR 0x2
+#define REMOTE_BPT_VECTOR 0xf
+
+#define TARGET_NBPG 4096
+
+/* For 4.4 this would be 2, but it is OK for us to detect an area a
+   bit bigger than necessary.  This way the same gdb binary can target
+   either 4.3 or 4.4.  */
+
+#define TARGET_UPAGES 3
+
+/* On the HP300, sigtramp is in the u area.  Gak!  User struct is not
+   mapped to the same virtual address in user/kernel address space
+   (hence STACK_END_ADDR as opposed to KERNEL_U_ADDR).  This tests
+   for the whole u area, since we don't necessarily have hp300bsd
+   include files around.  */
+
+/* For 4.4, it is actually right 20 bytes *before* STACK_END_ADDR, so
+   include that in the area we test for.  */
+
+#define SIGTRAMP_START(pc) (STACK_END_ADDR - 20)
+#define SIGTRAMP_END(pc) (STACK_END_ADDR + TARGET_UPAGES * TARGET_NBPG)
+
+/* Address of end of stack space.  */
+
+#define STACK_END_ADDR 0xfff00000
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-hp300hpux.h b/gdb/config/m68k/tm-hp300hpux.h
new file mode 100644
index 00000000000..860653208f2
--- /dev/null
+++ b/gdb/config/m68k/tm-hp300hpux.h
@@ -0,0 +1,33 @@
+/* Parameters for execution on an HP 9000 model 320, for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* GCC is the only compiler used for stabs on this OS.  So get this
+   right even if the code which detects gcc2_compiled. is still
+   broken.  */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* Define BPT_VECTOR if it is different than the default.
+   This is the vector number used by traps to indicate a breakpoint. */
+
+#define BPT_VECTOR 0x1
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-linux.h b/gdb/config/m68k/tm-linux.h
new file mode 100644
index 00000000000..94b2c2c3504
--- /dev/null
+++ b/gdb/config/m68k/tm-linux.h
@@ -0,0 +1,107 @@
+/* Definitions to target GDB to GNU/Linux on m680x0.
+
+   Copyright 1996, 1998, 1999, 2000, 2002 Free Software Foundation,
+   Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+/* Number of traps that happen between exec'ing the shell to run an
+   inferior, and when we finally get to the inferior code.  This is 2
+   on most implementations.  */
+
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+/* The following definitions are appropriate when using the ELF
+   format, where floating point values are returned in fp0, pointer
+   values in a0 and other values in d0.  */
+
+/* Extract from an array REGBUF containing the (raw) register state a
+   function return value of type TYPE, and copy that, in virtual
+   format, into VALBUF.  */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+{									\
+  if (TYPE_CODE (TYPE) == TYPE_CODE_FLT)				\
+    {									\
+       REGISTER_CONVERT_TO_VIRTUAL (FP0_REGNUM, TYPE,			\
+				    ((char *) (REGBUF)			\
+				     + REGISTER_BYTE (FP0_REGNUM)),	\
+				    VALBUF);				\
+    }									\
+  else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)				\
+    memcpy (VALBUF, (char *) (REGBUF) + REGISTER_BYTE (A0_REGNUM),	\
+	    TYPE_LENGTH (TYPE));					\
+  else									\
+    memcpy (VALBUF,							\
+	    ((char *) (REGBUF)						\
+	     + (TYPE_LENGTH (TYPE) >= 4 ? 0 : 4 - TYPE_LENGTH (TYPE))),	\
+	    TYPE_LENGTH (TYPE));					\
+}
+
+/* Write into appropriate registers a function return value of type
+   TYPE, given in virtual format.  */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+{									\
+  if (TYPE_CODE (TYPE) == TYPE_CODE_FLT)				\
+    {									\
+      char raw_buffer[REGISTER_RAW_SIZE (FP0_REGNUM)];			\
+      REGISTER_CONVERT_TO_RAW (TYPE, FP0_REGNUM, VALBUF, raw_buffer);	\
+      write_register_bytes (REGISTER_BYTE (FP0_REGNUM),			\
+			    raw_buffer, TYPE_LENGTH (TYPE));		\
+    }									\
+  else									\
+    {									\
+      if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)				\
+	write_register_bytes (REGISTER_BYTE (A0_REGNUM), VALBUF,	\
+			      TYPE_LENGTH (TYPE));			\
+      write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE));		\
+    }									\
+}
+
+#include "tm-linux.h"
+#include "m68k/tm-m68k.h"
+
+/* Extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one).  */
+
+#undef EXTRACT_STRUCT_VALUE_ADDRESS
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+  (*(CORE_ADDR *)((char *) (REGBUF) + REGISTER_BYTE (A0_REGNUM)))
+
+/* Offsets (in target ints) into jmp_buf.  */
+
+#define JB_ELEMENT_SIZE 4
+#define JB_PC 7
+
+/* Figure out where the longjmp will land.  Slurp the args out of the stack.
+   We expect the first arg to be a pointer to the jmp_buf structure from which
+   we extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) m68k_get_longjmp_target(ADDR)
+
+#undef FRAME_SAVED_PC
+#define FRAME_SAVED_PC(frame) m68k_linux_frame_saved_pc (frame)
+extern CORE_ADDR m68k_linux_frame_saved_pc (struct frame_info *);
+
+#define IN_SIGTRAMP(pc,name) m68k_linux_in_sigtramp (pc)
+extern int m68k_linux_in_sigtramp (CORE_ADDR pc);
diff --git a/gdb/config/m68k/tm-m68k.h b/gdb/config/m68k/tm-m68k.h
new file mode 100644
index 00000000000..5b23df0a0be
--- /dev/null
+++ b/gdb/config/m68k/tm-m68k.h
@@ -0,0 +1,368 @@
+/* Parameters for execution on a 68000 series machine.
+   Copyright 1986, 1987, 1989, 1990, 1992, 1993, 1994, 1995, 1996, 1998,
+   1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+/* Generic 68000 stuff, to be included by other tm-*.h files.  */
+
+#define TARGET_LONG_DOUBLE_FORMAT &floatformat_m68881_ext
+
+#define TARGET_LONG_DOUBLE_BIT 96
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+   to reach some "real" code.  */
+
+#if !defined(SKIP_PROLOGUE)
+#define SKIP_PROLOGUE(ip) (m68k_skip_prologue (ip))
+#endif
+extern CORE_ADDR m68k_skip_prologue (CORE_ADDR ip);
+
+/* Immediately after a function call, return the saved pc.
+   Can't always go through the frames for this because on some machines
+   the new frame is not set up until the new function executes
+   some instructions.  */
+
+struct frame_info;
+struct frame_saved_regs;
+
+extern CORE_ADDR m68k_saved_pc_after_call (struct frame_info *);
+extern void m68k_find_saved_regs (struct frame_info *,
+				  struct frame_saved_regs *);
+
+#define SAVED_PC_AFTER_CALL(frame) \
+  m68k_saved_pc_after_call(frame)
+
+/* Stack grows downward.  */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Stack must be kept short aligned when doing function calls.  */
+
+#define STACK_ALIGN(ADDR) (((ADDR) + 1) & ~1)
+
+/* Sequence of bytes for breakpoint instruction.
+   This is a TRAP instruction.  The last 4 bits (0xf below) is the
+   vector.  Systems which don't use 0xf should define BPT_VECTOR
+   themselves before including this file.  */
+
+#if !defined (BPT_VECTOR)
+#define BPT_VECTOR 0xf
+#endif
+
+#if !defined (BREAKPOINT)
+#define BREAKPOINT {0x4e, (0x40 | BPT_VECTOR)}
+#endif
+
+/* We default to vector 1 for the "remote" target, but allow targets
+   to override.  */
+#if !defined (REMOTE_BPT_VECTOR)
+#define REMOTE_BPT_VECTOR 1
+#endif
+
+#if !defined (REMOTE_BREAKPOINT)
+#define REMOTE_BREAKPOINT {0x4e, (0x40 | REMOTE_BPT_VECTOR)}
+#endif
+
+/* If your kernel resets the pc after the trap happens you may need to
+   define this before including this file.  */
+
+#if !defined (DECR_PC_AFTER_BREAK)
+#define DECR_PC_AFTER_BREAK 2
+#endif
+
+/* Say how long (ordinary) registers are.  This is a piece of bogosity
+   used in push_word and a few other places; REGISTER_RAW_SIZE is the
+   real way to know how big a register is.  */
+
+#define REGISTER_SIZE 4
+
+#define REGISTER_BYTES_FP (16*4 + 8 + 8*12 + 3*4)
+#define REGISTER_BYTES_NOFP (16*4 + 8)
+
+#ifndef NUM_REGS
+#define NUM_REGS 29
+#endif
+
+#define NUM_FREGS (NUM_REGS-24)
+
+#ifndef REGISTER_BYTES_OK
+#define REGISTER_BYTES_OK(b) \
+   ((b) == REGISTER_BYTES_FP \
+    || (b) == REGISTER_BYTES_NOFP)
+#endif
+
+#ifndef REGISTER_BYTES
+#define REGISTER_BYTES (16*4 + 8 + 8*12 + 3*4)
+#endif
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+
+#define REGISTER_BYTE(N)  \
+ ((N) >= FPC_REGNUM ? (((N) - FPC_REGNUM) * 4) + 168	\
+  : (N) >= FP0_REGNUM ? (((N) - FP0_REGNUM) * 12) + 72	\
+  : (N) * 4)
+
+/* Number of bytes of storage in the actual machine representation
+   for register N.  On the 68000, all regs are 4 bytes
+   except the floating point regs which are 12 bytes.  */
+/* Note that the unsigned cast here forces the result of the
+   subtraction to very high positive values if N < FP0_REGNUM */
+
+#define REGISTER_RAW_SIZE(N) (((unsigned)(N) - FP0_REGNUM) < 8 ? 12 : 4)
+
+/* Number of bytes of storage in the program's representation
+   for register N.  On the 68000, all regs are 4 bytes
+   except the floating point regs which are 12-byte long doubles.  */
+
+#define REGISTER_VIRTUAL_SIZE(N) (((unsigned)(N) - FP0_REGNUM) < 8 ? 12 : 4)
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+
+#define MAX_REGISTER_RAW_SIZE 12
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 12
+
+/* Return the GDB type object for the "standard" data type of data 
+   in register N.  This should be int for D0-D7, long double for FP0-FP7,
+   and void pointer for all others (A0-A7, PC, SR, FPCONTROL etc).
+   Note, for registers which contain addresses return pointer to void, 
+   not pointer to char, because we don't want to attempt to print 
+   the string after printing the address.  */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+  ((unsigned) (N) >= FPC_REGNUM ? lookup_pointer_type (builtin_type_void) : \
+   (unsigned) (N) >= FP0_REGNUM ? builtin_type_long_double :                \
+   (unsigned) (N) >=  A0_REGNUM ? lookup_pointer_type (builtin_type_void) : \
+   builtin_type_int)
+
+/* Initializer for an array of names of registers.
+   Entries beyond the first NUM_REGS are ignored.  */
+
+#define REGISTER_NAMES  \
+ {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
+  "a0", "a1", "a2", "a3", "a4", "a5", "fp", "sp", \
+  "ps", "pc",  \
+  "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", \
+  "fpcontrol", "fpstatus", "fpiaddr", "fpcode", "fpflags" }
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define D0_REGNUM 0
+#define A0_REGNUM 8
+#define A1_REGNUM 9
+#define FP_REGNUM 14		/* Contains address of executing stack frame */
+#define SP_REGNUM 15		/* Contains address of top of stack */
+#define PS_REGNUM 16		/* Contains processor status */
+#define PC_REGNUM 17		/* Contains program counter */
+#define FP0_REGNUM 18		/* Floating point register 0 */
+#define FPC_REGNUM 26		/* 68881 control register */
+#define FPS_REGNUM 27		/* 68881 status register */
+#define FPI_REGNUM 28		/* 68881 iaddr register */
+
+/* Store the address of the place in which to copy the structure the
+   subroutine will return.  This is called from call_function. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+  { write_register (A1_REGNUM, (ADDR)); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  This is assuming that floating point values are returned
+   as doubles in d0/d1.  */
+
+#if !defined (EXTRACT_RETURN_VALUE)
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+  memcpy ((VALBUF),							\
+	  (char *)(REGBUF) +						\
+	         (TYPE_LENGTH(TYPE) >= 4 ? 0 : 4 - TYPE_LENGTH(TYPE)),	\
+	  TYPE_LENGTH(TYPE))
+#endif
+
+/* Write into appropriate registers a function return value
+   of type TYPE, given in virtual format.  Assumes floats are passed
+   in d0/d1.  */
+
+#if !defined (STORE_RETURN_VALUE)
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+  write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE))
+#endif
+
+/* Extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one).  */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(CORE_ADDR *)(REGBUF))
+
+/* Describe the pointer in each stack frame to the previous stack frame
+   (its caller).  */
+
+/* FRAME_CHAIN takes a frame's nominal address and produces the frame's
+   chain-pointer.
+   In the case of the 68000, the frame's nominal address
+   is the address of a 4-byte word containing the calling frame's address.  */
+
+/* If we are chaining from sigtramp, then manufacture a sigtramp frame
+   (which isn't really on the stack.  I'm not sure this is right for anything
+   but BSD4.3 on an hp300.  */
+#define FRAME_CHAIN(thisframe)  \
+  (thisframe->signal_handler_caller \
+   ? thisframe->frame \
+   : (!inside_entry_file ((thisframe)->pc) \
+      ? read_memory_integer ((thisframe)->frame, 4) \
+      : 0))
+
+/* Define other aspects of the stack frame.  */
+
+/* A macro that tells us whether the function invocation represented
+   by FI does not have a frame on the stack associated with it.  If it
+   does not, FRAMELESS is set to 1, else 0.  */
+#define FRAMELESS_FUNCTION_INVOCATION(FI) \
+     (((FI)->signal_handler_caller) ? 0 : frameless_look_for_prologue(FI))
+
+/* This was determined by experimentation on hp300 BSD 4.3.  Perhaps
+   it corresponds to some offset in /usr/include/sys/user.h or
+   something like that.  Using some system include file would
+   have the advantage of probably being more robust in the face
+   of OS upgrades, but the disadvantage of being wrong for
+   cross-debugging.  */
+
+#define SIG_PC_FP_OFFSET 530
+
+#define FRAME_SAVED_PC(FRAME) \
+  (((FRAME)->signal_handler_caller \
+    ? ((FRAME)->next \
+       ? read_memory_integer ((FRAME)->next->frame + SIG_PC_FP_OFFSET, 4) \
+       : read_memory_integer (read_register (SP_REGNUM) \
+			      + SIG_PC_FP_OFFSET - 8, 4) \
+       ) \
+    : read_memory_integer ((FRAME)->frame + 4, 4)) \
+   )
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Set VAL to the number of args passed to frame described by FI.
+   Can set VAL to -1, meaning no way to tell.  */
+
+/* We can't tell how many args there are
+   now that the C compiler delays popping them.  */
+#if !defined (FRAME_NUM_ARGS)
+#define FRAME_NUM_ARGS(fi) (-1)
+#endif
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#define FRAME_ARGS_SKIP 8
+
+/* Put here the code to store, into a struct frame_saved_regs,
+   the addresses of the saved registers of frame described by FRAME_INFO.
+   This includes special registers such as pc and fp saved in special
+   ways in the stack frame.  sp is even more special:
+   the address we return for it IS the sp for the next frame.  */
+
+#if !defined (FRAME_FIND_SAVED_REGS)
+#define FRAME_FIND_SAVED_REGS(fi,fsr) m68k_find_saved_regs ((fi), &(fsr))
+#endif /* no FIND_FRAME_SAVED_REGS.  */
+
+
+/* Things needed for making the inferior call functions.  */
+
+/* The CALL_DUMMY macro is the sequence of instructions, as disassembled
+   by gdb itself:
+
+   These instructions exist only so that m68k_find_saved_regs can parse
+   them as a "prologue"; they are never executed.
+
+   fmovemx fp0-fp7,sp@-                 0xf227 0xe0ff
+   moveml d0-a5,sp@-                    0x48e7 0xfffc
+   clrw sp@-                            0x4267
+   movew ccr,sp@-                               0x42e7
+
+   The arguments are pushed at this point by GDB; no code is needed in
+   the dummy for this.  The CALL_DUMMY_START_OFFSET gives the position
+   of the following jsr instruction.  That is where we start
+   executing.
+
+   jsr @#0x32323232                     0x4eb9 0x3232 0x3232
+   addal #0x69696969,sp                 0xdffc 0x6969 0x6969
+   trap #<your BPT_VECTOR number here>  0x4e4?
+   nop                                  0x4e71
+
+   Note this is CALL_DUMMY_LENGTH bytes (28 for the above example).
+
+   The dummy frame always saves the floating-point registers, whether they
+   actually exist on this target or not.  */
+
+/* FIXME: Wrong to hardwire this as BPT_VECTOR when sometimes it
+   should be REMOTE_BPT_VECTOR.  Best way to fix it would be to define
+   CALL_DUMMY_BREAKPOINT_OFFSET.  */
+
+#define CALL_DUMMY {0xf227e0ff, 0x48e7fffc, 0x426742e7, 0x4eb93232, 0x3232dffc, 0x69696969, (0x4e404e71 | (BPT_VECTOR << 16))}
+#define CALL_DUMMY_LENGTH 28	/* Size of CALL_DUMMY */
+#define CALL_DUMMY_START_OFFSET 12	/* Offset to jsr instruction */
+#define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + 12)
+
+/* Insert the specified number of args and function address
+   into a call sequence of the above form stored at DUMMYNAME.
+   We use the BFD routines to store a big-endian value of known size.  */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p)     \
+{ bfd_putb32 (fun,     (unsigned char *) dummyname + CALL_DUMMY_START_OFFSET + 2);  \
+  bfd_putb32 (nargs*4, (unsigned char *) dummyname + CALL_DUMMY_START_OFFSET + 8); }
+
+/* Push an empty stack frame, to record the current PC, etc.  */
+
+#define PUSH_DUMMY_FRAME	{ m68k_push_dummy_frame (); }
+
+extern void m68k_push_dummy_frame (void);
+
+extern void m68k_pop_frame (void);
+
+/* Discard from the stack the innermost frame, restoring all registers.  */
+
+#define POP_FRAME		{ m68k_pop_frame (); }
+
+/* Offset from SP to first arg on stack at first instruction of a function */
+
+#define SP_ARG0 (1 * 4)
+
+#define TARGET_M68K
+
+/* Figure out where the longjmp will land.  Slurp the args out of the stack.
+   We expect the first arg to be a pointer to the jmp_buf structure from which
+   we extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int m68k_get_longjmp_target (CORE_ADDR *);
diff --git a/gdb/config/m68k/tm-m68klynx.h b/gdb/config/m68k/tm-m68klynx.h
new file mode 100644
index 00000000000..cfc462f54a4
--- /dev/null
+++ b/gdb/config/m68k/tm-m68klynx.h
@@ -0,0 +1,39 @@
+/* Macro definitions for Motorola 680x0 running under LynxOS.
+   Copyright 1993 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_M68KLYNX_H
+#define TM_M68KLYNX_H
+
+#include "tm-lynx.h"
+
+/* If PC-2 contains this instruction, then we know what we are in a system
+   call stub, and the return PC is is at SP+4, instead of SP. */
+
+#define SYSCALL_TRAP 0x4e4a	/* trap #10 */
+#define SYSCALL_TRAP_OFFSET 2	/* PC is after trap instruction */
+
+/* Use the generic 68k definitions. */
+
+#include "m68k/tm-m68k.h"
+
+/* Disable dumbshit alternate breakpoint mechanism needed by 68k stub. */
+#undef REMOTE_BREAKPOINT
+
+#endif /* TM_M68KLYNX_H */
diff --git a/gdb/config/m68k/tm-m68kv4.h b/gdb/config/m68k/tm-m68kv4.h
new file mode 100644
index 00000000000..18bf5a2187a
--- /dev/null
+++ b/gdb/config/m68k/tm-m68kv4.h
@@ -0,0 +1,71 @@
+/* Target definitions for GDB on a Motorola 680x0 running SVR4.
+   (Commodore Amiga with amix or Atari TT with ASV)
+   Copyright 1991, 1994, 1995, 1996, 1998, 1999, 2000
+   Free Software Foundation, Inc.
+   Written by Fred Fish at Cygnus Support (fnf@cygint)
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Define BPT_VECTOR if it is different than the default.
+   This is the vector number used by traps to indicate a breakpoint. */
+
+#define BPT_VECTOR 0x1
+
+/* How much to decrement the PC after a trap.  Depends on kernel. */
+
+#define DECR_PC_AFTER_BREAK 0	/* No decrement required */
+
+/* Use the alternate method of determining valid frame chains. */
+
+#define FRAME_CHAIN_VALID(fp,fi) func_frame_chain_valid (fp, fi)
+
+#include "tm-sysv4.h"
+#include "m68k/tm-m68k.h"
+
+/* Offsets (in target ints) into jmp_buf.  Not defined in any system header
+   file, so we have to step through setjmp/longjmp with a debugger and figure
+   them out.  As a double check, note that <setjmp> defines _JBLEN as 13,
+   which matches the number of elements we see saved by setjmp(). */
+
+#define JB_ELEMENT_SIZE sizeof(int)	/* jmp_buf[_JBLEN] is array of ints */
+
+#define JB_D2	0
+#define JB_D3	1
+#define JB_D4	2
+#define JB_D5	3
+#define JB_D6	4
+#define JB_D7	5
+#define JB_A1	6
+#define JB_A2	7
+#define JB_A3	8
+#define JB_A4	9
+#define JB_A5	10
+#define JB_A6	11
+#define JB_A7	12
+
+#define JB_PC	JB_A1		/* Setjmp()'s return PC saved in A1 */
+
+/* Figure out where the longjmp will land.  Slurp the args out of the stack.
+   We expect the first arg to be a pointer to the jmp_buf structure from which
+   we extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) m68k_get_longjmp_target(ADDR)
+
+/* Convert a DWARF register number to a gdb REGNUM.  */
+#define DWARF_REG_TO_REGNUM(num) ((num) < 16 ? (num) : (num)+FP0_REGNUM-16)
diff --git a/gdb/config/m68k/tm-mac.h b/gdb/config/m68k/tm-mac.h
new file mode 100644
index 00000000000..270f353297d
--- /dev/null
+++ b/gdb/config/m68k/tm-mac.h
@@ -0,0 +1,21 @@
+/* Target-dependent definitions for Mac running MacOS.
+   Copyright 1994, 1995 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-monitor.h b/gdb/config/m68k/tm-monitor.h
new file mode 100644
index 00000000000..6d38b5513b1
--- /dev/null
+++ b/gdb/config/m68k/tm-monitor.h
@@ -0,0 +1,46 @@
+/* Target machine definitions for a generic m68k monitor/emulator.
+   Copyright 1986, 1987, 1989, 1993, 1994, 1995, 1996, 1998, 1999
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* The definitions here are appropriate for several embedded m68k-based
+   targets, including IDP (rom68k), BCC (cpu32bug), and EST's emulator.  */
+
+/* GCC is probably the only compiler used on this configuration.  So
+   get this right even if the code which detects gcc2_compiled. is
+   still broken.  */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* The target system handles breakpoints.  */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* No float registers.  */
+
+/*#define NUM_REGS 18 */
+
+#include "m68k/tm-m68k.h"
+
+/* Need to do this for ELF targets, where we can't figure out the boundaries of
+   the entry file.  This method stops the backtrace when we reach main.  */
+
+#define FRAME_CHAIN_VALID(fp,fi) func_frame_chain_valid (fp, fi)
+
+/* FIXME, should do GET_LONGJMP_TARGET for newlib.  */
diff --git a/gdb/config/m68k/tm-nbsd.h b/gdb/config/m68k/tm-nbsd.h
new file mode 100644
index 00000000000..62f008c7249
--- /dev/null
+++ b/gdb/config/m68k/tm-nbsd.h
@@ -0,0 +1,49 @@
+/* Macro definitions for m68k running under NetBSD.
+   Copyright 1994, 1996, 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_NBSD_H
+#define TM_NBSD_H
+
+#include <sys/param.h>
+#include <machine/vmparam.h>
+
+/* Define BPT_VECTOR if it is different than the default.
+   This is the vector number used by traps to indicate a breakpoint. */
+#define BPT_VECTOR		0xf
+#define REMOTE_BPT_VECTOR	0xf
+
+/* Address of end of stack space.  */
+#define STACK_END_ADDR USRSTACK
+
+/* For NetBSD, sigtramp is 32 bytes before STACK_END_ADDR.  */
+#define SIGTRAMP_START(pc) (STACK_END_ADDR - 32)
+#define SIGTRAMP_END(pc) (STACK_END_ADDR)
+
+#include "m68k/tm-m68k.h"
+
+/* Return non-zero if we are in a shared library trampoline code stub. */
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) \
+  (name && !strcmp(name, "_DYNAMIC"))
+
+extern use_struct_convention_fn m68knbsd_use_struct_convention;
+#define USE_STRUCT_CONVENTION(gcc_p, type) \
+        m68knbsd_use_struct_convention(gcc_p, type)
+
+#endif /* TM_NBSD_H */
diff --git a/gdb/config/m68k/tm-os68k.h b/gdb/config/m68k/tm-os68k.h
new file mode 100644
index 00000000000..ed1d5c89902
--- /dev/null
+++ b/gdb/config/m68k/tm-os68k.h
@@ -0,0 +1,47 @@
+/* Parameters for execution on VxWorks m68k's, for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1991, 1998 Free Software Foundation, Inc.
+   Contributed by Cygnus Support.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define	GDBINIT_FILENAME	".os68gdbinit"
+
+#define	DEFAULT_PROMPT		"(os68k) "
+
+#include "m68k/tm-m68k.h"
+
+/* We have more complex, useful breakpoints on the target.  */
+#undef DECR_PC_AFTER_BREAK
+#define	DECR_PC_AFTER_BREAK	0
+
+/* Takes the current frame-struct pointer and returns the chain-pointer
+   to get to the calling frame.
+
+   If our current frame pointer is zero, we're at the top; else read out
+   the saved FP from memory pointed to by the current FP.  */
+
+#undef	FRAME_CHAIN
+#define FRAME_CHAIN(thisframe) ((thisframe)->frame? read_memory_integer ((thisframe)->frame, 4): 0)
+
+/* If the chain pointer is zero (either because the saved value fetched
+   by FRAME_CHAIN was zero, or because the current FP was zero so FRAME_CHAIN
+   never fetched anything), we are at the top of the stack.  */
+/* We are guaranteed to have a zero frame pointer at bottom of stack, too. */
+
+#undef FRAME_CHAIN_VALID
+#define FRAME_CHAIN_VALID(chain, thisframe) nonnull_frame_chain_valid (chain, thisframe)
diff --git a/gdb/config/m68k/tm-st2000.h b/gdb/config/m68k/tm-st2000.h
new file mode 100644
index 00000000000..4d7a2b19bf9
--- /dev/null
+++ b/gdb/config/m68k/tm-st2000.h
@@ -0,0 +1,21 @@
+/* Parameters for a Tandem ST2000 phone switch.
+   Copyright (C) 1986, 1987, 1989, 199 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-sun2.h b/gdb/config/m68k/tm-sun2.h
new file mode 100644
index 00000000000..e839bea7f5a
--- /dev/null
+++ b/gdb/config/m68k/tm-sun2.h
@@ -0,0 +1,24 @@
+/* Parameters for execution on a Sun, for GDB, the GNU debugger.
+   Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* The child target can't deal with floating registers.  */
+#define CANNOT_STORE_REGISTER(regno) ((regno) >= FP0_REGNUM)
+
+#include "m68k/tm-m68k.h"
diff --git a/gdb/config/m68k/tm-sun2os4.h b/gdb/config/m68k/tm-sun2os4.h
new file mode 100644
index 00000000000..496c32955b3
--- /dev/null
+++ b/gdb/config/m68k/tm-sun2os4.h
@@ -0,0 +1,21 @@
+/* Copyright (C) 1990, Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "m68k/tm-sun2.h"
+#include "tm-sunos.h"
diff --git a/gdb/config/m68k/tm-sun3.h b/gdb/config/m68k/tm-sun3.h
new file mode 100644
index 00000000000..d7581ddd91d
--- /dev/null
+++ b/gdb/config/m68k/tm-sun3.h
@@ -0,0 +1,108 @@
+/* Parameters for execution on a Sun, for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1992, 1993, 1994, 1996, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_SUN3_H
+#define TM_SUN3_H
+
+/* Sun3 status includes fpflags, which shows whether the FPU has been used
+   by the process, and whether the FPU was done with an instruction or 
+   was interrupted in the middle of a long instruction.  See
+   <machine/reg.h>.  */
+/*                      a&d, pc,sr, fp, fpstat, fpflags   */
+
+#define REGISTER_BYTES (16*4 + 8 + 8*12 + 3*4 + 4)
+
+#define NUM_REGS 31
+
+#define REGISTER_BYTES_OK(b) \
+     ((b) == REGISTER_BYTES \
+      || (b) == REGISTER_BYTES_FP \
+      || (b) == REGISTER_BYTES_NOFP)
+
+/* If PC contains this instruction, then we know what we are in a system
+   call stub, and the return PC is is at SP+4, instead of SP. */
+
+#define SYSCALL_TRAP 0x4e40	/* trap #0 */
+#define SYSCALL_TRAP_OFFSET 0	/* PC points at trap instruction */
+
+#include "m68k/tm-m68k.h"
+
+/* Disable alternate breakpoint mechanism needed by 68k stub. */
+#undef REMOTE_BREAKPOINT
+
+/* Offsets (in target ints) into jmp_buf.  Not defined by Sun, but at least
+   documented in a comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_PSL 4
+#define JB_D2 5
+#define JB_D3 6
+#define JB_D4 7
+#define JB_D5 8
+#define JB_D6 9
+#define JB_D7 10
+#define JB_A2 11
+#define JB_A3 12
+#define JB_A4 13
+#define JB_A5 14
+#define JB_A6 15
+
+/* Figure out where the longjmp will land.  Slurp the args out of the stack.
+   We expect the first arg to be a pointer to the jmp_buf structure from which
+   we extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) m68k_get_longjmp_target(ADDR)
+
+/* If sun3 pcc says that a parameter is a short, it's a short.  */
+#define BELIEVE_PCC_PROMOTION_TYPE
+
+/* Can't define BELIEVE_PCC_PROMOTION for SunOS /bin/cc of SunOS 4.1.1.
+   Apparently Sun fixed this for the sparc but not the sun3.  */
+
+/* The code which tries to deal with this bug is never harmful on a sun3.  */
+#define SUN_FIXED_LBRAC_BUG (0)
+
+/* On the sun3 the kernel pushes a sigcontext on the user stack and then
+   `calls' _sigtramp in user code. _sigtramp saves the floating point status
+   on the stack and calls the signal handler function. The stack does not
+   contain enough information to allow a normal backtrace, but sigcontext
+   contains the saved user pc/sp. FRAME_CHAIN and friends in tm-m68k.h and
+   m68k_find_saved_regs deal with this situation by manufacturing a fake frame
+   for _sigtramp.
+   SIG_PC_FP_OFFSET is the offset from the signal handler frame to the
+   saved pc in sigcontext.
+   SIG_SP_FP_OFFSET is the offset from the signal handler frame to the end
+   of sigcontext which is identical to the saved sp at SIG_PC_FP_OFFSET - 4.
+
+   Please note that it is impossible to correctly backtrace from a breakpoint
+   in _sigtramp as _sigtramp modifies the stack pointer a few times.  */
+
+#undef SIG_PC_FP_OFFSET
+#define SIG_PC_FP_OFFSET 324
+#define SIG_SP_FP_OFFSET 332
+
+#endif /* TM_SUN3_H */
diff --git a/gdb/config/m68k/tm-sun3os4.h b/gdb/config/m68k/tm-sun3os4.h
new file mode 100644
index 00000000000..d4bc74fd8e7
--- /dev/null
+++ b/gdb/config/m68k/tm-sun3os4.h
@@ -0,0 +1,22 @@
+/* Target machine parameters for Sun-3 under SunOS 4.x, for GDB.
+   Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "m68k/tm-sun3.h"
+#include "tm-sunos.h"
diff --git a/gdb/config/m68k/tm-vx68.h b/gdb/config/m68k/tm-vx68.h
new file mode 100644
index 00000000000..988b4bb4b9e
--- /dev/null
+++ b/gdb/config/m68k/tm-vx68.h
@@ -0,0 +1,89 @@
+/* Target machine description for VxWorks m68k's, for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1996, 1998, 1999, 2000
+   Free Software Foundation, Inc.
+   Contributed by Cygnus Support.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* GCC is probably the only compiler used on this configuration.  So
+   get this right even if the code which detects gcc2_compiled. is
+   still broken.  */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* We have more complex, useful breakpoints on the target.  */
+#define	DECR_PC_AFTER_BREAK	0
+
+#include "m68k/tm-m68k.h"
+#include "tm-vxworks.h"
+
+/* Takes the current frame-struct pointer and returns the chain-pointer
+   to get to the calling frame.
+
+   If our current frame pointer is zero, we're at the top; else read out
+   the saved FP from memory pointed to by the current FP.  */
+
+#undef	FRAME_CHAIN
+#define FRAME_CHAIN(thisframe) ((thisframe)->frame? read_memory_integer ((thisframe)->frame, 4): 0)
+
+/* If the chain pointer is zero (either because the saved value fetched
+   by FRAME_CHAIN was zero, or because the current FP was zero so FRAME_CHAIN
+   never fetched anything), we are at the top of the stack.  */
+/* We are guaranteed to have a zero frame pointer at bottom of stack, too. */
+
+#undef	FRAME_CHAIN_VALID
+#define FRAME_CHAIN_VALID(chain, thisframe) nonnull_frame_chain_valid (chain, thisframe)
+
+/* FIXME, Longjmp information stolen from Sun-3 config.  Dunno if right.  */
+/* Offsets (in target ints) into jmp_buf.  Not defined by Sun, but at least
+   documented in a comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_PSL 4
+#define JB_D2 5
+#define JB_D3 6
+#define JB_D4 7
+#define JB_D5 8
+#define JB_D6 9
+#define JB_D7 10
+#define JB_A2 11
+#define JB_A3 12
+#define JB_A4 13
+#define JB_A5 14
+#define JB_A6 15
+
+/* Figure out where the longjmp will land.  Slurp the args out of the stack.
+   We expect the first arg to be a pointer to the jmp_buf structure from which
+   we extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) m68k_get_longjmp_target(ADDR)
+
+/* Number of registers in a ptrace_getregs call. */
+
+#define VX_NUM_REGS (18)
+
+/* Number of registers in a ptrace_getfpregs call. */
+
+#define VX_SIZE_FPREGS (8 * REGISTER_RAW_SIZE (FP0_REGNUM) \
+			+ (3 * REGISTER_SIZE))
diff --git a/gdb/config/m68k/vxworks68.mt b/gdb/config/m68k/vxworks68.mt
new file mode 100644
index 00000000000..8c9774496cb
--- /dev/null
+++ b/gdb/config/m68k/vxworks68.mt
@@ -0,0 +1,3 @@
+# Target: Motorola m68k running VxWorks
+TDEPFILES= m68k-tdep.o remote-vx.o remote-vx68.o xdr_ld.o xdr_ptrace.o xdr_rdb.o
+TM_FILE= tm-vx68.h
diff --git a/gdb/config/m68k/xm-3b1.h b/gdb/config/m68k/xm-3b1.h
new file mode 100644
index 00000000000..acf72e98201
--- /dev/null
+++ b/gdb/config/m68k/xm-3b1.h
@@ -0,0 +1,82 @@
+/* Parameters for execution on a 3b1.
+   Copyright 1986, 1987, 1989, 1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define HAVE_TERMIO
+#define USG
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+
+#define KERNEL_U_ADDR 0x70000
+
+#define REGISTER_U_ADDR(addr, blockend, regno)		\
+{ addr = blockend + regno * 4; }
+
+/* Interface definitions for kernel debugger KDB.  */
+
+/* Map machine fault codes into signal numbers.
+   First subtract 0, divide by 4, then index in a table.
+   Faults for which the entry in this table is 0
+   are not handled by KDB; the program's own trap handler
+   gets to handle then.  */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE    \
+{ 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \
+  0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \
+  0, 0, 0, 0, 0, 0, 0, 0, \
+  SIGILL }
+
+/* Start running with a stack stretching from BEG to END.
+   BEG and END should be symbols meaningful to the assembler.
+   This is used only for kdb.  */
+
+#define INIT_STACK(beg, end)  \
+{ asm (".globl end");         \
+  asm ("movel $ end, sp");      \
+  asm ("clrl fp"); }
+
+/* Push the frame pointer register on the stack.  */
+#define PUSH_FRAME_PTR        \
+  asm ("movel fp, -(sp)");
+
+/* Copy the top-of-stack to the frame pointer register.  */
+#define POP_FRAME_PTR  \
+  asm ("movl (sp), fp");
+
+/* After KDB is entered by a fault, push all registers
+   that GDB thinks about (all NUM_REGS of them),
+   so that they appear in order of ascending GDB register number.
+   The fault code will be on the stack beyond the last register.  */
+
+#define PUSH_REGISTERS        \
+{ asm ("clrw -(sp)");	      \
+  asm ("pea 10(sp)");	      \
+  asm ("movem $ 0xfffe,-(sp)"); }
+
+/* Assuming the registers (including processor status) have been
+   pushed on the stack in order of ascending GDB register number,
+   restore them and return to the address in the saved PC register.  */
+
+#define POP_REGISTERS          \
+{ asm ("subil $8,28(sp)");     \
+  asm ("movem (sp),$ 0xffff"); \
+  asm ("rte"); }
diff --git a/gdb/config/m68k/xm-apollo68b.h b/gdb/config/m68k/xm-apollo68b.h
new file mode 100644
index 00000000000..d77509d5a0d
--- /dev/null
+++ b/gdb/config/m68k/xm-apollo68b.h
@@ -0,0 +1,21 @@
+/* Macro definitions for an Apollo m68k in BSD mode
+   Copyright 1992, 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define ALIGN_STACK_ON_STARTUP
diff --git a/gdb/config/m68k/xm-apollo68v.h b/gdb/config/m68k/xm-apollo68v.h
new file mode 100644
index 00000000000..8919088b4f2
--- /dev/null
+++ b/gdb/config/m68k/xm-apollo68v.h
@@ -0,0 +1,42 @@
+/* Macro defintions for an Apollo.
+   Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/*
+ * Changes for 80386 by Pace Willisson (pace@prep.ai.mit.edu)
+ * July 1988
+ */
+
+/* I'm running gdb 3.4 under 386/ix 2.0.2, which is a derivative of AT&T's
+   Sys V/386 3.2.
+
+   On some machines, gdb crashes when it's starting up while calling the
+   vendor's termio tgetent() routine.  It always works when run under
+   itself (actually, under 3.2, it's not an infinitely recursive bug.)
+   After some poking around, it appears that depending on the environment
+   size, or whether you're running YP, or the phase of the moon or something,
+   the stack is not always long-aligned when main() is called, and tgetent()
+   takes strong offense at that.  On some machines this bug never appears, but
+   on those where it does, it occurs quite reliably.  */
+#define ALIGN_STACK_ON_STARTUP
+
+/* define USG if you are using sys5 /usr/include's */
+#define USG
+
+#define HAVE_TERMIO
diff --git a/gdb/config/m68k/xm-delta68.h b/gdb/config/m68k/xm-delta68.h
new file mode 100644
index 00000000000..f691c387db2
--- /dev/null
+++ b/gdb/config/m68k/xm-delta68.h
@@ -0,0 +1,35 @@
+/* Macro definitions for a Delta.
+   Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* I'm running gdb 4.9 under sysV68 R3V7.1.
+
+   On some machines, gdb crashes when it's starting up while calling the
+   vendor's termio tgetent() routine.  It always works when run under
+   itself (actually, under 3.2, it's not an infinitely recursive bug.)
+   After some poking around, it appears that depending on the environment
+   size, or whether you're running YP, or the phase of the moon or something,
+   the stack is not always long-aligned when main() is called, and tgetent()
+   takes strong offense at that.  On some machines this bug never appears, but
+   on those where it does, it occurs quite reliably.  */
+#define ALIGN_STACK_ON_STARTUP
+
+#define USG
+
+#define HAVE_TERMIO
diff --git a/gdb/config/m68k/xm-dpx2.h b/gdb/config/m68k/xm-dpx2.h
new file mode 100644
index 00000000000..4083c9dbc19
--- /dev/null
+++ b/gdb/config/m68k/xm-dpx2.h
@@ -0,0 +1,22 @@
+/* Parameters for execution on a Bull DPX2.
+   Copyright 1986, 1987, 1989, 1993 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define HAVE_TERMIOS
+#define USG
diff --git a/gdb/config/m68k/xm-hp300bsd.h b/gdb/config/m68k/xm-hp300bsd.h
new file mode 100644
index 00000000000..b938353b5f7
--- /dev/null
+++ b/gdb/config/m68k/xm-hp300bsd.h
@@ -0,0 +1,83 @@
+/* Parameters for hosting on a Hewlett-Packard 9000/300, running bsd.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1995, 1996, 2000, 2001
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/*
+ * Configuration file for HP9000/300 series machine running
+ * University of Utah's 4.3bsd (or 4.4BSD) port.  This is NOT for HP-UX.
+ * Problems to hpbsd-bugs@cs.utah.edu
+ */
+
+#include <sys/param.h>		/* For INT_MIN */
+
+/* Kernel is a bit tenacious about sharing text segments, disallowing bpts.  */
+#define	ONE_PROCESS_WRITETEXT
+
+/* Interface definitions for kernel debugger KDB.  */
+
+/* Map machine fault codes into signal numbers.
+   First subtract 0, divide by 4, then index in a table.
+   Faults for which the entry in this table is 0
+   are not handled by KDB; the program's own trap handler
+   gets to handle then.  */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE    \
+{ 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \
+  0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \
+  0, 0, 0, 0, 0, 0, 0, 0, \
+  SIGILL }
+
+/* Start running with a stack stretching from BEG to END.
+   BEG and END should be symbols meaningful to the assembler.
+   This is used only for kdb.  */
+
+#define INIT_STACK(beg, end)  \
+{ asm (".globl end");         \
+  asm ("movel #end, sp");      \
+  asm ("movel #0,a6"); }
+
+/* Push the frame pointer register on the stack.  */
+#define PUSH_FRAME_PTR        \
+  asm ("movel a6,sp@-");
+
+/* Copy the top-of-stack to the frame pointer register.  */
+#define POP_FRAME_PTR  \
+  asm ("movl sp@,a6");
+
+/* After KDB is entered by a fault, push all registers
+   that GDB thinks about (all NUM_REGS of them),
+   so that they appear in order of ascending GDB register number.
+   The fault code will be on the stack beyond the last register.  */
+
+#define PUSH_REGISTERS        \
+{ asm ("clrw -(sp)");	      \
+  asm ("pea sp@(10)");	      \
+  asm ("movem #0xfffe,sp@-"); }
+
+/* Assuming the registers (including processor status) have been
+   pushed on the stack in order of ascending GDB register number,
+   restore them and return to the address in the saved PC register.  */
+
+#define POP_REGISTERS          \
+{ asm ("subil #8,sp@(28)");     \
+  asm ("movem sp@,#0xffff"); \
+  asm ("rte"); }
diff --git a/gdb/config/m68k/xm-hp300hpux.h b/gdb/config/m68k/xm-hp300hpux.h
new file mode 100644
index 00000000000..f5982b4491a
--- /dev/null
+++ b/gdb/config/m68k/xm-hp300hpux.h
@@ -0,0 +1,150 @@
+/* Parameters for HP 9000 model 320 hosting, for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1992, 1993, 1994, 1995, 1996
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Define this to indicate problems with traps after continuing.  */
+#define HP_OS_BUG
+
+/* Set flag to indicate whether HP's assembler is in use. */
+#ifdef __GNUC__
+#ifdef __HPUX_ASM__
+#define HPUX_ASM
+#endif
+#else /* not GNU C.  */
+#define HPUX_ASM
+#endif /* not GNU C.  */
+
+/* Define this for versions of hp-ux older than 6.0 */
+/* #define HPUX_VERSION_5 */
+
+/* define USG if you are using sys5 /usr/include's */
+#undef USG			/* In case it was defined in the Makefile for cplus-dem.c */
+#define USG
+
+#define HAVE_TERMIOS
+
+#define REGISTER_ADDR(u_ar0, regno)					\
+  (unsigned int)							\
+  (((regno) < PS_REGNUM)						\
+   ? (&((struct exception_stack *) (u_ar0))->e_regs[(regno + R0)])	\
+   : (((regno) == PS_REGNUM)						\
+      ? ((int *) (&((struct exception_stack *) (u_ar0))->e_PS))		\
+      : (&((struct exception_stack *) (u_ar0))->e_PC)))
+
+#define FP_REGISTER_ADDR(u, regno)					\
+  (((char *)								\
+    (((regno) < FPC_REGNUM)						\
+     ? (&u.u_pcb.pcb_mc68881[FMC68881_R0 + (((regno) - FP0_REGNUM) * 3)]) \
+     : (&u.u_pcb.pcb_mc68881[FMC68881_C + ((regno) - FPC_REGNUM)])))	\
+   - ((char *) (& u)))
+
+/* Interface definitions for kernel debugger KDB.  */
+
+/* Map machine fault codes into signal numbers.
+   First subtract 0, divide by 4, then index in a table.
+   Faults for which the entry in this table is 0
+   are not handled by KDB; the program's own trap handler
+   gets to handle then.  */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE    \
+{ 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \
+  0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \
+  0, 0, 0, 0, 0, 0, 0, 0, \
+  SIGILL }
+
+#ifndef HPUX_ASM
+
+/* Start running with a stack stretching from BEG to END.
+   BEG and END should be symbols meaningful to the assembler.
+   This is used only for kdb.  */
+
+#define INIT_STACK(beg, end)  \
+{ asm (".globl end");         \
+  asm ("movel $ end, sp");      \
+  asm ("clrl fp"); }
+
+/* Push the frame pointer register on the stack.  */
+#define PUSH_FRAME_PTR        \
+  asm ("movel fp, -(sp)");
+
+/* Copy the top-of-stack to the frame pointer register.  */
+#define POP_FRAME_PTR  \
+  asm ("movl (sp), fp");
+
+/* After KDB is entered by a fault, push all registers
+   that GDB thinks about (all NUM_REGS of them),
+   so that they appear in order of ascending GDB register number.
+   The fault code will be on the stack beyond the last register.  */
+
+#define PUSH_REGISTERS        \
+{ asm ("clrw -(sp)");	      \
+  asm ("pea 10(sp)");	      \
+  asm ("movem $ 0xfffe,-(sp)"); }
+
+/* Assuming the registers (including processor status) have been
+   pushed on the stack in order of ascending GDB register number,
+   restore them and return to the address in the saved PC register.  */
+
+#define POP_REGISTERS          \
+{ asm ("subil $8,28(sp)");     \
+  asm ("movem (sp),$ 0xffff"); \
+  asm ("rte"); }
+
+#else /* HPUX_ASM */
+
+/* Start running with a stack stretching from BEG to END.
+   BEG and END should be symbols meaningful to the assembler.
+   This is used only for kdb.  */
+
+#define INIT_STACK(beg, end)						\
+{ asm ("global end");							\
+  asm ("mov.l &end,%sp");						\
+  asm ("clr.l %a6"); }
+
+/* Push the frame pointer register on the stack.  */
+#define PUSH_FRAME_PTR							\
+  asm ("mov.l %fp,-(%sp)");
+
+/* Copy the top-of-stack to the frame pointer register.  */
+#define POP_FRAME_PTR							\
+  asm ("mov.l (%sp),%fp");
+
+/* After KDB is entered by a fault, push all registers
+   that GDB thinks about (all NUM_REGS of them),
+   so that they appear in order of ascending GDB register number.
+   The fault code will be on the stack beyond the last register.  */
+
+#define PUSH_REGISTERS							\
+{ asm ("clr.w -(%sp)");							\
+  asm ("pea 10(%sp)");							\
+  asm ("movm.l &0xfffe,-(%sp)"); }
+
+/* Assuming the registers (including processor status) have been
+   pushed on the stack in order of ascending GDB register number,
+   restore them and return to the address in the saved PC register.  */
+
+#define POP_REGISTERS							\
+{ asm ("subi.l &8,28(%sp)");						\
+  asm ("mov.m (%sp),&0xffff");						\
+  asm ("rte"); }
+
+#endif /* HPUX_ASM */
diff --git a/gdb/config/m68k/xm-linux.h b/gdb/config/m68k/xm-linux.h
new file mode 100644
index 00000000000..e5839b99bbf
--- /dev/null
+++ b/gdb/config/m68k/xm-linux.h
@@ -0,0 +1,34 @@
+/* Native support for linux, for GDB, the GNU debugger.
+   Copyright 1996, 1998, 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef XM_LINUX_H
+#define XM_LINUX_H
+
+/* Pick up most of what we need from the generic m68k host include file. */
+
+#include "m68k/xm-m68k.h"
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+#define KERNEL_U_ADDR 0x0
+
+#define HOST_LONG_DOUBLE_FORMAT &floatformat_m68881_ext
+
+#endif /* #ifndef XM_LINUX_H */
diff --git a/gdb/config/m68k/xm-m68k.h b/gdb/config/m68k/xm-m68k.h
new file mode 100644
index 00000000000..5dc40ecb8f7
--- /dev/null
+++ b/gdb/config/m68k/xm-m68k.h
@@ -0,0 +1,21 @@
+/* Macro definitions for running gdb on host machines with m68k cpu's.
+   Copyright (C) 1991, Free Software Foundation, Inc.
+   Written by Fred Fish at Cygnus Support (fnf@cygint)
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
diff --git a/gdb/config/m68k/xm-m68kv4.h b/gdb/config/m68k/xm-m68kv4.h
new file mode 100644
index 00000000000..11679a965eb
--- /dev/null
+++ b/gdb/config/m68k/xm-m68kv4.h
@@ -0,0 +1,29 @@
+/* Host definitions for GDB on a Motorola 680x0 running SVR4.
+   (Commodore Amiga with amix or Atari TT with ASV)
+   Copyright 1991, 1992, 1994, 1996 Free Software Foundation, Inc.
+   Written by Fred Fish at Cygnus Support (fnf@cygnus.com)
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Pick up most of what we need from the generic m68k host include file. */
+
+#include "m68k/xm-m68k.h"
+
+/* Pick up more stuff from the generic SVR4 host include file. */
+
+#include "xm-sysv4.h"
diff --git a/gdb/config/m68k/xm-nbsd.h b/gdb/config/m68k/xm-nbsd.h
new file mode 100644
index 00000000000..c266a99e628
--- /dev/null
+++ b/gdb/config/m68k/xm-nbsd.h
@@ -0,0 +1,22 @@
+/* Parameters for execution on a Motorola m68k running NetBSD, for GDB.
+   Copyright 1996 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Get generic NetBSD host definitions. */
+#include "xm-nbsd.h"
diff --git a/gdb/config/m68k/xm-sun2.h b/gdb/config/m68k/xm-sun2.h
new file mode 100644
index 00000000000..cf846192491
--- /dev/null
+++ b/gdb/config/m68k/xm-sun2.h
@@ -0,0 +1,77 @@
+/* Parameters for execution on a Sun, for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1996 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+
+#define KERNEL_U_ADDR 0x2800
+
+
+/* Interface definitions for kernel debugger KDB.  */
+
+/* Map machine fault codes into signal numbers.
+   First subtract 0, divide by 4, then index in a table.
+   Faults for which the entry in this table is 0
+   are not handled by KDB; the program's own trap handler
+   gets to handle then.  */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE    \
+{ 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \
+  0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \
+  0, 0, 0, 0, 0, 0, 0, 0, \
+  SIGILL }
+
+/* Start running with a stack stretching from BEG to END.
+   BEG and END should be symbols meaningful to the assembler.
+   This is used only for kdb.  */
+
+#define INIT_STACK(beg, end)  \
+{ asm (".globl end");         \
+  asm ("movel $ end, sp");      \
+  asm ("clrl fp"); }
+
+/* Push the frame pointer register on the stack.  */
+#define PUSH_FRAME_PTR        \
+  asm ("movel fp, -(sp)");
+
+/* Copy the top-of-stack to the frame pointer register.  */
+#define POP_FRAME_PTR  \
+  asm ("movl (sp), fp");
+
+/* After KDB is entered by a fault, push all registers
+   that GDB thinks about (all NUM_REGS of them),
+   so that they appear in order of ascending GDB register number.
+   The fault code will be on the stack beyond the last register.  */
+
+#define PUSH_REGISTERS        \
+{ asm ("clrw -(sp)");	      \
+  asm ("pea 10(sp)");	      \
+  asm ("movem $ 0xfffe,-(sp)"); }
+
+/* Assuming the registers (including processor status) have been
+   pushed on the stack in order of ascending GDB register number,
+   restore them and return to the address in the saved PC register.  */
+
+#define POP_REGISTERS          \
+{ asm ("subil $8,28(sp)");     \
+  asm ("movem (sp),$ 0xffff"); \
+  asm ("rte"); }
diff --git a/gdb/config/m68k/xm-sun3.h b/gdb/config/m68k/xm-sun3.h
new file mode 100644
index 00000000000..6a5a560e1c3
--- /dev/null
+++ b/gdb/config/m68k/xm-sun3.h
@@ -0,0 +1,71 @@
+/* Parameters for execution on a Sun, for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1996 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Interface definitions for kernel debugger KDB.  */
+
+/* Map machine fault codes into signal numbers.
+   First subtract 0, divide by 4, then index in a table.
+   Faults for which the entry in this table is 0
+   are not handled by KDB; the program's own trap handler
+   gets to handle then.  */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE    \
+{ 0, 0, 0, 0, SIGTRAP, 0, 0, 0, \
+  0, SIGTRAP, 0, 0, 0, 0, 0, SIGKILL, \
+  0, 0, 0, 0, 0, 0, 0, 0, \
+  SIGILL }
+
+/* Start running with a stack stretching from BEG to END.
+   BEG and END should be symbols meaningful to the assembler.
+   This is used only for kdb.  */
+
+#define INIT_STACK(beg, end)  \
+{ asm (".globl end");         \
+  asm ("movel #end, sp");      \
+  asm ("movel #0,a6"); }
+
+/* Push the frame pointer register on the stack.  */
+#define PUSH_FRAME_PTR        \
+  asm ("movel a6,sp@-");
+
+/* Copy the top-of-stack to the frame pointer register.  */
+#define POP_FRAME_PTR  \
+  asm ("movl sp@,a6");
+
+/* After KDB is entered by a fault, push all registers
+   that GDB thinks about (all NUM_REGS of them),
+   so that they appear in order of ascending GDB register number.
+   The fault code will be on the stack beyond the last register.  */
+
+#define PUSH_REGISTERS        \
+{ asm ("clrw -(sp)");	      \
+  asm ("pea sp@(10)");	      \
+  asm ("movem #0xfffe,sp@-"); }
+
+/* Assuming the registers (including processor status) have been
+   pushed on the stack in order of ascending GDB register number,
+   restore them and return to the address in the saved PC register.  */
+
+#define POP_REGISTERS          \
+{ asm ("subil #8,sp@(28)");     \
+  asm ("movem sp@,#0xffff"); \
+  asm ("rte"); }
diff --git a/gdb/config/m68k/xm-sun3os4.h b/gdb/config/m68k/xm-sun3os4.h
new file mode 100644
index 00000000000..1a819c32a9a
--- /dev/null
+++ b/gdb/config/m68k/xm-sun3os4.h
@@ -0,0 +1,22 @@
+/* Macro definitions for a sun 3 running os 4.
+   Copyright 1989, 1996, 1998 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "m68k/xm-sun3.h"
+#define FPU
diff --git a/gdb/config/m88k/delta88.mh b/gdb/config/m88k/delta88.mh
new file mode 100644
index 00000000000..13dc6c27e8d
--- /dev/null
+++ b/gdb/config/m88k/delta88.mh
@@ -0,0 +1,6 @@
+# Host: Motorola 88k running SVR3
+
+XM_FILE= xm-delta88.h
+
+NAT_FILE= nm-m88k.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o m88k-nat.o corelow.o core-aout.o
diff --git a/gdb/config/m88k/delta88.mt b/gdb/config/m88k/delta88.mt
new file mode 100644
index 00000000000..c8e669b687c
--- /dev/null
+++ b/gdb/config/m88k/delta88.mt
@@ -0,0 +1,3 @@
+# Target: Motorola 88k running SVR3
+TDEPFILES= m88k-tdep.o
+TM_FILE= tm-delta88.h
diff --git a/gdb/config/m88k/delta88v4.mh b/gdb/config/m88k/delta88v4.mh
new file mode 100644
index 00000000000..ba3dd7b6993
--- /dev/null
+++ b/gdb/config/m88k/delta88v4.mh
@@ -0,0 +1,8 @@
+# Host: Motorola 88k running SVR4
+
+XM_FILE= xm-delta88v4.h
+
+NAT_FILE= nm-delta88v4.h
+NATDEPFILES= fork-child.o m88k-nat.o corelow.o core-regset.o \
+	solib.o solib-svr4.o solib-legacy.o \
+	procfs.o proc-api.o proc-events.o proc-flags.o proc-why.o
diff --git a/gdb/config/m88k/delta88v4.mt b/gdb/config/m88k/delta88v4.mt
new file mode 100644
index 00000000000..7797d4b6295
--- /dev/null
+++ b/gdb/config/m88k/delta88v4.mt
@@ -0,0 +1,3 @@
+# Target: Motorola 88k running SVR4
+TDEPFILES= m88k-tdep.o
+TM_FILE= tm-delta88v4.h
diff --git a/gdb/config/m88k/m88k.mh b/gdb/config/m88k/m88k.mh
new file mode 100644
index 00000000000..5d4350bb20b
--- /dev/null
+++ b/gdb/config/m88k/m88k.mh
@@ -0,0 +1,4 @@
+# Host: Motorola 88000 running DGUX
+XM_FILE= xm-dgux.h
+NAT_FILE= nm-m88k.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o m88k-nat.o
diff --git a/gdb/config/m88k/m88k.mt b/gdb/config/m88k/m88k.mt
new file mode 100644
index 00000000000..ca3fab41165
--- /dev/null
+++ b/gdb/config/m88k/m88k.mt
@@ -0,0 +1,3 @@
+# Target: Motorola 88k Binary Compatibility Standard
+TDEPFILES= m88k-tdep.o remote-bug.o
+TM_FILE= tm-m88k.h
diff --git a/gdb/config/m88k/nm-delta88v4.h b/gdb/config/m88k/nm-delta88v4.h
new file mode 100644
index 00000000000..90ee391b2b6
--- /dev/null
+++ b/gdb/config/m88k/nm-delta88v4.h
@@ -0,0 +1,23 @@
+/* Native machine description for Motorola Delta 88 box, for GDB.
+   Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "m88k/nm-m88k.h"
+#include "nm-sysv4.h"
diff --git a/gdb/config/m88k/nm-m88k.h b/gdb/config/m88k/nm-m88k.h
new file mode 100644
index 00000000000..4c402bd1127
--- /dev/null
+++ b/gdb/config/m88k/nm-m88k.h
@@ -0,0 +1,25 @@
+/* Native support macros for m88k, for GDB.
+   Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1992
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define FETCH_INFERIOR_REGISTERS
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+        (addr) = m88k_register_u_addr ((blockend),(regno));
diff --git a/gdb/config/m88k/tm-delta88.h b/gdb/config/m88k/tm-delta88.h
new file mode 100644
index 00000000000..f44b1f79cff
--- /dev/null
+++ b/gdb/config/m88k/tm-delta88.h
@@ -0,0 +1,28 @@
+/* Target machine description for Motorola Delta 88 box, for GDB.
+   Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993, 1994
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "m88k/tm-m88k.h"
+
+#define DELTA88
+
+#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigcode", (name)))
+#define SIGTRAMP_FRAME_FIXUP(frame) (frame) += 0x20
+#define SIGTRAMP_SP_FIXUP(sp) (sp) = read_memory_integer((sp), 4)
diff --git a/gdb/config/m88k/tm-delta88v4.h b/gdb/config/m88k/tm-delta88v4.h
new file mode 100644
index 00000000000..35a605d3536
--- /dev/null
+++ b/gdb/config/m88k/tm-delta88v4.h
@@ -0,0 +1,32 @@
+/* Target machine description for Motorola Delta 88 box, for GDB.
+   Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993, 1994, 1998, 1999
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define DELTA88
+
+#include "m88k/tm-m88k.h"
+#include "tm-sysv4.h"
+
+/* If we don't define this, backtraces go on forever.  */
+#define FRAME_CHAIN_VALID(fp,fi) func_frame_chain_valid (fp, fi)
+
+#define IN_SIGTRAMP(pc, name) ((name) && (STREQ ("signalhandler", (name)) \
+                                          || STREQ("sigacthandler", (name))))
+#define SIGTRAMP_SP_FIXUP(sp) (sp) = read_memory_integer((sp)+0xcd8, 4)
diff --git a/gdb/config/m88k/tm-m88k.h b/gdb/config/m88k/tm-m88k.h
new file mode 100644
index 00000000000..7405c1294f1
--- /dev/null
+++ b/gdb/config/m88k/tm-m88k.h
@@ -0,0 +1,587 @@
+/* Target machine description for generic Motorola 88000, for GDB.
+
+   Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993, 1994, 1996,
+   1998, 1999, 2000, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "doublest.h"
+#include "regcache.h"
+
+/* g++ support is not yet included.  */
+
+/* We cache information about saved registers in the frame structure,
+   to save us from having to re-scan function prologues every time
+   a register in a non-current frame is accessed.  */
+
+#define EXTRA_FRAME_INFO 	\
+	struct frame_saved_regs *fsr;	\
+	CORE_ADDR locals_pointer;	\
+	CORE_ADDR args_pointer;
+
+/* Zero the frame_saved_regs pointer when the frame is initialized,
+   so that FRAME_FIND_SAVED_REGS () will know to allocate and
+   initialize a frame_saved_regs struct the first time it is called.
+   Set the arg_pointer to -1, which is not valid; 0 and other values
+   indicate real, cached values.  */
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
+	init_extra_frame_info (fromleaf, fi)
+extern void init_extra_frame_info ();
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+   to reach some "real" code.  */
+
+extern CORE_ADDR m88k_skip_prologue (CORE_ADDR);
+#define SKIP_PROLOGUE(frompc) (m88k_skip_prologue (frompc))
+
+/* The m88k kernel aligns all instructions on 4-byte boundaries.  The
+   kernel also uses the least significant two bits for its own hocus
+   pocus.  When gdb receives an address from the kernel, it needs to
+   preserve those right-most two bits, but gdb also needs to be careful
+   to realize that those two bits are not really a part of the address
+   of an instruction.  Shrug.  */
+
+extern CORE_ADDR m88k_addr_bits_remove (CORE_ADDR);
+#define ADDR_BITS_REMOVE(addr) m88k_addr_bits_remove (addr)
+
+/* Immediately after a function call, return the saved pc.
+   Can't always go through the frames for this because on some machines
+   the new frame is not set up until the new function executes
+   some instructions.  */
+
+#define SAVED_PC_AFTER_CALL(frame) \
+  (ADDR_BITS_REMOVE (read_register (SRP_REGNUM)))
+
+/* Stack grows downward.  */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Sequence of bytes for breakpoint instruction.  */
+
+/* instruction 0xF000D1FF is 'tb0 0,r0,511'
+   If Bit bit 0 of r0 is clear (always true),
+   initiate exception processing (trap).
+ */
+#define BREAKPOINT {0xF0, 0x00, 0xD1, 0xFF}
+
+/* Amount PC must be decremented by after a breakpoint.
+   This is often the number of bytes in BREAKPOINT
+   but not always.  */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long (ordinary) registers are.  This is a piece of bogosity
+   used in push_word and a few other places; REGISTER_RAW_SIZE is the
+   real way to know how big a register is.  */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+
+#define GP_REGS (38)
+#define FP_REGS (32)
+#define NUM_REGS (GP_REGS + FP_REGS)
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+
+#define REGISTER_NAMES {\
+			  "r0",\
+			  "r1",\
+			  "r2",\
+			  "r3",\
+			  "r4",\
+			  "r5",\
+			  "r6",\
+			  "r7",\
+			  "r8",\
+			  "r9",\
+			  "r10",\
+			  "r11",\
+			  "r12",\
+			  "r13",\
+			  "r14",\
+			  "r15",\
+			  "r16",\
+			  "r17",\
+			  "r18",\
+			  "r19",\
+			  "r20",\
+			  "r21",\
+			  "r22",\
+			  "r23",\
+			  "r24",\
+			  "r25",\
+			  "r26",\
+			  "r27",\
+			  "r28",\
+			  "r29",\
+			  "r30",\
+			  "r31",\
+			  "psr",\
+			  "fpsr",\
+			  "fpcr",\
+			  "sxip",\
+			  "snip",\
+			  "sfip",\
+			  "x0",\
+			  "x1",\
+			  "x2",\
+			  "x3",\
+			  "x4",\
+			  "x5",\
+			  "x6",\
+			  "x7",\
+			  "x8",\
+			  "x9",\
+			  "x10",\
+			  "x11",\
+			  "x12",\
+			  "x13",\
+			  "x14",\
+			  "x15",\
+			  "x16",\
+			  "x17",\
+			  "x18",\
+			  "x19",\
+			  "x20",\
+			  "x21",\
+			  "x22",\
+			  "x23",\
+			  "x24",\
+			  "x25",\
+			  "x26",\
+			  "x27",\
+			  "x28",\
+			  "x29",\
+			  "x30",\
+			  "x31",\
+			  "vbr",\
+			  "dmt0",\
+			  "dmd0",\
+			  "dma0",\
+			  "dmt1",\
+			  "dmd1",\
+			  "dma1",\
+			  "dmt2",\
+			  "dmd2",\
+			  "dma2",\
+			  "sr0",\
+			  "sr1",\
+			  "sr2",\
+			  "sr3",\
+			  "fpecr",\
+			  "fphs1",\
+			  "fpls1",\
+			  "fphs2",\
+			  "fpls2",\
+			  "fppt",\
+			  "fprh",\
+			  "fprl",\
+			  "fpit",\
+			  "fpsr",\
+			  "fpcr",\
+		      }
+
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define R0_REGNUM 0		/* Contains the constant zero */
+#define SRP_REGNUM 1		/* Contains subroutine return pointer */
+#define RV_REGNUM 2		/* Contains simple return values */
+#define SRA_REGNUM 12		/* Contains address of struct return values */
+#define SP_REGNUM 31		/* Contains address of top of stack */
+
+/* Instruction pointer notes...
+
+   On the m88100:
+
+   * cr04 = sxip.  On exception, contains the excepting pc (probably).
+   On rte, is ignored.
+
+   * cr05 = snip.  On exception, contains the NPC (next pc).  On rte,
+   pc is loaded from here.
+
+   * cr06 = sfip.  On exception, contains the NNPC (next next pc).  On
+   rte, the NPC is loaded from here.
+
+   * lower two bits of each are flag bits.  Bit 1 is V means address
+   is valid.  If address is not valid, bit 0 is ignored.  Otherwise,
+   bit 0 is E and asks for an exception to be taken if this
+   instruction is executed.
+
+   On the m88110:
+
+   * cr04 = exip.  On exception, contains the address of the excepting
+   pc (always).  On rte, pc is loaded from here.  Bit 0, aka the D
+   bit, is a flag saying that the offending instruction was in a
+   branch delay slot.  If set, then cr05 contains the NPC.
+
+   * cr05 = enip.  On exception, if the instruction pointed to by cr04
+   was in a delay slot as indicated by the bit 0 of cr04, aka the D
+   bit, the cr05 contains the NPC.  Otherwise ignored.
+
+   * cr06 is invalid  */
+
+/* Note that the Harris Unix kernels emulate the m88100's behavior on
+   the m88110.  */
+
+#define SXIP_REGNUM 35		/* On m88100, Contains Shadow Execute
+				   Instruction Pointer.  */
+#define SNIP_REGNUM 36		/* On m88100, Contains Shadow Next
+				   Instruction Pointer.  */
+#define SFIP_REGNUM 37		/* On m88100, Contains Shadow Fetched
+				   Intruction pointer.  */
+
+#define EXIP_REGNUM 35		/* On m88110, Contains Exception
+				   Executing Instruction Pointer.  */
+#define ENIP_REGNUM 36		/* On m88110, Contains the Exception
+				   Next Instruction Pointer.  */
+
+#define PC_REGNUM SXIP_REGNUM	/* Program Counter */
+#define NPC_REGNUM SNIP_REGNUM	/* Next Program Counter */
+#define M88K_NNPC_REGNUM SFIP_REGNUM        /* Next Next Program Counter */
+
+
+#define PSR_REGNUM 32		/* Processor Status Register */
+#define FPSR_REGNUM 33		/* Floating Point Status Register */
+#define FPCR_REGNUM 34		/* Floating Point Control Register */
+#define XFP_REGNUM 38		/* First Extended Float Register */
+#define X0_REGNUM XFP_REGNUM	/* Which also contains the constant zero */
+
+/* This is rather a confusing lie.  Our m88k port using a stack pointer value
+   for the frame address.  Hence, the frame address and the frame pointer are
+   only indirectly related.  The value of this macro is the register number
+   fetched by the machine "independent" portions of gdb when they want to know
+   about a frame address.  Thus, we lie here and claim that FP_REGNUM is
+   SP_REGNUM.  */
+#define FP_REGNUM SP_REGNUM	/* Reg fetched to locate frame when pgm stops */
+#define ACTUAL_FP_REGNUM 30
+
+/* PSR status bit definitions.  */
+
+#define PSR_MODE		0x80000000
+#define PSR_BYTE_ORDER		0x40000000
+#define PSR_SERIAL_MODE		0x20000000
+#define PSR_CARRY		0x10000000
+#define PSR_SFU_DISABLE		0x000003f0
+#define PSR_SFU1_DISABLE	0x00000008
+#define PSR_MXM			0x00000004
+#define PSR_IND			0x00000002
+#define PSR_SFRZ		0x00000001
+
+
+
+/* The following two comments come from the days prior to the m88110
+   port.  The m88110 handles the instruction pointers differently.  I
+   do not know what any m88110 kernels do as the m88110 port I'm
+   working with is for an embedded system.  rich@cygnus.com
+   13-sept-93.  */
+
+/* BCS requires that the SXIP_REGNUM (or PC_REGNUM) contain the
+   address of the next instr to be executed when a breakpoint occurs.
+   Because the kernel gets the next instr (SNIP_REGNUM), the instr in
+   SNIP needs to be put back into SFIP, and the instr in SXIP should
+   be shifted to SNIP */
+
+/* Are you sitting down?  It turns out that the 88K BCS (binary
+   compatibility standard) folks originally felt that the debugger
+   should be responsible for backing up the IPs, not the kernel (as is
+   usually done).  Well, they have reversed their decision, and in
+   future releases our kernel will be handling the backing up of the
+   IPs.  So, eventually, we won't need to do the SHIFT_INST_REGS
+   stuff.  But, for now, since there are 88K systems out there that do
+   need the debugger to do the IP shifting, and since there will be
+   systems where the kernel does the shifting, the code is a little
+   more complex than perhaps it needs to be (we still go inside
+   SHIFT_INST_REGS, and if the shifting hasn't occurred then gdb goes
+   ahead and shifts).  */
+
+extern int target_is_m88110;
+#define SHIFT_INST_REGS() \
+if (!target_is_m88110) \
+{ \
+    CORE_ADDR pc = read_register (PC_REGNUM); \
+    CORE_ADDR npc = read_register (NPC_REGNUM); \
+    if (pc != npc) \
+    { \
+	write_register (M88K_NNPC_REGNUM, npc); \
+	write_register (NPC_REGNUM, pc); \
+    } \
+}
+
+    /* Storing the following registers is a no-op. */
+#define CANNOT_STORE_REGISTER(regno)	(((regno) == R0_REGNUM) \
+					 || ((regno) == X0_REGNUM))
+
+  /* Number of bytes of storage in the actual machine representation
+     for register N.  On the m88k,  the general purpose registers are 4
+     bytes and the 88110 extended registers are 10 bytes. */
+
+#define REGISTER_RAW_SIZE(N) ((N) < XFP_REGNUM ? 4 : 10)
+
+  /* Total amount of space needed to store our copies of the machine's
+     register state, the array `registers'.  */
+
+#define REGISTER_BYTES ((GP_REGS * REGISTER_RAW_SIZE(0)) \
+			+ (FP_REGS * REGISTER_RAW_SIZE(XFP_REGNUM)))
+
+  /* Index within `registers' of the first byte of the space for
+     register N.  */
+
+#define REGISTER_BYTE(N) (((N) * REGISTER_RAW_SIZE(0)) \
+			  + ((N) >= XFP_REGNUM \
+			     ? (((N) - XFP_REGNUM) \
+				* REGISTER_RAW_SIZE(XFP_REGNUM)) \
+			     : 0))
+
+  /* Number of bytes of storage in the program's representation for
+     register N.  On the m88k, all registers are 4 bytes excepting the
+     m88110 extended registers which are 8 byte doubles. */
+
+#define REGISTER_VIRTUAL_SIZE(N) ((N) < XFP_REGNUM ? 4 : 8)
+
+  /* Largest value REGISTER_RAW_SIZE can have.  */
+
+#define MAX_REGISTER_RAW_SIZE (REGISTER_RAW_SIZE(XFP_REGNUM))
+
+  /* Largest value REGISTER_VIRTUAL_SIZE can have.
+     Are FPS1, FPS2, FPR "virtual" regisers? */
+
+#define MAX_REGISTER_VIRTUAL_SIZE (REGISTER_RAW_SIZE(XFP_REGNUM))
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+
+struct type *m88k_register_type (int regnum);
+#define REGISTER_VIRTUAL_TYPE(N) m88k_register_type (N)
+
+/* The 88k call/return conventions call for "small" values to be returned
+   into consecutive registers starting from r2.  */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+  memcpy ((VALBUF), &(((char *)REGBUF)[REGISTER_BYTE(RV_REGNUM)]), TYPE_LENGTH (TYPE))
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF))
+
+/* Write into appropriate registers a function return value
+   of type TYPE, given in virtual format.  */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+  write_register_bytes (2*REGISTER_RAW_SIZE(0), (VALBUF), TYPE_LENGTH (TYPE))
+
+/* In COFF, if PCC says a parameter is a short or a char, do not
+   change it to int (it seems the convention is to change it). */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* Describe the pointer in each stack frame to the previous stack frame
+   (its caller).  */
+
+/* FRAME_CHAIN takes a frame's nominal address
+   and produces the frame's chain-pointer.
+
+   However, if FRAME_CHAIN_VALID returns zero,
+   it means the given frame is the outermost one and has no caller.  */
+
+extern CORE_ADDR frame_chain ();
+extern int frame_chain_valid ();
+extern int frameless_function_invocation ();
+
+#define FRAME_CHAIN(thisframe) \
+	frame_chain (thisframe)
+
+#define	FRAMELESS_FUNCTION_INVOCATION(frame)	\
+	(frameless_function_invocation (frame))
+
+/* Define other aspects of the stack frame.  */
+
+#define FRAME_SAVED_PC(FRAME)	\
+	frame_saved_pc (FRAME)
+extern CORE_ADDR frame_saved_pc ();
+
+#define FRAME_ARGS_ADDRESS(fi)	\
+	frame_args_address (fi)
+extern CORE_ADDR frame_args_address ();
+
+#define FRAME_LOCALS_ADDRESS(fi) \
+	frame_locals_address (fi)
+extern CORE_ADDR frame_locals_address ();
+
+/* Return number of args passed to a frame.
+   Can return -1, meaning no way to tell.  */
+
+#define FRAME_NUM_ARGS(fi)  (-1)
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Put here the code to store, into a struct frame_saved_regs,
+   the addresses of the saved registers of frame described by FRAME_INFO.
+   This includes special registers such as pc and fp saved in special
+   ways in the stack frame.  sp is even more special:
+   the address we return for it IS the sp for the next frame.  */
+
+/* On the 88k, parameter registers get stored into the so called "homing"
+   area.  This *always* happens when you compiled with GCC and use -g.
+   Also, (with GCC and -g) the saving of the parameter register values
+   always happens right within the function prologue code, so these register
+   values can generally be relied upon to be already copied into their
+   respective homing slots by the time you will normally try to look at
+   them (we hope).
+
+   Note that homing area stack slots are always at *positive* offsets from
+   the frame pointer.  Thus, the homing area stack slots for the parameter
+   registers (passed values) for a given function are actually part of the
+   frame area of the caller.  This is unusual, but it should not present
+   any special problems for GDB.
+
+   Note also that on the 88k, we are only interested in finding the
+   registers that might have been saved in memory.  This is a subset of
+   the whole set of registers because the standard calling sequence allows
+   the called routine to clobber many registers.
+
+   We could manage to locate values for all of the so called "preserved"
+   registers (some of which may get saved within any particular frame) but
+   that would require decoding all of the tdesc information.  That would be
+   nice information for GDB to have, but it is not strictly manditory if we
+   can live without the ability to look at values within (or backup to)
+   previous frames.
+ */
+
+struct frame_saved_regs;
+struct frame_info;
+
+void frame_find_saved_regs (struct frame_info *fi,
+			    struct frame_saved_regs *fsr);
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+        frame_find_saved_regs (frame_info, &frame_saved_regs)
+
+
+#define POP_FRAME pop_frame ()
+extern void pop_frame ();
+
+/* Call function stuff contributed by Kevin Buettner of Motorola.  */
+
+#define CALL_DUMMY_LOCATION AFTER_TEXT_END
+
+extern void m88k_push_dummy_frame ();
+#define PUSH_DUMMY_FRAME	m88k_push_dummy_frame()
+
+#define CALL_DUMMY { 				\
+0x67ff00c0,	/*   0:   subu	#sp,#sp,0xc0 */ \
+0x243f0004,	/*   4:   st	#r1,#sp,0x4 */ \
+0x245f0008,	/*   8:   st	#r2,#sp,0x8 */ \
+0x247f000c,	/*   c:   st	#r3,#sp,0xc */ \
+0x249f0010,	/*  10:   st	#r4,#sp,0x10 */ \
+0x24bf0014,	/*  14:   st	#r5,#sp,0x14 */ \
+0x24df0018,	/*  18:   st	#r6,#sp,0x18 */ \
+0x24ff001c,	/*  1c:   st	#r7,#sp,0x1c */ \
+0x251f0020,	/*  20:   st	#r8,#sp,0x20 */ \
+0x253f0024,	/*  24:   st	#r9,#sp,0x24 */ \
+0x255f0028,	/*  28:   st	#r10,#sp,0x28 */ \
+0x257f002c,	/*  2c:   st	#r11,#sp,0x2c */ \
+0x259f0030,	/*  30:   st	#r12,#sp,0x30 */ \
+0x25bf0034,	/*  34:   st	#r13,#sp,0x34 */ \
+0x25df0038,	/*  38:   st	#r14,#sp,0x38 */ \
+0x25ff003c,	/*  3c:   st	#r15,#sp,0x3c */ \
+0x261f0040,	/*  40:   st	#r16,#sp,0x40 */ \
+0x263f0044,	/*  44:   st	#r17,#sp,0x44 */ \
+0x265f0048,	/*  48:   st	#r18,#sp,0x48 */ \
+0x267f004c,	/*  4c:   st	#r19,#sp,0x4c */ \
+0x269f0050,	/*  50:   st	#r20,#sp,0x50 */ \
+0x26bf0054,	/*  54:   st	#r21,#sp,0x54 */ \
+0x26df0058,	/*  58:   st	#r22,#sp,0x58 */ \
+0x26ff005c,	/*  5c:   st	#r23,#sp,0x5c */ \
+0x271f0060,	/*  60:   st	#r24,#sp,0x60 */ \
+0x273f0064,	/*  64:   st	#r25,#sp,0x64 */ \
+0x275f0068,	/*  68:   st	#r26,#sp,0x68 */ \
+0x277f006c,	/*  6c:   st	#r27,#sp,0x6c */ \
+0x279f0070,	/*  70:   st	#r28,#sp,0x70 */ \
+0x27bf0074,	/*  74:   st	#r29,#sp,0x74 */ \
+0x27df0078,	/*  78:   st	#r30,#sp,0x78 */ \
+0x63df0000,	/*  7c:   addu	#r30,#sp,0x0 */ \
+0x145f0000,	/*  80:   ld	#r2,#sp,0x0 */ \
+0x147f0004,	/*  84:   ld	#r3,#sp,0x4 */ \
+0x149f0008,	/*  88:   ld	#r4,#sp,0x8 */ \
+0x14bf000c,	/*  8c:   ld	#r5,#sp,0xc */ \
+0x14df0010,	/*  90:   ld	#r6,#sp,0x10 */ \
+0x14ff0014,	/*  94:   ld	#r7,#sp,0x14 */ \
+0x151f0018,	/*  98:   ld	#r8,#sp,0x18 */ \
+0x153f001c,	/*  9c:   ld	#r9,#sp,0x1c */ \
+0x5c200000,	/*  a0:   or.u	#r1,#r0,0x0 */ \
+0x58210000,	/*  a4:   or	#r1,#r1,0x0 */ \
+0xf400c801,	/*  a8:   jsr	#r1 */ \
+0xf000d1ff	/*  ac:   tb0	0x0,#r0,0x1ff */ \
+}
+
+#define CALL_DUMMY_START_OFFSET 0x80
+#define CALL_DUMMY_LENGTH 0xb0
+
+/* FIXME: byteswapping.  */
+#define FIX_CALL_DUMMY(dummy, pc, fun, nargs, args, type, gcc_p)	\
+{ 									\
+  *(unsigned long *)((char *) (dummy) + 0xa0) |=			\
+	(((unsigned long) (fun)) >> 16);				\
+  *(unsigned long *)((char *) (dummy) + 0xa4) |=			\
+	(((unsigned long) (fun)) & 0xffff);				\
+}
+
+/* Stack must be aligned on 64-bit boundaries when synthesizing
+   function calls. */
+
+#define STACK_ALIGN(addr) (((addr) + 7) & -8)
+
+#define STORE_STRUCT_RETURN(addr, sp) \
+    write_register (SRA_REGNUM, (addr))
+
+#define NEED_TEXT_START_END 1
+
+/* According to the MC88100 RISC Microprocessor User's Manual, section
+   6.4.3.1.2:
+
+   ... can be made to return to a particular instruction by placing a
+   valid instruction address in the SNIP and the next sequential
+   instruction address in the SFIP (with V bits set and E bits clear).
+   The rte resumes execution at the instruction pointed to by the 
+   SNIP, then the SFIP.
+
+   The E bit is the least significant bit (bit 0).  The V (valid) bit is
+   bit 1.  This is why we logical or 2 into the values we are writing
+   below.  It turns out that SXIP plays no role when returning from an
+   exception so nothing special has to be done with it.  We could even
+   (presumably) give it a totally bogus value.
+
+   -- Kevin Buettner
+ */
+
+extern void m88k_target_write_pc (CORE_ADDR pc, ptid_t ptid);
+#define TARGET_WRITE_PC(VAL, PID) m88k_target_write_pc (VAL, PID)
diff --git a/gdb/config/m88k/xm-delta88.h b/gdb/config/m88k/xm-delta88.h
new file mode 100644
index 00000000000..27c8fe28d22
--- /dev/null
+++ b/gdb/config/m88k/xm-delta88.h
@@ -0,0 +1,44 @@
+/* Host machine description for Motorola Delta 88 system, for GDB.
+   Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1992, 1993
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#if !defined (USG)
+#define USG 1
+#endif
+
+#include <sys/param.h>
+#include <sys/time.h>
+
+#define HAVE_TERMIO
+
+/*#define USIZE 2048 */
+/*#define NBPG NBPC */
+/* Might be defined in <sys/param.h>.  I suspect this define was a relic
+   from before when BFD did core files.  */
+/* #define UPAGES USIZE */
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+
+/* Since registers r0 through r31 are stored directly in the struct ptrace_user,
+   (for m88k BCS)
+   the ptrace_user offsets are sufficient and KERNEL_U_ADDRESS can be 0 */
+
+#define KERNEL_U_ADDR 0
diff --git a/gdb/config/m88k/xm-delta88v4.h b/gdb/config/m88k/xm-delta88v4.h
new file mode 100644
index 00000000000..b09a02dd335
--- /dev/null
+++ b/gdb/config/m88k/xm-delta88v4.h
@@ -0,0 +1,22 @@
+/* Host machine description for Motorola Delta 88 box, for GDB.
+   Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "xm-sysv4.h"
diff --git a/gdb/config/m88k/xm-dgux.h b/gdb/config/m88k/xm-dgux.h
new file mode 100644
index 00000000000..b6f7f996d75
--- /dev/null
+++ b/gdb/config/m88k/xm-dgux.h
@@ -0,0 +1,55 @@
+/* Host-machine dependent parameters for Motorola 88000, for GDB.
+   Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993, 1998
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#if !defined (USG)
+#define USG 1
+#endif
+
+#include <sys/param.h>
+
+#ifdef __GNUC__
+#define memcpy __builtin_memcpy
+/* gcc doesn't have this, at least not gcc 1.92.  */
+/* #define memset __builtin_memset */
+#define strcmp __builtin_strcmp
+#endif
+
+#define x_foff _x_x._x_offset
+#define x_fname _x_name
+#define USER ptrace_user
+#define _BSD_WAIT_FLAVOR
+
+#define HAVE_TERMIO
+
+#ifndef USIZE
+#define USIZE 2048
+#endif
+#define NBPG NBPC
+#define UPAGES USIZE
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+
+/* Since registers r0 through r31 are stored directly in the struct ptrace_user,
+   (for m88k BCS)
+   the ptrace_user offsets are sufficient and KERNEL_U_ADDRESS can be 0 */
+
+#define KERNEL_U_ADDR 0
diff --git a/gdb/config/mcore/mcore.mt b/gdb/config/mcore/mcore.mt
new file mode 100644
index 00000000000..ed9a9231099
--- /dev/null
+++ b/gdb/config/mcore/mcore.mt
@@ -0,0 +1,5 @@
+# Target: Motorola MCore processor
+TDEPFILES= mcore-tdep.o  mcore-rom.o monitor.o dsrec.o
+TM_FILE= tm-mcore.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mcore/libsim.a
diff --git a/gdb/config/mcore/tm-mcore.h b/gdb/config/mcore/tm-mcore.h
new file mode 100644
index 00000000000..1da21b76e64
--- /dev/null
+++ b/gdb/config/mcore/tm-mcore.h
@@ -0,0 +1,161 @@
+/* Parameters for execution on a Motorola MCore.
+
+   Copyright 1995, 1999, 2000, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA. */
+
+#include "regcache.h"
+#include "symtab.h"		/* For namespace_enum.  */
+#include "symfile.h"		/* For entry_point_address().  */
+
+/* All registers are 32 bits */
+#define REGISTER_SIZE 4
+#define MAX_REGISTER_RAW_SIZE 4
+
+#define REGISTER_VIRTUAL_TYPE(REG) builtin_type_int
+
+#define REGISTER_BYTE(REG) ((REG) * REGISTER_SIZE)
+#define REGISTER_VIRTUAL_SIZE(REG) 4
+#define REGISTER_RAW_SIZE(REG) 4
+
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+#define REGISTER_BYTES (NUM_REGS * REGISTER_SIZE)
+
+extern char *mcore_register_names[];
+#define REGISTER_NAME(I) mcore_register_names[I]
+
+/* Registers. The Motorola MCore contains:
+
+   16 32-bit general purpose registers (r0-r15)
+   16 32-bit alternate file registers (ar0-ar15)
+   32 32-bit control registers (cr0-cr31)
+   + 1 pc
+   ------
+   65 registers */
+#define NUM_REGS 65
+#define PC_REGNUM 64
+#define SP_REGNUM 0
+#define FP_REGNUM (SP_REGNUM)
+#define PR_REGNUM 15
+#define FIRST_ARGREG 2
+#define LAST_ARGREG 7
+#define RETVAL_REGNUM 2
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+#define FUNCTION_START_OFFSET 0
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* BREAKPOINT_FROM_PC uses the program counter value to determine
+   the breakpoint that should be used. */
+extern const unsigned char *mcore_breakpoint_from_pc (CORE_ADDR *pcptr,
+						      int *lenptr);
+#define BREAKPOINT_FROM_PC(PCPTR, LENPTR) mcore_breakpoint_from_pc (PCPTR, LENPTR)
+
+#define INNER_THAN(LHS,RHS) ((LHS) < (RHS))
+
+#define SAVED_PC_AFTER_CALL(FRAME)  read_register (PR_REGNUM)
+
+struct frame_info;
+struct type;
+struct value;
+
+extern void mcore_init_extra_frame_info (struct frame_info *fi);
+#define INIT_EXTRA_FRAME_INFO(FROMLEAF, FI) mcore_init_extra_frame_info ((FI))
+#define INIT_FRAME_PC		/* Not necessary */
+#define FRAME_INIT_SAVED_REGS(FI)	/* handled by init_extra_frame_info */
+
+extern CORE_ADDR mcore_frame_chain (struct frame_info *fi);
+#define FRAME_CHAIN(FI) mcore_frame_chain ((FI))
+#define FRAME_CHAIN_VALID(FP, FI) generic_file_frame_chain_valid ((FP), (FI))
+
+extern CORE_ADDR mcore_frame_saved_pc (struct frame_info *);
+#define FRAME_SAVED_PC(FI) (mcore_frame_saved_pc ((FI)))
+
+/* Extracting/storing return values. */
+extern void mcore_store_return_value (struct type *type, char *valbuf);
+#define STORE_RETURN_VALUE(TYPE, VALBUF) mcore_store_return_value ((TYPE), (VALBUF))
+
+extern void mcore_extract_return_value (struct type *type, char *regbut, char *valbuf);
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+    mcore_extract_return_value ((TYPE), (REGBUF), (VALBUF));
+
+#define STORE_STRUCT_RETURN(ADDR, SP)	/* handled by mcore_push_arguments */
+
+extern CORE_ADDR mcore_extract_struct_value_address (char *regbuf);
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+    mcore_extract_struct_value_address (REGBUF)
+
+extern CORE_ADDR mcore_skip_prologue (CORE_ADDR pc);
+#define SKIP_PROLOGUE(PC) mcore_skip_prologue (PC)
+
+#define FRAME_ARGS_SKIP 0
+extern CORE_ADDR mcore_frame_args_address (struct frame_info *fi);
+#define FRAME_ARGS_ADDRESS(FI) mcore_frame_args_address ((FI))
+extern CORE_ADDR mcore_frame_locals_address (struct frame_info *fi);
+#define FRAME_LOCALS_ADDRESS(FI) mcore_frame_locals_address ((FI))
+#define FRAME_NUM_ARGS(FI) (-1)
+
+
+extern void mcore_pop_frame (struct frame_info *fi);
+#define POP_FRAME mcore_pop_frame (get_current_frame ())
+
+#define USE_GENERIC_DUMMY_FRAMES 1
+#define CALL_DUMMY                   {0}
+#define CALL_DUMMY_START_OFFSET      (0)
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+#define CALL_DUMMY_LOCATION          AT_ENTRY_POINT
+#define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP)
+#define CALL_DUMMY_ADDRESS()         entry_point_address ()
+#define SIZEOF_CALL_DUMMY_WORDS      0
+#define SAVE_DUMMY_FRAME_TOS(SP)     generic_save_dummy_frame_tos (SP)
+
+extern CORE_ADDR mcore_push_return_address (CORE_ADDR, CORE_ADDR);
+#define PUSH_RETURN_ADDRESS(PC, SP)  mcore_push_return_address (PC, SP)
+
+#define PUSH_DUMMY_FRAME	generic_push_dummy_frame ()
+
+extern CORE_ADDR mcore_push_arguments (int, struct value **, CORE_ADDR,
+				       unsigned char, CORE_ADDR);
+#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
+  (SP) = mcore_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
+
+#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP)
+
+/* MCore will never pass a sturcture by reference. It will always be split
+   between registers and stack. */
+#define REG_STRUCT_HAS_ADDR(GCC_P, TYPE) 0
+
+extern use_struct_convention_fn mcore_use_struct_convention;
+#define USE_STRUCT_CONVENTION(GCC_P, TYPE) mcore_use_struct_convention (GCC_P, TYPE)
+
+/* override the default get_saved_register function with
+   one that takes account of generic CALL_DUMMY frames */
+#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
+    generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
+
+/* Cons up virtual frame pointer for trace */
+extern void mcore_virtual_frame_pointer (CORE_ADDR, int *, LONGEST *);
+#define TARGET_VIRTUAL_FRAME_POINTER(PC, REGP, OFFP) \
+	mcore_virtual_frame_pointer ((PC), (REGP), (OFFP))
+
+/* For PE, gcc will tell us what th real type of
+   arguments are when it promotes arguments. */
+#define BELIEVE_PCC_PROMOTION 1
diff --git a/gdb/config/mips/bigmips.mt b/gdb/config/mips/bigmips.mt
new file mode 100644
index 00000000000..38f03f2f8e4
--- /dev/null
+++ b/gdb/config/mips/bigmips.mt
@@ -0,0 +1,3 @@
+# Target: Big-endian MIPS machine such as Sony News
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-bigmips.h
diff --git a/gdb/config/mips/bigmips64.mt b/gdb/config/mips/bigmips64.mt
new file mode 100644
index 00000000000..fcb7b21dae5
--- /dev/null
+++ b/gdb/config/mips/bigmips64.mt
@@ -0,0 +1,3 @@
+# Target: Big-endian MIPS machine such as Sony News
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-bigmips64.h
diff --git a/gdb/config/mips/decstation.mh b/gdb/config/mips/decstation.mh
new file mode 100644
index 00000000000..89ce310b6fa
--- /dev/null
+++ b/gdb/config/mips/decstation.mh
@@ -0,0 +1,4 @@
+# Host: Little-endian MIPS machine such as DECstation.
+XM_FILE= xm-mips.h
+NAT_FILE= nm-mips.h
+NATDEPFILES= infptrace.o inftarg.o corelow.o mips-nat.o fork-child.o
diff --git a/gdb/config/mips/decstation.mt b/gdb/config/mips/decstation.mt
new file mode 100644
index 00000000000..19847224d2f
--- /dev/null
+++ b/gdb/config/mips/decstation.mt
@@ -0,0 +1,3 @@
+# Target: Little-endian MIPS machine such as DECstation.
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-mips.h
diff --git a/gdb/config/mips/embed.mt b/gdb/config/mips/embed.mt
new file mode 100644
index 00000000000..42ab4aa47b9
--- /dev/null
+++ b/gdb/config/mips/embed.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian mips board, typically an IDT.
+TDEPFILES= mips-tdep.o remote-mips.o remote-array.o
+TM_FILE= tm-embed.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/embed64.mt b/gdb/config/mips/embed64.mt
new file mode 100644
index 00000000000..ed60fd25031
--- /dev/null
+++ b/gdb/config/mips/embed64.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian mips board, typically an IDT.
+TDEPFILES= mips-tdep.o remote-mips.o remote-array.o
+TM_FILE= tm-embed64.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/embedl.mt b/gdb/config/mips/embedl.mt
new file mode 100644
index 00000000000..0ed8b8d5021
--- /dev/null
+++ b/gdb/config/mips/embedl.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian mips board, typically an IDT.
+TDEPFILES= mips-tdep.o remote-mips.o remote-array.o
+TM_FILE= tm-embedl.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/embedl64.mt b/gdb/config/mips/embedl64.mt
new file mode 100644
index 00000000000..28c41be48fb
--- /dev/null
+++ b/gdb/config/mips/embedl64.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian mips board, typically an IDT.
+TDEPFILES= mips-tdep.o remote-mips.o remote-array.o
+TM_FILE= tm-embedl64.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/irix3.mh b/gdb/config/mips/irix3.mh
new file mode 100644
index 00000000000..fcb30ed3dcb
--- /dev/null
+++ b/gdb/config/mips/irix3.mh
@@ -0,0 +1,5 @@
+# Host: SGI Iris running irix 3.x
+XM_FILE= xm-irix3.h
+NAT_FILE= nm-irix3.h
+NATDEPFILES= fork-child.o corelow.o infptrace.o inftarg.o mips-nat.o
+XM_CLIBS=-lbsd
diff --git a/gdb/config/mips/irix3.mt b/gdb/config/mips/irix3.mt
new file mode 100644
index 00000000000..b3fa4dda384
--- /dev/null
+++ b/gdb/config/mips/irix3.mt
@@ -0,0 +1,3 @@
+# Target: MIPS SGI running Irix 3
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-irix3.h
diff --git a/gdb/config/mips/irix4.mh b/gdb/config/mips/irix4.mh
new file mode 100644
index 00000000000..4153a0ec2ac
--- /dev/null
+++ b/gdb/config/mips/irix4.mh
@@ -0,0 +1,10 @@
+# Host: SGI Iris running irix 4.x
+XM_FILE= xm-irix4.h
+NAT_FILE= nm-irix4.h
+NATDEPFILES= fork-child.o irix4-nat.o corelow.o procfs.o \
+	proc-api.o proc-events.o proc-flags.o proc-why.o
+
+
+XM_CLIBS=-lbsd -lsun
+# use cc in K&R mode, bump up some static compiler tables.
+CC = cc -cckr -Wf,-XNg1500 -Wf,-XNk1000 -Wf,-XNh1100
diff --git a/gdb/config/mips/irix5.mh b/gdb/config/mips/irix5.mh
new file mode 100644
index 00000000000..12690b0bc8b
--- /dev/null
+++ b/gdb/config/mips/irix5.mh
@@ -0,0 +1,7 @@
+# Host: SGI Iris running irix 5.x
+XM_FILE= xm-irix5.h
+NAT_FILE= nm-irix5.h
+NATDEPFILES= fork-child.o irix5-nat.o corelow.o procfs.o \
+	proc-api.o proc-events.o proc-flags.o proc-why.o
+
+XM_CLIBS=-lbsd -lsun
diff --git a/gdb/config/mips/irix5.mt b/gdb/config/mips/irix5.mt
new file mode 100644
index 00000000000..5b17bcdf1dd
--- /dev/null
+++ b/gdb/config/mips/irix5.mt
@@ -0,0 +1,3 @@
+# Target: MIPS SGI running Irix 5
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-irix5.h
diff --git a/gdb/config/mips/irix6.mh b/gdb/config/mips/irix6.mh
new file mode 100644
index 00000000000..99b47374906
--- /dev/null
+++ b/gdb/config/mips/irix6.mh
@@ -0,0 +1,7 @@
+# Host: SGI Iris running irix 6.x
+XM_FILE= xm-irix6.h
+NAT_FILE= nm-irix6.h
+NATDEPFILES= fork-child.o solib.o irix5-nat.o corelow.o procfs.o \
+	proc-api.o proc-events.o proc-flags.o proc-why.o
+
+XM_CLIBS=-lbsd
diff --git a/gdb/config/mips/irix6.mt b/gdb/config/mips/irix6.mt
new file mode 100644
index 00000000000..c5c5ccea8aa
--- /dev/null
+++ b/gdb/config/mips/irix6.mt
@@ -0,0 +1,3 @@
+# Target: MIPS SGI running Irix 6.x
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-irix6.h
diff --git a/gdb/config/mips/linux.mh b/gdb/config/mips/linux.mh
new file mode 100644
index 00000000000..991fd6c0dee
--- /dev/null
+++ b/gdb/config/mips/linux.mh
@@ -0,0 +1,7 @@
+# Host: Linux/MIPS
+XM_FILE= xm-linux.h
+NAT_FILE= nm-linux.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o mips-linux-nat.o \
+	thread-db.o lin-lwp.o proc-service.o linux-proc.o gcore.o
+
+LOADLIBES = -ldl -rdynamic
diff --git a/gdb/config/mips/linux.mt b/gdb/config/mips/linux.mt
new file mode 100644
index 00000000000..60bbfb25212
--- /dev/null
+++ b/gdb/config/mips/linux.mt
@@ -0,0 +1,9 @@
+# Target: Linux/MIPS
+TDEPFILES= mips-tdep.o mips-linux-tdep.o corelow.o \
+	solib.o solib-svr4.o
+TM_FILE= tm-linux.h
+
+GDBSERVER_DEPFILES = linux-low.o linux-mips-low.o reg-mips.o
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/littlemips.mh b/gdb/config/mips/littlemips.mh
new file mode 100644
index 00000000000..581a9084e3f
--- /dev/null
+++ b/gdb/config/mips/littlemips.mh
@@ -0,0 +1,3 @@
+# Host: Little-endian MIPS machine such as DECstation.
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
+XM_FILE= xm-mips.h
diff --git a/gdb/config/mips/littlemips.mt b/gdb/config/mips/littlemips.mt
new file mode 100644
index 00000000000..19847224d2f
--- /dev/null
+++ b/gdb/config/mips/littlemips.mt
@@ -0,0 +1,3 @@
+# Target: Little-endian MIPS machine such as DECstation.
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-mips.h
diff --git a/gdb/config/mips/mipsm3.mh b/gdb/config/mips/mipsm3.mh
new file mode 100644
index 00000000000..864ad57e24d
--- /dev/null
+++ b/gdb/config/mips/mipsm3.mh
@@ -0,0 +1,6 @@
+# Host: Little endian MIPS machine such as pmax
+# running Mach 3.0 operating system
+
+NATDEPFILES= mipsm3-nat.o m3-nat.o core-aout.o
+XM_FILE= xm-mipsm3.h
+NAT_FILE= ../nm-m3.h
diff --git a/gdb/config/mips/mipsm3.mt b/gdb/config/mips/mipsm3.mt
new file mode 100644
index 00000000000..66856d16c04
--- /dev/null
+++ b/gdb/config/mips/mipsm3.mt
@@ -0,0 +1,4 @@
+# Target: Little-endian MIPS machine such as pmax
+# running Mach 3.0 operating system
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-mipsm3.h
diff --git a/gdb/config/mips/mipsv4.mh b/gdb/config/mips/mipsv4.mh
new file mode 100644
index 00000000000..1a6104b3f94
--- /dev/null
+++ b/gdb/config/mips/mipsv4.mh
@@ -0,0 +1,6 @@
+# Host: Mips running SVR4
+XM_FILE= xm-mipsv4.h
+NAT_FILE= ../nm-sysv4.h
+NATDEPFILES= fork-child.o mipsv4-nat.o corelow.o core-regset.o \
+	solib.o solib-svr4.o solib-legacy.o \
+	procfs.o proc-api.o proc-events.o proc-flags.o proc-why.o
diff --git a/gdb/config/mips/mipsv4.mt b/gdb/config/mips/mipsv4.mt
new file mode 100644
index 00000000000..6d3b47d024a
--- /dev/null
+++ b/gdb/config/mips/mipsv4.mt
@@ -0,0 +1,3 @@
+# Target: MIPS running SVR4
+TDEPFILES= mips-tdep.o
+TM_FILE= tm-mipsv4.h
diff --git a/gdb/config/mips/nbsd.mh b/gdb/config/mips/nbsd.mh
new file mode 100644
index 00000000000..4556fc60b27
--- /dev/null
+++ b/gdb/config/mips/nbsd.mh
@@ -0,0 +1,4 @@
+# Host: MIPS running NetBSD
+NAT_CLIBS=
+NATDEPFILES= infptrace.o inftarg.o fork-child.o mipsnbsd-nat.o
+NAT_FILE= nm-nbsd.h
diff --git a/gdb/config/mips/nbsd.mt b/gdb/config/mips/nbsd.mt
new file mode 100644
index 00000000000..de529166c56
--- /dev/null
+++ b/gdb/config/mips/nbsd.mt
@@ -0,0 +1,6 @@
+# Target: MIPS running NetBSD
+TDEPFILES= mips-tdep.o mipsnbsd-tdep.o corelow.o solib.o solib-svr4.o
+TM_FILE= tm-nbsd.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/news-mips.mh b/gdb/config/mips/news-mips.mh
new file mode 100644
index 00000000000..5cc138f38e4
--- /dev/null
+++ b/gdb/config/mips/news-mips.mh
@@ -0,0 +1,3 @@
+# Host: Big-endian MIPS machine such as Sony News
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o mips-nat.o
+NAT_FILE= nm-news-mips.h
diff --git a/gdb/config/mips/nm-irix3.h b/gdb/config/mips/nm-irix3.h
new file mode 100644
index 00000000000..5cd2da35b6e
--- /dev/null
+++ b/gdb/config/mips/nm-irix3.h
@@ -0,0 +1,38 @@
+/* Definitions for SGI irix3 native support.
+   Copyright 1991, 1992, 1993, 1996, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Don't need special routines for Irix v3 -- we can use infptrace.c */
+#undef FETCH_INFERIOR_REGISTERS
+
+#define U_REGS_OFFSET 0
+
+/* Figure out where the longjmp will land.  We expect that we have just entered
+   longjmp and haven't yet setup the stack frame, so the args are still in the
+   argument regs.  a0 (CALL_ARG0) points at the jmp_buf structure from which we
+   extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+extern int get_longjmp_target (CORE_ADDR *);
+
+/* Is this really true or is this just a leftover from a DECstation
+   config file?  */
+
+#define	ONE_PROCESS_WRITETEXT
diff --git a/gdb/config/mips/nm-irix4.h b/gdb/config/mips/nm-irix4.h
new file mode 100644
index 00000000000..9c02eb3573b
--- /dev/null
+++ b/gdb/config/mips/nm-irix4.h
@@ -0,0 +1,67 @@
+/* Definitions for native support of irix4.
+
+   Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1999, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/*
+ * Let's use /debug instead of all this dangerous mucking about
+ * with ptrace(), which seems *extremely* fragile, anyway.
+ */
+#define USE_PROC_FS
+#define CTL_PROC_NAME_FMT "/debug/%d"
+#define AS_PROC_NAME_FMT "/debug/%d"
+#define MAP_PROC_NAME_FMT "/debug/%d"
+#define STATUS_PROC_NAME_FMT "/debug/%d"
+
+/* Don't need special routines for the SGI -- we can use infptrace.c */
+#undef FETCH_INFERIOR_REGISTERS
+
+#define U_REGS_OFFSET 0
+
+/* Is this really true or is this just a leftover from a DECstation
+   config file?  */
+
+#define	ONE_PROCESS_WRITETEXT
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+/* Temporary new watchpoint stuff */
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
+	((type) == bp_hardware_watchpoint)
+
+/* When a hardware watchpoint fires off the PC will be left at the
+   instruction which caused the watchpoint.  It will be necessary for
+   GDB to step over the watchpoint. */
+
+#define STOPPED_BY_WATCHPOINT(W) \
+  procfs_stopped_by_watchpoint(inferior_ptid)
+extern int procfs_stopped_by_watchpoint (ptid_t);
+
+#define HAVE_NONSTEPPABLE_WATCHPOINT
+
+/* Use these macros for watchpoint insertion/deletion.  */
+/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
+#define target_insert_watchpoint(ADDR, LEN, TYPE) \
+     procfs_set_watchpoint (inferior_ptid, ADDR, LEN, TYPE, 0)
+#define target_remove_watchpoint(ADDR, LEN, TYPE) \
+     procfs_set_watchpoint (inferior_ptid, ADDR, 0, 0, 0)
+extern int procfs_set_watchpoint (ptid_t, CORE_ADDR, int, int, int);
+
+#define TARGET_REGION_SIZE_OK_FOR_HW_WATCHPOINT(SIZE) 1
diff --git a/gdb/config/mips/nm-irix5.h b/gdb/config/mips/nm-irix5.h
new file mode 100644
index 00000000000..bed3144530d
--- /dev/null
+++ b/gdb/config/mips/nm-irix5.h
@@ -0,0 +1,47 @@
+/* Definitions for native support of irix5.
+
+   Copyright 1993, 1996, 1998, 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "nm-sysv4.h"
+#undef IN_SOLIB_DYNSYM_RESOLVE_CODE
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) 1
+
+/* When a hardware watchpoint fires off the PC will be left at the
+   instruction which caused the watchpoint.  It will be necessary for
+   GDB to step over the watchpoint. */
+
+#define STOPPED_BY_WATCHPOINT(W) \
+     procfs_stopped_by_watchpoint(inferior_ptid)
+extern int procfs_stopped_by_watchpoint (ptid_t);
+
+#define HAVE_NONSTEPPABLE_WATCHPOINT
+
+/* Use these macros for watchpoint insertion/deletion.  */
+/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
+#define target_insert_watchpoint(ADDR, LEN, TYPE) \
+     procfs_set_watchpoint (inferior_ptid, ADDR, LEN, TYPE, 0)
+#define target_remove_watchpoint(ADDR, LEN, TYPE) \
+     procfs_set_watchpoint (inferior_ptid, ADDR, 0, 0, 0)
+extern int procfs_set_watchpoint (ptid_t, CORE_ADDR, int, int, int);
+
+#define TARGET_REGION_SIZE_OK_FOR_HW_WATCHPOINT(SIZE) 1
diff --git a/gdb/config/mips/nm-irix6.h b/gdb/config/mips/nm-irix6.h
new file mode 100644
index 00000000000..301b62922db
--- /dev/null
+++ b/gdb/config/mips/nm-irix6.h
@@ -0,0 +1,22 @@
+/* Definitions for native support of irix6.
+
+   Copyright 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/nm-irix5.h"
diff --git a/gdb/config/mips/nm-linux.h b/gdb/config/mips/nm-linux.h
new file mode 100644
index 00000000000..c43ecd68393
--- /dev/null
+++ b/gdb/config/mips/nm-linux.h
@@ -0,0 +1,51 @@
+/* Native-dependent definitions for GNU/Linux on MIPS.
+
+   Copyright 1996, 2001, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_MIPSLINUX_H
+#define NM_MIPSLINUX_H
+
+#define MIPS_GNULINUX_TARGET
+
+#include "nm-linux.h"
+
+/* Return sizeof user struct to callers in less machine dependent
+   routines.  Hard coded for cross-compilation friendliness. */
+
+#define KERNEL_U_SIZE 504
+
+/* ptrace register ``addresses'' are absolute.  */
+
+#define U_REGS_OFFSET 0
+
+/* ptrace transfers longs, and expects addresses as longs.  */
+
+#define PTRACE_ARG3_TYPE long
+#define PTRACE_XFER_TYPE long
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+  (addr) = mips_register_addr ((regno),(blockend))
+
+int mips_linux_cannot_fetch_register (int regno);
+int mips_linux_cannot_store_register (int regno);
+#define CANNOT_FETCH_REGISTER(regno) mips_linux_cannot_fetch_register (regno)
+#define CANNOT_STORE_REGISTER(regno) mips_linux_cannot_store_register (regno)
+
+#endif /* NM_MIPSLINUX_H */
diff --git a/gdb/config/mips/nm-mips.h b/gdb/config/mips/nm-mips.h
new file mode 100644
index 00000000000..7b61d83e6b9
--- /dev/null
+++ b/gdb/config/mips/nm-mips.h
@@ -0,0 +1,34 @@
+/* Native definitions for GDB on DECstations, Sony News. and MIPS Riscos systems
+   Copyright 1986, 1987, 1989, 1992, 1995, 1996, 2000
+   Free Software Foundation, Inc.
+   Contributed by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin
+   and by Alessandro Forin(af@cs.cmu.edu) at CMU
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
+#define FETCH_INFERIOR_REGISTERS
+
+/* Figure out where the longjmp will land.  We expect that we have just entered
+   longjmp and haven't yet setup the stack frame, so the args are still in the
+   argument regs.  a0 (CALL_ARG0) points at the jmp_buf structure from which we
+   extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+extern int get_longjmp_target (CORE_ADDR *);
diff --git a/gdb/config/mips/nm-nbsd.h b/gdb/config/mips/nm-nbsd.h
new file mode 100644
index 00000000000..67628c2fa97
--- /dev/null
+++ b/gdb/config/mips/nm-nbsd.h
@@ -0,0 +1,28 @@
+/* Native-dependent definitions for NetBSD/mips.
+   Copyright 2002 Free Software Foundation, Inc.
+   Contributed by Wasabi Systems, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSD_H
+#define NM_NBSD_H
+
+/* Get generic NetBSD native definitions.  */
+#include "config/nm-nbsd.h"
+
+#endif /* NM_NBSD_H */
diff --git a/gdb/config/mips/nm-news-mips.h b/gdb/config/mips/nm-news-mips.h
new file mode 100644
index 00000000000..9f80eb55709
--- /dev/null
+++ b/gdb/config/mips/nm-news-mips.h
@@ -0,0 +1,43 @@
+/* Definitions to make GDB run on a mips box under 4.3bsd.
+   Copyright 1986, 1987, 1989, 1993, 1996 Free Software Foundation, Inc.
+   Contributed by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin
+   and by Alessandro Forin(af@cs.cmu.edu) at CMU
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NEWS_MIPS_H
+#define NM_NEWS_MIPS_H 1
+
+/* Needed for RISC NEWS core files.  */
+#include <machine/machparam.h>
+#include <sys/types.h>
+#define KERNEL_U_ADDR UADDR
+
+#define REGISTER_U_ADDR(addr, blockend, regno) 		\
+	if (regno < 38) addr = (NBPG*UPAGES) + (regno - 38)*sizeof(int);\
+	else addr = 0;		/* ..somewhere in the pcb */
+
+/* Kernel is a bit tenacious about sharing text segments, disallowing bpts.  */
+#define	ONE_PROCESS_WRITETEXT
+
+#include "mips/nm-mips.h"
+
+/* Apparently not in <sys/types.h> */
+typedef int pid_t;
+
+#endif /* NM_NEWS_MIPS_H */
diff --git a/gdb/config/mips/nm-riscos.h b/gdb/config/mips/nm-riscos.h
new file mode 100644
index 00000000000..7f68b677092
--- /dev/null
+++ b/gdb/config/mips/nm-riscos.h
@@ -0,0 +1,60 @@
+/* This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* MIPS running RISC/os 4.52C.  */
+
+#define PCB_OFFSET(FIELD) ((int)&((struct user*)0)->u_pcb.FIELD)
+
+/* RISC/os 5.0 defines this in machparam.h.  */
+#include <bsd43/machine/machparam.h>
+#define NBPG BSD43_NBPG
+#define UPAGES BSD43_UPAGES
+
+/* Where is this used?  I don't see any uses in mips-nat.c, and I don't think
+   the uses in infptrace.c are used if FETCH_INFERIOR_REGISTERS is defined.
+   Does the compiler react badly to "extern CORE_ADDR kernel_u_addr" (even
+   if never referenced)?  */
+#define KERNEL_U_ADDR BSD43_UADDR
+
+#define REGISTER_U_ADDR(addr, blockend, regno) 		\
+	      if (regno < FP0_REGNUM) \
+		  addr =  UPAGES*NBPG-EF_SIZE+4*((regno)+EF_AT-1); \
+	      else if (regno < PC_REGNUM) \
+		  addr = PCB_OFFSET(pcb_fpregs[0]) + 4*(regno-FP0_REGNUM); \
+              else if (regno == PS_REGNUM) \
+                  addr = UPAGES*NBPG-EF_SIZE+4*EF_SR; \
+              else if (regno == BADVADDR_REGNUM) \
+  		  addr = UPAGES*NBPG-EF_SIZE+4*EF_BADVADDR; \
+	      else if (regno == LO_REGNUM) \
+		  addr = UPAGES*NBPG-EF_SIZE+4*EF_MDLO; \
+	      else if (regno == HI_REGNUM) \
+		  addr = UPAGES*NBPG-EF_SIZE+4*EF_MDHI; \
+	      else if (regno == CAUSE_REGNUM) \
+		  addr = UPAGES*NBPG-EF_SIZE+4*EF_CAUSE; \
+	      else if (regno == PC_REGNUM) \
+		  addr = UPAGES*NBPG-EF_SIZE+4*EF_EPC; \
+              else if (regno < FCRCS_REGNUM) \
+		  addr = PCB_OFFSET(pcb_fpregs[0]) + 4*(regno-FP0_REGNUM); \
+	      else if (regno == FCRCS_REGNUM) \
+		  addr = PCB_OFFSET(pcb_fpc_csr); \
+	      else if (regno == FCRIR_REGNUM) \
+		  addr = PCB_OFFSET(pcb_fpc_eir); \
+              else \
+                  addr = 0;
+
+#include "mips/nm-mips.h"
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
+#define FETCH_INFERIOR_REGISTERS
diff --git a/gdb/config/mips/riscos.mh b/gdb/config/mips/riscos.mh
new file mode 100644
index 00000000000..6a3192f382b
--- /dev/null
+++ b/gdb/config/mips/riscos.mh
@@ -0,0 +1,16 @@
+# Host: MIPS running RISC/os
+
+XM_FILE= xm-riscos.h
+
+NAT_FILE= nm-riscos.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o mips-nat.o
+
+MH_CFLAGS=-Wf,-XNh10000
+
+# ptrace(2) apparently has problems in the BSD environment.  No workaround is
+# known except to select the sysv environment.  Could we use /proc instead?
+# These "sysv environments" and "bsd environments" often end up being a pain.
+#
+# This is not part of CFLAGS because perhaps not all C compilers have this
+# option.
+CC= cc -systype sysv
diff --git a/gdb/config/mips/tm-bigmips.h b/gdb/config/mips/tm-bigmips.h
new file mode 100644
index 00000000000..7a5a6b816c1
--- /dev/null
+++ b/gdb/config/mips/tm-bigmips.h
@@ -0,0 +1,20 @@
+/* Copyright 1990, 1994, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-mips.h"
diff --git a/gdb/config/mips/tm-bigmips64.h b/gdb/config/mips/tm-bigmips64.h
new file mode 100644
index 00000000000..9f171eef11c
--- /dev/null
+++ b/gdb/config/mips/tm-bigmips64.h
@@ -0,0 +1,22 @@
+/* Target machine parameters for MIPS r4000
+   Copyright 1994, 2000 Free Software Foundation, Inc.
+   Contributed by Ian Lance Taylor (ian@cygnus.com)
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-mips64.h"
diff --git a/gdb/config/mips/tm-embed.h b/gdb/config/mips/tm-embed.h
new file mode 100644
index 00000000000..300e549aea1
--- /dev/null
+++ b/gdb/config/mips/tm-embed.h
@@ -0,0 +1,49 @@
+/* Copyright 1993, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-bigmips.h"
+
+#undef DEFAULT_MIPS_TYPE
+#define DEFAULT_MIPS_TYPE "r3051"
+
+/* Watchpoint support */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+/* Use these macros for watchpoint insertion/deletion.  */
+/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
+
+#define target_insert_watchpoint(addr, len, type) \
+	remote_mips_set_watchpoint (addr, len, type)
+int remote_mips_set_watchpoint (CORE_ADDR addr, int len, int type);
+
+#define target_remove_watchpoint(addr, len, type) \
+	remote_mips_remove_watchpoint (addr, len, type)
+int remote_mips_remove_watchpoint (CORE_ADDR addr, int len, int type);
+
+/* We need to remove watchpoints when stepping, else we hit them again! */
+
+#define HAVE_NONSTEPPABLE_WATCHPOINT
+
+int remote_mips_stopped_by_watchpoint (void);
+#define STOPPED_BY_WATCHPOINT(w) remote_mips_stopped_by_watchpoint ()
+
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
+  remote_mips_can_use_hardware_watchpoint(cnt)
+int remote_mips_can_use_hardware_watchpoint (int cnt);
diff --git a/gdb/config/mips/tm-embed64.h b/gdb/config/mips/tm-embed64.h
new file mode 100644
index 00000000000..630b8e02516
--- /dev/null
+++ b/gdb/config/mips/tm-embed64.h
@@ -0,0 +1,20 @@
+/* Copyright 1993, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-bigmips64.h"
diff --git a/gdb/config/mips/tm-embedl.h b/gdb/config/mips/tm-embedl.h
new file mode 100644
index 00000000000..d53f5c86228
--- /dev/null
+++ b/gdb/config/mips/tm-embedl.h
@@ -0,0 +1,20 @@
+/* Copyright 1993, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-mips.h"
diff --git a/gdb/config/mips/tm-embedl64.h b/gdb/config/mips/tm-embedl64.h
new file mode 100644
index 00000000000..c76c612ac9d
--- /dev/null
+++ b/gdb/config/mips/tm-embedl64.h
@@ -0,0 +1,20 @@
+/* Copyright 1993, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-mips64.h"
diff --git a/gdb/config/mips/tm-irix3.h b/gdb/config/mips/tm-irix3.h
new file mode 100644
index 00000000000..11859e59a5d
--- /dev/null
+++ b/gdb/config/mips/tm-irix3.h
@@ -0,0 +1,82 @@
+/* Target machine description for SGI Iris under Irix, for GDB.
+   Copyright 1990, 1991, 1992, 1993, 1995, 1999
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-bigmips.h"
+
+/* SGI's assembler doesn't grok dollar signs in identifiers.
+   So we use dots instead.  This item must be coordinated with G++. */
+#undef CPLUS_MARKER
+#define CPLUS_MARKER '.'
+
+/* Redefine register numbers for SGI. */
+
+#undef NUM_REGS
+#undef MIPS_REGISTER_NAMES
+#undef FP0_REGNUM
+#undef PC_REGNUM
+#undef HI_REGNUM
+#undef LO_REGNUM
+#undef CAUSE_REGNUM
+#undef BADVADDR_REGNUM
+#undef FCRCS_REGNUM
+#undef FCRIR_REGNUM
+
+/* Number of machine registers */
+
+#define NUM_REGS 71
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+
+#define MIPS_REGISTER_NAMES 	\
+    {	"zero",	"at",	"v0",	"v1",	"a0",	"a1",	"a2",	"a3", \
+	"t0",	"t1",	"t2",	"t3",	"t4",	"t5",	"t6",	"t7", \
+	"s0",	"s1",	"s2",	"s3",	"s4",	"s5",	"s6",	"s7", \
+	"t8",	"t9",	"k0",	"k1",	"gp",	"sp",	"fp",	"ra", \
+	"f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7", \
+	"f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15", \
+	"f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",\
+	"f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",\
+	"pc",	"cause", "bad",	"hi",	"lo",	"fsr",  "fir" \
+    }
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define FP0_REGNUM 32		/* Floating point register 0 (single float) */
+#define PC_REGNUM 64		/* Contains program counter */
+#define CAUSE_REGNUM 65		/* describes last exception */
+#define BADVADDR_REGNUM 66	/* bad vaddr for addressing exception */
+#define HI_REGNUM 67		/* Multiple/divide temp */
+#define LO_REGNUM 68		/* ... */
+#define FCRCS_REGNUM 69		/* FP control/status */
+#define FCRIR_REGNUM 70		/* FP implementation/revision */
+
+/* Offsets for register values in _sigtramp frame.
+   sigcontext is immediately above the _sigtramp frame on Irix.  */
+#define SIGFRAME_BASE		0x0
+#define SIGFRAME_PC_OFF		(SIGFRAME_BASE + 2 * 4)
+#define SIGFRAME_REGSAVE_OFF	(SIGFRAME_BASE + 3 * 4)
+#define SIGFRAME_FPREGSAVE_OFF	(SIGFRAME_BASE + 3 * 4 + 32 * 4 + 4)
diff --git a/gdb/config/mips/tm-irix5.h b/gdb/config/mips/tm-irix5.h
new file mode 100644
index 00000000000..49b842fb7f1
--- /dev/null
+++ b/gdb/config/mips/tm-irix5.h
@@ -0,0 +1,85 @@
+/* Target machine description for SGI Iris under Irix 5, for GDB.
+   Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1998, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-irix3.h"
+
+/* FIXME: cagney/2000-04-04: Testing the _MIPS_SIM_NABI32 and
+   _MIPS_SIM in a tm-*.h file is simply wrong!  Those are
+   host-dependant macros (provided by /usr/include) and stop any
+   chance of the target being cross compiled */
+#if defined (_MIPS_SIM_NABI32) && _MIPS_SIM == _MIPS_SIM_NABI32
+/*
+ * Irix 6 (n32 ABI) has 32-bit GP regs and 64-bit FP regs
+ */
+
+#undef  REGISTER_BYTES
+#define REGISTER_BYTES (MIPS_NUMREGS * 8 + (NUM_REGS - MIPS_NUMREGS) * MIPS_REGSIZE)
+
+#undef  REGISTER_BYTE
+#define REGISTER_BYTE(N) \
+     (((N) < FP0_REGNUM) ? (N) * MIPS_REGSIZE : \
+      ((N) < FP0_REGNUM + 32) ?     \
+      FP0_REGNUM * MIPS_REGSIZE + \
+      ((N) - FP0_REGNUM) * sizeof(double) : \
+      32 * sizeof(double) + ((N) - 32) * MIPS_REGSIZE)
+
+#undef  REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+	(((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
+	 : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
+	 : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
+	 : builtin_type_int)
+
+#undef  MIPS_LAST_ARG_REGNUM
+#define MIPS_LAST_ARG_REGNUM 11	/* N32 uses R4 through R11 for args */
+
+/* MIPS_STACK_ARGSIZE -- how many bytes does a pushed function arg take
+   up on the stack? For the n32 ABI, eight bytes are reserved for each
+   register. Like MIPS_SAVED_REGSIZE but different. */
+#define MIPS_DEFAULT_STACK_ARGSIZE 8
+
+/* N32 does not reserve home space for registers used to carry
+   parameters. */
+#define MIPS_REGS_HAVE_HOME_P 0
+
+/* Force N32 ABI as the default. */
+#define MIPS_DEFAULT_ABI MIPS_ABI_N32
+
+#endif /* N32 */
+
+
+/* The signal handler trampoline is called _sigtramp.  */
+#undef IN_SIGTRAMP
+#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))
+
+/* Irix 5 saves a full 64 bits for each register.  We skip 2 * 4 to
+   get to the saved PC (the register mask and status register are both
+   32 bits) and then another 4 to get to the lower 32 bits.  We skip
+   the same 4 bytes, plus the 8 bytes for the PC to get to the
+   registers, and add another 4 to get to the lower 32 bits.  We skip
+   8 bytes per register.  */
+#undef SIGFRAME_PC_OFF
+#define SIGFRAME_PC_OFF		(SIGFRAME_BASE + 2 * 4 + 4)
+#undef SIGFRAME_REGSAVE_OFF
+#define SIGFRAME_REGSAVE_OFF	(SIGFRAME_BASE + 2 * 4 + 8 + 4)
+#undef SIGFRAME_FPREGSAVE_OFF
+#define SIGFRAME_FPREGSAVE_OFF	(SIGFRAME_BASE + 2 * 4 + 8 + 32 * 8 + 4)
+#define SIGFRAME_REG_SIZE	8
diff --git a/gdb/config/mips/tm-irix6.h b/gdb/config/mips/tm-irix6.h
new file mode 100644
index 00000000000..2d90b2ef998
--- /dev/null
+++ b/gdb/config/mips/tm-irix6.h
@@ -0,0 +1,139 @@
+/* Target machine description for SGI Iris under Irix 6.x, for GDB.
+   Copyright 2001
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-bigmips.h"
+
+/* SGI's assembler doesn't grok dollar signs in identifiers.
+   So we use dots instead.  This item must be coordinated with G++. */
+#undef CPLUS_MARKER
+#define CPLUS_MARKER '.'
+
+/* Redefine register numbers for SGI. */
+
+#undef NUM_REGS
+#undef MIPS_REGISTER_NAMES
+#undef FP0_REGNUM
+#undef PC_REGNUM
+#undef HI_REGNUM
+#undef LO_REGNUM
+#undef CAUSE_REGNUM
+#undef BADVADDR_REGNUM
+#undef FCRCS_REGNUM
+#undef FCRIR_REGNUM
+#undef FP_REGNUM
+
+/* Number of machine registers */
+
+#define NUM_REGS 71
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+
+#define MIPS_REGISTER_NAMES 	\
+    {	"zero",	"at",	"v0",	"v1",	"a0",	"a1",	"a2",	"a3", \
+	"a4",	"a5",	"a6",	"a7",	"t0",	"t1",	"t2",	"t3", \
+	"s0",	"s1",	"s2",	"s3",	"s4",	"s5",	"s6",	"s7", \
+	"t8",	"t9",	"k0",	"k1",	"gp",	"sp",	"s8",	"ra", \
+	"f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7", \
+	"f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15", \
+	"f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",\
+	"f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",\
+	"pc",	"cause", "bad",	"hi",	"lo",	"fsr",  "fir" \
+    }
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define FP0_REGNUM 32		/* Floating point register 0 (single float) */
+#define PC_REGNUM 64		/* Contains program counter */
+#define CAUSE_REGNUM 65		/* describes last exception */
+#define BADVADDR_REGNUM 66	/* bad vaddr for addressing exception */
+#define HI_REGNUM 67		/* Multiple/divide temp */
+#define LO_REGNUM 68		/* ... */
+#define FCRCS_REGNUM 69		/* FP control/status */
+#define FCRIR_REGNUM 70		/* FP implementation/revision */
+#define FP_REGNUM 30		/* S8 register is the Frame Pointer */
+
+
+#undef  REGISTER_BYTES
+#define REGISTER_BYTES (MIPS_NUMREGS * 8 + (NUM_REGS - MIPS_NUMREGS) * MIPS_REGSIZE)
+
+#undef  REGISTER_BYTE
+#define REGISTER_BYTE(N) \
+     (((N) < FP0_REGNUM) ? (N) * MIPS_REGSIZE : \
+      ((N) < FP0_REGNUM + 32) ?     \
+      FP0_REGNUM * MIPS_REGSIZE + \
+      ((N) - FP0_REGNUM) * sizeof(double) : \
+      32 * sizeof(double) + ((N) - 32) * MIPS_REGSIZE)
+
+#undef  REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+	(((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
+	 : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
+	 : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
+	 : builtin_type_int)
+
+#undef  MIPS_LAST_ARG_REGNUM
+#define MIPS_LAST_ARG_REGNUM 11	/* N32 uses R4 through R11 for args */
+
+/* MIPS_STACK_ARGSIZE -- how many bytes does a pushed function arg take
+   up on the stack? For the n32 ABI, eight bytes are reserved for each
+   register. Like MIPS_SAVED_REGSIZE but different. */
+#define MIPS_DEFAULT_STACK_ARGSIZE 8
+
+/* N32 does not reserve home space for registers used to carry
+   parameters. */
+#define MIPS_REGS_HAVE_HOME_P 0
+
+/* Force N32 ABI as the default. */
+#define MIPS_DEFAULT_ABI MIPS_ABI_N32
+
+
+/* The signal handler trampoline is called _sigtramp.  */
+#undef IN_SIGTRAMP
+#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))
+
+/* Offsets for register values in _sigtramp frame.
+   sigcontext is immediately above the _sigtramp frame on Irix.  */
+#undef SIGFRAME_BASE
+#define SIGFRAME_BASE		0
+
+/* Irix 5 saves a full 64 bits for each register.  We skip 2 * 4 to
+   get to the saved PC (the register mask and status register are both
+   32 bits) and then another 4 to get to the lower 32 bits.  We skip
+   the same 4 bytes, plus the 8 bytes for the PC to get to the
+   registers, and add another 4 to get to the lower 32 bits.  We skip
+   8 bytes per register.  */
+#undef SIGFRAME_PC_OFF
+#define SIGFRAME_PC_OFF		(SIGFRAME_BASE + 2 * 4 + 4)
+#undef SIGFRAME_REGSAVE_OFF
+#define SIGFRAME_REGSAVE_OFF	(SIGFRAME_BASE + 2 * 4 + 8 + 4)
+#undef SIGFRAME_FPREGSAVE_OFF
+#define SIGFRAME_FPREGSAVE_OFF	(SIGFRAME_BASE + 2 * 4 + 8 + 32 * 8 + 4)
+#define SIGFRAME_REG_SIZE	8
+
+/* Select the disassembler */
+#undef TM_PRINT_INSN_MACH
+#define TM_PRINT_INSN_MACH bfd_mach_mips8000
diff --git a/gdb/config/mips/tm-linux.h b/gdb/config/mips/tm-linux.h
new file mode 100644
index 00000000000..0e9de3cbb26
--- /dev/null
+++ b/gdb/config/mips/tm-linux.h
@@ -0,0 +1,75 @@
+/* Target-dependent definitions for GNU/Linux MIPS.
+
+   Copyright 2001, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_MIPSLINUX_H
+#define TM_MIPSLINUX_H
+
+#include "mips/tm-mips.h"
+
+/* We don't want to inherit tm-mips.h's shared library trampoline code.  */
+
+#undef IN_SOLIB_CALL_TRAMPOLINE
+#undef IN_SOLIB_RETURN_TRAMPOLINE
+#undef SKIP_TRAMPOLINE_CODE
+#undef IGNORE_HELPER_CALL
+
+/* GNU/Linux MIPS has __SIGRTMAX == 127.  */
+
+#define REALTIME_LO 32
+#define REALTIME_HI 128
+
+#include "tm-linux.h"
+
+/* There's an E_MIPS_ABI_O32 flag in e_flags, but we don't use it - in
+   fact, using it may violate the o32 ABI.  */
+
+#define MIPS_DEFAULT_ABI MIPS_ABI_O32
+
+/* Use target_specific function to define link map offsets.  */
+
+extern struct link_map_offsets *mips_linux_svr4_fetch_link_map_offsets (void);
+#define SVR4_FETCH_LINK_MAP_OFFSETS() \
+  mips_linux_svr4_fetch_link_map_offsets ()
+
+/* Details about jmp_buf.  */
+
+#define JB_ELEMENT_SIZE 4
+#define JB_PC 0
+
+/* Figure out where the longjmp will land.  Slurp the arguments out of the
+   stack.  We expect the first arg to be a pointer to the jmp_buf structure
+   from which we extract the pc (JB_PC) that we will land at.  The pc is
+   copied into ADDR.  This routine returns 1 on success.  */
+
+#define GET_LONGJMP_TARGET(ADDR) mips_linux_get_longjmp_target(ADDR)
+extern int mips_linux_get_longjmp_target (CORE_ADDR *);
+
+/* We do single stepping in software.  */
+
+#define SOFTWARE_SINGLE_STEP_P() 1
+#define SOFTWARE_SINGLE_STEP(sig,bp_p) mips_software_single_step (sig, bp_p)
+
+/* FIXME: This still needs to be implemented.  */
+
+#undef  IN_SIGTRAMP
+#define IN_SIGTRAMP(pc, name)	(0)
+
+#endif /* TM_MIPSLINUX_H */
diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h
new file mode 100644
index 00000000000..8403ef87153
--- /dev/null
+++ b/gdb/config/mips/tm-mips.h
@@ -0,0 +1,493 @@
+/* Definitions to make GDB run on a mips box under 4.3bsd.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
+   1998, 1999, 2000
+   Free Software Foundation, Inc.
+   Contributed by Per Bothner (bothner@cs.wisc.edu) at U.Wisconsin
+   and by Alessandro Forin (af@cs.cmu.edu) at CMU..
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_MIPS_H
+#define TM_MIPS_H 1
+
+#define GDB_MULTI_ARCH 1
+
+#include "regcache.h"
+
+struct frame_info;
+struct symbol;
+struct type;
+struct value;
+
+#include <bfd.h>
+#include "coff/sym.h"		/* Needed for PDR below.  */
+#include "coff/symconst.h"
+
+#if !defined (MIPS_EABI)
+#define MIPS_EABI 0
+#endif
+
+/* PC should be masked to remove possible MIPS16 flag */
+#if !defined (GDB_TARGET_MASK_DISAS_PC)
+#define GDB_TARGET_MASK_DISAS_PC(addr) UNMAKE_MIPS16_ADDR(addr)
+#endif
+#if !defined (GDB_TARGET_UNMASK_DISAS_PC)
+#define GDB_TARGET_UNMASK_DISAS_PC(addr) MAKE_MIPS16_ADDR(addr)
+#endif
+
+/* The name of the usual type of MIPS processor that is in the target
+   system.  */
+
+#define DEFAULT_MIPS_TYPE "generic"
+
+/* Remove useless bits from the stack pointer.  */
+
+#define TARGET_READ_SP() ADDR_BITS_REMOVE (read_register (SP_REGNUM))
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Return non-zero if PC points to an instruction which will cause a step
+   to execute both the instruction at PC and an instruction at PC+4.  */
+extern int mips_step_skips_delay (CORE_ADDR);
+#define STEP_SKIPS_DELAY_P (1)
+#define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc))
+
+/* Are we currently handling a signal */
+
+extern int in_sigtramp (CORE_ADDR, char *);
+#define IN_SIGTRAMP(pc, name)	in_sigtramp(pc, name)
+
+/* Say how long (ordinary) registers are.  This is a piece of bogosity
+   used in push_word and a few other places; REGISTER_RAW_SIZE is the
+   real way to know how big a register is.  */
+
+#define REGISTER_SIZE 4
+
+/* The size of a register.  This is predefined in tm-mips64.h.  We
+   can't use REGISTER_SIZE because that is used for various other
+   things.  */
+
+#ifndef MIPS_REGSIZE
+#define MIPS_REGSIZE 4
+#endif
+
+/* Number of machine registers */
+
+#ifndef NUM_REGS
+#define NUM_REGS 90
+#endif
+
+/* Given the register index, return the name of the corresponding
+   register. */
+extern char *mips_register_name (int regnr);
+#define REGISTER_NAME(i) mips_register_name (i)
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+
+#ifndef MIPS_REGISTER_NAMES
+#define MIPS_REGISTER_NAMES 	\
+    {	"zero",	"at",	"v0",	"v1",	"a0",	"a1",	"a2",	"a3", \
+	"t0",	"t1",	"t2",	"t3",	"t4",	"t5",	"t6",	"t7", \
+	"s0",	"s1",	"s2",	"s3",	"s4",	"s5",	"s6",	"s7", \
+	"t8",	"t9",	"k0",	"k1",	"gp",	"sp",	"s8",	"ra", \
+	"sr",	"lo",	"hi",	"bad",	"cause","pc",    \
+	"f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7", \
+	"f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15", \
+	"f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",\
+	"f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",\
+	"fsr",  "fir",  "fp",	"", \
+	"",	"",	"",	"",	"",	"",	"",	"", \
+	"",	"",	"",	"",	"",	"",	"",	"", \
+    }
+#endif
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define ZERO_REGNUM 0		/* read-only register, always 0 */
+#define V0_REGNUM 2		/* Function integer return value */
+#define A0_REGNUM 4		/* Loc of first arg during a subr call */
+#if MIPS_EABI
+#define MIPS_LAST_ARG_REGNUM 11	/* EABI uses R4 through R11 for args */
+#else
+#define MIPS_LAST_ARG_REGNUM 7	/* old ABI uses R4 through R7 for args */
+#endif
+#define T9_REGNUM 25		/* Contains address of callee in PIC */
+#define SP_REGNUM 29		/* Contains address of top of stack */
+#define RA_REGNUM 31		/* Contains return address value */
+#define PS_REGNUM 32		/* Contains processor status */
+#define HI_REGNUM 34		/* Multiple/divide temp */
+#define LO_REGNUM 33		/* ... */
+#define BADVADDR_REGNUM 35	/* bad vaddr for addressing exception */
+#define CAUSE_REGNUM 36		/* describes last exception */
+#define PC_REGNUM 37		/* Contains program counter */
+#define FP0_REGNUM 38		/* Floating point register 0 (single float) */
+#define FPA0_REGNUM (FP0_REGNUM+12)	/* First float argument register */
+#if MIPS_EABI			/* EABI uses F12 through F19 for args */
+#define MIPS_LAST_FP_ARG_REGNUM (FP0_REGNUM+19)
+#else /* old ABI uses F12 through F15 for args */
+#define MIPS_LAST_FP_ARG_REGNUM (FP0_REGNUM+15)
+#endif
+#define FCRCS_REGNUM 70		/* FP control/status */
+#define FCRIR_REGNUM 71		/* FP implementation/revision */
+#define FP_REGNUM 72		/* Pseudo register that contains true address of executing stack frame */
+#define	UNUSED_REGNUM 73	/* Never used, FIXME */
+#define	FIRST_EMBED_REGNUM 74	/* First CP0 register for embedded use */
+#define	PRID_REGNUM 89		/* Processor ID */
+#define	LAST_EMBED_REGNUM 89	/* Last one */
+
+/* Define DO_REGISTERS_INFO() to do machine-specific formatting
+   of register dumps. */
+
+#define DO_REGISTERS_INFO(_regnum, fp) mips_do_registers_info(_regnum, fp)
+extern void mips_do_registers_info (int, int);
+
+/* Total amount of space needed to store our copies of the machine's
+   register state, the array `registers'.  */
+
+#define REGISTER_BYTES (NUM_REGS*MIPS_REGSIZE)
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+
+#define REGISTER_BYTE(N) ((N) * MIPS_REGSIZE)
+
+/* Covert between the RAW and VIRTUAL registers.
+
+   Some MIPS (SR, FSR, FIR) have a `raw' size of MIPS_REGSIZE but are
+   really 32 bit registers.  This is a legacy of the 64 bit MIPS GDB
+   protocol which transfers 64 bits for 32 bit registers. */
+
+extern int mips_register_convertible (int reg_nr);
+#define REGISTER_CONVERTIBLE(N) (mips_register_convertible ((N)))
+     
+
+void mips_register_convert_to_virtual (int reg_nr, struct type *virtual_type,
+				       char *raw_buf, char *virt_buf);
+#define REGISTER_CONVERT_TO_VIRTUAL(N,VIRTUAL_TYPE,RAW_BUF,VIRT_BUF) \
+  mips_register_convert_to_virtual (N,VIRTUAL_TYPE,RAW_BUF,VIRT_BUF)
+
+void mips_register_convert_to_raw (struct type *virtual_type, int reg_nr,
+				   char *virt_buf, char *raw_buf);
+#define REGISTER_CONVERT_TO_RAW(VIRTUAL_TYPE,N,VIRT_BUF,RAW_BUF) \
+  mips_register_convert_to_raw (VIRTUAL_TYPE,N,VIRT_BUF,RAW_BUF)
+
+/* Number of bytes of storage in the program's representation
+   for register N. */
+
+#define REGISTER_VIRTUAL_SIZE(N) TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (N))
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type of data in
+   register N.  */
+
+#ifndef REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+	(((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_float \
+	 : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
+	 : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
+	 : builtin_type_int)
+#endif
+
+/* All mips targets store doubles in a register pair with the least
+   significant register in the lower numbered register.
+   If the target is big endian, double register values need conversion
+   between memory and register formats.  */
+
+#define REGISTER_CONVERT_TO_TYPE(n, type, buffer)			\
+  do {if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG				\
+	  && REGISTER_RAW_SIZE (n) == 4					\
+	  && (n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32			\
+	  && TYPE_CODE(type) == TYPE_CODE_FLT				\
+	  && TYPE_LENGTH(type) == 8) {					\
+        char __temp[4];							\
+	memcpy (__temp, ((char *)(buffer))+4, 4);			\
+	memcpy (((char *)(buffer))+4, (buffer), 4); 			\
+	memcpy (((char *)(buffer)), __temp, 4); }} while (0)
+
+#define REGISTER_CONVERT_FROM_TYPE(n, type, buffer)			\
+  do {if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG				\
+	  && REGISTER_RAW_SIZE (n) == 4					\
+	  && (n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32			\
+	  && TYPE_CODE(type) == TYPE_CODE_FLT				\
+	  && TYPE_LENGTH(type) == 8) {					\
+        char __temp[4];							\
+	memcpy (__temp, ((char *)(buffer))+4, 4);			\
+	memcpy (((char *)(buffer))+4, (buffer), 4); 			\
+	memcpy (((char *)(buffer)), __temp, 4); }} while (0)
+
+/* Store the address of the place in which to copy the structure the
+   subroutine will return.  Handled by mips_push_arguments.  */
+
+#define STORE_STRUCT_RETURN(addr, sp)
+/**/
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  XXX floats */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+  mips_extract_return_value(TYPE, REGBUF, VALBUF)
+extern void mips_extract_return_value (struct type *, char[], char *);
+
+/* Write into appropriate registers a function return value
+   of type TYPE, given in virtual format.  */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+  mips_store_return_value(TYPE, VALBUF)
+extern void mips_store_return_value (struct type *, char *);
+
+/* Extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one).  */
+/* The address is passed in a0 upon entry to the function, but when
+   the function exits, the compiler has copied the value to v0.  This
+   convention is specified by the System V ABI, so I think we can rely
+   on it.  */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+  (extract_address (REGBUF + REGISTER_BYTE (V0_REGNUM), \
+		    REGISTER_RAW_SIZE (V0_REGNUM)))
+
+extern use_struct_convention_fn mips_use_struct_convention;
+#define USE_STRUCT_CONVENTION(gcc_p, type) mips_use_struct_convention (gcc_p, type)
+
+/* Describe the pointer in each stack frame to the previous stack frame
+   (its caller).  */
+
+/* FRAME_CHAIN takes a frame's nominal address
+   and produces the frame's chain-pointer. */
+
+#define FRAME_CHAIN(thisframe) (CORE_ADDR) mips_frame_chain (thisframe)
+extern CORE_ADDR mips_frame_chain (struct frame_info *);
+
+/* Define other aspects of the stack frame.  */
+
+
+/* A macro that tells us whether the function invocation represented
+   by FI does not have a frame on the stack associated with it.  If it
+   does not, FRAMELESS is set to 1, else 0.  */
+/* We handle this differently for mips, and maybe we should not */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI)  (0)
+
+/* Saved Pc.  */
+
+#define FRAME_SAVED_PC(FRAME)	(mips_frame_saved_pc(FRAME))
+extern CORE_ADDR mips_frame_saved_pc (struct frame_info *);
+
+#define FRAME_ARGS_ADDRESS(fi)	(fi)->frame
+
+#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
+
+/* Return number of args passed to a frame.
+   Can return -1, meaning no way to tell.  */
+
+#define FRAME_NUM_ARGS(fi)	(mips_frame_num_args(fi))
+extern int mips_frame_num_args (struct frame_info *);
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#define FRAME_ARGS_SKIP 0
+
+/* Put here the code to store, into a struct frame_saved_regs,
+   the addresses of the saved registers of frame described by FRAME_INFO.
+   This includes special registers such as pc and fp saved in special
+   ways in the stack frame.  sp is even more special:
+   the address we return for it IS the sp for the next frame.  */
+
+#define FRAME_INIT_SAVED_REGS(frame_info) \
+  do { \
+    if ((frame_info)->saved_regs == NULL) \
+      mips_find_saved_regs (frame_info); \
+    (frame_info)->saved_regs[SP_REGNUM] = (frame_info)->frame; \
+  } while (0)
+extern void mips_find_saved_regs (struct frame_info *);
+
+
+/* Things needed for making the inferior call functions.  */
+
+/* Stack must be aligned on 32-bit boundaries when synthesizing
+   function calls.  We don't need STACK_ALIGN, PUSH_ARGUMENTS will
+   handle it. */
+
+extern CORE_ADDR mips_push_arguments (int, struct value **, CORE_ADDR, int,
+				      CORE_ADDR);
+#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
+  (mips_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr)))
+
+extern CORE_ADDR mips_push_return_address (CORE_ADDR pc, CORE_ADDR sp);
+#define PUSH_RETURN_ADDRESS(PC, SP) (mips_push_return_address ((PC), (SP)))
+
+/* Push an empty stack frame, to record the current PC, etc.  */
+
+#define PUSH_DUMMY_FRAME 	mips_push_dummy_frame()
+extern void mips_push_dummy_frame (void);
+
+/* Discard from the stack the innermost frame, restoring all registers.  */
+
+#define POP_FRAME		mips_pop_frame()
+extern void mips_pop_frame (void);
+
+#define CALL_DUMMY_START_OFFSET (0)
+
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+
+/* When calling functions on Irix 5 (or any MIPS SVR4 ABI compliant
+   platform), $t9 ($25) (Dest_Reg) contains the address of the callee
+   (used for PIC).  It doesn't hurt to do this on other systems; $t9
+   will be ignored.  */
+#define FIX_CALL_DUMMY(dummyname, start_sp, fun, nargs, args, rettype, gcc_p) \
+    write_register(T9_REGNUM, fun)
+
+#define CALL_DUMMY_ADDRESS() (mips_call_dummy_address ())
+extern CORE_ADDR mips_call_dummy_address (void);
+
+/* Special symbol found in blocks associated with routines.  We can hang
+   mips_extra_func_info_t's off of this.  */
+
+#define MIPS_EFI_SYMBOL_NAME "__GDB_EFI_INFO__"
+extern void ecoff_relocate_efi (struct symbol *, CORE_ADDR);
+
+/* Specific information about a procedure.
+   This overlays the MIPS's PDR records, 
+   mipsread.c (ab)uses this to save memory */
+
+typedef struct mips_extra_func_info
+  {
+    long numargs;		/* number of args to procedure (was iopt) */
+    bfd_vma high_addr;		/* upper address bound */
+    long frame_adjust;		/* offset of FP from SP (used on MIPS16) */
+    PDR pdr;			/* Procedure descriptor record */
+  }
+ *mips_extra_func_info_t;
+
+extern void mips_init_extra_frame_info (int fromleaf, struct frame_info *);
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fci) \
+  mips_init_extra_frame_info(fromleaf, fci)
+
+extern void mips_print_extra_frame_info (struct frame_info *frame);
+#define	PRINT_EXTRA_FRAME_INFO(fi) \
+  mips_print_extra_frame_info (fi)
+
+/* It takes two values to specify a frame on the MIPS.
+
+   In fact, the *PC* is the primary value that sets up a frame.  The
+   PC is looked up to see what function it's in; symbol information
+   from that function tells us which register is the frame pointer
+   base, and what offset from there is the "virtual frame pointer".
+   (This is usually an offset from SP.)  On most non-MIPS machines,
+   the primary value is the SP, and the PC, if needed, disambiguates
+   multiple functions with the same SP.  But on the MIPS we can't do
+   that since the PC is not stored in the same part of the frame every
+   time.  This does not seem to be a very clever way to set up frames,
+   but there is nothing we can do about that.  */
+
+#define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
+extern struct frame_info *setup_arbitrary_frame (int, CORE_ADDR *);
+
+/* Select the default mips disassembler */
+
+#define TM_PRINT_INSN_MACH 0
+
+
+/* These are defined in mdebugread.c and are used in mips-tdep.c  */
+extern CORE_ADDR sigtramp_address, sigtramp_end;
+extern void fixup_sigtramp (void);
+
+/* Defined in mips-tdep.c and used in remote-mips.c */
+extern char *mips_read_processor_type (void);
+
+/* Functions for dealing with MIPS16 call and return stubs.  */
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name)	mips_in_call_stub (pc, name)
+#define IN_SOLIB_RETURN_TRAMPOLINE(pc, name)	mips_in_return_stub (pc, name)
+#define SKIP_TRAMPOLINE_CODE(pc)		mips_skip_stub (pc)
+#define IGNORE_HELPER_CALL(pc)			mips_ignore_helper (pc)
+extern int mips_in_call_stub (CORE_ADDR pc, char *name);
+extern int mips_in_return_stub (CORE_ADDR pc, char *name);
+extern CORE_ADDR mips_skip_stub (CORE_ADDR pc);
+extern int mips_ignore_helper (CORE_ADDR pc);
+
+#ifndef TARGET_MIPS
+#define TARGET_MIPS
+#endif
+
+/* Definitions and declarations used by mips-tdep.c and remote-mips.c  */
+#define MIPS_INSTLEN 4		/* Length of an instruction */
+#define MIPS16_INSTLEN 2	/* Length of an instruction on MIPS16 */
+#define MIPS_NUMREGS 32		/* Number of integer or float registers */
+typedef unsigned long t_inst;	/* Integer big enough to hold an instruction */
+
+/* MIPS16 function addresses are odd (bit 0 is set).  Here are some
+   macros to test, set, or clear bit 0 of addresses.  */
+#define IS_MIPS16_ADDR(addr)	 ((addr) & 1)
+#define MAKE_MIPS16_ADDR(addr)	 ((addr) | 1)
+#define UNMAKE_MIPS16_ADDR(addr) ((addr) & ~1)
+
+#endif /* TM_MIPS_H */
+
+/* Macros for setting and testing a bit in a minimal symbol that
+   marks it as 16-bit function.  The MSB of the minimal symbol's
+   "info" field is used for this purpose. This field is already
+   being used to store the symbol size, so the assumption is
+   that the symbol size cannot exceed 2^31.
+
+   ELF_MAKE_MSYMBOL_SPECIAL
+   tests whether an ELF symbol is "special", i.e. refers
+   to a 16-bit function, and sets a "special" bit in a 
+   minimal symbol to mark it as a 16-bit function
+   MSYMBOL_IS_SPECIAL   tests the "special" bit in a minimal symbol
+   MSYMBOL_SIZE         returns the size of the minimal symbol, i.e.
+   the "info" field with the "special" bit masked out
+ */
+
+#define ELF_MAKE_MSYMBOL_SPECIAL(sym,msym) \
+ { \
+  if (((elf_symbol_type *)(sym))->internal_elf_sym.st_other == STO_MIPS16) { \
+    MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) | 0x80000000); \
+    SYMBOL_VALUE_ADDRESS (msym) |= 1; \
+  } \
+ }
+
+#define MSYMBOL_IS_SPECIAL(msym) \
+  (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
+#define MSYMBOL_SIZE(msym) \
+  ((long) MSYMBOL_INFO (msym) & 0x7fffffff)
+
+
+/* Command to set the processor type. */
+extern void mips_set_processor_type_command (char *, int);
+
+
+/* Single step based on where the current instruction will take us.  */
+extern void mips_software_single_step (enum target_signal, int);
diff --git a/gdb/config/mips/tm-mips64.h b/gdb/config/mips/tm-mips64.h
new file mode 100644
index 00000000000..510ad05c0bc
--- /dev/null
+++ b/gdb/config/mips/tm-mips64.h
@@ -0,0 +1,37 @@
+/* Target machine parameters for MIPS r4000
+   Copyright 1994, 1996, 1997, 1998, 2000 Free Software Foundation, Inc.
+   Contributed by Ian Lance Taylor (ian@cygnus.com)
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Use eight byte registers.  */
+#define MIPS_REGSIZE 8
+
+/* define 8 byte register type */
+#define REGISTER_VIRTUAL_TYPE(N) \
+        (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
+	 : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
+	 : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
+	 : builtin_type_long_long)
+
+/* Load double words in CALL_DUMMY.  */
+#define OP_LDFPR 065		/* ldc1 */
+#define OP_LDGPR 067		/* ld */
+
+/* Get the basic MIPS definitions.  */
+#include "tm-mips.h"
diff --git a/gdb/config/mips/tm-mipsm3.h b/gdb/config/mips/tm-mipsm3.h
new file mode 100644
index 00000000000..19ae028c604
--- /dev/null
+++ b/gdb/config/mips/tm-mipsm3.h
@@ -0,0 +1,67 @@
+/* Definitions to make GDB run on a mips box under Mach 3.0
+   Copyright 1992, 1993, 1998 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Mach specific definitions for little endian mips (e.g. pmax)
+ * running Mach 3.0
+ *
+ * Author: Jukka Virtanen <jtv@hut.fi>
+ */
+
+/* Include common definitions for Mach3 systems */
+#include "nm-m3.h"
+
+/* Define offsets to access CPROC stack when it does not have
+ * a kernel thread.
+ */
+
+/* From mk/user/threads/mips/csw.s */
+#define SAVED_FP	(12*4)
+#define SAVED_PC	(13*4)
+#define SAVED_BYTES	(14*4)
+
+/* Using these, define our offsets to items strored in
+ * cproc_switch in csw.s
+ */
+#define MACHINE_CPROC_SP_OFFSET SAVED_BYTES
+#define MACHINE_CPROC_PC_OFFSET SAVED_PC
+#define MACHINE_CPROC_FP_OFFSET SAVED_FP
+
+/* Thread flavors used in setting the Trace state.
+
+ * In <mach/machine/thread_status.h>
+ */
+#define TRACE_FLAVOR		MIPS_EXC_STATE
+#define TRACE_FLAVOR_SIZE	MIPS_EXC_STATE_COUNT
+#define TRACE_SET(x,state)	((struct mips_exc_state *)state)->cause = EXC_SST;
+#define TRACE_CLEAR(x,state)	0
+
+/* Mach supports attach/detach */
+#define ATTACH_DETACH 1
+
+#include "mips/tm-mips.h"
+
+/* Address of end of user stack space.
+ * for MACH, see <machine/vmparam.h>
+ */
+#undef  STACK_END_ADDR
+#define STACK_END_ADDR USRSTACK
+
+/* Output registers in tabular format */
+#define TABULAR_REGISTER_OUTPUT
diff --git a/gdb/config/mips/tm-mipsv4.h b/gdb/config/mips/tm-mipsv4.h
new file mode 100644
index 00000000000..d1cc21ca1e8
--- /dev/null
+++ b/gdb/config/mips/tm-mipsv4.h
@@ -0,0 +1,40 @@
+/* Target machine description for MIPS running SVR4, for GDB.
+   Copyright 1994, 1995, 1998, 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-bigmips.h"
+#include "tm-sysv4.h"
+
+/* The signal handler trampoline is called _sigtramp.  */
+#undef IN_SIGTRAMP
+#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))
+
+/* On entry to the signal handler trampoline, an ucontext is already
+   pushed on the stack. We can get at the saved registers via the
+   mcontext which is contained within the ucontext.  */
+#define SIGFRAME_BASE	0
+#define SIGFRAME_REGSAVE_OFF	(SIGFRAME_BASE + 40)
+#define SIGFRAME_PC_OFF		(SIGFRAME_BASE + 40 + 35 * 4)
+#define SIGFRAME_FPREGSAVE_OFF	(SIGFRAME_BASE + 40 + 36 * 4)
+
+/* Use the alternate method of determining valid frame chains. */
+#define FRAME_CHAIN_VALID(fp,fi) func_frame_chain_valid (fp, fi)
+
+/* Convert a DWARF register number to a gdb REGNUM.  */
+#define DWARF_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-32)
diff --git a/gdb/config/mips/tm-nbsd.h b/gdb/config/mips/tm-nbsd.h
new file mode 100644
index 00000000000..fc7448665e1
--- /dev/null
+++ b/gdb/config/mips/tm-nbsd.h
@@ -0,0 +1,45 @@
+/* Target-dependent definitions for NetBSD/mips.
+   Copyright 2002 Free Software Foundation, Inc.
+   Contributed by Wasabi Systems, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_NBSD_H
+#define TM_NBSD_H
+
+/* Saved Pc.  Get it from sigcontext if within sigtramp.  */
+#define SIGCONTEXT_PC_OFFSET 8
+
+#include "mips/tm-mips.h"
+#include "solib.h"
+
+/* There's an E_MIPS_ABI_O32 flag in e_flags, but we don't use it - in
+   fact, using it may violate the o32 ABI.  */
+
+#define MIPS_DEFAULT_ABI MIPS_ABI_O32
+
+/* We don't want to inherit tm-mips.h's shared library trampoline code.  */
+#undef IN_SOLIB_CALL_TRAMPOLINE
+#undef IN_SOLIB_RETURN_TRAMPOLINE
+#undef SKIP_TRAMPOLINE_CODE
+#undef IGNORE_HELPER_CALL
+
+/* XXX undef a bunch of stuff we want to use multi-arch */
+#undef IN_SIGTRAMP
+
+#endif /* TM_NBSD_H */
diff --git a/gdb/config/mips/tm-tx39.h b/gdb/config/mips/tm-tx39.h
new file mode 100644
index 00000000000..d6fbd29ad33
--- /dev/null
+++ b/gdb/config/mips/tm-tx39.h
@@ -0,0 +1,36 @@
+/* Copyright 1993, 1997, 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-bigmips.h"
+
+#undef  MIPS_REGISTER_NAMES
+#define MIPS_REGISTER_NAMES 	\
+    {	"zero",	"at",	"v0",	"v1",	"a0",	"a1",	"a2",	"a3", \
+	"t0",	"t1",	"t2",	"t3",	"t4",	"t5",	"t6",	"t7", \
+	"s0",	"s1",	"s2",	"s3",	"s4",	"s5",	"s6",	"s7", \
+	"t8",	"t9",	"k0",	"k1",	"gp",	"sp",	"s8",	"ra", \
+	"sr",	"lo",	"hi",	"bad",	"cause","pc", \
+	"",   	"",   	"",   	"",   	"",   	"",   	"",   	"", \
+	"",   	"",   	"",  	"",  	"",  	"",  	"",  	"", \
+	"",  	"",  	"",  	"",  	"",  	"",  	"",  	"", \
+	"",  	"",  	"",  	"",  	"",  	"",  	"",  	"", \
+	"",  	"",  	"",	"", \
+	"",	"",	"",	"",	"",	"",	"",	"", \
+	"",	"", "config", "cache", "debug", "depc", "epc",	"" \
+    }
diff --git a/gdb/config/mips/tm-tx39l.h b/gdb/config/mips/tm-tx39l.h
new file mode 100644
index 00000000000..0c6d32b85f1
--- /dev/null
+++ b/gdb/config/mips/tm-tx39l.h
@@ -0,0 +1,36 @@
+/* Copyright 1993, 1997, 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-mips.h"
+
+#undef  MIPS_REGISTER_NAMES
+#define MIPS_REGISTER_NAMES 	\
+    {	"zero",	"at",	"v0",	"v1",	"a0",	"a1",	"a2",	"a3", \
+	"t0",	"t1",	"t2",	"t3",	"t4",	"t5",	"t6",	"t7", \
+	"s0",	"s1",	"s2",	"s3",	"s4",	"s5",	"s6",	"s7", \
+	"t8",	"t9",	"k0",	"k1",	"gp",	"sp",	"s8",	"ra", \
+	"sr",	"lo",	"hi",	"bad",	"cause","pc", \
+	"",   	"",   	"",   	"",   	"",   	"",   	"",   	"", \
+	"",   	"",   	"",  	"",  	"",  	"",  	"",  	"", \
+	"",  	"",  	"",  	"",  	"",  	"",  	"",  	"", \
+	"",  	"",  	"",  	"",  	"",  	"",  	"",  	"", \
+	"",  	"",  	"",	"", \
+	"",	"",	"",	"",	"",	"",	"",	"", \
+	"",	"", "config", "cache", "debug", "depc", "epc",	"" \
+    }
diff --git a/gdb/config/mips/tm-vr4100.h b/gdb/config/mips/tm-vr4100.h
new file mode 100644
index 00000000000..9c4472b0510
--- /dev/null
+++ b/gdb/config/mips/tm-vr4100.h
@@ -0,0 +1,20 @@
+/* Copyright 1998, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-bigmips64.h"
diff --git a/gdb/config/mips/tm-vr4300.h b/gdb/config/mips/tm-vr4300.h
new file mode 100644
index 00000000000..728c73135e5
--- /dev/null
+++ b/gdb/config/mips/tm-vr4300.h
@@ -0,0 +1,20 @@
+/* Copyright 1993, 1995, 1996, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-bigmips64.h"
diff --git a/gdb/config/mips/tm-vr4300el.h b/gdb/config/mips/tm-vr4300el.h
new file mode 100644
index 00000000000..e7e56805dfb
--- /dev/null
+++ b/gdb/config/mips/tm-vr4300el.h
@@ -0,0 +1,20 @@
+/* Copyright 1993, 1995, 1996, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-mips64.h"
diff --git a/gdb/config/mips/tm-vr4xxx.h b/gdb/config/mips/tm-vr4xxx.h
new file mode 100644
index 00000000000..9c4472b0510
--- /dev/null
+++ b/gdb/config/mips/tm-vr4xxx.h
@@ -0,0 +1,20 @@
+/* Copyright 1998, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-bigmips64.h"
diff --git a/gdb/config/mips/tm-vr4xxxel.h b/gdb/config/mips/tm-vr4xxxel.h
new file mode 100644
index 00000000000..7f2e4cd2d04
--- /dev/null
+++ b/gdb/config/mips/tm-vr4xxxel.h
@@ -0,0 +1,20 @@
+/* Copyright 1998, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-mips64.h"
diff --git a/gdb/config/mips/tm-vr5000.h b/gdb/config/mips/tm-vr5000.h
new file mode 100644
index 00000000000..0d68345d093
--- /dev/null
+++ b/gdb/config/mips/tm-vr5000.h
@@ -0,0 +1,20 @@
+/* Copyright 1996, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-bigmips64.h"
diff --git a/gdb/config/mips/tm-vr5000el.h b/gdb/config/mips/tm-vr5000el.h
new file mode 100644
index 00000000000..7fae087d24b
--- /dev/null
+++ b/gdb/config/mips/tm-vr5000el.h
@@ -0,0 +1,20 @@
+/* Copyright 1996, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-mips64.h"
diff --git a/gdb/config/mips/tm-vxmips.h b/gdb/config/mips/tm-vxmips.h
new file mode 100644
index 00000000000..e4ef2b6a2bd
--- /dev/null
+++ b/gdb/config/mips/tm-vxmips.h
@@ -0,0 +1,29 @@
+/* Target machine description for VxWorks MIPS's, for GDB, the GNU debugger.
+   Copyright 1996, 1999 Free Software Foundation, Inc.
+   Contributed by Cygnus Support.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/tm-mips.h"
+#include "tm-vxworks.h"
+
+/* FIXME: These are almost certainly wrong. */
+
+/* Number of registers in a ptrace_getregs call. */
+
+#define VX_NUM_REGS (NUM_REGS)
diff --git a/gdb/config/mips/tm-wince.h b/gdb/config/mips/tm-wince.h
new file mode 100644
index 00000000000..3ea179b56e6
--- /dev/null
+++ b/gdb/config/mips/tm-wince.h
@@ -0,0 +1,33 @@
+/* Definitions to make GDB run on a Windows CE system.
+
+   Copyright 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_WINCE_H
+#define TM_WINCE_H 1
+
+#include "mips/tm-mips.h"
+
+#undef SOFTWARE_SINGLE_STEP_P
+#define SOFTWARE_SINGLE_STEP_P() 1
+#define SOFTWARE_SINGLE_STEP(sig, bp_p) wince_software_single_step (sig, bp_p)
+
+void wince_software_single_step (unsigned int, int);
+
+#endif /* TM_WINCE_H */
diff --git a/gdb/config/mips/tx39.mt b/gdb/config/mips/tx39.mt
new file mode 100644
index 00000000000..8b4c1a92c24
--- /dev/null
+++ b/gdb/config/mips/tx39.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian mips board, typically an IDT.
+TDEPFILES= mips-tdep.o remote-mips.o dve3900-rom.o monitor.o dsrec.o
+TM_FILE= tm-tx39.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/tx39l.mt b/gdb/config/mips/tx39l.mt
new file mode 100644
index 00000000000..35083293d45
--- /dev/null
+++ b/gdb/config/mips/tx39l.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian mips board, typically an IDT.
+TDEPFILES= mips-tdep.o remote-mips.o dve3900-rom.o monitor.o dsrec.o
+TM_FILE= tm-tx39l.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/vr4100.mt b/gdb/config/mips/vr4100.mt
new file mode 100644
index 00000000000..c5ae4f94a6d
--- /dev/null
+++ b/gdb/config/mips/vr4100.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian SIM monitor board.
+TDEPFILES= mips-tdep.o remote-mips.o
+TM_FILE= tm-vr4100.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/vr4300.mt b/gdb/config/mips/vr4300.mt
new file mode 100644
index 00000000000..22cb25eb425
--- /dev/null
+++ b/gdb/config/mips/vr4300.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian SIM monitor board.
+TDEPFILES= mips-tdep.o remote-mips.o
+TM_FILE= tm-vr4300.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/vr4300el.mt b/gdb/config/mips/vr4300el.mt
new file mode 100644
index 00000000000..cff7241597b
--- /dev/null
+++ b/gdb/config/mips/vr4300el.mt
@@ -0,0 +1,5 @@
+# Target: Little-endian SIM monitor board.
+TDEPFILES= mips-tdep.o remote-mips.o
+TM_FILE= tm-vr4300el.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/vr4xxx.mt b/gdb/config/mips/vr4xxx.mt
new file mode 100644
index 00000000000..4c79ec7552d
--- /dev/null
+++ b/gdb/config/mips/vr4xxx.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian SIM monitor board.
+TDEPFILES= mips-tdep.o remote-mips.o
+TM_FILE= tm-vr4xxx.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/vr4xxxel.mt b/gdb/config/mips/vr4xxxel.mt
new file mode 100644
index 00000000000..5124dd75461
--- /dev/null
+++ b/gdb/config/mips/vr4xxxel.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian SIM monitor board.
+TDEPFILES= mips-tdep.o remote-mips.o
+TM_FILE= tm-vr4xxxel.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/vr5000.mt b/gdb/config/mips/vr5000.mt
new file mode 100644
index 00000000000..7a4a915a12c
--- /dev/null
+++ b/gdb/config/mips/vr5000.mt
@@ -0,0 +1,5 @@
+# Target: Big-endian SIM monitor board.
+TDEPFILES= mips-tdep.o remote-mips.o
+TM_FILE= tm-vr5000.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/vr5000el.mt b/gdb/config/mips/vr5000el.mt
new file mode 100644
index 00000000000..99687edcefc
--- /dev/null
+++ b/gdb/config/mips/vr5000el.mt
@@ -0,0 +1,5 @@
+# Target: Little-endian SIM monitor board.
+TDEPFILES= mips-tdep.o remote-mips.o
+TM_FILE= tm-vr5000el.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/mips/libsim.a
diff --git a/gdb/config/mips/vxmips.mt b/gdb/config/mips/vxmips.mt
new file mode 100644
index 00000000000..a20cf96ab72
--- /dev/null
+++ b/gdb/config/mips/vxmips.mt
@@ -0,0 +1,3 @@
+# Target: MIPS running VxWorks
+TDEPFILES= mips-tdep.o remote-vx.o remote-vxmips.o xdr_ld.o xdr_ptrace.o xdr_rdb.o
+TM_FILE= tm-vxmips.h
diff --git a/gdb/config/mips/wince.mt b/gdb/config/mips/wince.mt
new file mode 100644
index 00000000000..a404b1cec8b
--- /dev/null
+++ b/gdb/config/mips/wince.mt
@@ -0,0 +1,5 @@
+# Target: Little-endian MIPS machine such as DECstation.
+TDEPFILES= mips-tdep.o wince.o
+TM_FILE= tm-wince.h
+MT_CFLAGS=-DMIPS -U_X86_ -U_M_IX86 -U__i386__ -U__i486__ -U__i586__ -U__i686__ -DUNICODE -D_WIN32_WCE -DWINCE_STUB='"${target_alias}-stub.exe"'
+WIN32LIBS=-lrapi
diff --git a/gdb/config/mips/xm-irix3.h b/gdb/config/mips/xm-irix3.h
new file mode 100644
index 00000000000..27da9a53880
--- /dev/null
+++ b/gdb/config/mips/xm-irix3.h
@@ -0,0 +1,30 @@
+/* Copyright 1991, 1993, 1994, 1995 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* This is for the iris. */
+
+#define HAVE_TERMIO
+
+/* Override register locations in upage for SGI machines */
+#undef REGISTER_U_ADDR
+#define REGISTER_U_ADDR(addr, blockend, regno) 		\
+  if (regno < PC_REGNUM)				\
+      addr = regno;					\
+  else							\
+      addr = regno + NSIG_HNDLRS;	/* Skip over signal handlers */
diff --git a/gdb/config/mips/xm-irix4.h b/gdb/config/mips/xm-irix4.h
new file mode 100644
index 00000000000..8e0bfb539ef
--- /dev/null
+++ b/gdb/config/mips/xm-irix4.h
@@ -0,0 +1,34 @@
+/* Definitions for irix4 hosting support.
+
+   Copyright 1991, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* This is for the iris. */
+
+#include "mips/xm-irix3.h"
+
+#define BROKEN_SIGINFO_H	/* <sys/siginfo.h> si_pid & si_uid are bogus */
+
+/* Irix 4.0.1 and later have termios.  Not sure about earlier versions.  */
+#undef HAVE_TERMIO
+#define HAVE_TERMIOS
+
+/* This enables reliable signals (and the associated setjmp/longjmp), and gives
+   bsdish prototypes for getpgrp/setpgrg/setgroups and initgroups.  */
+#define _BSD_COMPAT
diff --git a/gdb/config/mips/xm-irix5.h b/gdb/config/mips/xm-irix5.h
new file mode 100644
index 00000000000..78c3a071e10
--- /dev/null
+++ b/gdb/config/mips/xm-irix5.h
@@ -0,0 +1,34 @@
+/* Definitions for irix5 hosting support.
+
+   Copyright 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "xm-sysv4.h"
+
+/* Override register locations in upage for SGI machines */
+#undef REGISTER_U_ADDR
+#define REGISTER_U_ADDR(addr, blockend, regno) 		\
+  if (regno < PC_REGNUM)				\
+      addr = regno;					\
+  else							\
+      addr = regno + NSIG_HNDLRS;	/* Skip over signal handlers */
+
+/* This enables reliable signals (and the associated setjmp/longjmp), and gives
+   bsdish prototypes for getpgrp/setpgrg/setgroups and initgroups.  */
+#define _BSD_COMPAT
diff --git a/gdb/config/mips/xm-irix6.h b/gdb/config/mips/xm-irix6.h
new file mode 100644
index 00000000000..a8a4c68de54
--- /dev/null
+++ b/gdb/config/mips/xm-irix6.h
@@ -0,0 +1,22 @@
+/* Definitions for irix6 hosting support.
+
+   Copyright 2001 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "mips/xm-irix5.h"
diff --git a/gdb/config/mips/xm-linux.h b/gdb/config/mips/xm-linux.h
new file mode 100644
index 00000000000..4db6201bc7d
--- /dev/null
+++ b/gdb/config/mips/xm-linux.h
@@ -0,0 +1,25 @@
+/* Host definitions for GNU/Linux on MIPS.
+
+   Copyright 2001, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef XM_MIPSLINUX_H
+#define XM_MIPSLINUX_H
+
+#endif /* XM_MIPSLINUX_H */
diff --git a/gdb/config/mips/xm-mips.h b/gdb/config/mips/xm-mips.h
new file mode 100644
index 00000000000..c1f53b53ed9
--- /dev/null
+++ b/gdb/config/mips/xm-mips.h
@@ -0,0 +1,59 @@
+/* Definitions to make GDB run on a mips box under 4.3bsd.
+   Copyright 1986, 1987, 1989, 1993, 1994, 1995, 1996, 1998
+   Free Software Foundation, Inc.
+   Contributed by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin
+   and by Alessandro Forin(af@cs.cmu.edu) at CMU
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifdef ultrix
+/* Needed for DECstation core files.  */
+#include <machine/param.h>
+#define KERNEL_U_ADDR UADDR
+
+/* Native Ultrix cc has broken long long support.  */
+#ifndef __GNUC__
+#undef CC_HAS_LONG_LONG
+#endif
+#endif
+
+#if ! defined (__GNUC__) && ! defined (offsetof)
+#define offsetof(TYPE, MEMBER) ((unsigned long) &((TYPE *)0)->MEMBER)
+#endif
+
+/* Only used for core files on DECstations.
+   First four registers at u.u_ar0 are saved arguments, and
+   there is no r0 saved.   Float registers are saved
+   in u_pcb.pcb_fpregs, not relative to u.u_ar0.  */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) 		\
+	{ \
+	  if (regno < FP0_REGNUM) \
+	    addr = blockend + sizeof(int) * (4 + regno - 1); \
+	  else \
+	    addr = offsetof (struct user, u_pcb.pcb_fpregs[0]) + \
+		   sizeof (int) * (regno - FP0_REGNUM); \
+	}
+
+/* Kernel is a bit tenacious about sharing text segments, disallowing bpts.  */
+#define	ONE_PROCESS_WRITETEXT
+
+/* HAVE_SGTTY also works, last we tried.
+
+   But we have termios, at least as of Ultrix 4.2A, so use it.  */
+#define HAVE_TERMIOS
diff --git a/gdb/config/mips/xm-mipsm3.h b/gdb/config/mips/xm-mipsm3.h
new file mode 100644
index 00000000000..b2e9f4d5330
--- /dev/null
+++ b/gdb/config/mips/xm-mipsm3.h
@@ -0,0 +1,29 @@
+/* Definitions to make GDB run on a mips box under 4.3bsd.
+   Copyright 1986, 1987, 1989, 1993 Free Software Foundation, Inc.
+   Contributed by Per Bothner(bothner@cs.wisc.edu) at U.Wisconsin
+   and by Alessandro Forin(af@cs.cmu.edu) at CMU
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define KERNEL_U_ADDR 0		/* Not needed. */
+
+/* Only used for core files on DECstations. */
+
+#define REGISTER_U_ADDR(addr, blockend, regno) 		\
+	if (regno < 38) addr = (NBPG*UPAGES) + (regno - 38)*sizeof(int);\
+	else addr = 0;		/* ..somewhere in the pcb */
diff --git a/gdb/config/mips/xm-mipsv4.h b/gdb/config/mips/xm-mipsv4.h
new file mode 100644
index 00000000000..76fa5da19db
--- /dev/null
+++ b/gdb/config/mips/xm-mipsv4.h
@@ -0,0 +1,22 @@
+/* Definitions for MIPS running SVR4 hosting support.
+
+   Copyright 1994 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "xm-sysv4.h"
diff --git a/gdb/config/mips/xm-riscos.h b/gdb/config/mips/xm-riscos.h
new file mode 100644
index 00000000000..1f03c5a00a8
--- /dev/null
+++ b/gdb/config/mips/xm-riscos.h
@@ -0,0 +1,25 @@
+/* Copyright 1993, 1994, 1995 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define HAVE_TERMIO
+
+#define USG 1
+
+/* setjmp.h requires uid_t.  */
+#include <sys/types.h>
diff --git a/gdb/config/mn10200/mn10200.mt b/gdb/config/mn10200/mn10200.mt
new file mode 100644
index 00000000000..c85a2fb6884
--- /dev/null
+++ b/gdb/config/mn10200/mn10200.mt
@@ -0,0 +1,6 @@
+# Target: Matsushita mn10200
+TDEPFILES= mn10200-tdep.o
+TM_FILE= tm-mn10200.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/mn10200/libsim.a
diff --git a/gdb/config/mn10200/tm-mn10200.h b/gdb/config/mn10200/tm-mn10200.h
new file mode 100644
index 00000000000..4402b78ba79
--- /dev/null
+++ b/gdb/config/mn10200/tm-mn10200.h
@@ -0,0 +1,220 @@
+/* Parameters for execution on a Matsushita mn10200 processor.
+
+   Copyright 1997, 1998, 1999, 2000, 2001, 2002 Free Software
+   Foundation, Inc.
+
+   Contributed by Geoffrey Noer <noer@cygnus.com>
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* FIXME: cagney/2001-03-01: The below macros refer to functions
+   declared in "regcache.h".  The ``correct fix'' is to convert those
+   macros into functions.  */
+#include "regcache.h"
+#include "symtab.h"		/* For namespace_enum.  */
+#include "symfile.h"		/* For entry_point_address().  */
+
+/* ints are only 16bits on the mn10200.  */
+#undef TARGET_INT_BIT
+#define TARGET_INT_BIT 16
+
+/* The mn10200 doesn't support long long types.  */
+#undef TARGET_LONG_LONG_BIT
+#define TARGET_LONG_LONG_BIT 32
+
+/* The mn10200 doesn't support double or long double either.  */
+#undef TARGET_DOUBLE_BIT
+#undef TARGET_LONG_DOUBLE_BIT
+#define TARGET_DOUBLE_BIT 32
+#define TARGET_LONG_DOUBLE_BIT 32
+
+/* Not strictly correct, but the machine independent code is not
+   ready to handle any of the basic sizes not being a power of two.  */
+#undef TARGET_PTR_BIT
+#define TARGET_PTR_BIT 32
+
+/* The mn10200 really has 24 bit registers but the simulator reads/writes
+   them as 32bit values, so we claim they're 32bits each.  This may have
+   to be tweaked if the Matsushita emulator/board really deals with them
+   as 24bits each.  */
+#define REGISTER_SIZE 4
+
+#define MAX_REGISTER_RAW_SIZE REGISTER_SIZE
+#define NUM_REGS 11
+
+#define REGISTER_BYTES (NUM_REGS * REGISTER_SIZE)
+
+#define REGISTER_NAMES \
+{ "d0", "d1", "d2", "d3", "a0", "a1", "a2", "sp", \
+  "pc", "mdr", "psw"}
+
+#define FP_REGNUM 6
+#define SP_REGNUM 7
+#define PC_REGNUM 8
+#define MDR_REGNUM 9
+#define PSW_REGNUM 10
+
+/* Treat the registers as 32bit values.  */
+#define REGISTER_VIRTUAL_TYPE(REG) builtin_type_long
+
+#define REGISTER_BYTE(REG) ((REG) * REGISTER_SIZE)
+#define REGISTER_VIRTUAL_SIZE(REG) REGISTER_SIZE
+#define REGISTER_RAW_SIZE(REG) REGISTER_SIZE
+
+#define MAX_REGISTER_VIRTUAL_SIZE REGISTER_SIZE
+
+/* The breakpoint instruction must be the same size as te smallest
+   instruction in the instruction set.
+
+   The Matsushita mn10x00 processors have single byte instructions
+   so we need a single byte breakpoint.  Matsushita hasn't defined
+   one, so we defined it ourselves.
+
+   0xff is the only available single byte insn left on the mn10200.  */
+#define BREAKPOINT {0xff}
+
+#define FUNCTION_START_OFFSET 0
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Stacks grow the normal way.  */
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+#define SAVED_PC_AFTER_CALL(frame) \
+  (read_memory_integer (read_register (SP_REGNUM), REGISTER_SIZE) & 0xffffff)
+
+struct frame_info;
+struct frame_saved_regs;
+struct type;
+struct value;
+
+#define EXTRA_FRAME_INFO struct frame_saved_regs fsr; int status; int stack_size;
+
+extern void mn10200_init_extra_frame_info (struct frame_info *);
+#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) mn10200_init_extra_frame_info (fi)
+#define INIT_FRAME_PC(x,y)
+
+extern void mn10200_frame_find_saved_regs (struct frame_info *,
+					   struct frame_saved_regs *);
+#define FRAME_FIND_SAVED_REGS(fi, regaddr) regaddr = fi->fsr
+
+extern CORE_ADDR mn10200_frame_chain (struct frame_info *);
+#define FRAME_CHAIN(fi) mn10200_frame_chain (fi)
+#define FRAME_CHAIN_VALID(FP, FI)	generic_file_frame_chain_valid (FP, FI)
+
+extern CORE_ADDR mn10200_find_callers_reg (struct frame_info *, int);
+extern CORE_ADDR mn10200_frame_saved_pc (struct frame_info *);
+#define FRAME_SAVED_PC(FI) (mn10200_frame_saved_pc (FI))
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  */
+
+#define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
+  { \
+    if (TYPE_LENGTH (TYPE) > 8) \
+      internal_error (__FILE__, __LINE__, "failed internal consistency check"); \
+    else if (TYPE_LENGTH (TYPE) > 2 && TYPE_CODE (TYPE) != TYPE_CODE_PTR) \
+      { \
+	memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), 2); \
+	memcpy (VALBUF + 2, REGBUF + REGISTER_BYTE (1), 2); \
+      } \
+    else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)\
+      { \
+        memcpy (VALBUF, REGBUF + REGISTER_BYTE (4), TYPE_LENGTH (TYPE)); \
+      } \
+    else \
+      { \
+        memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), TYPE_LENGTH (TYPE)); \
+      } \
+  }
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+  extract_address (REGBUF + REGISTER_BYTE (4), \
+		   REGISTER_RAW_SIZE (4))
+
+#define STORE_RETURN_VALUE(TYPE, VALBUF) \
+  { \
+    if (TYPE_LENGTH (TYPE) > 8) \
+      internal_error (__FILE__, __LINE__, "failed internal consistency check"); \
+    else if (TYPE_LENGTH (TYPE) > 2 && TYPE_CODE (TYPE) != TYPE_CODE_PTR) \
+      { \
+	write_register_bytes (REGISTER_BYTE (0), VALBUF, 2); \
+	write_register_bytes (REGISTER_BYTE (1), VALBUF + 2, 2); \
+      } \
+    else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)\
+      { \
+        write_register_bytes (REGISTER_BYTE (4), VALBUF, TYPE_LENGTH (TYPE)); \
+      } \
+    else \
+      { \
+        write_register_bytes (REGISTER_BYTE (0), VALBUF, TYPE_LENGTH (TYPE)); \
+      } \
+  }
+
+
+extern CORE_ADDR mn10200_store_struct_return (CORE_ADDR addr, CORE_ADDR sp);
+#define STORE_STRUCT_RETURN(STRUCT_ADDR, SP) \
+  (SP) = mn10200_store_struct_return (STRUCT_ADDR, SP)
+
+extern CORE_ADDR mn10200_skip_prologue (CORE_ADDR);
+#define SKIP_PROLOGUE(pc) (mn10200_skip_prologue (pc))
+
+#define FRAME_ARGS_SKIP 0
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+#define FRAME_NUM_ARGS(fi) (-1)
+
+extern void mn10200_pop_frame (struct frame_info *);
+#define POP_FRAME mn10200_pop_frame (get_current_frame ())
+
+#define USE_GENERIC_DUMMY_FRAMES 1
+#define CALL_DUMMY                   {0}
+#define CALL_DUMMY_START_OFFSET      (0)
+#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
+#define CALL_DUMMY_LOCATION          AT_ENTRY_POINT
+#define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP)
+#define CALL_DUMMY_ADDRESS()         entry_point_address ()
+
+extern CORE_ADDR mn10200_push_return_address (CORE_ADDR, CORE_ADDR);
+#define PUSH_RETURN_ADDRESS(PC, SP)  mn10200_push_return_address (PC, SP)
+
+#define PUSH_DUMMY_FRAME	generic_push_dummy_frame ()
+
+extern CORE_ADDR
+mn10200_push_arguments (int, struct value **, CORE_ADDR,
+			unsigned char, CORE_ADDR);
+#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
+  (mn10200_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR))
+
+#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP)
+
+#define REG_STRUCT_HAS_ADDR(gcc_p,TYPE) \
+  	(TYPE_LENGTH (TYPE) > 8)
+
+extern use_struct_convention_fn mn10200_use_struct_convention;
+#define USE_STRUCT_CONVENTION(GCC_P, TYPE) mn10200_use_struct_convention (GCC_P, TYPE)
+
+/* Override the default get_saved_register function with
+   one that takes account of generic CALL_DUMMY frames.  */
+#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
+      generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
+
+/* Define this for Wingdb */
+#define TARGET_MN10200
diff --git a/gdb/config/mn10300/mn10300.mt b/gdb/config/mn10300/mn10300.mt
new file mode 100644
index 00000000000..0b54fd5afdc
--- /dev/null
+++ b/gdb/config/mn10300/mn10300.mt
@@ -0,0 +1,4 @@
+# Target: Matsushita mn10300
+TDEPFILES= mn10300-tdep.o
+SIM_OBS = remote-sim.o
+SIM = ../sim/mn10300/libsim.a
diff --git a/gdb/config/nm-gnu.h b/gdb/config/nm-gnu.h
new file mode 100644
index 00000000000..8f17406abc2
--- /dev/null
+++ b/gdb/config/nm-gnu.h
@@ -0,0 +1,43 @@
+/* Common declarations for the GNU Hurd
+
+   Copyright 1995, 1996, 1998, 1999 Free Software Foundation, Inc.
+
+   Written by Miles Bader <miles@gnu.ai.mit.edu>
+
+   The GNU Hurd is free software; you can redistribute it and/or
+   modify it under the terms of the GNU General Public License as
+   published by the Free Software Foundation; either version 2, or (at
+   your option) any later version.
+
+   The GNU Hurd is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA. */
+
+#ifndef __NM_GNU_H__
+#define __NM_GNU_H__
+
+#include <unistd.h>
+#include <mach.h>
+#include <mach/exception.h>
+#include "regcache.h"
+
+extern char *gnu_target_pid_to_str (int pid);
+
+/* Before storing, we need to read all the registers.  */
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+/* Don't do wait_for_inferior on attach.  */
+#define ATTACH_NO_WAIT
+
+/* Use SVR4 style shared library support */
+#define SVR4_SHARED_LIBS
+#include "solib.h"
+#define NO_CORE_OPS
+
+#endif /* __NM_GNU_H__ */
diff --git a/gdb/config/nm-linux.h b/gdb/config/nm-linux.h
new file mode 100644
index 00000000000..a2d429214d9
--- /dev/null
+++ b/gdb/config/nm-linux.h
@@ -0,0 +1,74 @@
+/* Native support for GNU/Linux.
+
+   Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* GNU/Linux is SVR4-ish but its /proc file system isn't.  */
+#undef USE_PROC_FS
+
+/* Tell GDB that we can attach and detach other processes.  */
+#define ATTACH_DETACH
+
+/* Since we're building a native debugger, we can include <signal.h>
+   to find the range of real-time signals.  */
+
+#include <signal.h>
+
+#ifdef __SIGRTMIN
+#define REALTIME_LO	__SIGRTMIN
+#define REALTIME_HI	(__SIGRTMAX + 1)
+#endif
+
+/* We define this if link.h is available, because with ELF we use SVR4
+   style shared libraries.  */
+
+#ifdef HAVE_LINK_H
+#define SVR4_SHARED_LIBS
+#include "solib.h"             /* Support for shared libraries.  */
+#endif
+
+
+/* Override child_wait in `inftarg.c'.  */
+struct target_waitstatus;
+extern ptid_t child_wait (ptid_t ptid, struct target_waitstatus *ourstatus);
+#define CHILD_WAIT
+
+extern int lin_lwp_prepare_to_proceed (void);
+#define PREPARE_TO_PROCEED(select_it) lin_lwp_prepare_to_proceed ()
+
+extern void lin_lwp_attach_lwp (ptid_t ptid, int verbose);
+#define ATTACH_LWP(ptid, verbose) lin_lwp_attach_lwp ((ptid), (verbose))
+
+extern void lin_thread_get_thread_signals (sigset_t *mask);
+#define GET_THREAD_SIGNALS(mask) lin_thread_get_thread_signals (mask)
+
+/* Defined to make stepping-over-breakpoints be thread-atomic.  */
+#define USE_THREAD_STEP_NEEDED 1
+
+
+/* Use elf_gregset_t and elf_fpregset_t, rather than
+   gregset_t and fpregset_t.  */
+
+#define GDB_GREGSET_T  elf_gregset_t
+#define GDB_FPREGSET_T elf_fpregset_t
+
+/* Override child_pid_to_exec_file in 'inftarg.c'.  */
+#define CHILD_PID_TO_EXEC_FILE
+
+
diff --git a/gdb/config/nm-lynx.h b/gdb/config/nm-lynx.h
new file mode 100644
index 00000000000..1cd2bd1ceb1
--- /dev/null
+++ b/gdb/config/nm-lynx.h
@@ -0,0 +1,85 @@
+/* Native-dependent definitions for LynxOS.
+   Copyright 1993, 1994, 1995, 1996, 1999, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_LYNX_H
+#define NM_LYNX_H
+
+#include <sys/conf.h>
+#include <sys/kernel.h>
+/* sys/kernel.h should define this, but doesn't always, sigh. */
+#ifndef __LYNXOS
+#define __LYNXOS
+#endif
+#include <sys/mem.h>
+#include <sys/signal.h>
+#include <sys/time.h>
+#include <sys/resource.h>
+#include <sys/itimer.h>
+#include <sys/file.h>
+#include <sys/proc.h>
+#include "gdbthread.h"
+
+/* This is the amount to subtract from u.u_ar0 to get the offset in
+   the core file of the register values.  */
+
+#define KERNEL_U_ADDR USRSTACK
+
+#undef FLOAT_INFO		/* No float info yet */
+
+/* As of LynxOS 2.2.2 (beta 8/15/94), this is int.  Previous versions seem to
+   have had no prototype, so I'm not sure why GDB used to define this to
+   char *.  */
+#define PTRACE_ARG3_TYPE int
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* Thread ID of stopped thread.  */
+
+#define WIFTID(x) (((union wait *)&x)->w_tid)
+
+/* Override child_wait in inftarg.c */
+
+#define CHILD_WAIT
+
+/* Override child_resume in infptrace.c */
+
+#define CHILD_RESUME
+
+/* Override child_thread_alive in intarg.c */
+
+#define CHILD_THREAD_ALIVE
+
+#include "target.h"
+
+extern ptid_t child_wait (ptid_t ptid,
+                                struct target_waitstatus *status);
+
+/* Lynx needs a special definition of this so that we can
+   print out the pid and thread number seperately.  */
+
+
+/* override child_pid_to_str in inftarg.c */
+#define CHILD_PID_TO_STR
+extern char *lynx_pid_to_str (ptid_t ptid);
+
+#endif /* NM_LYNX_H */
diff --git a/gdb/config/nm-m3.h b/gdb/config/nm-m3.h
new file mode 100644
index 00000000000..f89838ed967
--- /dev/null
+++ b/gdb/config/nm-m3.h
@@ -0,0 +1,126 @@
+/* Mach 3.0 common definitions and global vars.
+
+   Copyright 1992, 1993, 1994, 1996 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_M3_H
+#define NM_M3_H
+
+#include <mach.h>
+#include "regcache.h"
+
+/* Mach3 doesn't declare errno in <errno.h>.  */
+extern int errno;
+
+/* Task port of our debugged inferior. */
+
+extern task_t inferior_task;
+
+/* Thread port of the current thread in the inferior. */
+
+extern thread_t current_thread;
+
+/* If nonzero, we must suspend/abort && resume threads
+ * when setting or getting the state.
+ */
+extern int must_suspend_thread;
+
+#define PREPARE_TO_PROCEED(select_it) mach3_prepare_to_proceed(select_it)
+
+/* Try to get the privileged host port for authentication to machid
+
+ * If you can get this, you may debug anything on this host.
+ *
+ * If you can't, gdb gives it's own task port as the
+ * authentication port
+ */
+#define  mach_privileged_host_port() task_by_pid(-1)
+
+/*
+ * This is the MIG ID number of the emulator/server bsd_execve() RPC call.
+ *
+ * It SHOULD never change, but if it does, gdb `run'
+ * command won't work until you fix this define.
+ * 
+ */
+#define MIG_EXEC_SYSCALL_ID		101000
+
+/* If our_message_port gets a msg with this ID,
+ * GDB suspends it's inferior and enters command level.
+ * (Useful at least if ^C does not work)
+ */
+#define GDB_MESSAGE_ID_STOP			0x41151
+
+/* wait3 WNOHANG is defined in <sys/wait.h> but
+ * for some reason gdb does not want to include
+ * that file.
+ *
+ * If your system defines WNOHANG differently, this has to be changed.
+ */
+#define WNOHANG 1
+
+/* Before storing, we need to read all the registers.  */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+/* Check if the inferior exists */
+#define MACH_ERROR_NO_INFERIOR \
+  do if (!MACH_PORT_VALID (inferior_task)) \
+  	error ("Inferior task does not exist."); while(0)
+
+/* Error handler for mach calls */
+#define CHK(str,ret)	\
+  do if (ret != KERN_SUCCESS) \
+       error ("Gdb %s [%d] %s : %s\n",__FILE__,__LINE__,str, \
+	      mach_error_string(ret)); while(0)
+
+/* This is from POE9 emulator/emul_stack.h
+ */
+/*
+ * Top of emulator stack holds link and reply port.
+ */
+struct emul_stack_top
+  {
+    struct emul_stack_top *link;
+    mach_port_t reply_port;
+  };
+
+#define EMULATOR_STACK_SIZE (4096*4)
+
+#define THREAD_ALLOWED_TO_BREAK(mid) mach_thread_for_breakpoint (mid)
+
+#define THREAD_PARSE_ID(arg) mach_thread_parse_id (arg)
+
+#define THREAD_OUTPUT_ID(mid) mach_thread_output_id (mid)
+
+#define ATTACH_TO_THREAD attach_to_thread
+
+/* Don't do wait_for_inferior on attach.  */
+#define ATTACH_NO_WAIT
+
+/* Do Mach 3 dependent operations when ^C or a STOP is requested */
+#define DO_QUIT() mach3_quit ()
+
+#if 0
+/* This is bogus.  It is NOT OK to quit out of target_wait.  */
+/* If in mach_msg() and ^C is typed set immediate_quit */
+#define REQUEST_QUIT() mach3_request_quit ()
+#endif
+
+#endif /* NM_M3_H */
diff --git a/gdb/config/nm-nbsd.h b/gdb/config/nm-nbsd.h
new file mode 100644
index 00000000000..5078c567968
--- /dev/null
+++ b/gdb/config/nm-nbsd.h
@@ -0,0 +1,27 @@
+/* Native-dependent definitions for NetBSD.
+   Copyright 1994, 1996, 1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define PTRACE_ARG3_TYPE char*
+
+#define FETCH_INFERIOR_REGISTERS
+
+#define ATTACH_DETACH
+
+#include "solib.h"		/* Support for shared libraries. */
diff --git a/gdb/config/nm-nbsdaout.h b/gdb/config/nm-nbsdaout.h
new file mode 100644
index 00000000000..026f1ed8d50
--- /dev/null
+++ b/gdb/config/nm-nbsdaout.h
@@ -0,0 +1,72 @@
+/* Native-dependent definitions for NetBSD a.out.
+   Copyright 1994, 1996, 1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* make structure definitions match up with those expected in solib.c */
+#define link_object	sod
+#define lo_name		sod_name
+#define lo_library	sod_library
+#define lo_unused	sod_reserved
+#define lo_major	sod_major
+#define lo_minor	sod_minor
+#define lo_next		sod_next
+
+#define link_map	so_map
+#define lm_addr		som_addr
+#define lm_name		som_path
+#define lm_next		som_next
+#define lm_lop		som_sod
+#define lm_lob		som_sodbase
+#define lm_rwt		som_write
+#define lm_ld		som_dynamic
+#define lm_lpd		som_spd
+
+#define link_dynamic_2	section_dispatch_table
+#define ld_loaded	sdt_loaded
+#define ld_need		sdt_sods
+#define ld_rules	sdt_filler1
+#define ld_got		sdt_got
+#define ld_plt		sdt_plt
+#define ld_rel		sdt_rel
+#define ld_hash		sdt_hash
+#define ld_stab		sdt_nzlist
+#define ld_stab_hash	sdt_filler2
+#define ld_buckets	sdt_buckets
+#define ld_symbols	sdt_strings
+#define ld_symb_size	sdt_str_sz
+#define ld_text		sdt_text_sz
+#define ld_plt_sz	sdt_plt_sz
+
+#define rtc_symb	rt_symbol
+#define rtc_sp		rt_sp
+#define rtc_next	rt_next
+
+#define ld_debug	so_debug
+#define ldd_version	dd_version
+#define ldd_in_debugger	dd_in_debugger
+#define ldd_sym_loaded	dd_sym_loaded
+#define ldd_bp_addr	dd_bpt_addr
+#define ldd_bp_inst	dd_bpt_shadow
+#define ldd_cp		dd_cc
+
+#define link_dynamic	_dynamic
+#define ld_version	d_version
+#define ldd		d_debug
+#define ld_un		d_un
+#define ld_2		d_sdt
diff --git a/gdb/config/nm-sysv4.h b/gdb/config/nm-sysv4.h
new file mode 100644
index 00000000000..4b4f09897bc
--- /dev/null
+++ b/gdb/config/nm-sysv4.h
@@ -0,0 +1,34 @@
+/* Definitions for running gdb on a host machine running any flavor of SVR4.
+   Copyright 1991, 1992, 1993, 1998 Free Software Foundation, Inc.
+   Written by Fred Fish at Cygnus Support (fnf@cygnus.com).
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Use SVR4 style shared library support */
+
+#define SVR4_SHARED_LIBS
+#include "solib.h"
+
+/* SVR4 has /proc support, so use it instead of ptrace. */
+
+#define USE_PROC_FS
+
+/* SVR4 machines can easily do attach and detach via /proc (procfs.c)
+   support */
+
+#define ATTACH_DETACH
diff --git a/gdb/config/none/nm-none.h b/gdb/config/none/nm-none.h
new file mode 100644
index 00000000000..7647bdb1d6d
--- /dev/null
+++ b/gdb/config/none/nm-none.h
@@ -0,0 +1,19 @@
+/* Defines needed when configuring for "none".
+   Copyright 1993 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
diff --git a/gdb/config/none/none.mh b/gdb/config/none/none.mh
new file mode 100644
index 00000000000..33d5e4a3768
--- /dev/null
+++ b/gdb/config/none/none.mh
@@ -0,0 +1,5 @@
+# Host: "no target".  This can be used to build you
+# a Makefile that only runs administrative commands like 'clean',
+# 'gdb.tar.Z', etc.
+NAT_FILE= nm-none.h
+XM_FILE= xm-none.h
diff --git a/gdb/config/none/none.mt b/gdb/config/none/none.mt
new file mode 100644
index 00000000000..300e2dcd05f
--- /dev/null
+++ b/gdb/config/none/none.mt
@@ -0,0 +1,4 @@
+# Target: "no target".
+# This can be used to build you a Makefile that only runs administrative
+# commands like 'clean', 'gdb.tar.Z', etc.
+TM_FILE= tm-none.h
diff --git a/gdb/config/none/tm-none.h b/gdb/config/none/tm-none.h
new file mode 100644
index 00000000000..3db049a2cd4
--- /dev/null
+++ b/gdb/config/none/tm-none.h
@@ -0,0 +1,24 @@
+/* Defines needed when configuring for "none".
+   Copyright 1993, 1998 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* This define is needed so that "gcc -MM" doesn't get errors and fail on
+   source files that use the value of INNER_THAN in preprocessor lines. */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
diff --git a/gdb/config/none/xm-none.h b/gdb/config/none/xm-none.h
new file mode 100644
index 00000000000..7647bdb1d6d
--- /dev/null
+++ b/gdb/config/none/xm-none.h
@@ -0,0 +1,19 @@
+/* Defines needed when configuring for "none".
+   Copyright 1993 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
diff --git a/gdb/config/ns32k/nbsdaout.mh b/gdb/config/ns32k/nbsdaout.mh
new file mode 100644
index 00000000000..8cf47816a1e
--- /dev/null
+++ b/gdb/config/ns32k/nbsdaout.mh
@@ -0,0 +1,5 @@
+# Host: PC532 running NetBSD
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o ns32knbsd-nat.o \
+	solib.o solib-sunos.o
+XM_FILE= xm-nbsd.h
+NAT_FILE= nm-nbsdaout.h
diff --git a/gdb/config/ns32k/nbsdaout.mt b/gdb/config/ns32k/nbsdaout.mt
new file mode 100644
index 00000000000..24418f4e8dc
--- /dev/null
+++ b/gdb/config/ns32k/nbsdaout.mt
@@ -0,0 +1,3 @@
+# Target: PC532 running NetBSD
+TDEPFILES= ns32k-tdep.o ns32knbsd-tdep.o
+TM_FILE= tm-nbsd.h
diff --git a/gdb/config/ns32k/nm-nbsd.h b/gdb/config/ns32k/nm-nbsd.h
new file mode 100644
index 00000000000..4e1e13b9e3e
--- /dev/null
+++ b/gdb/config/ns32k/nm-nbsd.h
@@ -0,0 +1,37 @@
+/* Native-dependent definitions for ns32k running NetBSD, for GDB.
+   Copyright 1986, 1987, 1989, 1992, 1994, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSD_H
+#define NM_NBSD_H
+
+/* Get generic NetBSD native definitions. */
+#include "config/nm-nbsd.h"
+
+#if 0
+#define FLOAT_INFO	{ extern ns32k_float_info(); ns32k_float_info(); }
+#endif
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+	(addr) = ns32k_register_u_addr ((blockend),(regno));
+
+extern int ns32k_register_u_addr (int, int);
+
+#endif /* NM_NBSD_H */
diff --git a/gdb/config/ns32k/nm-nbsdaout.h b/gdb/config/ns32k/nm-nbsdaout.h
new file mode 100644
index 00000000000..aed3c7f3562
--- /dev/null
+++ b/gdb/config/ns32k/nm-nbsdaout.h
@@ -0,0 +1,30 @@
+/* Native-dependent definitions for ns32k running NetBSD, for GDB.
+   Copyright 1986, 1987, 1989, 1992, 1994, 2000, 2002
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSDAOUT_H
+#define NM_NBSDAOUT_H
+
+#include "ns32k/nm-nbsd.h"
+
+/* Get generic NetBSD native definitions. */
+#include "config/nm-nbsdaout.h"
+
+#endif /* NM_NBSDAOUT_H */
diff --git a/gdb/config/ns32k/tm-nbsd.h b/gdb/config/ns32k/tm-nbsd.h
new file mode 100644
index 00000000000..88b4e226942
--- /dev/null
+++ b/gdb/config/ns32k/tm-nbsd.h
@@ -0,0 +1,37 @@
+/* Macro definitions for ns32k running under NetBSD.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_NBSD_H
+#define TM_NBSD_H
+
+/* Override number of expected traps from sysv. */
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+/* Most definitions from umax could be used. */
+
+#include "ns32k/tm-ns32k.h"
+
+/* Saved Pc.  Get it from sigcontext if within sigtramp.  */
+
+/* Offset to saved PC in sigcontext, from <machine/signal.h>.  */
+#define SIGCONTEXT_PC_OFFSET 20
+
+#endif /* TM_NBSD_H */
diff --git a/gdb/config/ns32k/tm-ns32k.h b/gdb/config/ns32k/tm-ns32k.h
new file mode 100644
index 00000000000..cd1594294fc
--- /dev/null
+++ b/gdb/config/ns32k/tm-ns32k.h
@@ -0,0 +1,39 @@
+/* Definitions to make GDB run on an encore under umax 4.2
+   Copyright 1987, 1989, 1991, 1993, 1994, 1998, 1999, 2000, 2001, 2002
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_NS32K_H
+#define TM_NS32K_H
+
+#define GDB_MULTI_ARCH GDB_MULTI_ARCH_PARTIAL
+
+/* Need to get function ends by adding this to epilogue address from .bf
+   record, not using x_fsize field.  */
+#define FUNCTION_EPILOGUE_SIZE 4
+
+/* Address of end of stack space.  */
+
+#ifndef STACK_END_ADDR
+#define STACK_END_ADDR (0xfffff000)
+#endif
+
+#define NUM_GENERAL_REGS	8
+
+#endif /* TM_NS32K_H */
diff --git a/gdb/config/ns32k/xm-nbsd.h b/gdb/config/ns32k/xm-nbsd.h
new file mode 100644
index 00000000000..23a0650d280
--- /dev/null
+++ b/gdb/config/ns32k/xm-nbsd.h
@@ -0,0 +1,22 @@
+/* Parameters for execution on a ns32k running NetBSD, for GDB.
+   Copyright 1994 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Get generic NetBSD host definitions. */
+#include "xm-nbsd.h"
diff --git a/gdb/config/pa/hppa64.mt b/gdb/config/pa/hppa64.mt
new file mode 100644
index 00000000000..d55da773422
--- /dev/null
+++ b/gdb/config/pa/hppa64.mt
@@ -0,0 +1,4 @@
+# Target: HP PA-RISC 2.0 running HPUX 11.00 in wide mode
+TDEPFILES= hppa-tdep.o
+TM_FILE= tm-hppa64.h
+TM_CLIBS=
diff --git a/gdb/config/pa/hppabsd.mh b/gdb/config/pa/hppabsd.mh
new file mode 100644
index 00000000000..d4a152d03e5
--- /dev/null
+++ b/gdb/config/pa/hppabsd.mh
@@ -0,0 +1,4 @@
+# Host: Hewlett-Packard PA-RISC machine, running BSD
+XM_FILE= xm-hppab.h
+NAT_FILE= nm-hppab.h
+NATDEPFILES= hppab-nat.o corelow.o core-aout.o inftarg.o fork-child.o somread.o infptrace.o hpread.o somsolib.o
diff --git a/gdb/config/pa/hppabsd.mt b/gdb/config/pa/hppabsd.mt
new file mode 100644
index 00000000000..0fc0380c26a
--- /dev/null
+++ b/gdb/config/pa/hppabsd.mt
@@ -0,0 +1,3 @@
+# Target: HP PA-RISC running bsd
+TDEPFILES= hppa-tdep.o
+TM_FILE= tm-hppab.h
diff --git a/gdb/config/pa/hppahpux.mh b/gdb/config/pa/hppahpux.mh
new file mode 100644
index 00000000000..c0520576afb
--- /dev/null
+++ b/gdb/config/pa/hppahpux.mh
@@ -0,0 +1,8 @@
+# Host: Hewlett-Packard PA-RISC machine, running HPUX
+
+XM_FILE= xm-hppah.h
+
+NAT_FILE= nm-hppah.h
+NATDEPFILES= hppah-nat.o corelow.o core-aout.o inftarg.o fork-child.o somread.o infptrace.o hpread.o somsolib.o
+
+HOST_IPC=-DBSD_IPC -DPOSIX_WAIT
diff --git a/gdb/config/pa/hppahpux.mt b/gdb/config/pa/hppahpux.mt
new file mode 100644
index 00000000000..dddb3f569a2
--- /dev/null
+++ b/gdb/config/pa/hppahpux.mt
@@ -0,0 +1,3 @@
+# Target: HP PA-RISC running hpux
+TDEPFILES= hppa-tdep.o
+TM_FILE= tm-hppah.h
diff --git a/gdb/config/pa/hppaosf.mh b/gdb/config/pa/hppaosf.mh
new file mode 100644
index 00000000000..d6dd2822d35
--- /dev/null
+++ b/gdb/config/pa/hppaosf.mh
@@ -0,0 +1,5 @@
+# Host: Hewlett-Packard PA-RISC machine, running BSD
+XM_FILE= xm-hppab.h
+NAT_FILE= nm-hppao.h
+NATDEPFILES= fork-child.o m3-nat.o hppam3-nat.o somread.o hpread.o somsolib.o
+NAT_CLIBS= -lmachid -lnetname -lmach
diff --git a/gdb/config/pa/hppaosf.mt b/gdb/config/pa/hppaosf.mt
new file mode 100644
index 00000000000..675402387b6
--- /dev/null
+++ b/gdb/config/pa/hppaosf.mt
@@ -0,0 +1,3 @@
+# Target: HP PA-RISC running OSF1
+TDEPFILES= hppa-tdep.o
+TM_FILE= tm-hppao.h
diff --git a/gdb/config/pa/hppapro.mt b/gdb/config/pa/hppapro.mt
new file mode 100644
index 00000000000..4851b1896e7
--- /dev/null
+++ b/gdb/config/pa/hppapro.mt
@@ -0,0 +1,3 @@
+# Target: PA based debug monitor
+TDEPFILES= hppa-tdep.o op50-rom.o w89k-rom.o monitor.o xmodem.o dsrec.o
+TM_FILE= tm-pro.h
diff --git a/gdb/config/pa/hpux1020.mh b/gdb/config/pa/hpux1020.mh
new file mode 100644
index 00000000000..18f542ee885
--- /dev/null
+++ b/gdb/config/pa/hpux1020.mh
@@ -0,0 +1,14 @@
+# Host: Hewlett-Packard PA-RISC machine, running HPUX 10.20
+
+# FIXME: cagney/2002-04-07: gdb/366: The -Dvfork=fork hack below is
+# stop GDB hanging on HP/UX.  For some reason vfork() hangs yet fork()
+# doesn't ....
+
+MH_CFLAGS = -D__HP_CURSES -Dvfork=fork
+
+XM_FILE= xm-hppah.h
+
+NAT_FILE= nm-hppah.h
+NATDEPFILES= hppah-nat.o corelow.o core-aout.o inftarg.o fork-child.o infptrace.o somread.o hpread.o somsolib.o
+
+HOST_IPC=-DBSD_IPC -DPOSIX_WAIT
diff --git a/gdb/config/pa/hpux1020.mt b/gdb/config/pa/hpux1020.mt
new file mode 100644
index 00000000000..a856d8c1d1d
--- /dev/null
+++ b/gdb/config/pa/hpux1020.mt
@@ -0,0 +1,3 @@
+# Target: HP PA-RISC running hpux
+TDEPFILES= hppa-tdep.o remote-pa.o somsolib.o corelow.o
+TM_FILE= tm-hppah.h
diff --git a/gdb/config/pa/hpux11.mh b/gdb/config/pa/hpux11.mh
new file mode 100644
index 00000000000..25504e030c9
--- /dev/null
+++ b/gdb/config/pa/hpux11.mh
@@ -0,0 +1,14 @@
+# Host: Hewlett-Packard PA-RISC machine, running HPUX 11.00
+
+# FIXME: cagney/2002-04-07: gdb/366: The -Dvfork=fork hack below is
+# stop GDB hanging on HP/UX.  For some reason vfork() hangs yet fork()
+# doesn't ....
+
+MH_CFLAGS = -D__HP_CURSES -Dvfork=fork
+
+XM_FILE= xm-hppah.h
+
+NAT_FILE= nm-hppah11.h
+NATDEPFILES= hppah-nat.o corelow.o core-aout.o inftarg.o fork-child.o infttrace.o somread.o hpread.o somsolib.o
+
+HOST_IPC=-DBSD_IPC -DPOSIX_WAIT
diff --git a/gdb/config/pa/hpux11.mt b/gdb/config/pa/hpux11.mt
new file mode 100644
index 00000000000..405f73a791a
--- /dev/null
+++ b/gdb/config/pa/hpux11.mt
@@ -0,0 +1,3 @@
+# Target: HP PA-RISC running HPUX 11.00
+TDEPFILES= hppa-tdep.o remote-pa.o somsolib.o
+TM_FILE= tm-hppah.h
diff --git a/gdb/config/pa/hpux11w.mh b/gdb/config/pa/hpux11w.mh
new file mode 100644
index 00000000000..cd897aa866b
--- /dev/null
+++ b/gdb/config/pa/hpux11w.mh
@@ -0,0 +1,14 @@
+# Host: Hewlett-Packard PA-RISC machine, running HPUX 11.00
+
+# FIXME: cagney/2002-04-07: gdb/366: The -Dvfork=fork hack below is
+# stop GDB hanging on HP/UX.  For some reason vfork() hangs yet fork()
+# doesn't ....
+
+MH_CFLAGS = -D__HP_CURSES -Dvfork=fork
+
+XM_FILE= xm-hppah.h
+
+NAT_FILE= nm-hppah11.h
+NATDEPFILES= hppah-nat.o corelow.o core-aout.o inftarg.o fork-child.o infttrace.o hpread.o pa64solib.o solib.o
+
+HOST_IPC=-DBSD_IPC -DPOSIX_WAIT
diff --git a/gdb/config/pa/hpux11w.mt b/gdb/config/pa/hpux11w.mt
new file mode 100644
index 00000000000..4064d20fa75
--- /dev/null
+++ b/gdb/config/pa/hpux11w.mt
@@ -0,0 +1,3 @@
+# Target: HP PA-RISC running HPUX 11.00
+TDEPFILES= hppa-tdep.o remote-pa.o
+TM_FILE= tm-hppah.h
diff --git a/gdb/config/pa/nm-hppab.h b/gdb/config/pa/nm-hppab.h
new file mode 100644
index 00000000000..995e8e773d5
--- /dev/null
+++ b/gdb/config/pa/nm-hppab.h
@@ -0,0 +1,137 @@
+/* HPPA PA-RISC machine native support for BSD, for GDB.
+   Copyright 1991, 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "somsolib.h"
+#include "regcache.h"
+
+#define U_REGS_OFFSET 0
+
+#define KERNEL_U_ADDR 0
+
+/* What a coincidence! */
+#define REGISTER_U_ADDR(addr, blockend, regno)				\
+{ addr = (int)(blockend) + REGISTER_BYTE (regno);}
+
+/* 3rd argument to ptrace is supposed to be a caddr_t.  */
+
+#define	PTRACE_ARG3_TYPE caddr_t
+
+/* HPUX 8.0, in its infinite wisdom, has chosen to prototype ptrace
+   with five arguments, so programs written for normal ptrace lose.  */
+#define FIVE_ARG_PTRACE
+
+
+/* This macro defines the register numbers (from REGISTER_NAMES) that
+   are effectively unavailable to the user through ptrace().  It allows
+   us to include the whole register set in REGISTER_NAMES (inorder to
+   better support remote debugging).  If it is used in
+   fetch/store_inferior_registers() gdb will not complain about I/O errors
+   on fetching these registers.  If all registers in REGISTER_NAMES
+   are available, then return false (0).  */
+
+#define CANNOT_STORE_REGISTER(regno)            \
+                   ((regno) == 0) ||     \
+                   ((regno) == PCSQ_HEAD_REGNUM) || \
+                   ((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) ||  \
+                   ((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
+
+/* fetch_inferior_registers is in hppab-nat.c.  */
+#define FETCH_INFERIOR_REGISTERS
+
+/* attach/detach works to some extent under BSD and HPUX.  So long
+   as the process you're attaching to isn't blocked waiting on io,
+   blocked waiting on a signal, or in a system call things work 
+   fine.  (The problems in those cases are related to the fact that
+   the kernel can't provide complete register information for the
+   target process...  Which really pisses off GDB.)  */
+
+#define ATTACH_DETACH
+
+/* The PA-BSD kernel has support for using the data memory break bit
+   to implement fast watchpoints.
+
+   Watchpoints on the PA act much like traditional page protection
+   schemes, but with some notable differences.
+
+   First, a special bit in the page table entry is used to cause
+   a trap when a specific page is written to.  This avoids having
+   to overload watchpoints on the page protection bits.  This makes
+   it possible for the kernel to easily decide if a trap was caused
+   by a watchpoint or by the user writing to protected memory and can
+   signal the user program differently in each case.  
+
+   Second, the PA has a bit in the processor status word which causes
+   data memory breakpoints (aka watchpoints) to be disabled for a single
+   instruction.  This bit can be used to avoid the overhead of unprotecting
+   and reprotecting pages when it becomes necessary to step over a watchpoint.
+
+
+   When the kernel receives a trap indicating a write to a page which
+   is being watched, the kernel performs a couple of simple actions.  First
+   is sets the magic "disable memory breakpoint" bit in the processor
+   status word, it then sends a SIGTRAP to the process which caused the
+   trap.
+
+   GDB will take control and catch the signal for the inferior.  GDB then
+   examines the PSW-X bit to determine if the SIGTRAP was caused by a 
+   watchpoint firing.  If so GDB single steps the inferior over the
+   instruction which caused the watchpoint to trigger (note because the
+   kernel disabled the data memory break bit for one instruction no trap
+   will be taken!).  GDB will then determines the appropriate action to
+   take.  (this may include restarting the inferior if the watchpoint
+   fired because of a write to an address on the same page as a watchpoint,
+   but no write to the watched address occured).  */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS		/* Enable the code in procfs.c */
+
+/* The PA can watch any number of locations, there's no need for it to reject
+   anything (generic routines already check that all intermediates are
+   in memory).  */
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
+	((type) == bp_hardware_watchpoint)
+
+/* When a hardware watchpoint fires off the PC will be left at the
+   instruction which caused the watchpoint.  It will be necessary for
+   GDB to step over the watchpoint.
+
+   On a PA running BSD, it is trivial to identify when it will be
+   necessary to step over a hardware watchpoint as we can examine
+   the PSW-X bit.  If the bit is on, then we trapped because of a 
+   watchpoint, else we trapped for some other reason.  */
+#define STOPPED_BY_WATCHPOINT(W) \
+  ((W).kind == TARGET_WAITKIND_STOPPED \
+   && (W).value.sig == TARGET_SIGNAL_TRAP \
+   && ((int) read_register (IPSW_REGNUM) & 0x00100000))
+
+/* The PA can single step over a watchpoint if the kernel has set the
+   "X" bit in the processor status word (disable data memory breakpoint
+   for one instruction).
+
+   The kernel will always set this bit before notifying the inferior
+   that it hit a watchpoint.  Thus, the inferior can single step over
+   the instruction which caused the watchpoint to fire.  This avoids
+   the traditional need to disable the watchpoint, step the inferior,
+   then enable the watchpoint again.  */
+#define HAVE_STEPPABLE_WATCHPOINT
+
+/* Use these macros for watchpoint insertion/deletion.  */
+/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
+#define target_insert_watchpoint(addr, len, type) hppa_set_watchpoint (addr, len, 1)
+#define target_remove_watchpoint(addr, len, type) hppa_set_watchpoint (addr, len, 0)
diff --git a/gdb/config/pa/nm-hppah.h b/gdb/config/pa/nm-hppah.h
new file mode 100644
index 00000000000..4894a049a08
--- /dev/null
+++ b/gdb/config/pa/nm-hppah.h
@@ -0,0 +1,287 @@
+/* Native support for HPPA-RISC machine running HPUX, for GDB.
+   Copyright 1991, 1992, 1994, 1996, 1998, 1999, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define U_REGS_OFFSET 0
+
+#define KERNEL_U_ADDR 0
+
+/* What a coincidence! */
+#define REGISTER_U_ADDR(addr, blockend, regno)				\
+{ addr = (int)(blockend) + REGISTER_BYTE (regno);}
+
+/* This isn't really correct, because ptrace is actually a 32-bit
+   interface.  However, the modern HP-UX targets all really use
+   ttrace, which is a 64-bit interface --- a debugger running in
+   either 32- or 64-bit mode can debug a 64-bit process.  BUT, the
+   code doesn't use ttrace directly --- it calls call_ptrace instead,
+   which is supposed to be drop-in substitute for ptrace.  In other
+   words, they access a 64-bit system call (ttrace) through a
+   compatibility layer which is allegedly a 32-bit interface.
+
+   So I don't feel the least bit guilty about this.  */
+#define PTRACE_ARG3_TYPE CORE_ADDR
+
+/* HPUX 8.0, in its infinite wisdom, has chosen to prototype ptrace
+   with five arguments, so programs written for normal ptrace lose.  */
+#define FIVE_ARG_PTRACE
+
+/* We need to figure out where the text region is so that we use the
+   appropriate ptrace operator to manipulate text.  Simply reading/writing
+   user space will crap out HPUX.  */
+#define NEED_TEXT_START_END 1
+
+/* This macro defines the register numbers (from REGISTER_NAMES) that
+   are effectively unavailable to the user through ptrace().  It allows
+   us to include the whole register set in REGISTER_NAMES (inorder to
+   better support remote debugging).  If it is used in
+   fetch/store_inferior_registers() gdb will not complain about I/O errors
+   on fetching these registers.  If all registers in REGISTER_NAMES
+   are available, then return false (0).  */
+
+#define CANNOT_STORE_REGISTER(regno)            \
+                   ((regno) == 0) ||     \
+                   ((regno) == PCSQ_HEAD_REGNUM) || \
+                   ((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) ||  \
+                   ((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
+
+/* In hppah-nat.c: */
+#define FETCH_INFERIOR_REGISTERS
+#define CHILD_XFER_MEMORY
+#define CHILD_POST_FOLLOW_INFERIOR_BY_CLONE
+#define CHILD_POST_FOLLOW_VFORK
+
+/* While this is for use by threaded programs, it doesn't appear
+ * to hurt non-threaded ones.  This is used in infrun.c: */
+#define PREPARE_TO_PROCEED(select_it) hppa_prepare_to_proceed()
+extern int hppa_prepare_to_proceed (void);
+
+/* In infptrace.c or infttrace.c: */
+#define CHILD_PID_TO_EXEC_FILE
+#define CHILD_POST_STARTUP_INFERIOR
+#define CHILD_ACKNOWLEDGE_CREATED_INFERIOR
+#define CHILD_INSERT_FORK_CATCHPOINT
+#define CHILD_REMOVE_FORK_CATCHPOINT
+#define CHILD_INSERT_VFORK_CATCHPOINT
+#define CHILD_REMOVE_VFORK_CATCHPOINT
+#define CHILD_HAS_FORKED
+#define CHILD_HAS_VFORKED
+#define CHILD_CAN_FOLLOW_VFORK_PRIOR_TO_EXEC
+#define CHILD_INSERT_EXEC_CATCHPOINT
+#define CHILD_REMOVE_EXEC_CATCHPOINT
+#define CHILD_HAS_EXECD
+#define CHILD_REPORTED_EXEC_EVENTS_PER_EXEC_CALL
+#define CHILD_HAS_SYSCALL_EVENT
+#define CHILD_POST_ATTACH
+#define CHILD_THREAD_ALIVE
+#define CHILD_PID_TO_STR
+
+#define REQUIRE_ATTACH(pid) hppa_require_attach(pid)
+extern int hppa_require_attach (int);
+
+#define REQUIRE_DETACH(pid,signal) hppa_require_detach(pid,signal)
+extern int hppa_require_detach (int, int);
+
+/* So we can cleanly use code in infptrace.c.  */
+#define PT_KILL		PT_EXIT
+#define PT_STEP		PT_SINGLE
+#define PT_CONTINUE	PT_CONTIN
+
+/* FIXME HP MERGE : Previously, PT_RDUAREA. this is actually fixed
+   in gdb-hp-snapshot-980509  */
+#define PT_READ_U	PT_RUAREA
+#define PT_WRITE_U	PT_WUAREA
+#define PT_READ_I	PT_RIUSER
+#define PT_READ_D	PT_RDUSER
+#define PT_WRITE_I	PT_WIUSER
+#define PT_WRITE_D	PT_WDUSER
+
+/* attach/detach works to some extent under BSD and HPUX.  So long
+   as the process you're attaching to isn't blocked waiting on io,
+   blocked waiting on a signal, or in a system call things work 
+   fine.  (The problems in those cases are related to the fact that
+   the kernel can't provide complete register information for the
+   target process...  Which really pisses off GDB.)  */
+
+#define ATTACH_DETACH
+
+/* In infptrace or infttrace.c: */
+
+/* Starting with HP-UX 10.30, support is provided (in the form of
+   ttrace requests) for memory-protection-based hardware watchpoints.
+
+   The 10.30 implementation of these functions reside in infttrace.c.
+
+   Stubs of these functions will be provided in infptrace.c, so that
+   10.20 will at least link.  However, the "can I use a fast watchpoint?"
+   query will always return "No" for 10.20. */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+/* The PA can watch any number of locations (generic routines already check
+   that all intermediates are in watchable memory locations). */
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
+        hppa_can_use_hw_watchpoint(type, cnt, ot)
+
+/* The PA can also watch memory regions of arbitrary size, since we're using
+   a page-protection scheme.  (On some targets, apparently watch registers
+   are used, which can only accomodate regions of REGISTER_SIZE.) */
+#define TARGET_REGION_SIZE_OK_FOR_HW_WATCHPOINT(byte_count) \
+        (1)
+
+/* However, some addresses may not be profitable to use hardware to watch,
+   or may be difficult to understand when the addressed object is out of
+   scope, and hence should be unwatched.  On some targets, this may have
+   severe performance penalties, such that we might as well use regular
+   watchpoints, and save (possibly precious) hardware watchpoints for other
+   locations.
+
+   On HP-UX, we choose not to watch stack-based addresses, because
+
+   [1] Our implementation relies on page protection traps.  The granularity
+   of these is large and so can generate many false hits, which are expensive
+   to respond to.
+
+   [2] Watches of "*p" where we may not know the symbol that p points to,
+   make it difficult to know when the addressed object is out of scope, and
+   hence shouldn't be watched.  Page protection that isn't removed when the
+   addressed object is out of scope will either degrade execution speed
+   (false hits) or give false triggers (when the address is recycled by
+   other calls).
+
+   Since either of these points results in a slow-running inferior, we might
+   as well use normal watchpoints, aka single-step & test. */
+#define TARGET_RANGE_PROFITABLE_FOR_HW_WATCHPOINT(pid,start,len) \
+        hppa_range_profitable_for_hw_watchpoint(pid, start, (LONGEST)(len))
+
+/* On HP-UX, we're using page-protection to implement hardware watchpoints.
+   When an instruction attempts to write to a write-protected memory page,
+   a SIGBUS is raised.  At that point, the write has not actually occurred.
+
+   We must therefore remove page-protections; single-step the inferior (to
+   allow the write to happen); restore page-protections; and check whether
+   any watchpoint triggered.
+
+   If none did, then the write was to a "nearby" location that just happens
+   to fall on the same page as a watched location, and so can be ignored.
+
+   The only intended client of this macro is wait_for_inferior(), in infrun.c.
+   When HAVE_NONSTEPPABLE_WATCHPOINT is true, that function will take care
+   of the stepping & etc. */
+
+#define STOPPED_BY_WATCHPOINT(W) \
+        ((W.kind == TARGET_WAITKIND_STOPPED) && \
+         (stop_signal == TARGET_SIGNAL_BUS) && \
+         ! stepped_after_stopped_by_watchpoint && \
+         bpstat_have_active_hw_watchpoints ())
+
+/* When a hardware watchpoint triggers, we'll move the inferior past it
+   by removing all eventpoints; stepping past the instruction that caused
+   the trigger; reinserting eventpoints; and checking whether any watched
+   location changed. */
+#define HAVE_NONSTEPPABLE_WATCHPOINT
+
+/* Our implementation of "hardware" watchpoints uses memory page-protection
+   faults.  However, HP-UX has unfortunate interactions between these and
+   system calls; basically, it's unsafe to have page protections on when a
+   syscall is running.  Therefore, we also ask for notification of syscall
+   entries and returns.  When the inferior enters a syscall, we disable
+   h/w watchpoints.  When the inferior returns from a syscall, we reenable
+   h/w watchpoints.
+
+   infptrace.c supplies dummy versions of these; infttrace.c is where the
+   meaningful implementations are.
+ */
+#define TARGET_ENABLE_HW_WATCHPOINTS(pid) \
+        hppa_enable_page_protection_events (pid)
+extern void hppa_enable_page_protection_events (int);
+
+#define TARGET_DISABLE_HW_WATCHPOINTS(pid) \
+        hppa_disable_page_protection_events (pid)
+extern void hppa_disable_page_protection_events (int);
+
+/* Use these macros for watchpoint insertion/deletion.  */
+#define target_insert_watchpoint(addr, len, type) \
+        hppa_insert_hw_watchpoint (PIDGET (inferior_ptid), addr, (LONGEST)(len), type)
+
+#define target_remove_watchpoint(addr, len, type) \
+        hppa_remove_hw_watchpoint (PIDGET (inferior_ptid), addr, (LONGEST)(len), type)
+
+/* We call our k-thread processes "threads", rather
+ * than processes.  So we need a new way to print
+ * the string.  Code is in hppah-nat.c.
+ */
+
+extern char *child_pid_to_str (ptid_t);
+
+#define target_tid_to_str( ptid ) \
+        hppa_tid_to_str( ptid )
+extern char *hppa_tid_to_str (ptid_t);
+
+/* For this, ID can be either a process or thread ID, and the function
+   will describe it appropriately, returning the description as a printable
+   string.
+
+   The function that implements this macro is defined in infptrace.c and
+   infttrace.c.
+ */
+#define target_pid_or_tid_to_str(ID) \
+        hppa_pid_or_tid_to_str (ID)
+extern char *hppa_pid_or_tid_to_str (ptid_t);
+
+/* This is used when handling events caused by a call to vfork().  On ptrace-
+   based HP-UXs, when you resume the vforked child, the parent automagically
+   begins running again.  To prevent this runaway, this function is used.
+
+   Note that for vfork on HP-UX, we receive three events of interest:
+
+   1. the vfork event for the new child process
+   2. the exit or exec event of the new child process (actually, you get
+   two exec events on ptrace-based HP-UXs)
+   3. the vfork event for the original parent process
+
+   The first is always received first.  The other two may be received in any
+   order; HP-UX doesn't guarantee an order.
+ */
+#define ENSURE_VFORKING_PARENT_REMAINS_STOPPED(PID) \
+        hppa_ensure_vforking_parent_remains_stopped (PID)
+extern void hppa_ensure_vforking_parent_remains_stopped (int);
+
+/* This is used when handling events caused by a call to vfork().
+
+   On ttrace-based HP-UXs, the parent vfork and child exec arrive more or less
+   together.  That is, you could do two wait()s without resuming either parent
+   or child, and get both events.
+
+   On ptrace-based HP-UXs, you must resume the child after its exec event is
+   delivered or you won't get the parent's vfork.  I.e., you can't just wait()
+   and get the parent vfork, after receiving the child exec.
+ */
+#define RESUME_EXECD_VFORKING_CHILD_TO_GET_PARENT_VFORK() \
+        hppa_resume_execd_vforking_child_to_get_parent_vfork ()
+extern int hppa_resume_execd_vforking_child_to_get_parent_vfork (void);
+
+#define HPUXHPPA
+
+#define MAY_SWITCH_FROM_INFERIOR_PID (1)
+
+#define MAY_FOLLOW_EXEC (1)
+
+#define USE_THREAD_STEP_NEEDED (1)
diff --git a/gdb/config/pa/nm-hppah11.h b/gdb/config/pa/nm-hppah11.h
new file mode 100644
index 00000000000..2c2b507a436
--- /dev/null
+++ b/gdb/config/pa/nm-hppah11.h
@@ -0,0 +1,23 @@
+/* Native support for HPPA-RISC machine running HPUX 11.x, for GDB.
+   Copyright 1998 Free Software Foundation, Inc. 
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define GDB_NATIVE_HPUX_11
+
+#include "pa/nm-hppah.h"
diff --git a/gdb/config/pa/nm-hppao.h b/gdb/config/pa/nm-hppao.h
new file mode 100644
index 00000000000..11e13e7dbca
--- /dev/null
+++ b/gdb/config/pa/nm-hppao.h
@@ -0,0 +1,57 @@
+/* HPPA PA-RISC machine native support for Lites, for GDB.
+   Copyright 1995 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "nm-m3.h"
+#define U_REGS_OFFSET 0
+
+#define KERNEL_U_ADDR 0
+
+/* What a coincidence! */
+#define REGISTER_U_ADDR(addr, blockend, regno)				\
+{ addr = (int)(blockend) + REGISTER_BYTE (regno);}
+
+/* This macro defines the register numbers (from REGISTER_NAMES) that
+   are effectively unavailable to the user through ptrace().  It allows
+   us to include the whole register set in REGISTER_NAMES (inorder to
+   better support remote debugging).  If it is used in
+   fetch/store_inferior_registers() gdb will not complain about I/O errors
+   on fetching these registers.  If all registers in REGISTER_NAMES
+   are available, then return false (0).  */
+
+#define CANNOT_STORE_REGISTER(regno)            \
+                   ((regno) == 0) ||     \
+                   ((regno) == PCSQ_HEAD_REGNUM) || \
+                   ((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) ||  \
+                   ((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
+
+/* fetch_inferior_registers is in hppab-nat.c.  */
+#define FETCH_INFERIOR_REGISTERS
+
+/* attach/detach works to some extent under BSD and HPUX.  So long
+   as the process you're attaching to isn't blocked waiting on io,
+   blocked waiting on a signal, or in a system call things work 
+   fine.  (The problems in those cases are related to the fact that
+   the kernel can't provide complete register information for the
+   target process...  Which really pisses off GDB.)  */
+
+#define ATTACH_DETACH
+
+#define EMULATOR_BASE 0x90100000
+#define EMULATOR_END  0x90200000
diff --git a/gdb/config/pa/tm-hppa.h b/gdb/config/pa/tm-hppa.h
new file mode 100644
index 00000000000..227108f49ef
--- /dev/null
+++ b/gdb/config/pa/tm-hppa.h
@@ -0,0 +1,762 @@
+/* Parameters for execution on any Hewlett-Packard PA-RISC machine.
+   Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996,
+   1998, 1999, 2000 Free Software Foundation, Inc.
+
+   Contributed by the Center for Software Science at the
+   University of Utah (pa-gdb-bugs@cs.utah.edu).
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+/* Forward declarations of some types we use in prototypes */
+
+struct frame_info;
+struct frame_saved_regs;
+struct value;
+struct type;
+struct inferior_status;
+
+/* By default assume we don't have to worry about software floating point.  */
+#ifndef SOFT_FLOAT
+#define SOFT_FLOAT 0
+#endif
+
+/* Get at various relevent fields of an instruction word. */
+
+#define MASK_5 0x1f
+#define MASK_11 0x7ff
+#define MASK_14 0x3fff
+#define MASK_21 0x1fffff
+
+/* This macro gets bit fields using HP's numbering (MSB = 0) */
+#ifndef GET_FIELD
+#define GET_FIELD(X, FROM, TO) \
+  ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
+#endif
+
+/* On the PA, any pass-by-value structure > 8 bytes is actually
+   passed via a pointer regardless of its type or the compiler
+   used.  */
+
+#define REG_STRUCT_HAS_ADDR(gcc_p,type) \
+  (TYPE_LENGTH (type) > 8)
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+   to reach some "real" code.  */
+
+extern CORE_ADDR hppa_skip_prologue (CORE_ADDR);
+#define SKIP_PROLOGUE(pc) (hppa_skip_prologue (pc))
+
+/* If PC is in some function-call trampoline code, return the PC
+   where the function itself actually starts.  If not, return NULL.  */
+
+#define	SKIP_TRAMPOLINE_CODE(pc) skip_trampoline_code (pc, NULL)
+extern CORE_ADDR skip_trampoline_code (CORE_ADDR, char *);
+
+/* Return non-zero if we are in an appropriate trampoline. */
+
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) \
+   in_solib_call_trampoline (pc, name)
+extern int in_solib_call_trampoline (CORE_ADDR, char *);
+
+#define IN_SOLIB_RETURN_TRAMPOLINE(pc, name) \
+  in_solib_return_trampoline (pc, name)
+extern int in_solib_return_trampoline (CORE_ADDR, char *);
+
+/* Immediately after a function call, return the saved pc.
+   Can't go through the frames for this because on some machines
+   the new frame is not set up until the new function executes
+   some instructions.  */
+
+#undef	SAVED_PC_AFTER_CALL
+#define SAVED_PC_AFTER_CALL(frame) saved_pc_after_call (frame)
+extern CORE_ADDR saved_pc_after_call (struct frame_info *);
+
+/* Stack grows upward */
+#define INNER_THAN(lhs,rhs) ((lhs) > (rhs))
+
+/* elz: adjust the quantity to the next highest value which is 64-bit aligned.
+   This is used in valops.c, when the sp is adjusted.
+   On hppa the sp must always be kept 64-bit aligned */
+
+#define STACK_ALIGN(arg) ( ((arg)%8) ? (((arg)+7)&-8) : (arg))
+#define EXTRA_STACK_ALIGNMENT_NEEDED 0
+
+/* Sequence of bytes for breakpoint instruction.  */
+
+#define BREAKPOINT {0x00, 0x01, 0x00, 0x04}
+#define BREAKPOINT32 0x10004
+
+/* Amount PC must be decremented by after a breakpoint.
+   This is often the number of bytes in BREAKPOINT
+   but not always.
+
+   Not on the PA-RISC */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Sometimes we may pluck out a minimal symbol that has a negative
+   address.
+
+   An example of this occurs when an a.out is linked against a foo.sl.
+   The foo.sl defines a global bar(), and the a.out declares a signature
+   for bar().  However, the a.out doesn't directly call bar(), but passes
+   its address in another call.
+
+   If you have this scenario and attempt to "break bar" before running,
+   gdb will find a minimal symbol for bar() in the a.out.  But that
+   symbol's address will be negative.  What this appears to denote is
+   an index backwards from the base of the procedure linkage table (PLT)
+   into the data linkage table (DLT), the end of which is contiguous
+   with the start of the PLT.  This is clearly not a valid address for
+   us to set a breakpoint on.
+
+   Note that one must be careful in how one checks for a negative address.
+   0xc0000000 is a legitimate address of something in a shared text
+   segment, for example.  Since I don't know what the possible range
+   is of these "really, truly negative" addresses that come from the
+   minimal symbols, I'm resorting to the gross hack of checking the
+   top byte of the address for all 1's.  Sigh.
+ */
+#define PC_REQUIRES_RUN_BEFORE_USE(pc) \
+  (! target_has_stack && (pc & 0xFF000000))
+
+/* return instruction is bv r0(rp) or bv,n r0(rp) */
+
+#define ABOUT_TO_RETURN(pc) ((read_memory_integer (pc, 4) | 0x2) == 0xE840C002)
+
+/* Say how long (ordinary) registers are.  This is a piece of bogosity
+   used in push_word and a few other places; REGISTER_RAW_SIZE is the
+   real way to know how big a register is.  */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+
+#define NUM_REGS 128
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.
+   They are in rows of eight entries  */
+
+#define REGISTER_NAMES	\
+ {"flags",  "r1",      "rp",      "r3",    "r4",     "r5",      "r6",     "r7",    \
+  "r8",     "r9",      "r10",     "r11",   "r12",    "r13",     "r14",    "r15",   \
+  "r16",    "r17",     "r18",     "r19",   "r20",    "r21",     "r22",    "r23",   \
+  "r24",    "r25",     "r26",     "dp",    "ret0",   "ret1",    "sp",     "r31",   \
+  "sar",    "pcoqh",   "pcsqh",   "pcoqt", "pcsqt",  "eiem",    "iir",    "isr",   \
+  "ior",    "ipsw",    "goto",    "sr4",   "sr0",    "sr1",     "sr2",    "sr3",   \
+  "sr5",    "sr6",     "sr7",     "cr0",   "cr8",    "cr9",     "ccr",    "cr12",  \
+  "cr13",   "cr24",    "cr25",    "cr26",  "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",\
+  "fpsr",    "fpe1",   "fpe2",    "fpe3",  "fpe4",   "fpe5",    "fpe6",   "fpe7",  \
+  "fr4",     "fr4R",   "fr5",     "fr5R",  "fr6",    "fr6R",    "fr7",    "fr7R",  \
+  "fr8",     "fr8R",   "fr9",     "fr9R",  "fr10",   "fr10R",   "fr11",   "fr11R", \
+  "fr12",    "fr12R",  "fr13",    "fr13R", "fr14",   "fr14R",   "fr15",   "fr15R", \
+  "fr16",    "fr16R",  "fr17",    "fr17R", "fr18",   "fr18R",   "fr19",   "fr19R", \
+  "fr20",    "fr20R",  "fr21",    "fr21R", "fr22",   "fr22R",   "fr23",   "fr23R", \
+  "fr24",    "fr24R",  "fr25",    "fr25R", "fr26",   "fr26R",   "fr27",   "fr27R", \
+  "fr28",    "fr28R",  "fr29",    "fr29R", "fr30",   "fr30R",   "fr31",   "fr31R"}
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define R0_REGNUM 0		/* Doesn't actually exist, used as base for
+				   other r registers.  */
+#define FLAGS_REGNUM 0		/* Various status flags */
+#define RP_REGNUM 2		/* return pointer */
+#define FP_REGNUM 3		/* Contains address of executing stack */
+				/* frame */
+#define SP_REGNUM 30		/* Contains address of top of stack */
+#define SAR_REGNUM 32		/* Shift Amount Register */
+#define IPSW_REGNUM 41		/* Interrupt Processor Status Word */
+#define PCOQ_HEAD_REGNUM 33	/* instruction offset queue head */
+#define PCSQ_HEAD_REGNUM 34	/* instruction space queue head */
+#define PCOQ_TAIL_REGNUM 35	/* instruction offset queue tail */
+#define PCSQ_TAIL_REGNUM 36	/* instruction space queue tail */
+#define EIEM_REGNUM 37		/* External Interrupt Enable Mask */
+#define IIR_REGNUM 38		/* Interrupt Instruction Register */
+#define IOR_REGNUM 40		/* Interrupt Offset Register */
+#define SR4_REGNUM 43		/* space register 4 */
+#define RCR_REGNUM 51		/* Recover Counter (also known as cr0) */
+#define CCR_REGNUM 54		/* Coprocessor Configuration Register */
+#define TR0_REGNUM 57		/* Temporary Registers (cr24 -> cr31) */
+#define CR27_REGNUM 60		/* Base register for thread-local storage, cr27 */
+#define FP0_REGNUM 64		/* floating point reg. 0 (fspr) */
+#define FP4_REGNUM 72
+
+#define ARG0_REGNUM 26		/* The first argument of a callee. */
+#define ARG1_REGNUM 25		/* The second argument of a callee. */
+#define ARG2_REGNUM 24		/* The third argument of a callee. */
+#define ARG3_REGNUM 23		/* The fourth argument of a callee. */
+
+/* compatibility with the rest of gdb. */
+#define PC_REGNUM PCOQ_HEAD_REGNUM
+#define NPC_REGNUM PCOQ_TAIL_REGNUM
+
+/*
+ * Processor Status Word Masks
+ */
+
+#define PSW_T   0x01000000	/* Taken Branch Trap Enable */
+#define PSW_H   0x00800000	/* Higher-Privilege Transfer Trap Enable */
+#define PSW_L   0x00400000	/* Lower-Privilege Transfer Trap Enable */
+#define PSW_N   0x00200000	/* PC Queue Front Instruction Nullified */
+#define PSW_X   0x00100000	/* Data Memory Break Disable */
+#define PSW_B   0x00080000	/* Taken Branch in Previous Cycle */
+#define PSW_C   0x00040000	/* Code Address Translation Enable */
+#define PSW_V   0x00020000	/* Divide Step Correction */
+#define PSW_M   0x00010000	/* High-Priority Machine Check Disable */
+#define PSW_CB  0x0000ff00	/* Carry/Borrow Bits */
+#define PSW_R   0x00000010	/* Recovery Counter Enable */
+#define PSW_Q   0x00000008	/* Interruption State Collection Enable */
+#define PSW_P   0x00000004	/* Protection ID Validation Enable */
+#define PSW_D   0x00000002	/* Data Address Translation Enable */
+#define PSW_I   0x00000001	/* External, Power Failure, Low-Priority */
+				/* Machine Check Interruption Enable */
+
+/* When fetching register values from an inferior or a core file,
+   clean them up using this macro.  BUF is a char pointer to
+   the raw value of the register in the registers[] array.  */
+
+#define	DEPRECATED_CLEAN_UP_REGISTER_VALUE(regno, buf) \
+  do {	\
+    if ((regno) == PCOQ_HEAD_REGNUM || (regno) == PCOQ_TAIL_REGNUM) \
+      (buf)[sizeof(CORE_ADDR) -1] &= ~0x3; \
+  } while (0)
+
+/* Define DO_REGISTERS_INFO() to do machine-specific formatting
+   of register dumps. */
+
+#define DO_REGISTERS_INFO(_regnum, fp) pa_do_registers_info (_regnum, fp)
+extern void pa_do_registers_info (int, int);
+
+#if 0
+#define STRCAT_REGISTER(regnum, fpregs, stream, precision) pa_do_strcat_registers_info (regnum, fpregs, stream, precision)
+extern void pa_do_strcat_registers_info (int, int, struct ui_file *, enum precision_type);
+#endif
+
+/* PA specific macro to see if the current instruction is nullified. */
+#ifndef INSTRUCTION_NULLIFIED
+#define INSTRUCTION_NULLIFIED \
+    (((int)read_register (IPSW_REGNUM) & 0x00200000) && \
+     !((int)read_register (FLAGS_REGNUM) & 0x2))
+#endif
+
+/* Number of bytes of storage in the actual machine representation
+   for register N.  On the PA-RISC, all regs are 4 bytes, including
+   the FP registers (they're accessed as two 4 byte halves).  */
+
+#define REGISTER_RAW_SIZE(N) 4
+
+/* Total amount of space needed to store our copies of the machine's
+   register state, the array `registers'.  */
+#define REGISTER_BYTES (NUM_REGS * 4)
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+
+#define REGISTER_BYTE(N) (N) * 4
+
+/* Number of bytes of storage in the program's representation
+   for register N. */
+
+#define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ ((N) < FP4_REGNUM ? builtin_type_int : builtin_type_float)
+
+/* Store the address of the place in which to copy the structure the
+   subroutine will return.  This is called from call_function. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) {write_register (28, (ADDR)); }
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  */
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+  hppa_extract_return_value (TYPE, REGBUF, VALBUF);
+
+ /* elz: decide whether the function returning a value of type type
+    will put it on the stack or in the registers.
+    The pa calling convention says that:
+    register 28 (called ret0 by gdb) contains any ASCII char,
+    and any non_floating point value up to 32-bits.
+    reg 28 and 29 contain non-floating point up tp 64 bits and larger
+    than 32 bits. (higer order word in reg 28).
+    fr4: floating point up to 64 bits
+    sr1: space identifier (32-bit)
+    stack: any lager than 64-bit, with the address in r28
+  */
+extern use_struct_convention_fn hppa_use_struct_convention;
+#define USE_STRUCT_CONVENTION(gcc_p,type) hppa_use_struct_convention (gcc_p,type)
+
+/* Write into appropriate registers a function return value
+   of type TYPE, given in virtual format.  */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+  hppa_store_return_value (TYPE, VALBUF);
+
+/* Extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one).  */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+  (*(int *)((REGBUF) + REGISTER_BYTE (28)))
+
+/* elz: Return a large value, which is stored on the stack at addr.
+   This is defined only for the hppa, at this moment. 
+   The above macro EXTRACT_STRUCT_VALUE_ADDRESS is not called anymore,
+   because it assumes that on exit from a called function which returns
+   a large structure on the stack, the address of the ret structure is 
+   still in register 28. Unfortunately this register is usually overwritten
+   by the called function itself, on hppa. This is specified in the calling
+   convention doc. As far as I know, the only way to get the return value
+   is to have the caller tell us where it told the callee to put it, rather
+   than have the callee tell us.
+ */
+#define VALUE_RETURNED_FROM_STACK(valtype,addr) \
+  hppa_value_returned_from_stack (valtype, addr)
+
+/*
+ * This macro defines the register numbers (from REGISTER_NAMES) that
+ * are effectively unavailable to the user through ptrace().  It allows
+ * us to include the whole register set in REGISTER_NAMES (inorder to
+ * better support remote debugging).  If it is used in
+ * fetch/store_inferior_registers() gdb will not complain about I/O errors
+ * on fetching these registers.  If all registers in REGISTER_NAMES
+ * are available, then return false (0).
+ */
+
+#define CANNOT_STORE_REGISTER(regno)            \
+                   ((regno) == 0) ||     \
+                   ((regno) == PCSQ_HEAD_REGNUM) || \
+                   ((regno) >= PCSQ_TAIL_REGNUM && (regno) < IPSW_REGNUM) ||  \
+                   ((regno) > IPSW_REGNUM && (regno) < FP4_REGNUM)
+
+#define INIT_EXTRA_FRAME_INFO(fromleaf, frame) init_extra_frame_info (fromleaf, frame)
+extern void init_extra_frame_info (int, struct frame_info *);
+
+/* Describe the pointer in each stack frame to the previous stack frame
+   (its caller).  */
+
+/* FRAME_CHAIN takes a frame's nominal address and produces the
+   frame's chain-pointer.  */
+
+/* In the case of the PA-RISC, the frame's nominal address
+   is the address of a 4-byte word containing the calling frame's
+   address (previous FP).  */
+
+#define FRAME_CHAIN(thisframe) frame_chain (thisframe)
+extern CORE_ADDR frame_chain (struct frame_info *);
+
+extern int hppa_frame_chain_valid (CORE_ADDR, struct frame_info *);
+#define FRAME_CHAIN_VALID(chain, thisframe) hppa_frame_chain_valid (chain, thisframe)
+
+/* Define other aspects of the stack frame.  */
+
+/* A macro that tells us whether the function invocation represented
+   by FI does not have a frame on the stack associated with it.  If it
+   does not, FRAMELESS is set to 1, else 0.  */
+#define FRAMELESS_FUNCTION_INVOCATION(FI) \
+  (frameless_function_invocation (FI))
+extern int frameless_function_invocation (struct frame_info *);
+
+extern CORE_ADDR hppa_frame_saved_pc (struct frame_info *frame);
+#define FRAME_SAVED_PC(FRAME) hppa_frame_saved_pc (FRAME)
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+/* Set VAL to the number of args passed to frame described by FI.
+   Can set VAL to -1, meaning no way to tell.  */
+
+/* We can't tell how many args there are
+   now that the C compiler delays popping them.  */
+#define FRAME_NUM_ARGS(fi) (-1)
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#define FRAME_ARGS_SKIP 0
+
+#define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
+  hppa_frame_find_saved_regs (frame_info, &frame_saved_regs)
+extern void
+hppa_frame_find_saved_regs (struct frame_info *, struct frame_saved_regs *);
+
+
+/* Things needed for making the inferior call functions.  */
+
+/* Push an empty stack frame, to record the current PC, etc. */
+
+#define PUSH_DUMMY_FRAME push_dummy_frame (inf_status)
+extern void push_dummy_frame (struct inferior_status *);
+
+/* Discard from the stack the innermost frame, 
+   restoring all saved registers.  */
+#define POP_FRAME  hppa_pop_frame ()
+extern void hppa_pop_frame (void);
+
+#define INSTRUCTION_SIZE 4
+
+#ifndef PA_LEVEL_0
+
+/* Non-level zero PA's have space registers (but they don't always have
+   floating-point, do they????  */
+
+/* This sequence of words is the instructions
+
+   ; Call stack frame has already been built by gdb. Since we could be calling 
+   ; a varargs function, and we do not have the benefit of a stub to put things in
+   ; the right place, we load the first 4 word of arguments into both the general
+   ; and fp registers.
+   call_dummy
+   ldw -36(sp), arg0
+   ldw -40(sp), arg1
+   ldw -44(sp), arg2
+   ldw -48(sp), arg3
+   ldo -36(sp), r1
+   fldws 0(0, r1), fr4
+   fldds -4(0, r1), fr5
+   fldws -8(0, r1), fr6
+   fldds -12(0, r1), fr7
+   ldil 0, r22                  ; FUNC_LDIL_OFFSET must point here
+   ldo 0(r22), r22                      ; FUNC_LDO_OFFSET must point here
+   ldsid (0,r22), r4
+   ldil 0, r1                   ; SR4EXPORT_LDIL_OFFSET must point here
+   ldo 0(r1), r1                        ; SR4EXPORT_LDO_OFFSET must point here
+   ldsid (0,r1), r20
+   combt,=,n r4, r20, text_space        ; If target is in data space, do a
+   ble 0(sr5, r22)                      ; "normal" procedure call
+   copy r31, r2
+   break 4, 8 
+   mtsp r21, sr0
+   ble,n 0(sr0, r22)
+   text_space                           ; Otherwise, go through _sr4export,
+   ble (sr4, r1)                        ; which will return back here.
+   stw r31,-24(r30)
+   break 4, 8
+   mtsp r21, sr0
+   ble,n 0(sr0, r22)
+   nop                          ; To avoid kernel bugs 
+   nop                          ; and keep the dummy 8 byte aligned
+
+   The dummy decides if the target is in text space or data space. If
+   it's in data space, there's no problem because the target can
+   return back to the dummy. However, if the target is in text space,
+   the dummy calls the secret, undocumented routine _sr4export, which
+   calls a function in text space and can return to any space. Instead
+   of including fake instructions to represent saved registers, we
+   know that the frame is associated with the call dummy and treat it
+   specially.
+
+   The trailing NOPs are needed to avoid a bug in HPUX, BSD and OSF1 
+   kernels.   If the memory at the location pointed to by the PC is
+   0xffffffff then a ptrace step call will fail (even if the instruction
+   is nullified).
+
+   The code to pop a dummy frame single steps three instructions
+   starting with the last mtsp.  This includes the nullified "instruction"
+   following the ble (which is uninitialized junk).  If the 
+   "instruction" following the last BLE is 0xffffffff, then the ptrace
+   will fail and the dummy frame is not correctly popped.
+
+   By placing a NOP in the delay slot of the BLE instruction we can be 
+   sure that we never try to execute a 0xffffffff instruction and
+   avoid the kernel bug.  The second NOP is needed to keep the call
+   dummy 8 byte aligned.  */
+
+/* Define offsets into the call dummy for the target function address */
+#define FUNC_LDIL_OFFSET (INSTRUCTION_SIZE * 9)
+#define FUNC_LDO_OFFSET (INSTRUCTION_SIZE * 10)
+
+/* Define offsets into the call dummy for the _sr4export address */
+#define SR4EXPORT_LDIL_OFFSET (INSTRUCTION_SIZE * 12)
+#define SR4EXPORT_LDO_OFFSET (INSTRUCTION_SIZE * 13)
+
+#define CALL_DUMMY {0x4BDA3FB9, 0x4BD93FB1, 0x4BD83FA9, 0x4BD73FA1,\
+                    0x37C13FB9, 0x24201004, 0x2C391005, 0x24311006,\
+                    0x2C291007, 0x22C00000, 0x36D60000, 0x02C010A4,\
+                    0x20200000, 0x34210000, 0x002010b4, 0x82842022,\
+                    0xe6c06000, 0x081f0242, 0x00010004, 0x00151820,\
+                    0xe6c00002, 0xe4202000, 0x6bdf3fd1, 0x00010004,\
+                    0x00151820, 0xe6c00002, 0x08000240, 0x08000240}
+
+#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 28)
+#define REG_PARM_STACK_SPACE 16
+
+#else /* defined PA_LEVEL_0 */
+
+/* This is the call dummy for a level 0 PA.  Level 0's don't have space
+   registers (or floating point?), so we skip all that inter-space call stuff,
+   and avoid touching the fp regs.
+
+   call_dummy
+
+   ldw -36(%sp), %arg0
+   ldw -40(%sp), %arg1
+   ldw -44(%sp), %arg2
+   ldw -48(%sp), %arg3
+   ldil 0, %r31                 ; FUNC_LDIL_OFFSET must point here
+   ldo 0(%r31), %r31            ; FUNC_LDO_OFFSET must point here
+   ble 0(%sr0, %r31)
+   copy %r31, %r2
+   break 4, 8 
+   nop                          ; restore_pc_queue expects these
+   bv,n 0(%r22)                 ; instructions to be here...
+   nop
+ */
+
+/* Define offsets into the call dummy for the target function address */
+#define FUNC_LDIL_OFFSET (INSTRUCTION_SIZE * 4)
+#define FUNC_LDO_OFFSET (INSTRUCTION_SIZE * 5)
+
+#define CALL_DUMMY {0x4bda3fb9, 0x4bd93fb1, 0x4bd83fa9, 0x4bd73fa1,\
+		    0x23e00000, 0x37ff0000, 0xe7e00000, 0x081f0242,\
+		    0x00010004, 0x08000240, 0xeac0c002, 0x08000240}
+
+#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 12)
+
+#endif
+
+#define CALL_DUMMY_START_OFFSET 0
+
+/* If we've reached a trap instruction within the call dummy, then
+   we'll consider that to mean that we've reached the call dummy's
+   end after its successful completion. */
+#define CALL_DUMMY_HAS_COMPLETED(pc, sp, frame_address) \
+  (PC_IN_CALL_DUMMY((pc), (sp), (frame_address)) && \
+   (read_memory_integer((pc), 4) == BREAKPOINT32))
+
+/*
+ * Insert the specified number of args and function address
+ * into a call sequence of the above form stored at DUMMYNAME.
+ *
+ * On the hppa we need to call the stack dummy through $$dyncall.
+ * Therefore our version of FIX_CALL_DUMMY takes an extra argument,
+ * real_pc, which is the location where gdb should start up the
+ * inferior to do the function call.
+ */
+
+#define FIX_CALL_DUMMY hppa_fix_call_dummy
+
+extern CORE_ADDR
+hppa_fix_call_dummy (char *, CORE_ADDR, CORE_ADDR, int,
+		     struct value **, struct type *, int);
+
+#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
+  (hppa_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr)))
+extern CORE_ADDR
+hppa_push_arguments (int, struct value **, CORE_ADDR, int, CORE_ADDR);
+
+/* The low two bits of the PC on the PA contain the privilege level.  Some
+   genius implementing a (non-GCC) compiler apparently decided this means
+   that "addresses" in a text section therefore include a privilege level,
+   and thus symbol tables should contain these bits.  This seems like a
+   bonehead thing to do--anyway, it seems to work for our purposes to just
+   ignore those bits.  */
+#define SMASH_TEXT_ADDRESS(addr) ((addr) &= ~0x3)
+
+#define	GDB_TARGET_IS_HPPA
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/*
+ * Unwind table and descriptor.
+ */
+
+struct unwind_table_entry
+  {
+    CORE_ADDR region_start;
+    CORE_ADDR region_end;
+
+    unsigned int Cannot_unwind:1;	/* 0 */
+    unsigned int Millicode:1;	/* 1 */
+    unsigned int Millicode_save_sr0:1;	/* 2 */
+    unsigned int Region_description:2;	/* 3..4 */
+    unsigned int reserved1:1;	/* 5 */
+    unsigned int Entry_SR:1;	/* 6 */
+    unsigned int Entry_FR:4;	/* number saved *//* 7..10 */
+    unsigned int Entry_GR:5;	/* number saved *//* 11..15 */
+    unsigned int Args_stored:1;	/* 16 */
+    unsigned int Variable_Frame:1;	/* 17 */
+    unsigned int Separate_Package_Body:1;	/* 18 */
+    unsigned int Frame_Extension_Millicode:1;	/* 19 */
+    unsigned int Stack_Overflow_Check:1;	/* 20 */
+    unsigned int Two_Instruction_SP_Increment:1;	/* 21 */
+    unsigned int Ada_Region:1;	/* 22 */
+    unsigned int cxx_info:1;	/* 23 */
+    unsigned int cxx_try_catch:1;	/* 24 */
+    unsigned int sched_entry_seq:1;	/* 25 */
+    unsigned int reserved2:1;	/* 26 */
+    unsigned int Save_SP:1;	/* 27 */
+    unsigned int Save_RP:1;	/* 28 */
+    unsigned int Save_MRP_in_frame:1;	/* 29 */
+    unsigned int extn_ptr_defined:1;	/* 30 */
+    unsigned int Cleanup_defined:1;	/* 31 */
+
+    unsigned int MPE_XL_interrupt_marker:1;	/* 0 */
+    unsigned int HP_UX_interrupt_marker:1;	/* 1 */
+    unsigned int Large_frame:1;	/* 2 */
+    unsigned int Pseudo_SP_Set:1;	/* 3 */
+    unsigned int reserved4:1;	/* 4 */
+    unsigned int Total_frame_size:27;	/* 5..31 */
+
+    /* This is *NOT* part of an actual unwind_descriptor in an object
+       file.  It is *ONLY* part of the "internalized" descriptors that
+       we create from those in a file.
+     */
+    struct
+      {
+	unsigned int stub_type:4;	/* 0..3 */
+	unsigned int padding:28;	/* 4..31 */
+      }
+    stub_unwind;
+  };
+
+/* HP linkers also generate unwinds for various linker-generated stubs.
+   GDB reads in the stubs from the $UNWIND_END$ subspace, then 
+   "converts" them into normal unwind entries using some of the reserved
+   fields to store the stub type.  */
+
+struct stub_unwind_entry
+  {
+    /* The offset within the executable for the associated stub.  */
+    unsigned stub_offset;
+
+    /* The type of stub this unwind entry describes.  */
+    char type;
+
+    /* Unknown.  Not needed by GDB at this time.  */
+    char prs_info;
+
+    /* Length (in instructions) of the associated stub.  */
+    short stub_length;
+  };
+
+/* Sizes (in bytes) of the native unwind entries.  */
+#define UNWIND_ENTRY_SIZE 16
+#define STUB_UNWIND_ENTRY_SIZE 8
+
+/* The gaps represent linker stubs used in MPE and space for future
+   expansion.  */
+enum unwind_stub_types
+  {
+    LONG_BRANCH = 1,
+    PARAMETER_RELOCATION = 2,
+    EXPORT = 10,
+    IMPORT = 11,
+    IMPORT_SHLIB = 12,
+  };
+
+/* We use the objfile->obj_private pointer for two things:
+
+ * 1.  An unwind table;
+ *
+ * 2.  A pointer to any associated shared library object.
+ *
+ * #defines are used to help refer to these objects.
+ */
+
+/* Info about the unwind table associated with an object file.
+
+ * This is hung off of the "objfile->obj_private" pointer, and
+ * is allocated in the objfile's psymbol obstack.  This allows
+ * us to have unique unwind info for each executable and shared
+ * library that we are debugging.
+ */
+struct obj_unwind_info
+  {
+    struct unwind_table_entry *table;	/* Pointer to unwind info */
+    struct unwind_table_entry *cache;	/* Pointer to last entry we found */
+    int last;			/* Index of last entry */
+  };
+
+typedef struct obj_private_struct
+  {
+    struct obj_unwind_info *unwind_info;	/* a pointer */
+    struct so_list *so_info;	/* a pointer  */
+    CORE_ADDR dp;
+  }
+obj_private_data_t;
+
+#if 0
+extern void target_write_pc (CORE_ADDR, int);
+extern CORE_ADDR target_read_pc (int);
+extern CORE_ADDR skip_trampoline_code (CORE_ADDR, char *);
+#endif
+
+#define TARGET_READ_PC(pid) target_read_pc (pid)
+extern CORE_ADDR target_read_pc (ptid_t);
+
+#define TARGET_WRITE_PC(v,pid) target_write_pc (v,pid)
+extern void target_write_pc (CORE_ADDR, ptid_t);
+
+#define TARGET_READ_FP() target_read_fp (PIDGET (inferior_ptid))
+extern CORE_ADDR target_read_fp (int);
+
+/* For a number of horrible reasons we may have to adjust the location
+   of variables on the stack.  Ugh.  */
+#define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)
+
+extern int hpread_adjust_stack_address (CORE_ADDR);
+
+/* If the current gcc for for this target does not produce correct debugging
+   information for float parameters, both prototyped and unprototyped, then
+   define this macro.  This forces gdb to  always assume that floats are
+   passed as doubles and then converted in the callee.
+
+   For the pa, it appears that the debug info marks the parameters as
+   floats regardless of whether the function is prototyped, but the actual
+   values are passed as doubles for the non-prototyped case and floats for
+   the prototyped case.  Thus we choose to make the non-prototyped case work
+   for C and break the prototyped case, since the non-prototyped case is
+   probably much more common.  (FIXME). */
+
+#define COERCE_FLOAT_TO_DOUBLE(formal, actual) (current_language -> la_language == language_c)
+
+/* Here's how to step off a permanent breakpoint.  */
+#define SKIP_PERMANENT_BREAKPOINT (hppa_skip_permanent_breakpoint)
+extern void hppa_skip_permanent_breakpoint (void);
+
+/* On HP-UX, certain system routines (millicode) have names beginning
+   with $ or $$, e.g. $$dyncall, which handles inter-space procedure
+   calls on PA-RISC.  Tell the expression parser to check for those
+   when parsing tokens that begin with "$".  */
+#define SYMBOLS_CAN_START_WITH_DOLLAR (1)
diff --git a/gdb/config/pa/tm-hppa64.h b/gdb/config/pa/tm-hppa64.h
new file mode 100644
index 00000000000..10fdeede69d
--- /dev/null
+++ b/gdb/config/pa/tm-hppa64.h
@@ -0,0 +1,333 @@
+/* Parameters for execution on any Hewlett-Packard PA-RISC machine.
+   Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1995, 1999, 2000
+   Free Software Foundation, Inc.
+
+   Contributed by the Center for Software Science at the
+   University of Utah (pa-gdb-bugs@cs.utah.edu).
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+/* PA 64-bit specific definitions.  Override those which are in
+   tm-hppa.h */
+
+/* jimb: this must go.  I'm just using it to disable code I haven't
+   gotten working yet.  */
+#define GDB_TARGET_IS_HPPA_20W
+
+#include "pa/tm-hppah.h"
+
+#define HPUX_1100 1
+
+/* The low two bits of the IA are the privilege level of the instruction.  */
+#define ADDR_BITS_REMOVE(addr) ((CORE_ADDR)addr & (CORE_ADDR)~3)
+
+/* Say how long (ordinary) registers are.  This is used in
+   push_word and a few other places, but REGISTER_RAW_SIZE is
+   the real way to know how big a register is.  */
+
+#undef REGISTER_SIZE
+#define REGISTER_SIZE 8
+
+/* Number of bytes of storage in the actual machine representation
+   for register N.  On the PA-RISC 2.0, all regs are 8 bytes, including
+   the FP registers (they're accessed as two 4 byte halves).  */
+
+#undef REGISTER_RAW_SIZE
+#define REGISTER_RAW_SIZE(N) 8
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+
+#undef MAX_REGISTER_RAW_SIZE
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Total amount of space needed to store our copies of the machine's
+   register state, the array `registers'.  */
+
+#undef REGISTER_BYTES
+#define REGISTER_BYTES (NUM_REGS * 8)
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+
+#undef REGISTER_BYTE
+#define REGISTER_BYTE(N) ((N) * 8)
+
+#undef REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+ ((N) < FP4_REGNUM ? builtin_type_unsigned_long_long : builtin_type_double)
+
+
+/* Number of machine registers */
+#undef NUM_REGS
+#define NUM_REGS 96
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.
+   They are in rows of eight entries  */
+#undef REGISTER_NAMES
+#define REGISTER_NAMES	\
+ {"flags",  "r1",      "rp",      "r3",    "r4",     "r5",      "r6",     "r7",    \
+  "r8",     "r9",      "r10",     "r11",   "r12",    "r13",     "r14",    "r15",   \
+  "r16",    "r17",     "r18",     "r19",   "r20",    "r21",     "r22",    "r23",   \
+  "r24",    "r25",     "r26",     "dp",    "ret0",   "ret1",    "sp",     "r31",   \
+  "sar",    "pcoqh",   "pcsqh",   "pcoqt", "pcsqt",  "eiem",    "iir",    "isr",   \
+  "ior",    "ipsw",    "goto",    "sr4",   "sr0",    "sr1",     "sr2",    "sr3",   \
+  "sr5",    "sr6",     "sr7",     "cr0",   "cr8",    "cr9",     "ccr",    "cr12",  \
+  "cr13",   "cr24",    "cr25",    "cr26",  "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",\
+  "fpsr",    "fpe1",   "fpe2",    "fpe3",  "fr4",    "fr5",     "fr6",    "fr7", \
+  "fr8",     "fr9",    "fr10",    "fr11",  "fr12",   "fr13",    "fr14",   "fr15", \
+  "fr16",    "fr17",   "fr18",    "fr19",  "fr20",   "fr21",    "fr22",   "fr23", \
+  "fr24",    "fr25",   "fr26",    "fr27",   "fr28",  "fr29",    "fr30",   "fr31"}
+
+#undef FP0_REGNUM
+#undef FP4_REGNUM
+#define FP0_REGNUM 64		/* floating point reg. 0 (fspr)*/
+#define FP4_REGNUM 68
+
+/* Redefine some target bit sizes from the default.  */
+
+/* Number of bits in a long or unsigned long for the target machine. */
+
+#define TARGET_LONG_BIT 64
+
+/* Number of bits in a long long or unsigned long long for the 
+   target machine.  */
+
+#define TARGET_LONG_LONG_BIT 64
+
+/* Number of bits in a pointer for the target machine */
+
+#define TARGET_PTR_BIT 64
+
+/* Argument Pointer Register */
+#define AP_REGNUM 29
+
+#define DP_REGNUM 27
+
+#define FP5_REGNUM 70
+
+#define SR5_REGNUM 48
+
+#undef FRAME_ARGS_ADDRESS
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->ap)
+
+/* We access locals from SP. This may not work for frames which call
+   alloca; for those, we may need to consult unwind tables.
+   jimb: FIXME.  */
+#undef FRAME_LOCALS_ADDRESS
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+#define INIT_FRAME_AP init_frame_ap
+  
+#define EXTRA_FRAME_INFO  \
+  CORE_ADDR ap;
+
+/* For a number of horrible reasons we may have to adjust the location
+   of variables on the stack.  Ugh.  jimb: why? */
+#define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)
+
+extern int hpread_adjust_stack_address (CORE_ADDR);
+
+
+/* jimb: omitted dynamic linking stuff here */
+
+/* This sequence of words is the instructions
+
+; Call stack frame has already been built by gdb. Since we could be calling
+; a varargs function, and we do not have the benefit of a stub to put things in
+; the right place, we load the first 8 word of arguments into both the general
+; and fp registers.
+call_dummy
+	nop
+        copy %r4,%r29
+        copy %r5,%r22
+        copy %r6,%r27
+        fldd -64(0,%r29),%fr4
+        fldd -56(0,%r29),%fr5
+        fldd -48(0,%r29),%fr6
+        fldd -40(0,%r29),%fr7
+        fldd -32(0,%r29),%fr8
+        fldd -24(0,%r29),%fr9
+        fldd -16(0,%r29),%fr10
+        fldd -8(0,%r29),%fr11
+        copy %r22,%r1
+        ldd -64(%r29), %r26
+        ldd -56(%r29), %r25
+        ldd -48(%r29), %r24
+        ldd -40(%r29), %r23
+        ldd -32(%r29), %r22
+        ldd -24(%r29), %r21
+        ldd -16(%r29), %r20
+        bve,l (%r1),%r2
+        ldd -8(%r29), %r19
+        break 4, 8
+	mtsp %r21, %sr0
+	ble 0(%sr0, %r22)
+        nop
+*/
+
+/* Call dummys are sized and written out in word sized hunks.  So we have
+   to pack the instructions into words.  Ugh.  */
+#undef CALL_DUMMY
+#define CALL_DUMMY {0x08000240349d0000LL, 0x34b6000034db0000LL, \
+                    0x53a43f8353a53f93LL, 0x53a63fa353a73fb3LL,\
+                    0x53a83fc353a93fd3LL, 0x2fa1100a2fb1100bLL,\
+                    0x36c1000053ba3f81LL, 0x53b93f9153b83fa1LL,\
+                    0x53b73fb153b63fc1LL, 0x53b53fd10fa110d4LL,\
+                    0xe820f0000fb110d3LL, 0x0001000400151820LL,\
+                    0xe6c0000008000240LL}
+
+#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
+#define CALL_DUMMY_BREAKPOINT_OFFSET 22 * 4
+
+/* CALL_DUMMY_LENGTH is computed based on the size of a word on the target
+   machine, not the size of an instruction.  Since a word on this target
+   holds two instructions we have to divide the instruction size by two to
+   get the word size of the dummy.  */
+#undef CALL_DUMMY_LENGTH
+#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 26 / 2)
+
+/* The PA64 ABI mandates a 16 byte stack alignment.  */
+#undef STACK_ALIGN
+#define STACK_ALIGN(arg) ( ((arg)%16) ? (((arg)+15)&-16) : (arg))
+
+/* The PA64 ABI reserves 64 bytes of stack space for outgoing register
+   parameters.  */
+#undef REG_PARM_STACK_SPACE
+#define REG_PARM_STACK_SPACE 64
+
+/* Use the 64-bit calling conventions designed for the PA2.0 in wide mode.  */
+#define PA20W_CALLING_CONVENTIONS
+
+#undef FUNC_LDIL_OFFSET
+#undef FUNC_LDO_OFFSET
+#undef SR4EXPORT_LDIL_OFFSET
+#undef SR4EXPORT_LDO_OFFSET
+#undef CALL_DUMMY_LOCATION
+
+#undef REG_STRUCT_HAS_ADDR
+
+#undef EXTRACT_RETURN_VALUE
+/* RM: floats are returned in FR4R, doubles in FR4
+ *     integral values are in r28, padded on the left 
+ *     aggregates less that 65 bits are in r28, right padded 
+ *     aggregates upto 128 bits are in r28 and r29, right padded
+ */ 
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+  { \
+    if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
+      memcpy ((VALBUF), \
+	      ((char *)(REGBUF)) + REGISTER_BYTE (FP4_REGNUM) + \
+              (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
+	      TYPE_LENGTH (TYPE)); \
+    else if  (is_integral_type(TYPE) || SOFT_FLOAT)   \
+       memcpy ((VALBUF), \
+               (char *)(REGBUF) + REGISTER_BYTE (28) + \
+               (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
+               TYPE_LENGTH (TYPE)); \
+    else if (TYPE_LENGTH (TYPE) <= 8)   \
+       memcpy ((VALBUF), \
+               (char *)(REGBUF) + REGISTER_BYTE (28), \
+               TYPE_LENGTH (TYPE)); \
+    else if (TYPE_LENGTH (TYPE) <= 16)   \
+      { \
+        memcpy ((VALBUF), \
+                (char *)(REGBUF) + REGISTER_BYTE (28), \
+                8); \
+        memcpy (((char *) VALBUF + 8), \
+                (char *)(REGBUF) + REGISTER_BYTE (29), \
+                TYPE_LENGTH (TYPE) - 8); \
+       } \
+  }
+
+/* RM: struct upto 128 bits are returned in registers */
+#undef USE_STRUCT_CONVENTION
+#define USE_STRUCT_CONVENTION(gcc_p, value_type)\
+  (TYPE_LENGTH (value_type) > 16)                
+
+/* RM: for return command */
+#undef STORE_RETURN_VALUE
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+  { \
+    if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
+      write_register_bytes \
+	      (REGISTER_BYTE (FP4_REGNUM) + \
+              (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
+              (VALBUF), \
+	      TYPE_LENGTH (TYPE)); \
+    else if (is_integral_type(TYPE) || SOFT_FLOAT)   \
+       write_register_bytes \
+              (REGISTER_BYTE (28) + \
+                 (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
+               (VALBUF), \
+               TYPE_LENGTH (TYPE)); \
+    else if (TYPE_LENGTH (TYPE) <= 8)   \
+       write_register_bytes \
+             ( REGISTER_BYTE (28), \
+               (VALBUF), \
+               TYPE_LENGTH (TYPE)); \
+    else if (TYPE_LENGTH (TYPE) <= 16)   \
+      { \
+        write_register_bytes \
+               (REGISTER_BYTE (28), \
+                (VALBUF), \
+                8); \
+        write_register_bytes \
+               (REGISTER_BYTE (29), \
+                ((char *) VALBUF + 8), \
+                TYPE_LENGTH (TYPE) - 8); \
+       } \
+  }
+
+/* RM: these are the PA64 equivalents of the macros in tm-hppah.h --
+ * see comments there.  For PA64, the save_state structure is at an
+ * offset of 24 32-bit words from the sigcontext structure. The 64 bit
+ * general registers are at an offset of 640 bytes from the beginning of the
+ * save_state structure, and the floating pointer register are at an offset
+ * of 256 bytes from the beginning of the save_state structure.
+ */
+#undef FRAME_SAVED_PC_IN_SIGTRAMP
+#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
+{ \
+  *(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (33 * 8), 8); \
+}
+
+#undef FRAME_BASE_BEFORE_SIGTRAMP
+#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
+{ \
+  *(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (30 * 8), 8); \
+}
+
+#undef FRAME_FIND_SAVED_REGS_IN_SIGTRAMP
+#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
+{ \
+  int i; \
+  CORE_ADDR TMP1, TMP2; \
+  TMP1 = (FRAME)->frame + (24 * 4) + 640; \
+  TMP2 = (FRAME)->frame + (24 * 4) + 256; \
+  for (i = 0; i < NUM_REGS; i++) \
+    { \
+      if (i == SP_REGNUM) \
+        (FSR)->regs[SP_REGNUM] = read_memory_integer (TMP1 + SP_REGNUM * 8, 8); \
+      else if (i >= FP0_REGNUM) \
+        (FSR)->regs[i] = TMP2 + (i - FP0_REGNUM) * 8; \
+      else \
+        (FSR)->regs[i] = TMP1 + i * 8; \
+    } \
+}
+
+/* jimb: omitted purify call support */
diff --git a/gdb/config/pa/tm-hppab.h b/gdb/config/pa/tm-hppab.h
new file mode 100644
index 00000000000..1cd438df75e
--- /dev/null
+++ b/gdb/config/pa/tm-hppab.h
@@ -0,0 +1,47 @@
+/* Parameters for execution on an HP PA-RISC machine running BSD, for GDB.
+   Contributed by the Center for Software Science at the
+   University of Utah (pa-gdb-bugs@cs.utah.edu).  */
+
+/* For BSD:
+
+   The signal context structure pointer is always saved at the base
+   of the frame + 0x4.
+
+   We get the PC & SP directly from the sigcontext structure itself.
+   For other registers we have to dive in a little deeper: 
+
+   The hardware save state pointer is at offset 0x10 within the 
+   signal context structure.
+
+   Within the hardware save state, registers are found in the same order
+   as the register numbers in GDB. */
+
+#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
+{ \
+  *(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \
+  *(TMP) = read_memory_integer (*(TMP) + 0x18, 4); \
+}
+
+#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
+{ \
+  *(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \
+  *(TMP) = read_memory_integer (*(TMP) + 0x8, 4); \
+}
+
+#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
+{ \
+  int i; \
+  CORE_ADDR TMP; \
+  TMP = read_memory_integer ((FRAME)->frame + 0x4, 4); \
+  TMP = read_memory_integer (TMP + 0x10, 4); \
+  for (i = 0; i < NUM_REGS; i++) \
+    { \
+      if (i == SP_REGNUM) \
+	(FSR)->regs[SP_REGNUM] = read_memory_integer (TMP + SP_REGNUM * 4, 4); \
+      else \
+	(FSR)->regs[i] = TMP + i * 4; \
+    } \
+}
+
+/* It's mostly just the common stuff.  */
+#include "pa/tm-hppa.h"
diff --git a/gdb/config/pa/tm-hppah.h b/gdb/config/pa/tm-hppah.h
new file mode 100644
index 00000000000..022e1249d7a
--- /dev/null
+++ b/gdb/config/pa/tm-hppah.h
@@ -0,0 +1,90 @@
+/* Parameters for execution on an HP PA-RISC machine, running HPUX, for GDB.
+   Copyright 1991, 1992, 1995, 1998 Free Software Foundation, Inc.
+
+   Contributed by the Center for Software Science at the
+   University of Utah (pa-gdb-bugs@cs.utah.edu).
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define HPUX_SNAP1
+#define HPUX_SNAP2
+
+/* The solib hooks are not really designed to have a list of hook
+   and handler routines.  So until we clean up those interfaces you
+   either get SOM shared libraries or HP's unusual PA64 ELF shared
+   libraries, but not both.  */
+#ifdef GDB_TARGET_IS_HPPA_20W
+#include "pa64solib.h"
+#endif
+
+#ifndef GDB_TARGET_IS_HPPA_20W
+#include "somsolib.h"
+#endif
+
+/* Actually, for a PA running HPUX the kernel calls the signal handler
+   without an intermediate trampoline.  Luckily the kernel always sets
+   the return pointer for the signal handler to point to _sigreturn.  */
+#define IN_SIGTRAMP(pc, name) (name && STREQ ("_sigreturn", name))
+
+/* For HPUX:
+
+   The signal context structure pointer is always saved at the base
+   of the frame which "calls" the signal handler.  We only want to find
+   the hardware save state structure, which lives 10 32bit words into
+   sigcontext structure.
+
+   Within the hardware save state structure, registers are found in the
+   same order as the register numbers in GDB.
+
+   At one time we peeked at %r31 rather than the PC queues to determine
+   what instruction took the fault.  This was done on purpose, but I don't
+   remember why.  Looking at the PC queues is really the right way, and
+   I don't remember why that didn't work when this code was originally
+   written.  */
+
+#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
+{ \
+  *(TMP) = read_memory_integer ((FRAME)->frame + (43 * 4) , 4); \
+}
+
+#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
+{ \
+  *(TMP) = read_memory_integer ((FRAME)->frame + (40 * 4), 4); \
+}
+
+#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
+{ \
+  int i; \
+  CORE_ADDR TMP; \
+  TMP = (FRAME)->frame + (10 * 4); \
+  for (i = 0; i < NUM_REGS; i++) \
+    { \
+      if (i == SP_REGNUM) \
+	(FSR)->regs[SP_REGNUM] = read_memory_integer (TMP + SP_REGNUM * 4, 4); \
+      else \
+	(FSR)->regs[i] = TMP + i * 4; \
+    } \
+}
+
+/* For HP-UX on PA-RISC we have an implementation
+   for the exception handling target op (in hppa-tdep.c) */
+#define CHILD_ENABLE_EXCEPTION_CALLBACK
+#define CHILD_GET_CURRENT_EXCEPTION_EVENT
+
+/* Mostly it's common to all HPPA's.  */
+#include "pa/tm-hppa.h"
diff --git a/gdb/config/pa/tm-hppao.h b/gdb/config/pa/tm-hppao.h
new file mode 100644
index 00000000000..e6fae89b85b
--- /dev/null
+++ b/gdb/config/pa/tm-hppao.h
@@ -0,0 +1,98 @@
+/* Parameters for execution on an HP PA-RISC machine running OSF1, for GDB.
+   Contributed by the Center for Software Science at the
+   University of Utah (pa-gdb-bugs@cs.utah.edu).  */
+
+#include "regcache.h"
+
+/* Define offsets to access CPROC stack when it does not have
+ * a kernel thread.
+ */
+#define MACHINE_CPROC_SP_OFFSET 20
+#define MACHINE_CPROC_PC_OFFSET 16
+#define MACHINE_CPROC_FP_OFFSET 12
+
+/*
+ * Software defined PSW masks.
+ */
+#define PSW_SS  0x10000000	/* Kernel managed single step */
+
+/* Thread flavors used in re-setting the T bit.
+ * @@ this is also bad for cross debugging.
+ */
+#define TRACE_FLAVOR		HP800_THREAD_STATE
+#define TRACE_FLAVOR_SIZE	HP800_THREAD_STATE_COUNT
+#define TRACE_SET(x,state) \
+	((struct hp800_thread_state *)state)->cr22 |= PSW_SS
+#define TRACE_CLEAR(x,state) \
+  	((((struct hp800_thread_state *)state)->cr22 &= ~PSW_SS), 1)
+
+/* For OSF1 (Should be close if not identical to BSD, but I haven't
+   tested it yet):
+
+   The signal context structure pointer is always saved at the base
+   of the frame + 0x4.
+
+   We get the PC & SP directly from the sigcontext structure itself.
+   For other registers we have to dive in a little deeper: 
+
+   The hardware save state pointer is at offset 0x10 within the 
+   signal context structure.
+
+   Within the hardware save state, registers are found in the same order
+   as the register numbers in GDB. */
+
+#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
+{ \
+  *(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \
+  *(TMP) = read_memory_integer (*(TMP) + 0x18, 4); \
+}
+
+#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
+{ \
+  *(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \
+  *(TMP) = read_memory_integer (*(TMP) + 0x8, 4); \
+}
+
+#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
+{ \
+  int i; \
+  CORE_ADDR TMP; \
+  TMP = read_memory_integer ((FRAME)->frame + 0x4, 4); \
+  TMP = read_memory_integer (TMP + 0x10, 4); \
+  for (i = 0; i < NUM_REGS; i++) \
+    { \
+      if (i == SP_REGNUM) \
+	(FSR)->regs[SP_REGNUM] = read_memory_integer (TMP + SP_REGNUM * 4, 4); \
+      else \
+	(FSR)->regs[i] = TMP + i * 4; \
+    } \
+}
+
+/* OSF1 does not need the pc space queue restored.  */
+#define NO_PC_SPACE_QUEUE_RESTORE
+
+/* The mach kernel uses the recovery counter to implement single
+   stepping.  While this greatly simplifies the kernel support
+   necessary for single stepping, it unfortunately does the wrong
+   thing in the presense of a nullified instruction (gives control
+   back two insns after the nullifed insn).  This is an artifact
+   of the HP architecture (recovery counter doesn't tick for
+   nullified insns).
+
+   Do our best to avoid losing in such situations.  */
+#define INSTRUCTION_NULLIFIED \
+(({ \
+    int ipsw = (int)read_register(IPSW_REGNUM); \
+    if (ipsw & PSW_N)  \
+      { \
+        int pcoqt = (int)read_register(PCOQ_TAIL_REGNUM); \
+        write_register(PCOQ_HEAD_REGNUM, pcoqt); \
+        write_register(PCOQ_TAIL_REGNUM, pcoqt + 0x4); \
+        write_register(IPSW_REGNUM, ipsw & ~(PSW_N | PSW_B | PSW_X)); \
+        stop_pc = pcoqt; \
+      } \
+   }), 0)
+
+/* It's mostly just the common stuff.  */
+
+#include "pa/tm-hppa.h"
diff --git a/gdb/config/pa/tm-pro.h b/gdb/config/pa/tm-pro.h
new file mode 100644
index 00000000000..05ecb62f7dc
--- /dev/null
+++ b/gdb/config/pa/tm-pro.h
@@ -0,0 +1,14 @@
+/* Parameters for execution on an HP PA-RISC level 0 embedded system.
+   This is based on tm-hppab.h.
+   Contributed by the Center for Software Science at the
+   University of Utah (pa-gdb-bugs@cs.utah.edu).  */
+
+#define PA_LEVEL_0		/* Disables touching space regs and fp */
+
+/* All the PRO targets use software floating point at the moment.  */
+#define SOFT_FLOAT 1
+
+/* It's mostly just the common stuff.  */
+#include "pa/tm-hppa.h"
+
+#define GDB_TARGET_IS_PA_ELF
diff --git a/gdb/config/pa/xm-hppab.h b/gdb/config/pa/xm-hppab.h
new file mode 100644
index 00000000000..d2561dfcf69
--- /dev/null
+++ b/gdb/config/pa/xm-hppab.h
@@ -0,0 +1,24 @@
+/* Parameters for hosting on an HPPA PA-RISC machine, running BSD, for GDB.
+   Copyright 1991, 1992, 1993, 1996, 1998 Free Software Foundation, Inc.
+
+   Contributed by the Center for Software Science at the
+   University of Utah (pa-gdb-bugs@cs.utah.edu).
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "pa/xm-pa.h"
diff --git a/gdb/config/pa/xm-hppah.h b/gdb/config/pa/xm-hppah.h
new file mode 100644
index 00000000000..b1c26dd4de8
--- /dev/null
+++ b/gdb/config/pa/xm-hppah.h
@@ -0,0 +1,29 @@
+/* Parameters for hosting on an HPPA-RISC machine running HPUX, for GDB.
+   Copyright 1991, 1992, 1993, 1995, 1996, 2000
+   Free Software Foundation, Inc.
+
+   Contributed by the Center for Software Science at the
+   University of Utah (pa-gdb-bugs@cs.utah.edu).
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "pa/xm-pa.h"
+
+#define USG
+
+#define HAVE_TERMIOS
diff --git a/gdb/config/pa/xm-pa.h b/gdb/config/pa/xm-pa.h
new file mode 100644
index 00000000000..979609d4776
--- /dev/null
+++ b/gdb/config/pa/xm-pa.h
@@ -0,0 +1,5 @@
+/* Definitions for all PA machines.  */
+
+/* This was created for "makeva", which is obsolete.  This file can
+   probably go away (unless someone can think of some other host thing
+   which is common to various pa machines).  */
diff --git a/gdb/config/powerpc/aix.mh b/gdb/config/powerpc/aix.mh
new file mode 100644
index 00000000000..d0913b70289
--- /dev/null
+++ b/gdb/config/powerpc/aix.mh
@@ -0,0 +1,16 @@
+# Host: IBM PowerPC running AIX
+
+XM_FILE= xm-aix.h
+
+NAT_FILE= nm-aix.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o rs6000-nat.o \
+	     xcoffread.o xcoffsolib.o
+
+# When compiled with cc, for debugging, this argument should be passed.
+# We have no idea who our current compiler is though, so we skip it.
+# MH_CFLAGS = -bnodelcsect
+
+# gdb is too big for all of its external symbols to fit in a small TOC
+# It looks like the GNU linker doesn't understand the -bbigtoc switch.
+# This switch may be needed for some vendor compilers.
+# MH_LDFLAGS = -Wl,-bbigtoc
diff --git a/gdb/config/powerpc/aix.mt b/gdb/config/powerpc/aix.mt
new file mode 100644
index 00000000000..706129ae2c7
--- /dev/null
+++ b/gdb/config/powerpc/aix.mt
@@ -0,0 +1,3 @@
+# Target: PowerPC running AIX
+TDEPFILES= rs6000-tdep.o xcoffread.o ppc-linux-tdep.o solib.o solib-svr4.o
+TM_FILE= tm-ppc-aix.h
diff --git a/gdb/config/powerpc/gdbserve.mt b/gdb/config/powerpc/gdbserve.mt
new file mode 100644
index 00000000000..77284077db6
--- /dev/null
+++ b/gdb/config/powerpc/gdbserve.mt
@@ -0,0 +1,3 @@
+# Target: GDBSERVE.NLM running on a Power-PC
+TDEPFILES= ppc.o 
+CPU_FILE= ppc
diff --git a/gdb/config/powerpc/linux.mh b/gdb/config/powerpc/linux.mh
new file mode 100644
index 00000000000..0e3c2a68feb
--- /dev/null
+++ b/gdb/config/powerpc/linux.mh
@@ -0,0 +1,13 @@
+# Host: PowerPC, running Linux
+
+XM_FILE= xm-linux.h
+XM_CLIBS=
+
+NAT_FILE= nm-linux.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o linux-proc.o \
+	core-regset.o ppc-linux-nat.o proc-service.o thread-db.o lin-lwp.o \
+	gcore.o
+
+LOADLIBES = -ldl -rdynamic
+
+GDBSERVER_DEPFILES = linux-low.o linux-ppc-low.o reg-ppc.o
diff --git a/gdb/config/powerpc/linux.mt b/gdb/config/powerpc/linux.mt
new file mode 100644
index 00000000000..01160b98704
--- /dev/null
+++ b/gdb/config/powerpc/linux.mt
@@ -0,0 +1,6 @@
+# Target: Motorola PPC on Linux
+TDEPFILES= rs6000-tdep.o ppc-linux-tdep.o solib.o solib-svr4.o solib-legacy.o
+TM_FILE= tm-linux.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/ppc/libsim.a
diff --git a/gdb/config/powerpc/nbsd.mh b/gdb/config/powerpc/nbsd.mh
new file mode 100644
index 00000000000..9d29986d996
--- /dev/null
+++ b/gdb/config/powerpc/nbsd.mh
@@ -0,0 +1,3 @@
+# Host: PowerPC, running NetBSD
+NATDEPFILES= fork-child.o infptrace.o inftarg.o ppcnbsd-nat.o solib-legacy.o
+NAT_FILE= nm-nbsd.h
diff --git a/gdb/config/powerpc/nbsd.mt b/gdb/config/powerpc/nbsd.mt
new file mode 100644
index 00000000000..cbf559b658d
--- /dev/null
+++ b/gdb/config/powerpc/nbsd.mt
@@ -0,0 +1,7 @@
+# Target: PowerPC, running NetBSD
+TDEPFILES= rs6000-tdep.o ppcnbsd-tdep.o nbsd-tdep.o ppc-linux-tdep.o corelow.o \
+	solib.o solib-svr4.o
+TM_FILE= tm-nbsd.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/ppc/libsim.a
diff --git a/gdb/config/powerpc/nm-aix.h b/gdb/config/powerpc/nm-aix.h
new file mode 100644
index 00000000000..8c8a939cca2
--- /dev/null
+++ b/gdb/config/powerpc/nm-aix.h
@@ -0,0 +1,23 @@
+/* IBM PowerPC native-dependent macros for GDB, the GNU debugger.
+   Copyright 1995, 1996 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "rs6000/nm-rs6000.h"
+
+#define PTRACE_ARG3_TYPE int*
diff --git a/gdb/config/powerpc/nm-linux.h b/gdb/config/powerpc/nm-linux.h
new file mode 100644
index 00000000000..dee39b4efaf
--- /dev/null
+++ b/gdb/config/powerpc/nm-linux.h
@@ -0,0 +1,33 @@
+/* IBM PowerPC native-dependent macros for GDB, the GNU debugger.
+   Copyright 1995, 2000 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#ifndef NM_LINUX_H
+
+#include "nm-linux.h"
+
+#define NM_LINUX_H
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size (void);
+
+#define FETCH_INFERIOR_REGISTERS
+
+#endif /* #ifndef NM_LINUX_H */
diff --git a/gdb/config/powerpc/nm-nbsd.h b/gdb/config/powerpc/nm-nbsd.h
new file mode 100644
index 00000000000..5de6c9a0d21
--- /dev/null
+++ b/gdb/config/powerpc/nm-nbsd.h
@@ -0,0 +1,27 @@
+/* Native-dependent definitions for PowerPC running NetBSD ELF, for GDB.
+   Copyright 2000, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSD_H
+#define NM_NBSD_H
+
+/* Get generic NetBSD native definitions. */
+#include "config/nm-nbsd.h"
+
+#endif
diff --git a/gdb/config/powerpc/ppc-eabi.mt b/gdb/config/powerpc/ppc-eabi.mt
new file mode 100644
index 00000000000..2d4a77fcdef
--- /dev/null
+++ b/gdb/config/powerpc/ppc-eabi.mt
@@ -0,0 +1,3 @@
+# Target: PowerPC running eabi
+TDEPFILES= rs6000-tdep.o monitor.o dsrec.o ppcbug-rom.o dink32-rom.o ppc-bdm.o ocd.o remote-sds.o ppc-linux-tdep.o solib.o solib-svr4.o
+TM_FILE= tm-ppc-eabi.h
diff --git a/gdb/config/powerpc/ppc-sim.mt b/gdb/config/powerpc/ppc-sim.mt
new file mode 100644
index 00000000000..f2ad1f0b2c4
--- /dev/null
+++ b/gdb/config/powerpc/ppc-sim.mt
@@ -0,0 +1,6 @@
+# Target: PowerPC running eabi and including the simulator
+TDEPFILES= rs6000-tdep.o monitor.o dsrec.o ppcbug-rom.o dink32-rom.o ppc-bdm.o ocd.o remote-sds.o ppc-linux-tdep.o solib.o solib-svr4.o
+TM_FILE= tm-ppc-eabi.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/ppc/libsim.a
diff --git a/gdb/config/powerpc/ppcle-eabi.mt b/gdb/config/powerpc/ppcle-eabi.mt
new file mode 100644
index 00000000000..e7480975730
--- /dev/null
+++ b/gdb/config/powerpc/ppcle-eabi.mt
@@ -0,0 +1,3 @@
+# Target: PowerPC running eabi in little endian mode
+TDEPFILES= rs6000-tdep.o monitor.o dsrec.o ppcbug-rom.o ppc-bdm.o ocd.o ppc-linux-tdep.o solib.o solib-svr4.o
+TM_FILE= tm-ppcle-eabi.h
diff --git a/gdb/config/powerpc/ppcle-sim.mt b/gdb/config/powerpc/ppcle-sim.mt
new file mode 100644
index 00000000000..558c0dc885e
--- /dev/null
+++ b/gdb/config/powerpc/ppcle-sim.mt
@@ -0,0 +1,6 @@
+# Target: PowerPC running eabi in little endian mode under the simulator
+TDEPFILES= rs6000-tdep.o monitor.o dsrec.o ppcbug-rom.o ppc-bdm.o ocd.o ppc-linux-tdep.o solib.o solib-svr4.o
+TM_FILE= tm-ppcle-eabi.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/ppc/libsim.a
diff --git a/gdb/config/powerpc/tm-linux.h b/gdb/config/powerpc/tm-linux.h
new file mode 100644
index 00000000000..5fe8d76bce0
--- /dev/null
+++ b/gdb/config/powerpc/tm-linux.h
@@ -0,0 +1,70 @@
+/* Definitions to target GDB to GNU/Linux on PowerPC.
+
+   Copyright 1992, 1993, 2000, 2002 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_LINUX_H
+#define TM_LINUX_H
+
+#include "powerpc/tm-ppc-eabi.h"
+/* Avoid warning from redefinition in tm-sysv4.h (included from tm-linux.h) */
+#undef SKIP_TRAMPOLINE_CODE
+#include "tm-linux.h"
+
+/* We can single step on linux */
+#undef  SOFTWARE_SINGLE_STEP
+#define SOFTWARE_SINGLE_STEP(p,q) internal_error (__FILE__, __LINE__, "Will never execute!")
+#undef  SOFTWARE_SINGLE_STEP_P
+#define SOFTWARE_SINGLE_STEP_P() 0
+
+/* Make sure nexti gets the help it needs for debugging assembly code
+   without symbols */
+
+#define AT_SUBROUTINE_CALL_INSTRUCTION_TARGET(prevpc,stoppc) \
+   at_subroutine_call_instruction_target(prevpc,stoppc)
+extern int at_subroutine_call_instruction_target();
+
+/* We _want_ the SVR4 section offset calculations (see syms_from_objfile()
+   in symfile.c) */
+#undef IBM6000_TARGET
+
+extern CORE_ADDR ppc_linux_skip_trampoline_code (CORE_ADDR pc);
+#undef SKIP_TRAMPOLINE_CODE
+#define	SKIP_TRAMPOLINE_CODE(pc) ppc_linux_skip_trampoline_code (pc)
+
+extern int ppc_linux_in_sigtramp (CORE_ADDR pc, char *func_name);
+#undef IN_SIGTRAMP
+#define IN_SIGTRAMP(pc,func_name) ppc_linux_in_sigtramp (pc,func_name)
+
+#if 0
+#define CANNOT_FETCH_REGISTER(regno) ((regno) >= MQ_REGNUM)
+#define CANNOT_STORE_REGISTER(regno) ((regno) >= MQ_REGNUM)
+#endif
+
+#if 0 /* If skip_prologue() isn't too greedy, we don't need this */
+/* There is some problem with the debugging symbols generated by the
+   compiler such that the debugging symbol for the first line of a
+   function overlap with the function prologue.  */
+#define PROLOGUE_FIRSTLINE_OVERLAP
+#endif
+
+/* N_FUN symbols in shared libaries have 0 for their values and need
+   to be relocated. */
+#define SOFUN_ADDRESS_MAYBE_MISSING
+
+#endif  /* #ifndef TM_LINUX_H */
diff --git a/gdb/config/powerpc/tm-nbsd.h b/gdb/config/powerpc/tm-nbsd.h
new file mode 100644
index 00000000000..2b7acb8b4b8
--- /dev/null
+++ b/gdb/config/powerpc/tm-nbsd.h
@@ -0,0 +1,26 @@
+/* Macro definitions for PowerPC running under NetBSD.
+   Copyright 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_NBSD_H
+#define TM_NBSD_H
+
+#include "powerpc/tm-ppc-eabi.h"
+
+#endif /* TM_NBSD_H */
diff --git a/gdb/config/powerpc/tm-ppc-aix.h b/gdb/config/powerpc/tm-ppc-aix.h
new file mode 100644
index 00000000000..03809c9e696
--- /dev/null
+++ b/gdb/config/powerpc/tm-ppc-aix.h
@@ -0,0 +1,27 @@
+/* Macro definitions for Power PC running AIX.
+   Copyright 1995, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_PPC_AIX_H
+#define TM_PPC_AIX_H
+
+/* Use generic RS6000 definitions. */
+#include "rs6000/tm-rs6000.h"
+
+#endif /* TM_PPC_AIX_H */
diff --git a/gdb/config/powerpc/tm-ppc-eabi.h b/gdb/config/powerpc/tm-ppc-eabi.h
new file mode 100644
index 00000000000..e49b2bd0c97
--- /dev/null
+++ b/gdb/config/powerpc/tm-ppc-eabi.h
@@ -0,0 +1,43 @@
+/* Macro definitions for Power PC running embedded ABI.
+   Copyright 1995, 1996, 1997, 1998, 1999, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_PPC_EABI_H
+#define TM_PPC_EABI_H
+
+/* Use generic RS6000 definitions. */
+#include "rs6000/tm-rs6000.h"
+/* except we want to allow single stepping */
+#undef SOFTWARE_SINGLE_STEP_P
+#define SOFTWARE_SINGLE_STEP_P() 0
+
+#undef PROCESS_LINENUMBER_HOOK
+
+#undef TEXT_SEGMENT_BASE
+#define TEXT_SEGMENT_BASE 1
+
+/* The value of symbols of type N_SO and N_FUN maybe null when 
+   it shouldn't be. */
+#define SOFUN_ADDRESS_MAYBE_MISSING
+
+/* Use generic shared library machinery.  */
+#include "solib.h"
+
+#endif /* TM_PPC_EABI_H */
diff --git a/gdb/config/powerpc/tm-ppc-sim.h b/gdb/config/powerpc/tm-ppc-sim.h
new file mode 100644
index 00000000000..9fa11861e1a
--- /dev/null
+++ b/gdb/config/powerpc/tm-ppc-sim.h
@@ -0,0 +1,26 @@
+/* Macro definitions for Power PC running embedded ABI under the simulator.
+   Copyright 1995 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_PPC_SIM_H
+#define TM_PPC_SIM_H
+
+#include "powerpc/tm-ppc-eabi.h"
+
+#endif /* TM_PPC_SIM_H */
diff --git a/gdb/config/powerpc/tm-ppcle-eabi.h b/gdb/config/powerpc/tm-ppcle-eabi.h
new file mode 100644
index 00000000000..cc4c752e396
--- /dev/null
+++ b/gdb/config/powerpc/tm-ppcle-eabi.h
@@ -0,0 +1,28 @@
+/* Macro definitions for Power PC running embedded ABI
+   in little endian mode.
+   Copyright 1995, 1998 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_PPCLE_EABI_H
+#define TM_PPCLE_EABI_H
+
+/* Use normal ppc-eabi definitions */
+#include "powerpc/tm-ppc-eabi.h"
+
+#endif /* TM_PPCLE_EABI_H */
diff --git a/gdb/config/powerpc/tm-ppcle-sim.h b/gdb/config/powerpc/tm-ppcle-sim.h
new file mode 100644
index 00000000000..02707f40019
--- /dev/null
+++ b/gdb/config/powerpc/tm-ppcle-sim.h
@@ -0,0 +1,26 @@
+/* Macro definitions for Power PC running embedded ABI under the simulator.
+   Copyright 1995 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_PPCLE_SIM_H
+#define TM_PPCLE_SIM_H
+
+#include "powerpc/tm-ppcle-eabi.h"
+
+#endif /* TM_PPCLE_SIM_H */
diff --git a/gdb/config/powerpc/tm-vxworks.h b/gdb/config/powerpc/tm-vxworks.h
new file mode 100644
index 00000000000..a31846a802f
--- /dev/null
+++ b/gdb/config/powerpc/tm-vxworks.h
@@ -0,0 +1,28 @@
+/* Target machine description for VxWorks on the PowerPC, 
+   for GDB, the GNU debugger.
+   Copyright 1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_VXWORKS_H
+#define TM_VXWORKS_H
+
+#include "powerpc/tm-ppc-eabi.h"
+#include "tm-vxworks.h"
+
+#endif /* ifndef TM_VXWORKS_H */
diff --git a/gdb/config/powerpc/vxworks.mt b/gdb/config/powerpc/vxworks.mt
new file mode 100644
index 00000000000..ba6e17bcb1c
--- /dev/null
+++ b/gdb/config/powerpc/vxworks.mt
@@ -0,0 +1,3 @@
+# Target: Powerpc running VxWorks
+TDEPFILES= rs6000-tdep.o ppc-linux-tdep.o solib.o solib-svr4.o
+TM_FILE= tm-vxworks.h
diff --git a/gdb/config/powerpc/xm-aix.h b/gdb/config/powerpc/xm-aix.h
new file mode 100644
index 00000000000..cc986502b77
--- /dev/null
+++ b/gdb/config/powerpc/xm-aix.h
@@ -0,0 +1,31 @@
+/* Parameters for hosting on an PowerPC, for GDB, the GNU debugger.
+   Copyright 1995, 1996, 2000 Free Software Foundation, Inc.
+   Contributed by Cygnus Corporation.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "xm-aix4.h"
+
+/* This doesn't seem to be declared in any header file I can find.  */
+char *termdef (int, int);
+
+/* UINT_MAX is defined in <sys/limits.h> as a decimal constant (4294967295)
+   which is too large to fit in a signed int when it is parsed by the
+   compiler, so it issues a diagnostic.  Just undef it here so that we
+   use gdb's version in defs.h */
+#undef UINT_MAX
diff --git a/gdb/config/powerpc/xm-linux.h b/gdb/config/powerpc/xm-linux.h
new file mode 100644
index 00000000000..c8a029d1010
--- /dev/null
+++ b/gdb/config/powerpc/xm-linux.h
@@ -0,0 +1,38 @@
+/* Native support for linux, for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1992, 1996, 2000, 2001
+   Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef XM_LINUX_H
+#define XM_LINUX_H
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+#define KERNEL_U_ADDR 0x0
+
+/* If you expect to use the mmalloc package to obtain mapped symbol files,
+   for now you have to specify some parameters that determine how gdb places
+   the mappings in it's address space.  See the comments in map_to_address()
+   for details.  This is expected to only be a short term solution.  Yes it
+   is a kludge.
+   FIXME:  Make this more automatic. */
+
+#define MMAP_BASE_ADDRESS      0x20000000      /* First mapping here */
+#define MMAP_INCREMENT         0x01000000      /* Increment to next mapping */
+
+#endif /* #ifndef XM_LINUX_H */
diff --git a/gdb/config/romp/rtbsd.mh b/gdb/config/romp/rtbsd.mh
new file mode 100644
index 00000000000..1efa116fa18
--- /dev/null
+++ b/gdb/config/romp/rtbsd.mh
@@ -0,0 +1,8 @@
+# IBM RT/PC running BSD unix. 
+# This file contributed at NYU, where we are using the RT to remote
+# debug an a29k running unix.  No attempt, as of 7/16/91, has been made
+# to support debugging of RT executables.
+NATDEPFILES corelow.o core-aout.o infptrace.o inftarg.o fork-child.o
+MH_CFLAGS=-DHOSTING_ONLY	# No debugging of RT executables 
+XM_FILE= xm-rtbsd.h
+CC=gcc -traditional		# hc/pcc just can't cut it.
diff --git a/gdb/config/romp/xm-rtbsd.h b/gdb/config/romp/xm-rtbsd.h
new file mode 100644
index 00000000000..e7918163ee2
--- /dev/null
+++ b/gdb/config/romp/xm-rtbsd.h
@@ -0,0 +1,37 @@
+/* Definitions to host GDB on an IBM RT/PC running BSD Unix. 
+   Copyright 1986, 1987, 1989, 1991, 1992  Free Software Foundation, Inc.
+   Contributed by David Wood @ New York University (wood@lab.ultra.nyu.edu).
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* This OS has the wait structure */
+#define HAVE_WAIT_STRUCT
+
+#ifdef HOSTING_ONLY
+/*
+ * This next two defines are to get GDB up and running as a host to
+ * do remote debugging.  I know there is a gdb for the RT, but there wasn't
+ * an xconfig/rt* file.  
+ */
+#define KERNEL_U_ADDR_BSD	/* This may be correct, but hasn't been tested */
+#define REGISTER_U_ADDR(a,b,c)	   \
+	(printf("GDB can not debug IBM RT/PC BSD executables (yet)\n"),\
+	quit(),0)
+#else
+#include	"GDB for the RT is not included in the distribution"
+#endif
diff --git a/gdb/config/rs6000/aix4.mh b/gdb/config/rs6000/aix4.mh
new file mode 100644
index 00000000000..e6253be9a22
--- /dev/null
+++ b/gdb/config/rs6000/aix4.mh
@@ -0,0 +1,11 @@
+# Host: IBM RS/6000 running AIX4
+
+XM_FILE= xm-aix4.h
+
+NAT_FILE= nm-rs6000.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o rs6000-nat.o \
+	     xcoffsolib.o
+
+# When compiled with cc, for debugging, this argument should be passed.
+# We have no idea who our current compiler is though, so we skip it.
+# MH_CFLAGS = -bnodelcsect
diff --git a/gdb/config/rs6000/aix4.mt b/gdb/config/rs6000/aix4.mt
new file mode 100644
index 00000000000..fb9d0033fef
--- /dev/null
+++ b/gdb/config/rs6000/aix4.mt
@@ -0,0 +1,3 @@
+# Target: IBM RS/6000 running AIX4
+TDEPFILES= rs6000-tdep.o xcoffread.o ppc-linux-tdep.o solib.o solib-svr4.o
+TM_FILE= tm-rs6000-aix4.h
diff --git a/gdb/config/rs6000/nm-rs6000.h b/gdb/config/rs6000/nm-rs6000.h
new file mode 100644
index 00000000000..728497e7871
--- /dev/null
+++ b/gdb/config/rs6000/nm-rs6000.h
@@ -0,0 +1,66 @@
+/* IBM RS/6000 native-dependent macros for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1994, 1996, 1999, 2000, 2001
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Do implement the attach and detach commands.  */
+
+#define ATTACH_DETACH
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* Override child_xfer_memory in infptrace.c. */
+
+#define CHILD_XFER_MEMORY
+
+/* When a child process is just starting, we sneak in and relocate
+   the symbol table (and other stuff) after the dynamic linker has
+   figured out where they go.  */
+
+#define	SOLIB_CREATE_INFERIOR_HOOK(PID)	\
+  do {					\
+    xcoff_relocate_symtab (PID);	\
+  } while (0)
+
+/* When a target process or core-file has been attached, we sneak in
+   and figure out where the shared libraries have got to.  */
+
+#define	SOLIB_ADD(a, b, c, d)	\
+  if (PIDGET (inferior_ptid))	\
+    /* Attach to process.  */  \
+    xcoff_relocate_symtab (PIDGET (inferior_ptid)); \
+  else		\
+    /* Core file.  */ \
+    xcoff_relocate_core (c);
+
+extern void xcoff_relocate_symtab (unsigned int);
+struct target_ops;
+extern void xcoff_relocate_core (struct target_ops *);
+
+/* If ADDR lies in a shared library, return its name.  */
+
+#define	PC_SOLIB(PC)	xcoff_solib_address(PC)
+extern char *xcoff_solib_address (CORE_ADDR);
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size (void);
diff --git a/gdb/config/rs6000/nm-rs6000ly.h b/gdb/config/rs6000/nm-rs6000ly.h
new file mode 100644
index 00000000000..7bc1267d266
--- /dev/null
+++ b/gdb/config/rs6000/nm-rs6000ly.h
@@ -0,0 +1,26 @@
+/* Native-dependent definitions for RS6000 running LynxOS.
+   Copyright 1993 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_RS6000LYNX_H
+#define NM_RS6000LYNX_H
+
+#include "nm-lynx.h"
+
+#endif /* NM_RS6000LYNX_H */
diff --git a/gdb/config/rs6000/rs6000.mh b/gdb/config/rs6000/rs6000.mh
new file mode 100644
index 00000000000..c57319be4fc
--- /dev/null
+++ b/gdb/config/rs6000/rs6000.mh
@@ -0,0 +1,11 @@
+# Host: IBM RS/6000 running AIX
+
+XM_FILE= xm-rs6000.h
+
+NAT_FILE= nm-rs6000.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o rs6000-nat.o \
+	     xcoffsolib.o
+
+# When compiled with cc, for debugging, this argument should be passed.
+# We have no idea who our current compiler is though, so we skip it.
+# MH_CFLAGS = -bnodelcsect
diff --git a/gdb/config/rs6000/rs6000.mt b/gdb/config/rs6000/rs6000.mt
new file mode 100644
index 00000000000..5ffcc0165a4
--- /dev/null
+++ b/gdb/config/rs6000/rs6000.mt
@@ -0,0 +1,3 @@
+# Target: IBM RS/6000 running AIX
+TDEPFILES= rs6000-tdep.o xcoffread.o ppc-linux-tdep.o solib.o solib-svr4.o
+TM_FILE= tm-rs6000.h
diff --git a/gdb/config/rs6000/rs6000lynx.mh b/gdb/config/rs6000/rs6000lynx.mh
new file mode 100644
index 00000000000..096473f1a60
--- /dev/null
+++ b/gdb/config/rs6000/rs6000lynx.mh
@@ -0,0 +1,6 @@
+# Host: RS6000 running LynxOS
+
+XM_CLIBS= -lbsd
+
+NAT_FILE= nm-rs6000ly.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o lynx-nat.o xcoffread.o
diff --git a/gdb/config/rs6000/rs6000lynx.mt b/gdb/config/rs6000/rs6000lynx.mt
new file mode 100644
index 00000000000..69aeb60c221
--- /dev/null
+++ b/gdb/config/rs6000/rs6000lynx.mt
@@ -0,0 +1,3 @@
+# Target: IBM RS6000 running LynxOS
+TDEPFILES= coff-solib.o rs6000-tdep.o ppc-linux-tdep.o solib.o solib-svr4.o
+TM_FILE= tm-rs6000ly.h
diff --git a/gdb/config/rs6000/tm-rs6000-aix4.h b/gdb/config/rs6000/tm-rs6000-aix4.h
new file mode 100644
index 00000000000..243befe7d6f
--- /dev/null
+++ b/gdb/config/rs6000/tm-rs6000-aix4.h
@@ -0,0 +1,27 @@
+/* Macro definitions for RS/6000 running AIX4.
+   Copyright 1995, 1997 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_RS6000_AIX4_H
+#define TM_RS6000_AIX4_H
+
+/* Use generic RS6000 definitions. */
+#include "rs6000/tm-rs6000.h"
+
+#endif /* TM_RS6000_AIX4_H */
diff --git a/gdb/config/rs6000/tm-rs6000.h b/gdb/config/rs6000/tm-rs6000.h
new file mode 100644
index 00000000000..202ac7751a7
--- /dev/null
+++ b/gdb/config/rs6000/tm-rs6000.h
@@ -0,0 +1,125 @@
+/* Parameters for target execution on an RS6000, for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
+   1998, 1999, 2000
+   Free Software Foundation, Inc.
+   Contributed by IBM Corporation.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define GDB_MULTI_ARCH 1
+
+/* Minimum possible text address in AIX */
+
+#define TEXT_SEGMENT_BASE	0x10000000
+
+/* AIX's assembler doesn't grok dollar signs in identifiers.
+   So we use dots instead.  This item must be coordinated with G++. */
+#undef CPLUS_MARKER
+#define CPLUS_MARKER '.'
+
+/* Return whether PC in function NAME is in code that should be skipped when
+   single-stepping.  */
+
+#define IN_SOLIB_RETURN_TRAMPOLINE(pc, name) \
+  rs6000_in_solib_return_trampoline (pc, name)
+extern int rs6000_in_solib_return_trampoline (CORE_ADDR, char *);
+
+/* If PC is in some function-call trampoline code, return the PC
+   where the function itself actually starts.  If not, return NULL.  */
+
+#define	SKIP_TRAMPOLINE_CODE(pc)	rs6000_skip_trampoline_code (pc)
+extern CORE_ADDR rs6000_skip_trampoline_code (CORE_ADDR);
+
+/* Number of trap signals we need to skip over, once the inferior process
+   starts running. */
+
+#define	START_INFERIOR_TRAPS_EXPECTED	2
+
+/* AIX has a couple of strange returns from wait().  */
+
+#define CHILD_SPECIAL_WAITSTATUS(ourstatus, hoststatus) ( \
+  /* "stop after load" status.  */ \
+  (hoststatus) == 0x57c ? (ourstatus)->kind = TARGET_WAITKIND_LOADED, 1 : \
+  \
+  /* signal 0. I have no idea why wait(2) returns with this status word.  */ \
+  /* It looks harmless. */ \
+  (hoststatus) == 0x7f ? (ourstatus)->kind = TARGET_WAITKIND_SPURIOUS, 1 : \
+  \
+  /* A normal waitstatus.  Let the usual macros deal with it.  */ \
+  0)
+
+/* In xcoff, we cannot process line numbers when we see them. This is
+   mainly because we don't know the boundaries of the include files. So,
+   we postpone that, and then enter and sort(?) the whole line table at
+   once, when we are closing the current symbol table in end_symtab(). */
+
+#define	PROCESS_LINENUMBER_HOOK()	aix_process_linenos ()
+extern void aix_process_linenos (void);
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define FP0_REGNUM 32		/* Floating point register 0 */
+#define FPLAST_REGNUM 63	/* Last floating point register */
+
+/* These #defines are used to parse core files and talk to ptrace, so they
+   must remain fixed.  */
+#define	FIRST_UISA_SP_REGNUM 64	/* first special register number */
+#define LAST_UISA_SP_REGNUM  70	/* last special register number */
+
+/* Define other aspects of the stack frame.  */
+
+#define INIT_FRAME_PC_FIRST(fromleaf, prev) \
+  prev->pc = (fromleaf ? SAVED_PC_AFTER_CALL (prev->next) : \
+	      prev->next ? FRAME_SAVED_PC (prev->next) : read_pc ());
+#define INIT_FRAME_PC(fromleaf, prev)	/* nothing */
+
+/* Flag for machine-specific stuff in shared files.  FIXME */
+#define IBM6000_TARGET
+
+/* RS6000/AIX does not support PT_STEP.  Has to be simulated.  */
+
+#define SOFTWARE_SINGLE_STEP_P() 1
+extern void rs6000_software_single_step (enum target_signal, int);
+#define SOFTWARE_SINGLE_STEP(sig,bp_p) rs6000_software_single_step (sig, bp_p)
+
+/* Notice when a new child process is started. */
+
+#define TARGET_CREATE_INFERIOR_HOOK rs6000_create_inferior
+extern void rs6000_create_inferior (int);
+
+/* Hook in rs6000-tdep.c for determining the TOC address when
+   calling functions in the inferior.  */
+
+extern CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR);
+
+/* Hook in rs6000-tdep.c to set the current architecture when starting a
+   child process. */
+
+extern void (*rs6000_set_host_arch_hook) (int);
+
+/* We need solib.h for building cross debuggers.  However, we don't want
+   to clobber any special solib support required by native debuggers, so
+   only include solib.h if SOLIB_ADD is not defined.  */
+#ifndef SOLIB_ADD
+#include "solib.h"
+#endif
diff --git a/gdb/config/rs6000/tm-rs6000ly.h b/gdb/config/rs6000/tm-rs6000ly.h
new file mode 100644
index 00000000000..ca7dc0d41ee
--- /dev/null
+++ b/gdb/config/rs6000/tm-rs6000ly.h
@@ -0,0 +1,31 @@
+/* Macro definitions for RS6000 running under LynxOS.
+   Copyright 1993, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_RS6000LYNX_H
+#define TM_RS6000LYNX_H
+
+#include "tm-lynx.h"
+
+/* Use generic RS6000 definitions. */
+#include "rs6000/tm-rs6000.h"
+
+#define CANNOT_STORE_REGISTER(regno) (regno == PS_REGNUM)
+
+#endif /* TM_RS6000LYNX_H */
diff --git a/gdb/config/rs6000/xm-aix4.h b/gdb/config/rs6000/xm-aix4.h
new file mode 100644
index 00000000000..5f7aa778f45
--- /dev/null
+++ b/gdb/config/rs6000/xm-aix4.h
@@ -0,0 +1,27 @@
+/* Parameters for hosting on an RS6000, for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1996
+   Free Software Foundation, Inc.
+   Contributed by IBM Corporation.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "xm-aix4.h"
+
+/* AIX 4.x uses nonstandard "int *" as type of third argument to ptrace() */
+
+#define PTRACE_ARG3_TYPE int*
diff --git a/gdb/config/rs6000/xm-rs6000.h b/gdb/config/rs6000/xm-rs6000.h
new file mode 100644
index 00000000000..51096e643b0
--- /dev/null
+++ b/gdb/config/rs6000/xm-rs6000.h
@@ -0,0 +1,94 @@
+/* Parameters for hosting on an RS6000, for GDB, the GNU debugger.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1998,
+   2000, 2001 Free Software Foundation, Inc.
+   Contributed by IBM Corporation.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* The following text is taken from config/rs6000.mh:
+ * # The IBM version of /usr/include/rpc/rpc.h has a bug -- it says
+ * # `extern fd_set svc_fdset;' without ever defining the type fd_set.
+ * # Unfortunately this occurs in the vx-share code, which is not configured
+ * # like the rest of GDB (e.g. it doesn't include "defs.h").
+ * # We circumvent this bug by #define-ing fd_set here, but undefining it in
+ * # the xm-rs6000.h file before ordinary modules try to use it.  FIXME, IBM!
+ * MH_CFLAGS='-Dfd_set=int'
+ * So, here we do the undefine...which has to occur before we include
+ * <sys/select.h> below.
+ */
+#undef fd_set
+
+#include <sys/select.h>
+
+/* Big end is at the low address */
+
+/* At least as of AIX 3.2, we have termios.  */
+#define	HAVE_TERMIOS 1
+/* #define HAVE_TERMIO 1 */
+
+#define	USG 1
+
+#define FIVE_ARG_PTRACE
+
+/* This system requires that we open a terminal with O_NOCTTY for it to
+   not become our controlling terminal.  */
+
+#define	USE_O_NOCTTY
+
+/* Brain death inherited from PC's pervades.  */
+#undef NULL
+#define NULL 0
+
+/* The IBM compiler requires this in order to properly compile alloca().  */
+#pragma alloca
+
+/* There is no vfork.  */
+
+#define	vfork	fork
+
+/* Signal handler for SIGWINCH `window size changed'. */
+
+#define	SIGWINCH_HANDLER  aix_resizewindow
+extern void aix_resizewindow (int);
+
+/* This doesn't seem to be declared in any header file I can find.  */
+char *termdef (int, int);
+
+/* `lines_per_page' and `chars_per_line' are local to utils.c. Rectify this. */
+
+#define	SIGWINCH_HANDLER_BODY	\
+									\
+/* Respond to SIGWINCH `window size changed' signal, and reset GDB's	\
+   window settings appropriately. */					\
+									\
+void 						\
+aix_resizewindow (signo)			\
+     int signo;					\
+{						\
+  int fd = fileno (stdout);			\
+  if (isatty (fd)) {				\
+    int val;					\
+						\
+    val = atoi (termdef (fd, 'l'));		\
+    if (val > 0)				\
+      lines_per_page = val;			\
+    val = atoi (termdef (fd, 'c'));		\
+    if (val > 0)				\
+      chars_per_line = val;			\
+  }						\
+}
diff --git a/gdb/config/s390/nm-linux.h b/gdb/config/s390/nm-linux.h
new file mode 100644
index 00000000000..3846579923f
--- /dev/null
+++ b/gdb/config/s390/nm-linux.h
@@ -0,0 +1,84 @@
+/* Native support for GNU/Linux on S390.
+
+   Copyright 2001, 2002 Free Software Foundation, Inc.
+
+   Ported by D.J. Barrow for IBM Deutschland Entwicklung GmbH, IBM
+   Corporation.  derived from i390-nmlinux.h
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_LINUX_H
+#define NM_LINUX_H
+
+#include "config/nm-linux.h"
+
+#define REGISTER_U_ADDR(addr, blockend, regno) \
+	(addr) = s390_register_u_addr((blockend),(regno));
+extern int s390_register_u_addr (int, int);
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size (void);
+
+#define U_REGS_OFFSET 0
+
+
+/* We define this if link.h is available, because with ELF we use SVR4 style
+   shared libraries. */
+
+#ifdef HAVE_LINK_H
+#define SVR4_SHARED_LIBS
+#include "solib.h"		/* Support for shared libraries. */
+#endif
+
+
+/* WATCHPOINT SPECIFIC STUFF */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+#define HAVE_CONTINUABLE_WATCHPOINT
+#define target_insert_watchpoint(addr, len, type)  \
+  s390_insert_watchpoint (PIDGET (inferior_ptid), addr, len, type)
+
+#define target_remove_watchpoint(addr, len, type)  \
+  s390_remove_watchpoint (PIDGET (inferior_ptid), addr, len)
+
+extern int watch_area_cnt;
+/* gdb if really stupid & calls this all the time without a
+   watchpoint even being set */
+#define STOPPED_BY_WATCHPOINT(W)  \
+  (watch_area_cnt&&s390_stopped_by_watchpoint (PIDGET(inferior_ptid)))
+
+extern CORE_ADDR s390_stopped_by_watchpoint (int);
+
+/*
+  Type can be 1 for a read_watchpoint or 2 for an access watchpoint.
+ */
+extern int s390_insert_watchpoint (int pid, CORE_ADDR addr, int len, int rw);
+extern int s390_remove_watchpoint (int pid, CORE_ADDR addr, int len);
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
+	 (((type) == bp_hardware_watchpoint)|| \
+	 ((type) == bp_watchpoint)|| \
+	 ((type) == bp_read_watchpoint) || \
+         ((type) == bp_access_watchpoint))
+
+
+/* Needed for s390x */
+#define PTRACE_ARG3_TYPE long
+#define PTRACE_XFER_TYPE long
+#endif /* nm_linux.h */
diff --git a/gdb/config/s390/s390.mh b/gdb/config/s390/s390.mh
new file mode 100644
index 00000000000..300a5e3c1ce
--- /dev/null
+++ b/gdb/config/s390/s390.mh
@@ -0,0 +1,13 @@
+# Host: S390, running Linux
+
+XM_FILE= xm-linux.h
+XM_CLIBS=
+
+NAT_FILE= nm-linux.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o s390-nat.o \
+	core-aout.o core-regset.o linux-proc.o gcore.o thread-db.o lin-lwp.o \
+	proc-service.o
+LOADLIBES = -ldl -rdynamic
+
+
+
diff --git a/gdb/config/s390/s390.mt b/gdb/config/s390/s390.mt
new file mode 100644
index 00000000000..6b8d91fc83f
--- /dev/null
+++ b/gdb/config/s390/s390.mt
@@ -0,0 +1,6 @@
+# Target: S390 running Linux
+TM_FILE= tm-linux.h
+TDEPFILES=s390-tdep.o solib.o
+# Post 5.0 tdep-files
+TDEPFILES+=solib-svr4.o solib-legacy.o
+GDB_MULTI_ARCH=GDB_MULTI_ARCH_PARTIAL
diff --git a/gdb/config/s390/s390x.mt b/gdb/config/s390/s390x.mt
new file mode 100644
index 00000000000..7b23cad60cb
--- /dev/null
+++ b/gdb/config/s390/s390x.mt
@@ -0,0 +1,9 @@
+# Target: S390 running Linux
+TM_FILE= tm-linux.h
+TDEPFILES=s390-tdep.o solib.o
+# Post 5.0 tdep-files
+TDEPFILES+=solib-svr4.o solib-legacy.o
+GDB_MULTI_ARCH=GDB_MULTI_ARCH_PARTIAL
+
+# needed for gdbserver.
+MT_CFLAGS= -DCONFIG_ARCH_S390X
diff --git a/gdb/config/s390/tm-linux.h b/gdb/config/s390/tm-linux.h
new file mode 100644
index 00000000000..c1b4a294ad8
--- /dev/null
+++ b/gdb/config/s390/tm-linux.h
@@ -0,0 +1,44 @@
+/* Target definitions for GDB for a s390 running GNU/Linux.
+
+   Copyright 2001, 2002 Free Software Foundation, Inc.
+
+   Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
+   for IBM Deutschland Entwicklung GmbH, IBM Corporation.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+   02111-1307, USA.  */
+
+#ifndef TM_LINUX_H
+#define TM_LINUX_H
+#ifdef GDBSERVER
+#define S390_GNULINUX_TARGET
+#endif /* GDBSERVER */
+#undef  TARGET_ELF64
+#define TARGET_ELF64 (gdbarch_tdep (current_gdbarch)->intreg_size==8)
+
+#include "config/tm-linux.h"
+
+/* Zap several macros defined in the above header so that multi-arch
+   can safely re-define them.  The ``correct fix'' involves
+   eliminating either the above include or even this file.  */
+#undef SKIP_TRAMPOLINE_CODE
+
+#include "s390/tm-s390.h"
+
+
+
+#endif /* TM_LINUX_H */
diff --git a/gdb/config/s390/tm-s390.h b/gdb/config/s390/tm-s390.h
new file mode 100644
index 00000000000..1c6e6787099
--- /dev/null
+++ b/gdb/config/s390/tm-s390.h
@@ -0,0 +1,115 @@
+/* Macro definitions for GDB on an S390.
+   Copyright 2001 Free Software Foundation, Inc.
+   Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
+   for IBM Deutschland Entwicklung GmbH, IBM Corporation.
+
+   This file is part of GDB.
+   
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+   02111-1307, USA.  */
+
+#if !defined(TM_S390_H)
+#define TM_S390_H 1
+
+#define S390_NUM_GPRS      (16)
+#define S390_GPR_SIZE      REGISTER_SIZE
+#define S390_PSW_MASK_SIZE REGISTER_SIZE
+#define S390_PSW_ADDR_SIZE REGISTER_SIZE
+#define S390_NUM_FPRS      (16)
+#define S390_FPR_SIZE      (8)
+#define S390_FPC_SIZE      (4)
+#define S390_FPC_PAD_SIZE  (4)	/* gcc insists on aligning the fpregs */
+#define S390_NUM_CRS       (16)
+#define S390_CR_SIZE       REGISTER_SIZE
+#define S390_NUM_ACRS      (16)
+#define S390_ACR_SIZE      (4)
+
+#define S390_NUM_REGS      (2+S390_NUM_GPRS+S390_NUM_ACRS+S390_NUM_CRS+1+S390_NUM_FPRS)
+#define S390_FIRST_ACR     (2+S390_NUM_GPRS)
+#define S390_LAST_ACR      (S390_FIRST_ACR+S390_NUM_ACRS-1)
+#define S390_FIRST_CR      (S390_FIRST_ACR+S390_NUM_ACRS)
+#define S390_LAST_CR       (S390_FIRST_CR+S390_NUM_CRS-1)
+
+#define S390_PSWM_REGNUM    0
+#define S390_PC_REGNUM      1
+#define	S390_GP0_REGNUM     2	/* GPR register 0 */
+#define S390_GP_LAST_REGNUM (S390_GP0_REGNUM+S390_NUM_GPRS-1)
+/* Usually return address */
+#define S390_RETADDR_REGNUM (S390_GP0_REGNUM+14)
+/* Contains address of top of stack */
+#define S390_SP_REGNUM      (S390_GP0_REGNUM+15)
+/* needed in findvar.c still */
+#define S390_FP_REGNUM     S390_SP_REGNUM
+#define S390_FRAME_REGNUM  (S390_GP0_REGNUM+11)
+#define S390_FPC_REGNUM    (S390_GP0_REGNUM+S390_NUM_GPRS+S390_NUM_ACRS+S390_NUM_CRS)
+/* FPR (Floating point) register 0 */
+#define S390_FP0_REGNUM    (S390_FPC_REGNUM+1)
+/* Last floating point register */
+#define S390_FPLAST_REGNUM (S390_FP0_REGNUM+S390_NUM_FPRS-1)
+#define S390_LAST_REGNUM   S390_FPLAST_REGNUM
+
+
+#define S390_ACR0_OFFSET ((S390_PSW_MASK_SIZE+S390_PSW_ADDR_SIZE)+(S390_GPR_SIZE*S390_NUM_GPRS))
+#define S390_CR0_OFFSET (S390_ACR0_OFFSET+(S390_ACR_SIZE*S390_NUM_ACRS))
+#define S390_FPC_OFFSET (S390_CR0_OFFSET+(S390_CR_SIZE*S390_NUM_CRS))
+#define S390_FP0_OFFSET (S390_FPC_OFFSET+(S390_FPC_SIZE+S390_FPC_PAD_SIZE))
+#define S390_GPR6_STACK_OFFSET (GDB_TARGET_IS_ESAME ? 48:24)
+
+#define S390_REGISTER_BYTES ((4+4)+(4*S390_NUM_GPRS)+(4*S390_NUM_ACRS)+ \
+(4*S390_NUM_CRS)+(S390_FPC_SIZE+S390_FPC_PAD_SIZE)+(S390_FPR_SIZE*S390_NUM_FPRS))
+
+#define S390X_REGISTER_BYTES ((8+8)+(8*S390_NUM_GPRS)+(4*S390_NUM_ACRS)+ \
+(8*S390_NUM_CRS)+(S390_FPC_SIZE+S390_FPC_PAD_SIZE)+(S390_FPR_SIZE*S390_NUM_FPRS))
+
+#ifdef GDBSERVER
+
+int s390_register_byte (int reg_nr);
+#define REGISTER_BYTE(reg_nr) s390_register_byte(reg_nr)
+#define PC_REGNUM S390_PC_REGNUM
+#define NUM_REGS  S390_NUM_REGS
+#define NUM_FREGS S390_NUM_FPRS
+#define FP_REGNUM S390_FP_REGNUM
+#define SP_REGNUM S390_SP_REGNUM
+/* Obviously ptrace for user program tracing cannot be allowed
+  mess with control registers (except per registers for hardware watchpoints),
+  when we add kernel debugging we may need to alter these macros. */
+int s390_cannot_fetch_register (int regno);
+#define CANNOT_FETCH_REGISTER(regno) s390_cannot_fetch_register(regno)
+#define CANNOT_STORE_REGISTER(regno) s390_cannot_fetch_register(regno)
+
+#if CONFIG_ARCH_S390X
+
+int s390x_register_raw_size (int reg_nr);
+#define REGISTER_RAW_SIZE(reg_nr) s390x_register_raw_size(reg_nr)
+#define GDB_TARGET_IS_ESAME (1)
+#define REGISTER_SIZE       (8)
+#define REGISTER_BYTES S390X_REGISTER_BYTES
+
+#else /*  CONFIG_ARCH_S390X */
+
+int s390_register_raw_size (int reg_nr);
+#define REGISTER_RAW_SIZE(reg_nr) s390_register_raw_size(reg_nr)
+#define GDB_TARGET_IS_ESAME (0)
+#define REGISTER_SIZE       (4)
+#define REGISTER_BYTES S390_REGISTER_BYTES
+
+#endif /* CONFIG_ARCH_S390X */
+
+#else /* GDBSERVER */
+
+#define GDB_TARGET_IS_ESAME (TARGET_ARCHITECTURE->mach == bfd_mach_s390_64)
+
+#endif /* GDBSERVER */
+#endif /* ifndef TM_S390_H */
diff --git a/gdb/config/s390/xm-linux.h b/gdb/config/s390/xm-linux.h
new file mode 100644
index 00000000000..d059d4097f4
--- /dev/null
+++ b/gdb/config/s390/xm-linux.h
@@ -0,0 +1,30 @@
+/* Native support for GNU/Linux, for GDB, the GNU debugger.
+   Copyright 2001 Free Software Foundation, Inc.
+   Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
+   for IBM Deutschland Entwicklung GmbH, IBM Corporation.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+   02111-1307, USA.  */
+
+#ifndef XM_LINUX_H
+#define XM_LINUX_H
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+#define KERNEL_U_ADDR 0x0
+
+#endif /* #ifndef XM_LINUX_H */
diff --git a/gdb/config/sh/embed.mt b/gdb/config/sh/embed.mt
new file mode 100644
index 00000000000..0f37e43d915
--- /dev/null
+++ b/gdb/config/sh/embed.mt
@@ -0,0 +1,6 @@
+# Target: Embedded Hitachi Super-H with ICE and simulator
+TDEPFILES= sh-tdep.o monitor.o sh3-rom.o remote-e7000.o ser-e7kpc.o dsrec.o 
+TM_FILE= tm-sh.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/sh/libsim.a
diff --git a/gdb/config/sh/linux.mt b/gdb/config/sh/linux.mt
new file mode 100644
index 00000000000..ea8460cdee9
--- /dev/null
+++ b/gdb/config/sh/linux.mt
@@ -0,0 +1,8 @@
+# Target: Hitachi Super-H running GNU/Linux
+TDEPFILES= sh-tdep.o monitor.o sh3-rom.o remote-e7000.o ser-e7kpc.o dsrec.o solib.o solib-svr4.o solib-legacy.o
+TM_FILE= tm-linux.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/sh/libsim.a
+
+GDBSERVER_DEPFILES = linux-low.o linux-sh-low.o reg-sh.o
diff --git a/gdb/config/sh/nbsd.mh b/gdb/config/sh/nbsd.mh
new file mode 100644
index 00000000000..dd677b60e4b
--- /dev/null
+++ b/gdb/config/sh/nbsd.mh
@@ -0,0 +1,4 @@
+# Host: SuperH running NetBSD
+NAT_CLIBS=
+NATDEPFILES= infptrace.o inftarg.o fork-child.o shnbsd-nat.o
+NAT_FILE= nm-nbsd.h
diff --git a/gdb/config/sh/nbsd.mt b/gdb/config/sh/nbsd.mt
new file mode 100644
index 00000000000..62d0c5ce3e8
--- /dev/null
+++ b/gdb/config/sh/nbsd.mt
@@ -0,0 +1,6 @@
+# Target: SuperH running NetBSD
+TDEPFILES= sh-tdep.o shnbsd-tdep.o corelow.o nbsd-tdep.o solib.o solib-svr4.o
+TM_FILE= tm-nbsd.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/sh/libsim.a
diff --git a/gdb/config/sh/nm-nbsd.h b/gdb/config/sh/nm-nbsd.h
new file mode 100644
index 00000000000..eb38d6b49ea
--- /dev/null
+++ b/gdb/config/sh/nm-nbsd.h
@@ -0,0 +1,28 @@
+/* Native-dependent definitions for SuperH running NetBSD, for GDB.
+   Copyright 2002 Free Software Foundation, Inc.
+   Contributed by Wasabi Systems, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSD_H
+#define NM_NBSD_H
+
+/* Get generic NetBSD native definitions.  */
+#include "config/nm-nbsd.h"
+
+#endif /* NM_NBSD_H */
diff --git a/gdb/config/sh/tm-linux.h b/gdb/config/sh/tm-linux.h
new file mode 100644
index 00000000000..ab1d4d86f21
--- /dev/null
+++ b/gdb/config/sh/tm-linux.h
@@ -0,0 +1,32 @@
+/* Target-specific definitions for GNU/Linux running on a Hitachi
+   Super-H.
+
+   Copyright 2000, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Pull in GNU/Linux generic defs.  */
+#include "tm-linux.h"
+
+/* Pull in sh-target defs */
+#include "sh/tm-sh.h"
+
+/* Use target_specific function to define link map offsets.  */
+extern struct link_map_offsets *sh_linux_svr4_fetch_link_map_offsets (void);
+#define SVR4_FETCH_LINK_MAP_OFFSETS() sh_linux_svr4_fetch_link_map_offsets ()
+
diff --git a/gdb/config/sh/tm-nbsd.h b/gdb/config/sh/tm-nbsd.h
new file mode 100644
index 00000000000..37dfe3452e2
--- /dev/null
+++ b/gdb/config/sh/tm-nbsd.h
@@ -0,0 +1,28 @@
+/* Target-dependent definitions for SuperH running NetBSD, for GDB.
+   Copyright 2002 Free Software Foundation, Inc.
+   Contributed by Wasabi Systems, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_NBSD_H
+#define TM_NBSD_H
+
+#include "sh/tm-sh.h"
+#include "solib.h"
+
+#endif /* TM_NBSD_H */
diff --git a/gdb/config/sh/tm-sh.h b/gdb/config/sh/tm-sh.h
new file mode 100644
index 00000000000..6ae6085d9b7
--- /dev/null
+++ b/gdb/config/sh/tm-sh.h
@@ -0,0 +1,33 @@
+/* Target-specific definition for a Hitachi Super-H.
+   Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Contributed by Steve Chamberlain sac@cygnus.com */
+
+#define GDB_MULTI_ARCH 1
+
+#define NUM_REALREGS 59 /* used in remote-e7000.c which is not multiarched. */
+
+#define REGISTER_TYPE  long /* used in standalone.c */
+
+#define BIG_REMOTE_BREAKPOINT    { 0xc3, 0x20 } /* Used in remote.c */
+#define LITTLE_REMOTE_BREAKPOINT { 0x20, 0xc3 } /* Used in remote.c */
+
+/*#define NOP   {0x20, 0x0b}*/ /* Who uses this???*/
diff --git a/gdb/config/sh/tm-wince.h b/gdb/config/sh/tm-wince.h
new file mode 100644
index 00000000000..cbe570b16d0
--- /dev/null
+++ b/gdb/config/sh/tm-wince.h
@@ -0,0 +1,32 @@
+/* Target-specific definition for Window CE
+   Copyright 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_WINCE_H
+#define TM_WINCE_H 1
+
+#include "sh/tm-sh.h"
+#undef SOFTWARE_SINGLE_STEP_P
+#define SOFTWARE_SINGLE_STEP_P() 1
+
+#undef SOFTWARE_SINGLE_STEP
+#define SOFTWARE_SINGLE_STEP(sig, bp_p) wince_software_single_step (sig, bp_p)
+void wince_software_single_step (unsigned int, int);
+
+#endif /* TM_WINCE_H */
diff --git a/gdb/config/sh/wince.mt b/gdb/config/sh/wince.mt
new file mode 100644
index 00000000000..237a0bc3428
--- /dev/null
+++ b/gdb/config/sh/wince.mt
@@ -0,0 +1,5 @@
+# Target: Hitachi Super-H running on Windows CE
+TDEPFILES= sh-tdep.o wince.o
+TM_FILE= tm-wince.h
+MT_CFLAGS=-DSHx -U_X86_ -U_M_IX86 -U__i386__ -U__i486__ -U__i586__ -U__i686__ -DUNICODE -D_WIN32_WCE -DWINCE_STUB='"${target_alias}-stub.exe"'
+WIN32LIBS=-lrapi
diff --git a/gdb/config/sparc/fbsd.mh b/gdb/config/sparc/fbsd.mh
new file mode 100644
index 00000000000..33c6dc7d7a1
--- /dev/null
+++ b/gdb/config/sparc/fbsd.mh
@@ -0,0 +1,25 @@
+# Host-dependent settings for FreeBSD/sparc64.
+#  Copyright 2002 Free Software Foundation, Inc.
+#  Contributed by David E. O'Brien <obrien@FreeBSD.org>.
+#
+#  This file is part of GDB.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; either version 2 of the License, or
+#  (at your option) any later version.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+# Host: FreeBSD/sparc64
+NATDEPFILES= sparc-nat.o \
+	corelow.o fork-child.o infptrace.o inftarg.o \
+	solib.o solib-svr4.o solib-legacy.o
+NAT_FILE= nm-fbsd.h
diff --git a/gdb/config/sparc/fbsd.mt b/gdb/config/sparc/fbsd.mt
new file mode 100644
index 00000000000..317c290f9c4
--- /dev/null
+++ b/gdb/config/sparc/fbsd.mt
@@ -0,0 +1,23 @@
+# Target-dependent settings for FreeBSD/sparc64.
+#  Copyright 2002 Free Software Foundation, Inc.
+#  Contributed by David E. O'Brien <obrien@FreeBSD.org>.
+#
+#  This file is part of GDB.
+#
+#  This program is free software; you can redistribute it and/or modify
+#  it under the terms of the GNU General Public License as published by
+#  the Free Software Foundation; either version 2 of the License, or
+#  (at your option) any later version.
+#
+#  This program is distributed in the hope that it will be useful,
+#  but WITHOUT ANY WARRANTY; without even the implied warranty of
+#  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#  GNU General Public License for more details.
+#
+#  You should have received a copy of the GNU General Public License
+#  along with this program; if not, write to the Free Software
+#  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+# Target: FreeBSD/sparc64
+TDEPFILES= sparc-tdep.o solib.o solib-svr4.o solib-legacy.o 
+TM_FILE= tm-fbsd.h
diff --git a/gdb/config/sparc/linux.mh b/gdb/config/sparc/linux.mh
new file mode 100644
index 00000000000..4a2c41f38c4
--- /dev/null
+++ b/gdb/config/sparc/linux.mh
@@ -0,0 +1,14 @@
+# Host: Sparcstation, running GNU/Linux.
+
+XM_FILE= xm-linux.h
+
+NAT_FILE= nm-linux.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o sparc-nat.o \
+	proc-service.o thread-db.o lin-lwp.o sparc-linux-nat.o \
+	linux-proc.o gcore.o 
+
+# The dynamically loaded libthread_db needs access to symbols in the
+# gdb executable.
+LOADLIBES = -ldl -rdynamic
+
+HOST_IPC=-DBSD_IPC
diff --git a/gdb/config/sparc/linux.mt b/gdb/config/sparc/linux.mt
new file mode 100644
index 00000000000..d6cf773a8ee
--- /dev/null
+++ b/gdb/config/sparc/linux.mt
@@ -0,0 +1,3 @@
+# Target: Sparcstation, running Linux
+TDEPFILES= sparc-tdep.o solib.o solib-svr4.o solib-legacy.o
+TM_FILE= tm-linux.h
diff --git a/gdb/config/sparc/nbsd64.mh b/gdb/config/sparc/nbsd64.mh
new file mode 100644
index 00000000000..eb54e489eb8
--- /dev/null
+++ b/gdb/config/sparc/nbsd64.mh
@@ -0,0 +1,3 @@
+# Host: UltraSPARC running NetBSD
+NATDEPFILES= fork-child.o infptrace.o inftarg.o sparc64nbsd-nat.o
+NAT_FILE= nm-nbsd.h
diff --git a/gdb/config/sparc/nbsd64.mt b/gdb/config/sparc/nbsd64.mt
new file mode 100644
index 00000000000..93b8f7841d4
--- /dev/null
+++ b/gdb/config/sparc/nbsd64.mt
@@ -0,0 +1,4 @@
+# Target: UltraSPARC running NetBSD
+TDEPFILES= sparc-tdep.o sparcnbsd-tdep.o nbsd-tdep.o corelow.o solib.o \
+	solib-svr4.o
+TM_FILE= tm-nbsd64.h
diff --git a/gdb/config/sparc/nbsdaout.mh b/gdb/config/sparc/nbsdaout.mh
new file mode 100644
index 00000000000..ecb69e473da
--- /dev/null
+++ b/gdb/config/sparc/nbsdaout.mh
@@ -0,0 +1,6 @@
+# Host: Sun 4 or Sparcstation, running NetBSD
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o sparc-nat.o \
+	solib.o solib-sunos.o
+XM_FILE= xm-nbsd.h
+NAT_FILE= nm-nbsdaout.h
+HOST_IPC=-DBSD_IPC
diff --git a/gdb/config/sparc/nbsdaout.mt b/gdb/config/sparc/nbsdaout.mt
new file mode 100644
index 00000000000..c603f363fb5
--- /dev/null
+++ b/gdb/config/sparc/nbsdaout.mt
@@ -0,0 +1,3 @@
+# Target: Sun 4 or Sparcstation, running NetBSD
+TDEPFILES= sparc-tdep.o
+TM_FILE= tm-nbsdaout.h
diff --git a/gdb/config/sparc/nbsdelf.mh b/gdb/config/sparc/nbsdelf.mh
new file mode 100644
index 00000000000..8581c1b92ab
--- /dev/null
+++ b/gdb/config/sparc/nbsdelf.mh
@@ -0,0 +1,6 @@
+# Host: Sun 4 or Sparcstation, running NetBSD
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o sparc-nat.o \
+	solib.o solib-svr4.o solib-legacy.o
+XM_FILE= xm-nbsd.h
+NAT_FILE= nm-nbsd.h
+HOST_IPC=-DBSD_IPC
diff --git a/gdb/config/sparc/nbsdelf.mt b/gdb/config/sparc/nbsdelf.mt
new file mode 100644
index 00000000000..5c89318bfe9
--- /dev/null
+++ b/gdb/config/sparc/nbsdelf.mt
@@ -0,0 +1,3 @@
+# Target: Sun 4 or Sparcstation, running NetBSD
+TDEPFILES= sparc-tdep.o
+TM_FILE= tm-nbsd.h
diff --git a/gdb/config/sparc/nm-fbsd.h b/gdb/config/sparc/nm-fbsd.h
new file mode 100644
index 00000000000..87b9622348c
--- /dev/null
+++ b/gdb/config/sparc/nm-fbsd.h
@@ -0,0 +1,67 @@
+/* Native-dependent definitions for FreeBSD/sparc64.
+   Copyright 2002
+   Free Software Foundation, Inc.
+   Contributed by David E. O'Brien <obrien@FreeBSD.org>.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#ifndef NM_FBSD_H
+#define NM_FBSD_H
+
+/* Type of the third argument to the `ptrace' system call.  */
+#define PTRACE_ARG3_TYPE caddr_t
+
+/* Override copies of {fetch,store}_inferior_registers in `infptrace.c'.  */
+#define FETCH_INFERIOR_REGISTERS
+
+/* We can attach and detach.  */
+#define ATTACH_DETACH
+
+
+/* Shared library support.  */
+
+#define SVR4_SHARED_LIBS
+
+#include "solib.h"		/* Support for shared libraries. */
+#include "elf/common.h"		/* Additional ELF shared library info. */
+
+/* Make things match up with what is expected in sparc-nat.c.  */
+
+#define PTRACE_GETREGS	 PT_GETREGS
+#define PTRACE_SETREGS	 PT_SETREGS
+#define PTRACE_GETFPREGS PT_GETFPREGS
+#define PTRACE_SETFPREGS PT_SETFPREGS
+
+#define GDB_GREGSET_T	struct reg
+#define GDB_FPREGSET_T	struct fpreg
+
+#define regs		trapframe
+#define r_g1		tf_global[1]
+#define r_ps		tf_tstate
+#define r_pc		tf_tpc
+#define r_npc		tf_tnpc
+#define r_y		tf_y
+
+#define FPU_FSR_TYPE	unsigned long
+#define fp_status	fpreg		/* our reg.h */
+#define fpu		fpreg		/* our reg.h */
+#define fpu_regs	fr_regs		/* one field of fpu_fr on Solaris */
+#define fpu_fr		fr_regs		/* a union w/in struct fpu on Solaris */
+#define fpu_fsr		fr_fsr
+#define Fpu_fsr		fr_fsr
+
+#endif /* NM_FBSD_H */
diff --git a/gdb/config/sparc/nm-linux.h b/gdb/config/sparc/nm-linux.h
new file mode 100644
index 00000000000..80ab0423cd0
--- /dev/null
+++ b/gdb/config/sparc/nm-linux.h
@@ -0,0 +1,32 @@
+/* Macro definitions for running gdb on a Sparc running GNU/Linux.
+
+   Copyright 1989, 1992, 1996, 1998, 1999, 2000, 2002 Free Software
+   Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include <nm-sysv4.h>
+#include "nm-linux.h"
+#include "solib.h"
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size (void);
diff --git a/gdb/config/sparc/nm-nbsd.h b/gdb/config/sparc/nm-nbsd.h
new file mode 100644
index 00000000000..653be852d85
--- /dev/null
+++ b/gdb/config/sparc/nm-nbsd.h
@@ -0,0 +1,61 @@
+/* Native-dependent definitions for Sparc running NetBSD, for GDB.
+   Copyright 1986, 1987, 1989, 1992, 1994, 1996, 1999, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSD_H
+#define NM_NBSD_H
+
+#include "regcache.h"
+
+/* Get generic NetBSD native definitions. */
+
+#include "config/nm-nbsd.h"
+
+/* Before storing, we need to read all the registers.  */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+/* Make things match up with what is expected in sparc-nat.c.  */
+
+#define regs		trapframe
+#define fp_status	fpstate
+
+#define r_g1		tf_global[1]
+#define r_ps		tf_psr
+#define r_pc		tf_pc
+#define r_npc		tf_npc
+#define r_y		tf_y
+
+#define fpu		fpstate
+#define fpu_regs	fs_regs
+#define fpu_fsr		fs_fsr
+#define fpu_fr		fs_regs
+#define Fpu_fsr		fs_fsr
+#define FPU_FSR_TYPE	int
+
+#define PTRACE_GETREGS	 PT_GETREGS
+#define PTRACE_GETFPREGS PT_GETFPREGS
+#define PTRACE_SETREGS	 PT_SETREGS
+#define PTRACE_SETFPREGS PT_SETFPREGS
+
+#define GDB_GREGSET_T	struct reg
+#define GDB_FPREGSET_T	struct fpreg
+
+#endif /* NM_NBSD_H */
diff --git a/gdb/config/sparc/nm-nbsdaout.h b/gdb/config/sparc/nm-nbsdaout.h
new file mode 100644
index 00000000000..730759153e0
--- /dev/null
+++ b/gdb/config/sparc/nm-nbsdaout.h
@@ -0,0 +1,30 @@
+/* Native-dependent definitions for Sparc running NetBSD a.out, for GDB.
+   Copyright 1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_NBSDAOUT_H
+#define NM_NBSDAOUT_H
+
+#include "sparc/nm-nbsd.h"
+
+/* Get generic NetBSD a.out native definitions. */
+
+#include "config/nm-nbsdaout.h"
+
+#endif /* NM_NBSDAOUT_H */
diff --git a/gdb/config/sparc/nm-sparclynx.h b/gdb/config/sparc/nm-sparclynx.h
new file mode 100644
index 00000000000..74304be36d3
--- /dev/null
+++ b/gdb/config/sparc/nm-sparclynx.h
@@ -0,0 +1,26 @@
+/* Native-dependent definitions for Sparc running LynxOS.
+   Copyright 1993, 1994 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef NM_SPARCLYNX_H
+#define NM_SPARCLYNX_H
+
+#include "nm-lynx.h"
+
+#endif /* NM_SPARCLYNX_H */
diff --git a/gdb/config/sparc/nm-sun4os4.h b/gdb/config/sparc/nm-sun4os4.h
new file mode 100644
index 00000000000..d874d582418
--- /dev/null
+++ b/gdb/config/sparc/nm-sun4os4.h
@@ -0,0 +1,42 @@
+/* Macro definitions for running gdb on a Sun 4 running sunos 4.
+   Copyright 1989, 1992, 1996, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+/* Do implement the attach and detach commands.  */
+
+#define ATTACH_DETACH
+
+/* Override copies of {fetch,store}_inferior_registers in infptrace.c.  */
+
+#define FETCH_INFERIOR_REGISTERS
+
+/* Before storing, we need to read all the registers.  */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+/* Return sizeof user struct to callers in less machine dependent routines */
+
+#define KERNEL_U_SIZE kernel_u_size()
+extern int kernel_u_size (void);
+
+/* SunOS 4.x uses nonstandard "char *" as type of third argument to ptrace() */
+
+#define PTRACE_ARG3_TYPE char*
diff --git a/gdb/config/sparc/nm-sun4sol2.h b/gdb/config/sparc/nm-sun4sol2.h
new file mode 100644
index 00000000000..adc8231f8e8
--- /dev/null
+++ b/gdb/config/sparc/nm-sun4sol2.h
@@ -0,0 +1,69 @@
+/* Native-dependent definitions for Sparc running SVR4.
+   Copyright 1994, 1996, 1997, 1999, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+/* Include the generic SVR4 definitions.  */
+
+#include <nm-sysv4.h>
+
+/* Before storing, we need to read all the registers.  */
+
+#define CHILD_PREPARE_TO_STORE() read_register_bytes (0, NULL, REGISTER_BYTES)
+
+/* Solaris PSRVADDR support does not seem to include a place for nPC.  */
+
+#define PRSVADDR_BROKEN
+
+/* gdb wants to use the prgregset_t interface rather than
+   the gregset_t interface, partly because that's what's
+   used in core-sol2.c */
+
+#define GDB_GREGSET_T prgregset_t
+#define GDB_FPREGSET_T prfpregset_t
+
+#ifdef NEW_PROC_API	/* Solaris 6 and above can do HW watchpoints */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+/* The man page for proc4 on solaris 6 and 7 says that the system
+   can support "thousands" of hardware watchpoints, but gives no
+   method for finding out how many.  So just tell GDB 'yes'.  */
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(TYPE, CNT, OT) 1
+
+/* When a hardware watchpoint fires off the PC will be left at the
+   instruction following the one which caused the watchpoint.  
+   It will *NOT* be necessary for GDB to step over the watchpoint. */
+#define HAVE_CONTINUABLE_WATCHPOINT
+
+extern int procfs_stopped_by_watchpoint (ptid_t);
+#define STOPPED_BY_WATCHPOINT(W) \
+  procfs_stopped_by_watchpoint(inferior_ptid)
+
+/* Use these macros for watchpoint insertion/deletion.  */
+/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */
+
+extern int procfs_set_watchpoint (ptid_t, CORE_ADDR, int, int, int);
+#define target_insert_watchpoint(ADDR, LEN, TYPE) \
+        procfs_set_watchpoint (inferior_ptid, ADDR, LEN, TYPE, 1)
+#define target_remove_watchpoint(ADDR, LEN, TYPE) \
+        procfs_set_watchpoint (inferior_ptid, ADDR, 0, 0, 0)
+
+#endif /* NEW_PROC_API */
diff --git a/gdb/config/sparc/sp64.mt b/gdb/config/sparc/sp64.mt
new file mode 100644
index 00000000000..8bb1e07ed1c
--- /dev/null
+++ b/gdb/config/sparc/sp64.mt
@@ -0,0 +1,9 @@
+# Target: SPARC64
+# solib.o and procfs.o taken out for now.  We don't have shared libraries yet,
+# and the elf version requires procfs.o but the a.out version doesn't.
+# Then again, having procfs.o in a target makefile fragment seems wrong.
+TDEPFILES = sparc-tdep.o
+TM_FILE= tm-sp64.h
+
+# Need gcc for long long support.
+CC = gcc
diff --git a/gdb/config/sparc/sp64linux.mt b/gdb/config/sparc/sp64linux.mt
new file mode 100644
index 00000000000..d7d642ead71
--- /dev/null
+++ b/gdb/config/sparc/sp64linux.mt
@@ -0,0 +1,3 @@
+# Target: UltraSPARC, running Linux 64bit programs
+TDEPFILES= sparc-tdep.o solib.o solib-svr4.o solib-legacy.o
+TM_FILE= tm-sp64linux.h
diff --git a/gdb/config/sparc/sp64sim.mt b/gdb/config/sparc/sp64sim.mt
new file mode 100644
index 00000000000..a9c5ac94cd4
--- /dev/null
+++ b/gdb/config/sparc/sp64sim.mt
@@ -0,0 +1,13 @@
+# Target: SPARC64 (with simulator)
+# solib.o and procfs.o taken out for now.  We don't have shared libraries yet,
+# and the elf version requires procfs.o but the a.out version doesn't.
+# Then again, having procfs.o in a target makefile fragment seems wrong.
+TDEPFILES = sparc-tdep.o
+TM_FILE= tm-sp64.h
+
+# Need gcc for long long support.
+CC = gcc
+
+MH_CFLAGS = -I${srcdir}/../sim/sp64
+SIM_OBS = remote-sim.o
+SIM = ../sim/sp64/libsim.a
diff --git a/gdb/config/sparc/sp64sol2.mt b/gdb/config/sparc/sp64sol2.mt
new file mode 100644
index 00000000000..ce2f0d82df0
--- /dev/null
+++ b/gdb/config/sparc/sp64sol2.mt
@@ -0,0 +1,3 @@
+# Target: Ultrasparc, running Solaris 2
+TDEPFILES= sparc-tdep.o
+TM_FILE= tm-sun4sol2.h
diff --git a/gdb/config/sparc/sparc-em.mt b/gdb/config/sparc/sparc-em.mt
new file mode 100644
index 00000000000..13b0c6a29e2
--- /dev/null
+++ b/gdb/config/sparc/sparc-em.mt
@@ -0,0 +1,3 @@
+# Target: SPARC embedded
+TDEPFILES= sparc-tdep.o
+TM_FILE= tm-spc-em.h
diff --git a/gdb/config/sparc/sparclet.mt b/gdb/config/sparc/sparclet.mt
new file mode 100644
index 00000000000..f08cfd70e5b
--- /dev/null
+++ b/gdb/config/sparc/sparclet.mt
@@ -0,0 +1,3 @@
+# Target: SPARC embedded Sparclet monitor
+TDEPFILES= sparc-tdep.o monitor.o sparclet-rom.o dsrec.o
+TM_FILE= tm-sparclet.h
diff --git a/gdb/config/sparc/sparclite.mt b/gdb/config/sparc/sparclite.mt
new file mode 100644
index 00000000000..43cb38cafa6
--- /dev/null
+++ b/gdb/config/sparc/sparclite.mt
@@ -0,0 +1,5 @@
+# Target: Fujitsu SPARClite processor
+TDEPFILES= sparc-tdep.o sparcl-tdep.o 
+TM_FILE= tm-sparclite.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/erc32/libsim.a
diff --git a/gdb/config/sparc/sparclynx.mh b/gdb/config/sparc/sparclynx.mh
new file mode 100644
index 00000000000..c573604b66a
--- /dev/null
+++ b/gdb/config/sparc/sparclynx.mh
@@ -0,0 +1,6 @@
+# Host: Sparc running LynxOS
+
+XM_CLIBS= -lbsd
+
+NAT_FILE= nm-sparclynx.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o lynx-nat.o
diff --git a/gdb/config/sparc/sparclynx.mt b/gdb/config/sparc/sparclynx.mt
new file mode 100644
index 00000000000..5e61645caaa
--- /dev/null
+++ b/gdb/config/sparc/sparclynx.mt
@@ -0,0 +1,3 @@
+# Target: Sparc running LynxOS
+TDEPFILES= coff-solib.o sparc-tdep.o
+TM_FILE= tm-sparclynx.h
diff --git a/gdb/config/sparc/sun4os4.mh b/gdb/config/sparc/sun4os4.mh
new file mode 100644
index 00000000000..4e664d71ccb
--- /dev/null
+++ b/gdb/config/sparc/sun4os4.mh
@@ -0,0 +1,9 @@
+# Host: Sun 4 or Sparcstation, running SunOS 4
+NAT_FILE= nm-sun4os4.h
+NATDEPFILES= fork-child.o infptrace.o inftarg.o corelow.o sparc-nat.o
+HOST_IPC=-DBSD_IPC
+
+# Setting XM_CLIBS=-lresolv would let us use the DNS, but that would screw
+# anyone who wants to use NIS, which includes at least one Cygnus customer
+# (PR 3593).  So leave it this way until/unless we find a resolver which can
+# get names from either DNS or NIS from the same GDB binary.
diff --git a/gdb/config/sparc/sun4os4.mt b/gdb/config/sparc/sun4os4.mt
new file mode 100644
index 00000000000..342d6f73537
--- /dev/null
+++ b/gdb/config/sparc/sun4os4.mt
@@ -0,0 +1,3 @@
+# Target: Sun 4 or Sparcstation, running SunOS 4
+TDEPFILES= sparc-tdep.o solib.o solib-sunos.o
+TM_FILE= tm-sun4os4.h
diff --git a/gdb/config/sparc/sun4sol2.mh b/gdb/config/sparc/sun4sol2.mh
new file mode 100644
index 00000000000..4e77b9234cd
--- /dev/null
+++ b/gdb/config/sparc/sun4sol2.mh
@@ -0,0 +1,22 @@
+# Host: Sun 4 or Sparcstation, running Solaris 2
+
+XM_FILE= xm-sun4sol2.h
+XM_CLIBS= -lsocket -lnsl
+
+NAT_FILE= nm-sun4sol2.h
+NATDEPFILES= corelow.o core-sol2.o solib.o solib-svr4.o solib-legacy.o \
+	fork-child.o procfs.o gcore.o \
+	proc-api.o proc-events.o proc-flags.o proc-why.o
+
+# /usr/include/v9 is needed only by core-sol2.c when including 
+# v9/sys/privregs.h, or rather the headers it in turn includes.
+MH_CFLAGS=-I/usr/include/v9
+# If you are compiling with Sun's compiler, add the -xs option to CC
+# (e.g. `make CC="cc -xs"').
+# Sun's compilers require the -xs option to produce debug information
+# in the final linked executable.  Otherwise they leave it in the .o
+# files only, with undocumented pointers to it in the linked executable.
+# This is commented out because we don't assume that the Sun compiler
+# is in use.
+#MH_CFLAGS=-xs -I/usr/include/v9
+HOST_IPC=-DBSD_IPC
diff --git a/gdb/config/sparc/sun4sol2.mt b/gdb/config/sparc/sun4sol2.mt
new file mode 100644
index 00000000000..af70e9f9f9f
--- /dev/null
+++ b/gdb/config/sparc/sun4sol2.mt
@@ -0,0 +1,3 @@
+# Target: Sun 4 or Sparcstation, running Solaris 2
+TDEPFILES= sparc-tdep.o
+TM_FILE= tm-sun4sol2.h
diff --git a/gdb/config/sparc/tm-fbsd.h b/gdb/config/sparc/tm-fbsd.h
new file mode 100644
index 00000000000..c84dfc4075b
--- /dev/null
+++ b/gdb/config/sparc/tm-fbsd.h
@@ -0,0 +1,34 @@
+/* Target-dependent definitions for FreeBSD/sparc64.
+   Copyright 2002 Free Software Foundation, Inc.
+   Contributed by David E. O'Brien <obrien@FreeBSD.org>.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#ifndef TM_FBSD_H
+#define TM_FBSD_H
+
+#define SVR4_SHARED_LIBS
+#include "solib.h"			/* Support for shared libraries. */
+#include "sparc/tm-sp64.h"
+
+/* Number of traps that happen between exec'ing the shell to run an
+   inferior, and when we finally get to the inferior code.  The
+   default is right for FreeBSD.  */
+
+#undef START_INFERIOR_TRAPS_EXPECTED
+
+#endif /* TM_FBSD_H */
diff --git a/gdb/config/sparc/tm-linux.h b/gdb/config/sparc/tm-linux.h
new file mode 100644
index 00000000000..34d901f5f9b
--- /dev/null
+++ b/gdb/config/sparc/tm-linux.h
@@ -0,0 +1,34 @@
+/* Macro definitions for GDB for a Sparc running GNU/Linux.
+
+   Copyright 1989, 1992, 1994, 1995, 1998, 1999, 2002 Free Software
+   Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_SPARCLINUX_H
+#define TM_SPARCLINUX_H
+
+#define GDB_MULTI_ARCH GDB_MULTI_ARCH_PARTIAL
+
+#include "sparc/tm-sparc.h"
+
+#define SIGCONTEXT_PC_OFFSET 12
+
+#include "tm-linux.h"
+
+#endif /* TM_SPARCLINUX_H */
diff --git a/gdb/config/sparc/tm-nbsd.h b/gdb/config/sparc/tm-nbsd.h
new file mode 100644
index 00000000000..289e705f0a9
--- /dev/null
+++ b/gdb/config/sparc/tm-nbsd.h
@@ -0,0 +1,26 @@
+/* Macro definitions for Sparc running under NetBSD.
+   Copyright 1994 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_NBSD_H
+#define TM_NBSD_H
+
+#include "sparc/tm-sparc.h"
+
+#endif /* TM_NBSD_H */
diff --git a/gdb/config/sparc/tm-nbsd64.h b/gdb/config/sparc/tm-nbsd64.h
new file mode 100644
index 00000000000..cc1d6b32297
--- /dev/null
+++ b/gdb/config/sparc/tm-nbsd64.h
@@ -0,0 +1,27 @@
+/* Macro definitions for UltraSPARC running under NetBSD.
+   Copyright 1994, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_NBSD64_H
+#define TM_NBSD64_H
+
+#include "sparc/tm-sp64.h" /* sets GDB_MULTI_ARCH */
+#include "solib.h"
+
+#endif /* TM_NBSD64_H */
diff --git a/gdb/config/sparc/tm-nbsdaout.h b/gdb/config/sparc/tm-nbsdaout.h
new file mode 100644
index 00000000000..a62e53551ea
--- /dev/null
+++ b/gdb/config/sparc/tm-nbsdaout.h
@@ -0,0 +1,30 @@
+/* Macro definitions for Sparc running under NetBSD.
+   Copyright 1994, 2002 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_NBSDAOUT_H
+#define TM_NBSDAOUT_H
+
+#include "sparc/tm-nbsd.h"
+
+/* Return non-zero if we are in a shared library trampoline code stub. */
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) \
+  (name && !strcmp(name, "_DYNAMIC"))
+
+#endif /* TM_NBSDAOUT_H */
diff --git a/gdb/config/sparc/tm-sp64.h b/gdb/config/sparc/tm-sp64.h
new file mode 100644
index 00000000000..8486c860831
--- /dev/null
+++ b/gdb/config/sparc/tm-sp64.h
@@ -0,0 +1,467 @@
+/* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger.
+   This is included by other tm-*.h files to define SPARC64 cpu-related info.
+   Copyright 1994, 1995, 1996, 1998, 1999, 2000
+   Free Software Foundation, Inc.
+   This is (obviously) based on the SPARC Vn (n<9) port.
+   Contributed by Doug Evans (dje@cygnus.com).
+   Further modified by Bob Manson (manson@cygnus.com).
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define GDB_MULTI_ARCH GDB_MULTI_ARCH_PARTIAL
+
+#ifndef GDB_TARGET_IS_SPARC64
+#define GDB_TARGET_IS_SPARC64 1
+#endif
+
+#include "sparc/tm-sparc.h"
+
+/* Eeeew. Ok, we have to assume (for now) that the processor really is
+   in sparc64 mode. While this is the same instruction sequence as
+   on the Sparc, the stack frames are offset by +2047 (and the arguments
+   are 8 bytes instead of 4). */
+/* Instructions are:
+   std  %f10, [ %fp + 0x7a7 ]
+   std  %f8, [ %fp + 0x79f ]
+   std  %f6, [ %fp + 0x797 ]
+   std  %f4, [ %fp + 0x78f ]
+   std  %f2, [ %fp + 0x787 ]
+   std  %f0, [ %fp + 0x77f ]
+   std  %g6, [ %fp + 0x777 ]
+   std  %g4, [ %fp + 0x76f ]
+   std  %g2, [ %fp + 0x767 ]
+   std  %g0, [ %fp + 0x75f ]
+   std  %fp, [ %fp + 0x757 ]
+   std  %i4, [ %fp + 0x74f ]
+   std  %i2, [ %fp + 0x747 ]
+   std  %i0, [ %fp + 0x73f ]
+   nop
+   nop
+   nop
+   nop
+   rd  %tbr, %o0
+   st  %o0, [ %fp + 0x72b ]
+   rd  %tpc, %o0
+   st  %o0, [ %fp + 0x727 ]
+   rd  %psr, %o0
+   st  %o0, [ %fp + 0x723 ]
+   rd  %y, %o0
+   st  %o0, [ %fp + 0x71f ]
+   ldx  [ %sp + 0x8a7 ], %o5
+   ldx  [ %sp + 0x89f ], %o4
+   ldx  [ %sp + 0x897 ], %o3
+   ldx  [ %sp + 0x88f ], %o2
+   ldx  [ %sp + 0x887 ], %o1
+   call  %g0
+   ldx  [ %sp + 0x87f ], %o0
+   nop
+   ta  1
+   nop
+   nop
+ */
+
+#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
+/*
+ * The following defines must go away for MULTI_ARCH.
+ */
+
+#ifndef DO_CALL_DUMMY_ON_STACK
+
+/*
+ * These defines will suffice for the AT_ENTRY_POINT call dummy method.
+ */
+
+#undef  CALL_DUMMY
+#define CALL_DUMMY {0}
+#undef  CALL_DUMMY_LENGTH
+#define CALL_DUMMY_LENGTH 0
+#undef  CALL_DUMMY_CALL_OFFSET
+#define CALL_DUMMY_CALL_OFFSET 0
+#undef  CALL_DUMMY_START_OFFSET
+#define CALL_DUMMY_START_OFFSET 0
+#undef  CALL_DUMMY_BREAKPOINT_OFFSET
+#define CALL_DUMMY_BREAKPOINT_OFFSET 0
+#undef  CALL_DUMMY_BREAKPOINT_OFFSET_P
+#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
+#undef  CALL_DUMMY_LOCATION 
+#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
+#undef  CALL_DUMMY_STACK_ADJUST
+#define CALL_DUMMY_STACK_ADJUST 128
+#undef  SIZEOF_CALL_DUMMY_WORDS
+#define SIZEOF_CALL_DUMMY_WORDS 0
+#undef  CALL_DUMMY_ADDRESS
+#define CALL_DUMMY_ADDRESS() entry_point_address()
+#undef  FIX_CALL_DUMMY
+#define FIX_CALL_DUMMY(DUMMYNAME, PC, FUN, NARGS, ARGS, TYPE, GCC_P) 
+#undef  PUSH_RETURN_ADDRESS
+#define PUSH_RETURN_ADDRESS(PC, SP) sparc_at_entry_push_return_address (PC, SP)
+extern CORE_ADDR 
+sparc_at_entry_push_return_address (CORE_ADDR pc, CORE_ADDR sp);
+
+#undef  STORE_STRUCT_RETURN
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+     sparc_at_entry_store_struct_return (ADDR, SP)
+extern void 
+sparc_at_entry_store_struct_return (CORE_ADDR addr, CORE_ADDR sp);
+
+
+#else
+/*
+ * Old call dummy method, with CALL_DUMMY on the stack.
+ */
+
+#undef  CALL_DUMMY
+#define CALL_DUMMY {		 0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,\
+				 0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,\
+				 0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,\
+				 0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,\
+				 0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,\
+				 0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,\
+				 0xf03fa73f01000000LL, 0x0100000001000000LL,\
+				 0x0100000091580000LL, 0xd027a72b93500000LL,\
+				 0xd027a72791480000LL, 0xd027a72391400000LL,\
+				 0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,\
+				 0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,\
+				 0x0100000091d02001LL, 0x0100000001000000LL }
+
+
+/* 128 is to reserve space to write the %i/%l registers that will be restored
+   when we resume. */
+#undef  CALL_DUMMY_STACK_ADJUST
+#define CALL_DUMMY_STACK_ADJUST 128
+
+/* Size of the call dummy in bytes. */
+#undef  CALL_DUMMY_LENGTH
+#define CALL_DUMMY_LENGTH 192
+
+/* Offset within CALL_DUMMY of the 'call' instruction. */
+#undef  CALL_DUMMY_START_OFFSET
+#define CALL_DUMMY_START_OFFSET 148
+
+/* Offset within CALL_DUMMY of the 'call' instruction. */
+#undef  CALL_DUMMY_CALL_OFFSET
+#define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + (5 * 4))
+
+/* Offset within CALL_DUMMY of the 'ta 1' instruction. */
+#undef  CALL_DUMMY_BREAKPOINT_OFFSET
+#define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + (8 * 4))
+
+/* Let's GDB know that it can make a call_dummy breakpoint.  */
+#undef  CALL_DUMMY_BREAKPOINT_OFFSET_P
+#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
+
+/* Call dummy will be located on the stack.  */
+#undef  CALL_DUMMY_LOCATION
+#define CALL_DUMMY_LOCATION ON_STACK
+
+/* Insert the function address into the call dummy.  */
+#undef  FIX_CALL_DUMMY
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
+ sparc_fix_call_dummy (dummyname, pc, fun, type, gcc_p)
+void sparc_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
+			   struct type *value_type, int using_gcc);
+
+
+/* The remainder of these will accept the default definition.  */
+#undef  SIZEOF_CALL_DUMMY_WORDS
+#undef  PUSH_RETURN_ADDRESS
+#undef  CALL_DUMMY_ADDRESS
+#undef  STORE_STRUCT_RETURN
+
+#endif
+
+/* Does the specified function use the "struct returning" convention
+   or the "value returning" convention?  The "value returning" convention
+   almost invariably returns the entire value in registers.  The
+   "struct returning" convention often returns the entire value in
+   memory, and passes a pointer (out of or into the function) saying
+   where the value (is or should go).
+
+   Since this sometimes depends on whether it was compiled with GCC,
+   this is also an argument.  This is used in call_function to build a
+   stack, and in value_being_returned to print return values. 
+
+   On Sparc64, we only pass pointers to structs if they're larger than
+   32 bytes. Otherwise they're stored in %o0-%o3 (floating-point
+   values go into %fp0-%fp3).  */
+
+#undef  USE_STRUCT_CONVENTION
+#define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32)
+
+CORE_ADDR sparc64_push_arguments (int,
+				  struct value **, CORE_ADDR, int, CORE_ADDR);
+#undef PUSH_ARGUMENTS
+#define PUSH_ARGUMENTS(A,B,C,D,E) \
+     (sparc64_push_arguments ((A), (B), (C), (D), (E)))
+
+/* Store the address of the place in which to copy the structure the
+   subroutine will return.  This is called from call_function. */
+/* FIXME: V9 uses %o0 for this.  */
+
+#undef  STORE_STRUCT_RETURN
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+  { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }
+
+/* Stack must be aligned on 128-bit boundaries when synthesizing
+   function calls. */
+
+#undef  STACK_ALIGN
+#define STACK_ALIGN(ADDR) (((ADDR) + 15 ) & -16)
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+/* Some of these registers are only accessible from priviledged mode.
+   They are here for kernel debuggers, etc.  */
+/* FIXME: icc and xcc are currently considered separate registers.
+   This may have to change and consider them as just one (ccr).
+   Let's postpone this as long as we can.  It's nice to be able to set
+   them individually.  */
+/* FIXME: fcc0-3 are currently separate, even though they are also part of
+   fsr.  May have to remove them but let's postpone this as long as
+   possible.  It's nice to be able to set them individually.  */
+/* FIXME: Whether to include f33, f35, etc. here is not clear.
+   There are advantages and disadvantages.  */
+
+#undef  REGISTER_NAMES
+#define REGISTER_NAMES  \
+{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",	\
+  "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",	\
+  "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",	\
+  "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",	\
+								\
+  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",		\
+  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",		\
+  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",	\
+  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",	\
+  "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",	\
+  "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",	\
+                                                                \
+  "pc", "npc", "ccr", "fsr", "fprs", "y", "asi",		\
+  "ver", "tick", "pil", "pstate",				\
+  "tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate",		\
+  "cwp", "cansave", "canrestore", "cleanwin", "otherwin",	\
+  "asr16", "asr17", "asr18", "asr19", "asr20", "asr21",		\
+  "asr22", "asr23", "asr24", "asr25", "asr26", "asr27",		\
+  "asr28", "asr29", "asr30", "asr31",				\
+  /* These are here at the end to simplify removing them if we have to.  */ \
+  "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3"			\
+}
+
+#undef REG_STRUCT_HAS_ADDR
+#define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32)
+
+extern CORE_ADDR sparc64_read_sp ();
+extern CORE_ADDR sparc64_read_fp ();
+extern void sparc64_write_sp (CORE_ADDR);
+
+#define TARGET_READ_SP() (sparc64_read_sp ())
+#define TARGET_READ_FP() (sparc64_read_fp ())
+#define TARGET_WRITE_SP(X) (sparc64_write_sp (X))
+
+#undef EXTRACT_RETURN_VALUE
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+     sp64_extract_return_value(TYPE, REGBUF, VALBUF, 0)
+extern void sp64_extract_return_value (struct type *, char[], char *, int);
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#if 0				/* defined in tm-sparc.h, replicated
+				   for doc purposes */
+#define	G0_REGNUM 0		/* %g0 */
+#define	G1_REGNUM 1		/* %g1 */
+#define O0_REGNUM 8		/* %o0 */
+#define	SP_REGNUM 14		/* Contains address of top of stack, \
+				   which is also the bottom of the frame.  */
+#define	RP_REGNUM 15		/* Contains return address value, *before* \
+				   any windows get switched.  */
+#define	O7_REGNUM 15		/* Last local reg not saved on stack frame */
+#define	L0_REGNUM 16		/* First local reg that's saved on stack frame
+				   rather than in machine registers */
+#define	I0_REGNUM 24		/* %i0 */
+#define	FP_REGNUM 30		/* Contains address of executing stack frame */
+#define	I7_REGNUM 31		/* Last local reg saved on stack frame */
+#define	FP0_REGNUM 32		/* Floating point register 0 */
+#endif
+
+/*#define FP_MAX_REGNUM 80*/	/* 1 + last fp reg number */
+
+/* #undef v8 misc. regs */
+
+#undef Y_REGNUM
+#undef PS_REGNUM
+#undef WIM_REGNUM
+#undef TBR_REGNUM
+#undef PC_REGNUM
+#undef NPC_REGNUM
+#undef FPS_REGNUM
+#undef CPS_REGNUM
+
+/* v9 misc. and priv. regs */
+
+#define C0_REGNUM 80			/* Start of control registers */
+
+#define PC_REGNUM (C0_REGNUM + 0)	/* Current PC */
+#define NPC_REGNUM (C0_REGNUM + 1)	/* Next PC */
+#define CCR_REGNUM (C0_REGNUM + 2)	/* Condition Code Register (%xcc,%icc) */
+#define FSR_REGNUM (C0_REGNUM + 3)	/* Floating Point State */
+#define FPRS_REGNUM (C0_REGNUM + 4)	/* Floating Point Registers State */
+#define	Y_REGNUM (C0_REGNUM + 5)	/* Temp register for multiplication, etc.  */
+#define ASI_REGNUM (C0_REGNUM + 6)	/* Alternate Space Identifier */
+#define VER_REGNUM (C0_REGNUM + 7)	/* Version register */
+#define TICK_REGNUM (C0_REGNUM + 8)	/* Tick register */
+#define PIL_REGNUM (C0_REGNUM + 9)	/* Processor Interrupt Level */
+#define PSTATE_REGNUM (C0_REGNUM + 10)	/* Processor State */
+#define TSTATE_REGNUM (C0_REGNUM + 11)	/* Trap State */
+#define TBA_REGNUM (C0_REGNUM + 12)	/* Trap Base Address */
+#define TL_REGNUM (C0_REGNUM + 13)	/* Trap Level */
+#define TT_REGNUM (C0_REGNUM + 14)	/* Trap Type */
+#define TPC_REGNUM (C0_REGNUM + 15)	/* Trap pc */
+#define TNPC_REGNUM (C0_REGNUM + 16)	/* Trap npc */
+#define WSTATE_REGNUM (C0_REGNUM + 17)	/* Window State */
+#define CWP_REGNUM (C0_REGNUM + 18)	/* Current Window Pointer */
+#define CANSAVE_REGNUM (C0_REGNUM + 19)		/* Savable Windows */
+#define CANRESTORE_REGNUM (C0_REGNUM + 20)	/* Restorable Windows */
+#define CLEANWIN_REGNUM (C0_REGNUM + 21)	/* Clean Windows */
+#define OTHERWIN_REGNUM (C0_REGNUM + 22)	/* Other Windows */
+#define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n))	/* Ancillary State Register
+						   (n = 16...31) */
+#define ICC_REGNUM (C0_REGNUM + 39)	/* 32 bit condition codes */
+#define XCC_REGNUM (C0_REGNUM + 40)	/* 64 bit condition codes */
+#define FCC0_REGNUM (C0_REGNUM + 41)	/* fp cc reg 0 */
+#define FCC1_REGNUM (C0_REGNUM + 42)	/* fp cc reg 1 */
+#define FCC2_REGNUM (C0_REGNUM + 43)	/* fp cc reg 2 */
+#define FCC3_REGNUM (C0_REGNUM + 44)	/* fp cc reg 3 */
+
+/* Number of machine registers.  */
+
+#undef  NUM_REGS
+#define NUM_REGS 125
+
+/* Total amount of space needed to store our copies of the machine's
+   register state, the array `registers'.
+   Some of the registers aren't 64 bits, but it's a lot simpler just to assume
+   they all are (since most of them are).  */
+#undef  REGISTER_BYTES
+#define REGISTER_BYTES (32*8+32*8+45*8)
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+#undef  REGISTER_BYTE
+#define REGISTER_BYTE(N) \
+  ((N) < 32 ? (N)*8				\
+   : (N) < 64 ? 32*8 + ((N)-32)*4		\
+   : (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8	\
+   : 64*8 + ((N)-C0_REGNUM)*8)
+
+/* Say how long (ordinary) registers are.  This is a piece of bogosity
+   used in push_word and a few other places; REGISTER_RAW_SIZE is the
+   real way to know how big a register is.  */
+
+#undef  REGISTER_SIZE
+#define REGISTER_SIZE 8
+
+/* Number of bytes of storage in the actual machine representation
+   for register N.  */
+
+#undef  REGISTER_RAW_SIZE
+#define REGISTER_RAW_SIZE(N) \
+  ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
+
+/* Number of bytes of storage in the program's representation
+   for register N.  */
+
+#undef  REGISTER_VIRTUAL_SIZE
+#define REGISTER_VIRTUAL_SIZE(N) \
+  ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+/* tm-sparc.h defines this as 8, but play it safe.  */
+
+#undef  MAX_REGISTER_RAW_SIZE
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+/* tm-sparc.h defines this as 8, but play it safe.  */
+
+#undef  MAX_REGISTER_VIRTUAL_SIZE
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+
+#undef  REGISTER_VIRTUAL_TYPE
+#define REGISTER_VIRTUAL_TYPE(N) \
+ ((N) < 32 ? builtin_type_long_long \
+  : (N) < 64 ? builtin_type_float \
+  : (N) < 80 ? builtin_type_double \
+  : builtin_type_long_long)
+
+/* We use to support both 32 bit and 64 bit pointers.
+   We can't anymore because TARGET_PTR_BIT must now be a constant.  */
+#undef  TARGET_PTR_BIT
+#define TARGET_PTR_BIT 64
+
+/* Longs are 64 bits. */
+#undef TARGET_LONG_BIT
+#define TARGET_LONG_BIT 64
+
+#undef TARGET_LONG_LONG_BIT
+#define TARGET_LONG_LONG_BIT 64
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#undef  FRAME_ARGS_SKIP
+#define FRAME_ARGS_SKIP 136
+
+#endif /* GDB_MULTI_ARCH */
+
+/* Offsets into jmp_buf.
+   FIXME: This was borrowed from the v8 stuff and will probably have to change
+   for v9.  */
+
+#define JB_ELEMENT_SIZE 8	/* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land.  We expect that we have
+   just entered longjmp and haven't yet setup the stack frame, so the
+   args are still in the output regs.  %o0 (O0_REGNUM) points at the
+   jmp_buf structure from which we extract the pc (JB_PC) that we will
+   land at.  The pc is copied into ADDR.  This routine returns true on
+   success */
+
+extern int get_longjmp_target (CORE_ADDR *);
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+
+#undef TM_PRINT_INSN_MACH
+#define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a
+
diff --git a/gdb/config/sparc/tm-sp64linux.h b/gdb/config/sparc/tm-sp64linux.h
new file mode 100644
index 00000000000..56b56208652
--- /dev/null
+++ b/gdb/config/sparc/tm-sp64linux.h
@@ -0,0 +1,36 @@
+/* Macro definitions for GDB for a UltraSparc running GNU/Linux.
+
+   Copyright 2001, 2002 Free Software Foundation, Inc.
+
+This file is part of GDB.
+
+This program is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_SPARC_LIN64_H
+#define TM_SPARC_LIN64_H
+
+#include "sparc/tm-sp64.h"
+
+#define SIGCONTEXT_PC_OFFSET 16  /* See asm-sparc64/sigcontext.h */
+
+/* We always want full V9 + Ultra VIS stuff... */
+#undef TM_PRINT_INSN_MACH
+#define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a
+
+#define GDB_PTRACE_REGS64
+
+#include "tm-sysv4.h"
+
+#endif TM_SPARC_LIN64_H
diff --git a/gdb/config/sparc/tm-sp64sim.h b/gdb/config/sparc/tm-sp64sim.h
new file mode 100644
index 00000000000..c8d115cd635
--- /dev/null
+++ b/gdb/config/sparc/tm-sp64sim.h
@@ -0,0 +1,50 @@
+/* Macro definitions for GDB with the SPARC64 Simulator.
+   Copyright 1993, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* ??? This file is based on tm-spc-em.h.  Our contents are probably bogus
+   but it's a good start.  */
+
+#include "sparc/tm-sp64.h"
+#include "tm-sunos.h"
+
+/* Offsets into jmp_buf.  Not defined by Sun, but at least documented in a
+   comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 8	/* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land.  We expect that we have just entered
+   longjmp and haven't yet setup the stack frame, so the args are still in the
+   output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+   extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int get_longjmp_target (CORE_ADDR *);
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
diff --git a/gdb/config/sparc/tm-sparc.h b/gdb/config/sparc/tm-sparc.h
new file mode 100644
index 00000000000..4a5358036be
--- /dev/null
+++ b/gdb/config/sparc/tm-sparc.h
@@ -0,0 +1,766 @@
+/* Target machine sub-parameters for SPARC, for GDB, the GNU debugger.
+   This is included by other tm-*.h files to define SPARC cpu-related info.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
+   1998, 1999, 2000
+   Free Software Foundation, Inc.
+   Contributed by Michael Tiemann (tiemann@mcc.com)
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+struct type;
+struct value;
+struct frame_info;
+
+/*
+ * The following enums are purely for the convenience of the GDB 
+ * developer, when debugging GDB.
+ */
+
+enum {	/* Sparc general registers, for all sparc versions.  */
+  G0_REGNUM, G1_REGNUM, G2_REGNUM, G3_REGNUM, 
+  G4_REGNUM, G5_REGNUM, G6_REGNUM, G7_REGNUM, 
+  O0_REGNUM, O1_REGNUM, O2_REGNUM, O3_REGNUM, 
+  O4_REGNUM, O5_REGNUM, O6_REGNUM, O7_REGNUM,
+  L0_REGNUM, L1_REGNUM, L2_REGNUM, L3_REGNUM, 
+  L4_REGNUM, L5_REGNUM, L6_REGNUM, L7_REGNUM, 
+  I0_REGNUM, I1_REGNUM, I2_REGNUM, I3_REGNUM, 
+  I4_REGNUM, I5_REGNUM, I6_REGNUM, I7_REGNUM,
+  FP0_REGNUM 		/* Floating point register 0 */
+};
+
+enum {	/* Sparc general registers, alternate names.  */
+  R0_REGNUM,  R1_REGNUM,  R2_REGNUM,  R3_REGNUM, 
+  R4_REGNUM,  R5_REGNUM,  R6_REGNUM,  R7_REGNUM, 
+  R8_REGNUM,  R9_REGNUM,  R10_REGNUM, R11_REGNUM, 
+  R12_REGNUM, R13_REGNUM, R14_REGNUM, R15_REGNUM, 
+  R16_REGNUM, R17_REGNUM, R18_REGNUM, R19_REGNUM, 
+  R20_REGNUM, R21_REGNUM, R22_REGNUM, R23_REGNUM, 
+  R24_REGNUM, R25_REGNUM, R26_REGNUM, R27_REGNUM, 
+  R28_REGNUM, R29_REGNUM, R30_REGNUM, R31_REGNUM
+};
+
+enum {			/* Sparc32 control registers.  */
+  PS_REGNUM  = 65, 	/* PC, NPC, and Y are omitted because */
+  WIM_REGNUM = 66,	/* they have different values depending on */
+  TBR_REGNUM = 67,	/* 32-bit / 64-bit mode.  */
+  FPS_REGNUM = 70,
+  CPS_REGNUM = 71
+};
+
+/* v9 misc. and priv. regs */
+
+/* Note: specifying values explicitly for documentation purposes.  */
+enum {	/* Sparc64 control registers, excluding Y, PC, and NPC.  */
+  CCR_REGNUM = 82,		/* Condition Code Register (%xcc,%icc) */
+  FSR_REGNUM = 83,		/* Floating Point State */
+  FPRS_REGNUM = 84,		/* Floating Point Registers State */
+  ASI_REGNUM = 86,		/* Alternate Space Identifier */
+  VER_REGNUM = 87,		/* Version register */
+  TICK_REGNUM = 88,		/* Tick register */
+  PIL_REGNUM = 89, 		/* Processor Interrupt Level */
+  PSTATE_REGNUM = 90,		/* Processor State */
+  TSTATE_REGNUM = 91,		/* Trap State */
+  TBA_REGNUM = 92,		/* Trap Base Address */
+  TL_REGNUM = 93,		/* Trap Level */
+  TT_REGNUM = 94,		/* Trap Type */
+  TPC_REGNUM = 95,		/* Trap pc */
+  TNPC_REGNUM = 96,		/* Trap npc */
+  WSTATE_REGNUM = 97,		/* Window State */
+  CWP_REGNUM = 98,		/* Current Window Pointer */
+  CANSAVE_REGNUM = 99,		/* Savable Windows */
+  CANRESTORE_REGNUM = 100,	/* Restorable Windows */
+  CLEANWIN_REGNUM = 101,	/* Clean Windows */
+  OTHERWIN_REGNUM = 102,	/* Other Windows */
+  ASR16_REGNUM = 103,		/* Ancillary State Registers */
+  ASR17_REGNUM = 104,
+  ASR18_REGNUM = 105,
+  ASR19_REGNUM = 106,
+  ASR20_REGNUM = 107,
+  ASR21_REGNUM = 108,
+  ASR22_REGNUM = 109,
+  ASR23_REGNUM = 110,
+  ASR24_REGNUM = 111,
+  ASR25_REGNUM = 112,
+  ASR26_REGNUM = 113,
+  ASR27_REGNUM = 114,
+  ASR28_REGNUM = 115,
+  ASR29_REGNUM = 116,
+  ASR30_REGNUM = 117,
+  ASR31_REGNUM = 118,
+  ICC_REGNUM   = 119,		/* 32 bit condition codes */
+  XCC_REGNUM   = 120,		/* 64 bit condition codes */
+  FCC0_REGNUM  = 121,		/* fp cc reg 0 */
+  FCC1_REGNUM  = 122,		/* fp cc reg 1 */
+  FCC2_REGNUM  = 123,		/* fp cc reg 2 */
+  FCC3_REGNUM  = 124		/* fp cc reg 3 */
+};
+
+/*
+ * Make sparc target multi-archable: April 2000
+ */
+
+#if defined (GDB_MULTI_ARCH) && (GDB_MULTI_ARCH > 0)
+
+/* Multi-arch definition of TARGET_IS_SPARC64, TARGET_ELF64 */
+#undef  GDB_TARGET_IS_SPARC64
+#define GDB_TARGET_IS_SPARC64 \
+     (sparc_intreg_size () == 8)
+#undef  TARGET_ELF64
+#define TARGET_ELF64 \
+     (sparc_intreg_size () == 8)
+extern int sparc_intreg_size (void);
+#else
+
+/* Non-multi-arch: if it isn't defined, define it to zero.  */
+#ifndef GDB_TARGET_IS_SPARC64
+#define GDB_TARGET_IS_SPARC64 0
+#endif
+#ifndef TARGET_ELF64
+#define TARGET_ELF64 0
+#endif
+#endif
+
+#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
+/*
+ * The following defines must go away for MULTI_ARCH
+ */
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+
+#define REGISTER_NAMES  \
+{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",		\
+  "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",		\
+  "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",		\
+  "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",		\
+								\
+  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",		\
+  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",		\
+  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",	\
+  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",	\
+                                                                \
+  "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr" 	\
+}
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Amount PC must be decremented by after a breakpoint.
+   This is often the number of bytes in BREAKPOINT
+   but not always.  */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long (ordinary) registers are.  This is a piece of bogosity
+   used in push_word and a few other places; REGISTER_RAW_SIZE is the
+   real way to know how big a register is.  */
+
+#define REGISTER_SIZE 4
+
+/* Number of machine registers */
+
+#define NUM_REGS 72
+
+#define	SP_REGNUM 14		/* Contains address of top of stack, \
+				   which is also the bottom of the frame.  */
+#define	FP_REGNUM 30		/* Contains address of executing stack frame */
+
+#define	FP0_REGNUM 32		/* Floating point register 0 */
+
+#define	Y_REGNUM 64		/* Temp register for multiplication, etc.  */
+
+#define	PC_REGNUM 68		/* Contains program counter */
+
+#define	NPC_REGNUM 69		/* Contains next PC */
+
+
+/* Total amount of space needed to store our copies of the machine's
+   register state, the array `registers'.  On the sparc, `registers'
+   contains the ins and locals, even though they are saved on the
+   stack rather than with the other registers, and this causes hair
+   and confusion in places like pop_frame.  It might be better to
+   remove the ins and locals from `registers', make sure that
+   get_saved_register can get them from the stack (even in the
+   innermost frame), and make this the way to access them.  For the
+   frame pointer we would do that via TARGET_READ_FP.  On the other
+   hand, that is likely to be confusing or worse for flat frames.  */
+
+#define REGISTER_BYTES (32*4+32*4+8*4)
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+
+#define REGISTER_BYTE(N)  ((N)*4)
+
+/* Number of bytes of storage in the actual machine representation for
+   register N.  */
+
+/* On the SPARC, all regs are 4 bytes (except Sparc64, where they're 8).  */
+
+#define REGISTER_RAW_SIZE(N) (4)
+
+/* Number of bytes of storage in the program's representation
+   for register N.  */
+
+/* On the SPARC, all regs are 4 bytes (except Sparc64, where they're 8).  */
+
+#define REGISTER_VIRTUAL_SIZE(N) (4)
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+
+#define MAX_REGISTER_RAW_SIZE 8
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 8
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+     ((N) < 32 ? builtin_type_int : (N) < 64 ? builtin_type_float : \
+      builtin_type_int)
+
+/* Sun /bin/cc gets this right as of SunOS 4.1.x.  We need to define
+   BELIEVE_PCC_PROMOTION to get this right now that the code which
+   detects gcc2_compiled. is broken.  This loses for SunOS 4.0.x and
+   earlier.  */
+
+#define BELIEVE_PCC_PROMOTION 1
+
+/* Advance PC across any function entry prologue instructions
+   to reach some "real" code.  */
+
+extern CORE_ADDR sparc_skip_prologue (CORE_ADDR);
+#define SKIP_PROLOGUE(PC) sparc_skip_prologue (PC)
+
+/* Immediately after a function call, return the saved pc.
+   Can't go through the frames for this because on some machines
+   the new frame is not set up until the new function executes
+   some instructions.  */
+
+#define SAVED_PC_AFTER_CALL(FRAME) PC_ADJUST (read_register (RP_REGNUM))
+
+/* Stack grows downward.  */
+
+#define INNER_THAN(LHS,RHS) ((LHS) < (RHS))
+
+/* Write into appropriate registers a function return value of type
+   TYPE, given in virtual format.  */
+
+#define STORE_RETURN_VALUE(TYPE, VALBUF) \
+     sparc_store_return_value (TYPE, VALBUF)
+extern void sparc_store_return_value (struct type *, char *);
+
+/* Extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one).  */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
+     sparc_extract_struct_value_address (REGBUF)
+
+extern CORE_ADDR sparc_extract_struct_value_address (char *);
+
+/* If the current gcc for for this target does not produce correct
+   debugging information for float parameters, both prototyped and
+   unprototyped, then define this macro.  This forces gdb to always
+   assume that floats are passed as doubles and then converted in the
+   callee. */
+
+#define COERCE_FLOAT_TO_DOUBLE(FORMAL, ACTUAL) (1)
+
+/* Stack must be aligned on 64-bit boundaries when synthesizing
+   function calls (128-bit for sparc64).  */
+
+#define STACK_ALIGN(ADDR) sparc32_stack_align (ADDR)
+extern CORE_ADDR sparc32_stack_align (CORE_ADDR addr);
+
+/* The Sparc returns long doubles on the stack.  */
+
+#define RETURN_VALUE_ON_STACK(TYPE) \
+  (TYPE_CODE(TYPE) == TYPE_CODE_FLT \
+   && TYPE_LENGTH(TYPE) > 8)
+
+/* When passing a structure to a function, Sun cc passes the address
+   not the structure itself.  It (under SunOS4) creates two symbols,
+   which we need to combine to a LOC_REGPARM.  Gcc version two (as of
+   1.92) behaves like sun cc.  REG_STRUCT_HAS_ADDR is smart enough to
+   distinguish between Sun cc, gcc version 1 and gcc version 2.  */
+
+#define REG_STRUCT_HAS_ADDR(GCC_P, TYPE) \
+     sparc_reg_struct_has_addr (GCC_P, TYPE)
+extern int sparc_reg_struct_has_addr (int, struct type *);
+
+/* Is the prologue at PC frameless?  */
+#define PROLOGUE_FRAMELESS_P(PC) sparc_prologue_frameless_p (PC)
+extern int sparc_prologue_frameless_p (CORE_ADDR);
+
+#endif /* GDB_MULTI_ARCH */
+
+#if defined (GDB_MULTI_ARCH) && (GDB_MULTI_ARCH > 0)
+/*
+ * The following defines should ONLY appear for MULTI_ARCH.
+ */
+
+/* Multi-arch the nPC and Y registers.  */
+#define Y_REGNUM              (sparc_y_regnum ())
+extern int sparc_npc_regnum (void);
+extern int sparc_y_regnum (void);
+
+#endif /* GDB_MULTI_ARCH */
+
+/* On the Sun 4 under SunOS, the compile will leave a fake insn which
+   encodes the structure size being returned.  If we detect such
+   a fake insn, step past it.  */
+
+#define PC_ADJUST(PC) sparc_pc_adjust (PC)
+extern CORE_ADDR sparc_pc_adjust (CORE_ADDR);
+
+/* If an argument is declared "register", Sun cc will keep it in a register,
+   never saving it onto the stack.  So we better not believe the "p" symbol
+   descriptor stab.  */
+
+#define USE_REGISTER_NOT_ARG
+
+/* For acc, there's no need to correct LBRAC entries by guessing how
+   they should work.  In fact, this is harmful because the LBRAC
+   entries now all appear at the end of the function, not intermixed
+   with the SLINE entries.  n_opt_found detects acc for Solaris binaries;
+   function_stab_type detects acc for SunOS4 binaries.
+
+   For binary from SunOS4 /bin/cc, need to correct LBRAC's.
+
+   For gcc, like acc, don't correct.  */
+
+#define	SUN_FIXED_LBRAC_BUG \
+  (n_opt_found \
+   || function_stab_type == N_STSYM \
+   || function_stab_type == N_GSYM \
+   || processing_gcc_compilation)
+
+/* Do variables in the debug stabs occur after the N_LBRAC or before it?
+   acc: after, gcc: before, SunOS4 /bin/cc: before.  */
+
+#define VARIABLES_INSIDE_BLOCK(desc, gcc_p) \
+  (!(gcc_p) \
+   && (n_opt_found \
+       || function_stab_type == N_STSYM \
+       || function_stab_type == N_GSYM))
+
+/* Sequence of bytes for breakpoint instruction (ta 1). */
+
+#define BREAKPOINT {0x91, 0xd0, 0x20, 0x01}
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define	G0_REGNUM 0		/* %g0 */
+#define	G1_REGNUM 1		/* %g1 */
+#define O0_REGNUM 8		/* %o0 */
+#define	RP_REGNUM 15		/* Contains return address value, *before* \
+				   any windows get switched.  */
+#define	O7_REGNUM 15		/* Last local reg not saved on stack frame */
+#define	L0_REGNUM 16		/* First local reg that's saved on stack frame
+				   rather than in machine registers */
+#define	I0_REGNUM 24		/* %i0 */
+#define	I7_REGNUM 31		/* Last local reg saved on stack frame */
+#define	PS_REGNUM 65		/* Contains processor status */
+#define PS_FLAG_CARRY 0x100000	/* Carry bit in PS */
+#define	WIM_REGNUM 66		/* Window Invalid Mask (not really supported) */
+#define	TBR_REGNUM 67		/* Trap Base Register (not really supported) */
+#define	FPS_REGNUM 70		/* Floating point status register */
+#define	CPS_REGNUM 71		/* Coprocessor status register */
+
+/* Writing to %g0 is a noop (not an error or exception or anything like
+   that, however).  */
+
+#define CANNOT_STORE_REGISTER(regno) ((regno) == G0_REGNUM)
+
+/*
+ * FRAME_CHAIN and FRAME_INFO definitions, collected here for convenience.
+ */
+
+#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
+/*
+ * The following defines must go away for MULTI_ARCH.
+ */
+
+/* Describe the pointer in each stack frame to the previous stack frame
+   (its caller).  */
+
+/* FRAME_CHAIN takes a frame's nominal address
+   and produces the frame's chain-pointer. */
+
+/* In the case of the Sun 4, the frame-chain's nominal address
+   is held in the frame pointer register.
+
+   On the Sun4, the frame (in %fp) is %sp for the previous frame.
+   From the previous frame's %sp, we can find the previous frame's
+   %fp: it is in the save area just above the previous frame's %sp.
+
+   If we are setting up an arbitrary frame, we'll need to know where
+   it ends.  Hence the following.  This part of the frame cache
+   structure should be checked before it is assumed that this frame's
+   bottom is in the stack pointer.
+
+   If there isn't a frame below this one, the bottom of this frame is
+   in the stack pointer.
+
+   If there is a frame below this one, and the frame pointers are
+   identical, it's a leaf frame and the bottoms are the same also.
+
+   Otherwise the bottom of this frame is the top of the next frame.
+
+   The bottom field is misnamed, since it might imply that memory from
+   bottom to frame contains this frame.  That need not be true if
+   stack frames are allocated in different segments (e.g. some on a
+   stack, some on a heap in the data segment).
+
+   GCC 2.6 and later can generate ``flat register window'' code that
+   makes frames by explicitly saving those registers that need to be
+   saved.  %i7 is used as the frame pointer, and the frame is laid out
+   so that flat and non-flat calls can be intermixed freely within a
+   program.  Unfortunately for GDB, this means it must detect and
+   record the flatness of frames.
+
+   Since the prologue in a flat frame also tells us where fp and pc
+   have been stashed (the frame is of variable size, so their location
+   is not fixed), it's convenient to record them in the frame info.  */
+
+#define EXTRA_FRAME_INFO \
+  CORE_ADDR bottom;      \
+  int in_prologue;       \
+  int flat;              \
+  /* Following fields only relevant for flat frames.  */ \
+  CORE_ADDR pc_addr;     \
+  CORE_ADDR fp_addr;     \
+  /* Add this to ->frame to get the value of the stack pointer at the */ \
+  /* time of the register saves.  */ \
+  int sp_offset;
+
+/* We need to override GET_SAVED_REGISTER so that we can deal with the
+   way outs change into ins in different frames.  */
+
+void sparc_get_saved_register (char *raw_buffer,
+			       int *optimized,
+			       CORE_ADDR * addrp,
+			       struct frame_info *frame,
+			       int regnum, enum lval_type *lvalp);
+
+#define GET_SAVED_REGISTER(RAW_BUFFER, OPTIMIZED, ADDRP, FRAME, REGNUM, LVAL) \
+     sparc_get_saved_register (RAW_BUFFER, OPTIMIZED, ADDRP, \
+			       FRAME, REGNUM, LVAL)
+
+#define FRAME_INIT_SAVED_REGS(FP)	/*no-op */
+
+#define INIT_EXTRA_FRAME_INFO(FROMLEAF, FCI) \
+     sparc_init_extra_frame_info (FROMLEAF, FCI)
+extern void sparc_init_extra_frame_info (int, struct frame_info *);
+
+#define FRAME_CHAIN(THISFRAME) (sparc_frame_chain (THISFRAME))
+extern CORE_ADDR sparc_frame_chain (struct frame_info *);
+
+/* A macro that tells us whether the function invocation represented
+   by FI does not have a frame on the stack associated with it.  If it
+   does not, FRAMELESS is set to 1, else 0.  */
+
+#define FRAMELESS_FUNCTION_INVOCATION(FI) \
+     frameless_look_for_prologue (FI)
+
+/* Where is the PC for a specific frame */
+
+#define FRAME_SAVED_PC(FRAME) sparc_frame_saved_pc (FRAME)
+extern CORE_ADDR sparc_frame_saved_pc (struct frame_info *);
+
+/* If the argument is on the stack, it will be here.  */
+#define FRAME_ARGS_ADDRESS(FI) ((FI)->frame)
+
+#define FRAME_LOCALS_ADDRESS(FI) ((FI)->frame)
+
+/* Set VAL to the number of args passed to frame described by FI.
+   Can set VAL to -1, meaning no way to tell.  */
+
+/* We can't tell how many args there are
+   now that the C compiler delays popping them.  */
+#define FRAME_NUM_ARGS(FI) (-1)
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#define FRAME_ARGS_SKIP 68
+
+#endif /* GDB_MULTI_ARCH */
+
+#define	PRINT_EXTRA_FRAME_INFO(FI) \
+     sparc_print_extra_frame_info (FI)
+extern void sparc_print_extra_frame_info (struct frame_info *);
+
+/* INIT_EXTRA_FRAME_INFO needs the PC to detect flat frames.  */
+
+#define	INIT_FRAME_PC(FROMLEAF, PREV)	/* nothing */
+#define INIT_FRAME_PC_FIRST(FROMLEAF, PREV) \
+  (PREV)->pc = ((FROMLEAF) ? SAVED_PC_AFTER_CALL ((PREV)->next) : \
+	      (PREV)->next ? FRAME_SAVED_PC ((PREV)->next) : read_pc ());
+
+/* Define other aspects of the stack frame.  */
+
+/* The location of I0 w.r.t SP.  This is actually dependent on how the
+   system's window overflow/underflow routines are written.  Most
+   vendors save the L regs followed by the I regs (at the higher
+   address).  Some vendors get it wrong.  */
+
+#define	FRAME_SAVED_L0	0
+#define	FRAME_SAVED_I0	(8 * REGISTER_RAW_SIZE (L0_REGNUM))
+
+#define FRAME_STRUCT_ARGS_ADDRESS(FI) ((FI)->frame)
+
+/* Things needed for making the inferior call functions.  */
+/*
+ * First of all, let me give my opinion of what the DUMMY_FRAME
+ * actually looks like.
+ *
+ *               |                                 |
+ *               |                                 |
+ *               + - - - - - - - - - - - - - - - - +<-- fp (level 0)
+ *               |                                 |
+ *               |                                 |
+ *               |                                 |
+ *               |                                 |
+ *               |  Frame of innermost program     |
+ *               |           function              |
+ *               |                                 |
+ *               |                                 |
+ *               |                                 |
+ *               |                                 |
+ *               |                                 |
+ *               |---------------------------------|<-- sp (level 0), fp (c)
+ *               |                                 |
+ *     DUMMY     |             fp0-31              |
+ *               |                                 |
+ *               |             ------              |<-- fp - 0x80
+ *     FRAME     |              g0-7               |<-- fp - 0xa0
+ *               |              i0-7               |<-- fp - 0xc0
+ *               |             other               |<-- fp - 0xe0
+ *               |               ?                 |
+ *               |               ?                 |
+ *               |---------------------------------|<-- sp' = fp - 0x140
+ *               |                                 |
+ * xcution start |                                 |
+ * sp' + 0x94 -->|        CALL_DUMMY (x code)      |
+ *               |                                 |
+ *               |                                 |
+ *               |---------------------------------|<-- sp'' = fp - 0x200
+ *               |  align sp to 8 byte boundary    |
+ *               |     ==> args to fn <==          |
+ *  Room for     |                                 |
+ * i & l's + agg | CALL_DUMMY_STACK_ADJUST = 0x0x44|
+ *               |---------------------------------|<-- final sp (variable)
+ *               |                                 |
+ *               |   Where function called will    |
+ *               |           build frame.          |
+ *               |                                 |
+ *               |                                 |
+ *
+ *   I understand everything in this picture except what the space
+ * between fp - 0xe0 and fp - 0x140 is used for.  Oh, and I don't
+ * understand why there's a large chunk of CALL_DUMMY that never gets
+ * executed (its function is superceeded by PUSH_DUMMY_FRAME; they
+ * are designed to do the same thing).
+ *
+ *   PUSH_DUMMY_FRAME saves the registers above sp' and pushes the
+ * register file stack down one.
+ *
+ *   call_function then writes CALL_DUMMY, pushes the args onto the
+ * stack, and adjusts the stack pointer.
+ *
+ *   run_stack_dummy then starts execution (in the middle of
+ * CALL_DUMMY, as directed by call_function).
+ */
+
+#ifndef CALL_DUMMY
+/* This sequence of words is the instructions
+
+   00:   bc 10 00 01     mov  %g1, %fp
+   04:   9d e3 80 00     save  %sp, %g0, %sp
+   08:   bc 10 00 02     mov  %g2, %fp
+   0c:   be 10 00 03     mov  %g3, %i7
+   10:   da 03 a0 58     ld  [ %sp + 0x58 ], %o5
+   14:   d8 03 a0 54     ld  [ %sp + 0x54 ], %o4
+   18:   d6 03 a0 50     ld  [ %sp + 0x50 ], %o3
+   1c:   d4 03 a0 4c     ld  [ %sp + 0x4c ], %o2
+   20:   d2 03 a0 48     ld  [ %sp + 0x48 ], %o1
+   24:   40 00 00 00     call  <fun>
+   28:   d0 03 a0 44     ld  [ %sp + 0x44 ], %o0
+   2c:   01 00 00 00     nop 
+   30:   91 d0 20 01     ta  1
+   34:   01 00 00 00     nop
+
+   NOTES:
+   * the first four instructions are necessary only on the simulator.
+   * this is a multiple of 8 (not only 4) bytes.
+   * the `call' insn is a relative, not an absolute call.
+   * the `nop' at the end is needed to keep the trap from
+     clobbering things (if NPC pointed to garbage instead).
+ */
+
+#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
+/*
+ * The following defines must go away for MULTI_ARCH.
+ */
+
+#define CALL_DUMMY { 0xbc100001, 0x9de38000, 0xbc100002, 0xbe100003,	\
+		     0xda03a058, 0xd803a054, 0xd603a050, 0xd403a04c,	\
+		     0xd203a048, 0x40000000, 0xd003a044, 0x01000000,	\
+		     0x91d02001, 0x01000000 }
+
+
+/* Size of the call dummy in bytes. */
+
+#define CALL_DUMMY_LENGTH 0x38
+
+/* Offset within call dummy of first instruction to execute. */
+
+#define CALL_DUMMY_START_OFFSET 0
+
+/* Offset within CALL_DUMMY of the 'call' instruction. */
+
+#define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + 0x24)
+
+/* Offset within CALL_DUMMY of the 'ta 1' trap instruction. */
+
+#define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + 0x30)
+
+#define CALL_DUMMY_STACK_ADJUST 68
+
+/* Call dummy method (eg. on stack, at entry point, etc.) */
+
+#define CALL_DUMMY_LOCATION ON_STACK
+
+/* Method for detecting dummy frames.  */
+
+#define PC_IN_CALL_DUMMY(PC, SP, FRAME_ADDRESS) \
+     pc_in_call_dummy_on_stack (PC, SP, FRAME_ADDRESS)
+
+#endif /* GDB_MULTI_ARCH */
+
+#endif /* CALL_DUMMY */
+
+#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
+/*
+ * The following defines must go away for MULTI_ARCH. 
+ */
+
+/* Insert the specified number of args and function address
+   into a call sequence of the above form stored at DUMMYNAME.  */
+
+#define FIX_CALL_DUMMY(DUMMYNAME, PC, FUN, NARGS, ARGS, TYPE, GCC_P) \
+     sparc_fix_call_dummy (DUMMYNAME, PC, FUN, TYPE, GCC_P)
+void sparc_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
+			   struct type *value_type, int using_gcc);
+
+/* Arguments smaller than an int must be promoted to ints when
+   synthesizing function calls.  */
+
+/* Push an empty stack frame, to record the current PC, etc.  */
+
+#define PUSH_DUMMY_FRAME	sparc_push_dummy_frame ()
+#define POP_FRAME		sparc_pop_frame ()
+
+void sparc_push_dummy_frame (void);
+void sparc_pop_frame (void);
+
+#define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
+     sparc32_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
+
+extern CORE_ADDR
+sparc32_push_arguments (int, struct value **, CORE_ADDR, int, CORE_ADDR);
+
+/* Store the address of the place in which to copy the structure the
+   subroutine will return.  This is called from call_function_by_hand. 
+   The ultimate mystery is, tho, what is the value "16"?  */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) \
+  { char val[4]; \
+    store_unsigned_integer (val, 4, (ADDR)); \
+    write_memory ((SP)+(16*4), val, 4); }
+
+/* Default definition of USE_STRUCT_CONVENTION.  */
+
+#ifndef USE_STRUCT_CONVENTION
+#define USE_STRUCT_CONVENTION(GCC_P, TYPE) \
+     generic_use_struct_convention (GCC_P, TYPE)
+#endif
+
+/* Extract from an array REGBUF containing the (raw) register state a
+   function return value of type TYPE, and copy that, in virtual
+   format, into VALBUF.  */
+
+#define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
+     sparc32_extract_return_value (TYPE, REGBUF, VALBUF)
+extern void sparc32_extract_return_value (struct type *, char[], char *);
+
+#endif /* GDB_MULTI_ARCH */
+
+
+/* Sparc has no reliable single step ptrace call */
+
+#define SOFTWARE_SINGLE_STEP_P() 1
+extern void sparc_software_single_step (enum target_signal, int);
+#define SOFTWARE_SINGLE_STEP(sig,bp_p) sparc_software_single_step (sig,bp_p)
+
+/* We need more arguments in a frame specification for the
+   "frame" or "info frame" command.  */
+
+#define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
+extern struct frame_info *setup_arbitrary_frame (int, CORE_ADDR *);
+
+/* To print every pair of float registers as a double, we use this hook.
+   We also print the condition code registers in a readable format
+   (FIXME: can expand this to all control regs).  */
+
+#undef 	PRINT_REGISTER_HOOK
+#define	PRINT_REGISTER_HOOK(regno)	\
+  sparc_print_register_hook (regno)
+extern void sparc_print_register_hook (int regno);
+
+/* Optimization for storing registers to the inferior.  The hook
+   DO_DEFERRED_STORES
+   actually executes any deferred stores.  It is called any time
+   we are going to proceed the child, or read its registers.
+   The hook CLEAR_DEFERRED_STORES is called when we want to throw
+   away the inferior process, e.g. when it dies or we kill it.
+   FIXME, this does not handle remote debugging cleanly.  */
+
+extern int deferred_stores;
+#define	DO_DEFERRED_STORES	\
+  if (deferred_stores)		\
+    target_store_registers (-2);
+#define	CLEAR_DEFERRED_STORES	\
+  deferred_stores = 0;
+
+/* Select the sparc disassembler */
+
+#define TM_PRINT_INSN_MACH bfd_mach_sparc
+
diff --git a/gdb/config/sparc/tm-sparclet.h b/gdb/config/sparc/tm-sparclet.h
new file mode 100644
index 00000000000..cc52d5a26d5
--- /dev/null
+++ b/gdb/config/sparc/tm-sparclet.h
@@ -0,0 +1,156 @@
+/* Target machine definitions for GDB for an embedded SPARC.
+   Copyright 1996, 1997, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+#define TARGET_SPARCLET 1	/* Still needed for non-multi-arch case */
+
+#include "sparc/tm-sparc.h"
+
+/* Note: we are not defining GDB_MULTI_ARCH for the sparclet target
+   at this time, because we have not figured out how to detect the
+   sparclet target from the bfd structure.  */
+
+/* Sparclet regs, for debugging purposes.  */
+
+enum { 
+  CCSR_REGNUM   = 72,
+  CCPR_REGNUM   = 73, 
+  CCCRCR_REGNUM = 74,
+  CCOR_REGNUM   = 75, 
+  CCOBR_REGNUM  = 76,
+  CCIBR_REGNUM  = 77,
+  CCIR_REGNUM   = 78
+};
+
+/* Select the sparclet disassembler.  Slightly different instruction set from
+   the V8 sparc.  */
+
+#undef TM_PRINT_INSN_MACH
+#define TM_PRINT_INSN_MACH bfd_mach_sparc_sparclet
+
+/* overrides of tm-sparc.h */
+
+#undef TARGET_BYTE_ORDER
+
+/* Sequence of bytes for breakpoint instruction (ta 1). */
+#undef BREAKPOINT
+#define BIG_BREAKPOINT {0x91, 0xd0, 0x20, 0x01}
+#define LITTLE_BREAKPOINT {0x01, 0x20, 0xd0, 0x91}
+
+#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
+/*
+ * The following defines must go away for MULTI_ARCH.
+ */
+
+#undef  NUM_REGS		/* formerly "72" */
+/*                WIN  FP   CPU  CCP  ASR  AWR  APSR */
+#define NUM_REGS (32 + 32 + 8  + 8  + 8/*+ 32 + 1*/)
+
+#undef  REGISTER_BYTES		/* formerly "(32*4 + 32*4 + 8*4)" */
+#define REGISTER_BYTES (32*4 + 32*4 + 8*4 + 8*4 + 8*4/* + 32*4 + 1*4*/)
+
+/* Initializer for an array of names of registers.
+   There should be NUM_REGS strings in this initializer.  */
+/* Sparclet has no fp! */
+/* Compiler maps types for floats by number, so can't 
+   change the numbers here. */
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES  \
+{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",	\
+  "o0", "o1", "o2", "o3", "o4", "o5", "o6", "o7",	\
+  "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",	\
+  "i0", "i1", "i2", "i3", "i4", "i5", "i6", "i7",	\
+							\
+  "", "", "", "", "", "", "", "", /* no FPU regs */	\
+  "", "", "", "", "", "", "", "", 			\
+  "", "", "", "", "", "", "", "", 			\
+  "", "", "", "", "", "", "", "", 			\
+				  /* no CPSR, FPSR */	\
+  "y", "psr", "wim", "tbr", "pc", "npc", "", "", 	\
+							\
+  "ccsr", "ccpr", "cccrcr", "ccor", "ccobr", "ccibr", "ccir", "", \
+								  \
+  /*       ASR15                 ASR19 (don't display them) */    \
+  "asr1",  "", "asr17", "asr18", "", "asr20", "asr21", "asr22",   \
+/*									  \
+  "awr0",  "awr1",  "awr2",  "awr3",  "awr4",  "awr5",  "awr6",  "awr7",  \
+  "awr8",  "awr9",  "awr10", "awr11", "awr12", "awr13", "awr14", "awr15", \
+  "awr16", "awr17", "awr18", "awr19", "awr20", "awr21", "awr22", "awr23", \
+  "awr24", "awr25", "awr26", "awr27", "awr28", "awr29", "awr30", "awr31", \
+  "apsr",								  \
+ */									  \
+}
+
+/* Remove FP dependant code which was defined in tm-sparc.h */
+#undef	FP0_REGNUM		/* Floating point register 0 */
+#undef  FPS_REGNUM		/* Floating point status register */
+#undef 	CPS_REGNUM		/* Coprocessor status register */
+
+/* sparclet register numbers */
+#define CCSR_REGNUM 72
+
+#undef EXTRACT_RETURN_VALUE
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF)                       \
+  {                                                                    \
+    memcpy ((VALBUF),                                                  \
+	    (char *)(REGBUF) + REGISTER_RAW_SIZE (O0_REGNUM) * 8 +     \
+	    (TYPE_LENGTH(TYPE) >= REGISTER_RAW_SIZE (O0_REGNUM)        \
+	     ? 0 : REGISTER_RAW_SIZE (O0_REGNUM) - TYPE_LENGTH(TYPE)), \
+	    TYPE_LENGTH(TYPE));                                        \
+  }
+#undef STORE_RETURN_VALUE
+#define STORE_RETURN_VALUE(TYPE,VALBUF) \
+  {                                                                    \
+    /* Other values are returned in register %o0.  */                  \
+    write_register_bytes (REGISTER_BYTE (O0_REGNUM), (VALBUF),         \
+			  TYPE_LENGTH (TYPE));                         \
+  }
+
+#endif /* GDB_MULTI_ARCH */
+
+#undef PRINT_REGISTER_HOOK
+#define PRINT_REGISTER_HOOK(regno)
+
+/* Offsets into jmp_buf.  Not defined by Sun, but at least documented in a
+   comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4	/* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land.  We expect that we have just entered
+   longjmp and haven't yet setup the stack frame, so the args are still in the
+   output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+   extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int get_longjmp_target (CORE_ADDR *);
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
diff --git a/gdb/config/sparc/tm-sparclite.h b/gdb/config/sparc/tm-sparclite.h
new file mode 100644
index 00000000000..8fafe5e3b4f
--- /dev/null
+++ b/gdb/config/sparc/tm-sparclite.h
@@ -0,0 +1,126 @@
+/* Macro definitions for GDB for a Fujitsu SPARClite.
+   Copyright 1993, 1994, 1995, 1998, 1999, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "regcache.h"
+
+#define TARGET_SPARCLITE 1	/* Still needed for non-multi-arch case */
+
+#include "sparc/tm-sparc.h"
+
+/* Note: we are not defining GDB_MULTI_ARCH for the sparclet target
+   at this time, because we have not figured out how to detect the
+   sparclet target from the bfd structure.  */
+
+/* Sparclite regs, for debugging purposes */
+
+enum {
+  DIA1_REGNUM = 72,		/* debug instr address register 1 */
+  DIA2_REGNUM = 73,		/* debug instr address register 2 */
+  DDA1_REGNUM = 74,		/* debug data address register 1 */
+  DDA2_REGNUM = 75,		/* debug data address register 2 */
+  DDV1_REGNUM = 76,		/* debug data value register 1 */
+  DDV2_REGNUM = 77,		/* debug data value register 2 */
+  DCR_REGNUM  = 78,		/* debug control register */
+  DSR_REGNUM  = 79		/* debug status regsiter */
+};
+
+/* overrides of tm-sparc.h */
+
+#undef TARGET_BYTE_ORDER
+
+/* Select the sparclite disassembler.  Slightly different instruction set from
+   the V8 sparc.  */
+
+#undef TM_PRINT_INSN_MACH
+#define TM_PRINT_INSN_MACH bfd_mach_sparc_sparclite
+
+/* Amount PC must be decremented by after a hardware instruction breakpoint.
+   This is often the number of bytes in BREAKPOINT
+   but not always.  */
+
+#define DECR_PC_AFTER_HW_BREAK 4
+
+#if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
+/*
+ * The following defines must go away for MULTI_ARCH.
+ */
+
+#undef  FRAME_CHAIN_VALID
+#define FRAME_CHAIN_VALID(FP,FI) func_frame_chain_valid (FP, FI)
+
+#undef NUM_REGS
+#define NUM_REGS 80
+
+#undef REGISTER_BYTES
+#define REGISTER_BYTES (32*4+32*4+8*4+8*4)
+
+#undef REGISTER_NAMES
+#define REGISTER_NAMES  \
+{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",       \
+  "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",       \
+  "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",       \
+  "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",       \
+                                                                \
+  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",       \
+  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
+  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",       \
+  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",       \
+                                                                \
+  "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr",        \
+  "dia1", "dia2", "dda1", "dda2", "ddv1", "ddv2", "dcr", "dsr" }
+
+#define DIA1_REGNUM 72		/* debug instr address register 1 */
+#define DIA2_REGNUM 73		/* debug instr address register 2 */
+#define DDA1_REGNUM 74		/* debug data address register 1 */
+#define DDA2_REGNUM 75		/* debug data address register 2 */
+#define DDV1_REGNUM 76		/* debug data value register 1 */
+#define DDV2_REGNUM 77		/* debug data value register 2 */
+#define DCR_REGNUM 78		/* debug control register */
+#define DSR_REGNUM 79		/* debug status regsiter */
+
+#endif /* GDB_MULTI_ARCH */
+
+#define TARGET_HW_BREAK_LIMIT 2
+#define TARGET_HW_WATCH_LIMIT 2
+
+/* Enable watchpoint macro's */
+
+#define TARGET_HAS_HARDWARE_WATCHPOINTS
+
+#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(type, cnt, ot) \
+	sparclite_check_watch_resources (type, cnt, ot)
+
+/* When a hardware watchpoint fires off the PC will be left at the
+   instruction which caused the watchpoint.  It will be necessary for
+   GDB to step over the watchpoint. ***
+
+   #define STOPPED_BY_WATCHPOINT(W) \
+   ((W).kind == TARGET_WAITKIND_STOPPED \
+   && (W).value.sig == TARGET_SIGNAL_TRAP \
+   && ((int) read_register (IPSW_REGNUM) & 0x00100000))
+ */
+
+/* Use these macros for watchpoint insertion/deletion.  */
+#define target_insert_watchpoint(addr, len, type) sparclite_insert_watchpoint (addr, len, type)
+#define target_remove_watchpoint(addr, len, type) sparclite_remove_watchpoint (addr, len, type)
+#define target_insert_hw_breakpoint(addr, len) sparclite_insert_hw_breakpoint (addr, len)
+#define target_remove_hw_breakpoint(addr, len) sparclite_remove_hw_breakpoint (addr, len)
+#define target_stopped_data_address() sparclite_stopped_data_address()
diff --git a/gdb/config/sparc/tm-sparclynx.h b/gdb/config/sparc/tm-sparclynx.h
new file mode 100644
index 00000000000..1a28621c065
--- /dev/null
+++ b/gdb/config/sparc/tm-sparclynx.h
@@ -0,0 +1,37 @@
+/* Macro definitions for Sparc running under LynxOS.
+   Copyright 1993, 1994 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_SPARCLYNX_H
+#define TM_SPARCLYNX_H
+
+#include "tm-lynx.h"
+
+/* Use generic Sparc definitions. */
+#include "sparc/tm-sparc.h"
+
+/* Lynx does this backwards from everybody else */
+
+#undef FRAME_SAVED_I0
+#undef FRAME_SAVED_L0
+
+#define FRAME_SAVED_I0 0
+#define FRAME_SAVED_L0 (8 * REGISTER_RAW_SIZE (I0_REGNUM))
+
+#endif /* TM_SPARCLYNX_H */
diff --git a/gdb/config/sparc/tm-spc-em.h b/gdb/config/sparc/tm-spc-em.h
new file mode 100644
index 00000000000..760e7a4258a
--- /dev/null
+++ b/gdb/config/sparc/tm-spc-em.h
@@ -0,0 +1,46 @@
+/* Target machine definitions for GDB for an embedded SPARC.
+   Copyright 1989, 1992, 1993, 2000 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "sparc/tm-sparc.h"
+
+/* Offsets into jmp_buf.  Not defined by Sun, but at least documented in a
+   comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4	/* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land.  We expect that we have just entered
+   longjmp and haven't yet setup the stack frame, so the args are still in the
+   output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+   extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int get_longjmp_target (CORE_ADDR *);
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
diff --git a/gdb/config/sparc/tm-sun4os4.h b/gdb/config/sparc/tm-sun4os4.h
new file mode 100644
index 00000000000..b561b13adc7
--- /dev/null
+++ b/gdb/config/sparc/tm-sun4os4.h
@@ -0,0 +1,59 @@
+/* Macro definitions for GDB for a Sun 4 running sunos 4.
+   Copyright 1989, 1992, 1994, 1995, 1998, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "sparc/tm-sparc.h"
+#include "tm-sunos.h"
+
+/* Redefine SKIP_TRAMPOLINE_CODE to handle PIC compiled modules
+   in main executables.  */
+
+#undef SKIP_TRAMPOLINE_CODE
+#define SKIP_TRAMPOLINE_CODE(pc)  sunos4_skip_trampoline_code (pc)
+extern CORE_ADDR sunos4_skip_trampoline_code (CORE_ADDR);
+
+/* Offsets into jmp_buf.  Not defined by Sun, but at least documented in a
+   comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4	/* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land.  We expect that we have just entered
+   longjmp and haven't yet setup the stack frame, so the args are still in the
+   output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+   extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int get_longjmp_target (CORE_ADDR *);
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+
+extern char *sunpro_static_transform_name (char *);
+#define STATIC_TRANSFORM_NAME(x) sunpro_static_transform_name (x)
+#define IS_STATIC_TRANSFORM_NAME(name) ((name)[0] == '$')
diff --git a/gdb/config/sparc/tm-sun4sol2.h b/gdb/config/sparc/tm-sun4sol2.h
new file mode 100644
index 00000000000..e3c59f630de
--- /dev/null
+++ b/gdb/config/sparc/tm-sun4sol2.h
@@ -0,0 +1,82 @@
+/* Macro definitions for GDB for a Sun 4 running Solaris 2
+   Copyright 1989, 1992, 1993, 1994, 1995, 1996, 1998, 1999, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define GDB_MULTI_ARCH GDB_MULTI_ARCH_PARTIAL
+
+#include "sparc/tm-sparc.h"
+#include "tm-sysv4.h"
+
+/* With Sol2 it is no longer necessary to enable software single-step,
+   since the /proc interface can take care of it for us in hardware.  */
+#undef SOFTWARE_SINGLE_STEP
+#undef SOFTWARE_SINGLE_STEP_P
+
+/* There are two different signal handler trampolines in Solaris2.  */
+#define IN_SIGTRAMP(pc, name) \
+  ((name) \
+   && (STREQ ("sigacthandler", name) || STREQ ("ucbsigvechandler", name)))
+
+/* The signal handler gets a pointer to an ucontext as third argument
+   if it is called from sigacthandler.  This is the offset to the saved
+   PC within it.  sparc_frame_saved_pc knows how to deal with
+   ucbsigvechandler.  */
+#define SIGCONTEXT_PC_OFFSET 44
+
+#if 0	/* FIXME Setjmp/longjmp are not as well doc'd in SunOS 5.x yet */
+
+/* Offsets into jmp_buf.  Not defined by Sun, but at least documented in a
+   comment in <machine/setjmp.h>! */
+
+#define JB_ELEMENT_SIZE 4	/* Size of each element in jmp_buf */
+
+#define JB_ONSSTACK 0
+#define JB_SIGMASK 1
+#define JB_SP 2
+#define JB_PC 3
+#define JB_NPC 4
+#define JB_PSR 5
+#define JB_G1 6
+#define JB_O0 7
+#define JB_WBCNT 8
+
+/* Figure out where the longjmp will land.  We expect that we have just entered
+   longjmp and haven't yet setup the stack frame, so the args are still in the
+   output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
+   extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
+   This routine returns true on success */
+
+extern int get_longjmp_target (CORE_ADDR *);
+
+#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
+#endif /* 0 */
+
+/* The SunPRO compiler puts out 0 instead of the address in N_SO symbols,
+   and for SunPRO 3.0, N_FUN symbols too.  */
+#define SOFUN_ADDRESS_MAYBE_MISSING
+
+extern char *sunpro_static_transform_name (char *);
+#define STATIC_TRANSFORM_NAME(x) sunpro_static_transform_name (x)
+#define IS_STATIC_TRANSFORM_NAME(name) ((name)[0] == '$')
+
+#define FAULTED_USE_SIGINFO
+
+/* Enable handling of shared libraries for a.out executables.  */
+#define HANDLE_SVR4_EXEC_EMULATORS
diff --git a/gdb/config/sparc/tm-vxsparc.h b/gdb/config/sparc/tm-vxsparc.h
new file mode 100644
index 00000000000..b6529f75b7f
--- /dev/null
+++ b/gdb/config/sparc/tm-vxsparc.h
@@ -0,0 +1,33 @@
+/* Target machine description for VxWorks sparc's, for GDB, the GNU debugger.
+   Copyright 1993, 1999 Free Software Foundation, Inc.
+   Contributed by Cygnus Support.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "sparc/tm-spc-em.h"
+#include "tm-vxworks.h"
+
+/* FIXME: These are almost certainly wrong. */
+
+/* Number of registers in a ptrace_getregs call. */
+
+#define VX_NUM_REGS (NUM_REGS)
+
+/* Number of registers in a ptrace_getfpregs call. */
+
+/* #define VX_SIZE_FPREGS (don't know how many) */
diff --git a/gdb/config/sparc/vxsparc.mt b/gdb/config/sparc/vxsparc.mt
new file mode 100644
index 00000000000..9eadd17451d
--- /dev/null
+++ b/gdb/config/sparc/vxsparc.mt
@@ -0,0 +1,3 @@
+# Target: SPARC running VxWorks
+TDEPFILES= sparc-tdep.o remote-vx.o remote-vxsparc.o xdr_ld.o xdr_ptrace.o xdr_rdb.o
+TM_FILE= tm-vxsparc.h
diff --git a/gdb/config/sparc/xm-linux.h b/gdb/config/sparc/xm-linux.h
new file mode 100644
index 00000000000..b0518e650e9
--- /dev/null
+++ b/gdb/config/sparc/xm-linux.h
@@ -0,0 +1,42 @@
+/* Macro definitions for running gdb on a Sparc running GNU/Linux.
+
+   Copyright 1989, 1993, 1994, 1995, 1996, 1998, 2001, 2002 Free
+   Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef XM_SPARCLINUX_H
+#define XM_SPARCLINUX_H
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+#define KERNEL_U_ADDR 0x0
+
+#define U_REGS_OFFSET 0
+
+/* If you expect to use the mmalloc package to obtain mapped symbol files,
+   for now you have to specify some parameters that determine how gdb places
+   the mappings in it's address space.  See the comments in map_to_address()
+   for details.  This is expected to only be a short term solution.  Yes it
+   is a kludge.
+   FIXME:  Make this more automatic. */
+
+#define MMAP_BASE_ADDRESS      0xE0000000	/* First mapping here */
+#define MMAP_INCREMENT         0x01000000	/* Increment to next mapping */
+
+#endif /* _XM_SPARCLINUX_H */
diff --git a/gdb/config/sparc/xm-nbsd.h b/gdb/config/sparc/xm-nbsd.h
new file mode 100644
index 00000000000..e469aabc1b4
--- /dev/null
+++ b/gdb/config/sparc/xm-nbsd.h
@@ -0,0 +1,22 @@
+/* Parameters for execution on a Sparc running NetBSD, for GDB.
+   Copyright 1994 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Get generic NetBSD host definitions. */
+#include "xm-nbsd.h"
diff --git a/gdb/config/sparc/xm-sun4sol2.h b/gdb/config/sparc/xm-sun4sol2.h
new file mode 100644
index 00000000000..b775f7cdba0
--- /dev/null
+++ b/gdb/config/sparc/xm-sun4sol2.h
@@ -0,0 +1,37 @@
+/* Macro definitions for running gdb on a Sun 4 running Solaris 2.
+   Copyright 1989, 1992, 1993, 1994, 1995, 1996, 1998, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Pick up more stuff from the generic SVR4 host include file. */
+
+#include "xm-sysv4.h"
+
+/* These are not currently used in SVR4 (but should be, FIXME!).  */
+#undef	DO_DEFERRED_STORES
+#undef	CLEAR_DEFERRED_STORES
+
+/* solaris doesn't have siginterrupt, though it has sigaction; however,
+   in this case siginterrupt would just be setting the default. */
+#define NO_SIGINTERRUPT
+
+/* On sol2.7, <curses.h> emits a bunch of 'macro redefined'
+   warnings, which makes autoconf think curses.h doesn't
+   exist.  Compensate for that here. */
+#define HAVE_CURSES_H 1
diff --git a/gdb/config/tm-linux.h b/gdb/config/tm-linux.h
new file mode 100644
index 00000000000..938987270b7
--- /dev/null
+++ b/gdb/config/tm-linux.h
@@ -0,0 +1,42 @@
+/* Native support for GNU/Linux, for GDB, the GNU debugger.
+   Copyright 1999, 2000
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Pick reasonable defaults for the number of real-time signals.  */
+
+#ifndef REALTIME_LO
+#define REALTIME_LO 32
+#endif
+#ifndef REALTIME_HI
+#define REALTIME_HI 64
+#endif
+
+/* We need this file for the SOLIB_TRAMPOLINE stuff. */
+
+#include "tm-sysv4.h"
+
+/* We define SVR4_SHARED_LIBS unconditionally, on the assumption that
+   link.h is available on all linux platforms.  For I386 and SH3/4, 
+   we hard-code the information rather than use link.h anyway (for 
+   the benefit of cross-debugging).  We may move to doing that for
+   other architectures as well.  */
+
+#define SVR4_SHARED_LIBS
+#include "solib.h"		/* Support for shared libraries. */
diff --git a/gdb/config/tm-lynx.h b/gdb/config/tm-lynx.h
new file mode 100644
index 00000000000..13aeca1c3f7
--- /dev/null
+++ b/gdb/config/tm-lynx.h
@@ -0,0 +1,35 @@
+/* Macro definitions for LynxOS targets.
+   Copyright 1993, 1995 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#ifndef TM_LYNX_H
+#define TM_LYNX_H
+
+/* Override number of expected traps from sysv. */
+#define START_INFERIOR_TRAPS_EXPECTED 2
+
+#include "coff-solib.h"		/* COFF shared library support */
+
+/* Lynx's signal.h doesn't seem to have any macros for what signal numbers
+   the real-time events are.  */
+#define REALTIME_LO 33
+/* One more than the last one.  */
+#define REALTIME_HI 64
+
+#endif /* TM_LYNX_H */
diff --git a/gdb/config/tm-sunos.h b/gdb/config/tm-sunos.h
new file mode 100644
index 00000000000..c8db07e865e
--- /dev/null
+++ b/gdb/config/tm-sunos.h
@@ -0,0 +1,32 @@
+/* Target machine sub-description for SunOS version 4.
+   This is included by other tm-*.h files to specify SunOS-specific stuff.
+   Copyright 1990, 1991, 1992, 1993, 1994 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "solib.h"		/* Support for shared libraries. */
+
+/* Return non-zero if we are in a shared library trampoline code stub. */
+
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) \
+  lookup_solib_trampoline_symbol_by_pc (pc)
+
+/* If PC is in a shared library trampoline code, return the PC
+   where the function itself actually starts.  If not, return 0.  */
+
+#define SKIP_TRAMPOLINE_CODE(pc)  find_solib_trampoline_target (pc)
diff --git a/gdb/config/tm-sysv4.h b/gdb/config/tm-sysv4.h
new file mode 100644
index 00000000000..35b95eb71f8
--- /dev/null
+++ b/gdb/config/tm-sysv4.h
@@ -0,0 +1,47 @@
+/* Macro definitions for GDB on all SVR4 target systems.
+   Copyright 1991, 1992, 1993, 1994, 1996, 1997, 2000
+   Free Software Foundation, Inc.
+   Written by Fred Fish at Cygnus Support (fnf@cygnus.com).
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* For SVR4 shared libraries, each call to a library routine goes through
+   a small piece of trampoline code in the ".plt" section.
+   The horribly ugly wait_for_inferior() routine uses this macro to detect
+   when we have stepped into one of these fragments.
+   We do not use lookup_solib_trampoline_symbol_by_pc, because
+   we cannot always find the shared library trampoline symbols
+   (e.g. on Irix5).  */
+
+#define IN_SOLIB_CALL_TRAMPOLINE(pc, name) in_plt_section((pc), (name))
+extern int in_plt_section (CORE_ADDR, char *);
+
+/* If PC is in a shared library trampoline code, return the PC
+   where the function itself actually starts.  If not, return 0.  */
+
+#define SKIP_TRAMPOLINE_CODE(pc)  find_solib_trampoline_target (pc)
+
+/* It is unknown which, if any, SVR4 assemblers do not accept dollar signs
+   in identifiers.  The default in G++ is to use dots instead, for all SVR4
+   systems, so we make that our default also.  FIXME: There should be some
+   way to get G++ to tell us what CPLUS_MARKER it is using, perhaps by
+   stashing it in the debugging information as part of the name of an
+   invented symbol ("gcc_cplus_marker$" for example). */
+
+#undef CPLUS_MARKER
+#define CPLUS_MARKER '.'
diff --git a/gdb/config/tm-vxworks.h b/gdb/config/tm-vxworks.h
new file mode 100644
index 00000000000..9afc0b4fc79
--- /dev/null
+++ b/gdb/config/tm-vxworks.h
@@ -0,0 +1,23 @@
+/* Target machine description for VxWorks, for GDB, the GNU debugger.
+   Copyright 1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define	GDBINIT_FILENAME	".vxgdbinit"
+
+#define	DEFAULT_PROMPT		"(vxgdb) "
diff --git a/gdb/config/v850/v850.mt b/gdb/config/v850/v850.mt
new file mode 100644
index 00000000000..867f8e68429
--- /dev/null
+++ b/gdb/config/v850/v850.mt
@@ -0,0 +1,5 @@
+# Target: NEC V850 processor
+TDEPFILES= v850-tdep.o
+# TM_FILE= tm-v850.h
+SIM_OBS = remote-sim.o
+SIM = ../sim/v850/libsim.a
diff --git a/gdb/config/vax/nm-vax.h b/gdb/config/vax/nm-vax.h
new file mode 100644
index 00000000000..c2baef18fa6
--- /dev/null
+++ b/gdb/config/vax/nm-vax.h
@@ -0,0 +1,27 @@
+/* Common definitions for GDB native support on Vaxen under 4.2bsd and Ultrix.
+   Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define REGISTER_U_ADDR(addr, blockend, regno)		\
+{ addr = blockend - 0110 + regno * 4;			\
+  if (regno == PC_REGNUM) addr = blockend - 8;		\
+  if (regno == PS_REGNUM) addr = blockend - 4;		\
+  if (regno == FP_REGNUM) addr = blockend - 0120;	\
+  if (regno == AP_REGNUM) addr = blockend - 0124;	\
+  if (regno == SP_REGNUM) addr = blockend - 20; }
diff --git a/gdb/config/vax/tm-vax.h b/gdb/config/vax/tm-vax.h
new file mode 100644
index 00000000000..204d155ab6d
--- /dev/null
+++ b/gdb/config/vax/tm-vax.h
@@ -0,0 +1,48 @@
+/* Definitions to make GDB run on a vax under 4.2bsd.
+   Copyright 1986, 1987, 1989, 1991, 1993, 1994, 1996, 1998, 1999, 2000, 2002
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#define GDB_MULTI_ARCH GDB_MULTI_ARCH_PARTIAL
+
+#define TARGET_UPAGES 14
+#define TARGET_NBPG 512
+#define STACK_END_ADDR (0x80000000 - (TARGET_UPAGES * TARGET_NBPG))
+
+/* On the VAX, sigtramp is in the u area.  Can't check the exact
+   addresses because for cross-debugging we don't have VAX include
+   files around.  This should be close enough.  */
+#define SIGTRAMP_START(pc)	STACK_END_ADDR
+#define SIGTRAMP_END(pc)	0x80000000
+
+/* Sequence of bytes for breakpoint instruction.  */
+#define BREAKPOINT {3}
+
+#define AP_REGNUM 12	/* XXXJRT */
+
+/* Offset to saved PC in sigcontext, from <sys/signal.h>.  */
+/* XXXJRT should go away */
+#define SIGCONTEXT_PC_OFFSET 12
+
+/* XXXJRT not yet under gdbarch control */
+#define FRAME_ARGS_ADDRESS_CORRECT(fi) vax_frame_args_address_correct ((fi))
+extern CORE_ADDR vax_frame_args_address_correct (struct frame_info *);
+
+/* If vax pcc says CHAR or SHORT, it provides the correct address.  */
+#define BELIEVE_PCC_PROMOTION 1
diff --git a/gdb/config/vax/vax.mt b/gdb/config/vax/vax.mt
new file mode 100644
index 00000000000..ebdf942b3d9
--- /dev/null
+++ b/gdb/config/vax/vax.mt
@@ -0,0 +1,3 @@
+# Target: DEC VAX running BSD or Ultrix
+TDEPFILES= vax-tdep.o
+TM_FILE= tm-vax.h
diff --git a/gdb/config/vax/vaxbsd.mh b/gdb/config/vax/vaxbsd.mh
new file mode 100644
index 00000000000..db1e1d4371d
--- /dev/null
+++ b/gdb/config/vax/vaxbsd.mh
@@ -0,0 +1,13 @@
+# Host: DEC VAX running BSD
+
+# The following types of /bin/cc failures have been observed:
+# 1.  Something in readline.c which I have never seen
+# 2.  ``"values.c", line 816: compiler error: schain botch''
+#msg /bin/cc has been known to fail on VAXen running BSD4.3
+#msg If this occurs, use gcc
+#msg  (but see comments in Makefile.dist about compiling with gcc).
+
+XM_FILE= xm-vaxbsd.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
+
+NAT_FILE= nm-vax.h
diff --git a/gdb/config/vax/vaxult.mh b/gdb/config/vax/vaxult.mh
new file mode 100644
index 00000000000..f05a33fa198
--- /dev/null
+++ b/gdb/config/vax/vaxult.mh
@@ -0,0 +1,6 @@
+# Host: DEC VAX running Ultrix
+
+XM_FILE= xm-vaxult.h
+
+NAT_FILE= nm-vax.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
diff --git a/gdb/config/vax/vaxult2.mh b/gdb/config/vax/vaxult2.mh
new file mode 100644
index 00000000000..4170a841257
--- /dev/null
+++ b/gdb/config/vax/vaxult2.mh
@@ -0,0 +1,6 @@
+# Host: DEC VAX running Ultrix
+
+XM_FILE= xm-vaxult2.h
+
+NAT_FILE= nm-vax.h
+NATDEPFILES= infptrace.o inftarg.o fork-child.o corelow.o core-aout.o
diff --git a/gdb/config/vax/xm-vax.h b/gdb/config/vax/xm-vax.h
new file mode 100644
index 00000000000..9924f260140
--- /dev/null
+++ b/gdb/config/vax/xm-vax.h
@@ -0,0 +1,80 @@
+/* Common definitions to make GDB run on Vaxen under 4.2bsd and Ultrix.
+   Copyright (C) 1986, 1987, 1989, 1992 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* This is the amount to subtract from u.u_ar0
+   to get the offset in the core file of the register values.  */
+
+#define KERNEL_U_ADDR (0x80000000 - (UPAGES * NBPG))
+
+/* Kernel is a bit tenacious about sharing text segments, disallowing bpts.  */
+#define	ONE_PROCESS_WRITETEXT
+
+/* Interface definitions for kernel debugger KDB.  */
+
+/* Map machine fault codes into signal numbers.
+   First subtract 0, divide by 4, then index in a table.
+   Faults for which the entry in this table is 0
+   are not handled by KDB; the program's own trap handler
+   gets to handle then.  */
+
+#define FAULT_CODE_ORIGIN 0
+#define FAULT_CODE_UNITS 4
+#define FAULT_TABLE    \
+{ 0, SIGKILL, SIGSEGV, 0, 0, 0, 0, 0, \
+  0, 0, SIGTRAP, SIGTRAP, 0, 0, 0, 0, \
+  0, 0, 0, 0, 0, 0, 0, 0}
+
+/* Start running with a stack stretching from BEG to END.
+   BEG and END should be symbols meaningful to the assembler.
+   This is used only for kdb.  */
+
+#define INIT_STACK(beg, end)  \
+{ asm (".globl end");         \
+  asm ("movl $ end, sp");      \
+  asm ("clrl fp"); }
+
+/* Push the frame pointer register on the stack.  */
+#define PUSH_FRAME_PTR        \
+  asm ("pushl fp");
+
+/* Copy the top-of-stack to the frame pointer register.  */
+#define POP_FRAME_PTR  \
+  asm ("movl (sp), fp");
+
+/* After KDB is entered by a fault, push all registers
+   that GDB thinks about (all NUM_REGS of them),
+   so that they appear in order of ascending GDB register number.
+   The fault code will be on the stack beyond the last register.  */
+
+#define PUSH_REGISTERS        \
+{ asm ("pushl 8(sp)");        \
+  asm ("pushl 8(sp)");        \
+  asm ("pushal 0x14(sp)");    \
+  asm ("pushr $037777"); }
+
+/* Assuming the registers (including processor status) have been
+   pushed on the stack in order of ascending GDB register number,
+   restore them and return to the address in the saved PC register.  */
+
+#define POP_REGISTERS      \
+{ asm ("popr $037777");    \
+  asm ("subl2 $8,(sp)");   \
+  asm ("movl (sp),sp");    \
+  asm ("rei"); }
diff --git a/gdb/config/vax/xm-vaxbsd.h b/gdb/config/vax/xm-vaxbsd.h
new file mode 100644
index 00000000000..6defcc6e079
--- /dev/null
+++ b/gdb/config/vax/xm-vaxbsd.h
@@ -0,0 +1,7 @@
+/* Definitions to make GDB run on a vax under BSD, 4.3 or 4.4. */
+
+/* This should exist on either 4.3 or 4.4.  4.3 doesn't have limits.h
+   or machine/limits.h.  */
+#include <sys/param.h>
+
+#include "vax/xm-vax.h"
diff --git a/gdb/config/vax/xm-vaxult.h b/gdb/config/vax/xm-vaxult.h
new file mode 100644
index 00000000000..576a44fde57
--- /dev/null
+++ b/gdb/config/vax/xm-vaxult.h
@@ -0,0 +1,10 @@
+/* Definitions to make GDB run on a vax under Ultrix. */
+
+#include "vax/xm-vax.h"
+/* This is required for Ultrix 3.1b, not for later versions.  Ultrix
+   3.1b can't just use xm-vaxult2.h because Ultrix 3.1b does define
+   FD_SET.  Sure, we could have separate configurations for vaxult2,
+   vaxult3, and vaxult, but why bother?  Defining the ptrace constants
+   in infptrace.c isn't going to do any harm; it's not like they are
+   going to change.  */
+#define NO_PTRACE_H
diff --git a/gdb/config/vax/xm-vaxult2.h b/gdb/config/vax/xm-vaxult2.h
new file mode 100644
index 00000000000..a46669830cd
--- /dev/null
+++ b/gdb/config/vax/xm-vaxult2.h
@@ -0,0 +1,9 @@
+/* Definitions to make GDB run on a vax under Ultrix. */
+
+#include "vax/xm-vax.h"
+#define NO_PTRACE_H
+
+/* Old versions of ultrix have fd_set but not the FD_* macros.  */
+
+#define FD_SET(bit,fdsetp) ((fdsetp)->fds_bits[(n) / 32] |= (1 << ((n) % 32)))
+#define FD_ZERO(fdsetp) memset (fdsetp, 0, sizeof (*fdsetp))
diff --git a/gdb/config/xm-aix4.h b/gdb/config/xm-aix4.h
new file mode 100644
index 00000000000..bea086a371b
--- /dev/null
+++ b/gdb/config/xm-aix4.h
@@ -0,0 +1,91 @@
+/* Parameters for hosting on an PowerPC, for GDB, the GNU debugger.
+   Copyright 1995, 1996, 1998, 1999, 2000, 2001
+   Free Software Foundation, Inc.
+   Contributed by Cygnus Corporation.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* The following text is taken from config/rs6000.mh:
+ * # The IBM version of /usr/include/rpc/rpc.h has a bug -- it says
+ * # `extern fd_set svc_fdset;' without ever defining the type fd_set.
+ * # Unfortunately this occurs in the vx-share code, which is not configured
+ * # like the rest of GDB (e.g. it doesn't include "defs.h").
+ * # We circumvent this bug by #define-ing fd_set here, but undefining it in
+ * # the xm-rs6000.h file before ordinary modules try to use it.  FIXME, IBM!
+ * MH_CFLAGS='-Dfd_set=int'
+ * So, here we do the undefine...which has to occur before we include
+ * <sys/select.h> below.
+ */
+#undef fd_set
+
+#include <sys/select.h>
+
+/* At least as of AIX 3.2, we have termios.  */
+#define	HAVE_TERMIOS 1
+/* #define HAVE_TERMIO 1 */
+
+#define	USG 1
+
+#define FIVE_ARG_PTRACE
+
+/* This system requires that we open a terminal with O_NOCTTY for it to
+   not become our controlling terminal.  */
+
+#define	USE_O_NOCTTY
+
+/* Brain death inherited from PC's pervades.  */
+#undef NULL
+#define NULL 0
+
+/* The IBM compiler requires this in order to properly compile alloca().  */
+#pragma alloca
+
+/* There is no vfork.  */
+
+#define	vfork	fork
+
+char *termdef ();
+
+/* Signal handler for SIGWINCH `window size changed'. */
+
+#define	SIGWINCH_HANDLER  aix_resizewindow
+extern void aix_resizewindow (int);
+
+/* `lines_per_page' and `chars_per_line' are local to utils.c. Rectify this. */
+
+#define	SIGWINCH_HANDLER_BODY	\
+									\
+/* Respond to SIGWINCH `window size changed' signal, and reset GDB's	\
+   window settings appropriately. */					\
+									\
+void 						\
+aix_resizewindow (signo)			\
+     int signo;					\
+{						\
+  int fd = fileno (stdout);			\
+  if (isatty (fd)) {				\
+    int val;					\
+						\
+    val = atoi (termdef (fd, 'l'));		\
+    if (val > 0)				\
+      lines_per_page = val;			\
+    val = atoi (termdef (fd, 'c'));		\
+    if (val > 0)				\
+      chars_per_line = val;			\
+  }						\
+}
diff --git a/gdb/config/xm-nbsd.h b/gdb/config/xm-nbsd.h
new file mode 100644
index 00000000000..c8d00f6dd63
--- /dev/null
+++ b/gdb/config/xm-nbsd.h
@@ -0,0 +1,26 @@
+/* Host-dependent definitions for any CPU running NetBSD.
+   Copyright 1993, 1994, 1995, 1996, 1999 Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* Include this to get things like NGROUPS which <limits.h> doesn't
+   define on some systems. */
+#include <sys/param.h>
+
+/* NetBSD has termios facilities. */
+#define HAVE_TERMIOS
diff --git a/gdb/config/xm-sysv4.h b/gdb/config/xm-sysv4.h
new file mode 100644
index 00000000000..614d4032772
--- /dev/null
+++ b/gdb/config/xm-sysv4.h
@@ -0,0 +1,29 @@
+/* Definitions for running gdb on a host machine running any flavor of SVR4.
+   Copyright 1991, 1992, 1993, 1995, 1998 Free Software Foundation, Inc.
+   Written by Fred Fish at Cygnus Support (fnf@cygnus.com).
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+/* SVR4 has termios facilities. */
+
+#undef HAVE_TERMIO
+#define HAVE_TERMIOS
+
+/* SVR4 is a derivative of System V Release 3 (USG) */
+
+#define USG
diff --git a/gdb/config/xstormy16/xstormy16.mt b/gdb/config/xstormy16/xstormy16.mt
new file mode 100644
index 00000000000..c4b57514f85
--- /dev/null
+++ b/gdb/config/xstormy16/xstormy16.mt
@@ -0,0 +1,5 @@
+# Target: Sanyo Xstormy16a processor
+TDEPFILES = xstormy16-tdep.o
+# No simulator objects or libraries are needed -- target uses SID.
+# SIM_OBS = remote-sim.o
+# SIM = ../sim/xstormy16/libsim.a
diff --git a/gdb/config/z8k/tm-z8k.h b/gdb/config/z8k/tm-z8k.h
new file mode 100644
index 00000000000..44058554627
--- /dev/null
+++ b/gdb/config/z8k/tm-z8k.h
@@ -0,0 +1,287 @@
+/* Parameters for execution on a z8000 series machine.
+   Copyright 1992, 1993, 1994, 1998, 1999, 2000, 2001
+   Free Software Foundation, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#undef TARGET_INT_BIT
+#undef TARGET_LONG_BIT
+#undef TARGET_SHORT_BIT
+#undef TARGET_PTR_BIT
+
+#define TARGET_SHORT_BIT 16
+#define TARGET_INT_BIT 16
+#define TARGET_LONG_BIT 32
+#define TARGET_PTR_BIT (BIG ? 32: 16)
+
+/* Offset from address of function to start of its code.
+   Zero on most machines.  */
+
+#define FUNCTION_START_OFFSET 0
+
+/* Advance PC across any function entry prologue instructions
+   to reach some "real" code.  */
+
+#define SKIP_PROLOGUE(ip)   (z8k_skip_prologue (ip))
+extern CORE_ADDR z8k_skip_prologue (CORE_ADDR ip);
+
+
+/* Immediately after a function call, return the saved pc.
+   Can't always go through the frames for this because on some machines
+   the new frame is not set up until the new function executes
+   some instructions.  */
+
+
+extern int z8k_saved_pc_after_call (struct frame_info *frame);
+#define SAVED_PC_AFTER_CALL(frame) z8k_saved_pc_after_call(frame)
+
+/* Stack grows downward.  */
+
+#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
+
+/* Sequence of bytes for breakpoint instruction. */
+
+#define BREAKPOINT {0x36,0x00}
+
+/* If your kernel resets the pc after the trap happens you may need to
+   define this before including this file.  */
+
+#define DECR_PC_AFTER_BREAK 0
+
+/* Say how long registers are.  */
+
+#define REGISTER_TYPE unsigned int
+
+#define NUM_REGS 	23	/* 16 registers + 1 ccr + 1 pc + 3 debug
+				   regs + fake fp + fake sp */
+#define REGISTER_BYTES  (NUM_REGS *4)
+
+/* Index within `registers' of the first byte of the space for
+   register N.  */
+
+#define REGISTER_BYTE(N)  ((N)*4)
+
+/* Number of bytes of storage in the actual machine representation
+   for register N.  On the z8k, all but the pc are 2 bytes, but we
+   keep them all as 4 bytes and trim them on I/O */
+
+
+#define REGISTER_RAW_SIZE(N) (((N) < 16)? 2:4)
+
+/* Number of bytes of storage in the program's representation
+   for register N.  */
+
+#define REGISTER_VIRTUAL_SIZE(N) REGISTER_RAW_SIZE(N)
+
+/* Largest value REGISTER_RAW_SIZE can have.  */
+
+#define MAX_REGISTER_RAW_SIZE 4
+
+/* Largest value REGISTER_VIRTUAL_SIZE can have.  */
+
+#define MAX_REGISTER_VIRTUAL_SIZE 4
+
+/* Return the GDB type object for the "standard" data type
+   of data in register N.  */
+
+#define REGISTER_VIRTUAL_TYPE(N) \
+ (REGISTER_VIRTUAL_SIZE(N) == 2? builtin_type_unsigned_int : builtin_type_long)
+
+/*#define INIT_FRAME_PC(x,y) init_frame_pc(x,y) */
+/* Initializer for an array of names of registers.
+   Entries beyond the first NUM_REGS are ignored.  */
+
+#define REGISTER_NAMES  \
+ {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
+  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
+  "ccr", "pc", "cycles","insts","time","fp","sp"}
+
+/* Register numbers of various important registers.
+   Note that some of these values are "real" register numbers,
+   and correspond to the general registers of the machine,
+   and some are "phony" register numbers which are too large
+   to be actual register numbers as far as the user is concerned
+   but do serve to get the desired values when passed to read_register.  */
+
+#define CCR_REGNUM 	16	/* Contains processor status */
+#define PC_REGNUM 	17	/* Contains program counter */
+#define CYCLES_REGNUM 	18
+#define INSTS_REGNUM 	19
+#define TIME_REGNUM 	20
+#define FP_REGNUM 	21	/* Contains fp, whatever memory model */
+#define SP_REGNUM 	22	/* Conatins sp, whatever memory model */
+
+
+
+#define PTR_SIZE (BIG ? 4: 2)
+#define PTR_MASK (BIG ? 0xff00ffff : 0x0000ffff)
+
+/* Store the address of the place in which to copy the structure the
+   subroutine will return.  This is called from call_function. */
+
+#define STORE_STRUCT_RETURN(ADDR, SP) internal_error (__FILE__, __LINE__, "failed internal consistency check");
+
+/* Extract from an array REGBUF containing the (raw) register state
+   a function return value of type TYPE, and copy that, in virtual format,
+   into VALBUF.  This is assuming that floating point values are returned
+   as doubles in d0/d1.  */
+
+
+#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
+  memcpy(VALBUF, REGBUF + REGISTER_BYTE(2), TYPE_LENGTH(TYPE));
+
+/* Write into appropriate registers a function return value
+   of type TYPE, given in virtual format. */
+
+#define STORE_RETURN_VALUE(TYPE,VALBUF) internal_error (__FILE__, __LINE__, "failed internal consistency check");
+
+/* Extract from an array REGBUF containing the (raw) register state
+   the address in which a function should return its structure value,
+   as a CORE_ADDR (or an expression that can be used as one).  */
+
+#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(CORE_ADDR *)(REGBUF))
+
+/* Describe the pointer in each stack frame to the previous stack frame
+   (its caller).  */
+
+/* FRAME_CHAIN takes a frame's nominal address and produces the frame's
+   chain-pointer.
+   In the case of the Z8000, the frame's nominal address
+   is the address of a ptr sized byte word containing the calling
+   frame's address.  */
+
+extern CORE_ADDR z8k_frame_chain (struct frame_info *thisframe);
+#define FRAME_CHAIN(thisframe) z8k_frame_chain(thisframe);
+
+
+
+/* Define other aspects of the stack frame.  */
+
+/* A macro that tells us whether the function invocation represented
+   by FI does not have a frame on the stack associated with it.  If it
+   does not, FRAMELESS is set to 1, else 0.  */
+#define FRAMELESS_FUNCTION_INVOCATION(FI) \
+  (frameless_look_for_prologue (FI))
+
+extern CORE_ADDR z8k_frame_saved_pc (struct frame_info *frame);
+#define FRAME_SAVED_PC(FRAME) z8k_frame_saved_pc(FRAME)
+
+#define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
+
+#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
+
+/* Set VAL to the number of args passed to frame described by FI.
+   Can set VAL to -1, meaning no way to tell.  */
+
+/* We can't tell how many args there are
+   now that the C compiler delays popping them.  */
+#if !defined (FRAME_NUM_ARGS)
+#define FRAME_NUM_ARGS(fi) (-1)
+#endif
+
+/* Return number of bytes at start of arglist that are not really args.  */
+
+#define FRAME_ARGS_SKIP 8
+
+struct frame_info;
+extern void z8k_frame_init_saved_regs (struct frame_info *);
+#define FRAME_INIT_SAVED_REGS(fi) z8k_frame_init_saved_regs (fi)
+
+
+/* Things needed for making the inferior call functions.
+   It seems like every m68k based machine has almost identical definitions
+   in the individual machine's configuration files.  Most other cpu types
+   (mips, i386, etc) have routines in their *-tdep.c files to handle this
+   for most configurations.  The m68k family should be able to do this as
+   well.  These macros can still be overridden when necessary.  */
+
+/* The CALL_DUMMY macro is the sequence of instructions, as disassembled
+   by gdb itself:
+
+   fmovemx fp0-fp7,sp@-                 0xf227 0xe0ff
+   moveml d0-a5,sp@-                    0x48e7 0xfffc
+   clrw sp@-                            0x4267
+   movew ccr,sp@-                               0x42e7
+
+   /..* The arguments are pushed at this point by GDB;
+   no code is needed in the dummy for this.
+   The CALL_DUMMY_START_OFFSET gives the position of 
+   the following jsr instruction.  *../
+
+   jsr @#0x32323232                     0x4eb9 0x3232 0x3232
+   addal #0x69696969,sp                 0xdffc 0x6969 0x6969
+   trap #<your BPT_VECTOR number here>  0x4e4?
+   nop                                  0x4e71
+
+   Note this is CALL_DUMMY_LENGTH bytes (28 for the above example).
+   We actually start executing at the jsr, since the pushing of the
+   registers is done by PUSH_DUMMY_FRAME.  If this were real code,
+   the arguments for the function called by the jsr would be pushed
+   between the moveml and the jsr, and we could allow it to execute through.
+   But the arguments have to be pushed by GDB after the PUSH_DUMMY_FRAME is
+   done, and we cannot allow the moveml to push the registers again lest
+   they be taken for the arguments.  */
+
+
+#define CALL_DUMMY { 0 }
+#define CALL_DUMMY_LENGTH 24	/* Size of CALL_DUMMY */
+#define CALL_DUMMY_START_OFFSET 8	/* Offset to jsr instruction */
+
+
+/* Insert the specified number of args and function address
+   into a call sequence of the above form stored at DUMMYNAME.
+   We use the BFD routines to store a big-endian value of known size.  */
+
+#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p)     \
+{ bfd_putb32 (fun,     (char *) dummyname + CALL_DUMMY_START_OFFSET + 2);  \
+  bfd_putb32 (nargs*4, (char *) dummyname + CALL_DUMMY_START_OFFSET + 8); }
+
+/* Push an empty stack frame, to record the current PC, etc.  */
+
+#define PUSH_DUMMY_FRAME	{ z8k_push_dummy_frame (); }
+
+extern void z8k_push_dummy_frame (void);
+
+extern void z8k_pop_frame (void);
+
+/* Discard from the stack the innermost frame, restoring all registers.  */
+
+#define POP_FRAME		{ z8k_pop_frame (); }
+
+/* Offset from SP to first arg on stack at first instruction of a function */
+
+#define SP_ARG0 (1 * 4)
+
+extern CORE_ADDR z8k_addr_bits_remove (CORE_ADDR);
+#define ADDR_BITS_REMOVE(addr) z8k_addr_bits_remove (addr)
+int sim_z8001_mode;
+#define BIG (sim_z8001_mode)
+
+#define read_memory_short(x)  (read_memory_integer(x,2) & 0xffff)
+
+#define NO_STD_REGS
+
+extern void z8k_print_register_hook (int regno);
+#define	PRINT_REGISTER_HOOK(regno) z8k_print_register_hook(regno)
+
+
+extern void z8k_set_pointer_size (int newsize);
+#define INIT_EXTRA_SYMTAB_INFO \
+  z8k_set_pointer_size(objfile->obfd->arch_info->bits_per_address);
+
+#define REGISTER_SIZE 4
diff --git a/gdb/config/z8k/z8k.mt b/gdb/config/z8k/z8k.mt
new file mode 100644
index 00000000000..cb8d04376e7
--- /dev/null
+++ b/gdb/config/z8k/z8k.mt
@@ -0,0 +1,7 @@
+# Target: Z8000 with simulator
+TDEPFILES= z8k-tdep.o
+TM_FILE= tm-z8k.h
+
+SIM_OBS = remote-sim.o
+SIM = ../sim/z8k/libsim.a
+
author	nobody <>	2002-06-15 12:26:33 +0000
committer	nobody <>	2002-06-15 12:26:33 +0000
commit	2c830de8f260ebb1feb0b13c17eefdf12722d9f7 (patch)
tree	5d09e3d1de5fadbc55de87767b0a9eed41d4636f /gdb/config
parent	554e81cff7bca83fe562cd2c841cb7562a95b6db (diff)
download	binutils-gdb-2c830de8f260ebb1feb0b13c17eefdf12722d9f7.tar.gz