* exec.c (xfer_memory): Add attrib argument.

* infptrace.c (child_xfer_memory): Likewise.
* monitor.c (monitor_xfer_memory): Likewise.
* remote-adapt.c (adapt_xfer_inferior_memory): Likewise.
* remote-array.c (array_xfer_memory): Likewise.
* remote-bug.c (bug_xfer_memory): Likewise.
* remote-e7000.c (e7000_xfer_inferior_memory): Likewise.
* remote-eb.c (eb_xfer_inferior_memory): Likewise.
* remote-es.c (es1800_xfer_inferior_memory): Likewise.
* remote-mips.c (mips_xfer_memory): Likewise.
* remote-mm.c (mm_xfer_inferior_memory): Likewise.
* remote-nindy.c (nindy_xfer_inferior_memory): Likewise.
* remote-os9k.c (rombug_xfer_inferior_memory): Likewise.
* remote-rdi.c (arm_rdi_xfer_memory): Likewise.
* remote-rdp.c (remote_rdp_xfer_inferior_memory): Likewise.
* remote-sds.c (sds_xfer_memory): Likewise.
* remote-sim.c (gdbsim_xfer_inferior_memory): Likewise.
* remote-st.c (st2000_xfer_inferior_memory): Likewise.
* remote-udi.c (udi_xfer_inferior_memory): Likewise.
* remote-vx.c (vx_xfer_memory): Likewise.
* remote.c (remote_xfer_memory): Likewise.
* target.c (debug_to_xfer_memory, do_xfer_memory): Likewise.
* target.h (child_xfer_memory, do_xfer_memory, xfer_memory): Likewise.

* target.h (#include "memattr.h"): Added.
(target_ops.to_xfer_memory): Add attrib argument.

* wince.c (_initialize_inftarg): Removed call to set_dcache_state.
* dcache.h (set_dcache_state): Removed declaration.
* dcache.c (set_dcache_state): Removed definition

* dcache.c: Update module comment, as dcache is now enabled and
disabled with memory region attributes instead of by the global
variable "remotecache".  Add comment describing the interaction
between dcache and memory region attributes.
(dcache_xfer_memory): Add comment describing benefits of moving
cache writeback to a higher level.
(dcache_struct): Removed cache_has_stuff field.  This was used to
record whether the cache had been accessed in order to invalidate
it when it was disabled.  However, this is not needed because the
cache is write through and the code that enables, disables, and
deletes memory regions invalidate the cache.  Add comment which
suggests that we could be more selective and only invalidate those
cache lines containing data from those memory regions.
(dcache_invalidate): Updated.
(dcache_xfer_memory): Updated.

(dcache_alloc): Don't abort() if dcache_enabled_p is clear.
(dcache_xfer_memory): Removed code that called do_xfer_memory() to
perform a uncached transfer if dcache_enabled_p was clear.  This
function is now only called if caching is enabled for the memory
region.
(dcache_info): Always print cache info.

* target.c (do_xfer_memory): Add attrib argument.
(target_xfer_memory, target_xfer_memory_partial): Break transfer
into chunks defined by memory regions, pass region attributes to
do_xfer_memory().
* dcache.c (dcache_read_line, dcache_write_line): Likewise.

* Makefile.in (SFILES): Add memattr.c.
(COMMON_OBS): Add memattr.o.
(dcache.o): Add target.h to dependencies.
* memattr.c: New file.
* memattr.h: Likewise.

1 files changed, 72 insertions, 0 deletions

diff --git a/gdb/memattr.h b/gdb/memattr.h
new file mode 100644
index 00000000000..1af276b5169
--- /dev/null
+++ b/gdb/memattr.h
@@ -0,0 +1,72 @@
+/* memattr.h */
+#ifndef MEMATTR_H
+#define MEMATTR_H
+
+enum mem_access_mode
+{
+  MEM_RW,			/* read/write */
+  MEM_RO,			/* read only */
+  MEM_WO,			/* write only */
+};
+
+enum mem_access_width
+{
+  MEM_WIDTH_UNSPECIFIED,
+  MEM_WIDTH_8,			/*  8 bit accesses */
+  MEM_WIDTH_16,			/* 16  "      "    */
+  MEM_WIDTH_32,			/* 32  "      "    */
+  MEM_WIDTH_64			/* 64  "      "    */
+};
+
+/* The set of all attributes that can be set for a memory region.
+  
+   This structure was created so that memory attributes can be passed
+   to target_ functions without exposing the details of memory region
+   list, which would be necessary if these fields were simply added to
+   the mem_region structure.
+
+   FIXME: It would be useful if there was a mechanism for targets to
+   add their own attributes.  For example, the number of wait states. */
+ 
+struct mem_attrib 
+{
+  /* read/write, read-only, or write-only */
+  enum mem_access_mode mode;
+
+  enum mem_access_width width;
+
+  /* enables hardware breakpoints */
+  int hwbreak;
+  
+  /* enables host-side caching of memory region data */
+  int cache;
+  
+  /* enables memory verification.  after a write, memory is re-read
+     to verify that the write was successful. */
+  int verify; 
+};
+
+struct mem_region 
+{
+  /* FIXME: memory regions are stored in an unsorted singly-linked
+     list.  This probably won't scale to handle hundreds of memory
+     regions --- that many could be needed to describe the allowed
+     access modes for memory mapped i/o device registers. */
+  struct mem_region *next;
+  
+  CORE_ADDR lo;
+  CORE_ADDR hi;
+
+  /* Item number of this memory region. */
+  int number;
+
+  /* Status of this memory region (enabled or disabled) */
+  int status;
+
+  /* Attributes for this region */
+  struct mem_attrib attrib;
+};
+
+extern struct mem_region *lookup_mem_region(CORE_ADDR);
+
+#endif	/* MEMATTR_H */