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authorFranck Jullien <franck.jullien@gmail.com>2017-12-09 05:57:25 +0900
committerStafford Horne <shorne@gmail.com>2017-12-12 23:36:00 +0900
commita994fec4f8f7a886be61cfb3023c354cd2483b9d (patch)
treea95c3f3bdea6b9a51ddffd2c74d7a7286cf41e25 /gdb/or1k-tdep.h
parentdb9077b7275e86637218a7a7d165cb85a4de116f (diff)
downloadbinutils-gdb-a994fec4f8f7a886be61cfb3023c354cd2483b9d.tar.gz
gdb: Add OpenRISC or1k and or1knd target support
This patch prepares the current GDB port of the OpenRISC processor from https://github.com/openrisc/binutils-gdb for upstream merging. Testing has been done with a cgen sim provided in a separate patch. This has been tested with 2 toolchains. GCC [1] 5.4.0 from the OpenRISC project with Newlib [2] and GCC 5.4.0 with Musl [3] 1.1.4. It supports or1knd (no delay slot target). The default target is or1k (with delay slot). You can change the target arch with: (gdb) set architecture or1knd The target architecture is assumed to be or1knd [1] https://github.com/openrisc/or1k-gcc [2] https://github.com/openrisc/newlib [3] https://github.com/openrisc/musl-cross gdb/doc/ChangeLog: 2017-12-12 Stafford Horne <shorne@gmail.com> Stefan Wallentowitz <stefan@wallentowitz.de> Franck Jullien <franck.jullien@gmail.com> Jeremy Bennett <jeremy.bennett@embecosm.com> * gdb.texinfo: Add OpenRISC documentation. gdb/ChangeLog: 2017-12-12 Stafford Horne <shorne@gmail.com> Stefan Wallentowitz <stefan@wallentowitz.de> Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Franck Jullien <franck.jullien@gmail.com> Jeremy Bennett <jeremy.bennett@embecosm.com> * configure.tgt: Add targets for or1k and or1knd. * or1k-tdep.c: New file. * or1k-tdep.h: New file. * features/Makefile: Add or1k.xml to build. * features/or1k.xml: New file. * features/or1k-core.xml: New file. * features/or1k.c: Generated.
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diff --git a/gdb/or1k-tdep.h b/gdb/or1k-tdep.h
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+/* Definitions to target GDB to OpenRISC 1000 32-bit targets.
+ Copyright (C) 2008-2017 Free Software Foundation, Inc.
+
+ This file is part of GDB.
+
+ This program is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at your option)
+ any later version.
+
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ more details.
+
+ You should have received a copy of the GNU General Public License along
+ With this program. If not, see <http://www.gnu.org/licenses/>. */
+
+
+#ifndef OR1K_TDEP__H
+#define OR1K_TDEP__H
+
+#ifndef TARGET_OR1K
+#define TARGET_OR1K
+#endif
+
+#include "opcodes/or1k-desc.h"
+#include "opcodes/or1k-opc.h"
+
+/* General Purpose Registers */
+#define OR1K_ZERO_REGNUM 0
+#define OR1K_SP_REGNUM 1
+#define OR1K_FP_REGNUM 2
+#define OR1K_FIRST_ARG_REGNUM 3
+#define OR1K_LAST_ARG_REGNUM 8
+#define OR1K_LR_REGNUM 9
+#define OR1K_FIRST_SAVED_REGNUM 10
+#define OR1K_RV_REGNUM 11
+#define OR1K_PPC_REGNUM (OR1K_MAX_GPR_REGS + 0)
+#define OR1K_NPC_REGNUM (OR1K_MAX_GPR_REGS + 1)
+#define OR1K_SR_REGNUM (OR1K_MAX_GPR_REGS + 2)
+
+/* Properties of the architecture. GDB mapping of registers is all the GPRs
+ and SPRs followed by the PPC, NPC and SR at the end. Red zone is the area
+ past the end of the stack reserved for exception handlers etc. */
+
+#define OR1K_MAX_GPR_REGS 32
+#define OR1K_NUM_PSEUDO_REGS 0
+#define OR1K_NUM_REGS (OR1K_MAX_GPR_REGS + 3)
+#define OR1K_STACK_ALIGN 4
+#define OR1K_INSTLEN 4
+#define OR1K_INSTBITLEN (OR1K_INSTLEN * 8)
+#define OR1K_NUM_TAP_RECORDS 8
+#define OR1K_FRAME_RED_ZONE_SIZE 2536
+
+#endif /* OR1K_TDEP__H */