This commit was manufactured by cvs2svn to create branch

'kseitz_interps-20020528-branch'.

Cherrypick from cagney_regbuf-20020515-branch 2002-06-15 12:26:32 UTC nobody 'This commit was manufactured by cvs2svn to create branch':
    .cvsignore
    COPYING
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    symlink-tree
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    ylwrap
Cherrypick from cagney_regbuf-20020515-branch 2002-05-15 21:19:22 UTC nobody 'This commit was manufactured by cvs2svn to create branch':
    gdb/blockframe.c
    gdb/frame.h
    gdb/gdbarch.c
    gdb/gdbarch.h
    gdb/gdbarch.sh
    gdb/infcmd.c
    gdb/inferior.h
    gdb/infrun.c
    gdb/regcache.c
    gdb/regcache.h
    gdb/valops.c
    gdb/value.h
    gdb/values.c
Cherrypick from master 2002-05-28 20:06:27 UTC Marek Michalkiewicz <marekm@amelek.gda.pl> '2002-05-28  Marek Michalkiewicz  <marekm@amelek.gda.pl>':
    ChangeLog
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    bfd/aout-target.h
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    bfd/archures.c
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    bfd/bfd.c
    bfd/binary.c
    bfd/bout.c
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    bfd/coff-sh.c
    bfd/coff64-rs6000.c
    bfd/coffcode.h
    bfd/config.bfd
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    bfd/configure
    bfd/configure.in
    bfd/cpu-dlx.c
    bfd/cpu-mips.c
    bfd/doc/ChangeLog
    bfd/doc/Makefile.in
    bfd/doc/chew.c
    bfd/elf-bfd.h
    bfd/elf-eh-frame.c
    bfd/elf.c
    bfd/elf32-arm.h
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    bfd/elfxx-ia64.c
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    bfd/hash.c
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    config.guess
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    config/mh-apollo68
    config/mh-dgux
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    gdb/testsuite/gdb.arch/altivec-abi.c
    gdb/testsuite/gdb.arch/altivec-abi.exp
    gdb/testsuite/gdb.arch/altivec-regs.c
    gdb/testsuite/gdb.arch/altivec-regs.exp
    gdb/testsuite/gdb.arch/configure
    gdb/testsuite/gdb.arch/configure.in
    gdb/testsuite/gdb.base/all-bin.exp
    gdb/testsuite/gdb.base/call-rt-st.exp
    gdb/testsuite/gdb.base/completion.exp
    gdb/testsuite/gdb.c++/inherit.exp
    gdb/testsuite/gdb.c++/local.exp
    gdb/testsuite/gdb.c++/m-data.cc
    gdb/testsuite/gdb.c++/m-data.exp
    gdb/testsuite/gdb.c++/try_catch.cc
    gdb/testsuite/gdb.c++/try_catch.exp
    gdb/testsuite/lib/gdb.exp
    gdb/v850-tdep.c
    gdb/version.in
    gdb/x86-64-tdep.c
    include/ChangeLog
    include/bfdlink.h
    include/dis-asm.h
    include/elf/ChangeLog
    include/elf/common.h
    include/elf/dlx.h
    include/elf/i386.h
    include/elf/ia64.h
    include/gdb/ChangeLog
    include/gdb/sim-d10v.h
    include/opcode/ChangeLog
    include/opcode/dlx.h
    include/opcode/h8300.h
    include/opcode/ia64.h
    include/opcode/mips.h
    include/opcode/sparc.h
    libiberty/ChangeLog
    libiberty/config.table
    opcodes/ChangeLog
    opcodes/Makefile.am
    opcodes/Makefile.in
    opcodes/acinclude.m4
    opcodes/aclocal.m4
    opcodes/arc-dis.c
    opcodes/arm-dis.c
    opcodes/configure
    opcodes/configure.in
    opcodes/disassemble.c
    opcodes/dlx-dis.c
    opcodes/fr30-asm.c
    opcodes/fr30-desc.c
    opcodes/fr30-dis.c
    opcodes/m32r-asm.c
    opcodes/m32r-desc.c
    opcodes/m32r-dis.c
    opcodes/m68k-dis.c
    opcodes/mips-dis.c
    opcodes/mips-opc.c
    opcodes/openrisc-asm.c
    opcodes/openrisc-desc.c
    opcodes/openrisc-dis.c
    opcodes/sh-dis.c
    opcodes/sh64-dis.c
    opcodes/xstormy16-asm.c
    opcodes/xstormy16-desc.c
    opcodes/xstormy16-dis.c
    sim/ChangeLog
    sim/MAINTAINERS
    sim/arm/ChangeLog
    sim/arm/Makefile.in
    sim/arm/armcopro.c
    sim/arm/armemu.c
    sim/arm/armos.c
    sim/arm/armsupp.c
    sim/arm/armvirt.c
    sim/arm/dbg_rdi.h
    sim/arm/thumbemu.c
    sim/arm/wrapper.c
    sim/common/ChangeLog
    sim/common/run-sim.h
    sim/common/run.c
    sim/common/sim-options.c
    sim/d10v/ChangeLog
    sim/d10v/Makefile.in
    sim/d10v/interp.c
    sim/d10v/simops.c
    sim/h8300/ChangeLog
    sim/h8300/compile.c
    sim/h8300/inst.h

1 files changed, 222 insertions, 0 deletions

diff --git a/gdb/ppcnbsd-tdep.c b/gdb/ppcnbsd-tdep.c
new file mode 100644
index 00000000000..16662fd6287
--- /dev/null
+++ b/gdb/ppcnbsd-tdep.c
@@ -0,0 +1,222 @@
+/* Target-dependent code for PowerPC systems running NetBSD.
+   Copyright 2002 Free Software Foundation, Inc.
+   Contributed by Wasabi Systems, Inc.
+
+   This file is part of GDB.
+
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330,
+   Boston, MA 02111-1307, USA.  */
+
+#include "defs.h"
+#include "gdbcore.h"
+#include "regcache.h"
+#include "target.h"
+#include "breakpoint.h"
+#include "value.h"
+
+#include "ppc-tdep.h"
+#include "ppcnbsd-tdep.h"
+#include "nbsd-tdep.h"
+
+#include "solib-svr4.h"
+
+#define REG_FIXREG_OFFSET(x)	((x) * 4)
+#define REG_LR_OFFSET		(32 * 4)
+#define REG_CR_OFFSET		(33 * 4)
+#define REG_XER_OFFSET		(34 * 4)
+#define REG_CTR_OFFSET		(35 * 4)
+#define REG_PC_OFFSET		(36 * 4)
+#define SIZEOF_STRUCT_REG	(37 * 4)
+
+#define FPREG_FPR_OFFSET(x)	((x) * 8)
+#define FPREG_FPSCR_OFFSET	(32 * 8)
+#define SIZEOF_STRUCT_FPREG	(33 * 8)
+
+void
+ppcnbsd_supply_reg (char *regs, int regno)
+{
+  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+  int i;
+
+  for (i = 0; i <= 31; i++)
+    {
+      if (regno == i || regno == -1)
+	supply_register (i, regs + REG_FIXREG_OFFSET (i));
+    }
+
+  if (regno == tdep->ppc_lr_regnum || regno == -1)
+    supply_register (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);
+
+  if (regno == tdep->ppc_cr_regnum || regno == -1)
+    supply_register (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);
+
+  if (regno == tdep->ppc_xer_regnum || regno == -1)
+    supply_register (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);
+
+  if (regno == tdep->ppc_ctr_regnum || regno == -1)
+    supply_register (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);
+
+  if (regno == PC_REGNUM || regno == -1)
+    supply_register (PC_REGNUM, regs + REG_PC_OFFSET);
+}
+
+void
+ppcnbsd_fill_reg (char *regs, int regno)
+{
+  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+  int i;
+
+  for (i = 0; i <= 31; i++)
+    {
+      if (regno == i || regno == -1)
+	regcache_collect (i, regs + REG_FIXREG_OFFSET (i));
+    }
+
+  if (regno == tdep->ppc_lr_regnum || regno == -1)
+    regcache_collect (tdep->ppc_lr_regnum, regs + REG_LR_OFFSET);
+
+  if (regno == tdep->ppc_cr_regnum || regno == -1)
+    regcache_collect (tdep->ppc_cr_regnum, regs + REG_CR_OFFSET);
+
+  if (regno == tdep->ppc_xer_regnum || regno == -1)
+    regcache_collect (tdep->ppc_xer_regnum, regs + REG_XER_OFFSET);
+
+  if (regno == tdep->ppc_ctr_regnum || regno == -1)
+    regcache_collect (tdep->ppc_ctr_regnum, regs + REG_CTR_OFFSET);
+
+  if (regno == PC_REGNUM || regno == -1)
+    regcache_collect (PC_REGNUM, regs + REG_PC_OFFSET);
+}
+
+void
+ppcnbsd_supply_fpreg (char *fpregs, int regno)
+{
+  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+  int i;
+
+  for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
+    {
+      if (regno == i || regno == -1)
+	supply_register (i, fpregs + FPREG_FPR_OFFSET (i - FP0_REGNUM));
+    }
+
+  if (regno == tdep->ppc_fpscr_regnum || regno == -1)
+    supply_register (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
+}
+
+void
+ppcnbsd_fill_fpreg (char *fpregs, int regno)
+{
+  struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
+  int i;
+
+  for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++)
+    {
+      if (regno == i || regno == -1)
+	regcache_collect (i, fpregs + FPREG_FPR_OFFSET (i - FP0_REGNUM));
+    }
+
+  if (regno == tdep->ppc_fpscr_regnum || regno == -1)
+    regcache_collect (tdep->ppc_fpscr_regnum, fpregs + FPREG_FPSCR_OFFSET);
+}
+
+static void
+fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, int which,
+                      CORE_ADDR ignore)
+{
+  char *regs, *fpregs;
+
+  /* We get everything from one section.  */
+  if (which != 0)
+    return;
+
+  regs = core_reg_sect;
+  fpregs = core_reg_sect + SIZEOF_STRUCT_REG;
+
+  /* Integer registers.  */
+  ppcnbsd_supply_reg (regs, -1);
+
+  /* Floating point registers.  */
+  ppcnbsd_supply_fpreg (fpregs, -1);
+}
+
+static void
+fetch_elfcore_registers (char *core_reg_sect, unsigned core_reg_size, int which,
+                         CORE_ADDR ignore)
+{
+  switch (which)
+    {
+    case 0:  /* Integer registers.  */
+      if (core_reg_size != SIZEOF_STRUCT_REG)
+	warning ("Wrong size register set in core file.");
+      else
+	ppcnbsd_supply_reg (core_reg_sect, -1);
+      break;
+
+    case 2:  /* Floating point registers.  */
+      if (core_reg_size != SIZEOF_STRUCT_FPREG)
+	warning ("Wrong size FP register set in core file.");
+      else
+	ppcnbsd_supply_fpreg (core_reg_sect, -1);
+      break;
+
+    default:
+      /* Don't know what kind of register request this is; just ignore it.  */
+      break;
+    }
+}
+
+static struct core_fns ppcnbsd_core_fns =
+{
+  bfd_target_unknown_flavour,		/* core_flavour */
+  default_check_format,			/* check_format */
+  default_core_sniffer,			/* core_sniffer */
+  fetch_core_registers,			/* core_read_registers */
+  NULL					/* next */
+};
+
+static struct core_fns ppcnbsd_elfcore_fns =
+{
+  bfd_target_elf_flavour,		/* core_flavour */
+  default_check_format,			/* check_format */
+  default_core_sniffer,			/* core_sniffer */
+  fetch_elfcore_registers,		/* core_read_registers */
+  NULL					/* next */
+};
+
+static void
+ppcnbsd_init_abi (struct gdbarch_info info,
+                  struct gdbarch *gdbarch)
+{
+  /* Until November 2001, gcc was not complying to the SYSV ABI for
+     returning structures less than or equal to 8 bytes in size. It was
+     returning everything in memory. When this was corrected, it wasn't
+     fixed for native platforms.  */
+  set_gdbarch_use_struct_convention (gdbarch,
+                                   ppc_sysv_abi_broken_use_struct_convention);
+
+  set_solib_svr4_fetch_link_map_offsets (gdbarch,
+                                nbsd_ilp32_solib_svr4_fetch_link_map_offsets);
+}
+
+void
+_initialize_ppcnbsd_tdep (void)
+{
+  gdbarch_register_osabi (bfd_arch_powerpc, GDB_OSABI_NETBSD_ELF,
+			  ppcnbsd_init_abi);
+
+  add_core_fns (&ppcnbsd_core_fns);
+  add_core_fns (&ppcnbsd_elfcore_fns);
+}