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authorChristophe Lyon <christophe.lyon@linaro.org>2017-04-24 14:49:48 +0100
committerChristophe Lyon <christophe.lyon@linaro.org>2017-06-14 16:12:38 +0000
commit1d72c7445857652f3eb423f2702bc5981580fb63 (patch)
tree82c072ef67aaebc41198d787f78f0fddc4e29f00 /ld/testsuite/ld-powerpc/attr-gnu-8-23.d
parentb4b71a6d5d7892d84118415d06da7f0e8a711fe9 (diff)
downloadbinutils-gdb-1d72c7445857652f3eb423f2702bc5981580fb63.tar.gz
2017-06-14 Christophe Lyon <christophe.lyon@linaro.org>
Backport from mainline: [GAS/ARM] Fix expansion of ldr pseudo instruction The LDR rX, =cst pseudo-instruction suffers from two issues for loading integer constants in Thumb mode: - movs is used if the constant and register can be encoded using that instruction which leads to unexpected behavior due to its flag-setting behavior - mov.w, movw and mvn are used for r13 (sp) and r15 (pc) but these encoding are marked as UNPREDICTABLE This patch fixes those issues and update testing accordingly. 2017-04-24 Thomas Preud'homme <thomas.preudhomme@arm.com> gas/ * config/tc-arm.c (move_or_literal_pool): Remove code generating MOVS. Forbid MOV.W and MOVW if destination is SP or PC. * testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.s: Explain expectation of LDR not generating a MOVS for low registers and small constants. Add tests of MOVW generation. * testsuite/gas/arm/thumb2_ldr_immediate_highregs_armv6t2.d: Update expected disassembly. Change-Id: Ia4d4fae9b93fe168aa4d724703d0dd947ea3a5fd
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