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author | Jakub Jelinek <jakub@redhat.com> | 2000-10-20 10:38:47 +0000 |
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committer | Jakub Jelinek <jakub@redhat.com> | 2000-10-20 10:38:47 +0000 |
commit | 19f7b01094d236648a8b0de2ef24cf8510594e9c (patch) | |
tree | f2b5235c189cdf610e5e892e7e2e8f48df8e2221 /opcodes/sparc-dis.c | |
parent | bb160f3e2dc2b422903eca471137e204c55793c2 (diff) | |
download | binutils-gdb-19f7b01094d236648a8b0de2ef24cf8510594e9c.tar.gz |
gas/
* config/tc-sparc.c (sparc_ip): Fix a bug which caused v9_arg_p
instructions to loose any special insn->architecture mask.
* config/tc-sparc.c (v9a_asr_table): Add v9b ASRs.
(sparc_md_end, sparc_arch_types, sparc_arch,
sparc_elf_final_processing): Handle v8plusb and v9b architectures.
(sparc_ip): Handle siam mode operands. Support v9b ASRs (and
request v9b architecture if they are used).
bfd/
* elf32-sparc.c (elf32_sparc_merge_private_bfd_data,
elf32_sparc_object_p, elf32_sparc_final_write_processing):
Support v8plusb.
* elf64-sparc.c (sparc64_elf_merge_private_bfd_data,
sparc64_elf_object_p): Support v9b.
* archures.c: Declare v8plusb and v9b machines.
* bfd-in2.h: Ditto.
* cpu-sparc.c: Ditto.
include/opcode/
* sparc.h (enum sparc_opcode_arch_val): Add SPARC_OPCODE_ARCH_V9B.
Note that '3' is used for siam operand.
opcodes/
* sparc-dis.c (v9a_asr_reg_names): Add v9b ASRs.
(compute_arch_mask): Add v8plusb and v9b machines.
(print_insn_sparc): siam mode decoding, accept ASRs up to 25.
* opcodes/sparc-opc.c: Support for Cheetah instruction set.
(prefetch_table): Add #invalidate.
Diffstat (limited to 'opcodes/sparc-dis.c')
-rw-r--r-- | opcodes/sparc-dis.c | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/opcodes/sparc-dis.c b/opcodes/sparc-dis.c index a595d0f3835..cebff5285e6 100644 --- a/opcodes/sparc-dis.c +++ b/opcodes/sparc-dis.c @@ -1,5 +1,5 @@ /* Print SPARC instructions. - Copyright (C) 1989, 91-97, 1998 Free Software Foundation, Inc. + Copyright (C) 1989, 91-97, 1998, 2000 Free Software Foundation, Inc. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by @@ -25,7 +25,8 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* Bitmask of v9 architectures. */ #define MASK_V9 ((1 << SPARC_OPCODE_ARCH_V9) \ - | (1 << SPARC_OPCODE_ARCH_V9A)) + | (1 << SPARC_OPCODE_ARCH_V9A) \ + | (1 << SPARC_OPCODE_ARCH_V9B)) /* 1 if INSN is for v9 only. */ #define V9_ONLY_P(insn) (! ((insn)->architecture & ~MASK_V9)) /* 1 if INSN is for v9. */ @@ -95,7 +96,7 @@ static char *v9_priv_reg_names[] = static char *v9a_asr_reg_names[] = { "pcr", "pic", "dcr", "gsr", "set_softint", "clear_softint", - "softint", "tick_cmpr" + "softint", "tick_cmpr", "sys_tick", "sys_tick_cmpr" }; /* Macros used to extract instruction fields. Not all fields have @@ -463,6 +464,10 @@ print_insn_sparc (memaddr, info) } break; + case '3': + (info->fprintf_func) (stream, "%d", X_IMM (insn, 3)); + break; + case 'K': { int mask = X_MEMBAR (insn); @@ -551,7 +556,7 @@ print_insn_sparc (memaddr, info) break; case '/': - if (X_RS1 (insn) < 16 || X_RS1 (insn) > 23) + if (X_RS1 (insn) < 16 || X_RS1 (insn) > 25) (*info->fprintf_func) (stream, "%%reserved"); else (*info->fprintf_func) (stream, "%%%s", @@ -559,7 +564,7 @@ print_insn_sparc (memaddr, info) break; case '_': - if (X_RD (insn) < 16 || X_RD (insn) > 23) + if (X_RD (insn) < 16 || X_RD (insn) > 25) (*info->fprintf_func) (stream, "%%reserved"); else (*info->fprintf_func) (stream, "%%%s", @@ -770,6 +775,9 @@ compute_arch_mask (mach) case bfd_mach_sparc_v8plusa : case bfd_mach_sparc_v9a : return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9A); + case bfd_mach_sparc_v8plusb : + case bfd_mach_sparc_v9b : + return SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9B); } abort (); } |