diff options
author | Nick Clifton <nickc@redhat.com> | 2021-01-08 11:51:50 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2021-01-08 11:51:50 +0000 |
commit | e84c871648606f29f7d35084ab8afc3b522affc3 (patch) | |
tree | 90e2f5e816d9e038ec9b5e8f561f20297b360a4c /opcodes | |
parent | fb932b57cbf99d01145cb4b5c0c64da9157c7f73 (diff) | |
download | binutils-gdb-e84c871648606f29f7d35084ab8afc3b522affc3.tar.gz |
Fix places in the AArch64 opcodes library code where a call to assert() has side effects.
PR 27129
* aarch64-dis.c (determine_disassembling_preference): Move call to
aarch64_match_operands_constraint outside of the assertion.
* aarch64-asm.c (aarch64_ins_limm_1): Remove call to assert.
Replace with a return of FALSE.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 6 | ||||
-rw-r--r-- | opcodes/aarch64-asm.c | 13 | ||||
-rw-r--r-- | opcodes/aarch64-dis.c | 4 |
3 files changed, 16 insertions, 7 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 0eef3ab55ea..8b25c41a843 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,11 @@ 2021-01-08 Nick Clifton <nickc@redhat.com> + PR 27129 + * aarch64-dis.c (determine_disassembling_preference): Move call to + aarch64_match_operands_constraint outside of the assertion. + * aarch64-asm.c (aarch64_ins_limm_1): Remove call to assert. + Replace with a return of FALSE. + PR 27139 * aarch64-opc.c (aarch64_sys_regs): Treat id_aa64mmfr2_el1 as a core system register. diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c index 0eebf6bae2c..eae652e2714 100644 --- a/opcodes/aarch64-asm.c +++ b/opcodes/aarch64-asm.c @@ -545,18 +545,19 @@ aarch64_ins_limm_1 (const aarch64_operand *self, const aarch64_inst *inst, bfd_boolean invert_p, aarch64_operand_error *errors ATTRIBUTE_UNUSED) { + bfd_boolean res; aarch64_insn value; uint64_t imm = info->imm.value; int esize = aarch64_get_qualifier_esize (inst->operands[0].qualifier); if (invert_p) imm = ~imm; - /* The constraint check should have guaranteed this wouldn't happen. */ - assert (aarch64_logical_immediate_p (imm, esize, &value)); - - insert_fields (code, value, 0, 3, self->fields[2], self->fields[1], - self->fields[0]); - return TRUE; + /* The constraint check should guarantee that this will work. */ + res = aarch64_logical_immediate_p (imm, esize, &value); + if (res) + insert_fields (code, value, 0, 3, self->fields[2], self->fields[1], + self->fields[0]); + return res; } /* Insert logical/bitmask immediate for e.g. the last operand in diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index da1c96dadc1..19482f729ab 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -2729,8 +2729,10 @@ determine_disassembling_preference (struct aarch64_inst *inst, successfully converted to the form of ALIAS. */ if (convert_to_alias (©, alias) == 1) { + int res; aarch64_replace_opcode (©, alias); - assert (aarch64_match_operands_constraint (©, NULL)); + res = aarch64_match_operands_constraint (©, NULL); + assert (res == 1); DEBUG_TRACE ("succeed with %s via conversion", alias->name); memcpy (inst, ©, sizeof (aarch64_inst)); return; |