diff options
| -rw-r--r-- | gas/ChangeLog | 4 | ||||
| -rw-r--r-- | gas/config/tc-mips.c | 13 | ||||
| -rw-r--r-- | gas/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/lineno.d | 14 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/lineno.s | 26 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/mips-opc.c | 6 |
7 files changed, 47 insertions, 27 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 34021597ee0..68cea17d6ed 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,9 @@ 2010-10-18 Maciej W. Rozycki <macro@linux-mips.org> + * config/tc-mips.c (macro)[M_LD_OB, M_SD_OB]: Handle 64-bit ABIs. + +2010-10-18 Maciej W. Rozycki <macro@linux-mips.org> + * config/tc-mips.c (mips_pseudo_table): Add "sbss". (s_change_sec): Handle it. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 8af33ab0b79..bf26235b84a 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -7367,15 +7367,18 @@ macro (struct mips_cl_insn *ip) break; case M_LD_OB: - s = "lw"; + s = HAVE_64BIT_GPRS ? "ld" : "lw"; goto sd_ob; case M_SD_OB: - s = "sw"; + s = HAVE_64BIT_GPRS ? "sd" : "sw"; sd_ob: - gas_assert (HAVE_32BIT_ADDRESSES); macro_build (&offset_expr, s, "t,o(b)", treg, BFD_RELOC_LO16, breg); - offset_expr.X_add_number += 4; - macro_build (&offset_expr, s, "t,o(b)", treg + 1, BFD_RELOC_LO16, breg); + if (!HAVE_64BIT_GPRS) + { + offset_expr.X_add_number += 4; + macro_build (&offset_expr, s, "t,o(b)", treg + 1, + BFD_RELOC_LO16, breg); + } break; /* New code added to support COPZ instructions. diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 1ab14fd0e21..2fa3e2b5f77 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2010-10-18 Maciej W. Rozycki <macro@linux-mips.org> + + * gas/mips/lineno.s: Convert to o32. + * gas/mips/lineno.d: Adjust patterns accordingly. Force the o32 + ABI. + 2010-10-16 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/i386.exp: Run x86-64-nops-1-g64. diff --git a/gas/testsuite/gas/mips/lineno.d b/gas/testsuite/gas/mips/lineno.d index 5af810d69f6..72304bf55de 100644 --- a/gas/testsuite/gas/mips/lineno.d +++ b/gas/testsuite/gas/mips/lineno.d @@ -1,6 +1,6 @@ #objdump: -d -l -mmips:4000 #name: assembly line numbers -#as: --gstabs -march=r4000 +#as: --gstabs -32 -march=r4000 .*: +file format .*mips.* @@ -17,9 +17,9 @@ main\(\): .*lineno.s:16 .*10:.*addiu.* .*lineno.s:17 -.*14:.*sd.* +.*14:.*sw.* .*lineno.s:18 -.*18:.*sd.* +.*18:.*sw.* .*lineno.s:19 .*1c:.*move.* .*lineno.s:20 @@ -59,9 +59,9 @@ main\(\): .*lineno.s:34 .*60:.*move.* .*lineno.s:35 -.*64:.*ld.* +.*64:.*lw.* .*lineno.s:36 -.*68:.*ld.* +.*68:.*lw.* .*lineno.s:37 .*6c:.*addiu.* .*lineno.s:38 @@ -73,7 +73,7 @@ g\(\): .*lineno.s:47 .*78:.*addiu.* .*lineno.s:48 -.*7c:.*sd.* +.*7c:.*sw.* .*lineno.s:49 .*80:.*move.* .*lineno.s:50 @@ -92,7 +92,7 @@ g\(\): .*lineno.s:56 .*9c:.*move.* .*lineno.s:57 -.*a0:.*ld.* +.*a0:.*lw.* .*lineno.s:58 .*a4:.*addiu.* .*lineno.s:59 diff --git a/gas/testsuite/gas/mips/lineno.s b/gas/testsuite/gas/mips/lineno.s index 531f331a4a7..be71a7c420c 100644 --- a/gas/testsuite/gas/mips/lineno.s +++ b/gas/testsuite/gas/mips/lineno.s @@ -7,15 +7,15 @@ .word 0xdeadbeef # some real code, compiled from a toy C program - .globl main + .globl main .ent main main: - .frame $fp,32,$31 # vars= 16, regs= 2/0, args= 0, extra= 0 + .frame $fp,24,$31 # vars= 16, regs= 2/0, args= 0, extra= 0 .mask 0xc0000000,-8 .fmask 0x00000000,0 - subu $sp,$sp,32 - sd $31,24($sp) - sd $fp,16($sp) + subu $sp,$sp,24 + sw $31,20($sp) + sw $fp,16($sp) move $fp,$sp jal __main li $2,2 # 0x2 @@ -32,20 +32,20 @@ main: b $L1 $L1: move $sp,$fp - ld $31,24($sp) - ld $fp,16($sp) - addu $sp,$sp,32 + lw $31,20($sp) + lw $fp,16($sp) + addu $sp,$sp,24 j $31 .end main .align 2 .globl g .ent g g: - .frame $fp,32,$31 # vars= 16, regs= 1/0, args= 0, extra= 0 + .frame $fp,24,$31 # vars= 16, regs= 1/0, args= 0, extra= 0 .mask 0x40000000,-16 .fmask 0x00000000,0 - subu $sp,$sp,32 - sd $fp,16($sp) + subu $sp,$sp,24 + sw $fp,16($sp) move $fp,$sp sw $4,0($fp) lw $2,0($fp) @@ -54,7 +54,7 @@ g: b $L2 $L2: move $sp,$fp - ld $fp,16($sp) - addu $sp,$sp,32 + lw $fp,16($sp) + addu $sp,$sp,24 j $31 .end g diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ea0eeefca5a..9a24e899b76 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2010-10-18 Maciej W. Rozycki <macro@linux-mips.org> + + * mips-opc.c (mips_builtin_opcodes): Move M_LD_OB and M_SD_OB + macros before their corresponding MIPS III hardware instructions. + 2010-10-16 H.J. Lu <hongjiu.lu@intel.com> * i386-gen.c (cpu_flag_init): Add CpuNop to CPU_GENERIC64_FLAGS. diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 6dc615f38d7..230d0f8c9d7 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -743,8 +743,9 @@ const struct mips_opcode mips_builtin_opcodes[] = {"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD|RD_b|WR_t, 0, I1 }, {"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO, 0, I1 }, {"lca", "t,A(b)", 0, (int) M_LCA_AB, INSN_MACRO, 0, I1 }, -{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, 0, I3 }, +/* The macro has to be first to handle o32 correctly. */ {"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, 0, I1 }, +{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, 0, I3 }, {"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, 0, I1 }, {"ldaddw", "t,b", 0x70000010, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR }, {"ldaddwu", "t,b", 0x70000011, 0xfc00ffff, SM|RD_t|WR_t|RD_b, 0, XLR }, @@ -1173,8 +1174,9 @@ const struct mips_opcode mips_builtin_opcodes[] = {"sc", "t,A(b)", 0, (int) M_SC_AB, INSN_MACRO, 0, I2 }, {"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM|RD_t|WR_t|RD_b, 0, I3 }, {"scd", "t,A(b)", 0, (int) M_SCD_AB, INSN_MACRO, 0, I3 }, -{"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, 0, I3 }, +/* The macro has to be first to handle o32 correctly. */ {"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO, 0, I1 }, +{"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM|RD_t|RD_b, 0, I3 }, {"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO, 0, I1 }, {"sdbbp", "", 0x0000000e, 0xffffffff, TRAP, 0, G2 }, {"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP, 0, G2 }, |