diff options
Diffstat (limited to 'gas')
170 files changed, 28096 insertions, 8448 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 496b578f6c3..f4a34f2f840 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,281 @@ +2004-05-02 H.J. Lu <hongjiu.lu@intel.com> + + * config/obj-elf.c (obj_elf_change_section): Allow the + ".note.GNU-stack" section has SHF_EXECINSTR. + +2004-05-02 H.J. Lu <hongjiu.lu@intel.com> + + * config/obj-elf.c (get_section): Return bfd_boolean. + (obj_elf_change_section): Call bfd_get_section_by_name_if + instead of bfd_map_over_sections. + +2004-04-30 H.J. Lu <hongjiu.lu@intel.com> + + * config/obj-elf.c (get_section): New function. + (obj_elf_change_section): Support multiple sections with same + name. + +2004-04-30 Nick Clifton <nickc@redhat.com> + + * config/tc-arm.c (create_register_alias): Fix typo checking for + case sensitive register aliases. + (co_proc_number): Use error message string in all_reg_maps[] + array. + (cp_reg_required_here): Likewise. + (fp_reg_required_here): Likewise. + +2004-04-29 Brian Ford <ford@vss.fsi.com> + + * dwarf2dbg.c (dwarf2_finish): Add SEC_DEBUGGING to section flags. + +2004-04-28 Chris Demetriou <cgd@broadcom.com> + + * config/tc-mips.c (HAVE_32BIT_ADDRESSES, append_insn, macro_build) + (load_address, macro, mips_ip, md_parse_option) + (mips_force_relocation, mips_validate_fix, md_apply_fix3) + (s_change_sec, pic_need_relax, tc_gen_reloc): Remove all + embedded-PIC handling, and update comments. + (SWITCH_TABLE): Remove. + * config/tc-mips.h (DIFF_EXPR_OK): Delete. + (enum mips_pic_level): Remove EMBEDDED_PIC. + (EXTERN_FORCE_RELOC): Remove embedded-PIC handling. + (TC_FORCE_RELOCATION): Update comment. + * ecoff.c (ecoff_build_lineno): Add comment about some code that + might be safe to remove now that MIPS embedded-PIC is gone. + +2004-04-28 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + * config/obj-som.c (obj_som_init_stab_section): Add new arguments in + call to obj_set_subsection_attributes. + (obj_som_init_stab_section): Likewise. + * config/tc-hppa.c (default_subspace_dict): Add comdat field. + (pa_def_subspaces): Provide comdat default. + (pa_subspace): Handle new "comdat" parameter. Set SEC_LINK_ONCE and + not SEC_IS_COMMON if section is comdat, common or dup_common. Update + calls to create_new_subspace and update_subspace to pass comdat flag. + (create_new_subspace, update_subspace): Add new comdat argument. Use + it in calls to obj_set_subsection_attributes. + * doc/c-hppa.texi (.subspa, .nsubspa): Document new comdat parameter + and use of comdat, common and dup_comm parameters. + +2004-04-26 H.J. Lu <hongjiu.lu@intel.com> + + * config/obj-elf.c (obj_elf_change_section): Check if the old + group name is NULL before comparison. + +2004-04-23 Chris Demetriou <cgd@broadcom.com> + + * config/tc-mips.h (mips_dwarf2_addr_size): Prototype. + +2004-04-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * config/tc-mips.c (s_mipsset): Set default CPU type for .set mipsN. + +2004-04-23 Chris Demetriou <cgd@broadcom.com> + + * config/tc-mips.c (md_longopts): Remove -membedded-pic option. + (OPTION_MEMBEDDED_PIC): Remove. + (OPTION_TRAP, OPTION_BREAK, OPTION_EB, OPTION_EL) + (OPTION_FP32, OPTION_GP32, OPTION_CONSTRUCT_FLOATS) + (OPTION_NO_CONSTRUCT_FLOATS, OPTIONS_FP64, OPTION_GP64) + (OPTION_RELAX_BRANCH, OPTION_NO_RELAX_BRANCH) + (OPTION_ELF_BASE): Renumber. + (md_parse_option): Remove OPTION_MEMBEDDED_PIC handling. + (md_show_usage): Remove mention of -membedded-pic. + * doc/as.texinfo: Remove mention of -membedded-pic. + +2004-04-23 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * config/tc-mips.h (USE_GLOBAL_POINTER_OPT): Remove. + * config/tc-mips.c (RDATA_SECTION_NAME, mips_target_format): Remove + a.out support. + (md_begin, mips_ip, md_parse_option, s_change_sec, s_option, + s_abicalls, nopic_need_relax, tc_gen_reloc): Remove uses of + USE_GLOBAL_POINTER_OPT. + +2004-04-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * config/tc-mips.c (macro): One more use of load_delay_nop. + +2004-04-22 Atsushi Nemoto <anemo@mba.ocn.ne.jp> + + * config/tc-mips.c (load_delay_nop): New function. + (load_address, macro): Use load_delay_nop() to build a nop + which can be omitted with gpr_interlocks. + +2004-04-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * config/tc-mips.c (hilo_interlocks, gpr_interlocks, + cop_interlocks): Remove superfluous CPU entries. + +2004-04-22 Paul Brook <paul@codesourcery.com> + + * config/tc-arm.c (mav_parse_offset): Value must be multiple of 4. + +2004-04-22 Peter Barada <peter@the-baradas.com> + + * NEWS: Added support for EMAC instructions and MAC/EMAC + Motorola syntax. + * config/m68k-parse.h: Add ACC[123], ACCEXT{01,23}, MAC/EMAC + scale factor tokens, trailing_ampersand to mark mask addressing + for MAC/EMAC instructions. + * config/m68k-parse.y: Add options_ampersand clause, '<<', + '>>'. + (yylex): Handle '>', '<', and '&' following '+'. + * config/tc-m68k.c: Set mcfmac/mcfemac on appropriate ColdFire + architectures in archs[]. + (m68k-ip): Add '4', 'e', 'g', 'i', cases to handle mask addressing + for MAC/EMAC instructions, ACC[0123], ACCEXT{01,23}, and '<<'/'>>' + respectively. + (m68k_ip): Handle trailing '&' on MAC/EMAC insns. + (install_operand): Fix 'n' case, Add 'F', 'f', 'G', 'H', 'I', ']' + cases. + Add EMAC operands to init_table[]. + +2004-04-22 Bruno De Bus <bdebus@elis.ugent.be> + + * config/tc-arm.h (enum mstate): Move here, add MAP_UNDEFINED + state. + (TC_SEGMENT_INFO_TYPE): Define to enum mstate. + * config/tc-arm.c (enum mstate): Delete from here. + (mapping_state): Remove the static mapstate variable and instead + store the state in the segment. This allows a per-section mapping + state. Handle and ignore MAP_UNDEFINED states. + (arm_elf_change_section): Get the current mapping state from the + new section. + (s_ltorg): Set the mapping state to MAP_DATA. + (arm_cleanup): Use arm_elf_change_section to get the mapping state + for each pool as it is emitted. + +2004-04-22 Nick Clifton <nickc@redhat.com> + + * config/tc-arm.h: Formatting tidy ups. + +2004-04-20 Chris Demetriou <cgd@broadcom.com> + + * NEWS: Note that MIPS -membedded-pic option is deprecated. + +2004-04-20 DJ Delorie <dj@redhat.com> + + * config/tc-i386.h [TE_PE] (TC_CONS_FIX_NEW): Define. + * config/tc-i386.c (md_pseudo_table) [TE_PE]: Add "secrel32". + [TE_PE] (O_secrel): Define. + [TE_PE] (x86_pe_cons_fix_new): New. + [TE_PE] (pe_directive_secrel): Likewise. + (tc_gen_reloc) [TE_PE]: Support BFD_RELOC_32_SECREL. + +2004-04-19 Eric Christopher <echristo@redhat.com> + + * config/tc-mips.c (mips_dwarf2_addr_size): Revert part + of previous patch for fix in gcc. + +2004-04-19 Jakub Jelinek <jakub@redhat.com> + + * config/tc-xtensa.c (xg_assembler_literal): Fix a typo. + +2004-04-19 Nathan Sidwell <nathan@codesourcery.com> + + * read.c (do_align): Call md_flush_pending_output, if defined. + +2004-04-16 Alan Modra <amodra@bigpond.net.au> + + * expr.c (operand): Correct checks for ++ and --. + +2004-04-14 H.J. Lu <hongjiu.lu@intel.com> + + * config/tc-generic.c: Add some comments. + +2004-04-14 Richard Sandiford <rsandifo@redhat.com> + + * doc/c-mips.texi (-m{no-,}fix-vr4120): Renamed from + -{no-}mfix-vr4122-bugs. + * config/tc-mips.c (mips_fix_vr4120): Renamed from mips_fix_4122_bugs. + (append_insn, mips_emit_delays): Update accordingly. + (OPTION_FIX_VR4120, OPTION_NO_FIX_VR4120): Renamed from *VR4122. + (md_longopts): Change -{no-,}mfix-vr4122-bugs to -m{no-,}fix-vr4120. + (md_parse_option): Update after above changes. + (md_show_usage): Add -mfix-vr4120. + +2004-04-13 Bob Wilson <bob.wilson@acm.org> + + * doc/as.texinfo (Sub-Sections): Conditionalize COFF-specific use + of .section directive; add a reference to the ELF .subsection + directive. + +2004-04-13 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> + + * config/tc-m32r.c (md_assemble): Fixed infinite loop bug + in parallel. + +2004-04-11 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * Makefile.am: Remove mips from aout targets. + * Makefile.in: Regenerate. + * configure.in: Remove mips-dec-bsd* target. + * configure: Regenerate. + +2004-04-07 Alan Modra <amodra@bigpond.net.au> + + PR 96 + * config/tc-ppc.c (ppc_elf_suffix): Add valid32 and valid64 fields + to struct map_bfd. Adjust MAP macro, and define MAP32, MAP64. + Update "mapping". Restrict some @ modifiers to 32 bit. + +2004-04-01 Asgari Jinia <asgarij@kpitcummins.com> + Dhananjay Deshpande <dhananjayd@kpitcummins.com> + + * config/tc-sh.c (dont_adjust_reloc_32): New variable. + (sh_fix_adjustable): Avoid adjusting BFD_RELOC_32 when + dont_adjust_reloc_32 is set. + (md_longopts): Add option -renesas. + (md_parse_option, md_show_usage): Likewise. + * doc/c-sh.texi: Likewise. + +2004-04-01 Dave Korn <dk@artimi.com> + + * config/tc-dlx.c (md_assemble): set fx_no_overflow flag for + hi16 and lo16 fixS structs. + (md_assemble): generate bit_fixS for RELOC_DLX_LO16 in + exactly the same way as for RELOC_DLX_REL16. + (machine_ip): properly respect LO flag in the_insn and + output RELOC_DLX_LO16 rather than RELOC_DLX_16. + (md_apply_fix3): apply RELOC_DLX_LO16. + +2004-03-30 Stan Shebs <shebs@apple.com> + + Remove long-obsolete MPW support. + * mpw-config.in, mpw-make.sed, mac-as.r: Remove files. + * configure.in: Remove mention of ppc-*-mpw* config. + * configure.in: Likewise. + +2004-03-30 Nick Clifton <nickc@redhat.com> + + * config/tc-arm.c (meabi_flags): Make its use conditional upon + OBJ_ELF being defined. + +2004-03-27 Alan Modra <amodra@bigpond.net.au> + + * config/obj-aout.c (obj_aout_type): Remove #ifdef BFD_ASSEMBLER code. + +2004-03-23 Paul Brook <paul@codesourcery.com> + + * config/tc-arm.c (meabi_flags): New variable. + (arm_parse_eabi): New function. + (md_begin): Set flags for EABI v3. + (arm_eabis): Add. + (arm_long_opts): Add meabi. + * doc/as.texinf <ARM>: Document -meabi. + * doc/c-arm.texi: Ditto. + +2004-03-22 Bob Wilson <bob.wilson@acm.org> + + * config/tc-xtensa.c (xtensa_post_relax_hook): Create literal + tables even when use_literal_section flag is not set. + +2004-03-22 Alan Modra <amodra@bigpond.net.au> + + * config/tc-sh.c: Remove trailing whitespace. + 2004-03-22 Hans-Peter Nilsson <hp@axis.com> * doc/c-cris.texi (CRIS-Opts): Document --no-mul-bug-abort, @@ -27,6 +305,38 @@ segments, including init and fini literal segments. (xtensa_post_relax_hook): Swap use of xt_insn_sec and xt_literal_sec. +2004-03-19 John David Anglin <dave.anglin@nrc-cnrc.gc.ca> + + * tc-hppa.c (cons_fix_new_hppa): Check for PC relative base type. + (pa_comm): Set BSF_OBJECT in symbol flags. + +2004-03-19 Alan Modra <amodra@bigpond.net.au> + + * Makefile.am: Run "make dep-am". + * Makefile.in: Regenerate. + * doc/Makefile.in: Regenerate. + * config.in: Regenerate. + * po/gas.pot: Regenerate. + +2004-03-18 Nathan Sidwell <nathan@codesourcery.com> + + * read.c (read_a_source_file): Use demand_empty_rest_of_line. + (demand_empty_rest_of_line): Issue an error here. + (ignore_rest_of_line): Silently skip to end. + (demand_copy_string): Issue an error, not warning. + (equals): Likewise. + * config/obj-elf.c (obj_elf_section_name): Likewise. + (obj_elf_section): Likewise. + * config/tc-arc.c (arc_extoper): Remove bogus NULL checks. + (arc_extinst): Likewise. + * config/tc-ia64.c (dot_saveb): Use demand_empty_rest_of_line. + (dot_spill): Likewise. + (dot_unwabi): Likewise. + (dot_prologue): Likewise. + + * expr.c (operand): Reject ++ and --. + (operator): Likewise. + 2004-03-17 Kaz Kojima <kkojima@rr.iij4u.or.jp> * config/tc-sh.c: Include dw2gencfi.h. @@ -56,11 +366,129 @@ * config/tc-i386.h (CpuPadLock): New define. (CpuUnknownFlags): Added CpuPadLock. +2004-03-07 Andreas Schwab <schwab@suse.de> + + * doc/c-hppa.texi (HPPA Directives): Fix typo. + +2004-03-07 Richard Henderson <rth@redhat.com> + + * dw2gencfi.c (output_cie): Align length to 4 byte boundary. + (cfi_finish): Likewise for fde. + +2004-03-05 H.J. Lu <hongjiu.lu@intel.com> + + * config/tc-ia64.c (md_assemble): Properly handle NULL + align_frag. + (ia64_handle_align): Don't abort if failed to add a stop bit. + +2004-03-04 H.J. Lu <hongjiu.lu@intel.com> + + * Makefile.in: Regenerated. + * aclocal.m4: Likewise. + * configure: Likewise. + * doc/Makefile.in: Likewise. + +2004-03-03 H.J. Lu <hongjiu.lu@intel.com> + + * config/tc-ia64.c (dot_align): New. + (ia64_do_align): Make it static. + (md_pseudo_table): Use "dot_align" for "align". + (ia64_md_do_align): Don't set align_frag here. + (ia64_handle_align): Add a stop bit to the previous bundle if + needed. + + * config/tc-ia64.h (ia64_do_align): Removed. + +2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com> + + * config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and + -isa=sh4-nommu-nofpu options. Adjust help messages accordingly. + (sh_elf_final_processing): Output BFD type sh4_nofpu if that is + the most general type or the user specifically requested it. + (md_assemble): Add a new error message for when an instruction + is understood, but is not allowed due to an -isa option. + +2004-03-02 H.J. Lu <hongjiu.lu@intel.com> + + * config/tc-ia64.c (align_frag): New. + (md_assemble): Set the tc_frag_data field in align_frag for + IA64_OPCODE_FIRST instructions. + (ia64_md_do_align): Set align_frag. + (ia64_handle_align): Add a stop bit if needed. + + * config/tc-ia64.h (TC_FRAG_TYPE): New. + (TC_FRAG_INIT): New. + +2004-03-01 Richard Sandiford <rsandifo@redhat.com> + + * config/tc-frv.c (fr400_audio): New variable. + (md_parse_option, md_show_usage): Add -mcpu=fr405 and -mcpu=fr450. + (md_parse_option): Set fr400_audio for -mcpu=fr400 and -mcpu=fr405. + (target_implements_insn_p): New function. + (md_assemble): Report an error if the processor doesn't implement + the instruction. + +2004-02-27 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> + + * config/tc-m32r.c (md_longopts): Added -no-bitinst option. + (md_parse_option): Ditto. + (OPTION_NO_SPECIAL_M32R): Added. + (md_show_usage): Document it. + (enable_speial_m32r): Changed a default value from 0 to 1. + * doc/c-m32r.texi: Document the -no-bitinst option. + +2004-02-27 Nick Clifton <nickc@redhat.com> + + * config/tc-sh.c (get_operand): Revert previous delta. + (tc_gen_reloc): Check for an unknown reloc type before processing + the addend. + +2004-02-27 Hannes Reinecke <hare@suse.de> + + * config/tc-s390.c (s390_insn): Correct range check for opcode in + .insn pseudo operation. + +2004-02-27 Anil Paranjpe <anilp1@kpitcummins.com> + + * config/tc-sh.c (get_operand): In case of #Imm, check has been + added for wrong syntax. + 2004-02-26 Eric Christopher <echristo@redhat.com> * config/tc-mips.c (mips_dwarf2_addr_size): New. * config/tc-mips.h (DWARF2_ADDR_SIZE): Use. +2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com> + + * config/tc-sh.c (build_Mytes): Add REG_N_D and REG_N_B01 + nibble types to assembler. + +2004-02-25 Fred Fish <fnf@redhat.com> + + * config/tc-iq2000.c: Add missing \n\ in multiline string literal. + +2004-02-20 James E Wilson <wilson@specifixinc.com> + + * config/tc-ia64.c (slot_index): New arg before_relax. Use instead of + finalize_syms. + (fixup_unw_records): New arg before_relax. Pass to slot_index. + (ia64_estimate_size_before_relax): New. + (ia64_convert_frag): Pass 0 to fixup_unw_records. Add comment. + (generate_unwind_image): Pass 1 to fixup_unw_records. + * config/tc-ia64.h (ia64_estimate_size_before_relax): Declare. + (md_estimate_size_before_relax): Call ia64_estimate_size_before_relax. + +2004-02-19 Jakub Jelinek <jakub@redhat.com> + + * stabs.c (generate_asm_file): Avoid warning about use of + uninitialized variable. + +2004-02-18 David Mosberger <davidm@hpl.hp.com> + + * config/tc-ia64.c (ia64_flush_insns): In addition to prologue, + body, and endp, allow unwind records which do not have a "t" + (time/instruction) field. + 2004-02-17 Petko Manolov <petkan@nucleusys.com> * config/tc-arm.c (do_mav_dspsc_1): Correct offset of CRn. @@ -68,7 +496,7 @@ Fix accumulator registers move opcodes. 2004-02-13 Hannes Reinecke <hare@suse.de> - Jakub Jelinek <jakub@redhat.com> + Jakub Jelinek <jakub@redhat.com> * dwarf2dbg.c (get_filenum): Do not read beyond allocated memory. diff --git a/gas/Makefile.am b/gas/Makefile.am index 49a0f1389b3..94eae871041 100644 --- a/gas/Makefile.am +++ b/gas/Makefile.am @@ -113,7 +113,7 @@ CPU_OBJ_VALID = \ case $$o in \ aout) \ case $$c in \ - a29k | arm | cris | i386 | m68k | mips | ns32k | pdp11 | sparc | tahoe | tic30 | vax) \ + a29k | arm | cris | i386 | m68k | ns32k | pdp11 | sparc | tahoe | tic30 | vax) \ valid=yes ;; \ esac ;; \ bout) \ @@ -1197,13 +1197,14 @@ DEPTC_m32r_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \ $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \ subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/m32r-desc.h \ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/m32r-opc.h \ - cgen.h + cgen.h $(INCDIR)/elf/m32r.h $(INCDIR)/elf/reloc-macros.h DEPTC_m32r_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32r.h \ $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \ $(srcdir)/../opcodes/m32r-desc.h $(INCDIR)/opcode/cgen.h \ - $(srcdir)/../opcodes/m32r-opc.h cgen.h + $(srcdir)/../opcodes/m32r-opc.h cgen.h $(INCDIR)/elf/m32r.h \ + $(INCDIR)/elf/reloc-macros.h DEPTC_m68hc11_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \ $(srcdir)/config/tc-m68hc11.h $(INCDIR)/coff/internal.h \ $(INCDIR)/coff/m68k.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \ @@ -1400,20 +1401,23 @@ DEPTC_sh_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \ $(srcdir)/config/tc-sh.h $(INCDIR)/coff/internal.h \ $(INCDIR)/coff/sh.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \ $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/sh-opc.h \ - $(INCDIR)/safe-ctype.h struc-symbol.h dwarf2dbg.h dw2gencfi.h + $(INCDIR)/safe-ctype.h struc-symbol.h dwarf2dbg.h dw2gencfi.h \ + $(INCDIR)/elf/dwarf2.h DEPTC_sh_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sh.h \ subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/sh-opc.h \ $(INCDIR)/safe-ctype.h struc-symbol.h $(INCDIR)/elf/sh.h \ - $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h dw2gencfi.h + $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h dw2gencfi.h \ + $(INCDIR)/elf/dwarf2.h DEPTC_sh64_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sh64.h \ $(srcdir)/config/tc-sh.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \ $(BFDDIR)/elf32-sh64.h $(INCDIR)/safe-ctype.h $(srcdir)/../opcodes/sh64-opc.h \ $(srcdir)/config/tc-sh.c subsegs.h $(INCDIR)/obstack.h \ - $(srcdir)/../opcodes/sh-opc.h struc-symbol.h dwarf2dbg.h dw2gencfi.h + $(srcdir)/../opcodes/sh-opc.h struc-symbol.h dwarf2dbg.h \ + dw2gencfi.h $(INCDIR)/elf/dwarf2.h DEPTC_sparc_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \ $(srcdir)/config/tc-sparc.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \ $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \ diff --git a/gas/Makefile.in b/gas/Makefile.in index 17920c87bd4..b0c4a8fa9e7 100644 --- a/gas/Makefile.in +++ b/gas/Makefile.in @@ -1,8 +1,8 @@ -# Makefile.in generated by automake 1.7.8 from Makefile.am. +# Makefile.in generated by automake 1.8.2 from Makefile.am. # @configure_input@ -# Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 -# Free Software Foundation, Inc. +# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +# 2003, 2004 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. @@ -14,6 +14,9 @@ @SET_MAKE@ + +SOURCES = $(as_new_SOURCES) $(EXTRA_as_new_SOURCES) $(itbl_test_SOURCES) + srcdir = @srcdir@ top_srcdir = @top_srcdir@ VPATH = @srcdir@ @@ -21,7 +24,6 @@ pkgdatadir = $(datadir)/@PACKAGE@ pkglibdir = $(libdir)/@PACKAGE@ pkgincludedir = $(includedir)/@PACKAGE@ top_builddir = . - am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd INSTALL = @INSTALL@ install_sh_DATA = $(install_sh) -c -m 644 @@ -38,6 +40,81 @@ POST_UNINSTALL = : build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ +noinst_PROGRAMS = as-new$(EXEEXT) +EXTRA_PROGRAMS = itbl-test$(EXEEXT) +DIST_COMMON = $(srcdir)/../config.guess $(srcdir)/../config.sub NEWS \ + README ChangeLog $(srcdir)/Makefile.in $(srcdir)/Makefile.am \ + $(top_srcdir)/configure $(am__configure_deps) \ + $(srcdir)/config.in $(srcdir)/../mkinstalldirs \ + $(srcdir)/gdbinit.in $(srcdir)/gdbinit.in \ + $(top_srcdir)/po/Make-in m68k-parse.c itbl-parse.c itbl-lex.c \ + $(srcdir)/../ylwrap $(srcdir)/../ltmain.sh \ + $(srcdir)/../config.guess $(srcdir)/../config.sub +subdir = . +ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 +am__aclocal_m4_deps = $(top_srcdir)/acinclude.m4 \ + $(top_srcdir)/../libtool.m4 $(top_srcdir)/../gettext.m4 \ + $(top_srcdir)/configure.in +am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ + $(ACLOCAL_M4) +am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \ + configure.lineno configure.status.lineno +mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs +CONFIG_HEADER = config.h +CONFIG_CLEAN_FILES = gdb.ini .gdbinit po/Makefile.in +PROGRAMS = $(noinst_PROGRAMS) +am__objects_1 = app.$(OBJEXT) as.$(OBJEXT) atof-generic.$(OBJEXT) \ + bignum-copy.$(OBJEXT) cond.$(OBJEXT) depend.$(OBJEXT) \ + dwarf2dbg.$(OBJEXT) dw2gencfi.$(OBJEXT) ecoff.$(OBJEXT) \ + ehopt.$(OBJEXT) expr.$(OBJEXT) flonum-copy.$(OBJEXT) \ + flonum-konst.$(OBJEXT) flonum-mult.$(OBJEXT) frags.$(OBJEXT) \ + hash.$(OBJEXT) input-file.$(OBJEXT) input-scrub.$(OBJEXT) \ + listing.$(OBJEXT) literal.$(OBJEXT) macro.$(OBJEXT) \ + messages.$(OBJEXT) output-file.$(OBJEXT) read.$(OBJEXT) \ + sb.$(OBJEXT) stabs.$(OBJEXT) subsegs.$(OBJEXT) \ + symbols.$(OBJEXT) write.$(OBJEXT) +am_as_new_OBJECTS = $(am__objects_1) +as_new_OBJECTS = $(am_as_new_OBJECTS) +am__DEPENDENCIES_1 = tc-@target_cpu_type@.o +am__DEPENDENCIES_2 = obj-@obj_format@.o +am__DEPENDENCIES_3 = atof-@atof@.o +am__DEPENDENCIES_4 = +am__DEPENDENCIES_5 = ../libiberty/libiberty.a +am_itbl_test_OBJECTS = itbl-parse.$(OBJEXT) itbl-lex.$(OBJEXT) +itbl_test_OBJECTS = $(am_itbl_test_OBJECTS) +itbl_test_DEPENDENCIES = itbl-tops.o itbl-test.o $(am__DEPENDENCIES_5) +SCRIPTS = $(noinst_SCRIPTS) +DEFAULT_INCLUDES = -I. -I$(srcdir) -I. +depcomp = +am__depfiles_maybe = +COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \ + $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) +LTCOMPILE = $(LIBTOOL) --mode=compile $(CC) $(DEFS) \ + $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) \ + $(AM_CFLAGS) $(CFLAGS) +CCLD = $(CC) +LINK = $(LIBTOOL) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ + $(AM_LDFLAGS) $(LDFLAGS) -o $@ +LEXCOMPILE = $(LEX) $(LFLAGS) $(AM_LFLAGS) +LTLEXCOMPILE = $(LIBTOOL) --mode=compile $(LEX) $(LFLAGS) $(AM_LFLAGS) +YACCCOMPILE = $(YACC) $(YFLAGS) $(AM_YFLAGS) +LTYACCCOMPILE = $(LIBTOOL) --mode=compile $(YACC) $(YFLAGS) \ + $(AM_YFLAGS) +YLWRAP = $(top_srcdir)/../ylwrap +SOURCES = $(as_new_SOURCES) $(EXTRA_as_new_SOURCES) \ + $(itbl_test_SOURCES) +DIST_SOURCES = $(as_new_SOURCES) $(EXTRA_as_new_SOURCES) \ + $(itbl_test_SOURCES) +RECURSIVE_TARGETS = all-recursive check-recursive dvi-recursive \ + html-recursive info-recursive install-data-recursive \ + install-exec-recursive install-info-recursive \ + install-recursive installcheck-recursive installdirs-recursive \ + pdf-recursive ps-recursive uninstall-info-recursive \ + uninstall-recursive +ETAGS = etags +CTAGS = ctags +DEJATOOL = $(PACKAGE) +RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir ACLOCAL = @ACLOCAL@ ALLOCA = @ALLOCA@ ALL_OBJ_DEPS = @ALL_OBJ_DEPS@ @@ -49,7 +126,6 @@ AUTOHEADER = @AUTOHEADER@ AUTOMAKE = @AUTOMAKE@ AWK = @AWK@ BFDLIB = @BFDLIB@ - BFDVER_H = @BFDVER_H@ CATALOGS = @CATALOGS@ CATOBJEXT = @CATOBJEXT@ @@ -79,7 +155,6 @@ INSTALL_SCRIPT = @INSTALL_SCRIPT@ INSTALL_STRIP_PROGRAM = @INSTALL_STRIP_PROGRAM@ INSTOBJEXT = @INSTOBJEXT@ INTLDEPS = @INTLDEPS@ - INTLLIBS = @INTLLIBS@ INTLOBJS = @INTLOBJS@ LDFLAGS = @LDFLAGS@ @@ -116,10 +191,8 @@ STRIP = @STRIP@ USE_INCLUDED_LIBINTL = @USE_INCLUDED_LIBINTL@ USE_NLS = @USE_NLS@ VERSION = @VERSION@ - WARN_CFLAGS = @WARN_CFLAGS@ XGETTEXT = @XGETTEXT@ - YACC = `if [ -f ../bison/bison ] ; then echo ../bison/bison -y -L../bison/bison ; else echo @YACC@ ; fi` ac_ct_CC = @ac_ct_CC@ ac_ct_RANLIB = @ac_ct_RANLIB@ @@ -154,6 +227,7 @@ libdir = @libdir@ libexecdir = @libexecdir@ localstatedir = @localstatedir@ mandir = @mandir@ +mkdir_p = @mkdir_p@ obj_format = @obj_format@ oldincludedir = @oldincludedir@ prefix = @prefix@ @@ -168,16 +242,11 @@ target_cpu_type = @target_cpu_type@ target_os = @target_os@ target_vendor = @target_vendor@ te_file = @te_file@ - -AUTOMAKE_OPTIONS = cygnus dejagnu - +AUTOMAKE_OPTIONS = 1.8 cygnus dejagnu SUBDIRS = doc po - tooldir = $(exec_prefix)/$(target_alias) AM_CFLAGS = $(WARN_CFLAGS) - MKDEP = gcc -MM - TARG_CPU = @target_cpu_type@ TARG_CPU_C = $(srcdir)/config/tc-@target_cpu_type@.c TARG_CPU_O = tc-@target_cpu_type@.o @@ -195,7 +264,6 @@ IT_SRCS = itbl-parse.c itbl-lex.c $(srcdir)/itbl-ops.c IT_DEPS = $(srcdir)/itbl-parse.y $(srcdir)/itbl-lex.l $(srcdir)/config/itbl-@target_cpu_type@.h IT_OBJS = itbl-parse.o itbl-lex.o itbl-ops.o - # CPU types. This is only used for dependency information. CPU_TYPES = \ a29k \ @@ -251,7 +319,6 @@ CPU_TYPES = \ z8k - # Object format types. This is only used for dependency information. # We deliberately omit SOM, since it does not work as a cross assembler. OBJ_FORMATS = \ @@ -266,7 +333,6 @@ OBJ_FORMATS = \ vms - # This is an sh case which sets valid according to whether the CPU # type in the shell variable c and the OS type in the shell variable o # are supported. This helps cuts down on the amount of dependency @@ -276,7 +342,7 @@ CPU_OBJ_VALID = \ case $$o in \ aout) \ case $$c in \ - a29k | arm | cris | i386 | m68k | mips | ns32k | pdp11 | sparc | tahoe | tic30 | vax) \ + a29k | arm | cris | i386 | m68k | ns32k | pdp11 | sparc | tahoe | tic30 | vax) \ valid=yes ;; \ esac ;; \ bout) \ @@ -308,10 +374,8 @@ CPU_OBJ_VALID = \ esac; - # These are like CPU_TYPES and CPU_OBJ_VALID, for the obj=multi case. MULTI_CPU_TYPES = i386 mips cris - MULTI_CPU_OBJ_VALID = \ valid= ; \ case $$o in \ @@ -331,7 +395,6 @@ MULTI_CPU_OBJ_VALID = \ esac; - # Regular source files. GAS_CFILES = \ app.c \ @@ -364,9 +427,7 @@ GAS_CFILES = \ symbols.c \ write.c - CFILES = $(GAS_CFILES) itbl-ops.c - HFILES = \ as.h \ asintl.h \ @@ -397,7 +458,6 @@ HFILES = \ write.h - # CPU files in config. TARGET_CPU_CFILES = \ config/tc-a29k.c \ @@ -451,7 +511,6 @@ TARGET_CPU_CFILES = \ config/tc-xtensa.c \ config/tc-z8k.c - TARGET_CPU_HFILES = \ config/tc-a29k.h \ config/tc-alpha.h \ @@ -505,7 +564,6 @@ TARGET_CPU_HFILES = \ config/tc-z8k.h - # OBJ files in config OBJ_FORMAT_CFILES = \ config/obj-aout.c \ @@ -519,7 +577,6 @@ OBJ_FORMAT_CFILES = \ config/obj-som.c \ config/obj-vms.c - OBJ_FORMAT_HFILES = \ config/obj-aout.h \ config/obj-bout.h \ @@ -533,7 +590,6 @@ OBJ_FORMAT_HFILES = \ config/obj-vms.h - # Emulation header files in config TARG_ENV_HFILES = \ config/te-386bsd.h \ @@ -571,7 +627,6 @@ TARG_ENV_HFILES = \ config/te-tmips.h - # Multi files in config MULTI_CFILES = \ config/e-crisaout.c \ @@ -582,14 +637,12 @@ MULTI_CFILES = \ config/e-mipsecoff.c \ config/e-mipself.c - CONFIG_OBJS = \ $(TARG_CPU_O) \ $(OBJ_FORMAT_O) \ $(ATOF_TARG_O) \ $(extra_objects) - GENERIC_OBJS = \ app.o \ as.o \ @@ -621,26 +674,16 @@ GENERIC_OBJS = \ sb.o \ macro.o - OBJS = $(CONFIG_OBJS) $(GENERIC_OBJS) - POTFILES = $(MULTI_CFILES) $(TARGET_ENV_HFILES) $(OBJ_FORMAT_HFILES) \ $(OBJ_FORMAT_CFILES) $(TARGET_CPU_HFILES) $(TARGET_CPU_CFILES) \ $(HFILES) $(CFILES) $(GAS_CFILES) -RECURSIVE_TARGETS = install-info-recursive - -# Note: GASP is now deprecated and has been removed. It is still -# available in the CVS archive or older binutils releases if it is needed. -noinst_PROGRAMS = as-new noinst_SCRIPTS = $(GDBINIT) EXTRA_SCRIPTS = .gdbinit - EXTRA_DIST = make-gas.com m68k-parse.c itbl-parse.c itbl-parse.h itbl-lex.c - DISTCLEANFILES = targ-cpu.h obj-format.h targ-env.h itbl-cpu.h cgen-desc.h - # Now figure out from those variables how to compile and link. BASEDIR = $(srcdir)/.. BFDDIR = $(BASEDIR)/bfd @@ -658,19 +701,16 @@ INCLUDES = -D_GNU_SOURCE -I. -I$(srcdir) -I../bfd -I$(srcdir)/config -I$(INCDIR) # when building dependencies, because the dependency building is done # in a subdirectory. DEP_INCLUDES = -D_GNU_SOURCE -I.. -I$${srcdir} -I../../bfd -I$${srcdir}/config -I$${srcdir}/../include -I$${srcdir}/.. -I$${srcdir}/../bfd -I$${srcdir}/../intl -I../../intl -DLOCALEDIR="\"$(prefix)/share/locale\"" - DEP_FLAGS = -DBFD_ASSEMBLER -DOBJ_MAYBE_ELF \ -I. -I.. -I$${srcdir} -I../../bfd $(DEP_INCLUDES) - # How to link with both our special library facilities # and the system's installed libraries. GASLIBS = @OPCODES_LIB@ @BFDLIB@ ../libiberty/libiberty.a # Files to be copied away after each stage in building. STAGESTUFF = *.o $(noinst_PROGRAMS) - as_new_SOURCES = $(GAS_CFILES) as_new_LDADD = $(TARG_CPU_O) $(OBJ_FORMAT_O) $(ATOF_TARG_O) \ $(extra_objects) $(GASLIBS) $(INTLLIBS) $(LIBM) @@ -678,47 +718,35 @@ as_new_LDADD = $(TARG_CPU_O) $(OBJ_FORMAT_O) $(ATOF_TARG_O) \ as_new_DEPENDENCIES = $(TARG_CPU_O) $(OBJ_FORMAT_O) $(ATOF_TARG_O) \ $(extra_objects) $(GASLIBS) $(INTLDEPS) - EXPECT = `if [ -f $${rootme}/../expect/expect ] ; then \ echo $${rootme}/../expect/expect ; \ else echo expect ; fi` - RUNTEST = `if [ -f $${srcdir}/../dejagnu/runtest ] ; then \ echo $${srcdir}/../dejagnu/runtest ; else echo runtest; \ fi` RUNTESTFLAGS = - # The m68k operand parser. EXTRA_as_new_SOURCES = config/m68k-parse.y - - -# stand-alone itbl assembler & disassembler -EXTRA_PROGRAMS = itbl-test itbl_test_SOURCES = itbl-parse.y itbl-lex.l itbl_test_LDADD = itbl-tops.o itbl-test.o $(GASLIBS) @LEXLIB@ - # CGEN interface. CGEN_CPU_PREFIX = @cgen_cpu_prefix@ - # Remake the info files. MOSTLYCLEANFILES = $(STAGESTUFF) core stamp-mk.com \ testsuite/*.o testsuite/*.out testsuite/gas.log testsuite/gas.sum \ testsuite/site.exp site.bak site.exp stage stage1 stage2 - CLEANFILES = dep.sed DEPTC DEPTCA DEPOBJ DEPOBJA DEP2 DEP2A DEP1 DEPA DEP DEPDIR - against = stage2 - DEP_FILE_DEPS = $(CFILES) $(HFILES) $(TARGET_CPU_CFILES) \ $(TARGET_CPU_HFILES) $(OBJ_FORMAT_CFILES) $(OBJ_FORMAT_HFILES) - +CONFIG_STATUS_DEPENDENCIES = $(BFDDIR)/configure.in AMKDEP = #DO NOT PUT ANYTHING BETWEEN THIS LINE AND THE MATCHING WARNING BELOW. DEPTC_a29k_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \ $(srcdir)/config/tc-a29k.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \ @@ -992,14 +1020,15 @@ DEPTC_m32r_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \ $(BFDDIR)/libcoff.h $(INCDIR)/bfdlink.h $(INCDIR)/safe-ctype.h \ subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/m32r-desc.h \ $(INCDIR)/opcode/cgen.h $(srcdir)/../opcodes/m32r-opc.h \ - cgen.h + cgen.h $(INCDIR)/elf/m32r.h $(INCDIR)/elf/reloc-macros.h DEPTC_m32r_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-m32r.h \ $(INCDIR)/safe-ctype.h subsegs.h $(INCDIR)/obstack.h \ $(srcdir)/../opcodes/m32r-desc.h $(INCDIR)/opcode/cgen.h \ - $(srcdir)/../opcodes/m32r-opc.h cgen.h + $(srcdir)/../opcodes/m32r-opc.h cgen.h $(INCDIR)/elf/m32r.h \ + $(INCDIR)/elf/reloc-macros.h DEPTC_m68hc11_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \ $(srcdir)/config/tc-m68hc11.h $(INCDIR)/coff/internal.h \ @@ -1234,14 +1263,16 @@ DEPTC_sh_coff = $(INCDIR)/symcat.h $(srcdir)/config/obj-coff.h \ $(srcdir)/config/tc-sh.h $(INCDIR)/coff/internal.h \ $(INCDIR)/coff/sh.h $(INCDIR)/coff/external.h $(BFDDIR)/libcoff.h \ $(INCDIR)/bfdlink.h subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/sh-opc.h \ - $(INCDIR)/safe-ctype.h struc-symbol.h dwarf2dbg.h dw2gencfi.h + $(INCDIR)/safe-ctype.h struc-symbol.h dwarf2dbg.h dw2gencfi.h \ + $(INCDIR)/elf/dwarf2.h DEPTC_sh_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \ $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(srcdir)/config/tc-sh.h \ subsegs.h $(INCDIR)/obstack.h $(srcdir)/../opcodes/sh-opc.h \ $(INCDIR)/safe-ctype.h struc-symbol.h $(INCDIR)/elf/sh.h \ - $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h dw2gencfi.h + $(INCDIR)/elf/reloc-macros.h dwarf2dbg.h dw2gencfi.h \ + $(INCDIR)/elf/dwarf2.h DEPTC_sh64_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \ $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h \ @@ -1249,7 +1280,8 @@ DEPTC_sh64_elf = $(INCDIR)/symcat.h $(srcdir)/config/obj-elf.h \ $(srcdir)/config/tc-sh.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \ $(BFDDIR)/elf32-sh64.h $(INCDIR)/safe-ctype.h $(srcdir)/../opcodes/sh64-opc.h \ $(srcdir)/config/tc-sh.c subsegs.h $(INCDIR)/obstack.h \ - $(srcdir)/../opcodes/sh-opc.h struc-symbol.h dwarf2dbg.h dw2gencfi.h + $(srcdir)/../opcodes/sh-opc.h struc-symbol.h dwarf2dbg.h \ + dw2gencfi.h $(INCDIR)/elf/dwarf2.h DEPTC_sparc_aout = $(INCDIR)/symcat.h $(srcdir)/config/obj-aout.h \ $(srcdir)/config/tc-sparc.h $(BFDDIR)/libaout.h $(INCDIR)/bfdlink.h \ @@ -2512,79 +2544,43 @@ DEP_mips_multi = $(DEP_mips_coff) $(DEP_mips_ecoff) \ DEP_cris_multi = $(DEP_cris_aout) $(DEP_cris_elf) BMKDEP = #DO NOT PUT ANYTHING BETWEEN THIS LINE AND THE MATCHING WARNING ABOVE. -subdir = . -ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 -mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs -CONFIG_HEADER = config.h -CONFIG_CLEAN_FILES = gdb.ini .gdbinit po/Makefile.in -EXTRA_PROGRAMS = itbl-test$(EXEEXT) -noinst_PROGRAMS = as-new$(EXEEXT) -PROGRAMS = $(noinst_PROGRAMS) - -am__objects_1 = app.$(OBJEXT) as.$(OBJEXT) atof-generic.$(OBJEXT) \ - bignum-copy.$(OBJEXT) cond.$(OBJEXT) depend.$(OBJEXT) \ - dwarf2dbg.$(OBJEXT) dw2gencfi.$(OBJEXT) ecoff.$(OBJEXT) \ - ehopt.$(OBJEXT) expr.$(OBJEXT) flonum-copy.$(OBJEXT) \ - flonum-konst.$(OBJEXT) flonum-mult.$(OBJEXT) frags.$(OBJEXT) \ - hash.$(OBJEXT) input-file.$(OBJEXT) input-scrub.$(OBJEXT) \ - listing.$(OBJEXT) literal.$(OBJEXT) macro.$(OBJEXT) \ - messages.$(OBJEXT) output-file.$(OBJEXT) read.$(OBJEXT) \ - sb.$(OBJEXT) stabs.$(OBJEXT) subsegs.$(OBJEXT) \ - symbols.$(OBJEXT) write.$(OBJEXT) -am_as_new_OBJECTS = $(am__objects_1) -as_new_OBJECTS = $(am_as_new_OBJECTS) -as_new_LDFLAGS = -am_itbl_test_OBJECTS = itbl-parse.$(OBJEXT) itbl-lex.$(OBJEXT) -itbl_test_OBJECTS = $(am_itbl_test_OBJECTS) -itbl_test_DEPENDENCIES = itbl-tops.o itbl-test.o \ - ../libiberty/libiberty.a -itbl_test_LDFLAGS = -SCRIPTS = $(noinst_SCRIPTS) - - -DEFAULT_INCLUDES = -I. -I$(srcdir) -I. -depcomp = -am__depfiles_maybe = -COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \ - $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -LTCOMPILE = $(LIBTOOL) --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) \ - $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -CCLD = $(CC) -LINK = $(LIBTOOL) --mode=link $(CCLD) $(AM_CFLAGS) $(CFLAGS) \ - $(AM_LDFLAGS) $(LDFLAGS) -o $@ -LEXCOMPILE = $(LEX) $(LFLAGS) $(AM_LFLAGS) -LTLEXCOMPILE = $(LIBTOOL) --mode=compile $(LEX) $(LFLAGS) $(AM_LFLAGS) -YACCCOMPILE = $(YACC) $(YFLAGS) $(AM_YFLAGS) -LTYACCCOMPILE = $(LIBTOOL) --mode=compile $(YACC) $(YFLAGS) $(AM_YFLAGS) -YLWRAP = $(top_srcdir)/../ylwrap -DIST_SOURCES = $(as_new_SOURCES) $(EXTRA_as_new_SOURCES) \ - $(itbl_test_SOURCES) - -RECURSIVE_TARGETS = install-info-recursive info-recursive dvi-recursive \ - pdf-recursive ps-recursive uninstall-info-recursive \ - all-recursive install-data-recursive install-exec-recursive \ - installdirs-recursive install-recursive uninstall-recursive \ - check-recursive installcheck-recursive -SOURCES = $(as_new_SOURCES) $(EXTRA_as_new_SOURCES) $(itbl_test_SOURCES) - all: config.h $(MAKE) $(AM_MAKEFLAGS) all-recursive .SUFFIXES: .SUFFIXES: .c .l .lo .o .obj .y - -am__CONFIG_DISTCLEAN_FILES = config.status config.cache config.log \ - configure.lineno -$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ Makefile.am $(top_srcdir)/configure.in $(ACLOCAL_M4) +am--refresh: + @: +$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + echo ' cd $(srcdir) && $(AUTOMAKE) --foreign '; \ + cd $(srcdir) && $(AUTOMAKE) --foreign \ + && exit 0; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \ cd $(top_srcdir) && \ - $(AUTOMAKE) --cygnus Makefile + $(AUTOMAKE) --foreign Makefile +.PRECIOUS: Makefile +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + @case '$?' in \ + *config.status*) \ + echo ' $(SHELL) ./config.status'; \ + $(SHELL) ./config.status;; \ + *) \ + echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \ + cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \ + esac; -$(top_builddir)/config.status: $(srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) +$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) $(SHELL) ./config.status --recheck -$(srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(srcdir)/configure.in $(ACLOCAL_M4) $(CONFIGURE_DEPENDENCIES) - cd $(srcdir) && $(AUTOCONF) -$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ configure.in acinclude.m4 +$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps) + cd $(srcdir) && $(AUTOCONF) +$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps) cd $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS) config.h: stamp-h1 @@ -2596,16 +2592,16 @@ config.h: stamp-h1 stamp-h1: $(srcdir)/config.in $(top_builddir)/config.status @rm -f stamp-h1 cd $(top_builddir) && $(SHELL) ./config.status config.h - -$(srcdir)/config.in: @MAINTAINER_MODE_TRUE@ $(top_srcdir)/configure.in $(ACLOCAL_M4) +$(srcdir)/config.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps) cd $(top_srcdir) && $(AUTOHEADER) - touch $(srcdir)/config.in + rm -f stamp-h1 + touch $@ distclean-hdr: -rm -f config.h stamp-h1 -gdb.ini: $(top_builddir)/config.status gdbinit.in +gdb.ini: $(top_builddir)/config.status $(srcdir)/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ -.gdbinit: $(top_builddir)/config.status gdbinit.in +.gdbinit: $(top_builddir)/config.status $(srcdir)/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ po/Makefile.in: $(top_builddir)/config.status $(top_srcdir)/po/Make-in cd $(top_builddir) && $(SHELL) ./config.status $@ @@ -2624,27 +2620,27 @@ itbl-test$(EXEEXT): $(itbl_test_OBJECTS) $(itbl_test_DEPENDENCIES) $(LINK) $(itbl_test_LDFLAGS) $(itbl_test_OBJECTS) $(itbl_test_LDADD) $(LIBS) mostlyclean-compile: - -rm -f *.$(OBJEXT) core *.core + -rm -f *.$(OBJEXT) distclean-compile: -rm -f *.tab.c .c.o: - $(COMPILE) -c `test -f '$<' || echo '$(srcdir)/'`$< + $(COMPILE) -c $< .c.obj: - $(COMPILE) -c `if test -f '$<'; then $(CYGPATH_W) '$<'; else $(CYGPATH_W) '$(srcdir)/$<'; fi` + $(COMPILE) -c `$(CYGPATH_W) '$<'` .c.lo: - $(LTCOMPILE) -c -o $@ `test -f '$<' || echo '$(srcdir)/'`$< + $(LTCOMPILE) -c -o $@ $< .l.c: - $(LEXCOMPILE) `test -f $< || echo '$(srcdir)/'`$< + $(LEXCOMPILE) $< sed '/^#/ s|$(LEX_OUTPUT_ROOT)\.c|$@|' $(LEX_OUTPUT_ROOT).c >$@ rm -f $(LEX_OUTPUT_ROOT).c .y.c: - $(SHELL) $(YLWRAP) `test -f '$<' || echo '$(srcdir)/'`$< y.tab.c $@ y.tab.h $*.h y.output $*.output -- $(YACCCOMPILE) + $(SHELL) $(YLWRAP) $< y.tab.c $@ y.tab.h $*.h y.output $*.output -- $(YACCCOMPILE) mostlyclean-libtool: -rm -f *.lo @@ -2715,14 +2711,6 @@ ctags-recursive: test "$$subdir" = . || (cd $$subdir && $(MAKE) $(AM_MAKEFLAGS) ctags); \ done -ETAGS = etags -ETAGSFLAGS = - -CTAGS = ctags -CTAGSFLAGS = - -tags: TAGS - ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES) list='$(SOURCES) $(HEADERS) $(LISP) $(TAGS_FILES)'; \ unique=`for i in $$list; do \ @@ -2731,6 +2719,7 @@ ID: $(HEADERS) $(SOURCES) $(LISP) $(TAGS_FILES) $(AWK) ' { files[$$0] = 1; } \ END { for (i in files) print i; }'`; \ mkid -fID $$unique +tags: TAGS TAGS: tags-recursive $(HEADERS) $(SOURCES) config.in $(TAGS_DEPENDENCIES) \ $(TAGS_FILES) $(LISP) @@ -2756,7 +2745,6 @@ TAGS: tags-recursive $(HEADERS) $(SOURCES) config.in $(TAGS_DEPENDENCIES) \ test -z "$(ETAGS_ARGS)$$tags$$unique" \ || $(ETAGS) $(ETAGSFLAGS) $(AM_ETAGSFLAGS) $(ETAGS_ARGS) \ $$tags $$unique - ctags: CTAGS CTAGS: ctags-recursive $(HEADERS) $(SOURCES) config.in $(TAGS_DEPENDENCIES) \ $(TAGS_FILES) $(LISP) @@ -2779,8 +2767,6 @@ GTAGS: distclean-tags: -rm -f TAGS ID GTAGS GRTAGS GSYMS GPATH tags -DEJATOOL = $(PACKAGE) -RUNTESTDEFAULTFLAGS = --tool $$tool --srcdir $$srcdir site.exp: Makefile @echo 'Making a new site.exp file...' @echo '## these variables are automatically generated by make ##' >site.tmp @@ -2812,6 +2798,7 @@ check: check-recursive all-am: Makefile $(PROGRAMS) $(SCRIPTS) config.h installdirs: installdirs-recursive installdirs-am: +install: install-recursive install-exec: install-exec-recursive install-data: install-data-recursive uninstall: uninstall-recursive @@ -2822,7 +2809,7 @@ install-am: all-am installcheck: installcheck-recursive install-strip: $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ - INSTALL_STRIP_FLAG=-s \ + install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ `test -z '$(STRIP)' || \ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install mostlyclean-generic: @@ -2857,6 +2844,8 @@ dvi: dvi-recursive dvi-am: +html: html-recursive + info: info-recursive info-am: @@ -2865,7 +2854,7 @@ install-data-am: install-exec-am: install-exec-local -install-info: +install-info: install-info-recursive install-man: @@ -2894,33 +2883,25 @@ uninstall-am: uninstall-info: uninstall-info-recursive -.PHONY: $(RECURSIVE_TARGETS) CTAGS GTAGS all all-am check check-DEJAGNU \ - check-am clean clean-generic clean-libtool clean-noinstPROGRAMS \ - clean-recursive ctags ctags-recursive distclean \ - distclean-DEJAGNU distclean-compile distclean-generic \ - distclean-hdr distclean-libtool distclean-recursive \ - distclean-tags dvi dvi-am dvi-recursive info info-am \ - info-recursive install install-am install-data install-data-am \ - install-data-recursive install-exec install-exec-am \ - install-exec-local install-exec-recursive install-info \ - install-info-am install-man install-recursive install-strip \ - installcheck installcheck-am installdirs installdirs-am \ - installdirs-recursive maintainer-clean maintainer-clean-generic \ - maintainer-clean-recursive mostlyclean mostlyclean-compile \ - mostlyclean-generic mostlyclean-libtool mostlyclean-recursive \ - pdf pdf-am pdf-recursive ps ps-am ps-recursive tags \ - tags-recursive uninstall uninstall-am uninstall-info-am \ - uninstall-info-recursive uninstall-recursive +.PHONY: $(RECURSIVE_TARGETS) CTAGS GTAGS all all-am am--refresh check \ + check-DEJAGNU check-am clean clean-generic clean-libtool \ + clean-noinstPROGRAMS clean-recursive ctags ctags-recursive \ + distclean distclean-DEJAGNU distclean-compile \ + distclean-generic distclean-hdr distclean-libtool \ + distclean-recursive distclean-tags dvi dvi-am html html-am \ + info info-am install install-am install-data install-data-am \ + install-exec install-exec-am install-exec-local install-info \ + install-info-am install-man install-strip installcheck \ + installcheck-am installdirs installdirs-am maintainer-clean \ + maintainer-clean-generic maintainer-clean-recursive \ + mostlyclean mostlyclean-compile mostlyclean-generic \ + mostlyclean-libtool mostlyclean-recursive pdf pdf-am ps ps-am \ + tags tags-recursive uninstall uninstall-am uninstall-info-am po/POTFILES.in: @MAINT@ Makefile for f in $(POTFILES); do echo $$f; done | LC_COLLATE= sort > tmp \ && mv tmp $(srcdir)/po/POTFILES.in -# We want install to imply install-info as per GNU standards, despite the -# cygnus option. -install: install-recursive install-info -install-info: install-info-recursive - $(srcdir)/make-gas.com: stamp-mk.com stamp-mk.com: vmsconf.sh Makefile sh $(srcdir)/vmsconf.sh $(GENERIC_OBJS) > new-make.com @@ -3169,8 +3150,6 @@ de-stage3: - (cd stage3 ; rm -f as$(EXEEXT) ; mv -f * ..) - rmdir stage3 -Makefile: $(BFDDIR)/configure.in - # Automatic dependency computation. This is a real pain, because the # dependencies change based on target_cpu_type and obj_format. # Just to make things even more complicated, automake separates the @@ -1,5 +1,11 @@ -*- text -*- +* Support for ColdFire EMAC instructions added and Motorola syntax for MAC/EMAC + instrucitons. + +* The MIPS -membedded-pic option (Embedded-PIC code generation) is + deprecated and will be removed in a future release. + * Added PIC m32r Linux (ELF) and support to M32R assembler. * Added support for ARM V6. diff --git a/gas/aclocal.m4 b/gas/aclocal.m4 index a0aa5780646..6c3e0cda167 100644 --- a/gas/aclocal.m4 +++ b/gas/aclocal.m4 @@ -1,6 +1,6 @@ -# generated automatically by aclocal 1.7.8 -*- Autoconf -*- +# generated automatically by aclocal 1.8.2 -*- Autoconf -*- -# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002 +# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 # Free Software Foundation, Inc. # This file is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, @@ -11,232 +11,9 @@ # even the implied warranty of MERCHANTABILITY or FITNESS FOR A # PARTICULAR PURPOSE. -dnl GAS_CHECK_DECL_NEEDED(name, typedefname, typedef, headers) -AC_DEFUN(GAS_CHECK_DECL_NEEDED,[ -AC_MSG_CHECKING(whether declaration is required for $1) -AC_CACHE_VAL(gas_cv_decl_needed_$1, -AC_TRY_LINK([$4], -[ -typedef $3; -$2 x; -x = ($2) $1; -], gas_cv_decl_needed_$1=no, gas_cv_decl_needed_$1=yes))dnl -AC_MSG_RESULT($gas_cv_decl_needed_$1) -if test $gas_cv_decl_needed_$1 = yes; then - AC_DEFINE([NEED_DECLARATION_]translit($1, [a-z], [A-Z]), 1, - [Define if $1 is not declared in system header files.]) -fi -])dnl -dnl -dnl Some non-ANSI preprocessors botch requoting inside strings. That's bad -dnl enough, but on some of those systems, the assert macro relies on requoting -dnl working properly! -dnl GAS_WORKING_ASSERT -AC_DEFUN(GAS_WORKING_ASSERT, -[AC_MSG_CHECKING([for working assert macro]) -AC_CACHE_VAL(gas_cv_assert_ok, -AC_TRY_LINK([#include <assert.h> -#include <stdio.h>], [ -/* check for requoting problems */ -static int a, b, c, d; -static char *s; -assert (!strcmp(s, "foo bar baz quux")); -/* check for newline handling */ -assert (a == b - || c == d); -], gas_cv_assert_ok=yes, gas_cv_assert_ok=no))dnl -AC_MSG_RESULT($gas_cv_assert_ok) -test $gas_cv_assert_ok = yes || AC_DEFINE(BROKEN_ASSERT, 1, [assert broken?]) -])dnl -dnl -dnl Since many Bourne shell implementations lack subroutines, use this -dnl hack to simplify the code in configure.in. -dnl GAS_UNIQ(listvar) -AC_DEFUN(GAS_UNIQ, -[_gas_uniq_list="[$]$1" -_gas_uniq_newlist="" -dnl Protect against empty input list. -for _gas_uniq_i in _gas_uniq_dummy [$]_gas_uniq_list ; do - case [$]_gas_uniq_i in - _gas_uniq_dummy) ;; - *) case " [$]_gas_uniq_newlist " in - *" [$]_gas_uniq_i "*) ;; - *) _gas_uniq_newlist="[$]_gas_uniq_newlist [$]_gas_uniq_i" ;; - esac ;; - esac -done -$1=[$]_gas_uniq_newlist -])dnl - -sinclude(../libtool.m4) -dnl The lines below arrange for aclocal not to bring libtool.m4 -dnl AM_PROG_LIBTOOL into aclocal.m4, while still arranging for automake -dnl to add a definition of LIBTOOL to Makefile.in. -ifelse(yes,no,[ -AC_DEFUN([AM_PROG_LIBTOOL],) -AC_DEFUN([AC_CHECK_LIBM],) -AC_SUBST(LIBTOOL) -]) - -sinclude(../gettext.m4) -ifelse(yes,no,[ -AC_DEFUN([CY_WITH_NLS],) -AC_SUBST(INTLLIBS) -]) - -# isc-posix.m4 serial 2 (gettext-0.11.2) -dnl Copyright (C) 1995-2002 Free Software Foundation, Inc. -dnl This file is free software, distributed under the terms of the GNU -dnl General Public License. As a special exception to the GNU General -dnl Public License, this file may be distributed as part of a program -dnl that contains a configuration script generated by Autoconf, under -dnl the same distribution terms as the rest of that program. - -# This file is not needed with autoconf-2.53 and newer. Remove it in 2005. - -# This test replaces the one in autoconf. -# Currently this macro should have the same name as the autoconf macro -# because gettext's gettext.m4 (distributed in the automake package) -# still uses it. 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The stamp files are numbered to have different names. - -# Autoconf calls _AC_AM_CONFIG_HEADER_HOOK (when defined) in the -# loop where config.status creates the headers, so we can generate -# our stamp files there. -AC_DEFUN([_AC_AM_CONFIG_HEADER_HOOK], -[# Compute $1's index in $config_headers. -_am_stamp_count=1 -for _am_header in $config_headers :; do - case $_am_header in - $1 | $1:* ) - break ;; - * ) - _am_stamp_count=`expr $_am_stamp_count + 1` ;; - esac -done -echo "timestamp for $1" >`AS_DIRNAME([$1])`/stamp-h[]$_am_stamp_count]) - -# Copyright 2002 Free Software Foundation, Inc. +# -*- Autoconf -*- +# Copyright (C) 2002, 2003 Free Software Foundation, Inc. +# Generated from amversion.in; do not edit by hand. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -256,172 +33,18 @@ echo "timestamp for $1" >`AS_DIRNAME([$1])`/stamp-h[]$_am_stamp_count]) # ---------------------------- # Automake X.Y traces this macro to ensure aclocal.m4 has been # generated from the m4 files accompanying Automake X.Y. -AC_DEFUN([AM_AUTOMAKE_VERSION],[am__api_version="1.7"]) +AC_DEFUN([AM_AUTOMAKE_VERSION], [am__api_version="1.8"]) # AM_SET_CURRENT_AUTOMAKE_VERSION # ------------------------------- # Call AM_AUTOMAKE_VERSION so it can be traced. # This function is AC_REQUIREd by AC_INIT_AUTOMAKE. AC_DEFUN([AM_SET_CURRENT_AUTOMAKE_VERSION], - [AM_AUTOMAKE_VERSION([1.7.8])]) - -# Helper functions for option handling. -*- Autoconf -*- - -# Copyright 2001, 2002 Free Software Foundation, Inc. - -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. - -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. - -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA -# 02111-1307, USA. - -# serial 2 - -# _AM_MANGLE_OPTION(NAME) -# ----------------------- -AC_DEFUN([_AM_MANGLE_OPTION], -[[_AM_OPTION_]m4_bpatsubst($1, [[^a-zA-Z0-9_]], [_])]) - -# _AM_SET_OPTION(NAME) -# ------------------------------ -# Set option NAME. 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See the -# GNU General Public License for more details. - -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA -# 02111-1307, USA. - -# serial 3 - -# AM_SANITY_CHECK -# --------------- -AC_DEFUN([AM_SANITY_CHECK], -[AC_MSG_CHECKING([whether build environment is sane]) -# Just in case -sleep 1 -echo timestamp > conftest.file -# Do `set' in a subshell so we don't clobber the current shell's -# arguments. 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See the -# GNU General Public License for more details. - -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA -# 02111-1307, USA. - -# serial 3 - -# AM_MISSING_PROG(NAME, PROGRAM) -# ------------------------------ -AC_DEFUN([AM_MISSING_PROG], -[AC_REQUIRE([AM_MISSING_HAS_RUN]) -$1=${$1-"${am_missing_run}$2"} -AC_SUBST($1)]) - - -# AM_MISSING_HAS_RUN -# ------------------ -# Define MISSING if not defined so far and test if it supports --run. -# If it does, set am_missing_run to use it, otherwise, to nothing. -AC_DEFUN([AM_MISSING_HAS_RUN], -[AC_REQUIRE([AM_AUX_DIR_EXPAND])dnl -test x"${MISSING+set}" = xset || MISSING="\${SHELL} $am_aux_dir/missing" -# Use eval to expand $SHELL -if eval "$MISSING --run true"; then - am_missing_run="$MISSING --run " -else - am_missing_run= - AC_MSG_WARN([`missing' script is too old or missing]) -fi -]) + [AM_AUTOMAKE_VERSION([1.8.2])]) # AM_AUX_DIR_EXPAND -# Copyright 2001 Free Software Foundation, Inc. +# Copyright (C) 2001, 2003 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -476,81 +99,16 @@ fi # absolute PATH. The drawback is that using absolute paths prevent a # configured tree to be moved without reconfiguration. -# Rely on autoconf to set up CDPATH properly. -AC_PREREQ([2.50]) - -AC_DEFUN([AM_AUX_DIR_EXPAND], [ +AC_DEFUN([AM_AUX_DIR_EXPAND], +[dnl Rely on autoconf to set up CDPATH properly. +AC_PREREQ([2.50])dnl # expand $ac_aux_dir to an absolute path am_aux_dir=`cd $ac_aux_dir && pwd` ]) -# AM_PROG_INSTALL_SH -# ------------------ -# Define $install_sh. - -# Copyright 2001 Free Software Foundation, Inc. - -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. - -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. - -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA -# 02111-1307, USA. - -AC_DEFUN([AM_PROG_INSTALL_SH], -[AC_REQUIRE([AM_AUX_DIR_EXPAND])dnl -install_sh=${install_sh-"$am_aux_dir/install-sh"} -AC_SUBST(install_sh)]) - -# AM_PROG_INSTALL_STRIP - -# Copyright 2001 Free Software Foundation, Inc. - -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. - -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. - -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA -# 02111-1307, USA. - -# One issue with vendor `install' (even GNU) is that you can't -# specify the program used to strip binaries. This is especially -# annoying in cross-compiling environments, where the build's strip -# is unlikely to handle the host's binaries. -# Fortunately install-sh will honor a STRIPPROG variable, so we -# always use install-sh in `make install-strip', and initialize -# STRIPPROG with the value of the STRIP variable (set by the user). -AC_DEFUN([AM_PROG_INSTALL_STRIP], -[AC_REQUIRE([AM_PROG_INSTALL_SH])dnl -# Installed binaries are usually stripped using `strip' when the user -# run `make install-strip'. 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For instance MS-DOS doesn't. -AC_DEFUN([AM_SET_LEADING_DOT], -[rm -rf .tst 2>/dev/null -mkdir .tst 2>/dev/null -if test -d .tst; then - am__leading_dot=. +# AM_CONDITIONAL(NAME, SHELL-CONDITION) +# ------------------------------------- +# Define a conditional. +AC_DEFUN([AM_CONDITIONAL], +[AC_PREREQ(2.52)dnl + ifelse([$1], [TRUE], [AC_FATAL([$0: invalid condition: $1])], + [$1], [FALSE], [AC_FATAL([$0: invalid condition: $1])])dnl +AC_SUBST([$1_TRUE]) +AC_SUBST([$1_FALSE]) +if $2; then + $1_TRUE= + $1_FALSE='#' else - am__leading_dot=_ + $1_TRUE='#' + $1_FALSE= fi -rmdir .tst 2>/dev/null -AC_SUBST([am__leading_dot])]) +AC_CONFIG_COMMANDS_PRE( +[if test -z "${$1_TRUE}" && test -z "${$1_FALSE}"; then + AC_MSG_ERROR([conditional "$1" was never defined. +Usually this means the macro was only invoked conditionally.]) +fi])]) -# serial 5 -*- Autoconf -*- +# serial 6 -*- Autoconf -*- -# Copyright (C) 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. +# Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004 +# Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -732,8 +300,8 @@ AC_SUBST([DEPDIR], ["${am__leading_dot}deps"])dnl # ------------ AC_DEFUN([AM_DEP_TRACK], [AC_ARG_ENABLE(dependency-tracking, -[ --disable-dependency-tracking Speeds up one-time builds - --enable-dependency-tracking Do not reject slow dependency extractors]) +[ --disable-dependency-tracking speeds up one-time build + --enable-dependency-tracking do not reject slow dependency extractors]) if test "x$enable_dependency_tracking" != xno; then am_depcomp="$ac_aux_dir/depcomp" AMDEPBACKSLASH='\' @@ -744,7 +312,7 @@ AC_SUBST([AMDEPBACKSLASH]) # Generate code to set up dependency tracking. -*- Autoconf -*- -# Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +# Copyright (C) 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -826,6 +394,286 @@ AC_DEFUN([AM_OUTPUT_DEPENDENCY_COMMANDS], [AMDEP_TRUE="$AMDEP_TRUE" ac_aux_dir="$ac_aux_dir"]) ]) +# Like AC_CONFIG_HEADER, but automatically create stamp file. -*- Autoconf -*- + +# Copyright (C) 1996, 1997, 2000, 2001, 2003 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. + +# serial 7 + +# AM_CONFIG_HEADER is obsolete. It has been replaced by AC_CONFIG_HEADERS. +AU_DEFUN([AM_CONFIG_HEADER], [AC_CONFIG_HEADERS($@)]) + +# Do all the work for Automake. -*- Autoconf -*- + +# This macro actually does too much some checks are only needed if +# your package does certain things. But this isn't really a big deal. + +# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 +# Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. + +# serial 11 + +# AM_INIT_AUTOMAKE(PACKAGE, VERSION, [NO-DEFINE]) +# AM_INIT_AUTOMAKE([OPTIONS]) +# ----------------------------------------------- +# The call with PACKAGE and VERSION arguments is the old style +# call (pre autoconf-2.50), which is being phased out. PACKAGE +# and VERSION should now be passed to AC_INIT and removed from +# the call to AM_INIT_AUTOMAKE. +# We support both call styles for the transition. After +# the next Automake release, Autoconf can make the AC_INIT +# arguments mandatory, and then we can depend on a new Autoconf +# release and drop the old call support. +AC_DEFUN([AM_INIT_AUTOMAKE], +[AC_PREREQ([2.58])dnl +dnl Autoconf wants to disallow AM_ names. We explicitly allow +dnl the ones we care about. +m4_pattern_allow([^AM_[A-Z]+FLAGS$])dnl +AC_REQUIRE([AM_SET_CURRENT_AUTOMAKE_VERSION])dnl +AC_REQUIRE([AC_PROG_INSTALL])dnl +# test to see if srcdir already configured +if test "`cd $srcdir && pwd`" != "`pwd`" && + test -f $srcdir/config.status; then + AC_MSG_ERROR([source directory already configured; run "make distclean" there first]) +fi + +# test whether we have cygpath +if test -z "$CYGPATH_W"; then + if (cygpath --version) >/dev/null 2>/dev/null; then + CYGPATH_W='cygpath -w' + else + CYGPATH_W=echo + fi +fi +AC_SUBST([CYGPATH_W]) + +# Define the identity of the package. +dnl Distinguish between old-style and new-style calls. +m4_ifval([$2], +[m4_ifval([$3], [_AM_SET_OPTION([no-define])])dnl + AC_SUBST([PACKAGE], [$1])dnl + AC_SUBST([VERSION], [$2])], +[_AM_SET_OPTIONS([$1])dnl + AC_SUBST([PACKAGE], ['AC_PACKAGE_TARNAME'])dnl + AC_SUBST([VERSION], ['AC_PACKAGE_VERSION'])])dnl + +_AM_IF_OPTION([no-define],, +[AC_DEFINE_UNQUOTED(PACKAGE, "$PACKAGE", [Name of package]) + AC_DEFINE_UNQUOTED(VERSION, "$VERSION", [Version number of package])])dnl + +# Some tools Automake needs. +AC_REQUIRE([AM_SANITY_CHECK])dnl +AC_REQUIRE([AC_ARG_PROGRAM])dnl +AM_MISSING_PROG(ACLOCAL, aclocal-${am__api_version}) +AM_MISSING_PROG(AUTOCONF, autoconf) +AM_MISSING_PROG(AUTOMAKE, automake-${am__api_version}) +AM_MISSING_PROG(AUTOHEADER, autoheader) +AM_MISSING_PROG(MAKEINFO, makeinfo) +AM_MISSING_PROG(AMTAR, tar) +AM_PROG_INSTALL_SH +AM_PROG_INSTALL_STRIP +AC_REQUIRE([AM_PROG_MKDIR_P])dnl +# We need awk for the "check" target. The system "awk" is bad on +# some platforms. +AC_REQUIRE([AC_PROG_AWK])dnl +AC_REQUIRE([AC_PROG_MAKE_SET])dnl +AC_REQUIRE([AM_SET_LEADING_DOT])dnl + +_AM_IF_OPTION([no-dependencies],, +[AC_PROVIDE_IFELSE([AC_PROG_CC], + [_AM_DEPENDENCIES(CC)], + [define([AC_PROG_CC], + defn([AC_PROG_CC])[_AM_DEPENDENCIES(CC)])])dnl +AC_PROVIDE_IFELSE([AC_PROG_CXX], + [_AM_DEPENDENCIES(CXX)], + [define([AC_PROG_CXX], + defn([AC_PROG_CXX])[_AM_DEPENDENCIES(CXX)])])dnl +]) +]) + + +# When config.status generates a header, we must update the stamp-h file. +# This file resides in the same directory as the config header +# that is generated. The stamp files are numbered to have different names. + +# Autoconf calls _AC_AM_CONFIG_HEADER_HOOK (when defined) in the +# loop where config.status creates the headers, so we can generate +# our stamp files there. +AC_DEFUN([_AC_AM_CONFIG_HEADER_HOOK], +[# Compute $1's index in $config_headers. +_am_stamp_count=1 +for _am_header in $config_headers :; do + case $_am_header in + $1 | $1:* ) + break ;; + * ) + _am_stamp_count=`expr $_am_stamp_count + 1` ;; + esac +done +echo "timestamp for $1" >`AS_DIRNAME([$1])`/stamp-h[]$_am_stamp_count]) + +# AM_PROG_INSTALL_SH +# ------------------ +# Define $install_sh. + +# Copyright (C) 2001, 2003 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. + +AC_DEFUN([AM_PROG_INSTALL_SH], +[AC_REQUIRE([AM_AUX_DIR_EXPAND])dnl +install_sh=${install_sh-"$am_aux_dir/install-sh"} +AC_SUBST(install_sh)]) + +# -*- Autoconf -*- +# Copyright (C) 2003 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. + +# serial 1 + +# Check whether the underlying file-system supports filenames +# with a leading dot. For instance MS-DOS doesn't. +AC_DEFUN([AM_SET_LEADING_DOT], +[rm -rf .tst 2>/dev/null +mkdir .tst 2>/dev/null +if test -d .tst; then + am__leading_dot=. +else + am__leading_dot=_ +fi +rmdir .tst 2>/dev/null +AC_SUBST([am__leading_dot])]) + + +# Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 +# Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. + +# serial 4 + +# AM_PROG_LEX +# ----------- +# Autoconf leaves LEX=: if lex or flex can't be found. Change that to a +# "missing" invocation, for better error output. +AC_DEFUN([AM_PROG_LEX], +[AC_PREREQ(2.50)dnl +AC_REQUIRE([AM_MISSING_HAS_RUN])dnl +AC_REQUIRE([AC_PROG_LEX])dnl +if test "$LEX" = :; then + LEX=${am_missing_run}flex +fi]) + +# Add --enable-maintainer-mode option to configure. +# From Jim Meyering + +# Copyright (C) 1996, 1998, 2000, 2001, 2002, 2003, 2004 +# Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. + +# serial 3 + +AC_DEFUN([AM_MAINTAINER_MODE], +[AC_MSG_CHECKING([whether to enable maintainer-specific portions of Makefiles]) + dnl maintainer-mode is disabled by default + AC_ARG_ENABLE(maintainer-mode, +[ --enable-maintainer-mode enable make rules and dependencies not useful + (and sometimes confusing) to the casual installer], + USE_MAINTAINER_MODE=$enableval, + USE_MAINTAINER_MODE=no) + AC_MSG_RESULT([$USE_MAINTAINER_MODE]) + AM_CONDITIONAL(MAINTAINER_MODE, [test $USE_MAINTAINER_MODE = yes]) + MAINT=$MAINTAINER_MODE_TRUE + AC_SUBST(MAINT)dnl +] +) + +AU_DEFUN([jm_MAINTAINER_MODE], [AM_MAINTAINER_MODE]) + # Check to see how 'make' treats includes. -*- Autoconf -*- # Copyright (C) 2001, 2002, 2003 Free Software Foundation, Inc. @@ -889,9 +737,10 @@ AC_MSG_RESULT([$_am_result]) rm -f confinc confmf ]) -# AM_CONDITIONAL -*- Autoconf -*- +# -*- Autoconf -*- + -# Copyright 1997, 2000, 2001 Free Software Foundation, Inc. +# Copyright (C) 1997, 1999, 2000, 2001, 2003 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -908,34 +757,37 @@ rm -f confinc confmf # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA # 02111-1307, USA. -# serial 5 +# serial 3 -AC_PREREQ(2.52) +# AM_MISSING_PROG(NAME, PROGRAM) +# ------------------------------ +AC_DEFUN([AM_MISSING_PROG], +[AC_REQUIRE([AM_MISSING_HAS_RUN]) +$1=${$1-"${am_missing_run}$2"} +AC_SUBST($1)]) -# AM_CONDITIONAL(NAME, SHELL-CONDITION) -# ------------------------------------- -# Define a conditional. -AC_DEFUN([AM_CONDITIONAL], -[ifelse([$1], [TRUE], [AC_FATAL([$0: invalid condition: $1])], - [$1], [FALSE], [AC_FATAL([$0: invalid condition: $1])])dnl -AC_SUBST([$1_TRUE]) -AC_SUBST([$1_FALSE]) -if $2; then - $1_TRUE= - $1_FALSE='#' + +# AM_MISSING_HAS_RUN +# ------------------ +# Define MISSING if not defined so far and test if it supports --run. +# If it does, set am_missing_run to use it, otherwise, to nothing. +AC_DEFUN([AM_MISSING_HAS_RUN], +[AC_REQUIRE([AM_AUX_DIR_EXPAND])dnl +test x"${MISSING+set}" = xset || MISSING="\${SHELL} $am_aux_dir/missing" +# Use eval to expand $SHELL +if eval "$MISSING --run true"; then + am_missing_run="$MISSING --run " else - $1_TRUE='#' - $1_FALSE= + am_missing_run= + AC_MSG_WARN([`missing' script is too old or missing]) fi -AC_CONFIG_COMMANDS_PRE( -[if test -z "${$1_TRUE}" && test -z "${$1_FALSE}"; then - AC_MSG_ERROR([conditional "$1" was never defined. -Usually this means the macro was only invoked conditionally.]) -fi])]) +]) -# Like AC_CONFIG_HEADER, but automatically create stamp file. -*- Autoconf -*- +# AM_PROG_MKDIR_P +# --------------- +# Check whether `mkdir -p' is supported, fallback to mkinstalldirs otherwise. -# Copyright 1996, 1997, 2000, 2001 Free Software Foundation, Inc. +# Copyright (C) 2003, 2004 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -952,15 +804,92 @@ fi])]) # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA # 02111-1307, USA. -AC_PREREQ([2.52]) +# Automake 1.8 used `mkdir -m 0755 -p --' to ensure that directories +# created by `make install' are always world readable, even if the +# installer happens to have an overly restrictive umask (e.g. 077). +# This was a mistake. There are at least two reasons why we must not +# use `-m 0755': +# - it causes special bits like SGID to be ignored, +# - it may be too restrictive (some setups expect 775 directories). +# +# Do not use -m 0755 and let people choose whatever they expect by +# setting umask. +AC_DEFUN([AM_PROG_MKDIR_P], +[if mkdir -p -- . 2>/dev/null; then + # Keeping the `.' argument allows $(mkdir_p) to be used without + # argument. Indeed, we sometimes output rules like + # $(mkdir_p) $(somedir) + # where $(somedir) is conditionally defined. + # (`test -n '$(somedir)' && $(mkdir_p) $(somedir)' is a more + # expensive solution, as it forces Make to start a sub-shell.) + mkdir_p='mkdir -p -- .' +else + # On NextStep and OpenStep, the `mkdir' command does not + # recognize any option. It will interpret all options as + # directories to create, and then abort because `.' already + # exists. + for d in ./-p ./--; + do + test -d $d && rmdir $d + done + # $(mkinstalldirs) is defined by Automake if mkinstalldirs exists. + if test -f "$ac_aux_dir/mkinstalldirs"; then + mkdir_p='$(mkinstalldirs)' + else + mkdir_p='$(install_sh) -d' + fi +fi +AC_SUBST([mkdir_p])]) -# serial 6 +# Helper functions for option handling. -*- Autoconf -*- -# AM_CONFIG_HEADER is obsolete. It has been replaced by AC_CONFIG_HEADERS. -AU_DEFUN([AM_CONFIG_HEADER], [AC_CONFIG_HEADERS($@)]) +# Copyright (C) 2001, 2002, 2003 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2, or (at your option) +# any later version. + +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. + +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA +# 02111-1307, USA. + +# serial 2 + +# _AM_MANGLE_OPTION(NAME) +# ----------------------- +AC_DEFUN([_AM_MANGLE_OPTION], +[[_AM_OPTION_]m4_bpatsubst($1, [[^a-zA-Z0-9_]], [_])]) + +# _AM_SET_OPTION(NAME) +# ------------------------------ +# Set option NAME. Presently that only means defining a flag for this option. +AC_DEFUN([_AM_SET_OPTION], +[m4_define(_AM_MANGLE_OPTION([$1]), 1)]) + +# _AM_SET_OPTIONS(OPTIONS) +# ---------------------------------- +# OPTIONS is a space-separated list of Automake options. +AC_DEFUN([_AM_SET_OPTIONS], +[AC_FOREACH([_AM_Option], [$1], [_AM_SET_OPTION(_AM_Option)])]) + +# _AM_IF_OPTION(OPTION, IF-SET, [IF-NOT-SET]) +# ------------------------------------------- +# Execute IF-SET if OPTION is set, IF-NOT-SET otherwise. +AC_DEFUN([_AM_IF_OPTION], +[m4_ifset(_AM_MANGLE_OPTION([$1]), [$2], [$3])]) +# +# Check to make sure that the build environment is sane. +# -# Copyright 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc. +# Copyright (C) 1996, 1997, 2000, 2001, 2003 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -979,23 +908,50 @@ AU_DEFUN([AM_CONFIG_HEADER], [AC_CONFIG_HEADERS($@)]) # serial 3 -AC_PREREQ(2.50) +# AM_SANITY_CHECK +# --------------- +AC_DEFUN([AM_SANITY_CHECK], +[AC_MSG_CHECKING([whether build environment is sane]) +# Just in case +sleep 1 +echo timestamp > conftest.file +# Do `set' in a subshell so we don't clobber the current shell's +# arguments. Must try -L first in case configure is actually a +# symlink; some systems play weird games with the mod time of symlinks +# (eg FreeBSD returns the mod time of the symlink's containing +# directory). +if ( + set X `ls -Lt $srcdir/configure conftest.file 2> /dev/null` + if test "$[*]" = "X"; then + # -L didn't work. + set X `ls -t $srcdir/configure conftest.file` + fi + rm -f conftest.file + if test "$[*]" != "X $srcdir/configure conftest.file" \ + && test "$[*]" != "X conftest.file $srcdir/configure"; then -# AM_PROG_LEX -# ----------- -# Autoconf leaves LEX=: if lex or flex can't be found. Change that to a -# "missing" invocation, for better error output. -AC_DEFUN([AM_PROG_LEX], -[AC_REQUIRE([AM_MISSING_HAS_RUN])dnl -AC_REQUIRE([AC_PROG_LEX])dnl -if test "$LEX" = :; then - LEX=${am_missing_run}flex -fi]) + # If neither matched, then we have a broken ls. This can happen + # if, for instance, CONFIG_SHELL is bash and it inherits a + # broken ls alias from the environment. This has actually + # happened. Such a system could not be considered "sane". + AC_MSG_ERROR([ls -t appears to fail. Make sure there is not a broken +alias in your environment]) + fi -# Add --enable-maintainer-mode option to configure. -# From Jim Meyering + test "$[2]" = conftest.file + ) +then + # Ok. + : +else + AC_MSG_ERROR([newly created file is older than distributed files! +Check your system clock]) +fi +AC_MSG_RESULT(yes)]) + +# AM_PROG_INSTALL_STRIP -# Copyright 1996, 1998, 2000, 2001, 2002 Free Software Foundation, Inc. +# Copyright (C) 2001, 2003 Free Software Foundation, Inc. # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -1012,22 +968,24 @@ fi]) # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA # 02111-1307, USA. -# serial 2 - -AC_DEFUN([AM_MAINTAINER_MODE], -[AC_MSG_CHECKING([whether to enable maintainer-specific portions of Makefiles]) - dnl maintainer-mode is disabled by default - AC_ARG_ENABLE(maintainer-mode, -[ --enable-maintainer-mode enable make rules and dependencies not useful - (and sometimes confusing) to the casual installer], - USE_MAINTAINER_MODE=$enableval, - USE_MAINTAINER_MODE=no) - AC_MSG_RESULT([$USE_MAINTAINER_MODE]) - AM_CONDITIONAL(MAINTAINER_MODE, [test $USE_MAINTAINER_MODE = yes]) - MAINT=$MAINTAINER_MODE_TRUE - AC_SUBST(MAINT)dnl -] -) - -AU_DEFUN([jm_MAINTAINER_MODE], [AM_MAINTAINER_MODE]) +# One issue with vendor `install' (even GNU) is that you can't +# specify the program used to strip binaries. This is especially +# annoying in cross-compiling environments, where the build's strip +# is unlikely to handle the host's binaries. +# Fortunately install-sh will honor a STRIPPROG variable, so we +# always use install-sh in `make install-strip', and initialize +# STRIPPROG with the value of the STRIP variable (set by the user). +AC_DEFUN([AM_PROG_INSTALL_STRIP], +[AC_REQUIRE([AM_PROG_INSTALL_SH])dnl +# Installed binaries are usually stripped using `strip' when the user +# run `make install-strip'. However `strip' might not be the right +# tool to use in cross-compilation environments, therefore Automake +# will honor the `STRIP' environment variable to overrule this program. +dnl Don't test for $cross_compiling = yes, because it might be `maybe'. +if test "$cross_compiling" != no; then + AC_CHECK_TOOL([STRIP], [strip], :) +fi +INSTALL_STRIP_PROGRAM="\${SHELL} \$(install_sh) -c -s" +AC_SUBST([INSTALL_STRIP_PROGRAM])]) +m4_include([acinclude.m4]) diff --git a/gas/config.in b/gas/config.in index fe2bc3fbcfb..577636122a0 100644 --- a/gas/config.in +++ b/gas/config.in @@ -1,188 +1,196 @@ -/* config.in. Generated automatically from configure.in by autoheader. */ +/* config.in. Generated from configure.in by autoheader. */ -/* Define if using alloca.c. */ -#undef C_ALLOCA +/* Define if using AIX 5.2 value for C_WEAKEXT. */ +#undef AIX_WEAK_SUPPORT -/* Define to empty if the keyword does not work. */ -#undef const +/* Use BFD interface? */ +#undef BFD_ASSEMBLER + +/* assert broken? */ +#undef BROKEN_ASSERT -/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems. - This function is required for alloca.c support on those systems. */ +/* Define to one of `_getb67', `GETB67', `getb67' for Cray-2 and Cray-YMP + systems. This function is required for `alloca.c' support on those systems. + */ #undef CRAY_STACKSEG_END -/* Define if you have alloca, as a function or macro. */ +/* Compiling cross-assembler? */ +#undef CROSS_COMPILE + +/* Define to 1 if using `alloca.c'. */ +#undef C_ALLOCA + +/* Default architecture. */ +#undef DEFAULT_ARCH + +/* Default emulation. */ +#undef DEFAULT_EMULATION + +/* Supported emulations. */ +#undef EMULATIONS + +/* Define to 1 if NLS is requested */ +#undef ENABLE_NLS + +/* Define to 1 if you have `alloca', as a function or macro. */ #undef HAVE_ALLOCA -/* Define if you have <alloca.h> and it should be used (not on Ultrix). */ +/* Define to 1 if you have <alloca.h> and it should be used (not on Ultrix). + */ #undef HAVE_ALLOCA_H -/* Define if you have a working `mmap' system call. */ -#undef HAVE_MMAP +/* Define to 1 if you have the <argz.h> header file. */ +#undef HAVE_ARGZ_H -/* Define as __inline if that's what the C compiler calls it. */ -#undef inline +/* Define to 1 if you have the `dcgettext' function. */ +#undef HAVE_DCGETTEXT -/* Define to `long' if <sys/types.h> doesn't define. */ -#undef off_t +/* Define to 1 if you have the <errno.h> header file. */ +#undef HAVE_ERRNO_H -/* Define to `unsigned' if <sys/types.h> doesn't define. */ -#undef size_t +/* Define to 1 if you have the `getcwd' function. */ +#undef HAVE_GETCWD -/* If using the C implementation of alloca, define if you know the - direction of stack growth for your system; otherwise it will be - automatically deduced at run-time. - STACK_DIRECTION > 0 => grows toward higher addresses - STACK_DIRECTION < 0 => grows toward lower addresses - STACK_DIRECTION = 0 => direction of growth unknown - */ -#undef STACK_DIRECTION +/* Define to 1 if you have the `getpagesize' function. */ +#undef HAVE_GETPAGESIZE -/* Define if you have the ANSI C header files. */ -#undef STDC_HEADERS +/* Define as 1 if you have gettext and don't want to use GNU gettext. */ +#undef HAVE_GETTEXT -/* Define if lex declares yytext as a char * by default, not a char[]. */ -#undef YYTEXT_POINTER +/* Define to 1 if you have the <inttypes.h> header file. */ +#undef HAVE_INTTYPES_H -/* Define if you have the __argz_count function. */ -#undef HAVE___ARGZ_COUNT +/* Define if your locale.h file contains LC_MESSAGES. */ +#undef HAVE_LC_MESSAGES -/* Define if you have the __argz_next function. */ -#undef HAVE___ARGZ_NEXT +/* Define to 1 if you have the <limits.h> header file. */ +#undef HAVE_LIMITS_H -/* Define if you have the __argz_stringify function. */ -#undef HAVE___ARGZ_STRINGIFY +/* Define to 1 if you have the <locale.h> header file. */ +#undef HAVE_LOCALE_H -/* Define if you have the dcgettext function. */ -#undef HAVE_DCGETTEXT +/* Define to 1 if you have the <malloc.h> header file. */ +#undef HAVE_MALLOC_H -/* Define if you have the getcwd function. */ -#undef HAVE_GETCWD +/* Define to 1 if you have the <memory.h> header file. */ +#undef HAVE_MEMORY_H -/* Define if you have the getpagesize function. */ -#undef HAVE_GETPAGESIZE +/* Define to 1 if you have a working `mmap' system call. */ +#undef HAVE_MMAP -/* Define if you have the munmap function. */ +/* Define to 1 if you have the `munmap' function. */ #undef HAVE_MUNMAP -/* Define if you have the putenv function. */ +/* Define to 1 if you have the <nl_types.h> header file. */ +#undef HAVE_NL_TYPES_H + +/* Define to 1 if you have the `putenv' function. */ #undef HAVE_PUTENV -/* Define if you have the remove function. */ +/* Define to 1 if you have the `remove' function. */ #undef HAVE_REMOVE -/* Define if you have the sbrk function. */ +/* Define to 1 if you have the `sbrk' function. */ #undef HAVE_SBRK -/* Define if you have the setenv function. */ +/* Define to 1 if you have the `setenv' function. */ #undef HAVE_SETENV -/* Define if you have the setlocale function. */ +/* Define to 1 if you have the `setlocale' function. */ #undef HAVE_SETLOCALE -/* Define if you have the stpcpy function. */ -#undef HAVE_STPCPY - -/* Define if you have the strcasecmp function. */ -#undef HAVE_STRCASECMP - -/* Define if you have the strchr function. */ -#undef HAVE_STRCHR - -/* Define if you have the unlink function. */ -#undef HAVE_UNLINK - -/* Define if you have the <argz.h> header file. */ -#undef HAVE_ARGZ_H - -/* Define if you have the <errno.h> header file. */ -#undef HAVE_ERRNO_H +/* Define to 1 if you have the <stdarg.h> header file. */ +#undef HAVE_STDARG_H -/* Define if you have the <limits.h> header file. */ -#undef HAVE_LIMITS_H +/* Define to 1 if you have the <stdint.h> header file. */ +#undef HAVE_STDINT_H -/* Define if you have the <locale.h> header file. */ -#undef HAVE_LOCALE_H - -/* Define if you have the <malloc.h> header file. */ -#undef HAVE_MALLOC_H +/* Define to 1 if you have the <stdlib.h> header file. */ +#undef HAVE_STDLIB_H -/* Define if you have the <memory.h> header file. */ -#undef HAVE_MEMORY_H +/* Define if you have the stpcpy function */ +#undef HAVE_STPCPY -/* Define if you have the <nl_types.h> header file. */ -#undef HAVE_NL_TYPES_H +/* Define to 1 if you have the `strcasecmp' function. */ +#undef HAVE_STRCASECMP -/* Define if you have the <stdarg.h> header file. */ -#undef HAVE_STDARG_H +/* Define to 1 if you have the `strchr' function. */ +#undef HAVE_STRCHR -/* Define if you have the <stdlib.h> header file. */ -#undef HAVE_STDLIB_H +/* Define to 1 if you have the <strings.h> header file. */ +#undef HAVE_STRINGS_H -/* Define if you have the <string.h> header file. */ +/* Define to 1 if you have the <string.h> header file. */ #undef HAVE_STRING_H -/* Define if you have the <strings.h> header file. */ -#undef HAVE_STRINGS_H - -/* Define if you have the <sys/param.h> header file. */ +/* Define to 1 if you have the <sys/param.h> header file. */ #undef HAVE_SYS_PARAM_H -/* Define if you have the <sys/types.h> header file. */ +/* Define to 1 if you have the <sys/stat.h> header file. */ +#undef HAVE_SYS_STAT_H + +/* Define to 1 if you have the <sys/types.h> header file. */ #undef HAVE_SYS_TYPES_H -/* Define if you have the <unistd.h> header file. */ +/* Define to 1 if you have the <unistd.h> header file. */ #undef HAVE_UNISTD_H -/* Define if you have the <values.h> header file. */ +/* Define to 1 if you have the `unlink' function. */ +#undef HAVE_UNLINK + +/* Define to 1 if you have the <values.h> header file. */ #undef HAVE_VALUES_H -/* Define if you have the <varargs.h> header file. */ +/* Define to 1 if you have the <varargs.h> header file. */ #undef HAVE_VARARGS_H -/* Name of package */ -#undef PACKAGE +/* Define to 1 if you have the `__argz_count' function. */ +#undef HAVE___ARGZ_COUNT -/* Version number of package */ -#undef VERSION +/* Define to 1 if you have the `__argz_next' function. */ +#undef HAVE___ARGZ_NEXT -/* Define if defaulting to ELF on SCO 5. */ -#undef SCO_ELF +/* Define to 1 if you have the `__argz_stringify' function. */ +#undef HAVE___ARGZ_STRINGIFY -/* Using strict COFF? */ -#undef STRICTCOFF +/* Using i386 COFF? */ +#undef I386COFF -/* Define if default target is PowerPC Solaris. */ -#undef TARGET_SOLARIS_COMMENT +/* Using m68k COFF? */ +#undef M68KCOFF -/* Define as 1 if big endian. */ -#undef TARGET_BYTES_BIG_ENDIAN +/* Using m88k COFF? */ +#undef M88KCOFF -/* Default CPU for MIPS targets. */ -#undef MIPS_CPU_STRING_DEFAULT +/* old COFF support? */ +#undef MANY_SEGMENTS -/* Allow use of E_MIPS_ABI_O32 on MIPS targets. */ -#undef USE_E_MIPS_ABI_O32 +/* Default CPU for MIPS targets. */ +#undef MIPS_CPU_STRING_DEFAULT -/* Generate 64-bit code by default on MIPS targets. */ +/* Generate 64-bit code by default on MIPS targets. */ #undef MIPS_DEFAULT_64BIT -/* Choose a default ABI for MIPS targets. */ +/* Choose a default ABI for MIPS targets. */ #undef MIPS_DEFAULT_ABI -/* Default architecture. */ -#undef DEFAULT_ARCH +/* Define if environ is not declared in system header files. */ +#undef NEED_DECLARATION_ENVIRON -/* Using cgen code? */ -#undef USING_CGEN +/* Define if errno is not declared in system header files. */ +#undef NEED_DECLARATION_ERRNO -/* Using i386 COFF? */ -#undef I386COFF +/* Define if free is not declared in system header files. */ +#undef NEED_DECLARATION_FREE -/* Using m68k COFF? */ -#undef M68KCOFF +/* Define if malloc is not declared in system header files. */ +#undef NEED_DECLARATION_MALLOC -/* Using m88k COFF? */ -#undef M88KCOFF +/* Define if sbrk is not declared in system header files. */ +#undef NEED_DECLARATION_SBRK + +/* Define if strstr is not declared in system header files. */ +#undef NEED_DECLARATION_STRSTR /* a.out support? */ #undef OBJ_MAYBE_AOUT @@ -214,69 +222,89 @@ /* VMS support? */ #undef OBJ_MAYBE_VMS -/* Use emulation support? */ -#undef USE_EMULATIONS +/* Name of package */ +#undef PACKAGE -/* Supported emulations. */ -#undef EMULATIONS +/* Define to the address where bug reports for this package should be sent. */ +#undef PACKAGE_BUGREPORT -/* Default emulation. */ -#undef DEFAULT_EMULATION +/* Define to the full name of this package. */ +#undef PACKAGE_NAME -/* old COFF support? */ -#undef MANY_SEGMENTS +/* Define to the full name and version of this package. */ +#undef PACKAGE_STRING -/* Use BFD interface? */ -#undef BFD_ASSEMBLER +/* Define to the one symbol short name of this package. */ +#undef PACKAGE_TARNAME + +/* Define to the version of this package. */ +#undef PACKAGE_VERSION + +/* Define if defaulting to ELF on SCO 5. */ +#undef SCO_ELF + +/* If using the C implementation of alloca, define if you know the + direction of stack growth for your system; otherwise it will be + automatically deduced at run-time. + STACK_DIRECTION > 0 => grows toward higher addresses + STACK_DIRECTION < 0 => grows toward lower addresses + STACK_DIRECTION = 0 => direction of growth unknown */ +#undef STACK_DIRECTION + +/* Define to 1 if you have the ANSI C header files. */ +#undef STDC_HEADERS + +/* Using strict COFF? */ +#undef STRICTCOFF /* Target alias. */ #undef TARGET_ALIAS +/* Define as 1 if big endian. */ +#undef TARGET_BYTES_BIG_ENDIAN + /* Canonical target. */ #undef TARGET_CANONICAL /* Target CPU. */ #undef TARGET_CPU -/* Target vendor. */ -#undef TARGET_VENDOR - /* Target OS. */ #undef TARGET_OS -/* Define if you have the stpcpy function */ -#undef HAVE_STPCPY - -/* Define if your locale.h file contains LC_MESSAGES. */ -#undef HAVE_LC_MESSAGES - -/* Define to 1 if NLS is requested */ -#undef ENABLE_NLS +/* Define if default target is PowerPC Solaris. */ +#undef TARGET_SOLARIS_COMMENT -/* Define as 1 if you have gettext and don't want to use GNU gettext. */ -#undef HAVE_GETTEXT +/* Target vendor. */ +#undef TARGET_VENDOR -/* Compiling cross-assembler? */ -#undef CROSS_COMPILE +/* Use emulation support? */ +#undef USE_EMULATIONS -/* assert broken? */ -#undef BROKEN_ASSERT +/* Allow use of E_MIPS_ABI_O32 on MIPS targets. */ +#undef USE_E_MIPS_ABI_O32 -/* Define if strstr is not declared in system header files. */ -#undef NEED_DECLARATION_STRSTR +/* Using cgen code? */ +#undef USING_CGEN -/* Define if malloc is not declared in system header files. */ -#undef NEED_DECLARATION_MALLOC +/* Version number of package */ +#undef VERSION -/* Define if free is not declared in system header files. */ -#undef NEED_DECLARATION_FREE +/* Define to 1 if `lex' declares `yytext' as a `char *' by default, not a + `char[]'. */ +#undef YYTEXT_POINTER -/* Define if sbrk is not declared in system header files. */ -#undef NEED_DECLARATION_SBRK +/* Define to empty if `const' does not conform to ANSI C. */ +#undef const -/* Define if environ is not declared in system header files. */ -#undef NEED_DECLARATION_ENVIRON +/* Define to `__inline__' or `__inline' if that's what the C compiler + calls it, or to nothing if 'inline' is not supported under any name. */ +#ifndef __cplusplus +#undef inline +#endif -/* Define if errno is not declared in system header files. */ -#undef NEED_DECLARATION_ERRNO +/* Define to `long' if <sys/types.h> does not define. */ +#undef off_t +/* Define to `unsigned' if <sys/types.h> does not define. */ +#undef size_t diff --git a/gas/config/m68k-parse.h b/gas/config/m68k-parse.h index c82e69fc65a..3b98b8a065c 100644 --- a/gas/config/m68k-parse.h +++ b/gas/config/m68k-parse.h @@ -1,6 +1,6 @@ /* m68k-parse.h -- header file for m68k assembler Copyright 1987, 1991, 1992, 1993, 1994, 1995, 1996, 1999, 2000, - 2003 Free Software Foundation, Inc. + 2003, 2004 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -84,7 +84,12 @@ enum m68k_register ZPC, /* Hack for Program space, but 0 addressing */ SR, /* Status Reg */ CCR, /* Condition code Reg */ - ACC, /* Accumulator Reg */ + ACC, /* Accumulator Reg0 (EMAC or ACC on MAC). */ + ACC1, /* Accumulator Reg 1 (EMAC). */ + ACC2, /* Accumulator Reg 2 (EMAC). */ + ACC3, /* Accumulator Reg 3 (EMAC). */ + ACCEXT01, /* Accumulator extension 0&1 (EMAC). */ + ACCEXT23, /* Accumulator extension 2&3 (EMAC). */ MACSR, /* MAC Status Reg */ MASK, /* Modulus Reg */ @@ -295,6 +300,8 @@ enum m68k_operand_type BASE, POST, PRE, + LSH, /* MAC/EMAC scalefactor '<<'. */ + RSH, /* MAC/EMAC scalefactor '>>'. */ REGLST }; @@ -322,6 +329,9 @@ struct m68k_op /* The outer displacement. */ struct m68k_exp odisp; + + /* Is a trailing '&' added to an <ea>? (for MAC/EMAC mask addressing). */ + int trailing_ampersand; }; #endif /* ! defined (M68K_PARSE_H) */ diff --git a/gas/config/m68k-parse.y b/gas/config/m68k-parse.y index 813bfaad2c1..c56ad23d647 100644 --- a/gas/config/m68k-parse.y +++ b/gas/config/m68k-parse.y @@ -98,6 +98,7 @@ static struct m68k_op *op; struct m68k_exp exp; unsigned long mask; int onereg; + int trailing_ampersand; } %token <reg> DR AR FPR FPCR LPC ZAR ZDR LZPC CREG @@ -109,6 +110,7 @@ static struct m68k_op *op; %type <exp> optcexpr optexprc %type <mask> reglist ireglist reglistpair %type <onereg> reglistreg +%type <trailing_ampersand> optional_ampersand %% @@ -116,14 +118,35 @@ static struct m68k_op *op; operand: generic_operand - | motorola_operand + | motorola_operand optional_ampersand + { + op->trailing_ampersand = $2; + } | mit_operand ; +/* A trailing ampersand(for MAC/EMAC mask addressing). */ +optional_ampersand: + /* empty */ + { $$ = 0; } + | '&' + { $$ = 1; } + ; + /* A generic operand. */ generic_operand: - DR + '<' '<' + { + op->mode = LSH; + } + + | '>' '>' + { + op->mode = RSH; + } + + | DR { op->mode = DREG; op->reg = $1; @@ -757,12 +780,14 @@ yylex () case '/': case '[': case ']': + case '<': + case '>': return *str++; case '+': /* It so happens that a '+' can only appear at the end of an - operand. If it appears anywhere else, it must be a unary - plus on an expression. */ - if (str[1] == '\0') + operand, or if it is trailed by an '&'(see mac load insn). + If it appears anywhere else, it must be a unary. */ + if (str[1] == '\0' || (str[1] == '&' && str[2] == '\0')) return *str++; break; case '-': diff --git a/gas/config/obj-aout.c b/gas/config/obj-aout.c index 6e5fd29191a..74e52a5f12d 100644 --- a/gas/config/obj-aout.c +++ b/gas/config/obj-aout.c @@ -1,6 +1,6 @@ /* a.out object file format Copyright 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1999, 2000, - 2001, 2002 Free Software Foundation, Inc. + 2001, 2002, 2003, 2004 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -419,17 +419,9 @@ obj_aout_type (ignore) { ++input_line_pointer; if (strncmp (input_line_pointer, "object", 6) == 0) -#ifdef BFD_ASSEMBLER - aout_symbol (symbol_get_bfdsym (sym))->other = 1; -#else - S_SET_OTHER (sym, 1); -#endif + S_SET_OTHER (sym, 1); else if (strncmp (input_line_pointer, "function", 8) == 0) -#ifdef BFD_ASSEMBLER - aout_symbol (symbol_get_bfdsym (sym))->other = 2; -#else - S_SET_OTHER (sym, 2); -#endif + S_SET_OTHER (sym, 2); } } diff --git a/gas/config/obj-elf.c b/gas/config/obj-elf.c index 01ba0962442..f970110f957 100644 --- a/gas/config/obj-elf.c +++ b/gas/config/obj-elf.c @@ -469,6 +469,18 @@ struct section_stack static struct section_stack *section_stack; +static bfd_boolean +get_section (bfd *abfd ATTRIBUTE_UNUSED, asection *sec, void *inf) +{ + const char *gname = inf; + const char *group_name = elf_group_name (sec); + + return (group_name == gname + || (group_name != NULL + && gname != NULL + && strcmp (group_name, gname) == 0)); +} + /* Handle the .section pseudo-op. This code supports two different syntaxes. @@ -520,8 +532,16 @@ obj_elf_change_section (const char *name, previous_section = now_seg; previous_subsection = now_subseg; - old_sec = bfd_get_section_by_name (stdoutput, name); - sec = subseg_new (name, 0); + old_sec = bfd_get_section_by_name_if (stdoutput, name, get_section, + (void *) group_name); + if (old_sec) + { + sec = old_sec; + subseg_set (sec, 0); + } + else + sec = subseg_force_new (name, 0); + ssect = _bfd_elf_get_sec_type_attr (stdoutput, name); if (ssect != NULL) @@ -580,10 +600,15 @@ obj_elf_change_section (const char *name, || strcmp (name, ".strtab") == 0 || strcmp (name, ".symtab") == 0)) override = TRUE; + /* .note.GNU-stack can have SHF_EXECINSTR. */ + else if (attr == SHF_EXECINSTR + && strcmp (name, ".note.GNU-stack") == 0) + override = TRUE; else { - as_warn (_("setting incorrect section attributes for %s"), - name); + if (group_name == NULL) + as_warn (_("setting incorrect section attributes for %s"), + name); override = TRUE; } } @@ -609,6 +634,9 @@ obj_elf_change_section (const char *name, flags = md_elf_section_flags (flags, attr, type); #endif + if (linkonce) + flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_DISCARD; + if (old_sec == NULL) { symbolS *secsym; @@ -617,8 +645,6 @@ obj_elf_change_section (const char *name, if (type == SHT_NOBITS) seg_info (sec)->bss = 1; - if (linkonce) - flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_DISCARD; bfd_set_section_flags (stdoutput, sec, flags); if (flags & SEC_MERGE) sec->entsize = entsize; @@ -644,9 +670,6 @@ obj_elf_change_section (const char *name, as_warn (_("ignoring changed section attributes for %s"), name); if ((flags & SEC_MERGE) && old_sec->entsize != (unsigned) entsize) as_warn (_("ignoring changed section entity size for %s"), name); - if ((attr & SHF_GROUP) != 0 - && strcmp (elf_group_name (old_sec), group_name) != 0) - as_warn (_("ignoring new section group for %s"), name); } #ifdef md_elf_section_change_hook @@ -787,7 +810,7 @@ obj_elf_section_name (void) end++; if (end == input_line_pointer) { - as_warn (_("missing name")); + as_bad (_("missing name")); ignore_rest_of_line (); return NULL; } @@ -938,7 +961,7 @@ obj_elf_section (int push) SKIP_WHITESPACE (); if (*input_line_pointer != '#') { - as_warn (_("character following name is not '#'")); + as_bad (_("character following name is not '#'")); ignore_rest_of_line (); return; } diff --git a/gas/config/obj-som.c b/gas/config/obj-som.c index 454042a4f41..a736c9658ea 100644 --- a/gas/config/obj-som.c +++ b/gas/config/obj-som.c @@ -248,7 +248,7 @@ obj_som_init_stab_section (seg) (just created above). Also set some attributes which BFD does not understand. In particular, access bits, sort keys, and load quadrant. */ - obj_set_subsection_attributes (seg, space, 0x1f, 73, 0); + obj_set_subsection_attributes (seg, space, 0x1f, 73, 0, 0, 0, 0); bfd_set_section_alignment (stdoutput, seg, 2); /* Make some space for the first special stab entry and zero the memory. @@ -271,7 +271,7 @@ obj_som_init_stab_section (seg) not understand. In particular, access bits, sort keys, and load quadrant. */ seg = bfd_get_section_by_name (stdoutput, "$GDB_STRINGS$"); - obj_set_subsection_attributes (seg, space, 0x1f, 72, 0); + obj_set_subsection_attributes (seg, space, 0x1f, 72, 0, 0, 0, 0); bfd_set_section_alignment (stdoutput, seg, 2); subseg_set (saved_seg, saved_subseg); diff --git a/gas/config/tc-arc.c b/gas/config/tc-arc.c index b99fc0b8f72..60cfa34652a 100644 --- a/gas/config/tc-arc.c +++ b/gas/config/tc-arc.c @@ -905,11 +905,6 @@ arc_extoper (opertype) name = input_line_pointer; c = get_symbol_end (); name = xstrdup (name); - if (NULL == name) - { - ignore_rest_of_line (); - return; - } p = name; while (*p) @@ -1153,11 +1148,6 @@ arc_extinst (ignore) name = input_line_pointer; c = get_symbol_end (); name = xstrdup (name); - if (NULL == name) - { - ignore_rest_of_line (); - return; - } strcpy (syntax, name); name_len = strlen (name); @@ -1305,18 +1295,7 @@ arc_extinst (ignore) strcat (syntax, "%S%L"); ext_op = (struct arc_opcode *) xmalloc (sizeof (struct arc_opcode)); - if (NULL == ext_op) - { - ignore_rest_of_line (); - return; - } - ext_op->syntax = xstrdup (syntax); - if (NULL == ext_op->syntax) - { - ignore_rest_of_line (); - return; - } ext_op->mask = I (-1) | ((0x3 == opcode) ? C (-1) : 0); ext_op->value = I (opcode) | ((0x3 == opcode) ? C (subopcode) : 0); diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 69b2c21998a..3f21c84a6ce 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -1,5 +1,5 @@ /* tc-arm.c -- Assemble for the ARM - Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 + Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org) Modified by David Taylor (dtaylor@armltd.co.uk) @@ -191,6 +191,9 @@ static int march_cpu_opt = -1; static int march_fpu_opt = -1; static int mfpu_opt = -1; static int mfloat_abi_opt = -1; +#ifdef OBJ_ELF +static int meabi_flags = EF_ARM_EABI_UNKNOWN; +#endif /* This array holds the chars that always start a comment. If the pre-processor is disabled, these aren't very useful. */ @@ -2551,6 +2554,9 @@ static int arm_parse_cpu PARAMS ((char *)); static int arm_parse_arch PARAMS ((char *)); static int arm_parse_fpu PARAMS ((char *)); static int arm_parse_float_abi PARAMS ((char *)); +#ifdef OBJ_ELF +static int arm_parse_eabi PARAMS ((char *)); +#endif #if 0 /* Suppressed - for now. */ #if defined OBJ_COFF || defined OBJ_ELF static void arm_add_note PARAMS ((const char *, const char *, unsigned int)); @@ -2823,13 +2829,6 @@ validate_offset_imm (val, hwse) #ifdef OBJ_ELF -enum mstate -{ - MAP_DATA, - MAP_ARM, - MAP_THUMB -}; - /* This code is to handle mapping symbols as defined in the ARM ELF spec. (This text is taken from version B-02 of the spec): @@ -2904,10 +2903,11 @@ enum mstate the EABI (which is still under development), so they are not implemented here. */ +static enum mstate mapstate = MAP_UNDEFINED; + static void mapping_state (enum mstate state) { - static enum mstate mapstate = MAP_DATA; symbolS * symbolP; const char * symname; int type; @@ -2933,10 +2933,14 @@ mapping_state (enum mstate state) symname = "$t"; type = BSF_FUNCTION; break; + case MAP_UNDEFINED: + return; default: abort (); } + seg_info (now_seg)->tc_segment_info_data = state; + symbolP = symbol_new (symname, now_seg, (valueT) frag_now_fix (), frag_now); symbol_table_insert (symbolP); symbol_get_bfdsym (symbolP)->flags |= type | BSF_LOCAL; @@ -2977,16 +2981,7 @@ arm_elf_change_section (void) if ((flags & SEC_ALLOC) == 0) return; - if (flags & SEC_CODE) - { - if (thumb_mode) - mapping_state (MAP_THUMB); - else - mapping_state (MAP_ARM); - } - else - /* This section does not contain code. Therefore it must contain data. */ - mapping_state (MAP_DATA); + mapstate = seg_info (now_seg)->tc_segment_info_data; } #else #define mapping_state(a) @@ -3109,6 +3104,8 @@ s_ltorg (ignored) || pool->next_free_entry == 0) return; + mapping_state (MAP_DATA); + /* Align pool as you have word accesses. Only make a frag if we have to. */ if (!need_pass_2) @@ -3598,7 +3595,7 @@ co_proc_number (str) } else { - inst.error = _("bad or missing co-processor number"); + inst.error = all_reg_maps[REG_TYPE_CP].expected; return FAIL; } } @@ -3653,7 +3650,7 @@ cp_reg_required_here (str, where) /* In the few cases where we might be able to accept something else this error can be overridden. */ - inst.error = _("co-processor register expected"); + inst.error = all_reg_maps[REG_TYPE_CN].expected; /* Restore the start point. */ *str = start; @@ -3676,7 +3673,7 @@ fp_reg_required_here (str, where) /* In the few cases where we might be able to accept something else this error can be overridden. */ - inst.error = _("floating point register expected"); + inst.error = all_reg_maps[REG_TYPE_FN].expected; /* Restore the start point. */ *str = start; @@ -10856,11 +10853,16 @@ mav_parse_offset (str, negative) for (offset = 0; *p && ISDIGIT (*p); ++p) offset = offset * 10 + *p - '0'; - if (offset > 0xff) + if (offset > 0x3fc) { inst.error = _("offset out of range"); return 0; } + if (offset & 0x3) + { + inst.error = _("offset not a multiple of 4"); + return 0; + } *str = p; @@ -11437,7 +11439,7 @@ create_register_alias (newname, p) char *copy_of_str; char *r; -#ifdef IGNORE_OPCODE_CASE +#ifndef IGNORE_OPCODE_CASE newname = original_case_string; #endif copy_of_str = newname; @@ -11685,40 +11687,57 @@ md_begin () cpu_variant = mcpu_cpu_opt | mfpu_opt; -#if defined OBJ_COFF || defined OBJ_ELF { unsigned int flags = 0; - /* Set the flags in the private structure. */ - if (uses_apcs_26) flags |= F_APCS26; - if (support_interwork) flags |= F_INTERWORK; - if (uses_apcs_float) flags |= F_APCS_FLOAT; - if (pic_code) flags |= F_PIC; - if ((cpu_variant & FPU_ANY) == FPU_NONE - || (cpu_variant & FPU_ANY) == FPU_ARCH_VFP) /* VFP layout only. */ - { - flags |= F_SOFT_FLOAT; - } - switch (mfloat_abi_opt) +#if defined OBJ_ELF + flags = meabi_flags; + + switch (meabi_flags) { - case ARM_FLOAT_ABI_SOFT: - case ARM_FLOAT_ABI_SOFTFP: - flags |= F_SOFT_FLOAT; + case EF_ARM_EABI_UNKNOWN: +#endif +#if defined OBJ_COFF || defined OBJ_ELF + /* Set the flags in the private structure. */ + if (uses_apcs_26) flags |= F_APCS26; + if (support_interwork) flags |= F_INTERWORK; + if (uses_apcs_float) flags |= F_APCS_FLOAT; + if (pic_code) flags |= F_PIC; + if ((cpu_variant & FPU_ANY) == FPU_NONE + || (cpu_variant & FPU_ANY) == FPU_ARCH_VFP) /* VFP layout only. */ + flags |= F_SOFT_FLOAT; + + switch (mfloat_abi_opt) + { + case ARM_FLOAT_ABI_SOFT: + case ARM_FLOAT_ABI_SOFTFP: + flags |= F_SOFT_FLOAT; + break; + + case ARM_FLOAT_ABI_HARD: + if (flags & F_SOFT_FLOAT) + as_bad (_("hard-float conflicts with specified fpu")); + break; + } + + /* Using VFP conventions (even if soft-float). */ + if (cpu_variant & FPU_VFP_EXT_NONE) + flags |= F_VFP_FLOAT; +#endif +#if defined OBJ_ELF + if (cpu_variant & FPU_ARCH_MAVERICK) + flags |= EF_ARM_MAVERICK_FLOAT; break; - case ARM_FLOAT_ABI_HARD: - if (flags & F_SOFT_FLOAT) - as_bad (_("hard-float conflicts with specified fpu")); + case EF_ARM_EABI_VER3: + /* No additional flags to set. */ break; - } - /* Using VFP conventions (even if soft-float). */ - if (cpu_variant & FPU_VFP_EXT_NONE) flags |= F_VFP_FLOAT; -#if defined OBJ_ELF - if (cpu_variant & FPU_ARCH_MAVERICK) - flags |= EF_ARM_MAVERICK_FLOAT; + default: + abort (); + } #endif - +#if defined OBJ_COFF || defined OBJ_ELF bfd_set_private_flags (stdoutput, flags); /* We have run out flags in the COFF header to encode the @@ -11738,8 +11757,8 @@ md_begin () bfd_set_section_contents (stdoutput, sec, NULL, 0, 0); } } - } #endif + } /* Record the CPU type as well. */ switch (cpu_variant & ARM_CPU_MASK) @@ -13450,6 +13469,22 @@ static struct arm_float_abi_option_table arm_float_abis[] = {NULL, 0} }; +struct arm_eabi_option_table +{ + char *name; + unsigned int value; +}; + +#ifdef OBJ_ELF +/* We only know hot to output GNU and ver 3 (AAELF) formats. */ +static struct arm_eabi_option_table arm_eabis[] = +{ + {"gnu", EF_ARM_EABI_UNKNOWN}, + {"3", EF_ARM_EABI_VER3}, + {NULL, 0} +}; +#endif + struct arm_long_option_table { char *option; /* Substring to match. */ @@ -13613,6 +13648,24 @@ arm_parse_float_abi (str) return 0; } +#ifdef OBJ_ELF +static int +arm_parse_eabi (str) + char * str; +{ + struct arm_eabi_option_table *opt; + + for (opt = arm_eabis; opt->name != NULL; opt++) + if (strcmp (opt->name, str) == 0) + { + meabi_flags = opt->value; + return 1; + } + as_bad (_("unknown EABI `%s'\n"), str); + return 0; +} +#endif + struct arm_long_option_table arm_long_opts[] = { {"mcpu=", N_("<cpu name>\t assemble for CPU <cpu name>"), @@ -13623,6 +13676,10 @@ struct arm_long_option_table arm_long_opts[] = arm_parse_fpu, NULL}, {"mfloat-abi=", N_("<abi>\t assemble for floating point ABI <abi>"), arm_parse_float_abi, NULL}, +#ifdef OBJ_ELF + {"meabi=", N_("<ver>\t assemble for eabi version <ver>"), + arm_parse_eabi, NULL}, +#endif {NULL, NULL, 0, NULL} }; @@ -13817,6 +13874,9 @@ arm_cleanup () { /* Put it at the end of the relevent section. */ subseg_set (pool->section, pool->sub_section); +#ifdef OBJ_ELF + arm_elf_change_section (); +#endif s_ltorg (0); } } diff --git a/gas/config/tc-arm.h b/gas/config/tc-arm.h index 58396cc565f..4e791a083f4 100644 --- a/gas/config/tc-arm.h +++ b/gas/config/tc-arm.h @@ -1,5 +1,5 @@ /* This file is tc-arm.h - Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002 + Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2004 Free Software Foundation, Inc. Contributed by Richard Earnshaw (rwe@pegasus.esprit.ec.org) Modified by David Taylor (dtaylor@armltd.co.uk) @@ -47,67 +47,47 @@ #define LITTLE_ENDIAN 1234 #define BIG_ENDIAN 4321 -#if defined OBJ_AOUT -#if defined TE_RISCIX -# define TARGET_FORMAT "a.out-riscix" -#elif defined TE_LINUX -# define ARM_BI_ENDIAN -# define TARGET_FORMAT "a.out-arm-linux" -#elif defined TE_NetBSD -# define TARGET_FORMAT "a.out-arm-netbsd" -#else -# define ARM_BI_ENDIAN -# define TARGET_FORMAT \ - (target_big_endian ? "a.out-arm-big" : "a.out-arm-little") -#endif -#endif /* OBJ_AOUT */ - -#ifdef OBJ_AIF -#define TARGET_FORMAT "aif" -#endif - struct fix; -#if defined OBJ_COFF || defined OBJ_ELF +#if defined OBJ_AOUT +# if defined TE_RISCIX +# define TARGET_FORMAT "a.out-riscix" +# elif defined TE_LINUX +# define ARM_BI_ENDIAN +# define TARGET_FORMAT "a.out-arm-linux" +# elif defined TE_NetBSD +# define TARGET_FORMAT "a.out-arm-netbsd" +# else +# define ARM_BI_ENDIAN +# define TARGET_FORMAT (target_big_endian ? "a.out-arm-big" : "a.out-arm-little") +# endif +#elif defined OBJ_AIF +# define TARGET_FORMAT "aif" +#elif defined OBJ_COFF # define ARM_BI_ENDIAN - -# define TC_VALIDATE_FIX(FIX, SEGTYPE, LABEL) arm_validate_fix (FIX) - extern void arm_validate_fix PARAMS ((struct fix *)); -#endif - -#ifdef OBJ_COFF # if defined TE_PE -# ifdef TE_EPOC -# define TARGET_FORMAT (target_big_endian ? "epoc-pe-arm-big" : "epoc-pe-arm-little") -# else -# define TARGET_FORMAT (target_big_endian ? "pe-arm-big" : "pe-arm-little") -# endif +# if defined TE_EPOC +# define TARGET_FORMAT (target_big_endian ? "epoc-pe-arm-big" : "epoc-pe-arm-little") +# else +# define TARGET_FORMAT (target_big_endian ? "pe-arm-big" : "pe-arm-little") +# endif # else # define TARGET_FORMAT (target_big_endian ? "coff-arm-big" : "coff-arm-little") # endif -#endif - -#ifdef OBJ_ELF -# define TARGET_FORMAT elf32_arm_target_format() - extern const char * elf32_arm_target_format PARAMS ((void)); - -# define md_elf_section_change_hook() arm_elf_change_section - extern void arm_elf_change_section (void); +#elif defined OBJ_ELF +# define ARM_BI_ENDIAN +# define TARGET_FORMAT elf32_arm_target_format () #endif #define TC_FORCE_RELOCATION(FIX) arm_force_relocation (FIX) -extern int arm_force_relocation PARAMS ((struct fix *)); -#define md_convert_frag(b, s, f) {as_fatal (_("arm convert_frag\n"));} +#define md_convert_frag(b, s, f) { as_fatal (_("arm convert_frag\n")); } #define md_cleanup() arm_cleanup () - extern void arm_cleanup PARAMS ((void)); #define md_start_line_hook() arm_start_line_hook () - extern void arm_start_line_hook PARAMS ((void)); #define tc_frob_label(S) arm_frob_label (S) - extern void arm_frob_label PARAMS ((symbolS *)); /* We also need to mark assembler created symbols: */ #define tc_frob_fake_label(S) arm_frob_label (S) @@ -119,19 +99,9 @@ extern int arm_force_relocation PARAMS ((struct fix *)); #define TC_FIX_TYPE PTR #define TC_INIT_FIX_DATA(FIX) ((FIX)->tc_fix_data = NULL) -#if defined OBJ_ELF || defined OBJ_COFF -#define EXTERN_FORCE_RELOC 1 - -#define tc_fix_adjustable(FIX) arm_fix_adjustable (FIX) -bfd_boolean arm_fix_adjustable PARAMS ((struct fix *)); - -/* Values passed to md_apply_fix3 don't include the symbol value. */ -#define MD_APPLY_SYM_VALUE(FIX) 0 -#endif - /* We need to keep some local information on symbols. */ -#define TC_SYMFIELD_TYPE unsigned int +#define TC_SYMFIELD_TYPE unsigned int #define ARM_GET_FLAG(s) (*symbol_get_tc (s)) #define ARM_SET_FLAG(s,v) (*symbol_get_tc (s) |= (v)) #define ARM_RESET_FLAG(s,v) (*symbol_get_tc (s) &= ~(v)) @@ -148,23 +118,10 @@ bfd_boolean arm_fix_adjustable PARAMS ((struct fix *)); #define ARM_SET_INTERWORK(s,t) ((t) ? ARM_SET_FLAG (s, ARM_FLAG_INTERWORK) : ARM_RESET_FLAG (s, ARM_FLAG_INTERWORK)) #define THUMB_SET_FUNC(s,t) ((t) ? ARM_SET_FLAG (s, THUMB_FLAG_FUNC) : ARM_RESET_FLAG (s, THUMB_FLAG_FUNC)) -#define TC_START_LABEL(C,STR) \ - (c == ':' || (c == '/' && arm_data_in_code ())) -int arm_data_in_code PARAMS ((void)); - -#define tc_canonicalize_symbol_name(str) \ - arm_canonicalize_symbol_name (str); -char * arm_canonicalize_symbol_name PARAMS ((char *)); - -#define obj_adjust_symtab() arm_adjust_symtab () - extern void arm_adjust_symtab PARAMS ((void)); - -#ifdef OBJ_ELF -#define obj_frob_symbol(sym, punt) armelf_frob_symbol ((sym), & (punt)) -void armelf_frob_symbol PARAMS ((symbolS *, int *)); -#endif - -#define tc_aout_pre_write_hook(x) {;} /* not used */ +#define TC_START_LABEL(C,STR) (c == ':' || (c == '/' && arm_data_in_code ())) +#define tc_canonicalize_symbol_name(str) arm_canonicalize_symbol_name (str); +#define obj_adjust_symtab() arm_adjust_symtab () +#define tc_aout_pre_write_hook(x) {;} /* not used */ #define LISTING_HEADER "ARM GAS " @@ -172,9 +129,6 @@ void armelf_frob_symbol PARAMS ((symbolS *, int *)); #define LOCAL_LABEL(name) (name[0] == '.' && (name[1] == 'L')) #define LOCAL_LABELS_FB 1 -#ifdef OBJ_ELF -#define LOCAL_LABEL_PREFIX '.' -#endif /* This expression evaluates to true if the relocation is for a local object for which we still want to do the relocation at runtime. @@ -192,29 +146,15 @@ void armelf_frob_symbol PARAMS ((symbolS *, int *)); || TC_FORCE_RELOCATION (FIX)) #define TC_CONS_FIX_NEW cons_fix_new_arm - extern void cons_fix_new_arm PARAMS ((fragS *, int, int, expressionS *)); - -#ifdef OBJ_ELF -#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_" -#else -#define GLOBAL_OFFSET_TABLE_NAME "__GLOBAL_OFFSET_TABLE_" -#endif - -#ifdef OBJ_ELF -#define DWARF2_LINE_MIN_INSN_LENGTH 2 -#endif #define MAX_MEM_FOR_RS_ALIGN_CODE 31 /* For frags in code sections we need to record whether they contain ARM code or THUMB code. This is that if they have to be aligned, they can contain the correct type of no-op instruction. */ -#define TC_FRAG_TYPE int +#define TC_FRAG_TYPE int #define TC_FRAG_INIT(fragp) arm_init_frag (fragp) -extern void arm_init_frag PARAMS ((struct frag *)); - -#define HANDLE_ALIGN(fragp) arm_handle_align (fragp) -extern void arm_handle_align PARAMS ((struct frag *)); +#define HANDLE_ALIGN(fragp) arm_handle_align (fragp) #define md_do_align(N, FILL, LEN, MAX, LABEL) \ if (FILL == NULL && (N) != 0 && ! need_pass_2 && subseg_text_p (now_seg)) \ @@ -222,4 +162,50 @@ extern void arm_handle_align PARAMS ((struct frag *)); arm_frag_align_code (N, MAX); \ goto LABEL; \ } -extern void arm_frag_align_code PARAMS ((int, int)); + +#ifdef OBJ_ELF +# define DWARF2_LINE_MIN_INSN_LENGTH 2 +# define obj_frob_symbol(sym, punt) armelf_frob_symbol ((sym), & (punt)) +# define md_elf_section_change_hook() arm_elf_change_section () +# define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_" +# define LOCAL_LABEL_PREFIX '.' +# define TC_SEGMENT_INFO_TYPE enum mstate + +enum mstate +{ + MAP_UNDEFINED = 0, /* Must be zero, for seginfo in new sections. */ + MAP_DATA, + MAP_ARM, + MAP_THUMB +}; + +#else /* Not OBJ_ELF. */ +#define GLOBAL_OFFSET_TABLE_NAME "__GLOBAL_OFFSET_TABLE_" +#endif + +#if defined OBJ_ELF || defined OBJ_COFF + +# define EXTERN_FORCE_RELOC 1 +# define tc_fix_adjustable(FIX) arm_fix_adjustable (FIX) +/* Values passed to md_apply_fix3 don't include the symbol value. */ +# define MD_APPLY_SYM_VALUE(FIX) 0 +# define TC_VALIDATE_FIX(FIX, SEGTYPE, LABEL) arm_validate_fix (FIX) + +#endif + +extern void arm_frag_align_code (int, int); +extern void arm_validate_fix (struct fix *); +extern const char * elf32_arm_target_format (void); +extern void arm_elf_change_section (void); +extern int arm_force_relocation (struct fix *); +extern void arm_cleanup (void); +extern void arm_start_line_hook (void); +extern void arm_frob_label (symbolS *); +extern int arm_data_in_code (void); +extern char * arm_canonicalize_symbol_name (char *); +extern void arm_adjust_symtab (void); +extern void armelf_frob_symbol (symbolS *, int *); +extern void cons_fix_new_arm (fragS *, int, int, expressionS *); +extern void arm_init_frag (struct frag *); +extern void arm_handle_align (struct frag *); +extern bfd_boolean arm_fix_adjustable (struct fix *); diff --git a/gas/config/tc-dlx.c b/gas/config/tc-dlx.c index 4b72b564de9..82b4aa249b0 100644 --- a/gas/config/tc-dlx.c +++ b/gas/config/tc-dlx.c @@ -1,5 +1,5 @@ /* tc-ldx.c -- Assemble for the DLX - Copyright 2002, 2003 Free Software Foundation, Inc. + Copyright 2002, 2003, 2004 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -397,6 +397,18 @@ md_assemble (str) the_insn.size, & the_insn.exp, the_insn.pcrel, the_insn.reloc); + /* Turn off complaints that the addend is + too large for things like foo+100000@ha. */ + switch (the_insn.reloc) + { + case RELOC_DLX_HI16: + case RELOC_DLX_LO16: + fixP->fx_no_overflow = 1; + break; + default: + break; + } + switch (fixP->fx_r_type) { case RELOC_DLX_REL26: @@ -410,6 +422,7 @@ md_assemble (str) bitP->fx_bit_add = 0x03FFFFFF; fixP->fx_bit_fixP = bitP; break; + case RELOC_DLX_LO16: case RELOC_DLX_REL16: bitP = malloc (sizeof (bit_fixS)); bitP->fx_bit_size = 16; @@ -955,7 +968,8 @@ machine_ip (str) continue; } - the_insn.reloc = (the_insn.HI) ? RELOC_DLX_HI16 : RELOC_DLX_16; + the_insn.reloc = (the_insn.HI) ? RELOC_DLX_HI16 + : (the_insn.LO ? RELOC_DLX_LO16 : RELOC_DLX_16); the_insn.reloc_offset = 2; the_insn.size = 2; the_insn.pcrel = 0; @@ -1164,6 +1178,7 @@ md_apply_fix3 (fixP, valP, seg) switch (fixP->fx_r_type) { + case RELOC_DLX_LO16: case RELOC_DLX_REL16: if (fixP->fx_bit_fixP != (bit_fixS *) NULL) { diff --git a/gas/config/tc-frv.c b/gas/config/tc-frv.c index 96e630bf298..6c6528bfb8e 100644 --- a/gas/config/tc-frv.c +++ b/gas/config/tc-frv.c @@ -163,6 +163,7 @@ static FRV_VLIW vliw; #endif static unsigned long frv_mach = bfd_mach_frv; +static bfd_boolean fr400_audio; /* Flags to set in the elf header */ static flagword frv_flags = DEFAULT_FLAGS; @@ -354,10 +355,24 @@ md_parse_option (c, arg) frv_mach = bfd_mach_fr550; } + else if (strcmp (p, "fr450") == 0) + { + cpu_flags = EF_FRV_CPU_FR450; + frv_mach = bfd_mach_fr450; + } + + else if (strcmp (p, "fr405") == 0) + { + cpu_flags = EF_FRV_CPU_FR405; + frv_mach = bfd_mach_fr400; + fr400_audio = TRUE; + } + else if (strcmp (p, "fr400") == 0) { cpu_flags = EF_FRV_CPU_FR400; frv_mach = bfd_mach_fr400; + fr400_audio = FALSE; } else if (strcmp (p, "fr300") == 0) @@ -446,7 +461,7 @@ md_show_usage (stream) fprintf (stream, _("-mpic Note small position independent code\n")); fprintf (stream, _("-mPIC Note large position independent code\n")); fprintf (stream, _("-mlibrary-pic Compile library for large position indepedent code\n")); - fprintf (stream, _("-mcpu={fr500|fr550|fr400|fr300|frv|simple|tomcat}\n")); + fprintf (stream, _("-mcpu={fr500|fr550|fr400|fr405|fr450|fr300|frv|simple|tomcat}\n")); fprintf (stream, _(" Record the cpu type\n")); fprintf (stream, _("-mtomcat-stats Print out stats for tomcat workarounds\n")); fprintf (stream, _("-mtomcat-debug Debug tomcat workarounds\n")); @@ -1042,6 +1057,36 @@ fr550_check_acc_range (FRV_VLIW *vliw, frv_insn *insn) return 0; /* all is ok */ } +/* Return true if the target implements instruction INSN. */ + +static bfd_boolean +target_implements_insn_p (const CGEN_INSN *insn) +{ + switch (frv_mach) + { + default: + /* bfd_mach_frv or generic. */ + return TRUE; + + case bfd_mach_fr300: + case bfd_mach_frvsimple: + return CGEN_INSN_MACH_HAS_P (insn, MACH_SIMPLE); + + case bfd_mach_fr400: + return ((fr400_audio || !CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_AUDIO)) + && CGEN_INSN_MACH_HAS_P (insn, MACH_FR400)); + + case bfd_mach_fr450: + return CGEN_INSN_MACH_HAS_P (insn, MACH_FR450); + + case bfd_mach_fr500: + return CGEN_INSN_MACH_HAS_P (insn, MACH_FR500); + + case bfd_mach_fr550: + return CGEN_INSN_MACH_HAS_P (insn, MACH_FR550); + } +} + void md_assemble (str) char * str; @@ -1125,6 +1170,11 @@ md_assemble (str) instructions, don't do vliw checking. */ else if (frv_mach != bfd_mach_frv) { + if (!target_implements_insn_p (insn.insn)) + { + as_bad (_("Instruction not supported by this architecture")); + return; + } packing_constraint = frv_vliw_add_insn (& vliw, insn.insn); if (frv_mach == bfd_mach_fr550 && ! packing_constraint) packing_constraint = fr550_check_acc_range (& vliw, & insn); diff --git a/gas/config/tc-generic.c b/gas/config/tc-generic.c index e69de29bb2d..b9e52f6dec9 100644 --- a/gas/config/tc-generic.c +++ b/gas/config/tc-generic.c @@ -0,0 +1,22 @@ +/* This file is tc-generic.c + + Copyright 2004 Free Software Foundation, Inc. + + This file is part of GAS, the GNU Assembler. + + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2, or (at your option) + any later version. + + GAS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with GAS; see the file COPYING. If not, write to the Free Software + Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +/* This file is tc-generic.c and is intended to be a template for + target cpu specific files. */ diff --git a/gas/config/tc-hppa.c b/gas/config/tc-hppa.c index 7fbcd0a6e04..72abe1dedb5 100644 --- a/gas/config/tc-hppa.c +++ b/gas/config/tc-hppa.c @@ -363,6 +363,9 @@ struct default_subspace_dict /* Nonzero if this subspace contains only code. */ char code_only; + /* Nonzero if this is a comdat subspace. */ + char comdat; + /* Nonzero if this is a common subspace. */ char common; @@ -555,13 +558,13 @@ static sd_chain_struct *create_new_space PARAMS ((char *, int, int, asection *, int)); static ssd_chain_struct *create_new_subspace PARAMS ((sd_chain_struct *, char *, int, int, - int, int, int, + int, int, int, int, int, int, int, int, int, asection *)); static ssd_chain_struct *update_subspace PARAMS ((sd_chain_struct *, char *, int, int, int, int, int, int, int, - int, int, int, + int, int, int, int, asection *)); static sd_chain_struct *is_defined_space PARAMS ((char *)); static ssd_chain_struct *is_defined_subspace PARAMS ((char *)); @@ -1117,12 +1120,12 @@ static const struct selector_entry selector_table[] = static struct default_subspace_dict pa_def_subspaces[] = { - {"$CODE$", 1, 1, 1, 0, 0, 0, 24, 0x2c, 0, 8, 0, 0, SUBSEG_CODE}, - {"$DATA$", 1, 1, 0, 0, 0, 0, 24, 0x1f, 1, 8, 1, 1, SUBSEG_DATA}, - {"$LIT$", 1, 1, 0, 0, 0, 0, 16, 0x2c, 0, 8, 0, 0, SUBSEG_LIT}, - {"$MILLICODE$", 1, 1, 0, 0, 0, 0, 8, 0x2c, 0, 8, 0, 0, SUBSEG_MILLI}, - {"$BSS$", 1, 1, 0, 0, 0, 1, 80, 0x1f, 1, 8, 1, 1, SUBSEG_BSS}, - {NULL, 0, 1, 0, 0, 0, 0, 255, 0x1f, 0, 4, 0, 0, 0} + {"$CODE$", 1, 1, 1, 0, 0, 0, 0, 24, 0x2c, 0, 8, 0, 0, SUBSEG_CODE}, + {"$DATA$", 1, 1, 0, 0, 0, 0, 0, 24, 0x1f, 1, 8, 1, 1, SUBSEG_DATA}, + {"$LIT$", 1, 1, 0, 0, 0, 0, 0, 16, 0x2c, 0, 8, 0, 0, SUBSEG_LIT}, + {"$MILLICODE$", 1, 1, 0, 0, 0, 0, 0, 8, 0x2c, 0, 8, 0, 0, SUBSEG_MILLI}, + {"$BSS$", 1, 1, 0, 0, 0, 0, 1, 80, 0x1f, 1, 8, 1, 1, SUBSEG_BSS}, + {NULL, 0, 1, 0, 0, 0, 0, 0, 255, 0x1f, 0, 4, 0, 0, 0} }; static struct default_space_dict pa_def_spaces[] = @@ -1399,6 +1402,8 @@ cons_fix_new_hppa (frag, where, size, exp) /* Get a base relocation type. */ if (is_DP_relative (*exp)) rel_type = R_HPPA_GOTOFF; + else if (is_PC_relative (*exp)) + rel_type = R_HPPA_PCREL_CALL; else if (is_complex (*exp)) rel_type = R_HPPA_COMPLEX; else @@ -6386,6 +6391,7 @@ pa_comm (unused) if (symbol) { + symbol_get_bfdsym (symbol)->flags |= BSF_OBJECT; S_SET_VALUE (symbol, size); S_SET_SEGMENT (symbol, bfd_und_section_ptr); S_SET_EXTERNAL (symbol); @@ -7451,7 +7457,7 @@ pa_subspace (create_new) int create_new; { char *name, *ss_name, c; - char loadable, code_only, common, dup_common, zero, sort; + char loadable, code_only, comdat, common, dup_common, zero, sort; int i, access, space_index, alignment, quadrant, applicable, flags; sd_chain_struct *space; ssd_chain_struct *ssd; @@ -7477,6 +7483,7 @@ pa_subspace (create_new) sort = 0; access = 0x7f; loadable = 1; + comdat = 0; common = 0; dup_common = 0; code_only = 0; @@ -7511,6 +7518,7 @@ pa_subspace (create_new) if (strcasecmp (pa_def_subspaces[i].name, ss_name) == 0) { loadable = pa_def_subspaces[i].loadable; + comdat = pa_def_subspaces[i].comdat; common = pa_def_subspaces[i].common; dup_common = pa_def_subspaces[i].dup_common; code_only = pa_def_subspaces[i].code_only; @@ -7574,6 +7582,11 @@ pa_subspace (create_new) *input_line_pointer = c; loadable = 0; } + else if ((strncasecmp (name, "comdat", 6) == 0)) + { + *input_line_pointer = c; + comdat = 1; + } else if ((strncasecmp (name, "common", 6) == 0)) { *input_line_pointer = c; @@ -7606,8 +7619,17 @@ pa_subspace (create_new) flags |= (SEC_ALLOC | SEC_LOAD); if (code_only) flags |= SEC_CODE; - if (common || dup_common) - flags |= SEC_IS_COMMON; + + /* These flags are used to implement various flavors of initialized + common. The SOM linker discards duplicate subspaces when they + have the same "key" symbol name. This support is more like + GNU linkonce than BFD common. Further, pc-relative relocations + are converted to section relative relocations in BFD common + sections. This complicates the handling of relocations in + common sections containing text and isn't currently supported + correctly in the SOM BFD backend. */ + if (comdat || common || dup_common) + flags |= SEC_LINK_ONCE; flags |= SEC_RELOC | SEC_HAS_CONTENTS; @@ -7649,16 +7671,16 @@ pa_subspace (create_new) if (ssd) current_subspace = update_subspace (space, ss_name, loadable, - code_only, common, dup_common, - sort, zero, access, space_index, - alignment, quadrant, + code_only, comdat, common, + dup_common, sort, zero, access, + space_index, alignment, quadrant, section); else current_subspace = create_new_subspace (space, ss_name, loadable, - code_only, common, + code_only, comdat, common, dup_common, zero, sort, access, space_index, - alignment, quadrant, section); + alignment, quadrant, section); demand_empty_rest_of_line (); current_subspace->ssd_seg = section; @@ -7779,6 +7801,7 @@ pa_spaces_begin () create_new_subspace (space, name, pa_def_subspaces[i].loadable, pa_def_subspaces[i].code_only, + pa_def_subspaces[i].comdat, pa_def_subspaces[i].common, pa_def_subspaces[i].dup_common, pa_def_subspaces[i].zero, @@ -7880,12 +7903,12 @@ create_new_space (name, spnum, loadable, defined, private, order as defined by the SORT entries. */ static ssd_chain_struct * -create_new_subspace (space, name, loadable, code_only, common, +create_new_subspace (space, name, loadable, code_only, comdat, common, dup_common, is_zero, sort, access, space_index, alignment, quadrant, seg) sd_chain_struct *space; char *name; - int loadable, code_only, common, dup_common, is_zero; + int loadable, code_only, comdat, common, dup_common, is_zero; int sort; int access; int space_index; @@ -7942,8 +7965,8 @@ create_new_subspace (space, name, loadable, code_only, common, } #ifdef obj_set_subsection_attributes - obj_set_subsection_attributes (seg, space->sd_seg, access, - sort, quadrant); + obj_set_subsection_attributes (seg, space->sd_seg, access, sort, + quadrant, comdat, common, dup_common); #endif return chain_entry; @@ -7953,12 +7976,13 @@ create_new_subspace (space, name, loadable, code_only, common, various arguments. Return the modified subspace chain entry. */ static ssd_chain_struct * -update_subspace (space, name, loadable, code_only, common, dup_common, sort, - zero, access, space_index, alignment, quadrant, section) +update_subspace (space, name, loadable, code_only, comdat, common, dup_common, + sort, zero, access, space_index, alignment, quadrant, section) sd_chain_struct *space; char *name; int loadable; int code_only; + int comdat; int common; int dup_common; int zero; @@ -7974,8 +7998,8 @@ update_subspace (space, name, loadable, code_only, common, dup_common, sort, chain_entry = is_defined_subspace (name); #ifdef obj_set_subsection_attributes - obj_set_subsection_attributes (section, space->sd_seg, access, - sort, quadrant); + obj_set_subsection_attributes (section, space->sd_seg, access, sort, + quadrant, comdat, common, dup_common); #endif return chain_entry; diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 5de6a55d2f5..f37c259249f 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -76,6 +76,9 @@ static void set_code_flag PARAMS ((int)); static void set_16bit_gcc_code_flag PARAMS ((int)); static void set_intel_syntax PARAMS ((int)); static void set_cpu_arch PARAMS ((int)); +#ifdef TE_PE +static void pe_directive_secrel PARAMS ((int)); +#endif static char *output_invalid PARAMS ((int c)); static int i386_operand PARAMS ((char *operand_string)); static int i386_intel_operand PARAMS ((char *operand_string, int got_a_float)); @@ -444,6 +447,9 @@ const pseudo_typeS md_pseudo_table[] = {"att_syntax", set_intel_syntax, 0}, {"file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0}, {"loc", dwarf2_directive_loc, 0}, +#ifdef TE_PE + {"secrel32", pe_directive_secrel, 0}, +#endif {0, 0, 0} }; @@ -3638,6 +3644,50 @@ x86_cons (exp, size) } #endif +#ifdef TE_PE + +#define O_secrel (O_max + 1) + +void +x86_pe_cons_fix_new (frag, off, len, exp) + fragS *frag; + unsigned int off; + unsigned int len; + expressionS *exp; +{ + enum bfd_reloc_code_real r = reloc (len, 0, 0, NO_RELOC); + + if (exp->X_op == O_secrel) + { + exp->X_op = O_symbol; + r = BFD_RELOC_32_SECREL; + } + + fix_new_exp (frag, off, len, exp, 0, r); +} + +static void +pe_directive_secrel (dummy) + int dummy ATTRIBUTE_UNUSED; +{ + expressionS exp; + + do + { + expression (&exp); + if (exp.X_op == O_symbol) + exp.X_op = O_secrel; + + emit_expr (&exp, 4); + } + while (*input_line_pointer++ == ','); + + input_line_pointer--; + demand_empty_rest_of_line (); +} + +#endif + static int i386_immediate PARAMS ((char *)); static int @@ -5165,6 +5215,9 @@ tc_gen_reloc (section, fixp) case BFD_RELOC_RVA: case BFD_RELOC_VTABLE_ENTRY: case BFD_RELOC_VTABLE_INHERIT: +#ifdef TE_PE + case BFD_RELOC_32_SECREL: +#endif code = fixp->fx_r_type; break; default: diff --git a/gas/config/tc-i386.h b/gas/config/tc-i386.h index 14b522b5649..5c48f58d4a5 100644 --- a/gas/config/tc-i386.h +++ b/gas/config/tc-i386.h @@ -408,6 +408,12 @@ extern void x86_cons_fix_new PARAMS ((fragS *, unsigned int, unsigned int, expressionS *)); #endif +#ifdef TE_PE +#define TC_CONS_FIX_NEW(FRAG,OFF,LEN,EXP) x86_pe_cons_fix_new(FRAG, OFF, LEN, EXP) +extern void x86_pe_cons_fix_new + PARAMS ((fragS *, unsigned int, unsigned int, expressionS *)); +#endif + #define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */ #define NO_RELOC BFD_RELOC_NONE diff --git a/gas/config/tc-ia64.c b/gas/config/tc-ia64.c index fe66ffa4ece..f5526c98010 100644 --- a/gas/config/tc-ia64.c +++ b/gas/config/tc-ia64.c @@ -636,6 +636,9 @@ static struct gr { valueT value; } gr_values[128] = {{ 1, 0, 0 }}; +/* Remember the alignment frag. */ +static fragS *align_frag; + /* These are the routines required to output the various types of unwind records. */ @@ -702,6 +705,7 @@ static int ar_is_in_integer_unit PARAMS ((int regnum)); static void set_section PARAMS ((char *name)); static unsigned int set_regstack PARAMS ((unsigned int, unsigned int, unsigned int, unsigned int)); +static void dot_align (int); static void dot_radix PARAMS ((int)); static void dot_special_section PARAMS ((int)); static void dot_proc PARAMS ((int)); @@ -898,9 +902,10 @@ static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func)); static int calc_record_size PARAMS ((unw_rec_list *)); static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int)); static unsigned long slot_index PARAMS ((unsigned long, fragS *, - unsigned long, fragS *)); + unsigned long, fragS *, + int)); static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *)); -static void fixup_unw_records PARAMS ((unw_rec_list *)); +static void fixup_unw_records PARAMS ((unw_rec_list *, int)); static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *)); static void generate_unwind_image PARAMS ((const char *)); @@ -1092,14 +1097,36 @@ ia64_flush_insns () here. Give an error for others. */ for (ptr = unwind.current_entry; ptr; ptr = ptr->next) { - if (ptr->r.type == prologue || ptr->r.type == prologue_gr - || ptr->r.type == body || ptr->r.type == endp) + switch (ptr->r.type) { + case prologue: + case prologue_gr: + case body: + case endp: ptr->slot_number = (unsigned long) frag_more (0); ptr->slot_frag = frag_now; + break; + + /* Allow any record which doesn't have a "t" field (i.e., + doesn't relate to a particular instruction). */ + case unwabi: + case br_gr: + case copy_state: + case fr_mem: + case frgr_mem: + case gr_gr: + case gr_mem: + case label_state: + case rp_br: + case spill_base: + case spill_mask: + /* nothing */ + break; + + default: + as_bad (_("Unwind directive not followed by an instruction.")); + break; } - else - as_bad (_("Unwind directive not followed by an instruction.")); } unwind.current_entry = NULL; @@ -1109,9 +1136,8 @@ ia64_flush_insns () as_bad ("qualifying predicate not followed by instruction"); } -void -ia64_do_align (nbytes) - int nbytes; +static void +ia64_do_align (int nbytes) { char *saved_input_line_pointer = input_line_pointer; @@ -2590,14 +2616,16 @@ set_imask (region, regmask, t, type) /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR. SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag - containing FIRST_ADDR. */ + containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates + for frag sizes. */ unsigned long -slot_index (slot_addr, slot_frag, first_addr, first_frag) +slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax) unsigned long slot_addr; fragS *slot_frag; unsigned long first_addr; fragS *first_frag; + int before_relax; { unsigned long index = 0; @@ -2612,10 +2640,10 @@ slot_index (slot_addr, slot_frag, first_addr, first_frag) { unsigned long start_addr = (unsigned long) &first_frag->fr_literal; - if (finalize_syms) + if (! before_relax) { - /* We can get the final addresses only after relaxation is - done. */ + /* We can get the final addresses only during and after + relaxation. */ if (first_frag->fr_next && first_frag->fr_next->fr_address) index += 3 * ((first_frag->fr_next->fr_address - first_frag->fr_address @@ -2694,8 +2722,9 @@ optimize_unw_records (list) within each record to generate an image. */ static void -fixup_unw_records (list) +fixup_unw_records (list, before_relax) unw_rec_list *list; + int before_relax; { unw_rec_list *ptr, *region = 0; unsigned long first_addr = 0, rlen = 0, t; @@ -2706,7 +2735,7 @@ fixup_unw_records (list) if (ptr->slot_number == SLOT_NUM_NOT_SET) as_bad (" Insn slot not set in unwind record."); t = slot_index (ptr->slot_number, ptr->slot_frag, - first_addr, first_frag); + first_addr, first_frag, before_relax); switch (ptr->r.type) { case prologue: @@ -2730,7 +2759,8 @@ fixup_unw_records (list) last_frag = last->slot_frag; break; } - size = slot_index (last_addr, last_frag, first_addr, first_frag); + size = slot_index (last_addr, last_frag, first_addr, first_frag, + before_relax); rlen = ptr->r.record.r.rlen = size; if (ptr->r.type == body) /* End of region. */ @@ -2830,6 +2860,35 @@ fixup_unw_records (list) } } +/* Estimate the size of a frag before relaxing. We only have one type of frag + to handle here, which is the unwind info frag. */ + +int +ia64_estimate_size_before_relax (fragS *frag, + asection *segtype ATTRIBUTE_UNUSED) +{ + unw_rec_list *list; + int len, size, pad; + + /* ??? This code is identical to the first part of ia64_convert_frag. */ + list = (unw_rec_list *) frag->fr_opcode; + fixup_unw_records (list, 0); + + len = calc_record_size (list); + /* pad to pointer-size boundary. */ + pad = len % md.pointer_size; + if (pad != 0) + len += md.pointer_size - pad; + /* Add 8 for the header + a pointer for the personality offset. */ + size = len + 8 + md.pointer_size; + + /* fr_var carries the max_chars that we created the fragment with. + We must, of course, have allocated enough memory earlier. */ + assert (frag->fr_var >= size); + + return frag->fr_fix + size; +} + /* This function converts a rs_machine_dependent variant frag into a normal fill frag with the unwind image from the the record list. */ void @@ -2839,8 +2898,9 @@ ia64_convert_frag (fragS *frag) int len, size, pad; valueT flag_value; + /* ??? This code is identical to ia64_estimate_size_before_relax. */ list = (unw_rec_list *) frag->fr_opcode; - fixup_unw_records (list); + fixup_unw_records (list, 0); len = calc_record_size (list); /* pad to pointer-size boundary. */ @@ -2974,6 +3034,14 @@ convert_expr_to_xy_reg (e, xy, regp) } static void +dot_align (int arg) +{ + /* The current frag is an alignment frag. */ + align_frag = frag_now; + s_align_bytes (arg); +} + +static void dot_radix (dummy) int dummy ATTRIBUTE_UNUSED; { @@ -3264,7 +3332,7 @@ generate_unwind_image (text_name) /* Generate the unwind record. */ list = optimize_unw_records (unwind.list); - fixup_unw_records (list); + fixup_unw_records (list, 1); size = calc_record_size (list); if (size > 0 || unwind.force_unwind_entry) @@ -3549,7 +3617,7 @@ dot_saveb (dummy) add_unwind_entry (output_br_mem (brmask)); if (!is_end_of_line[sep] && !is_it_end_of_statement ()) - ignore_rest_of_line (); + demand_empty_rest_of_line (); } static void @@ -3581,7 +3649,7 @@ dot_spill (dummy) sep = parse_operand (&e); if (!is_end_of_line[sep] && !is_it_end_of_statement ()) - ignore_rest_of_line (); + demand_empty_rest_of_line (); if (e.X_op != O_constant) as_bad ("Operand to .spill must be a constant"); @@ -3857,7 +3925,7 @@ dot_unwabi (dummy) } sep = parse_operand (&e2); if (!is_end_of_line[sep] && !is_it_end_of_statement ()) - ignore_rest_of_line (); + demand_empty_rest_of_line (); if (e1.X_op != O_constant) { @@ -3952,7 +4020,7 @@ dot_prologue (dummy) as_bad ("No second operand to .prologue"); sep = parse_operand (&e2); if (!is_end_of_line[sep] && !is_it_end_of_statement ()) - ignore_rest_of_line (); + demand_empty_rest_of_line (); if (e1.X_op == O_constant) { @@ -4900,7 +4968,7 @@ const pseudo_typeS md_pseudo_table[] = { "lb", dot_scope, 0 }, { "le", dot_scope, 1 }, #endif - { "align", s_align_bytes, 0 }, + { "align", dot_align, 0 }, { "regstk", dot_regstk, 0 }, { "rotr", dot_rot, DYNREG_GR }, { "rotf", dot_rot, DYNREG_FR }, @@ -9933,7 +10001,27 @@ md_assemble (str) flags = idesc->flags; if ((flags & IA64_OPCODE_FIRST) != 0) - insn_group_break (1, 0, 0); + { + /* The alignment frag has to end with a stop bit only if the + next instruction after the alignment directive has to be + the first instruction in an instruction group. */ + if (align_frag) + { + while (align_frag->fr_type != rs_align_code) + { + align_frag = align_frag->fr_next; + if (!align_frag) + break; + } + /* align_frag can be NULL if there are directives in + between. */ + if (align_frag && align_frag->fr_next == frag_now) + align_frag->tc_frag_data = 1; + } + + insn_group_break (1, 0, 0); + } + align_frag = NULL; if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0) { @@ -10766,16 +10854,43 @@ ia64_handle_align (fragp) static const unsigned char le_nop[] = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00}; + static const unsigned char le_nop_stop[] + = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, + 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00}; int bytes; char *p; + const unsigned char *nop; if (fragp->fr_type != rs_align_code) return; + /* Check if this frag has to end with a stop bit. */ + nop = fragp->tc_frag_data ? le_nop_stop : le_nop; + bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; p = fragp->fr_literal + fragp->fr_fix; + /* If no paddings are needed, we check if we need a stop bit. */ + if (!bytes && fragp->tc_frag_data) + { + if (fragp->fr_fix < 16) +#if 1 + /* FIXME: It won't work with + .align 16 + alloc r32=ar.pfs,1,2,4,0 + */ + ; +#else + as_bad_where (fragp->fr_file, fragp->fr_line, + _("Can't add stop bit to mark end of instruction group")); +#endif + else + /* Bundles are always in little-endian byte order. Make sure + the previous bundle has the stop bit. */ + *(p - 16) |= 1; + } + /* Make sure we are on a 16-byte boundary, in case someone has been putting data into a text section. */ if (bytes & 15) @@ -10788,7 +10903,7 @@ ia64_handle_align (fragp) } /* Instruction bundles are always little-endian. */ - memcpy (p, le_nop, 16); + memcpy (p, nop, 16); fragp->fr_var = 16; } diff --git a/gas/config/tc-ia64.h b/gas/config/tc-ia64.h index d1a04ee0187..dcc2c299602 100644 --- a/gas/config/tc-ia64.h +++ b/gas/config/tc-ia64.h @@ -86,7 +86,6 @@ struct ia64_fix enum ia64_opnd opnd; }; -extern void ia64_do_align PARAMS((int n)); extern void ia64_end_of_source PARAMS((void)); extern void ia64_start_line PARAMS((void)); extern int ia64_unrecognized_line PARAMS((int ch)); @@ -115,6 +114,7 @@ extern void ia64_handle_align PARAMS ((fragS *f)); extern void ia64_after_parse_args PARAMS ((void)); extern void ia64_dwarf2_emit_offset PARAMS ((symbolS *, unsigned int)); extern void ia64_check_label PARAMS ((symbolS *)); +extern int ia64_estimate_size_before_relax (fragS *, asection *); extern void ia64_convert_frag (fragS *); #define md_end() ia64_end_of_source () @@ -138,7 +138,7 @@ extern void ia64_convert_frag (fragS *); #define md_create_short_jump(p,f,t,fr,s) \ as_fatal ("ia64_create_short_jump") #define md_estimate_size_before_relax(f,s) \ - (f)->fr_var + ia64_estimate_size_before_relax(f,s) #define md_elf_section_letter ia64_elf_section_letter #define md_elf_section_flags ia64_elf_section_flags #define TC_FIX_TYPE struct ia64_fix @@ -154,6 +154,10 @@ extern void ia64_convert_frag (fragS *); #define TC_DWARF2_EMIT_OFFSET ia64_dwarf2_emit_offset #define tc_check_label(l) ia64_check_label (l) +/* Record if an alignment frag should end with a stop bit. */ +#define TC_FRAG_TYPE int +#define TC_FRAG_INIT(FRAGP) do {(FRAGP)->tc_frag_data = 0;}while (0) + #define MAX_MEM_FOR_RS_ALIGN_CODE (15 + 16) #define WORKING_DOT_WORD /* don't do broken word processing for now */ diff --git a/gas/config/tc-iq2000.c b/gas/config/tc-iq2000.c index 0ab650aa283..9f591d39a27 100644 --- a/gas/config/tc-iq2000.c +++ b/gas/config/tc-iq2000.c @@ -1,5 +1,5 @@ /* tc-iq2000.c -- Assembler for the Sitera IQ2000. - Copyright (C) 2003 Free Software Foundation. + Copyright (C) 2003, 2004 Free Software Foundation. This file is part of GAS, the GNU Assembler. @@ -357,7 +357,7 @@ static const char * li_expn = "\n\ ori \\rt,%0,\\imm\n\ .elseif (\\imm & 0xffff0000 == 0xffff0000)\n\ addi \\rt,%0,\\imm\n\ - .elseif (\\imm & 0x0000ffff == 0) + .elseif (\\imm & 0x0000ffff == 0)\n\ lui \\rt,%uhi(\\imm)\n\ .else\n\ lui \\rt,%uhi(\\imm)\n\ diff --git a/gas/config/tc-m32r.c b/gas/config/tc-m32r.c index fb1c61354fb..e990d9d941c 100644 --- a/gas/config/tc-m32r.c +++ b/gas/config/tc-m32r.c @@ -1,5 +1,5 @@ /* tc-m32r.c -- Assembler for the Renesas M32R. - Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 + Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -109,7 +109,7 @@ static int enable_special = 0; /* Non-zero if -bitinst has been specified, in which case support for extended M32R bit-field instruction set should be enabled. */ -static int enable_special_m32r = 0; +static int enable_special_m32r = 1; /* Non-zero if -float has been specified, in which case support for extended M32R floating point instruction set should be enabled. */ @@ -216,7 +216,8 @@ struct option md_longopts[] = #define OPTION_NO_IGNORE_PARALLEL (OPTION_IGNORE_PARALLEL + 1) #define OPTION_SPECIAL (OPTION_NO_IGNORE_PARALLEL + 1) #define OPTION_SPECIAL_M32R (OPTION_SPECIAL + 1) -#define OPTION_SPECIAL_FLOAT (OPTION_SPECIAL_M32R + 1) +#define OPTION_NO_SPECIAL_M32R (OPTION_SPECIAL_M32R + 1) +#define OPTION_SPECIAL_FLOAT (OPTION_NO_SPECIAL_M32R + 1) #define OPTION_WARN_UNMATCHED (OPTION_SPECIAL_FLOAT + 1) #define OPTION_NO_WARN_UNMATCHED (OPTION_WARN_UNMATCHED + 1) {"m32r", no_argument, NULL, OPTION_M32R}, @@ -238,6 +239,7 @@ struct option md_longopts[] = {"nIp", no_argument, NULL, OPTION_NO_IGNORE_PARALLEL}, {"hidden", no_argument, NULL, OPTION_SPECIAL}, {"bitinst", no_argument, NULL, OPTION_SPECIAL_M32R}, + {"no-bitinst", no_argument, NULL, OPTION_NO_SPECIAL_M32R}, {"float", no_argument, NULL, OPTION_SPECIAL_FLOAT}, /* Sigh. I guess all warnings must now have both variants. */ {"warn-unmatched-high", no_argument, NULL, OPTION_WARN_UNMATCHED}, @@ -353,6 +355,10 @@ md_parse_option (c, arg) enable_special_m32r = 1; break; + case OPTION_NO_SPECIAL_M32R: + enable_special_m32r = 0; + break; + case OPTION_SPECIAL_FLOAT: enable_special_float = 1; break; @@ -410,6 +416,8 @@ md_show_usage (stream) fprintf (stream, _("\ -no-parallel disable -parallel\n")); fprintf (stream, _("\ + -no-bitinst disallow the M32R2's extended bit-field instructions\n")); + fprintf (stream, _("\ -O try to optimize code. Implies -parallel\n")); fprintf (stream, _("\ @@ -1374,6 +1382,14 @@ md_assemble (str) prev_insn.insn is NULL when we're on a 32 bit boundary. */ on_32bit_boundary_p = prev_insn.insn == NULL; + /* Change a frag to, if each insn to swap is in a different frag. + It must keep only one instruction in a frag. */ + if (parallel() && on_32bit_boundary_p) + { + frag_wane (frag_now); + frag_new (0); + } + /* Look to see if this instruction can be combined with the previous instruction to make one, parallel, 32 bit instruction. If the previous instruction (potentially) changed the flow of @@ -1434,13 +1450,25 @@ md_assemble (str) else if (insn.frag->fr_opcode == insn.addr) insn.frag->fr_opcode = prev_insn.addr; - /* Update the addresses in any fixups. - Note that we don't have to handle the case where each insn is in - a different frag as we ensure they're in the same frag above. */ - for (i = 0; i < prev_insn.num_fixups; ++i) - prev_insn.fixups[i]->fx_where += 2; - for (i = 0; i < insn.num_fixups; ++i) - insn.fixups[i]->fx_where -= 2; + /* Change a frag to, if each insn is in a different frag. + It must keep only one instruction in a frag. */ + if (prev_insn.frag != insn.frag) + { + for (i = 0; i < prev_insn.num_fixups; ++i) + prev_insn.fixups[i]->fx_frag = insn.frag; + for (i = 0; i < insn.num_fixups; ++i) + insn.fixups[i]->fx_frag = prev_insn.frag; + } + else + { + /* Update the addresses in any fixups. + Note that we don't have to handle the case where each insn is in + a different frag as we ensure they're in the same frag above. */ + for (i = 0; i < prev_insn.num_fixups; ++i) + prev_insn.fixups[i]->fx_where += 2; + for (i = 0; i < insn.num_fixups; ++i) + insn.fixups[i]->fx_where -= 2; + } } /* Keep track of whether we've seen a pair of 16 bit insns. diff --git a/gas/config/tc-m68k.c b/gas/config/tc-m68k.c index 5bef34b4efd..86fa9dc7a81 100644 --- a/gas/config/tc-m68k.c +++ b/gas/config/tc-m68k.c @@ -371,52 +371,52 @@ struct m68k_cpu static const struct m68k_cpu archs[] = { - { m68000, "68000", 0 }, - { m68010, "68010", 0 }, - { m68020, "68020", 0 }, - { m68030, "68030", 0 }, - { m68040, "68040", 0 }, - { m68060, "68060", 0 }, - { cpu32, "cpu32", 0 }, - { m68881, "68881", 0 }, - { m68851, "68851", 0 }, - { mcf5200, "5200", 0 }, - { mcf5206e,"5206e", 0 }, - { mcf528x, "528x", 0 }, - { mcf5307, "5307", 0 }, - { mcf5407, "5407", 0 }, - { mcfv4e, "cfv4e", 0 }, + { m68000, "68000", 0 }, + { m68010, "68010", 0 }, + { m68020, "68020", 0 }, + { m68030, "68030", 0 }, + { m68040, "68040", 0 }, + { m68060, "68060", 0 }, + { cpu32, "cpu32", 0 }, + { m68881, "68881", 0 }, + { m68851, "68851", 0 }, + { mcf5200, "5200", 0 }, + { mcf5206e, "5206e", 0 }, + { mcf528x|mcfmac, "528x", 0 }, + { mcf5307|mcfmac, "5307", 0 }, + { mcf5407|mcfmac, "5407", 0 }, + { mcfv4e|mcfemac, "cfv4e", 0 }, /* Aliases (effectively, so far as gas is concerned) for the above cpus. */ - { m68020, "68k", 1 }, - { m68000, "68008", 1 }, - { m68000, "68302", 1 }, - { m68000, "68306", 1 }, - { m68000, "68307", 1 }, - { m68000, "68322", 1 }, - { m68000, "68356", 1 }, - { m68000, "68ec000", 1 }, - { m68000, "68hc000", 1 }, - { m68000, "68hc001", 1 }, - { m68020, "68ec020", 1 }, - { m68030, "68ec030", 1 }, - { m68040, "68ec040", 1 }, - { m68060, "68ec060", 1 }, - { cpu32, "68330", 1 }, - { cpu32, "68331", 1 }, - { cpu32, "68332", 1 }, - { cpu32, "68333", 1 }, - { cpu32, "68334", 1 }, - { cpu32, "68336", 1 }, - { cpu32, "68340", 1 }, - { cpu32, "68341", 1 }, - { cpu32, "68349", 1 }, - { cpu32, "68360", 1 }, - { m68881, "68882", 1 }, - { mcf5200, "5202", 1 }, - { mcf5200, "5204", 1 }, - { mcf5200, "5206", 1 }, - { mcf5407, "cfv4", 1 }, + { m68020, "68k", 1 }, + { m68000, "68008", 1 }, + { m68000, "68302", 1 }, + { m68000, "68306", 1 }, + { m68000, "68307", 1 }, + { m68000, "68322", 1 }, + { m68000, "68356", 1 }, + { m68000, "68ec000", 1 }, + { m68000, "68hc000", 1 }, + { m68000, "68hc001", 1 }, + { m68020, "68ec020", 1 }, + { m68030, "68ec030", 1 }, + { m68040, "68ec040", 1 }, + { m68060, "68ec060", 1 }, + { cpu32, "68330", 1 }, + { cpu32, "68331", 1 }, + { cpu32, "68332", 1 }, + { cpu32, "68333", 1 }, + { cpu32, "68334", 1 }, + { cpu32, "68336", 1 }, + { cpu32, "68340", 1 }, + { cpu32, "68341", 1 }, + { cpu32, "68349", 1 }, + { cpu32, "68360", 1 }, + { m68881, "68882", 1 }, + { mcf5200, "5202", 1 }, + { mcf5200, "5204", 1 }, + { mcf5200, "5206", 1 }, + { mcf5407|mcfmac, "cfv4", 1 }, }; static const int n_archs = sizeof (archs) / sizeof (archs[0]); @@ -1505,6 +1505,14 @@ m68k_ip (instring) ++losing; break; + case '4': + if (opP->mode != AINDR && opP->mode != AINC && opP->mode != ADEC + && (opP->mode != DISP + || opP->reg < ADDR0 + || opP->reg > ADDR7)) + ++losing; + break; + case 'B': /* FOO */ if (opP->mode != ABSL || (flag_long_jumps @@ -1552,6 +1560,12 @@ m68k_ip (instring) losing++; break; + case 'e': + if (opP->reg != ACC && opP->reg != ACC1 + && opP->reg != ACC2 && opP->reg != ACC3) + losing++; + break; + case 'F': if (opP->mode != FPREG) losing++; @@ -1562,6 +1576,11 @@ m68k_ip (instring) losing++; break; + case 'g': + if (opP->reg != ACCEXT01 && opP->reg != ACCEXT23) + losing++; + break; + case 'H': if (opP->reg != MASK) losing++; @@ -1574,6 +1593,11 @@ m68k_ip (instring) losing++; break; + case 'i': + if (opP->mode != LSH && opP->mode != RSH) + losing++; + break; + case 'J': if (opP->mode != CONTROL || opP->reg < USP @@ -1994,6 +2018,7 @@ m68k_ip (instring) case 'w': case 'y': case 'z': + case '4': #ifndef NO_68851 case '|': #endif @@ -2519,6 +2544,16 @@ m68k_ip (instring) as_bad (_("unknown/incorrect operand")); /* abort (); */ } + + /* If s[0] is '4', then this is for the mac instructions + that can have a trailing_ampersand set. If so, set 0x100 + bit on tmpreg so install_gen_operand can check for it and + set the appropriate bit (word2, bit 5). */ + if (s[0] == '4') + { + if (opP->trailing_ampersand) + tmpreg |= 0x100; + } install_gen_operand (s[1], tmpreg); break; @@ -2737,6 +2772,10 @@ m68k_ip (instring) install_operand (s[1], opP->reg - DATA); break; + case 'e': /* EMAC ACCx, reg/reg. */ + install_operand (s[1], opP->reg - ACC); + break; + case 'E': /* Ignore it. */ break; @@ -2744,6 +2783,10 @@ m68k_ip (instring) install_operand (s[1], opP->reg - FP0); break; + case 'g': /* EMAC ACCEXTx. */ + install_operand (s[1], opP->reg - ACCEXT01); + break; + case 'G': /* Ignore it. */ case 'H': break; @@ -2753,6 +2796,10 @@ m68k_ip (instring) install_operand (s[1], tmpreg); break; + case 'i': /* MAC/EMAC scale factor. */ + install_operand (s[1], opP->mode == LSH ? 0x1 : 0x3); + break; + case 'J': /* JF foo. */ switch (opP->reg) { @@ -3286,25 +3333,46 @@ install_operand (mode, val) the_ins.opcode[0] |= ((val & 0x7) << 9); the_ins.opcode[1] |= ((val & 0x10) << (7 - 4)); break; - case 'n': + case 'n': /* MAC/EMAC Rx on !load. */ the_ins.opcode[0] |= ((val & 0x8) << (6 - 3)); the_ins.opcode[0] |= ((val & 0x7) << 9); + the_ins.opcode[1] |= ((val & 0x10) << (7 - 4)); break; - case 'o': + case 'o': /* MAC/EMAC Rx on load. */ the_ins.opcode[1] |= val << 12; the_ins.opcode[1] |= ((val & 0x10) << (7 - 4)); break; - case 'M': + case 'M': /* MAC/EMAC Ry on !load. */ the_ins.opcode[0] |= (val & 0xF); the_ins.opcode[1] |= ((val & 0x10) << (6 - 4)); break; - case 'N': + case 'N': /* MAC/EMAC Ry on load. */ the_ins.opcode[1] |= (val & 0xF); the_ins.opcode[1] |= ((val & 0x10) << (6 - 4)); break; case 'h': the_ins.opcode[1] |= ((val != 1) << 10); break; + case 'F': + the_ins.opcode[0] |= ((val & 0x3) << 9); + break; + case 'f': + the_ins.opcode[0] |= ((val & 0x3) << 0); + break; + case 'G': + the_ins.opcode[0] |= ((~val & 0x1) << 7); + the_ins.opcode[1] |= ((val & 0x2) << (4 - 1)); + break; + case 'H': + the_ins.opcode[0] |= ((val & 0x1) << 7); + the_ins.opcode[1] |= ((val & 0x2) << (4 - 1)); + break; + case 'I': + the_ins.opcode[1] |= ((val & 0x3) << 9); + break; + case ']': + the_ins.opcode[0] |= (val & 0x1) <<10; + break; case 'c': default: as_fatal (_("failed sanity check.")); @@ -3318,6 +3386,11 @@ install_gen_operand (mode, val) { switch (mode) { + case '/': /* Special for mask loads for mac/msac insns with + possible mask; trailing_ampersend set in bit 8. */ + the_ins.opcode[0] |= (val & 0x3f); + the_ins.opcode[1] |= (((val & 0x100) >> 8) << 5); + break; case 's': the_ins.opcode[0] |= val; break; @@ -3507,6 +3580,12 @@ static const struct init_entry init_table[] = { "cc", CCR }, { "acc", ACC }, + { "acc0", ACC }, + { "acc1", ACC1 }, + { "acc2", ACC2 }, + { "acc3", ACC3 }, + { "accext01", ACCEXT01 }, + { "accext23", ACCEXT23 }, { "macsr", MACSR }, { "mask", MASK }, diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index beaa11a5aaf..6f0db0912ff 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -111,9 +111,7 @@ static char *mips_regmask_frag; extern int target_big_endian; /* The name of the readonly data section. */ -#define RDATA_SECTION_NAME (OUTPUT_FLAVOR == bfd_target_aout_flavour \ - ? ".data" \ - : OUTPUT_FLAVOR == bfd_target_ecoff_flavour \ +#define RDATA_SECTION_NAME (OUTPUT_FLAVOR == bfd_target_ecoff_flavour \ ? ".rdata" \ : OUTPUT_FLAVOR == bfd_target_coff_flavour \ ? ".rdata" \ @@ -281,13 +279,11 @@ static int mips_32bitmode = 0; #define HAVE_64BIT_OBJECTS (mips_abi == N64_ABI) -/* We can only have 64bit addresses if the object file format - supports it. */ +/* We can only have 64bit addresses if the object file format supports it. */ #define HAVE_32BIT_ADDRESSES \ (HAVE_32BIT_GPRS \ - || ((bfd_arch_bits_per_address (stdoutput) == 32 \ - || ! HAVE_64BIT_OBJECTS) \ - && mips_pic != EMBEDDED_PIC)) + || (bfd_arch_bits_per_address (stdoutput) == 32 \ + || ! HAVE_64BIT_OBJECTS)) \ #define HAVE_64BIT_ADDRESSES (! HAVE_32BIT_ADDRESSES) @@ -346,7 +342,6 @@ static int mips_32bitmode = 0; || mips_opts.arch == CPU_R10000 \ || mips_opts.arch == CPU_R12000 \ || mips_opts.arch == CPU_RM7000 \ - || mips_opts.arch == CPU_SB1 \ || mips_opts.arch == CPU_VR5500 \ ) @@ -357,8 +352,6 @@ static int mips_32bitmode = 0; level I. */ #define gpr_interlocks \ (mips_opts.isa != ISA_MIPS1 \ - || mips_opts.arch == CPU_VR5400 \ - || mips_opts.arch == CPU_VR5500 \ || mips_opts.arch == CPU_R3900) /* Whether the processor uses hardware interlocks to avoid delays @@ -374,9 +367,6 @@ static int mips_32bitmode = 0; && mips_opts.isa != ISA_MIPS2 \ && mips_opts.isa != ISA_MIPS3) \ || mips_opts.arch == CPU_R4300 \ - || mips_opts.arch == CPU_VR5400 \ - || mips_opts.arch == CPU_VR5500 \ - || mips_opts.arch == CPU_SB1 \ ) /* Whether the processor uses hardware interlocks to protect reads @@ -622,7 +612,7 @@ static const unsigned int mips16_to_32_reg_map[] = 16, 17, 2, 3, 4, 5, 6, 7 }; -static int mips_fix_4122_bugs; +static int mips_fix_vr4120; /* We don't relax branches by default, since this causes us to expand `la .l2 - .l1' if there's a branch between .l1 and .l2, because we @@ -1089,8 +1079,6 @@ mips_target_format (void) { switch (OUTPUT_FLAVOR) { - case bfd_target_aout_flavour: - return target_big_endian ? "a.out-mips-big" : "a.out-mips-little"; case bfd_target_ecoff_flavour: return target_big_endian ? "ecoff-bigmips" : ECOFF_LITTLE_FORMAT; case bfd_target_coff_flavour: @@ -1247,8 +1235,7 @@ md_begin (void) /* set the default alignment for the text section (2**2) */ record_alignment (text_section, 2); - if (USE_GLOBAL_POINTER_OPT) - bfd_set_gp_size (stdoutput, g_switch_value); + bfd_set_gp_size (stdoutput, g_switch_value); if (OUTPUT_FLAVOR == bfd_target_elf_flavour) { @@ -1863,11 +1850,11 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr, if (prev_prev_nop && nops == 0) ++nops; - if (mips_fix_4122_bugs && prev_insn.insn_mo->name) + if (mips_fix_vr4120 && prev_insn.insn_mo->name) { /* We're out of bits in pinfo, so we must resort to string ops here. Shortcuts are selected based on opcodes being - limited to the VR4122 instruction set. */ + limited to the VR4120 instruction set. */ int min_nops = 0; const char *pn = prev_insn.insn_mo->name; const char *tn = ip->insn_mo->name; @@ -2494,11 +2481,6 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr, || (mips_opts.mips16 && (pinfo & MIPS16_INSN_WRITE_31) && insn_uses_reg (&prev_insn, RA, MIPS_GR_REG)) - /* If we are generating embedded PIC code, the branch - might be expanded into a sequence which uses $at, so - we can't swap with an instruction which reads it. */ - || (mips_pic == EMBEDDED_PIC - && insn_uses_reg (&prev_insn, AT, MIPS_GR_REG)) /* If the previous previous instruction has a load delay, and sets a register that the branch reads, we can not swap. */ @@ -2841,7 +2823,7 @@ mips_emit_delays (bfd_boolean insns) ++nops; } - if (mips_fix_4122_bugs && prev_insn.insn_mo->name) + if (mips_fix_vr4120 && prev_insn.insn_mo->name) { int min_nops = 0; const char *pn = prev_insn.insn_mo->name; @@ -3143,9 +3125,7 @@ macro_build (expressionS *ep, const char *name, const char *fmt, ...) || *r == BFD_RELOC_MIPS_GOT_PAGE || *r == BFD_RELOC_MIPS_GOT_OFST || *r == BFD_RELOC_MIPS_GOT_LO16 - || *r == BFD_RELOC_MIPS_CALL_LO16 - || (ep->X_op == O_subtract - && *r == BFD_RELOC_PCREL_LO16)); + || *r == BFD_RELOC_MIPS_CALL_LO16); continue; case 'u': @@ -3158,9 +3138,7 @@ macro_build (expressionS *ep, const char *name, const char *fmt, ...) || *r == BFD_RELOC_HI16 || *r == BFD_RELOC_GPREL16 || *r == BFD_RELOC_MIPS_GOT_HI16 - || *r == BFD_RELOC_MIPS_CALL_HI16)) - || (ep->X_op == O_subtract - && *r == BFD_RELOC_PCREL_HI16_S))); + || *r == BFD_RELOC_MIPS_CALL_HI16)))); continue; case 'p': @@ -3789,6 +3767,13 @@ load_register (int reg, expressionS *ep, int dbl) macro_build (&lo32, "ori", "t,r,i", reg, freg, BFD_RELOC_LO16); } +static inline void +load_delay_nop (void) +{ + if (!gpr_interlocks) + macro_build (NULL, "nop", ""); +} + /* Load an address into a register. */ static void @@ -3922,7 +3907,7 @@ load_address (int reg, expressionS *ep, int *used_at) ep->X_add_number = 0; macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", reg, BFD_RELOC_MIPS_GOT16, mips_gp_register); - macro_build (NULL, "nop", ""); + load_delay_nop (); relax_start (ep->X_add_symbol); relax_switch (); macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", reg, reg, @@ -4007,7 +3992,7 @@ load_address (int reg, expressionS *ep, int *used_at) } macro_build (ep, ADDRESS_LOAD_INSN, "t,o(b)", reg, BFD_RELOC_MIPS_GOT16, mips_gp_register); - macro_build (NULL, "nop", ""); + load_delay_nop (); macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", reg, reg, BFD_RELOC_LO16); relax_end (); @@ -4022,14 +4007,6 @@ load_address (int reg, expressionS *ep, int *used_at) } } } - else if (mips_pic == EMBEDDED_PIC) - { - /* We always do - addiu $reg,$gp,<sym> (BFD_RELOC_GPREL16) - */ - macro_build (ep, ADDRESS_ADDI_INSN, "t,r,j", - reg, mips_gp_register, BFD_RELOC_GPREL16); - } else abort (); } @@ -4888,50 +4865,6 @@ macro (struct mips_cl_insn *ip) used_at = 0; } - /* When generating embedded PIC code, we permit expressions of - the form - la $treg,foo-bar - la $treg,foo-bar($breg) - where bar is an address in the current section. These are used - when getting the addresses of functions. We don't permit - X_add_number to be non-zero, because if the symbol is - external the relaxing code needs to know that any addend is - purely the offset to X_op_symbol. */ - if (mips_pic == EMBEDDED_PIC - && offset_expr.X_op == O_subtract - && (symbol_constant_p (offset_expr.X_op_symbol) - ? S_GET_SEGMENT (offset_expr.X_op_symbol) == now_seg - : (symbol_equated_p (offset_expr.X_op_symbol) - && (S_GET_SEGMENT - (symbol_get_value_expression (offset_expr.X_op_symbol) - ->X_add_symbol) - == now_seg))) - && (offset_expr.X_add_number == 0 - || OUTPUT_FLAVOR == bfd_target_elf_flavour)) - { - if (breg == 0) - { - tempreg = treg; - used_at = 0; - macro_build (&offset_expr, "lui", "t,u", - tempreg, BFD_RELOC_PCREL_HI16_S); - } - else - { - macro_build (&offset_expr, "lui", "t,u", - tempreg, BFD_RELOC_PCREL_HI16_S); - macro_build (NULL, - (dbl || HAVE_64BIT_ADDRESSES) ? "daddu" : "addu", - "d,v,t", tempreg, tempreg, breg); - } - macro_build (&offset_expr, - (dbl || HAVE_64BIT_ADDRESSES) ? "daddiu" : "addiu", - "t,r,j", treg, tempreg, BFD_RELOC_PCREL_LO16); - if (! used_at) - return; - break; - } - if (offset_expr.X_op != O_symbol && offset_expr.X_op != O_constant) { @@ -4941,7 +4874,7 @@ macro (struct mips_cl_insn *ip) if (offset_expr.X_op == O_constant) load_register (tempreg, &offset_expr, - ((mips_pic == EMBEDDED_PIC || mips_pic == NO_PIC) + (mips_pic == NO_PIC ? (dbl || HAVE_64BIT_ADDRESSES) : HAVE_64BIT_ADDRESSES)); else if (mips_pic == NO_PIC) @@ -5069,12 +5002,12 @@ macro (struct mips_cl_insn *ip) /* We're going to put in an addu instruction using tempreg, so we may as well insert the nop right now. */ - macro_build (NULL, "nop", ""); + load_delay_nop (); } relax_switch (); macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, BFD_RELOC_MIPS_GOT16, mips_gp_register); - macro_build (NULL, "nop", ""); + load_delay_nop (); macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", tempreg, tempreg, BFD_RELOC_LO16); relax_end (); @@ -5086,7 +5019,7 @@ macro (struct mips_cl_insn *ip) && offset_expr.X_add_number < 0x8000) { load_got_offset (tempreg, &offset_expr); - macro_build (NULL, "nop", ""); + load_delay_nop (); add_got_offset (tempreg, &offset_expr); } else @@ -5105,7 +5038,7 @@ macro (struct mips_cl_insn *ip) not using a base register. */ if (breg == treg) { - macro_build (NULL, "nop", ""); + load_delay_nop (); macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", treg, AT, breg); breg = 0; @@ -5288,13 +5221,13 @@ macro (struct mips_cl_insn *ip) /* We're going to put in an addu instruction using tempreg, so we may as well insert the nop right now. */ - macro_build (NULL, "nop", ""); + load_delay_nop (); } } else if (expr1.X_add_number >= -0x8000 && expr1.X_add_number < 0x8000) { - macro_build (NULL, "nop", ""); + load_delay_nop (); macro_build (&expr1, ADDRESS_ADDI_INSN, "t,r,j", tempreg, tempreg, BFD_RELOC_LO16); } @@ -5314,7 +5247,7 @@ macro (struct mips_cl_insn *ip) else { assert (tempreg == AT); - macro_build (NULL, "nop", ""); + load_delay_nop (); macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", treg, AT, breg); dreg = treg; @@ -5341,7 +5274,7 @@ macro (struct mips_cl_insn *ip) if (expr1.X_add_number >= -0x8000 && expr1.X_add_number < 0x8000) { - macro_build (NULL, "nop", ""); + load_delay_nop (); macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", tempreg, tempreg, BFD_RELOC_LO16); /* FIXME: If add_number is 0, and there was no base @@ -5357,7 +5290,7 @@ macro (struct mips_cl_insn *ip) /* We must add in the base register now, as in the external symbol case. */ assert (tempreg == AT); - macro_build (NULL, "nop", ""); + load_delay_nop (); macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", treg, AT, breg); tempreg = treg; @@ -5481,14 +5414,6 @@ macro (struct mips_cl_insn *ip) } relax_end (); } - else if (mips_pic == EMBEDDED_PIC) - { - /* We use - addiu $tempreg,$gp,<sym> (BFD_RELOC_GPREL16) - */ - macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", tempreg, - mips_gp_register, BFD_RELOC_GPREL16); - } else abort (); @@ -5496,7 +5421,7 @@ macro (struct mips_cl_insn *ip) { char *s; - if (mips_pic == EMBEDDED_PIC || mips_pic == NO_PIC) + if (mips_pic == NO_PIC) s = (dbl || HAVE_64BIT_ADDRESSES) ? "daddu" : "addu"; else s = ADDRESS_ADD_INSN; @@ -5526,8 +5451,7 @@ macro (struct mips_cl_insn *ip) dreg = RA; /* Fall through. */ case M_JAL_2: - if (mips_pic == NO_PIC - || mips_pic == EMBEDDED_PIC) + if (mips_pic == NO_PIC) macro_build (NULL, "jalr", "d,s", dreg, sreg); else if (mips_pic == SVR4_PIC) { @@ -5643,7 +5567,7 @@ macro (struct mips_cl_insn *ip) macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", PIC_CALL_REG, BFD_RELOC_MIPS_CALL16, mips_gp_register); - macro_build (NULL, "nop", ""); + load_delay_nop (); relax_switch (); } else @@ -5658,7 +5582,7 @@ macro (struct mips_cl_insn *ip) macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", PIC_CALL_REG, BFD_RELOC_MIPS_CALL_LO16, PIC_CALL_REG); - macro_build (NULL, "nop", ""); + load_delay_nop (); relax_switch (); if (gpdelay) macro_build (NULL, "nop", ""); @@ -5666,7 +5590,7 @@ macro (struct mips_cl_insn *ip) macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", PIC_CALL_REG, BFD_RELOC_MIPS_GOT16, mips_gp_register); - macro_build (NULL, "nop", ""); + load_delay_nop (); macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", PIC_CALL_REG, PIC_CALL_REG, BFD_RELOC_LO16); relax_end (); @@ -5698,13 +5622,6 @@ macro (struct mips_cl_insn *ip) } } } - else if (mips_pic == EMBEDDED_PIC) - { - macro_build (&offset_expr, "bal", "p"); - /* The linker may expand the call to a longer sequence which - uses $at, so we must break rather than return. */ - break; - } else abort (); @@ -5900,46 +5817,6 @@ macro (struct mips_cl_insn *ip) ^ 0x80000000) - 0x80000000); } - /* For embedded PIC, we allow loads where the offset is calculated - by subtracting a symbol in the current segment from an unknown - symbol, relative to a base register, e.g.: - <op> $treg, <sym>-<localsym>($breg) - This is used by the compiler for switch statements. */ - if (mips_pic == EMBEDDED_PIC - && offset_expr.X_op == O_subtract - && (symbol_constant_p (offset_expr.X_op_symbol) - ? S_GET_SEGMENT (offset_expr.X_op_symbol) == now_seg - : (symbol_equated_p (offset_expr.X_op_symbol) - && (S_GET_SEGMENT - (symbol_get_value_expression (offset_expr.X_op_symbol) - ->X_add_symbol) - == now_seg))) - && breg != 0 - && (offset_expr.X_add_number == 0 - || OUTPUT_FLAVOR == bfd_target_elf_flavour)) - { - /* For this case, we output the instructions: - lui $tempreg,<sym> (BFD_RELOC_PCREL_HI16_S) - addiu $tempreg,$tempreg,$breg - <op> $treg,<sym>($tempreg) (BFD_RELOC_PCREL_LO16) - If the relocation would fit entirely in 16 bits, it would be - nice to emit: - <op> $treg,<sym>($breg) (BFD_RELOC_PCREL_LO16) - instead, but that seems quite difficult. */ - macro_build (&offset_expr, "lui", "t,u", tempreg, - BFD_RELOC_PCREL_HI16_S); - macro_build (NULL, - ((bfd_arch_bits_per_address (stdoutput) == 32 - || ! ISA_HAS_64BIT_REGS (mips_opts.isa)) - ? "addu" : "daddu"), - "d,v,t", tempreg, tempreg, breg); - macro_build (&offset_expr, s, fmt, treg, - BFD_RELOC_PCREL_LO16, tempreg); - if (! used_at) - return; - break; - } - if (offset_expr.X_op != O_constant && offset_expr.X_op != O_symbol) { @@ -6166,7 +6043,7 @@ macro (struct mips_cl_insn *ip) as_bad (_("PIC code offset overflow (max 16 signed bits)")); macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, lw_reloc_type, mips_gp_register); - macro_build (NULL, "nop", ""); + load_delay_nop (); relax_start (offset_expr.X_add_symbol); relax_switch (); macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", tempreg, @@ -6216,7 +6093,7 @@ macro (struct mips_cl_insn *ip) macro_build (NULL, "nop", ""); macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", tempreg, BFD_RELOC_MIPS_GOT16, mips_gp_register); - macro_build (NULL, "nop", ""); + load_delay_nop (); macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", tempreg, tempreg, BFD_RELOC_LO16); relax_end (); @@ -6265,29 +6142,6 @@ macro (struct mips_cl_insn *ip) BFD_RELOC_MIPS_GOT_OFST, tempreg); relax_end (); } - else if (mips_pic == EMBEDDED_PIC) - { - /* If there is no base register, we want - <op> $treg,<sym>($gp) (BFD_RELOC_GPREL16) - If there is a base register, we want - addu $tempreg,$breg,$gp - <op> $treg,<sym>($tempreg) (BFD_RELOC_GPREL16) - */ - assert (offset_expr.X_op == O_symbol); - if (breg == 0) - { - macro_build (&offset_expr, s, fmt, treg, BFD_RELOC_GPREL16, - mips_gp_register); - used_at = 0; - } - else - { - macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", - tempreg, breg, mips_gp_register); - macro_build (&offset_expr, s, fmt, treg, - BFD_RELOC_GPREL16, tempreg); - } - } else abort (); @@ -6375,15 +6229,6 @@ macro (struct mips_cl_insn *ip) macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", AT, BFD_RELOC_MIPS_GOT16, mips_gp_register); } - else if (mips_pic == EMBEDDED_PIC) - { - /* For embedded PIC we pick up the entire address off $gp in - a single instruction. */ - macro_build (&offset_expr, ADDRESS_ADDI_INSN, "t,r,j", AT, - mips_gp_register, BFD_RELOC_GPREL16); - offset_expr.X_op = O_constant; - offset_expr.X_add_number = 0; - } else abort (); @@ -6564,11 +6409,6 @@ macro (struct mips_cl_insn *ip) fmt = "t,o(b)"; ldd_std: - /* We do _not_ bother to allow embedded PIC (symbol-local_symbol) - loads for the case of doing a pair of loads to simulate an 'ld'. - This is not currently done by the compiler, and assembly coders - writing embedded-pic code can cope. */ - if (offset_expr.X_op != O_symbol && offset_expr.X_op != O_constant) { @@ -6691,7 +6531,7 @@ macro (struct mips_cl_insn *ip) || expr1.X_add_number >= 0x8000 - 4) as_bad (_("PIC code offset overflow (max 16 signed bits)")); load_got_offset (AT, &offset_expr); - macro_build (NULL, "nop", ""); + load_delay_nop (); if (breg != 0) macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, breg, AT); @@ -6750,7 +6590,7 @@ macro (struct mips_cl_insn *ip) AT, AT, mips_gp_register); macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", AT, BFD_RELOC_MIPS_GOT_LO16, AT); - macro_build (NULL, "nop", ""); + load_delay_nop (); if (breg != 0) macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, breg, AT); /* Itbl support may require additional care here. */ @@ -6774,7 +6614,7 @@ macro (struct mips_cl_insn *ip) macro_build (NULL, "nop", ""); macro_build (&offset_expr, ADDRESS_LOAD_INSN, "t,o(b)", AT, BFD_RELOC_MIPS_GOT16, mips_gp_register); - macro_build (NULL, "nop", ""); + load_delay_nop (); if (breg != 0) macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", AT, breg, AT); /* Itbl support may require additional care here. */ @@ -6792,37 +6632,6 @@ macro (struct mips_cl_insn *ip) mips_optimize = hold_mips_optimize; relax_end (); } - else if (mips_pic == EMBEDDED_PIC) - { - /* If there is no base register, we use - <op> $treg,<sym>($gp) (BFD_RELOC_GPREL16) - <op> $treg+1,<sym>+4($gp) (BFD_RELOC_GPREL16) - If we have a base register, we use - addu $at,$breg,$gp - <op> $treg,<sym>($at) (BFD_RELOC_GPREL16) - <op> $treg+1,<sym>+4($at) (BFD_RELOC_GPREL16) - */ - if (breg == 0) - { - tempreg = mips_gp_register; - used_at = 0; - } - else - { - macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", - AT, breg, mips_gp_register); - tempreg = AT; - used_at = 1; - } - - /* Itbl support may require additional care here. */ - macro_build (&offset_expr, s, fmt, coproc ? treg + 1 : treg, - BFD_RELOC_GPREL16, tempreg); - offset_expr.X_add_number += 4; - /* Itbl support may require additional care here. */ - macro_build (&offset_expr, s, fmt, coproc ? treg : treg + 1, - BFD_RELOC_GPREL16, tempreg); - } else abort (); @@ -7553,8 +7362,7 @@ macro2 (struct mips_cl_insn *ip) if (treg == tempreg) return; /* Protect second load's delay slot. */ - if (!gpr_interlocks) - macro_build (NULL, "nop", ""); + load_delay_nop (); move_register (treg, tempreg); break; @@ -8862,13 +8670,6 @@ do_msbd: The .lit4 and .lit8 sections are only used if permitted by the -G argument. - When generating embedded PIC code, we use the - .lit8 section but not the .lit4 section (we can do - .lit4 inline easily; we need to put .lit8 - somewhere in the data segment, and using .lit8 - permits the linker to eventually combine identical - .lit8 entries). - The code below needs to know whether the target register is 32 or 64 bits wide. It relies on the fact 'f' and 'F' are used with GPR-based instructions and 'l' and @@ -8894,9 +8695,7 @@ do_msbd: if (*args == 'f' || (*args == 'l' - && (! USE_GLOBAL_POINTER_OPT - || mips_pic == EMBEDDED_PIC - || g_switch_value < 4 + && (g_switch_value < 4 || (temp[0] == 0 && temp[1] == 0) || (temp[2] == 0 && temp[3] == 0)))) { @@ -8983,19 +8782,14 @@ do_msbd: default: /* unused default case avoids warnings. */ case 'L': newname = RDATA_SECTION_NAME; - if ((USE_GLOBAL_POINTER_OPT && g_switch_value >= 8) - || mips_pic == EMBEDDED_PIC) + if (g_switch_value >= 8) newname = ".lit8"; break; case 'F': - if (mips_pic == EMBEDDED_PIC) - newname = ".lit8"; - else - newname = RDATA_SECTION_NAME; + newname = RDATA_SECTION_NAME; break; case 'l': - assert (!USE_GLOBAL_POINTER_OPT - || g_switch_value >= 4); + assert (g_switch_value >= 4); newname = ".lit4"; break; } @@ -10254,45 +10048,43 @@ struct option md_longopts[] = #define OPTION_MNO_7000_HILO_FIX (OPTION_FIX_BASE + 1) {"no-fix-7000", no_argument, NULL, OPTION_MNO_7000_HILO_FIX}, {"mno-fix7000", no_argument, NULL, OPTION_MNO_7000_HILO_FIX}, -#define OPTION_FIX_VR4122 (OPTION_FIX_BASE + 2) -#define OPTION_NO_FIX_VR4122 (OPTION_FIX_BASE + 3) - {"mfix-vr4122-bugs", no_argument, NULL, OPTION_FIX_VR4122}, - {"no-mfix-vr4122-bugs", no_argument, NULL, OPTION_NO_FIX_VR4122}, +#define OPTION_FIX_VR4120 (OPTION_FIX_BASE + 2) +#define OPTION_NO_FIX_VR4120 (OPTION_FIX_BASE + 3) + {"mfix-vr4120", no_argument, NULL, OPTION_FIX_VR4120}, + {"mno-fix-vr4120", no_argument, NULL, OPTION_NO_FIX_VR4120}, /* Miscellaneous options. */ #define OPTION_MISC_BASE (OPTION_FIX_BASE + 4) -#define OPTION_MEMBEDDED_PIC (OPTION_MISC_BASE + 0) - {"membedded-pic", no_argument, NULL, OPTION_MEMBEDDED_PIC}, -#define OPTION_TRAP (OPTION_MISC_BASE + 1) +#define OPTION_TRAP (OPTION_MISC_BASE + 0) {"trap", no_argument, NULL, OPTION_TRAP}, {"no-break", no_argument, NULL, OPTION_TRAP}, -#define OPTION_BREAK (OPTION_MISC_BASE + 2) +#define OPTION_BREAK (OPTION_MISC_BASE + 1) {"break", no_argument, NULL, OPTION_BREAK}, {"no-trap", no_argument, NULL, OPTION_BREAK}, -#define OPTION_EB (OPTION_MISC_BASE + 3) +#define OPTION_EB (OPTION_MISC_BASE + 2) {"EB", no_argument, NULL, OPTION_EB}, -#define OPTION_EL (OPTION_MISC_BASE + 4) +#define OPTION_EL (OPTION_MISC_BASE + 3) {"EL", no_argument, NULL, OPTION_EL}, -#define OPTION_FP32 (OPTION_MISC_BASE + 5) +#define OPTION_FP32 (OPTION_MISC_BASE + 4) {"mfp32", no_argument, NULL, OPTION_FP32}, -#define OPTION_GP32 (OPTION_MISC_BASE + 6) +#define OPTION_GP32 (OPTION_MISC_BASE + 5) {"mgp32", no_argument, NULL, OPTION_GP32}, -#define OPTION_CONSTRUCT_FLOATS (OPTION_MISC_BASE + 7) +#define OPTION_CONSTRUCT_FLOATS (OPTION_MISC_BASE + 6) {"construct-floats", no_argument, NULL, OPTION_CONSTRUCT_FLOATS}, -#define OPTION_NO_CONSTRUCT_FLOATS (OPTION_MISC_BASE + 8) +#define OPTION_NO_CONSTRUCT_FLOATS (OPTION_MISC_BASE + 7) {"no-construct-floats", no_argument, NULL, OPTION_NO_CONSTRUCT_FLOATS}, -#define OPTION_FP64 (OPTION_MISC_BASE + 9) +#define OPTION_FP64 (OPTION_MISC_BASE + 8) {"mfp64", no_argument, NULL, OPTION_FP64}, -#define OPTION_GP64 (OPTION_MISC_BASE + 10) +#define OPTION_GP64 (OPTION_MISC_BASE + 9) {"mgp64", no_argument, NULL, OPTION_GP64}, -#define OPTION_RELAX_BRANCH (OPTION_MISC_BASE + 11) -#define OPTION_NO_RELAX_BRANCH (OPTION_MISC_BASE + 12) +#define OPTION_RELAX_BRANCH (OPTION_MISC_BASE + 10) +#define OPTION_NO_RELAX_BRANCH (OPTION_MISC_BASE + 11) {"relax-branch", no_argument, NULL, OPTION_RELAX_BRANCH}, {"no-relax-branch", no_argument, NULL, OPTION_NO_RELAX_BRANCH}, /* ELF-specific options. */ #ifdef OBJ_ELF -#define OPTION_ELF_BASE (OPTION_MISC_BASE + 13) +#define OPTION_ELF_BASE (OPTION_MISC_BASE + 12) #define OPTION_CALL_SHARED (OPTION_ELF_BASE + 0) {"KPIC", no_argument, NULL, OPTION_CALL_SHARED}, {"call_shared", no_argument, NULL, OPTION_CALL_SHARED}, @@ -10489,22 +10281,12 @@ md_parse_option (int c, char *arg) mips_opts.ase_mips3d = 0; break; - case OPTION_MEMBEDDED_PIC: - mips_pic = EMBEDDED_PIC; - if (USE_GLOBAL_POINTER_OPT && g_switch_seen) - { - as_bad (_("-G may not be used with embedded PIC code")); - return 0; - } - g_switch_value = 0x7fffffff; + case OPTION_FIX_VR4120: + mips_fix_vr4120 = 1; break; - case OPTION_FIX_VR4122: - mips_fix_4122_bugs = 1; - break; - - case OPTION_NO_FIX_VR4122: - mips_fix_4122_bugs = 0; + case OPTION_NO_FIX_VR4120: + mips_fix_vr4120 = 0; break; case OPTION_RELAX_BRANCH: @@ -10554,14 +10336,9 @@ md_parse_option (int c, char *arg) #endif /* OBJ_ELF */ case 'G': - if (! USE_GLOBAL_POINTER_OPT) - { - as_bad (_("-G is not supported for this configuration")); - return 0; - } - else if (mips_pic == SVR4_PIC || mips_pic == EMBEDDED_PIC) + if (mips_pic == SVR4_PIC) { - as_bad (_("-G may not be used with SVR4 or embedded PIC code")); + as_bad (_("-G may not be used with SVR4 PIC code")); return 0; } else @@ -10962,24 +10739,7 @@ mips_frob_file (void) } } -/* When generating embedded PIC code we need to use a special - relocation to represent the difference of two symbols in the .text - section (switch tables use a difference of this sort). See - include/coff/mips.h for details. This macro checks whether this - fixup requires the special reloc. */ -#define SWITCH_TABLE(fixp) \ - ((fixp)->fx_r_type == BFD_RELOC_32 \ - && OUTPUT_FLAVOR != bfd_target_elf_flavour \ - && (fixp)->fx_addsy != NULL \ - && (fixp)->fx_subsy != NULL \ - && S_GET_SEGMENT ((fixp)->fx_addsy) == text_section \ - && S_GET_SEGMENT ((fixp)->fx_subsy) == text_section) - -/* When generating embedded PIC code we must keep all PC relative - relocations, in case the linker has to relax a call. We also need - to keep relocations for switch table entries. - - We may have combined relocations without symbols in the N32/N64 ABI. +/* We may have combined relocations without symbols in the N32/N64 ABI. We have to prevent gas from dropping them. */ int @@ -10995,11 +10755,7 @@ mips_force_relocation (fixS *fixp) || fixp->fx_r_type == BFD_RELOC_LO16)) return 1; - return (mips_pic == EMBEDDED_PIC - && (fixp->fx_pcrel - || SWITCH_TABLE (fixp) - || fixp->fx_r_type == BFD_RELOC_PCREL_HI16_S - || fixp->fx_r_type == BFD_RELOC_PCREL_LO16)); + return 0; } /* This hook is called before a fix is simplified. We don't really @@ -11039,9 +10795,8 @@ mips_validate_fix (struct fix *fixP, asection *seg) whole function). */ if (fixP->fx_r_type == BFD_RELOC_16_PCREL_S2 - && (((OUTPUT_FLAVOR == bfd_target_ecoff_flavour - || OUTPUT_FLAVOR == bfd_target_elf_flavour) - && mips_pic != EMBEDDED_PIC) + && ((OUTPUT_FLAVOR == bfd_target_ecoff_flavour + || OUTPUT_FLAVOR == bfd_target_elf_flavour) || bfd_reloc_type_lookup (stdoutput, BFD_RELOC_16_PCREL_S2) == NULL) && fixP->fx_addsy) { @@ -11106,7 +10861,8 @@ md_apply_fix3 (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) buf = (bfd_byte *) (fixP->fx_frag->fr_literal + fixP->fx_where); /* We are not done if this is a composite relocation to set up gp. */ - if (fixP->fx_addsy == NULL && ! fixP->fx_pcrel + assert (! fixP->fx_pcrel); + if (fixP->fx_addsy == NULL && !(fixP->fx_r_type == BFD_RELOC_MIPS_SUB || (fixP->fx_r_type == BFD_RELOC_64 && (previous_fx_r_type == BFD_RELOC_GPREL32 @@ -11147,9 +10903,7 @@ md_apply_fix3 (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) case BFD_RELOC_MIPS_CALL_HI16: case BFD_RELOC_MIPS_CALL_LO16: case BFD_RELOC_MIPS16_GPREL: - if (fixP->fx_pcrel) - as_bad_where (fixP->fx_file, fixP->fx_line, - _("Invalid PC relative reloc")); + assert (! fixP->fx_pcrel); /* Nothing needed to do. The value comes from the reloc entry */ break; @@ -11160,44 +10914,10 @@ md_apply_fix3 (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) *valP = 0; break; - case BFD_RELOC_PCREL_HI16_S: - /* The addend for this is tricky if it is internal, so we just - do everything here rather than in bfd_install_relocation. */ - if (OUTPUT_FLAVOR == bfd_target_elf_flavour && !fixP->fx_done) - break; - if (fixP->fx_addsy - && (symbol_get_bfdsym (fixP->fx_addsy)->flags & BSF_SECTION_SYM) == 0) - { - /* For an external symbol adjust by the address to make it - pcrel_offset. We use the address of the RELLO reloc - which follows this one. */ - *valP += (fixP->fx_next->fx_frag->fr_address - + fixP->fx_next->fx_where); - } - *valP = ((*valP + 0x8000) >> 16) & 0xffff; - if (target_big_endian) - buf += 2; - md_number_to_chars (buf, *valP, 2); - break; - - case BFD_RELOC_PCREL_LO16: - /* The addend for this is tricky if it is internal, so we just - do everything here rather than in bfd_install_relocation. */ - if (OUTPUT_FLAVOR == bfd_target_elf_flavour && !fixP->fx_done) - break; - if (fixP->fx_addsy - && (symbol_get_bfdsym (fixP->fx_addsy)->flags & BSF_SECTION_SYM) == 0) - *valP += fixP->fx_frag->fr_address + fixP->fx_where; - if (target_big_endian) - buf += 2; - md_number_to_chars (buf, *valP, 2); - break; - case BFD_RELOC_64: /* This is handled like BFD_RELOC_32, but we output a sign extended value if we are only 32 bits. */ - if (fixP->fx_done - || (mips_pic == EMBEDDED_PIC && SWITCH_TABLE (fixP))) + if (fixP->fx_done) { if (8 <= sizeof (valueT)) md_number_to_chars (buf, *valP, 8); @@ -11221,11 +10941,8 @@ md_apply_fix3 (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) case BFD_RELOC_32: /* If we are deleting this reloc entry, we must fill in the value now. This can happen if we have a .word which is not - resolved when it appears but is later defined. We also need - to fill in the value if this is an embedded PIC switch table - entry. */ - if (fixP->fx_done - || (mips_pic == EMBEDDED_PIC && SWITCH_TABLE (fixP))) + resolved when it appears but is later defined. */ + if (fixP->fx_done) md_number_to_chars (buf, *valP, 4); break; @@ -11238,6 +10955,8 @@ md_apply_fix3 (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) break; case BFD_RELOC_LO16: + /* FIXME: Now that embedded-PIC is gone, some of this code/comment + may be safe to remove, but if so it's not obvious. */ /* When handling an embedded PIC switch statement, we can wind up deleting a LO16 reloc. See the 'o' case in mips_ip. */ if (fixP->fx_done) @@ -11508,13 +11227,6 @@ s_change_sec (int sec) { segT seg; - /* When generating embedded PIC code, we only use the .text, .lit8, - .sdata and .sbss sections. We change the .data and .rdata - pseudo-ops to use .sdata. */ - if (mips_pic == EMBEDDED_PIC - && (sec == 'd' || sec == 'r')) - sec = 's'; - #ifdef OBJ_ELF /* The ELF backend needs to know that we are changing sections, so that .previous works correctly. We could do something like check @@ -11540,52 +11252,30 @@ s_change_sec (int sec) break; case 'r': - if (USE_GLOBAL_POINTER_OPT) - { - seg = subseg_new (RDATA_SECTION_NAME, - (subsegT) get_absolute_expression ()); - if (OUTPUT_FLAVOR == bfd_target_elf_flavour) - { - bfd_set_section_flags (stdoutput, seg, - (SEC_ALLOC - | SEC_LOAD - | SEC_READONLY - | SEC_RELOC - | SEC_DATA)); - if (strcmp (TARGET_OS, "elf") != 0) - record_alignment (seg, 4); - } - demand_empty_rest_of_line (); - } - else + seg = subseg_new (RDATA_SECTION_NAME, + (subsegT) get_absolute_expression ()); + if (OUTPUT_FLAVOR == bfd_target_elf_flavour) { - as_bad (_("No read only data section in this object file format")); - demand_empty_rest_of_line (); - return; + bfd_set_section_flags (stdoutput, seg, (SEC_ALLOC | SEC_LOAD + | SEC_READONLY | SEC_RELOC + | SEC_DATA)); + if (strcmp (TARGET_OS, "elf") != 0) + record_alignment (seg, 4); } + demand_empty_rest_of_line (); break; case 's': - if (USE_GLOBAL_POINTER_OPT) - { - seg = subseg_new (".sdata", (subsegT) get_absolute_expression ()); - if (OUTPUT_FLAVOR == bfd_target_elf_flavour) - { - bfd_set_section_flags (stdoutput, seg, - SEC_ALLOC | SEC_LOAD | SEC_RELOC - | SEC_DATA); - if (strcmp (TARGET_OS, "elf") != 0) - record_alignment (seg, 4); - } - demand_empty_rest_of_line (); - break; - } - else + seg = subseg_new (".sdata", (subsegT) get_absolute_expression ()); + if (OUTPUT_FLAVOR == bfd_target_elf_flavour) { - as_bad (_("Global pointers not supported; recompile -G 0")); - demand_empty_rest_of_line (); - return; + bfd_set_section_flags (stdoutput, seg, + SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA); + if (strcmp (TARGET_OS, "elf") != 0) + record_alignment (seg, 4); } + demand_empty_rest_of_line (); + break; } auto_align = 1; @@ -11781,7 +11471,7 @@ s_option (int x ATTRIBUTE_UNUSED) else as_bad (_(".option pic%d not supported"), i); - if (USE_GLOBAL_POINTER_OPT && mips_pic == SVR4_PIC) + if (mips_pic == SVR4_PIC) { if (g_switch_seen && g_switch_value != 0) as_warn (_("-G may not be used with SVR4 PIC code")); @@ -11891,34 +11581,11 @@ s_mipsset (int x ATTRIBUTE_UNUSED) /* Permit the user to change the ISA and architecture on the fly. Needless to say, misuse can cause serious problems. */ - if (strcmp (name, "mips0") == 0) + if (strcmp (name, "mips0") == 0 || strcmp (name, "arch=default") == 0) { reset = 1; mips_opts.isa = file_mips_isa; - } - else if (strcmp (name, "mips1") == 0) - mips_opts.isa = ISA_MIPS1; - else if (strcmp (name, "mips2") == 0) - mips_opts.isa = ISA_MIPS2; - else if (strcmp (name, "mips3") == 0) - mips_opts.isa = ISA_MIPS3; - else if (strcmp (name, "mips4") == 0) - mips_opts.isa = ISA_MIPS4; - else if (strcmp (name, "mips5") == 0) - mips_opts.isa = ISA_MIPS5; - else if (strcmp (name, "mips32") == 0) - mips_opts.isa = ISA_MIPS32; - else if (strcmp (name, "mips32r2") == 0) - mips_opts.isa = ISA_MIPS32R2; - else if (strcmp (name, "mips64") == 0) - mips_opts.isa = ISA_MIPS64; - else if (strcmp (name, "mips64r2") == 0) - mips_opts.isa = ISA_MIPS64R2; - else if (strcmp (name, "arch=default") == 0) - { - reset = 1; mips_opts.arch = file_mips_arch; - mips_opts.isa = file_mips_isa; } else if (strncmp (name, "arch=", 5) == 0) { @@ -11933,8 +11600,21 @@ s_mipsset (int x ATTRIBUTE_UNUSED) mips_opts.isa = p->isa; } } + else if (strncmp (name, "mips", 4) == 0) + { + const struct mips_cpu_info *p; + + p = mips_parse_cpu("internal use", name); + if (!p) + as_bad (_("unknown ISA level %s"), name + 4); + else + { + mips_opts.arch = p->cpu; + mips_opts.isa = p->isa; + } + } else - as_bad (_("unknown ISA level %s"), name + 4); + as_bad (_("unknown ISA or architecture %s"), name); switch (mips_opts.isa) { @@ -12022,12 +11702,11 @@ s_abicalls (int ignore ATTRIBUTE_UNUSED) { mips_pic = SVR4_PIC; mips_abicalls = TRUE; - if (USE_GLOBAL_POINTER_OPT) - { - if (g_switch_seen && g_switch_value != 0) - as_warn (_("-G may not be used with SVR4 PIC code")); - g_switch_value = 0; - } + + if (g_switch_seen && g_switch_value != 0) + as_warn (_("-G may not be used with SVR4 PIC code")); + g_switch_value = 0; + bfd_set_gp_size (stdoutput, 0); demand_empty_rest_of_line (); } @@ -12584,7 +12263,7 @@ nopic_need_relax (symbolS *sym, int before_relaxing) if (sym == 0) return 0; - if (USE_GLOBAL_POINTER_OPT && g_switch_value > 0) + if (g_switch_value > 0) { const char *symname; int change; @@ -12691,9 +12370,7 @@ pic_need_relax (symbolS *sym, asection *segtype) #ifdef OBJ_ELF /* A global or weak symbol is treated as external. */ && (OUTPUT_FLAVOR != bfd_target_elf_flavour - || (! S_IS_WEAK (sym) - && (! S_IS_EXTERNAL (sym) - || mips_pic == EMBEDDED_PIC))) + || (! S_IS_WEAK (sym) && ! S_IS_EXTERNAL (sym))) #endif ); } @@ -13046,60 +12723,8 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; - if (mips_pic == EMBEDDED_PIC - && SWITCH_TABLE (fixp)) - { - /* For a switch table entry we use a special reloc. The addend - is actually the difference between the reloc address and the - subtrahend. */ - reloc->addend = reloc->address - S_GET_VALUE (fixp->fx_subsy); - if (OUTPUT_FLAVOR != bfd_target_ecoff_flavour) - as_fatal (_("Double check fx_r_type in tc-mips.c:tc_gen_reloc")); - fixp->fx_r_type = BFD_RELOC_GPREL32; - } - else if (fixp->fx_pcrel) - { - bfd_vma pcrel_address; - - /* Set PCREL_ADDRESS to this relocation's "PC". The PC for high - high-part relocs is the address of the low-part reloc. */ - if (fixp->fx_r_type == BFD_RELOC_PCREL_HI16_S) - { - assert (fixp->fx_next != NULL - && fixp->fx_next->fx_r_type == BFD_RELOC_PCREL_LO16); - pcrel_address = (fixp->fx_next->fx_where - + fixp->fx_next->fx_frag->fr_address); - } - else - pcrel_address = reloc->address; - - if (OUTPUT_FLAVOR == bfd_target_elf_flavour) - { - /* At this point, fx_addnumber is "symbol offset - pcrel_address". - Relocations want only the symbol offset. */ - reloc->addend = fixp->fx_addnumber + pcrel_address; - } - else if (fixp->fx_r_type == BFD_RELOC_PCREL_LO16 - || fixp->fx_r_type == BFD_RELOC_PCREL_HI16_S) - { - /* We use a special addend for an internal RELLO or RELHI reloc. */ - if (symbol_section_p (fixp->fx_addsy)) - reloc->addend = pcrel_address - S_GET_VALUE (fixp->fx_subsy); - else - reloc->addend = fixp->fx_addnumber + pcrel_address; - } - else - { - if (OUTPUT_FLAVOR != bfd_target_aout_flavour) - /* A gruesome hack which is a result of the gruesome gas reloc - handling. */ - reloc->addend = pcrel_address; - else - reloc->addend = -pcrel_address; - } - } - else - reloc->addend = fixp->fx_addnumber; + assert (! fixp->fx_pcrel); + reloc->addend = fixp->fx_addnumber; /* Since the old MIPS ELF ABI uses Rel instead of Rela, encode the vtable entry to be used in the relocation's section offset. */ @@ -13109,49 +12734,16 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) reloc->addend = 0; } - /* Since DIFF_EXPR_OK is defined in tc-mips.h, it is possible that - fixup_segment converted a non-PC relative reloc into a PC - relative reloc. In such a case, we need to convert the reloc - code. */ code = fixp->fx_r_type; - if (fixp->fx_pcrel) - { - switch (code) - { - case BFD_RELOC_8: - code = BFD_RELOC_8_PCREL; - break; - case BFD_RELOC_16: - code = BFD_RELOC_16_PCREL; - break; - case BFD_RELOC_32: - code = BFD_RELOC_32_PCREL; - break; - case BFD_RELOC_64: - code = BFD_RELOC_64_PCREL; - break; - case BFD_RELOC_8_PCREL: - case BFD_RELOC_16_PCREL: - case BFD_RELOC_32_PCREL: - case BFD_RELOC_64_PCREL: - case BFD_RELOC_16_PCREL_S2: - case BFD_RELOC_PCREL_HI16_S: - case BFD_RELOC_PCREL_LO16: - break; - default: - as_bad_where (fixp->fx_file, fixp->fx_line, - _("Cannot make %s relocation PC relative"), - bfd_get_reloc_code_name (code)); - } - } - /* To support a PC relative reloc when generating embedded PIC code - for ECOFF, we use a Cygnus extension. We check for that here to - make sure that we don't let such a reloc escape normally. */ + /* To support a PC relative reloc, we used a Cygnus extension. + We check for that here to make sure that we don't let such a + reloc escape normally. (FIXME: This was formerly used by + embedded-PIC support, but is now used by branch handling in + general. That probably should be fixed.) */ if ((OUTPUT_FLAVOR == bfd_target_ecoff_flavour || OUTPUT_FLAVOR == bfd_target_elf_flavour) - && code == BFD_RELOC_16_PCREL_S2 - && mips_pic != EMBEDDED_PIC) + && code == BFD_RELOC_16_PCREL_S2) reloc->howto = NULL; else reloc->howto = bfd_reloc_type_lookup (stdoutput, code); @@ -14331,7 +13923,6 @@ md_show_usage (FILE *stream) fprintf (stream, _("\ MIPS options:\n\ --membedded-pic generate embedded position independent code\n\ -EB generate big endian output\n\ -EL generate little endian output\n\ -g, -g2 do not remove unneeded NOPs or swap branches\n\ @@ -14373,6 +13964,7 @@ MIPS options:\n\ -mips16 generate mips16 instructions\n\ -no-mips16 do not generate mips16 instructions\n")); fprintf (stream, _("\ +-mfix-vr4120 work around certain VR4120 errata\n\ -mgp32 use 32-bit GPRs, regardless of the chosen ISA\n\ -mfp32 use 32-bit FPRs, regardless of the chosen ISA\n\ -O0 remove unneeded NOPs, do not swap branches\n\ @@ -14425,10 +14017,6 @@ mips_dwarf2_addr_size (void) { if (mips_abi == N64_ABI) return 8; - /* GCC for 64-bit targets turns on mlong64 giving - us 64-bit addresses. */ - else if (mips_abi == EABI_ABI && !file_mips_gp32) - return 8; else return 4; } diff --git a/gas/config/tc-mips.h b/gas/config/tc-mips.h index 46a765369a1..8d0106a7c1e 100644 --- a/gas/config/tc-mips.h +++ b/gas/config/tc-mips.h @@ -58,10 +58,6 @@ extern void mips_handle_align (struct frag *); #define MAX_MEM_FOR_RS_ALIGN_CODE (1 + 2) -/* We permit PC relative difference expressions when generating - embedded PIC code. */ -#define DIFF_EXPR_OK - /* Tell assembler that we have an itbl_mips.h header file to include. */ #define HAVE_ITBL_CPU @@ -79,12 +75,6 @@ enum mips_pic_level /* Generate PIC code as in the SVR4 MIPS ABI. */ SVR4_PIC, - - /* Generate PIC code without using a global offset table: the data - segment has a maximum size of 64K, all data references are off - the $gp register, and all text references are PC relative. This - is used on some embedded systems. */ - EMBEDDED_PIC }; extern enum mips_pic_level mips_pic; @@ -129,14 +119,12 @@ extern int mips_fix_adjustable (struct fix *); /* Values passed to md_apply_fix3 don't include symbol values. */ #define MD_APPLY_SYM_VALUE(FIX) 0 -/* Global syms must not be resolved, to support ELF shared libraries. - When generating embedded code, we don't have shared libs. */ +/* Global syms must not be resolved, to support ELF shared libraries. */ #define EXTERN_FORCE_RELOC \ - (OUTPUT_FLAVOR == bfd_target_elf_flavour \ - && mips_pic != EMBEDDED_PIC) + (OUTPUT_FLAVOR == bfd_target_elf_flavour) -/* When generating embedded PIC code we must keep PC relative - relocations. */ +/* When generating NEWABI code, we may need to have to keep combined + relocations which don't have symbols. */ #define TC_FORCE_RELOCATION(FIX) mips_force_relocation (FIX) extern int mips_force_relocation (struct fix *); @@ -167,10 +155,6 @@ extern void mips_elf_final_processing (void); extern void md_mips_end (void); #define md_end() md_mips_end() -#define USE_GLOBAL_POINTER_OPT (OUTPUT_FLAVOR == bfd_target_ecoff_flavour \ - || OUTPUT_FLAVOR == bfd_target_coff_flavour \ - || OUTPUT_FLAVOR == bfd_target_elf_flavour) - extern void mips_pop_insert (void); #define md_pop_insert() mips_pop_insert() @@ -183,6 +167,7 @@ extern void mips_enable_auto_align (void); extern enum dwarf2_format mips_dwarf2_format (void); #define DWARF2_FORMAT() mips_dwarf2_format () +extern int mips_dwarf2_addr_size (void); #define DWARF2_ADDR_SIZE(bfd) mips_dwarf2_addr_size () #endif /* TC_MIPS */ diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c index 86daea0a369..66366a57d23 100644 --- a/gas/config/tc-ppc.c +++ b/gas/config/tc-ppc.c @@ -1,6 +1,6 @@ /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) - Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 - Free Software Foundation, Inc. + Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, + 2004 Free Software Foundation, Inc. Written by Ian Lance Taylor, Cygnus Support. This file is part of GAS, the GNU Assembler. @@ -183,7 +183,7 @@ const char EXP_CHARS[] = "eE"; as in 0d1.0. */ const char FLT_CHARS[] = "dD"; -/* '+' and '-' can be used as postfix predicate predictors for conditional +/* '+' and '-' can be used as postfix predicate predictors for conditional branches. So they need to be accepted as symbol characters. */ const char ppc_symbol_chars[] = "+-"; @@ -1493,8 +1493,10 @@ ppc_elf_suffix (str_p, exp_p) { struct map_bfd { char *string; - int length; - int reloc; + unsigned int length : 8; + unsigned int valid32 : 1; + unsigned int valid64 : 1; + unsigned int reloc; }; char ident[20]; @@ -1504,97 +1506,97 @@ ppc_elf_suffix (str_p, exp_p) int len; const struct map_bfd *ptr; -#define MAP(str,reloc) { str, sizeof (str)-1, reloc } +#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } +#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } +#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } static const struct map_bfd mapping[] = { - MAP ("l", (int) BFD_RELOC_LO16), - MAP ("h", (int) BFD_RELOC_HI16), - MAP ("ha", (int) BFD_RELOC_HI16_S), - MAP ("brtaken", (int) BFD_RELOC_PPC_B16_BRTAKEN), - MAP ("brntaken", (int) BFD_RELOC_PPC_B16_BRNTAKEN), - MAP ("got", (int) BFD_RELOC_16_GOTOFF), - MAP ("got@l", (int) BFD_RELOC_LO16_GOTOFF), - MAP ("got@h", (int) BFD_RELOC_HI16_GOTOFF), - MAP ("got@ha", (int) BFD_RELOC_HI16_S_GOTOFF), - MAP ("fixup", (int) BFD_RELOC_CTOR), - MAP ("plt", (int) BFD_RELOC_24_PLT_PCREL), - MAP ("pltrel24", (int) BFD_RELOC_24_PLT_PCREL), - MAP ("copy", (int) BFD_RELOC_PPC_COPY), - MAP ("globdat", (int) BFD_RELOC_PPC_GLOB_DAT), - MAP ("local24pc", (int) BFD_RELOC_PPC_LOCAL24PC), - MAP ("local", (int) BFD_RELOC_PPC_LOCAL24PC), - MAP ("pltrel", (int) BFD_RELOC_32_PLT_PCREL), - MAP ("plt@l", (int) BFD_RELOC_LO16_PLTOFF), - MAP ("plt@h", (int) BFD_RELOC_HI16_PLTOFF), - MAP ("plt@ha", (int) BFD_RELOC_HI16_S_PLTOFF), - MAP ("sdarel", (int) BFD_RELOC_GPREL16), - MAP ("sectoff", (int) BFD_RELOC_16_BASEREL), - MAP ("sectoff@l", (int) BFD_RELOC_LO16_BASEREL), - MAP ("sectoff@h", (int) BFD_RELOC_HI16_BASEREL), - MAP ("sectoff@ha", (int) BFD_RELOC_HI16_S_BASEREL), - MAP ("naddr", (int) BFD_RELOC_PPC_EMB_NADDR32), - MAP ("naddr16", (int) BFD_RELOC_PPC_EMB_NADDR16), - MAP ("naddr@l", (int) BFD_RELOC_PPC_EMB_NADDR16_LO), - MAP ("naddr@h", (int) BFD_RELOC_PPC_EMB_NADDR16_HI), - MAP ("naddr@ha", (int) BFD_RELOC_PPC_EMB_NADDR16_HA), - MAP ("sdai16", (int) BFD_RELOC_PPC_EMB_SDAI16), - MAP ("sda2rel", (int) BFD_RELOC_PPC_EMB_SDA2REL), - MAP ("sda2i16", (int) BFD_RELOC_PPC_EMB_SDA2I16), - MAP ("sda21", (int) BFD_RELOC_PPC_EMB_SDA21), - MAP ("mrkref", (int) BFD_RELOC_PPC_EMB_MRKREF), - MAP ("relsect", (int) BFD_RELOC_PPC_EMB_RELSEC16), - MAP ("relsect@l", (int) BFD_RELOC_PPC_EMB_RELST_LO), - MAP ("relsect@h", (int) BFD_RELOC_PPC_EMB_RELST_HI), - MAP ("relsect@ha", (int) BFD_RELOC_PPC_EMB_RELST_HA), - MAP ("bitfld", (int) BFD_RELOC_PPC_EMB_BIT_FLD), - MAP ("relsda", (int) BFD_RELOC_PPC_EMB_RELSDA), - MAP ("xgot", (int) BFD_RELOC_PPC_TOC16), - MAP ("tls", (int) BFD_RELOC_PPC_TLS), - MAP ("dtpmod", (int) BFD_RELOC_PPC_DTPMOD), - MAP ("dtprel", (int) BFD_RELOC_PPC_DTPREL), - MAP ("dtprel@l", (int) BFD_RELOC_PPC_DTPREL16_LO), - MAP ("dtprel@h", (int) BFD_RELOC_PPC_DTPREL16_HI), - MAP ("dtprel@ha", (int) BFD_RELOC_PPC_DTPREL16_HA), - MAP ("tprel", (int) BFD_RELOC_PPC_TPREL), - MAP ("tprel@l", (int) BFD_RELOC_PPC_TPREL16_LO), - MAP ("tprel@h", (int) BFD_RELOC_PPC_TPREL16_HI), - MAP ("tprel@ha", (int) BFD_RELOC_PPC_TPREL16_HA), - MAP ("got@tlsgd", (int) BFD_RELOC_PPC_GOT_TLSGD16), - MAP ("got@tlsgd@l", (int) BFD_RELOC_PPC_GOT_TLSGD16_LO), - MAP ("got@tlsgd@h", (int) BFD_RELOC_PPC_GOT_TLSGD16_HI), - MAP ("got@tlsgd@ha", (int) BFD_RELOC_PPC_GOT_TLSGD16_HA), - MAP ("got@tlsld", (int) BFD_RELOC_PPC_GOT_TLSLD16), - MAP ("got@tlsld@l", (int) BFD_RELOC_PPC_GOT_TLSLD16_LO), - MAP ("got@tlsld@h", (int) BFD_RELOC_PPC_GOT_TLSLD16_HI), - MAP ("got@tlsld@ha", (int) BFD_RELOC_PPC_GOT_TLSLD16_HA), - MAP ("got@dtprel", (int) BFD_RELOC_PPC_GOT_DTPREL16), - MAP ("got@dtprel@l", (int) BFD_RELOC_PPC_GOT_DTPREL16_LO), - MAP ("got@dtprel@h", (int) BFD_RELOC_PPC_GOT_DTPREL16_HI), - MAP ("got@dtprel@ha", (int) BFD_RELOC_PPC_GOT_DTPREL16_HA), - MAP ("got@tprel", (int) BFD_RELOC_PPC_GOT_TPREL16), - MAP ("got@tprel@l", (int) BFD_RELOC_PPC_GOT_TPREL16_LO), - MAP ("got@tprel@h", (int) BFD_RELOC_PPC_GOT_TPREL16_HI), - MAP ("got@tprel@ha", (int) BFD_RELOC_PPC_GOT_TPREL16_HA), - /* The following are only valid for ppc64. Negative values are - used instead of a flag. */ - MAP ("higher", - (int) BFD_RELOC_PPC64_HIGHER), - MAP ("highera", - (int) BFD_RELOC_PPC64_HIGHER_S), - MAP ("highest", - (int) BFD_RELOC_PPC64_HIGHEST), - MAP ("highesta", - (int) BFD_RELOC_PPC64_HIGHEST_S), - MAP ("tocbase", - (int) BFD_RELOC_PPC64_TOC), - MAP ("toc", - (int) BFD_RELOC_PPC_TOC16), - MAP ("toc@l", - (int) BFD_RELOC_PPC64_TOC16_LO), - MAP ("toc@h", - (int) BFD_RELOC_PPC64_TOC16_HI), - MAP ("toc@ha", - (int) BFD_RELOC_PPC64_TOC16_HA), - MAP ("dtprel@higher", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHER), - MAP ("dtprel@highera", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHERA), - MAP ("dtprel@highest", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHEST), - MAP ("dtprel@highesta", - (int) BFD_RELOC_PPC64_DTPREL16_HIGHESTA), - MAP ("tprel@higher", - (int) BFD_RELOC_PPC64_TPREL16_HIGHER), - MAP ("tprel@highera", - (int) BFD_RELOC_PPC64_TPREL16_HIGHERA), - MAP ("tprel@highest", - (int) BFD_RELOC_PPC64_TPREL16_HIGHEST), - MAP ("tprel@highesta", - (int) BFD_RELOC_PPC64_TPREL16_HIGHESTA), - { (char *) 0, 0, (int) BFD_RELOC_UNUSED } + MAP ("l", BFD_RELOC_LO16), + MAP ("h", BFD_RELOC_HI16), + MAP ("ha", BFD_RELOC_HI16_S), + MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), + MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), + MAP ("got", BFD_RELOC_16_GOTOFF), + MAP ("got@l", BFD_RELOC_LO16_GOTOFF), + MAP ("got@h", BFD_RELOC_HI16_GOTOFF), + MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), + MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), + MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), + MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), + MAP ("copy", BFD_RELOC_PPC_COPY), + MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), + MAP ("sectoff", BFD_RELOC_16_BASEREL), + MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), + MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), + MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), + MAP ("tls", BFD_RELOC_PPC_TLS), + MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), + MAP ("dtprel", BFD_RELOC_PPC_DTPREL), + MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), + MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), + MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), + MAP ("tprel", BFD_RELOC_PPC_TPREL), + MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), + MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), + MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), + MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), + MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), + MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), + MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), + MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), + MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), + MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), + MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), + MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), + MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), + MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), + MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), + MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), + MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), + MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), + MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), + MAP32 ("fixup", BFD_RELOC_CTOR), + MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), + MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), + MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), + MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), + MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), + MAP32 ("sdarel", BFD_RELOC_GPREL16), + MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), + MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), + MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), + MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), + MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), + MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), + MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), + MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), + MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), + MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), + MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), + MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), + MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), + MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), + MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), + MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), + MAP32 ("xgot", BFD_RELOC_PPC_TOC16), + MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), + MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), + MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), + MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), + MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), + MAP64 ("toc", BFD_RELOC_PPC_TOC16), + MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), + MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), + MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), + MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), + MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), + MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), + MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), + MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), + MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), + MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), + MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), + { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED } }; if (*str++ != '@') @@ -1615,17 +1617,11 @@ ppc_elf_suffix (str_p, exp_p) for (ptr = &mapping[0]; ptr->length > 0; ptr++) if (ch == ptr->string[0] && len == ptr->length - && memcmp (ident, ptr->string, ptr->length) == 0) + && memcmp (ident, ptr->string, ptr->length) == 0 + && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) { int reloc = ptr->reloc; - if (reloc < 0) - { - if (!ppc_obj64) - return BFD_RELOC_UNUSED; - reloc = -reloc; - } - if (!ppc_obj64) if (exp_p->X_add_number != 0 && (reloc == (int) BFD_RELOC_16_GOTOFF @@ -5901,7 +5897,7 @@ md_apply_fix3 (fixP, valP, seg) if (fixP->fx_pcrel) { /* This can occur if there is a bug in the input assembler, eg: - ".byte <undefined_symbol> - ." */ + ".byte <undefined_symbol> - ." */ if (fixP->fx_addsy) as_bad (_("Unable to handle reference to symbol %s"), S_GET_NAME (fixP->fx_addsy)); @@ -6052,15 +6048,15 @@ tc_ppc_regname_to_dw2regnum (const char *regname) if (p == q || *q || regnum >= 32) return -1; if (regname[0] == 'f') - regnum += 32; + regnum += 32; else if (regname[0] == 'v') - regnum += 77; + regnum += 77; } else if (regname[0] == 'c' && regname[1] == 'r') { p = regname + 2 + (regname[2] == '.'); if (p[0] < '0' || p[0] > '7' || p[1]) - return -1; + return -1; regnum = p[0] - '0' + 68; } return regnum; diff --git a/gas/config/tc-s390.c b/gas/config/tc-s390.c index ef51bca4e56..c450eaeea75 100644 --- a/gas/config/tc-s390.c +++ b/gas/config/tc-s390.c @@ -1614,9 +1614,15 @@ s390_insn (ignore) expression (&exp); if (exp.X_op == O_constant) { - if ( (opformat->oplen == 6 && exp.X_op > 0 && exp.X_op < (1ULL << 48)) - || (opformat->oplen == 4 && exp.X_op > 0 && exp.X_op < (1ULL << 32)) - || (opformat->oplen == 2 && exp.X_op > 0 && exp.X_op < (1ULL << 16))) + if ( ( opformat->oplen == 6 + && exp.X_add_number >= 0 + && (addressT) exp.X_add_number < (1ULL << 48)) + || ( opformat->oplen == 4 + && exp.X_add_number >= 0 + && (addressT) exp.X_add_number < (1ULL << 32)) + || ( opformat->oplen == 2 + && exp.X_add_number >= 0 + && (addressT) exp.X_add_number < (1ULL << 16))) md_number_to_chars (insn, exp.X_add_number, opformat->oplen); else as_bad (_("Invalid .insn format\n")); diff --git a/gas/config/tc-sh.c b/gas/config/tc-sh.c index 45698d53cc2..04f06ff7e1f 100644 --- a/gas/config/tc-sh.c +++ b/gas/config/tc-sh.c @@ -1,6 +1,6 @@ /* tc-sh.c -- Assemble code for the Renesas / SuperH SH - Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 - Free Software Foundation, Inc. + Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, + 2003, 2004 Free Software Foundation, Inc. This file is part of GAS, the GNU Assembler. @@ -132,6 +132,10 @@ int sh_relax; /* set if -relax seen */ int sh_small; +/* Flag to generate relocations against symbol values for local symbols. */ + +static int dont_adjust_reloc_32; + /* preset architecture set, if given; zero otherwise. */ static int preset_target_arch; @@ -1632,7 +1636,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands) goto fail; reg_n = user->reg; break; - + case AS_INC_N: if (user->type != A_INC_N) goto fail; @@ -1640,7 +1644,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands) goto fail; reg_n = user->reg; break; - + case AS_IND_N: if (user->type != A_IND_N) goto fail; @@ -1648,7 +1652,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands) goto fail; reg_n = user->reg; break; - + case AS_PMOD_N: if (user->type != AX_PMOD_N) goto fail; @@ -1656,7 +1660,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands) goto fail; reg_n = user->reg; break; - + case AX_INC_N: if (user->type != A_INC_N) goto fail; @@ -1664,7 +1668,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands) goto fail; reg_n = user->reg; break; - + case AX_IND_N: if (user->type != A_IND_N) goto fail; @@ -1672,7 +1676,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands) goto fail; reg_n = user->reg; break; - + case AX_PMOD_N: if (user->type != AX_PMOD_N) goto fail; @@ -1680,7 +1684,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands) goto fail; reg_n = user->reg; break; - + case AXY_INC_N: if (user->type != A_INC_N) goto fail; @@ -1689,7 +1693,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands) goto fail; reg_n = user->reg; break; - + case AXY_IND_N: if (user->type != A_IND_N) goto fail; @@ -1698,7 +1702,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands) goto fail; reg_n = user->reg; break; - + case AXY_PMOD_N: if (user->type != AX_PMOD_N) goto fail; @@ -1707,7 +1711,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands) goto fail; reg_n = user->reg; break; - + case AY_INC_N: if (user->type != A_INC_N) goto fail; @@ -1715,7 +1719,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands) goto fail; reg_n = user->reg; break; - + case AY_IND_N: if (user->type != A_IND_N) goto fail; @@ -1723,7 +1727,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands) goto fail; reg_n = user->reg; break; - + case AY_PMOD_N: if (user->type != AY_PMOD_N) goto fail; @@ -1740,7 +1744,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands) goto fail; reg_n = user->reg; break; - + case AYX_IND_N: if (user->type != A_IND_N) goto fail; @@ -1749,7 +1753,7 @@ get_specific (sh_opcode_info *opcode, sh_operand_info *operands) goto fail; reg_n = user->reg; break; - + case AYX_PMOD_N: if (user->type != AY_PMOD_N) goto fail; @@ -2143,6 +2147,7 @@ build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) switch (i) { case REG_N: + case REG_N_D: nbuf[index] = reg_n; break; case REG_M: @@ -2159,6 +2164,9 @@ build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) case REG_B: nbuf[index] = reg_b | 0x08; break; + case REG_N_B01: + nbuf[index] = reg_n | 0x01; + break; case IMM0_4BY4: insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); break; @@ -2584,6 +2592,7 @@ md_assemble (char *str) sh_operand_info operand[3]; sh_opcode_info *opcode; unsigned int size = 0; + char *initial_str = str; #ifdef HAVE_SH64 if (sh64_isa_mode == sh64_isa_shmedia) @@ -2610,7 +2619,45 @@ md_assemble (char *str) if (opcode == NULL) { - as_bad (_("unknown opcode")); + /* The opcode is not in the hash table. + This means we definately have an assembly failure, + but the instruction may be valid in another CPU variant. + In this case emit something better than 'unknown opcode'. + Search the full table in sh-opc.h to check. */ + + char *name = initial_str; + int name_length = 0; + const sh_opcode_info *op; + int found = 0; + + /* identify opcode in string */ + while (isspace (*name)) + { + name++; + } + while (!isspace (name[name_length])) + { + name_length++; + } + + /* search for opcode in full list */ + for (op = sh_table; op->name; op++) + { + if (strncasecmp (op->name, name, name_length) == 0) + { + found = 1; + break; + } + } + + if ( found ) + { + as_bad (_("opcode not valid for this cpu variant")); + } + else + { + as_bad (_("unknown opcode")); + } return; } @@ -2840,6 +2887,7 @@ struct option md_longopts[] = #define OPTION_SMALL (OPTION_LITTLE + 1) #define OPTION_DSP (OPTION_SMALL + 1) #define OPTION_ISA (OPTION_DSP + 1) +#define OPTION_RENESAS (OPTION_ISA + 1) {"relax", no_argument, NULL, OPTION_RELAX}, {"big", no_argument, NULL, OPTION_BIG}, @@ -2847,8 +2895,10 @@ struct option md_longopts[] = {"small", no_argument, NULL, OPTION_SMALL}, {"dsp", no_argument, NULL, OPTION_DSP}, {"isa", required_argument, NULL, OPTION_ISA}, + {"renesas", no_argument, NULL, OPTION_RENESAS}, + #ifdef HAVE_SH64 -#define OPTION_ABI (OPTION_ISA + 1) +#define OPTION_ABI (OPTION_RENESAS + 1) #define OPTION_NO_MIX (OPTION_ABI + 1) #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1) #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1) @@ -2889,9 +2939,17 @@ md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) preset_target_arch = arch_sh1_up & ~arch_sh2e_up; break; + case OPTION_RENESAS: + dont_adjust_reloc_32 = 1; + break; + case OPTION_ISA: if (strcasecmp (arg, "sh4") == 0) preset_target_arch = arch_sh4; + else if (strcasecmp (arg, "sh4-nofpu") == 0) + preset_target_arch = arch_sh4_nofpu; + else if (strcasecmp (arg, "sh4-nommu-nofpu") == 0) + preset_target_arch = arch_sh4_nommu_nofpu; else if (strcasecmp (arg, "sh4a") == 0) preset_target_arch = arch_sh4a; else if (strcasecmp (arg, "dsp") == 0) @@ -2972,18 +3030,23 @@ SH options:\n\ -little generate little endian code\n\ -big generate big endian code\n\ -relax alter jump instructions for long displacements\n\ +-renesas disable optimization with section symbol for\n\ + compatibility with Renesas assembler.\n\ -small align sections to 4 byte boundaries, not 16\n\ --dsp enable sh-dsp insns, and disable floating-point ISAs.\n")); -#ifdef HAVE_SH64 - fprintf (stream, _("\ +-dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ -isa=[sh4\n\ + | sh4-nofpu sh4 with fpu disabled\n\ + | sh4-nommu-nofpu sh4 with no MMU or FPU\n\ | sh4a\n\ - | dsp same as '-dsp'\n\ + | dsp same as '-dsp'\n\ | fp\n\ - | shmedia set as the default instruction set for SH64\n\ + | any] use most appropriate isa\n")); +#ifdef HAVE_SH64 + fprintf (stream, _("\ +-isa=[shmedia set as the default instruction set for SH64\n\ | SHmedia\n\ | shcompact\n\ - | SHcompact\n")); + | SHcompact]\n")); fprintf (stream, _("\ -abi=[32|64] set size of expanded SHmedia operands and object\n\ file type\n\ @@ -2994,13 +3057,6 @@ SH options:\n\ -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\ -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\ to 32 bits only\n")); -#else - fprintf (stream, _("\ --isa=[sh4\n\ - | sh4a\n\ - | dsp same as '-dsp'\n\ - | fp\n\ - | any]\n")); #endif /* HAVE_SH64 */ } @@ -3521,6 +3577,7 @@ sh_fix_adjustable (fixS *fixP) if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL || fixP->fx_r_type == BFD_RELOC_SH_GOTPC + || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) || fixP->fx_r_type == BFD_RELOC_RVA) return 0; @@ -3560,6 +3617,8 @@ sh_elf_final_processing (void) val = EF_SH3_DSP; else if (valid_arch & arch_sh3e) val = EF_SH3E; + else if (valid_arch & arch_sh4_nommu_nofpu) + val = EF_SH4_NOMMU_NOFPU; else if (valid_arch & arch_sh4_nofpu) val = EF_SH4_NOFPU; else if (valid_arch & arch_sh4) @@ -4188,10 +4247,7 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) rel->addend = 0; rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); -#ifdef OBJ_ELF - if (rel->howto->type == R_SH_IND12W) - rel->addend += fixp->fx_offset - 4; -#endif + if (rel->howto == NULL) { as_bad_where (fixp->fx_file, fixp->fx_line, @@ -4201,6 +4257,10 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); assert (rel->howto != NULL); } +#ifdef OBJ_ELF + else if (rel->howto->type == R_SH_IND12W) + rel->addend += fixp->fx_offset - 4; +#endif return rel; } diff --git a/gas/config/tc-xtensa.c b/gas/config/tc-xtensa.c index 8f101dbccc1..5d5ccea5dac 100644 --- a/gas/config/tc-xtensa.c +++ b/gas/config/tc-xtensa.c @@ -3721,7 +3721,7 @@ xg_assemble_literal (insn) set_expr_symbol_offset (&saved_loc, frag_now->fr_symbol, frag_now_fix ()); assert (insn->insn_type == ITYPE_LITERAL); - assert (insn->ntok = 1); /* must be only one token here */ + assert (insn->ntok == 1); /* must be only one token here */ xtensa_switch_to_literal_fragment (&state); @@ -7888,10 +7888,9 @@ xtensa_post_relax_hook () xtensa_create_property_segments (get_frag_is_insn, XTENSA_INSN_SEC_NAME, xt_insn_sec); - if (use_literal_section) - xtensa_create_property_segments (get_frag_is_literal, - XTENSA_LIT_SEC_NAME, - xt_literal_sec); + xtensa_create_property_segments (get_frag_is_literal, + XTENSA_LIT_SEC_NAME, + xt_literal_sec); } diff --git a/gas/configure b/gas/configure index d663f7295ad..1cb92262597 100755 --- a/gas/configure +++ b/gas/configure @@ -4415,7 +4415,6 @@ echo "$as_me: WARNING: GAS support for ${generic_target} is preliminary and a wo # don't change em like *-*-bsd does mips-dec-openbsd*) fmt=elf endian=little ;; - mips-dec-bsd*) fmt=aout endian=little ;; mips-sony-bsd*) fmt=ecoff ;; mips-*-bsd*) { { echo "$as_me:$LINENO: error: Unknown vendor for mips-bsd configuration." >&5 @@ -4482,7 +4481,7 @@ echo "$as_me: error: Solaris must be configured little endian" >&2;} { (exit 1); exit 1; }; } fi ;; ppc-*-rtems*) fmt=elf ;; - ppc-*-macos* | ppc-*-mpw*) fmt=coff em=macos ;; + ppc-*-macos*) fmt=coff em=macos ;; ppc-*-netware*) fmt=elf em=ppcnw ;; ppc-**-nto*) fmt=elf ;; ppc-*-kaos*) fmt=elf ;; diff --git a/gas/configure.in b/gas/configure.in index bdcddde1d14..83a5768836c 100644 --- a/gas/configure.in +++ b/gas/configure.in @@ -376,7 +376,6 @@ changequote([,])dnl # don't change em like *-*-bsd does mips-dec-openbsd*) fmt=elf endian=little ;; - mips-dec-bsd*) fmt=aout endian=little ;; mips-sony-bsd*) fmt=ecoff ;; mips-*-bsd*) AC_MSG_ERROR(Unknown vendor for mips-bsd configuration.) ;; @@ -433,7 +432,7 @@ changequote([,])dnl AC_MSG_ERROR(Solaris must be configured little endian) fi ;; ppc-*-rtems*) fmt=elf ;; - ppc-*-macos* | ppc-*-mpw*) fmt=coff em=macos ;; + ppc-*-macos*) fmt=coff em=macos ;; ppc-*-netware*) fmt=elf em=ppcnw ;; ppc-**-nto*) fmt=elf ;; ppc-*-kaos*) fmt=elf ;; diff --git a/gas/doc/Makefile.in b/gas/doc/Makefile.in index b53c17a2976..c5ac6c0caa0 100644 --- a/gas/doc/Makefile.in +++ b/gas/doc/Makefile.in @@ -1,8 +1,8 @@ -# Makefile.in generated by automake 1.7.8 from Makefile.am. +# Makefile.in generated by automake 1.8.2 from Makefile.am. # @configure_input@ -# Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 -# Free Software Foundation, Inc. +# Copyright (C) 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, +# 2003, 2004 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. @@ -13,7 +13,6 @@ # PARTICULAR PURPOSE. @SET_MAKE@ - srcdir = @srcdir@ top_srcdir = @top_srcdir@ VPATH = @srcdir@ @@ -21,7 +20,6 @@ pkgdatadir = $(datadir)/@PACKAGE@ pkglibdir = $(libdir)/@PACKAGE@ pkgincludedir = $(includedir)/@PACKAGE@ top_builddir = .. - am__cd = CDPATH="$${ZSH_VERSION+.}$(PATH_SEPARATOR)" && cd INSTALL = @INSTALL@ install_sh_DATA = $(install_sh) -c -m 644 @@ -38,6 +36,42 @@ POST_UNINSTALL = : build_triplet = @build@ host_triplet = @host@ target_triplet = @target@ +subdir = doc +DIST_COMMON = $(srcdir)/Makefile.in $(srcdir)/Makefile.am +ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 +am__aclocal_m4_deps = $(top_srcdir)/acinclude.m4 \ + $(top_srcdir)/../libtool.m4 $(top_srcdir)/../gettext.m4 \ + $(top_srcdir)/configure.in +am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ + $(ACLOCAL_M4) +mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs +CONFIG_HEADER = $(top_builddir)/config.h +CONFIG_CLEAN_FILES = +depcomp = +am__depfiles_maybe = +SOURCES = +DIST_SOURCES = +INFO_DEPS = $(srcdir)/as.info +TEXINFO_TEX = $(top_srcdir)/../texinfo/texinfo.tex +am__TEXINFO_TEX_DIR = $(top_srcdir)/../texinfo +DVIS = as.dvi +PDFS = as.pdf +PSS = as.ps +HTMLS = as.html +TEXINFOS = as.texinfo +TEXI2DVI = `if test -f $(top_srcdir)/../texinfo/util/texi2dvi; then \ + echo $(top_srcdir)/../texinfo/util/texi2dvi; \ + else \ + echo texi2dvi; \ + fi` +TEXI2PDF = $(TEXI2DVI) --pdf --batch +MAKEINFOHTML = $(MAKEINFO) --html +AM_MAKEINFOHTMLFLAGS = $(AM_MAKEINFOFLAGS) +DVIPS = dvips +man1dir = $(mandir)/man1 +am__installdirs = $(DESTDIR)$(man1dir) +NROFF = nroff +MANS = $(man_MANS) ACLOCAL = @ACLOCAL@ ALLOCA = @ALLOCA@ ALL_OBJ_DEPS = @ALL_OBJ_DEPS@ @@ -150,6 +184,7 @@ libdir = @libdir@ libexecdir = @libexecdir@ localstatedir = @localstatedir@ mandir = @mandir@ +mkdir_p = @mkdir_p@ obj_format = @obj_format@ oldincludedir = @oldincludedir@ prefix = @prefix@ @@ -164,25 +199,19 @@ target_cpu_type = @target_cpu_type@ target_os = @target_os@ target_vendor = @target_vendor@ te_file = @te_file@ - -AUTOMAKE_OPTIONS = cygnus +AUTOMAKE_OPTIONS = 1.8 cygnus # What version of the manual you want; "all" includes everything CONFIG = all # Options to extract the man page from as.texinfo MANCONF = -Dman - TEXI2POD = perl $(top_srcdir)/../etc/texi2pod.pl - POD2MAN = pod2man --center="GNU Development Tools" \ --release="binutils-$(VERSION)" --section=1 - man_MANS = as.1 - info_TEXINFOS = as.texinfo - CPU_DOCS = \ c-a29k.texi \ c-alpha.texi \ @@ -219,40 +248,46 @@ CPU_DOCS = \ c-z8k.texi - # This one isn't ready for prime time yet. Not even a little bit. noinst_TEXINFOS = internals.texi - DISTCLEANFILES = asconfig.texi - MAINTAINERCLEANFILES = gasver.texi -subdir = doc -ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 -mkinstalldirs = $(SHELL) $(top_srcdir)/../mkinstalldirs -CONFIG_HEADER = $(top_builddir)/config.h -CONFIG_CLEAN_FILES = -depcomp = -am__depfiles_maybe = -DIST_SOURCES = -TEXINFO_TEX = $(top_srcdir)/../texinfo/texinfo.tex -am__TEXINFO_TEX_DIR = $(top_srcdir)/../texinfo -INFO_DEPS = as.info -DVIS = as.dvi -PDFS = as.pdf -PSS = as.ps -TEXINFOS = as.texinfo - -NROFF = nroff -MANS = $(man_MANS) +BASEDIR = $(srcdir)/../.. +BFDDIR = $(BASEDIR)/bfd +CONFIG_STATUS_DEPENDENCIES = $(BFDDIR)/configure.in all: all-am .SUFFIXES: -.SUFFIXES: .dvi .info .pdf .ps .texinfo -$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ Makefile.am $(top_srcdir)/configure.in $(ACLOCAL_M4) +.SUFFIXES: .dvi .html .info .pdf .ps .texinfo +$(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(am__configure_deps) + @for dep in $?; do \ + case '$(am__configure_deps)' in \ + *$$dep*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh \ + && exit 0; \ + exit 1;; \ + esac; \ + done; \ + echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign doc/Makefile'; \ cd $(top_srcdir) && \ - $(AUTOMAKE) --cygnus doc/Makefile -Makefile: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.in $(top_builddir)/config.status - cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe) + $(AUTOMAKE) --foreign doc/Makefile +.PRECIOUS: Makefile +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + @case '$?' in \ + *config.status*) \ + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh;; \ + *) \ + echo ' cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe)'; \ + cd $(top_builddir) && $(SHELL) ./config.status $(subdir)/$@ $(am__depfiles_maybe);; \ + esac; + +$(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh + +$(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh +$(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps) + cd $(top_builddir) && $(MAKE) $(AM_MAKEFLAGS) am--refresh mostlyclean-libtool: -rm -f *.lo @@ -264,29 +299,48 @@ distclean-libtool: -rm -f libtool .texinfo.info: - @rm -f $@ $@-[0-9] $@-[0-9][0-9] $(@:.info=).i[0-9] $(@:.info=).i[0-9][0-9] - $(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) \ - -o $@ `test -f '$<' || echo '$(srcdir)/'`$< + restore=: && \ + backupdir="$(am__leading_dot)am$$$$" && \ + am__cwd=`pwd` && cd $(srcdir) && \ + rm -rf $$backupdir && mkdir $$backupdir && \ + for f in $@ $@-[0-9] $@-[0-9][0-9] $(@:.info=).i[0-9] $(@:.info=).i[0-9][0-9]; do \ + if test -f $$f; then \ + mv $$f $$backupdir; \ + restore=mv; \ + fi; \ + done; \ + cd "$$am__cwd"; \ + if $(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) \ + -o $@ $<; \ + then \ + rc=0; \ + cd $(srcdir); \ + else \ + rc=$$?; \ + cd $(srcdir) && \ + $$restore $$backupdir/* `echo "./$@" | sed 's|[^/]*$$||'`; \ + fi; \ + rm -rf $$backupdir; \ + exit $$rc .texinfo.dvi: TEXINPUTS="$(am__TEXINFO_TEX_DIR)$(PATH_SEPARATOR)$$TEXINPUTS" \ MAKEINFO='$(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir)' \ - $(TEXI2DVI) `test -f '$<' || echo '$(srcdir)/'`$< + $(TEXI2DVI) $< .texinfo.pdf: TEXINPUTS="$(am__TEXINFO_TEX_DIR)$(PATH_SEPARATOR)$$TEXINPUTS" \ MAKEINFO='$(MAKEINFO) $(AM_MAKEINFOFLAGS) $(MAKEINFOFLAGS) -I $(srcdir)' \ - $(TEXI2PDF) `test -f '$<' || echo '$(srcdir)/'`$< + $(TEXI2PDF) $< + +.texinfo.html: + $(MAKEINFOHTML) $(AM_MAKEINFOHTMLFLAGS) $(MAKEINFOFLAGS) -I $(srcdir) \ + -o $@ $< + if test ! -d $@ && test -d $(@:.html=); then \ + mv $(@:.html=) $@; else :; fi +$(srcdir)/as.info: as.texinfo as.pdf: as.texinfo - -TEXI2DVI = `if test -f $(top_srcdir)/../texinfo/util/texi2dvi; then \ - echo $(top_srcdir)/../texinfo/util/texi2dvi; \ - else \ - echo texi2dvi; \ - fi` - -TEXI2PDF = $(TEXI2DVI) --pdf --batch -DVIPS = dvips +as.html: as.texinfo .dvi.ps: $(DVIPS) -o $@ $< @@ -313,8 +367,12 @@ uninstall-info-am: done dist-info: $(INFO_DEPS) + @srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`; \ list='$(INFO_DEPS)'; \ for base in $$list; do \ + case $$base in \ + $(srcdir)/*) base=`echo "$$base" | sed "s|^$$srcdirstrip/||"`;; \ + esac; \ if test -f $$base; then d=.; else d=$(srcdir); fi; \ for file in $$d/$$base*; do \ relfile=`expr "$$file" : "$$d/\(.*\)"`; \ @@ -324,8 +382,8 @@ dist-info: $(INFO_DEPS) done mostlyclean-aminfo: - -rm -f as.aux as.cp as.cps as.fn as.fns as.ky as.log as.pg as.pgs as.tmp \ - as.toc as.tp as.tps as.vr as.vrs as.dvi as.pdf as.ps + -rm -rf as.aux as.cp as.cps as.fn as.fns as.ky as.log as.pg as.pgs as.tmp \ + as.toc as.tp as.tps as.vr as.vrs as.dvi as.pdf as.ps as.html maintainer-clean-aminfo: @list='$(INFO_DEPS)'; for i in $$list; do \ @@ -335,11 +393,9 @@ maintainer-clean-aminfo: done clean-info: mostlyclean-aminfo - -man1dir = $(mandir)/man1 install-man1: $(man1_MANS) $(man_MANS) @$(NORMAL_INSTALL) - $(mkinstalldirs) $(DESTDIR)$(man1dir) + $(mkdir_p) $(DESTDIR)$(man1dir) @list='$(man1_MANS) $(dist_man1_MANS) $(nodist_man1_MANS)'; \ l2='$(man_MANS) $(dist_man_MANS) $(nodist_man_MANS)'; \ for i in $$l2; do \ @@ -391,9 +447,9 @@ CTAGS: check-am: check: check-am all-am: Makefile $(MANS) - installdirs: - $(mkinstalldirs) $(DESTDIR)$(man1dir) + $(mkdir_p) $(DESTDIR)$(man1dir) +install: install-am install-exec: install-exec-am install-data: install-data-am uninstall: uninstall-am @@ -404,7 +460,7 @@ install-am: all-am installcheck: installcheck-am install-strip: $(MAKE) $(AM_MAKEFLAGS) INSTALL_PROGRAM="$(INSTALL_STRIP_PROGRAM)" \ - INSTALL_STRIP_FLAG=-s \ + install_sh_PROGRAM="$(INSTALL_STRIP_PROGRAM)" INSTALL_STRIP_FLAG=-s \ `test -z '$(STRIP)' || \ echo "INSTALL_PROGRAM_ENV=STRIPPROG='$(STRIP)'"` install mostlyclean-generic: @@ -431,21 +487,27 @@ dvi: dvi-am dvi-am: $(DVIS) -info: info-am +html: html-am + +html-am: $(HTMLS) info-am: $(INFO_DEPS) -install-data-am: install-man +install-data-am: install-data-local install-man install-exec-am: -install-info: +install-info: install-info-am install-info-am: $(INFO_DEPS) @$(NORMAL_INSTALL) - $(mkinstalldirs) $(DESTDIR)$(infodir) - @list='$(INFO_DEPS)'; \ + $(mkdir_p) $(DESTDIR)$(infodir) + @srcdirstrip=`echo "$(srcdir)" | sed 's|.|.|g'`; \ + list='$(INFO_DEPS)'; \ for file in $$list; do \ + case $$file in \ + $(srcdir)/*) file=`echo "$$file" | sed "s|^$$srcdirstrip/||"`;; \ + esac; \ if test -f $$file; then d=.; else d=$(srcdir); fi; \ file_i=`echo "$$file" | sed 's|\.info$$||;s|$$|.i|'`; \ for ifile in $$d/$$file $$d/$$file-[0-9] $$d/$$file-[0-9][0-9] \ @@ -495,15 +557,15 @@ uninstall-man: uninstall-man1 .PHONY: all all-am check check-am clean clean-generic clean-info \ clean-libtool dist-info distclean distclean-generic \ - distclean-libtool dvi dvi-am info info-am install install-am \ - install-data install-data-am install-exec install-exec-am \ - install-info install-info-am install-man install-man1 \ - install-strip installcheck installcheck-am installdirs \ - maintainer-clean maintainer-clean-aminfo \ - maintainer-clean-generic mostlyclean mostlyclean-aminfo \ - mostlyclean-generic mostlyclean-libtool pdf pdf-am ps ps-am \ - uninstall uninstall-am uninstall-info-am uninstall-man \ - uninstall-man1 + distclean-libtool dvi dvi-am html html-am info info-am install \ + install-am install-data install-data-am install-data-local \ + install-exec install-exec-am install-info install-info-am \ + install-man install-man1 install-strip installcheck \ + installcheck-am installdirs maintainer-clean \ + maintainer-clean-aminfo maintainer-clean-generic mostlyclean \ + mostlyclean-aminfo mostlyclean-generic mostlyclean-libtool pdf \ + pdf-am ps ps-am uninstall uninstall-am uninstall-info-am \ + uninstall-man uninstall-man1 asconfig.texi: $(CONFIG).texi @@ -521,8 +583,7 @@ as.dvi: $(srcdir)/as.texinfo asconfig.texi gasver.texi $(CPU_DOCS) # We want install to imply install-info as per GNU standards, despite the # cygnus option. -install: install-info -install-info: install-info-am +install-data-local: install-info # Maintenance diff --git a/gas/doc/as.texinfo b/gas/doc/as.texinfo index d9d23dff59f..cee3fbfefeb 100644 --- a/gas/doc/as.texinfo +++ b/gas/doc/as.texinfo @@ -263,6 +263,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}. [@b{-march}=@var{architecture}[+@var{extension}@dots{}]] [@b{-mfpu}=@var{floating-point-format}] [@b{-mfloat-abi}=@var{abi}] + [@b{-meabi}=@var{ver}] [@b{-mthumb}] [@b{-EB}|@b{-EL}] [@b{-mapcs-32}|@b{-mapcs-26}|@b{-mapcs-float}| @@ -352,7 +353,7 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}. @emph{Target MIPS options:} [@b{-nocpp}] [@b{-EL}] [@b{-EB}] [@b{-O}[@var{optimization level}]] [@b{-g}[@var{debug level}]] [@b{-G} @var{num}] [@b{-KPIC}] [@b{-call_shared}] - [@b{-non_shared}] [@b{-xgot}] [@b{--membedded-pic}] + [@b{-non_shared}] [@b{-xgot}] [@b{-mabi}=@var{ABI}] [@b{-32}] [@b{-n32}] [@b{-64}] [@b{-mfp32}] [@b{-mgp32}] [@b{-march}=@var{CPU}] [@b{-mtune}=@var{CPU}] [@b{-mips1}] [@b{-mips2}] [@b{-mips3}] [@b{-mips4}] [@b{-mips5}] [@b{-mips32}] [@b{-mips32r2}] @@ -2982,9 +2983,9 @@ data subsections as a data section. To specify which subsection you want subsequent statements assembled into, use a numeric argument to specify it, in a @samp{.text @var{expression}} or a @samp{.data @var{expression}} statement. -@ifset COFF-ELF +@ifset COFF @ifset GENERIC -When generating COFF or ELF output, you +When generating COFF output, you @end ifset @ifclear GENERIC You @@ -2993,6 +2994,16 @@ can also use an extra subsection argument with arbitrary named sections: @samp{.section @var{name}, @var{expression}}. @end ifset +@ifset ELF +@ifset GENERIC +When generating ELF output, you +@end ifset +@ifclear GENERIC +You +@end ifclear +can also use the @code{.subsection} directive (@pxref{SubSection}) +to specify a subsection: @samp{.subsection @var{expression}}. +@end ifset @var{Expression} should be an absolute expression. (@xref{Expressions}.) If you just say @samp{.text} then @samp{.text 0} is assumed. Likewise @samp{.data} means @samp{.data 0}. Assembly @@ -4333,7 +4344,7 @@ partial programs. You may need the HPPA-only @code{.EXPORT} directive as well. @cindex @code{hidden} directive @cindex visibility -This one of the ELF visibility directives. The other two are +This is one of the ELF visibility directives. The other two are @code{.internal} (@pxref{Internal,,@code{.internal}}) and @code{.protected} (@pxref{Protected,,@code{.protected}}). @@ -4509,7 +4520,7 @@ integers. On the H8/300H and the Renesas SH, however, @code{.int} emits @cindex @code{internal} directive @cindex visibility -This one of the ELF visibility directives. The other two are +This is one of the ELF visibility directives. The other two are @code{.hidden} (@pxref{Hidden,,@code{.hidden}}) and @code{.protected} (@pxref{Protected,,@code{.protected}}). @@ -4996,7 +5007,7 @@ assembly. You must put @var{string} in double quotes. @cindex @code{protected} directive @cindex visibility -This one of the ELF visibility directives. The other two are +This is one of the ELF visibility directives. The other two are @code{.hidden} (@pxref{Hidden}) and @code{.internal} (@pxref{Internal}). This directive overrides the named symbols default visibility (which is set by diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi index 23cd7bb3fef..e871d2821b2 100644 --- a/gas/doc/c-arm.texi +++ b/gas/doc/c-arm.texi @@ -228,6 +228,15 @@ The following values are recognized: and @code{hard}. +@cindex @code{-eabi=} command line option, ARM +@item -meabi=@var{ver} +This option specifies which EABI version the produced object files should +conform to. +The following values are recognised: +@code{gnu} +and +@code{3}. + @cindex @code{-EB} command line option, ARM @item -EB This option specifies that the output generated by the assembler should diff --git a/gas/doc/c-hppa.texi b/gas/doc/c-hppa.texi index 0ddda0445c1..9970188ab4f 100644 --- a/gas/doc/c-hppa.texi +++ b/gas/doc/c-hppa.texi @@ -1,4 +1,4 @@ -@c Copyright 1991, 1992, 1993, 1994, 1995, 1998 +@c Copyright 1991, 1992, 1993, 1994, 1995, 1998, 2004 @c Free Software Foundation, Inc. @c This is part of the GAS manual. @c For copying conditions, see the file as.texinfo. @@ -181,7 +181,7 @@ Define @var{name} as a label for the current assembly location. Not yet supported; the assembler rejects programs containing this directive. @item .origin @var{lc} -Advance location counter to @var{lc}. Synonym for the @code{@value{as}} +Advance location counter to @var{lc}. Synonym for the @code{@value{AS}} portable directive @code{.org}. @item .param @var{name} [ ,@var{typ} ] [ ,@var{param}=@var{r} ] @@ -245,14 +245,51 @@ identified by keywords. The keywords recognized are @samp{quad=@var{expr}} beginning of this subsection; a power of two), @samp{access=@var{expr}} (value for ``access rights'' field), @samp{sort=@var{expr}} (sorting order for this subspace in link), @samp{code_only} (subsection contains only code), -@samp{unloadable} (subsection cannot be loaded into memory), @samp{common} -(subsection is common block), @samp{dup_comm} (initialized data may have -duplicate names), or @samp{zero} (subsection is all zeros, do not write in -object file). +@samp{unloadable} (subsection cannot be loaded into memory), @samp{comdat} +(subsection is comdat), @samp{common} (subsection is common block), +@samp{dup_comm} (subsection may have duplicate names), or @samp{zero} +(subsection is all zeros, do not write in object file). @code{.nsubspa} always creates a new subspace with the given name, even if one with the same name already exists. +@samp{comdat}, @samp{common} and @samp{dup_comm} can be used to implement +various flavors of one-only support when using the SOM linker. The SOM +linker only supports specific combinations of these flags. The details +are not documented. A brief description is provided here. + +@samp{comdat} provides a form of linkonce support. It is useful for +both code and data subspaces. A @samp{comdat} subspace has a key symbol +marked by the @samp{is_comdat} flag or @samp{ST_COMDAT}. Only the first +subspace for any given key is selected. The key symbol becomes universal +in shared links. This is similar to the behavior of @samp{secondary_def} +symbols. + +@samp{common} provides Fortran named common support. It is only useful +for data subspaces. Symbols with the flag @samp{is_common} retain this +flag in shared links. Referencing a @samp{is_common} symbol in a shared +library from outside the library doesn't work. Thus, @samp{is_common} +symbols must be output whenever they are needed. + +@samp{common} and @samp{dup_comm} together provide Cobol common support. +The subspaces in this case must all be the same length. Otherwise, this +support is similar to the Fortran common support. + +@samp{dup_comm} by itself provides a type of one-only support for code. +Only the first @samp{dup_comm} subspace is selected. There is a rather +complex algorithm to compare subspaces. Code symbols marked with the +@samp{dup_common} flag are hidden. This support was intended for "C++ +duplicate inlines". + +A simplified technique is used to mark the flags of symbols based on +the flags of their subspace. A symbol with the scope SS_UNIVERSAL and +type ST_ENTRY, ST_CODE or ST_DATA is marked with the corresponding +settings of @samp{comdat}, @samp{common} and @samp{dup_comm} from the +subspace, respectively. This avoids having to introduce additional +directives to mark these symbols. The HP assembler sets @samp{is_common} +from @samp{common}. However, it doesn't set the @samp{dup_common} from +@samp{dup_comm}. It doesn't have @samp{comdat} support. + @item .version "@var{str}" Write @var{str} as version identifier in object code. @end table diff --git a/gas/doc/c-m32r.texi b/gas/doc/c-m32r.texi index 4360ee6156f..52a73c38700 100644 --- a/gas/doc/c-m32r.texi +++ b/gas/doc/c-m32r.texi @@ -1,4 +1,5 @@ -@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2003 +@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000, +@c 2003, 2004 @c Free Software Foundation, Inc. @c This is part of the GAS manual. @c For copying conditions, see the file as.texinfo. @@ -91,6 +92,12 @@ do so. @cindex @code{-no-parallel} option, M32RX This option disables a previously enabled @emph{-parallel} option. +@item -no-bitinst +@cindex @samp{-no-bitinst}, M32R2 +This option disables the support for the extended bit-field +instructions provided by the M32R2. If this support needs to be +re-enabled the @emph{-bitinst} switch can be used to restore it. + @item -O @cindex @code{-O} option, M32RX This option tells the assembler to attempt to optimize the diff --git a/gas/doc/c-mips.texi b/gas/doc/c-mips.texi index dbea72300b1..1375230a673 100644 --- a/gas/doc/c-mips.texi +++ b/gas/doc/c-mips.texi @@ -122,11 +122,11 @@ This tells the assembler to accept MDMX instructions. Cause nops to be inserted if the read of the destination register of an mfhi or mflo instruction occurs in the following two instructions. -@item -mfix-vr4122-bugs -@itemx -no-mfix-vr4122-bugs -Insert @samp{nop} instructions to avoid errors in certain versions of -the vr4122 core. This option is intended to be used on GCC-generated -code: it is not designed to catch errors in hand-written assembler code. +@item -mfix-vr4120 +@itemx -no-mfix-vr4120 +Insert nops to work around certain VR4120 errata. This option is +intended to be used on GCC-generated code: it is not designed to catch +all problems in hand-written assembler code. @item -m4010 @itemx -no-m4010 diff --git a/gas/doc/c-sh.texi b/gas/doc/c-sh.texi index 509106fbb95..b08f325ee08 100644 --- a/gas/doc/c-sh.texi +++ b/gas/doc/c-sh.texi @@ -29,6 +29,7 @@ @kindex -relax @kindex -small @kindex -dsp +@kindex -renesas @item -little Generate little endian code. @@ -45,6 +46,10 @@ Align sections to 4 byte boundaries, not 16. @item -dsp Enable sh-dsp insns, and disable sh3e / sh4 insns. +@item -renesas +Disable optimization with section symbol for compatibility with +Renesas assembler. + @item -isa=sh4 | sh4a Specify the sh4 or sh4a instruction set. @item -isa=dsp diff --git a/gas/dw2gencfi.c b/gas/dw2gencfi.c index 3be7e20f5d2..ff0aa35353d 100644 --- a/gas/dw2gencfi.c +++ b/gas/dw2gencfi.c @@ -857,6 +857,7 @@ output_cie (struct cie_entry *cie) for (i = cie->first; i != cie->last; i = i->next) output_cfi_insn (i); + frag_align (2, 0, 0); symbol_set_value_now (end_address); } @@ -906,8 +907,7 @@ output_fde (struct fde_entry *fde, struct cie_entry *cie, for (; first; first = first->next) output_cfi_insn (first); - if (align) - frag_align (align, 0, 0); + frag_align (align, 0, 0); symbol_set_value_now (end_address); } @@ -1035,7 +1035,7 @@ cfi_finish (void) struct cie_entry *cie; cie = select_cie_for_fde (fde, &first); - output_fde (fde, cie, first, fde->next == NULL ? EH_FRAME_ALIGNMENT : 0); + output_fde (fde, cie, first, fde->next == NULL ? EH_FRAME_ALIGNMENT : 2); } flag_traditional_format = save_flag_traditional_format; diff --git a/gas/dwarf2dbg.c b/gas/dwarf2dbg.c index 3336453a4ee..59da56ab55a 100644 --- a/gas/dwarf2dbg.c +++ b/gas/dwarf2dbg.c @@ -1371,7 +1371,7 @@ dwarf2_finish (void) /* Create and switch to the line number section. */ line_seg = subseg_new (".debug_line", 0); - bfd_set_section_flags (stdoutput, line_seg, SEC_READONLY); + bfd_set_section_flags (stdoutput, line_seg, SEC_READONLY | SEC_DEBUGGING); /* For each subsection, chain the debug entries together. */ for (s = all_segs; s; s = s->next) @@ -1400,9 +1400,12 @@ dwarf2_finish (void) abbrev_seg = subseg_new (".debug_abbrev", 0); aranges_seg = subseg_new (".debug_aranges", 0); - bfd_set_section_flags (stdoutput, info_seg, SEC_READONLY); - bfd_set_section_flags (stdoutput, abbrev_seg, SEC_READONLY); - bfd_set_section_flags (stdoutput, aranges_seg, SEC_READONLY); + bfd_set_section_flags (stdoutput, info_seg, + SEC_READONLY | SEC_DEBUGGING); + bfd_set_section_flags (stdoutput, abbrev_seg, + SEC_READONLY | SEC_DEBUGGING); + bfd_set_section_flags (stdoutput, aranges_seg, + SEC_READONLY | SEC_DEBUGGING); record_alignment (aranges_seg, ffs (2 * sizeof_address) - 1); diff --git a/gas/ecoff.c b/gas/ecoff.c index 1de823e24df..d8ad019a72c 100644 --- a/gas/ecoff.c +++ b/gas/ecoff.c @@ -3685,6 +3685,8 @@ ecoff_build_lineno (const struct ecoff_debug_swap *backend, iline = 0; totcount = 0; + /* FIXME? Now that MIPS embedded-PIC is gone, it may be safe to + remove this code. */ /* For some reason the address of the first procedure is ignored when reading line numbers. This doesn't matter if the address of the first procedure is 0, but when gcc is generating MIPS diff --git a/gas/expr.c b/gas/expr.c index a18d6d87c0d..19e3f1c0387 100644 --- a/gas/expr.c +++ b/gas/expr.c @@ -1021,6 +1021,9 @@ operand (expressionS *expressionP) break; case '+': + /* Do not accept ++e as +(+e) */ + if (*input_line_pointer == '+') + goto target_op; (void) operand (expressionP); break; @@ -1038,6 +1041,10 @@ operand (expressionS *expressionP) case '!': case '-': { + /* Do not accept --e as -(-e) */ + if (c == '-' && *input_line_pointer == '-') + goto target_op; + operand (expressionP); if (expressionP->X_op == O_constant) { @@ -1289,6 +1296,7 @@ operand (expressionS *expressionP) } else { + target_op: /* Let the target try to parse it. Success is indicated by changing the X_op field to something other than O_absent and pointing input_line_pointer past the expression. If it can't parse the @@ -1541,6 +1549,13 @@ operator (int *num_chars) default: return op_encoding[c]; + case '+': + case '-': + /* Do not allow a++b and a--b to be a + (+b) and a - (-b) */ + if (input_line_pointer[1] != c) + return op_encoding[c]; + return O_illegal; + case '<': switch (input_line_pointer[1]) { diff --git a/gas/mac-as.r b/gas/mac-as.r deleted file mode 100644 index f36c033cb07..00000000000 --- a/gas/mac-as.r +++ /dev/null @@ -1,42 +0,0 @@ -/* Resources for GNU AS. */ - -#include "SysTypes.r" - -/* Version resources. */ - -resource 'vers' (1) { - 0, - 0, - 0, - 0, - verUs, - VERSION_STRING, - VERSION_STRING " (C) 1986-95 FSF, Inc." -}; - -resource 'vers' (2, purgeable) { - 0, - 0, - 0, - 0, - verUs, - VERSION_STRING, - "GAS " VERSION_STRING " for MPW" -}; - -#ifdef WANT_CFRG - -#include "CodeFragmentTypes.r" - -resource 'cfrg' (0) { - { - kPowerPC, - kFullLib, - kNoVersionNum, kNoVersionNum, - 0,0, - kIsApp, kOnDiskFlat, kZeroOffset, kWholeFork, - PROG_NAME - } -}; - -#endif /* WANT_CFRG */ diff --git a/gas/mpw-config.in b/gas/mpw-config.in deleted file mode 100644 index 9e29b1d945c..00000000000 --- a/gas/mpw-config.in +++ /dev/null @@ -1,115 +0,0 @@ -# Configuration fragment for GAS. - -Set target_arch `echo {target_canonical} | sed -e 's/-.*-.*//'` - -If "{target_arch}" =~ /powerpc/ - Set short_arch_name "ppc" - Set target_cpu "powerpc" -Else - Set short_arch_name "{target_arch}" -End If - -# The following works for many configurations, though not all. - -Set obj_format `echo {target_canonical} | sed -e 's/.*-.*-//'` -Set target_os `echo {target_canonical} | sed -e 's/.*-.*-//'` - -Set bfd_gas no - -Set TDEFINES "" - -Set EXTRA_OBJECTS "" - -# Default emulation. - -Set em generic - -If "{target_canonical}" =~ /m68k-apple-macos/ - Set obj_format "coff" - Set TDEFINES '-d M68KCOFF' - Set EXTRA_OBJECTS '"{o}"m68k-parse.c.o' - -Else If "{target_canonical}" =~ /powerpc-apple-macos/ - Set obj_format "coff" - Set bfd_gas yes - Set em macos - -Else If "{target_canonical}" =~ /i386-\Option-x-go32/ - Set obj_format "coff" - Set TDEFINES '-d I386COFF' - -Else If "{target_canonical}" =~ /m68k-\Option-x-coff/ - Set TDEFINES '-d M68KCOFF' - -Else If "{target_canonical}" =~ /mips-idt-ecoff/ - Set bfd_gas yes - Set TDEFINES '-d TARGET_BYTES_BIG_ENDIAN=1' - -Else If "{target_canonical}" =~ /mips-\Option-x-\Option-x/ - # Assume other OSes etc use ELF - Set obj_format "elf" - Set bfd_gas yes - Set TDEFINES '-d TARGET_BYTES_BIG_ENDIAN=1' - forward-include "{srcroot}"bfd:elf-bfd.h 'bfd/elf-bfd.h' - -Else If "{target_canonical}" =~ /sh-\Option-x-hms/ - Set obj_format "coff" - forward-include "{srcroot}"opcodes:sh-opc.h 'opcodes/sh-opc.h' -End If - -forward-include "{srcdir}"config:tc-{short_arch_name}.c targ-cpu.c -forward-include "{srcdir}"config:tc-{short_arch_name}.h targ-cpu.h - -forward-include "{srcdir}"config:obj-{obj_format}.c obj-format.c -forward-include "{srcdir}"config:obj-{obj_format}.h obj-format.h - -forward-include "{srcdir}"config:te-{em}.h targ-env.h - -# Special cases for float handling. - -If "{target_arch}" =~ /ns32k/ - forward-include "{srcdir}"config:atof-ns32k.c atof-targ.c -Else If "{target_arch}" =~ /tahoe/ - forward-include "{srcdir}"config:atof-tahoe.c atof-targ.c -Else If "{target_arch}" =~ /vax/ - forward-include "{srcdir}"config:atof-vax.c atof-targ.c -Else - # Use IEEE by default. - forward-include "{srcdir}"config:atof-ieee.c atof-targ.c -End If - -Echo '# From mpw-config.in' > "{o}"mk.tmp -Echo "TDEFINES = " {TDEFINES} >> "{o}"mk.tmp -Echo "EXTRA_OBJECTS = " {EXTRA_OBJECTS} >> "{o}"mk.tmp -# (We use the -n option here so as not to get extra spaces inserted) -Echo -n 'TARG_CPU_DEP = {TARG_CPU_DEP_' >> "{o}"mk.tmp -Echo -n {short_arch_name} >> "{o}"mk.tmp -Echo -n '}' >> "{o}"mk.tmp -Echo '# End from mpw-config.in' >> "{o}"mk.tmp - -Echo '/* conf. Generated by mpw-configure. */' > "{o}"conf.new -Echo -n '#define TARGET_CPU "' >> "{o}"conf.new -Echo -n "{target_cpu}" >> "{o}"conf.new -Echo '"' >> "{o}"conf.new -Echo -n '#define TARGET_OS "' >> "{o}"conf.new -Echo -n "{target_os}" >> "{o}"conf.new -Echo '"' >> "{o}"conf.new -Echo -n '#define TARGET_ALIAS "' >> "{o}"conf.new -Echo -n "{target_alias}" >> "{o}"conf.new -Echo '"' >> "{o}"conf.new -Echo -n '#define TARGET_CANONICAL "' >> "{o}"conf.new -Echo -n "{target_canonical}" >> "{o}"conf.new -Echo '"' >> "{o}"conf.new -Echo '#include "mpw.h"' >> "{o}"conf.new -If "{bfd_gas}" =~ /yes/ - Echo "#define BFD_ASSEMBLER" >> "{o}"conf.new -Else - Echo "#define MANY_SEGMENTS" >> "{o}"conf.new -End If -Echo '#define CR_EOL' >> "{o}"conf.new -Echo '#define OBJ_COFF_OMIT_TIMESTAMP' >> "{o}"conf.new -Echo '#define LOSING_COMPILER' >> "{o}"conf.new - -MoveIfChange "{o}"conf.new "{o}"conf - -sed -e "s/@srcdir@/{srcdir}/" "{srcdir}"gdbinit.in > "{o}"_gdbinit diff --git a/gas/mpw-make.sed b/gas/mpw-make.sed deleted file mode 100644 index 3bcb0ce758f..00000000000 --- a/gas/mpw-make.sed +++ /dev/null @@ -1,96 +0,0 @@ -# Sed commands that finish translating the GAS Unix Makefile to MPW syntax. - -/^# @target_frag@/a\ -\ -HDEFINES = \ -LOCAL_LOADLIBES = \ - -/^srcroot = /s/^/#/ -/^target_alias = /s/^/#/ - -/INCLUDES/s/-i "{srcdir}":\([a-z]*\)/-i "{topsrcdir}"\1/ -/INCLUDES/s/-i "{srcdir}"\.\./-i "{topsrcdir}"/ - -/^INCLUDES = .*$/s/$/ -i "{topsrcdir}"include:mpw: -i ::extra-include:/ - -/$(TARG_CPU_DEP_@target_cpu_type@)/s/$(TARG_CPU_DEP_@target_cpu_type@)/{TARG_CPU_DEP}/ - -/@OPCODES_LIB@/s/@OPCODES_LIB@/::opcodes:libopcodes.o/ -/@BFDLIB@/s/@BFDLIB@/::bfd:libbfd.o/ - -# Point at the libraries directly. -/@OPCODES_DEP@/s/@OPCODES_DEP@/::opcodes:libopcodes.o/ -/@BFDDEP@/s/@BFDDEP@/::bfd:libbfd.o/ - -# Don't need this. -/@HLDFLAGS@/s/@HLDFLAGS@// - -/extra_objects@/s/extra_objects@/{EXTRA_OBJECTS}/ - -/LOADLIBES/s/{LOADLIBES}/{EXTRALIBS}/ - -/@ALL_OBJ_DEPS@/s/@ALL_OBJ_DEPS@/::bfd:bfd.h/ - -# This causes problems - not sure why. -/^tags TAGS/,/etags /d - -/^make-gas.com/s/^/#/ - -/true/s/ ; @true$// - -# Remove references to conf.in, we don't need them. -/conf\.in/s/conf\.in//g - -# Use _gdbinit everywhere instead of .gdbinit. -/gdbinit/s/\.gdbinit/_gdbinit/g - -/atof-targ/s/"{s}"atof-targ\.c/"{o}"atof-targ.c/g -/config/s/"{s}"config\.h/"{o}"config.h/g -/config/s/^config\.h/"{o}"config.h/ -/obj-format/s/"{s}"obj-format\.c/"{o}"obj-format.c/g -/obj-format/s/"{s}"obj-format\.h/"{o}"obj-format.h/g -/targ-cpu/s/"{s}"targ-cpu\.c/"{o}"targ-cpu.c/g -/targ-cpu/s/"{s}"targ-cpu\.h/"{o}"targ-cpu.h/g -/targ-env/s/"{s}"targ-env\.h/"{o}"targ-env.h/g - -/m68k-parse.c/s/"{s}"m68k-parse\.c/"{o}"m68k-parse.c/g -/m68k-parse.c/s/^m68k-parse\.c/"{o}"m68k-parse.c/ - -# Whack out the config.h dependency, it only causes excess rebuilds. -/{OBJS}/s/{OBJS} \\Option-f "{o}"config.h/{OBJS} \\Option-f/ - -# ALL_CFLAGS includes TDEFINES, which is not desirable at link time. -/CC_LD/s/ALL_CFLAGS/CFLAGS/g - -# The resource file is called mac-as.r. -/as.new.r/s/as\.new\.r/mac-as.r/ - -# ...and the PROG_NAME doesn't have a .new in it. -/PROG_NAME/s/PROG_NAME='"'as.new'"'/PROG_NAME='"'as'"'/ - -# Whack out recursive makes, they won't work. -/^[ ][ ]*srcroot=/,/^[ ][ ]*(cd /d - -# Work around quoting problems by using multiple echo commands. -/'#define GAS_VERSION "{VERSION}"'/c\ - Echo -n '#define GAS_VERSION "' >> "{o}"config.new\ - Echo -n "{VERSION}" >> "{o}"config.new\ - Echo -n '"' >> "{o}"config.new - -# Add a "stamps" target. -$a\ -stamps \\Option-f config-stamp\ - -/^install \\Option-f/,/^$/c\ -install \\Option-f all install-only\ -\ -install-only \\Option-f\ - NewFolderRecursive "{bindir}"\ - Duplicate -y :as.new "{bindir}"as\ - - -# Whack out config-rebuilding targets, they won't work. -/^Makefile \\Option-f/,/^$/d -/^config.status \\Option-f/,/^$/d - -/^"{o}"config.h \\Option-f/s/^/#/ diff --git a/gas/po/gas.pot b/gas/po/gas.pot index ae3cbabd833..cd983b3480c 100644 --- a/gas/po/gas.pot +++ b/gas/po/gas.pot @@ -1,12 +1,14 @@ # SOME DESCRIPTIVE TITLE. -# Copyright (C) YEAR Free Software Foundation, Inc. +# Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER +# This file is distributed under the same license as the PACKAGE package. # FIRST AUTHOR <EMAIL@ADDRESS>, YEAR. # #, fuzzy msgid "" msgstr "" "Project-Id-Version: PACKAGE VERSION\n" -"POT-Creation-Date: 2003-07-17 14:56+0100\n" +"Report-Msgid-Bugs-To: \n" +"POT-Creation-Date: 2004-03-19 15:01+1030\n" "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n" "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n" "Language-Team: LANGUAGE <LL@li.org>\n" @@ -14,72 +16,73 @@ msgstr "" "Content-Type: text/plain; charset=CHARSET\n" "Content-Transfer-Encoding: 8bit\n" -#: app.c:474 app.c:488 +#: app.c:468 app.c:482 msgid "end of file in comment" msgstr "" -#: app.c:567 +#: app.c:561 msgid "end of file in string; inserted '\"'" msgstr "" -#: app.c:612 +#: app.c:606 msgid "end of file in string; '\"' inserted" msgstr "" -#: app.c:638 +#: app.c:632 #, c-format msgid "unknown escape '\\%c' in string; ignored" msgstr "" -#: app.c:790 +#: app.c:788 msgid "end of file not at end of a line; newline inserted" msgstr "" -#: app.c:949 +#: app.c:947 msgid "end of file in multiline comment" msgstr "" -#: app.c:1013 +#: app.c:1011 msgid "end of file after a one-character quote; \\0 inserted" msgstr "" -#: app.c:1021 +#: app.c:1019 msgid "end of file in escape character" msgstr "" -#: app.c:1033 +#: app.c:1031 msgid "missing close quote; (assumed)" msgstr "" -#: app.c:1101 app.c:1155 app.c:1166 app.c:1231 +#: app.c:1099 app.c:1153 app.c:1164 app.c:1229 msgid "end of file in comment; newline inserted" msgstr "" -#: as.c:160 +#: as.c:158 msgid "missing emulation mode name" msgstr "" -#: as.c:175 +#: as.c:173 #, c-format msgid "unrecognized emulation name `%s'" msgstr "" -#: as.c:222 +#: as.c:221 #, c-format msgid "GNU assembler version %s (%s) using BFD version %s" msgstr "" -#: as.c:225 +#: as.c:224 #, c-format msgid "GNU assembler version %s (%s)" msgstr "" -#: as.c:234 +#: as.c:232 #, c-format msgid "Usage: %s [option...] [asmfile...]\n" msgstr "" -#: as.c:236 +#: as.c:234 +#, c-format msgid "" "Options:\n" " -a[sub-option...]\t turn on listings\n" @@ -94,122 +97,154 @@ msgid "" " \t =FILE list to FILE (must be last sub-option)\n" msgstr "" -#: as.c:249 +#: as.c:247 +#, c-format msgid " -D produce assembler debugging messages\n" msgstr "" -#: as.c:251 +#: as.c:249 +#, c-format msgid " --defsym SYM=VAL define symbol SYM to given value\n" msgstr "" -#: as.c:267 +#: as.c:265 #, c-format msgid " emulate output (default %s)\n" msgstr "" -#: as.c:272 +#: as.c:270 +#, c-format msgid " --execstack require executable stack for this object\n" msgstr "" -#: as.c:274 +#: as.c:272 +#, c-format msgid "" " --noexecstack don't require executable stack for this object\n" msgstr "" -#: as.c:277 +#: as.c:275 +#, c-format msgid " -f skip whitespace and comment preprocessing\n" msgstr "" -#: as.c:279 +#: as.c:277 +#, c-format msgid " --gstabs generate stabs debugging information\n" msgstr "" +#: as.c:279 +#, c-format +msgid "" +" --gstabs+ generate stabs debug info with GNU extensions\n" +msgstr "" + #: as.c:281 +#, c-format msgid " --gdwarf2 generate DWARF2 debugging information\n" msgstr "" #: as.c:283 +#, c-format msgid " --help show this message and exit\n" msgstr "" #: as.c:285 +#, c-format msgid " --target-help show target specific options\n" msgstr "" #: as.c:287 +#, c-format msgid "" " -I DIR add DIR to search list for .include directives\n" msgstr "" #: as.c:289 +#, c-format msgid " -J don't warn about signed overflow\n" msgstr "" #: as.c:291 +#, c-format msgid "" " -K warn when differences altered for long " "displacements\n" msgstr "" #: as.c:293 +#, c-format msgid " -L,--keep-locals keep local symbols (e.g. starting with `L')\n" msgstr "" #: as.c:295 +#, c-format msgid " -M,--mri assemble in MRI compatibility mode\n" msgstr "" #: as.c:297 +#, c-format msgid "" " --MD FILE write dependency information in FILE (default " "none)\n" msgstr "" #: as.c:299 +#, c-format msgid " -nocpp ignored\n" msgstr "" #: as.c:301 +#, c-format msgid "" " -o OBJFILE name the object-file output OBJFILE (default a." "out)\n" msgstr "" #: as.c:303 +#, c-format msgid " -R fold data section into text section\n" msgstr "" #: as.c:305 +#, c-format msgid "" " --statistics print various measured statistics from execution\n" msgstr "" #: as.c:307 +#, c-format msgid " --strip-local-absolute strip local absolute symbols\n" msgstr "" #: as.c:309 +#, c-format msgid "" " --traditional-format Use same format as native assembler when possible\n" msgstr "" #: as.c:311 +#, c-format msgid " --version print assembler version number and exit\n" msgstr "" #: as.c:313 +#, c-format msgid " -W --no-warn suppress warnings\n" msgstr "" #: as.c:315 +#, c-format msgid " --warn don't suppress warnings\n" msgstr "" #: as.c:317 +#, c-format msgid " --fatal-warnings treat warnings as errors\n" msgstr "" #: as.c:319 +#, c-format msgid "" " --itbl INSTTBL extend instruction set to include instructions\n" " matching the specifications defined in file " @@ -217,18 +252,22 @@ msgid "" msgstr "" #: as.c:322 +#, c-format msgid " -w ignored\n" msgstr "" #: as.c:324 +#, c-format msgid " -X ignored\n" msgstr "" #: as.c:326 +#, c-format msgid " -Z generate object file even after errors\n" msgstr "" #: as.c:328 +#, c-format msgid "" " --listing-lhs-width set the width in words of the output data column " "of\n" @@ -236,6 +275,7 @@ msgid "" msgstr "" #: as.c:331 +#, c-format msgid "" " --listing-lhs-width2 set the width in words of the continuation lines\n" " of the output data column; ignored if smaller " @@ -244,12 +284,14 @@ msgid "" msgstr "" #: as.c:335 +#, c-format msgid "" " --listing-rhs-width set the max width in characters of the lines from\n" " the source file\n" msgstr "" #: as.c:338 +#, c-format msgid "" " --listing-cont-lines set the maximum number of continuation lines used\n" " for the output data column of the listing\n" @@ -260,90 +302,92 @@ msgstr "" msgid "Report bugs to %s\n" msgstr "" -#: as.c:557 as.c:559 +#: as.c:561 as.c:563 #, c-format msgid "GNU assembler %s\n" msgstr "" -#: as.c:561 +#: as.c:565 +#, c-format msgid "Copyright 2002 Free Software Foundation, Inc.\n" msgstr "" -#: as.c:562 +#: as.c:566 +#, c-format msgid "" "This program is free software; you may redistribute it under the terms of\n" "the GNU General Public License. This program has absolutely no warranty.\n" msgstr "" -#: as.c:565 +#: as.c:569 #, c-format msgid "This assembler was configured for a target of `%s'.\n" msgstr "" -#: as.c:572 +#: as.c:576 msgid "multiple emulation names specified" msgstr "" -#: as.c:574 +#: as.c:578 msgid "emulations not handled in this configuration" msgstr "" -#: as.c:579 +#: as.c:583 #, c-format msgid "alias = %s\n" msgstr "" -#: as.c:580 +#: as.c:584 #, c-format msgid "canonical = %s\n" msgstr "" -#: as.c:581 +#: as.c:585 #, c-format msgid "cpu-type = %s\n" msgstr "" -#: as.c:583 +#: as.c:587 #, c-format msgid "format = %s\n" msgstr "" -#: as.c:586 +#: as.c:590 #, c-format msgid "bfd-target = %s\n" msgstr "" -#: as.c:599 +#: as.c:603 msgid "bad defsym; format is --defsym name=value" msgstr "" -#: as.c:623 +#: as.c:627 msgid "no file name following -t option" msgstr "" -#: as.c:638 +#: as.c:642 #, c-format msgid "failed to read instruction table %s\n" msgstr "" -#: as.c:765 +#: as.c:770 #, c-format msgid "invalid listing option `%c'" msgstr "" -#: as.c:984 +#: as.c:829 #, c-format -msgid "%d warnings, treating warnings as errors" +msgid "%s: total time in assembly: %ld.%06ld\n" msgstr "" -#: as.c:1015 +#: as.c:832 #, c-format -msgid "%s: total time in assembly: %ld.%06ld\n" +msgid "%s: data size %ld\n" msgstr "" -#: as.c:1018 +#: as.c:1143 #, c-format -msgid "%s: data size %ld\n" +msgid "%d warnings, treating warnings as errors" msgstr "" #: as.h:216 @@ -355,71 +399,71 @@ msgstr "" #. * We have a GROSS internal error. #. * This should never happen. #. -#: atof-generic.c:437 config/tc-m68k.c:2869 +#: atof-generic.c:433 config/tc-m68k.c:3002 msgid "failed sanity check" msgstr "" -#: cond.c:83 +#: cond.c:82 msgid "invalid identifier for \".ifdef\"" msgstr "" -#: cond.c:151 +#: cond.c:149 msgid "non-constant expression in \".if\" statement" msgstr "" -#: cond.c:247 +#: cond.c:242 msgid "bad format for ifc or ifnc" msgstr "" -#: cond.c:278 +#: cond.c:272 msgid "\".elseif\" without matching \".if\"" msgstr "" -#: cond.c:282 +#: cond.c:276 msgid "\".elseif\" after \".else\"" msgstr "" -#: cond.c:285 cond.c:393 +#: cond.c:279 cond.c:385 msgid "here is the previous \"else\"" msgstr "" -#: cond.c:288 cond.c:396 +#: cond.c:282 cond.c:388 msgid "here is the previous \"if\"" msgstr "" -#: cond.c:317 +#: cond.c:311 msgid "non-constant expression in \".elseif\" statement" msgstr "" -#: cond.c:356 +#: cond.c:349 msgid "\".endif\" without \".if\"" msgstr "" -#: cond.c:386 +#: cond.c:378 msgid "\".else\" without matching \".if\"" msgstr "" -#: cond.c:390 +#: cond.c:382 msgid "duplicate \"else\"" msgstr "" -#: cond.c:442 +#: cond.c:433 msgid ".ifeqs syntax error" msgstr "" -#: cond.c:525 +#: cond.c:514 msgid "end of macro inside conditional" msgstr "" -#: cond.c:527 +#: cond.c:516 msgid "end of file inside conditional" msgstr "" -#: cond.c:530 +#: cond.c:519 msgid "here is the start of the unterminated conditional" msgstr "" -#: cond.c:534 +#: cond.c:523 msgid "here is the \"else\" of the unterminated conditional" msgstr "" @@ -452,17 +496,17 @@ msgstr "" msgid "%s: bad type for weak symbol" msgstr "" -#: config/obj-aout.c:458 config/obj-coff.c:2945 write.c:1931 +#: config/obj-aout.c:458 config/obj-coff.c:2945 write.c:1896 #, c-format msgid "%s: global symbols not supported in common sections" msgstr "" -#: config/obj-aout.c:524 +#: config/obj-aout.c:528 #, c-format msgid "Local symbol %s never defined." msgstr "" -#: config/obj-bout.c:319 config/obj-vms.c:629 +#: config/obj-bout.c:319 config/obj-vms.c:459 #, c-format msgid "Local symbol %s never defined" msgstr "" @@ -482,7 +526,7 @@ msgstr "" msgid ".ln pseudo-op inside .def/.endef: ignored." msgstr "" -#: config/obj-coff.c:546 ecoff.c:3278 +#: config/obj-coff.c:546 ecoff.c:3243 msgid ".loc outside of .text" msgstr "" @@ -557,13 +601,13 @@ msgstr "" msgid "unsupported section attribute '%c'" msgstr "" -#: config/obj-coff.c:1487 config/obj-coff.c:3759 config/tc-ppc.c:4508 +#: config/obj-coff.c:1487 config/obj-coff.c:3759 config/tc-ppc.c:4594 #, c-format msgid "unknown section attribute '%c'" msgstr "" -#: config/obj-coff.c:1517 config/tc-ppc.c:4526 config/tc-tic54x.c:4339 -#: read.c:2562 +#: config/obj-coff.c:1517 config/tc-ppc.c:4612 config/tc-tic54x.c:4339 +#: read.c:2444 #, c-format msgid "error setting flags for \"%s\": %s" msgstr "" @@ -579,6 +623,7 @@ msgid "0x%lx: \"%s\" type = %ld, class = %d, segment = %d\n" msgstr "" #: config/obj-coff.c:1849 config/obj-ieee.c:69 +#, c-format msgid "Out of step\n" msgstr "" @@ -587,10 +632,11 @@ msgid "bfd_coff_swap_scnhdr_out failed" msgstr "" #: config/obj-coff.c:2507 +#, c-format msgid "`.bf' symbol without preceding function\n" msgstr "" -#: config/obj-coff.c:3457 config/obj-ieee.c:521 +#: config/obj-coff.c:3457 config/obj-ieee.c:517 #, c-format msgid "FATAL: Can't create %s" msgstr "" @@ -605,7 +651,7 @@ msgstr "" msgid "Too many new sections; can't add \"%s\"" msgstr "" -#: config/obj-coff.c:4057 config/tc-sparc.c:3635 +#: config/obj-coff.c:4057 config/tc-sparc.c:3646 msgid "Expected comma after name" msgstr "" @@ -664,181 +710,158 @@ msgstr "" msgid "Can't set register masks" msgstr "" -#: config/obj-elf.c:316 -msgid "expected comma after symbol-name" -msgstr "" - -#: config/obj-elf.c:326 -#, c-format -msgid ".COMMon length (%ld) out of range, ignored." -msgstr "" - -#: config/obj-elf.c:335 ecoff.c:3397 read.c:1406 read.c:1507 read.c:2145 -#: read.c:2234 read.c:2863 read.c:4968 symbols.c:367 symbols.c:466 -#, c-format -msgid "symbol `%s' is already defined" -msgstr "" - -#: config/obj-elf.c:343 -#, c-format -msgid "length of .comm \"%s\" is already %ld; not changed to %ld" -msgstr "" - -#: config/obj-elf.c:367 -msgid "common alignment negative; 0 assumed" -msgstr "" - -#: config/obj-elf.c:386 -msgid "common alignment not a power of 2" -msgstr "" - -#: config/obj-elf.c:449 config/tc-sparc.c:3931 config/tc-v850.c:461 +#: config/obj-elf.c:301 config/tc-sparc.c:3942 config/tc-v850.c:461 #, c-format msgid "bad .common segment %s" msgstr "" -#: config/obj-elf.c:717 +#: config/obj-elf.c:548 #, c-format msgid "setting incorrect section type for %s" msgstr "" -#: config/obj-elf.c:721 +#: config/obj-elf.c:553 #, c-format msgid "ignoring incorrect section type for %s" msgstr "" -#: config/obj-elf.c:734 +#: config/obj-elf.c:585 #, c-format msgid "setting incorrect section attributes for %s" msgstr "" -#: config/obj-elf.c:786 +#: config/obj-elf.c:644 #, c-format msgid "ignoring changed section attributes for %s" msgstr "" -#: config/obj-elf.c:788 +#: config/obj-elf.c:646 #, c-format msgid "ignoring changed section entity size for %s" msgstr "" -#: config/obj-elf.c:791 +#: config/obj-elf.c:649 #, c-format msgid "ignoring new section group for %s" msgstr "" -#: config/obj-elf.c:845 +#: config/obj-elf.c:701 msgid "unrecognized .section attribute: want a,w,x,M,S,G,T" msgstr "" -#: config/obj-elf.c:884 +#: config/obj-elf.c:738 msgid "unrecognized section attribute" msgstr "" -#: config/obj-elf.c:906 read.c:2545 +#: config/obj-elf.c:760 read.c:2427 msgid "unrecognized section type" msgstr "" -#: config/obj-elf.c:936 +#: config/obj-elf.c:790 msgid "missing name" msgstr "" -#: config/obj-elf.c:1048 +#: config/obj-elf.c:901 msgid "invalid merge entity size" msgstr "" -#: config/obj-elf.c:1055 +#: config/obj-elf.c:908 msgid "entity size for SHF_MERGE not specified" msgstr "" -#: config/obj-elf.c:1075 +#: config/obj-elf.c:928 msgid "group name for SHF_GROUP not specified" msgstr "" -#: config/obj-elf.c:1088 +#: config/obj-elf.c:941 msgid "character following name is not '#'" msgstr "" -#: config/obj-elf.c:1189 +#: config/obj-elf.c:1038 msgid ".previous without corresponding .section; ignored" msgstr "" -#: config/obj-elf.c:1216 +#: config/obj-elf.c:1064 msgid ".popsection without corresponding .pushsection; ignored" msgstr "" -#: config/obj-elf.c:1270 +#: config/obj-elf.c:1116 msgid "expected comma after name in .symver" msgstr "" -#: config/obj-elf.c:1294 +#: config/obj-elf.c:1140 #, c-format msgid "missing version name in `%s' for symbol `%s'" msgstr "" -#: config/obj-elf.c:1305 +#: config/obj-elf.c:1151 #, c-format msgid "multiple versions [`%s'|`%s'] for symbol `%s'" msgstr "" -#: config/obj-elf.c:1541 +#: config/obj-elf.c:1381 msgid "expected quoted string" msgstr "" -#: config/obj-elf.c:1562 +#: config/obj-elf.c:1401 #, c-format msgid "expected comma after name `%s' in .size directive" msgstr "" -#: config/obj-elf.c:1571 +#: config/obj-elf.c:1410 msgid "missing expression in .size directive" msgstr "" -#: config/obj-elf.c:1660 +#: config/obj-elf.c:1497 #, c-format msgid "unrecognized symbol type \"%s\"" msgstr "" -#: config/obj-elf.c:1841 +#: config/obj-elf.c:1665 msgid ".size expression too complicated to fix up" msgstr "" -#: config/obj-elf.c:1873 +#: config/obj-elf.c:1697 #, c-format msgid "" "invalid attempt to declare external version name as default in symbol `%s'" msgstr "" -#: config/obj-elf.c:1934 ecoff.c:3642 +#: config/obj-elf.c:1758 ecoff.c:3601 #, c-format msgid "symbol `%s' can not be both weak and common" msgstr "" -#: config/obj-elf.c:2054 +#: config/obj-elf.c:1875 #, c-format msgid "assuming all members of group `%s' are COMDAT" msgstr "" -#: config/obj-elf.c:2076 +#: config/obj-elf.c:1897 #, c-format msgid "can't create group: %s" msgstr "" -#: config/obj-elf.c:2183 +#: config/obj-elf.c:2005 #, c-format msgid "failed to set up debugging information: %s" msgstr "" -#: config/obj-elf.c:2203 +#: config/obj-elf.c:2024 #, c-format msgid "can't start writing .mdebug section: %s" msgstr "" -#: config/obj-elf.c:2211 +#: config/obj-elf.c:2032 #, c-format msgid "could not write .mdebug section: %s" msgstr "" +#: config/obj-elf.h:140 +#, c-format +msgid "can't allocate ELF private section data: %s" +msgstr "" + #: config/obj-ieee.c:455 msgid "too many sections" msgstr "" @@ -865,45 +888,45 @@ msgstr "" msgid "FATAL: Attaching copyright header %s" msgstr "" -#: config/obj-vms.c:530 +#: config/obj-vms.c:367 #, c-format msgid "compiler emitted zero-size common symbol `%s' already defined" msgstr "" -#: config/obj-vms.c:540 +#: config/obj-vms.c:375 #, c-format msgid "compiler redefined zero-size common symbol `%s'" msgstr "" -#: config/obj-vms.c:663 +#: config/obj-vms.c:492 #, c-format msgid "Couldn't create VMS object file \"%s\"" msgstr "" -#: config/obj-vms.c:688 +#: config/obj-vms.c:517 msgid "I/O error writing VMS object file (length prefix)" msgstr "" -#: config/obj-vms.c:702 +#: config/obj-vms.c:531 msgid "I/O error writing VMS object file" msgstr "" -#: config/obj-vms.c:1292 +#: config/obj-vms.c:1076 #, c-format msgid "Couldn't find source file \"%s\", status=%%X%x" msgstr "" -#: config/obj-vms.c:1790 config/obj-vms.c:2967 +#: config/obj-vms.c:1559 config/obj-vms.c:2731 #, c-format msgid "debugger forward reference error, dbx type %d" msgstr "" -#: config/obj-vms.c:1865 +#: config/obj-vms.c:1633 #, c-format msgid "Variable descriptor %d too complicated. Defined as `void *'." msgstr "" -#: config/obj-vms.c:2179 +#: config/obj-vms.c:1948 msgid "" "***Warning - the assembly code generated by the compiler has placed \n" " global constant(s) in the text psect. These will not be available to \n" @@ -914,92 +937,92 @@ msgid "" " I didn't warn you! \n" msgstr "" -#: config/obj-vms.c:2494 +#: config/obj-vms.c:2253 #, c-format msgid "debugginer output: %d is an unknown untyped variable." msgstr "" -#: config/obj-vms.c:2712 +#: config/obj-vms.c:2473 #, c-format msgid "debugger output: structure element `%s' has undefined type" msgstr "" -#: config/obj-vms.c:2823 +#: config/obj-vms.c:2584 #, c-format msgid "debugger output: %d is an unknown type of variable." msgstr "" -#: config/obj-vms.c:2956 +#: config/obj-vms.c:2720 #, c-format msgid "debugger output: Unable to resolve %d circular references." msgstr "" -#: config/obj-vms.c:3158 +#: config/obj-vms.c:2908 #, c-format msgid "Module name truncated: %s\n" msgstr "" -#: config/obj-vms.c:3436 +#: config/obj-vms.c:3159 #, c-format msgid "Symbol %s replaced by %s\n" msgstr "" #. impossible -#: config/obj-vms.c:3719 +#: config/obj-vms.c:3385 #, c-format msgid "Unknown VMS psect type (%ld)" msgstr "" -#: config/obj-vms.c:3760 +#: config/obj-vms.c:3423 #, c-format msgid "Globalsymbol attribute for symbol %s was unexpected." msgstr "" -#: config/obj-vms.c:3909 +#: config/obj-vms.c:3547 msgid "Invalid data type for globalvalue" msgstr "" -#: config/obj-vms.c:3921 +#: config/obj-vms.c:3559 #, c-format msgid "Invalid globalvalue of %s" msgstr "" -#: config/obj-vms.c:4271 +#: config/obj-vms.c:3799 msgid "Couldn't find fixup fragment when checking for indirect reference" msgstr "" -#: config/obj-vms.c:4614 config/obj-vms.c:4757 +#: config/obj-vms.c:4077 config/obj-vms.c:4212 msgid "Fixup data addsy and subsy don't have the same type" msgstr "" -#: config/obj-vms.c:4618 config/obj-vms.c:4761 +#: config/obj-vms.c:4081 config/obj-vms.c:4216 msgid "Fixup data addsy and subsy don't have an appropriate type" msgstr "" -#: config/obj-vms.c:4621 config/obj-vms.c:4764 +#: config/obj-vms.c:4084 config/obj-vms.c:4219 msgid "Fixup data is erroneously \"pcrel\"" msgstr "" -#: config/obj-vms.c:4637 config/obj-vms.c:4783 +#: config/obj-vms.c:4100 config/obj-vms.c:4236 msgid "Fixup datum is not a longword" msgstr "" -#: config/obj-vms.c:4641 config/obj-vms.c:4787 +#: config/obj-vms.c:4104 config/obj-vms.c:4240 msgid "Fixup datum is not \"fixP->fx_addsy\"" msgstr "" -#: config/obj-vms.c:4858 +#: config/obj-vms.c:4306 #, c-format msgid "" "g++ wrote an extern reference to `%s' as a routine.\n" "I will fix it, but I hope that it was note really a routine." msgstr "" -#: config/obj-vms.c:4990 +#: config/obj-vms.c:4436 msgid "Can't handle global xtors symbols yet." msgstr "" -#: config/obj-vms.c:4993 +#: config/obj-vms.c:4439 #, c-format msgid "Unknown %s" msgstr "" @@ -1007,46 +1030,46 @@ msgstr "" #. #. * Error otherwise. #. -#: config/obj-vms.c:5078 +#: config/obj-vms.c:4524 #, c-format msgid "unhandled stab type %d" msgstr "" -#: config/tc-a29k.c:163 config/tc-sparc.c:3983 +#: config/tc-a29k.c:163 config/tc-sparc.c:3994 msgid "Unknown segment type" msgstr "" #. Probably a memory allocation problem? Give up now. -#: config/tc-a29k.c:333 config/tc-dlx.c:369 config/tc-hppa.c:1463 -#: config/tc-mips.c:1108 config/tc-mips.c:1150 config/tc-or32.c:228 -#: config/tc-sparc.c:853 +#: config/tc-a29k.c:333 config/tc-dlx.c:369 config/tc-hppa.c:1476 +#: config/tc-mips.c:1152 config/tc-mips.c:1194 config/tc-or32.c:228 +#: config/tc-sparc.c:858 msgid "Broken assembler. No assembly attempted." msgstr "" #: config/tc-a29k.c:378 config/tc-avr.c:1121 config/tc-d10v.c:545 -#: config/tc-d30v.c:551 config/tc-h8300.c:492 config/tc-h8500.c:283 -#: config/tc-mcore.c:607 config/tc-mmix.c:470 config/tc-mn10200.c:940 -#: config/tc-mn10300.c:1815 config/tc-msp430.c:1544 config/tc-or32.c:334 -#: config/tc-or32.c:390 config/tc-ppc.c:2334 config/tc-s390.c:1236 -#: config/tc-sh.c:1264 config/tc-sh64.c:2254 config/tc-tic80.c:279 -#: config/tc-v850.c:2024 config/tc-w65.c:218 config/tc-z8k.c:376 +#: config/tc-d30v.c:551 config/tc-h8300.c:470 config/tc-h8500.c:283 +#: config/tc-mcore.c:607 config/tc-mmix.c:515 config/tc-mn10200.c:940 +#: config/tc-mn10300.c:1815 config/tc-msp430.c:1549 config/tc-or32.c:334 +#: config/tc-or32.c:390 config/tc-ppc.c:2371 config/tc-s390.c:1236 +#: config/tc-sh64.c:2208 config/tc-sh.c:1230 config/tc-tic80.c:279 +#: config/tc-v850.c:2041 config/tc-w65.c:218 config/tc-z8k.c:331 msgid "missing operand" msgstr "" #: config/tc-a29k.c:417 config/tc-cris.c:1075 config/tc-cris.c:1083 -#: config/tc-dlx.c:834 config/tc-hppa.c:1599 config/tc-i860.c:453 -#: config/tc-i860.c:470 config/tc-i860.c:930 config/tc-sparc.c:1415 -#: config/tc-sparc.c:1421 +#: config/tc-dlx.c:833 config/tc-hppa.c:1612 config/tc-i860.c:492 +#: config/tc-i860.c:509 config/tc-i860.c:989 config/tc-sparc.c:1420 +#: config/tc-sparc.c:1426 #, c-format msgid "Unknown opcode: `%s'" msgstr "" -#: config/tc-a29k.c:422 config/tc-dlx.c:852 +#: config/tc-a29k.c:422 config/tc-dlx.c:851 #, c-format msgid "Unknown opcode `%s'." msgstr "" -#: config/tc-a29k.c:454 config/tc-dlx.c:913 +#: config/tc-a29k.c:454 config/tc-dlx.c:912 #, c-format msgid "Too many operands: %s" msgstr "" @@ -1056,8 +1079,8 @@ msgstr "" msgid "Immediate value of %ld is too large" msgstr "" -#: config/tc-a29k.c:546 config/tc-i860.c:355 config/tc-i860.c:902 -#: config/tc-m68k.c:3171 config/tc-m68k.c:3200 config/tc-sparc.c:2647 +#: config/tc-a29k.c:546 config/tc-i860.c:395 config/tc-i860.c:940 +#: config/tc-m68k.c:3310 config/tc-m68k.c:3339 config/tc-sparc.c:2658 msgid "failed sanity check." msgstr "" @@ -1079,12 +1102,12 @@ msgstr "" msgid "a29k_estimate_size_before_relax\n" msgstr "" -#: config/tc-a29k.c:1095 config/tc-dlx.c:1283 config/tc-or32.c:1373 +#: config/tc-a29k.c:1095 config/tc-dlx.c:1280 config/tc-or32.c:1373 #, c-format msgid "label \"$%d\" redefined" msgstr "" -#: config/tc-a29k.c:1168 config/tc-dlx.c:511 config/tc-or32.c:1466 +#: config/tc-a29k.c:1168 config/tc-dlx.c:510 config/tc-or32.c:1466 #, c-format msgid "Invalid expression after %%%%\n" msgstr "" @@ -1103,15 +1126,15 @@ msgstr "" msgid "internal error: can't hash macro `%s': %s" msgstr "" -#: config/tc-alpha.c:943 config/tc-i960.c:2707 config/tc-xtensa.c:4954 -#: config/tc-xtensa.c:5015 +#: config/tc-alpha.c:943 config/tc-i960.c:2707 config/tc-xtensa.c:4842 +#: config/tc-xtensa.c:4903 msgid "syntax error" msgstr "" -#: config/tc-alpha.c:1017 config/tc-h8300.c:2099 config/tc-h8500.c:1204 -#: config/tc-hppa.c:4018 config/tc-i860.c:1004 config/tc-m68hc11.c:568 -#: config/tc-m68k.c:4196 config/tc-m88k.c:991 config/tc-ns32k.c:1689 -#: config/tc-or32.c:910 config/tc-sparc.c:2934 config/tc-z8k.c:1371 +#: config/tc-alpha.c:1017 config/tc-h8300.c:2100 config/tc-h8500.c:1204 +#: config/tc-hppa.c:4029 config/tc-i860.c:1059 config/tc-m68hc11.c:557 +#: config/tc-m68k.c:4366 config/tc-m88k.c:991 config/tc-ns32k.c:1689 +#: config/tc-or32.c:910 config/tc-sparc.c:2945 config/tc-z8k.c:1331 msgid "Bad call to MD_ATOF()" msgstr "" @@ -1153,7 +1176,7 @@ msgstr "" msgid "type %d reloc done?\n" msgstr "" -#: config/tc-alpha.c:1373 config/tc-alpha.c:1380 config/tc-mips.c:8603 +#: config/tc-alpha.c:1373 config/tc-alpha.c:1380 config/tc-mips.c:8578 msgid "Used $at without \".set noat\"" msgstr "" @@ -1162,12 +1185,12 @@ msgstr "" msgid "!samegp reloc against symbol without .prologue: %s" msgstr "" -#: config/tc-alpha.c:1581 config/tc-xtensa.c:5451 +#: config/tc-alpha.c:1581 config/tc-xtensa.c:5336 #, c-format msgid "cannot represent `%s' relocation in object file" msgstr "" -#: config/tc-alpha.c:1588 config/tc-xtensa.c:5458 +#: config/tc-alpha.c:1588 config/tc-xtensa.c:5343 #, c-format msgid "internal error? cannot generate `%s' relocation" msgstr "" @@ -1243,9 +1266,9 @@ msgstr "" #: config/tc-alpha.c:2490 config/tc-alpha.c:2514 config/tc-d10v.c:634 #: config/tc-d30v.c:639 config/tc-mn10200.c:995 config/tc-mn10300.c:1888 -#: config/tc-ppc.c:2300 config/tc-ppc.c:2517 config/tc-ppc.c:2529 +#: config/tc-ppc.c:2337 config/tc-ppc.c:2554 config/tc-ppc.c:2566 #: config/tc-s390.c:1246 config/tc-s390.c:1346 config/tc-s390.c:1442 -#: config/tc-v850.c:1804 config/tc-v850.c:1827 config/tc-v850.c:2047 +#: config/tc-v850.c:1821 config/tc-v850.c:1844 config/tc-v850.c:2064 msgid "too many fixups" msgstr "" @@ -1313,7 +1336,7 @@ msgid "opcode `%s' not supported for target %s" msgstr "" #: config/tc-alpha.c:2796 config/tc-alpha.c:2869 config/tc-avr.c:1087 -#: config/tc-msp430.c:446 +#: config/tc-msp430.c:461 #, c-format msgid "unknown opcode `%s'" msgstr "" @@ -1352,21 +1375,22 @@ msgstr "" msgid "overflow in literal (.lit8) table" msgstr "" -#: config/tc-alpha.c:4262 config/tc-ppc.c:1740 config/tc-ppc.c:4271 +#: config/tc-alpha.c:4262 config/tc-ppc.c:1776 config/tc-ppc.c:4357 #, c-format msgid ".COMMon length (%ld.) <0! Ignored." msgstr "" -#: config/tc-alpha.c:4291 config/tc-sparc.c:3799 config/tc-v850.c:256 +#: config/tc-alpha.c:4291 config/tc-sparc.c:3810 config/tc-v850.c:256 msgid "Ignoring attempt to re-define symbol" msgstr "" -#: config/tc-alpha.c:4300 config/tc-alpha.c:4309 config/tc-ppc.c:4308 +#: config/tc-alpha.c:4300 config/tc-alpha.c:4309 config/tc-ppc.c:4394 +#: config/tc-sparc.c:3818 #, c-format msgid "Length of .comm \"%s\" is already %ld. Not changed to %ld." msgstr "" -#: config/tc-alpha.c:4430 ecoff.c:3082 +#: config/tc-alpha.c:4430 ecoff.c:3053 msgid ".ent directive has no name" msgstr "" @@ -1374,7 +1398,7 @@ msgstr "" msgid "nested .ent directives" msgstr "" -#: config/tc-alpha.c:4483 ecoff.c:3032 +#: config/tc-alpha.c:4483 ecoff.c:3004 msgid ".end directive has no name" msgstr "" @@ -1386,27 +1410,27 @@ msgstr "" msgid ".end directive names different symbol than .ent" msgstr "" -#: config/tc-alpha.c:4538 ecoff.c:3171 +#: config/tc-alpha.c:4538 ecoff.c:3139 msgid ".fmask outside of .ent" msgstr "" -#: config/tc-alpha.c:4540 ecoff.c:3241 +#: config/tc-alpha.c:4540 ecoff.c:3207 msgid ".mask outside of .ent" msgstr "" -#: config/tc-alpha.c:4548 ecoff.c:3178 +#: config/tc-alpha.c:4548 ecoff.c:3146 msgid "bad .fmask directive" msgstr "" -#: config/tc-alpha.c:4550 ecoff.c:3248 +#: config/tc-alpha.c:4550 ecoff.c:3214 msgid "bad .mask directive" msgstr "" -#: config/tc-alpha.c:4584 config/tc-mips.c:14143 ecoff.c:3200 +#: config/tc-alpha.c:4584 config/tc-mips.c:14002 ecoff.c:3167 msgid ".frame outside of .ent" msgstr "" -#: config/tc-alpha.c:4595 ecoff.c:3211 +#: config/tc-alpha.c:4595 ecoff.c:3178 msgid "bad .frame directive" msgstr "" @@ -1447,1213 +1471,1333 @@ msgstr "" msgid ".ent directive has no symbol" msgstr "" -#: config/tc-alpha.c:4963 +#: config/tc-alpha.c:4962 msgid "Bad .frame directive 1./2. param" msgstr "" -#: config/tc-alpha.c:4975 +#: config/tc-alpha.c:4974 msgid "Bad .frame directive 3./4. param" msgstr "" -#: config/tc-alpha.c:5000 +#: config/tc-alpha.c:4997 msgid ".pdesc directive not in link (.link) section" msgstr "" -#: config/tc-alpha.c:5008 +#: config/tc-alpha.c:5005 msgid ".pdesc has no matching .ent" msgstr "" -#: config/tc-alpha.c:5019 +#: config/tc-alpha.c:5016 msgid ".pdesc directive has no entry symbol" msgstr "" -#: config/tc-alpha.c:5032 +#: config/tc-alpha.c:5029 msgid "No comma after .pdesc <entryname>" msgstr "" -#: config/tc-alpha.c:5055 +#: config/tc-alpha.c:5052 msgid "unknown procedure kind" msgstr "" -#: config/tc-alpha.c:5148 +#: config/tc-alpha.c:5143 msgid ".name directive not in link (.link) section" msgstr "" -#: config/tc-alpha.c:5156 +#: config/tc-alpha.c:5151 msgid ".name directive has no symbol" msgstr "" -#: config/tc-alpha.c:5190 +#: config/tc-alpha.c:5183 msgid "No symbol after .linkage" msgstr "" -#: config/tc-alpha.c:5218 +#: config/tc-alpha.c:5209 msgid "No symbol after .code_address" msgstr "" -#: config/tc-alpha.c:5251 +#: config/tc-alpha.c:5239 msgid "Bad .mask directive" msgstr "" -#: config/tc-alpha.c:5272 +#: config/tc-alpha.c:5258 msgid "Bad .fmask directive" msgstr "" -#: config/tc-alpha.c:5440 +#: config/tc-alpha.c:5420 #, c-format msgid "Expected comma after name \"%s\"" msgstr "" #. *symbol_get_obj (symbolP) = (signed char) temp; -#: config/tc-alpha.c:5451 +#: config/tc-alpha.c:5431 #, c-format msgid "unhandled: .proc %s,%d" msgstr "" -#: config/tc-alpha.c:5486 +#: config/tc-alpha.c:5466 #, c-format msgid "Tried to .set unrecognized mode `%s'" msgstr "" #. not fatal, but it might not work in the end -#: config/tc-alpha.c:5503 +#: config/tc-alpha.c:5483 msgid "File overrides no-base-register option." msgstr "" -#: config/tc-alpha.c:5520 +#: config/tc-alpha.c:5500 #, c-format msgid "Bad base register, using $%d." msgstr "" -#: config/tc-alpha.c:5542 +#: config/tc-alpha.c:5522 #, c-format msgid "Alignment too large: %d. assumed" msgstr "" -#: config/tc-alpha.c:5546 config/tc-d30v.c:2200 +#: config/tc-alpha.c:5526 config/tc-d30v.c:2198 msgid "Alignment negative: 0 assumed" msgstr "" -#: config/tc-alpha.c:5860 +#: config/tc-alpha.c:5839 #, c-format msgid "Chose GP value of %lx\n" msgstr "" -#: config/tc-alpha.c:5876 +#: config/tc-alpha.c:5855 msgid "Bad .section directive: want a,s,w,x,M,S,G,T in string" msgstr "" -#: config/tc-arc.c:1615 config/tc-arm.c:11416 config/tc-ip2k.c:219 +#: config/tc-arc.c:1592 config/tc-arm.c:12902 config/tc-ip2k.c:219 msgid "md_estimate_size_before_relax\n" msgstr "" -#: config/tc-arc.c:1627 +#: config/tc-arc.c:1604 msgid "md_convert_frag\n" msgstr "" #. We can't actually support subtracting a symbol. -#: config/tc-arc.c:1898 config/tc-arm.c:6617 config/tc-arm.c:9705 -#: config/tc-arm.c:9805 config/tc-avr.c:854 config/tc-cris.c:3123 -#: config/tc-d10v.c:1710 config/tc-d30v.c:1851 config/tc-mips.c:3630 -#: config/tc-mips.c:4695 config/tc-mips.c:5828 config/tc-mips.c:6517 -#: config/tc-msp430.c:1403 config/tc-ppc.c:5460 config/tc-v850.c:2356 +#: config/tc-arc.c:1875 config/tc-arm.c:8079 config/tc-arm.c:11156 +#: config/tc-arm.c:11256 config/tc-avr.c:854 config/tc-cris.c:3123 +#: config/tc-d10v.c:1710 config/tc-d30v.c:1851 config/tc-mips.c:3800 +#: config/tc-mips.c:4938 config/tc-mips.c:5946 config/tc-mips.c:6575 +#: config/tc-msp430.c:1409 config/tc-ppc.c:5546 config/tc-v850.c:2373 #: config/tc-xstormy16.c:483 msgid "expression too complex" msgstr "" -#: config/tc-arm.c:763 +#: config/tc-arm.c:788 msgid "ARM register expected" msgstr "" -#: config/tc-arm.c:764 config/tc-arm.c:3174 +#: config/tc-arm.c:789 config/tc-arm.c:3601 msgid "bad or missing co-processor number" msgstr "" #. In the few cases where we might be able to accept something else #. this error can be overridden. -#: config/tc-arm.c:765 config/tc-arm.c:3229 +#: config/tc-arm.c:790 config/tc-arm.c:3656 msgid "co-processor register expected" msgstr "" -#: config/tc-arm.c:766 +#: config/tc-arm.c:791 msgid "FPA register expected" msgstr "" -#: config/tc-arm.c:767 +#: config/tc-arm.c:792 msgid "VFP single precision register expected" msgstr "" -#: config/tc-arm.c:768 +#: config/tc-arm.c:793 msgid "VFP double precision register expected" msgstr "" -#: config/tc-arm.c:769 +#: config/tc-arm.c:794 msgid "Maverick MVF register expected" msgstr "" -#: config/tc-arm.c:770 +#: config/tc-arm.c:795 msgid "Maverick MVD register expected" msgstr "" -#: config/tc-arm.c:771 config/tc-arm.c:772 +#: config/tc-arm.c:796 msgid "Maverick MVFX register expected" msgstr "" -#: config/tc-arm.c:773 +#: config/tc-arm.c:797 +msgid "Maverick MVDX register expected" +msgstr "" + +#: config/tc-arm.c:798 msgid "Maverick MVAX register expected" msgstr "" -#: config/tc-arm.c:774 +#: config/tc-arm.c:799 msgid "Maverick DSPSC register expected" msgstr "" -#: config/tc-arm.c:775 +#: config/tc-arm.c:800 msgid "Intel Wireless MMX technology register expected" msgstr "" -#: config/tc-arm.c:2309 +#: config/tc-arm.c:2485 msgid "bad arguments to instruction" msgstr "" -#: config/tc-arm.c:2310 +#: config/tc-arm.c:2486 msgid "r15 not allowed here" msgstr "" -#: config/tc-arm.c:2311 +#: config/tc-arm.c:2487 msgid "instruction is not conditional" msgstr "" -#: config/tc-arm.c:2312 +#: config/tc-arm.c:2488 msgid "acc0 expected" msgstr "" -#: config/tc-arm.c:2505 +#: config/tc-arm.c:2686 msgid "literal pool overflow" msgstr "" -#: config/tc-arm.c:2647 +#: config/tc-arm.c:3000 msgid "invalid syntax for .req directive" msgstr "" -#: config/tc-arm.c:2727 +#: config/tc-arm.c:3043 +#, c-format +msgid "unreq: missing hash entry for \"%s\"" +msgstr "" + +#: config/tc-arm.c:3062 config/tc-arm.c:3065 +#, c-format +msgid ".unreq: unrecognized symbol \"%s\"" +msgstr "" + +#: config/tc-arm.c:3068 +msgid "invalid syntax for .unreq directive" +msgstr "" + +#: config/tc-arm.c:3152 #, c-format msgid "alignment too large: %d assumed" msgstr "" -#: config/tc-arm.c:2730 +#: config/tc-arm.c:3155 msgid "alignment negative. 0 assumed." msgstr "" -#: config/tc-arm.c:2814 +#: config/tc-arm.c:3239 #, c-format msgid "expected comma after name \"%s\"" msgstr "" -#: config/tc-arm.c:2864 config/tc-m32r.c:420 +#: config/tc-arm.c:3289 config/tc-m32r.c:586 #, c-format msgid "symbol `%s' already defined" msgstr "" -#: config/tc-arm.c:2889 +#: config/tc-arm.c:3314 msgid "selected processor does not support THUMB opcodes" msgstr "" -#: config/tc-arm.c:2902 +#: config/tc-arm.c:3328 msgid "selected processor does not support ARM opcodes" msgstr "" -#: config/tc-arm.c:2914 +#: config/tc-arm.c:3341 #, c-format msgid "invalid instruction size selected (%d)" msgstr "" -#: config/tc-arm.c:2949 +#: config/tc-arm.c:3376 #, c-format msgid "invalid operand to .code directive (%d) (expecting 16 or 32)" msgstr "" -#: config/tc-arm.c:2960 +#: config/tc-arm.c:3387 msgid "garbage following instruction" msgstr "" #. In the few cases where we might be able to accept something else #. this error can be overridden. -#: config/tc-arm.c:3010 +#: config/tc-arm.c:3437 #, c-format msgid "register expected, not '%.100s'" msgstr "" #. In the few cases where we might be able to accept #. something else this error can be overridden. -#: config/tc-arm.c:3061 +#: config/tc-arm.c:3488 #, c-format msgid "Intel Wireless MMX technology register expected, not '%.100s'" msgstr "" #. In the few cases where we might be able to accept #. something else this error can be overridden. -#: config/tc-arm.c:3133 +#: config/tc-arm.c:3560 msgid "flag for {c}psr instruction expected" msgstr "" -#: config/tc-arm.c:3167 +#: config/tc-arm.c:3594 msgid "illegal co-processor number" msgstr "" -#: config/tc-arm.c:3199 config/tc-arm.c:4778 +#: config/tc-arm.c:3626 config/tc-arm.c:6248 msgid "bad or missing expression" msgstr "" -#: config/tc-arm.c:3205 +#: config/tc-arm.c:3632 msgid "immediate co-processor expression too large" msgstr "" #. In the few cases where we might be able to accept something else #. this error can be overridden. -#: config/tc-arm.c:3252 +#: config/tc-arm.c:3679 msgid "floating point register expected" msgstr "" -#: config/tc-arm.c:3269 config/tc-arm.c:3414 +#: config/tc-arm.c:3696 config/tc-arm.c:3915 config/tc-arm.c:5015 +#: config/tc-arm.c:5103 config/tc-arm.c:5359 config/tc-arm.c:5463 +#: config/tc-arm.c:5748 msgid "immediate expression expected" msgstr "" -#: config/tc-arm.c:3284 +#: config/tc-arm.c:3711 msgid "co-processor address must be word aligned" msgstr "" -#: config/tc-arm.c:3290 config/tc-arm.c:3429 +#: config/tc-arm.c:3717 config/tc-arm.c:3930 msgid "offset too large" msgstr "" -#: config/tc-arm.c:3339 config/tc-arm.c:3477 +#: config/tc-arm.c:3777 +msgid "comma expected after closing square bracket" +msgstr "" + +#: config/tc-arm.c:3792 config/tc-arm.c:3978 msgid "pc may not be used in post-increment" msgstr "" -#: config/tc-arm.c:3355 config/tc-arm.c:3493 config/tc-arm.c:3938 -#: config/tc-arm.c:5197 config/tc-arm.c:6064 config/tc-arm.c:6398 +#: config/tc-arm.c:3820 +msgid "'option' field too large" +msgstr "" + +#: config/tc-arm.c:3828 +msgid "'}' expected at end of 'option' field" +msgstr "" + +#: config/tc-arm.c:3840 +msgid "non-constant expressions for 'option' field not supported" +msgstr "" + +#: config/tc-arm.c:3846 +msgid "# or { expected after comma" +msgstr "" + +#: config/tc-arm.c:3856 config/tc-arm.c:3994 config/tc-arm.c:4435 +#: config/tc-arm.c:6644 config/tc-arm.c:7529 config/tc-arm.c:7861 msgid "pre-indexed expression expected" msgstr "" -#: config/tc-arm.c:3368 config/tc-arm.c:3506 config/tc-arm.c:3951 -#: config/tc-arm.c:5208 config/tc-arm.c:6076 config/tc-arm.c:6410 -#: config/tc-arm.c:6784 config/tc-arm.c:9448 config/tc-arm.c:9463 +#: config/tc-arm.c:3869 config/tc-arm.c:4007 config/tc-arm.c:4448 +#: config/tc-arm.c:6655 config/tc-arm.c:7541 config/tc-arm.c:7873 +#: config/tc-arm.c:8243 config/tc-arm.c:10901 config/tc-arm.c:10916 msgid "missing ]" msgstr "" -#: config/tc-arm.c:3378 config/tc-arm.c:3516 +#: config/tc-arm.c:3879 config/tc-arm.c:4017 msgid "pc may not be used with write-back" msgstr "" -#: config/tc-arm.c:3568 +#: config/tc-arm.c:4068 msgid "comma expected after register name" msgstr "" -#: config/tc-arm.c:3587 +#: config/tc-arm.c:4087 msgid "CPSR or SPSR expected" msgstr "" -#: config/tc-arm.c:3613 +#: config/tc-arm.c:4113 msgid "comma missing after psr flags" msgstr "" -#: config/tc-arm.c:3629 config/tc-arm.c:3639 +#: config/tc-arm.c:4129 config/tc-arm.c:4139 msgid "only a register or immediate value can follow a psr flag" msgstr "" -#: config/tc-arm.c:3650 +#: config/tc-arm.c:4150 msgid "immediate value cannot be used to set this field" msgstr "" -#: config/tc-arm.c:3668 config/tc-arm.c:5424 config/tc-arm.c:5704 -#: config/tc-arm.c:5724 config/tc-i960.c:1935 +#: config/tc-arm.c:4168 config/tc-arm.c:5769 config/tc-arm.c:6871 +#: config/tc-arm.c:7170 config/tc-arm.c:7190 config/tc-i960.c:1935 msgid "invalid constant" msgstr "" -#: config/tc-arm.c:3716 +#: config/tc-arm.c:4216 msgid "rdhi, rdlo and rm must all be different" msgstr "" -#: config/tc-arm.c:3770 +#: config/tc-arm.c:4269 msgid "rd and rm should be different in mul" msgstr "" -#: config/tc-arm.c:3824 +#: config/tc-arm.c:4322 msgid "rd and rm should be different in mla" msgstr "" -#: config/tc-arm.c:3872 +#: config/tc-arm.c:4369 #, c-format msgid "acc0 expected, not '%.100s'" msgstr "" -#: config/tc-arm.c:4050 +#: config/tc-arm.c:4547 msgid "rdhi and rdlo must be different" msgstr "" -#: config/tc-arm.c:4158 +#: config/tc-arm.c:4655 msgid "Warning: instruction unpredictable when using r15" msgstr "" -#: config/tc-arm.c:4373 +#: config/tc-arm.c:4870 msgid "use of r15 in bxj is not really useful" msgstr "" -#: config/tc-arm.c:4400 config/tc-arm.c:4585 config/tc-arm.c:5445 expr.c:1318 -#: read.c:2206 +#: config/tc-arm.c:4931 config/tc-arm.c:4954 +msgid "Rd equal to Rm or Rn yields unpredictable results" +msgstr "" + +#: config/tc-arm.c:5020 config/tc-arm.c:5108 config/tc-arm.c:5365 +#: config/tc-arm.c:5469 config/tc-arm.c:5755 config/tc-arm.c:5841 +#: config/tc-arm.c:6026 config/tc-arm.c:6892 expr.c:1310 read.c:2097 msgid "bad expression" msgstr "" -#: config/tc-arm.c:4409 config/tc-arm.c:4594 config/tc-arm.c:4786 -#: config/tc-arm.c:8389 config/tc-arm.c:8424 config/tc-arm.c:8434 -#: config/tc-z8k.c:1161 config/tc-z8k.c:1173 +#: config/tc-arm.c:5025 config/tc-arm.c:5113 config/tc-arm.c:5371 +#: config/tc-arm.c:5475 config/tc-arm.c:5761 config/tc-arm.c:7161 +#: config/tc-arm.c:7577 config/tc-arm.c:7910 config/tc-arm.c:8534 +#: config/tc-v850.c:1924 config/tc-v850.c:1945 +msgid "constant expression expected" +msgstr "" + +#: config/tc-arm.c:5031 config/tc-arm.c:5119 config/tc-arm.c:5850 +#: config/tc-arm.c:6035 config/tc-arm.c:6256 config/tc-arm.c:9842 +#: config/tc-arm.c:9877 config/tc-arm.c:9887 config/tc-z8k.c:1129 +#: config/tc-z8k.c:1141 msgid "immediate value out of range" msgstr "" -#: config/tc-arm.c:4833 +#: config/tc-arm.c:5285 +msgid "missing endian specifier" +msgstr "" + +#: config/tc-arm.c:5294 +msgid "valid endian specifiers are be or le" +msgstr "" + +#: config/tc-arm.c:5349 config/tc-arm.c:5453 +msgid "missing rotation field after comma" +msgstr "" + +#: config/tc-arm.c:5393 config/tc-arm.c:5498 +msgid "rotation can be 8, 16, 24 or 0 when field is ommited" +msgstr "" + +#: config/tc-arm.c:5810 +msgid "unrecognized flag" +msgstr "" + +#: config/tc-arm.c:5816 +msgid "no 'a', 'i', or 'f' flags for 'cps'" +msgstr "" + +#: config/tc-arm.c:6289 config/tc-arm.c:6448 +msgid "non-word size not supported with control register" +msgstr "" + +#: config/tc-arm.c:6304 msgid "only r15 allowed here" msgstr "" -#: config/tc-arm.c:5160 +#: config/tc-arm.c:6446 +msgid "conditional execution not supported with control register" +msgstr "" + +#: config/tc-arm.c:6607 msgid "'[' expected after PLD mnemonic" msgstr "" -#: config/tc-arm.c:5182 +#: config/tc-arm.c:6629 msgid "post-indexed expression used in preload instruction" msgstr "" -#: config/tc-arm.c:5187 config/tc-arm.c:5217 +#: config/tc-arm.c:6634 config/tc-arm.c:6664 msgid "writeback used in preload instruction" msgstr "" -#: config/tc-arm.c:5259 +#: config/tc-arm.c:6706 msgid "destination register must be even" msgstr "" -#: config/tc-arm.c:5265 +#: config/tc-arm.c:6712 msgid "r14 not allowed here" msgstr "" -#: config/tc-arm.c:5272 +#: config/tc-arm.c:6719 msgid "pre/post-indexing used when modified address register is destination" msgstr "" -#: config/tc-arm.c:5282 +#: config/tc-arm.c:6729 msgid "ldrd destination registers must not overlap index register" msgstr "" -#: config/tc-arm.c:5408 +#: config/tc-arm.c:6855 msgid "bad_segment" msgstr "" -#: config/tc-arm.c:5468 config/tc-arm.c:5479 +#: config/tc-arm.c:6914 config/tc-arm.c:6925 msgid "shift expression expected" msgstr "" -#: config/tc-arm.c:5503 +#: config/tc-arm.c:6935 +msgid "'LSL' or 'ASR' required" +msgstr "" + +#: config/tc-arm.c:6941 +msgid "'LSL' required" +msgstr "" + +#: config/tc-arm.c:6947 +msgid "'ASR' required" +msgstr "" + +#: config/tc-arm.c:6969 msgid "shift requires register or #expression" msgstr "" -#: config/tc-arm.c:5504 +#: config/tc-arm.c:6970 msgid "shift requires #expression" msgstr "" -#: config/tc-arm.c:5534 +#: config/tc-arm.c:7000 msgid "shift of 0 ignored." msgstr "" -#: config/tc-arm.c:5540 +#: config/tc-arm.c:7006 msgid "invalid immediate shift" msgstr "" -#: config/tc-arm.c:5695 config/tc-arm.c:6112 config/tc-arm.c:6447 -#: config/tc-arm.c:7081 config/tc-v850.c:1907 config/tc-v850.c:1928 -msgid "constant expression expected" -msgstr "" - -#: config/tc-arm.c:5737 +#: config/tc-arm.c:7203 msgid "register or shift expression expected" msgstr "" -#: config/tc-arm.c:5790 +#: config/tc-arm.c:7256 msgid "invalid floating point immediate expression" msgstr "" -#: config/tc-arm.c:5794 +#: config/tc-arm.c:7260 msgid "floating point register or immediate expression expected" msgstr "" -#: config/tc-arm.c:5948 config/tc-arm.c:6278 +#: config/tc-arm.c:7413 config/tc-arm.c:7741 msgid "address offset too large" msgstr "" -#: config/tc-arm.c:6006 config/tc-arm.c:6196 config/tc-arm.c:6338 +#: config/tc-arm.c:7471 config/tc-arm.c:7660 config/tc-arm.c:7801 msgid "address expected" msgstr "" -#: config/tc-arm.c:6036 config/tc-arm.c:6048 config/tc-arm.c:6085 -#: config/tc-arm.c:6214 config/tc-arm.c:6368 config/tc-arm.c:6382 -#: config/tc-arm.c:6419 +#: config/tc-arm.c:7501 config/tc-arm.c:7513 config/tc-arm.c:7550 +#: config/tc-arm.c:7678 config/tc-arm.c:7831 config/tc-arm.c:7845 +#: config/tc-arm.c:7882 #, c-format msgid "%s register same as write-back base" msgstr "" -#: config/tc-arm.c:6038 config/tc-arm.c:6050 config/tc-arm.c:6087 -#: config/tc-arm.c:6216 config/tc-arm.c:6370 config/tc-arm.c:6384 -#: config/tc-arm.c:6421 +#: config/tc-arm.c:7503 config/tc-arm.c:7515 config/tc-arm.c:7552 +#: config/tc-arm.c:7680 config/tc-arm.c:7833 config/tc-arm.c:7847 +#: config/tc-arm.c:7884 msgid "destination" msgstr "" -#: config/tc-arm.c:6038 config/tc-arm.c:6050 config/tc-arm.c:6087 -#: config/tc-arm.c:6216 config/tc-arm.c:6370 config/tc-arm.c:6384 -#: config/tc-arm.c:6421 +#: config/tc-arm.c:7503 config/tc-arm.c:7515 config/tc-arm.c:7552 +#: config/tc-arm.c:7680 config/tc-arm.c:7833 config/tc-arm.c:7847 +#: config/tc-arm.c:7884 msgid "source" msgstr "" -#: config/tc-arm.c:6097 config/tc-arm.c:6431 config/tc-arm.c:8695 +#: config/tc-arm.c:7562 config/tc-arm.c:7894 config/tc-arm.c:10148 msgid "invalid pseudo operation" msgstr "" -#: config/tc-arm.c:6149 config/tc-arm.c:6482 +#: config/tc-arm.c:7614 config/tc-arm.c:7945 msgid "literal pool insertion failed" msgstr "" -#: config/tc-arm.c:6244 config/tc-arm.c:6250 +#: config/tc-arm.c:7708 config/tc-arm.c:7714 msgid "post-indexed expression expected" msgstr "" -#: config/tc-arm.c:6548 +#: config/tc-arm.c:8010 msgid "bad range in register list" msgstr "" -#: config/tc-arm.c:6556 config/tc-arm.c:6565 config/tc-arm.c:6607 +#: config/tc-arm.c:8018 config/tc-arm.c:8027 config/tc-arm.c:8069 #, c-format msgid "Warning: duplicated register (r%d) in register list" msgstr "" -#: config/tc-arm.c:6568 +#: config/tc-arm.c:8030 msgid "Warning: register range not in ascending order" msgstr "" -#: config/tc-arm.c:6580 +#: config/tc-arm.c:8042 msgid "missing `}'" msgstr "" -#: config/tc-arm.c:6596 +#: config/tc-arm.c:8058 msgid "invalid register mask" msgstr "" -#: config/tc-arm.c:6655 +#: config/tc-arm.c:8117 msgid "r15 not allowed as base register" msgstr "" -#: config/tc-arm.c:6689 config/tc-arm.c:6698 +#: config/tc-arm.c:8151 config/tc-arm.c:8160 msgid "writeback of base register is UNPREDICTABLE" msgstr "" -#: config/tc-arm.c:6692 +#: config/tc-arm.c:8154 msgid "writeback of base register when in register list is UNPREDICTABLE" msgstr "" -#: config/tc-arm.c:6702 +#: config/tc-arm.c:8164 msgid "if writeback register is in list, it must be the lowest reg in the list" msgstr "" -#: config/tc-arm.c:6744 config/tc-arm.c:6758 +#: config/tc-arm.c:8203 config/tc-arm.c:8217 msgid "r15 not allowed in swap" msgstr "" -#: config/tc-arm.c:6853 +#: config/tc-arm.c:8310 msgid "use of r15 in bx in ARM mode is not really useful" msgstr "" -#: config/tc-arm.c:7087 +#: config/tc-arm.c:8540 msgid "constant value required for number of registers" msgstr "" -#: config/tc-arm.c:7095 +#: config/tc-arm.c:8548 msgid "number of registers must be in the range [1:4]" msgstr "" -#: config/tc-arm.c:7156 +#: config/tc-arm.c:8609 msgid "r15 not allowed as base register with write-back" msgstr "" -#: config/tc-arm.c:7538 +#: config/tc-arm.c:8979 config/tc-arm.c:9015 msgid "only two consecutive VFP SP registers allowed here" msgstr "" -#: config/tc-arm.c:7706 +#: config/tc-arm.c:9167 msgid "VFP system register expected" msgstr "" -#: config/tc-arm.c:7844 config/tc-arm.c:7883 config/tc-arm.c:7896 -#: config/tc-arm.c:7957 config/tc-arm.c:7996 config/tc-arm.c:8009 -#: config/tc-h8300.c:1035 config/tc-mips.c:9723 config/tc-mips.c:9753 +#: config/tc-arm.c:9301 config/tc-arm.c:9340 config/tc-arm.c:9353 +#: config/tc-arm.c:9414 config/tc-arm.c:9453 config/tc-arm.c:9466 +#: config/tc-h8300.c:1009 config/tc-mips.c:9711 config/tc-mips.c:9741 msgid "invalid register list" msgstr "" -#: config/tc-arm.c:7850 config/tc-arm.c:7963 +#: config/tc-arm.c:9307 config/tc-arm.c:9420 msgid "register list not in ascending order" msgstr "" -#: config/tc-arm.c:7875 config/tc-arm.c:7988 +#: config/tc-arm.c:9332 config/tc-arm.c:9445 msgid "register range not in ascending order" msgstr "" -#: config/tc-arm.c:7913 config/tc-arm.c:8026 +#: config/tc-arm.c:9370 config/tc-arm.c:9483 msgid "non-contiguous register range" msgstr "" -#: config/tc-arm.c:8056 config/tc-arm.c:8093 +#: config/tc-arm.c:9513 config/tc-arm.c:9550 msgid "this addressing mode requires base-register writeback" msgstr "" -#: config/tc-arm.c:8253 +#: config/tc-arm.c:9706 msgid "lo register required" msgstr "" -#: config/tc-arm.c:8261 +#: config/tc-arm.c:9714 msgid "hi register required" msgstr "" -#: config/tc-arm.c:8331 config/tc-arm.c:9537 +#: config/tc-arm.c:9784 config/tc-arm.c:10988 msgid "dest and source1 must be the same register" msgstr "" -#: config/tc-arm.c:8338 +#: config/tc-arm.c:9791 msgid "subtract valid only on lo regs" msgstr "" -#: config/tc-arm.c:8362 +#: config/tc-arm.c:9815 msgid "invalid Hi register with immediate" msgstr "" -#: config/tc-arm.c:8402 +#: config/tc-arm.c:9855 msgid "invalid immediate value for stack adjust" msgstr "" -#: config/tc-arm.c:8413 +#: config/tc-arm.c:9866 msgid "invalid immediate for address calculation" msgstr "" -#: config/tc-arm.c:8500 +#: config/tc-arm.c:9953 msgid "source1 and dest must be same register" msgstr "" -#: config/tc-arm.c:8534 +#: config/tc-arm.c:9987 msgid "invalid immediate for shift" msgstr "" -#: config/tc-arm.c:8613 +#: config/tc-arm.c:10066 msgid "only lo regs allowed with immediate" msgstr "" -#: config/tc-arm.c:8632 +#: config/tc-arm.c:10085 msgid "invalid immediate" msgstr "" -#: config/tc-arm.c:8686 +#: config/tc-arm.c:10139 msgid "expected ']'" msgstr "" -#: config/tc-arm.c:8759 +#: config/tc-arm.c:10212 msgid "byte or halfword not valid for base register" msgstr "" -#: config/tc-arm.c:8764 +#: config/tc-arm.c:10217 msgid "r15 based store not allowed" msgstr "" -#: config/tc-arm.c:8769 +#: config/tc-arm.c:10222 msgid "invalid base register for register offset" msgstr "" -#: config/tc-arm.c:8787 config/tc-arm.c:8822 +#: config/tc-arm.c:10240 config/tc-arm.c:10275 msgid "invalid offset" msgstr "" -#: config/tc-arm.c:8798 +#: config/tc-arm.c:10251 msgid "invalid base register in load/store" msgstr "" -#: config/tc-arm.c:9341 +#: config/tc-arm.c:10794 msgid "expecting immediate, 7bit operand" msgstr "" -#: config/tc-arm.c:9356 +#: config/tc-arm.c:10809 msgid "immediate out of range" msgstr "" -#: config/tc-arm.c:9399 +#: config/tc-arm.c:10852 msgid "offset expected" msgstr "" -#: config/tc-arm.c:9408 config/tc-pj.c:537 config/tc-sh.c:3593 +#: config/tc-arm.c:10861 config/tc-pj.c:537 config/tc-sh.c:3892 msgid "offset out of range" msgstr "" -#: config/tc-arm.c:9545 +#: config/tc-arm.c:10996 msgid "Rs and Rd must be different in MUL" msgstr "" -#: config/tc-arm.c:9689 +#: config/tc-arm.c:11140 msgid "" "inserted missing '!': load/store multiple always writes back base register" msgstr "" -#: config/tc-arm.c:9711 +#: config/tc-arm.c:11162 msgid "only lo-regs valid in load/store multiple" msgstr "" -#: config/tc-arm.c:9757 +#: config/tc-arm.c:11208 msgid "syntax: ldrs[b] Rd, [Rb, Ro]" msgstr "" -#: config/tc-arm.c:9821 +#: config/tc-arm.c:11272 msgid "invalid register list to push/pop instruction" msgstr "" -#: config/tc-arm.c:9933 config/tc-arm.c:10159 +#: config/tc-arm.c:11383 config/tc-arm.c:11621 msgid "virtual memory exhausted" msgstr "" -#: config/tc-arm.c:10014 +#: config/tc-arm.c:11408 +#, c-format +msgid "failed to create an alias for %s, reason: %s" +msgstr "" + +#: config/tc-arm.c:11473 #, c-format msgid "register '%s' does not exist\n" msgstr "" -#: config/tc-arm.c:10018 +#: config/tc-arm.c:11477 #, c-format msgid "" "ignoring redefinition of register alias '%s' to non-existant register '%s'" msgstr "" -#: config/tc-arm.c:10027 +#: config/tc-arm.c:11486 #, c-format msgid "ignoring redefinition of register alias '%s'" msgstr "" -#: config/tc-arm.c:10033 +#: config/tc-arm.c:11492 msgid "ignoring incomplete .req pseuso op" msgstr "" -#: config/tc-arm.c:10183 +#: config/tc-arm.c:11645 msgid "use of old and new-style options to set CPU type" msgstr "" -#: config/tc-arm.c:10193 +#: config/tc-arm.c:11655 msgid "use of old and new-style options to set FPU type" msgstr "" -#: config/tc-arm.c:10473 +#: config/tc-arm.c:11711 +msgid "hard-float conflicts with specified fpu" +msgstr "" + +#: config/tc-arm.c:11949 msgid "bad call to MD_ATOF()" msgstr "" -#: config/tc-arm.c:10703 +#: config/tc-arm.c:12179 #, c-format msgid "invalid constant (%lx) after fixup" msgstr "" -#: config/tc-arm.c:10741 +#: config/tc-arm.c:12217 #, c-format msgid "unable to compute ADRL instructions for PC offset of 0x%lx" msgstr "" -#: config/tc-arm.c:10771 +#: config/tc-arm.c:12247 #, c-format msgid "bad immediate value for offset (%ld)" msgstr "" -#: config/tc-arm.c:10793 config/tc-arm.c:10815 +#: config/tc-arm.c:12269 config/tc-arm.c:12291 msgid "invalid literal constant: pool needs to be closer" msgstr "" -#: config/tc-arm.c:10795 +#: config/tc-arm.c:12271 #, c-format msgid "bad immediate value for half-word offset (%ld)" msgstr "" -#: config/tc-arm.c:10832 +#: config/tc-arm.c:12308 msgid "shift expression is too large" msgstr "" -#: config/tc-arm.c:10851 config/tc-arm.c:10860 +#: config/tc-arm.c:12327 config/tc-arm.c:12336 msgid "invalid swi expression" msgstr "" -#: config/tc-arm.c:10870 +#: config/tc-arm.c:12346 msgid "invalid expression in load/store multiple" msgstr "" -#: config/tc-arm.c:10923 +#: config/tc-arm.c:12399 msgid "GAS can't handle same-section branch dest >= 0x04000000" msgstr "" -#: config/tc-arm.c:10932 +#: config/tc-arm.c:12408 msgid "out of range branch" msgstr "" -#: config/tc-arm.c:10965 config/tc-arm.c:10981 +#: config/tc-arm.c:12441 config/tc-arm.c:12457 msgid "branch out of range" msgstr "" -#: config/tc-arm.c:11005 +#: config/tc-arm.c:12481 msgid "branch with link out of range" msgstr "" -#: config/tc-arm.c:11074 +#: config/tc-arm.c:12550 msgid "illegal value for co-processor offset" msgstr "" -#: config/tc-arm.c:11086 +#: config/tc-arm.c:12562 msgid "Illegal value for co-processor offset" msgstr "" -#: config/tc-arm.c:11110 +#: config/tc-arm.c:12586 #, c-format msgid "invalid offset, target not word aligned (0x%08X)" msgstr "" -#: config/tc-arm.c:11116 config/tc-arm.c:11126 config/tc-arm.c:11134 -#: config/tc-arm.c:11142 config/tc-arm.c:11150 +#: config/tc-arm.c:12592 config/tc-arm.c:12602 config/tc-arm.c:12610 +#: config/tc-arm.c:12618 config/tc-arm.c:12626 #, c-format msgid "invalid offset, value too big (0x%08lX)" msgstr "" -#: config/tc-arm.c:11190 +#: config/tc-arm.c:12666 msgid "invalid immediate for stack address calculation" msgstr "" -#: config/tc-arm.c:11199 +#: config/tc-arm.c:12675 #, c-format msgid "invalid immediate for address calculation (value = 0x%08lX)" msgstr "" -#: config/tc-arm.c:11209 +#: config/tc-arm.c:12685 msgid "invalid 8bit immediate" msgstr "" -#: config/tc-arm.c:11217 +#: config/tc-arm.c:12693 msgid "invalid 3bit immediate" msgstr "" -#: config/tc-arm.c:11233 +#: config/tc-arm.c:12709 #, c-format msgid "invalid immediate: %ld is too large" msgstr "" -#: config/tc-arm.c:11248 +#: config/tc-arm.c:12724 #, c-format msgid "illegal Thumb shift value: %ld" msgstr "" -#: config/tc-arm.c:11262 +#: config/tc-arm.c:12738 #, c-format msgid "bad relocation fixup type (%d)" msgstr "" -#: config/tc-arm.c:11333 +#: config/tc-arm.c:12809 msgid "literal referenced across section boundary" msgstr "" -#: config/tc-arm.c:11346 +#: config/tc-arm.c:12822 msgid "internal relocation (type: IMMEDIATE) not fixed up" msgstr "" -#: config/tc-arm.c:11351 +#: config/tc-arm.c:12827 msgid "ADRL used for a symbol not defined in the same file" msgstr "" -#: config/tc-arm.c:11356 +#: config/tc-arm.c:12836 +#, c-format +msgid "undefined local label `%s'" +msgstr "" + +#: config/tc-arm.c:12842 msgid "internal_relocation (type: OFFSET_IMM) not fixed up" msgstr "" -#: config/tc-arm.c:11374 config/tc-cris.c:3063 config/tc-mcore.c:2052 -#: config/tc-mmix.c:2867 config/tc-ns32k.c:2396 +#: config/tc-arm.c:12860 config/tc-cris.c:3063 config/tc-mcore.c:2052 +#: config/tc-mmix.c:2943 config/tc-ns32k.c:2396 msgid "<unknown>" msgstr "" -#: config/tc-arm.c:11377 config/tc-arm.c:11398 +#: config/tc-arm.c:12863 config/tc-arm.c:12884 #, c-format msgid "cannot represent %s relocation in this object file format" msgstr "" -#: config/tc-arm.c:11494 +#: config/tc-arm.c:12980 #, c-format msgid "no operator -- statement `%s'\n" msgstr "" -#: config/tc-arm.c:11512 config/tc-arm.c:11537 +#: config/tc-arm.c:12998 config/tc-arm.c:13024 #, c-format msgid "selected processor does not support `%s'" msgstr "" -#: config/tc-arm.c:11554 +#: config/tc-arm.c:13042 #, c-format msgid "bad instruction `%s'" msgstr "" -#: config/tc-arm.c:11655 +#: config/tc-arm.c:13143 msgid "generate PIC code" msgstr "" -#: config/tc-arm.c:11656 +#: config/tc-arm.c:13144 msgid "assemble Thumb code" msgstr "" -#: config/tc-arm.c:11657 +#: config/tc-arm.c:13145 msgid "support ARM/Thumb interworking" msgstr "" -#: config/tc-arm.c:11659 +#: config/tc-arm.c:13147 msgid "use old ABI (ELF only)" msgstr "" -#: config/tc-arm.c:11660 +#: config/tc-arm.c:13148 msgid "code uses 32-bit program counter" msgstr "" -#: config/tc-arm.c:11661 +#: config/tc-arm.c:13149 msgid "code uses 26-bit program counter" msgstr "" -#: config/tc-arm.c:11662 +#: config/tc-arm.c:13150 msgid "floating point args are in fp regs" msgstr "" -#: config/tc-arm.c:11664 +#: config/tc-arm.c:13152 msgid "re-entrant code" msgstr "" -#: config/tc-arm.c:11665 +#: config/tc-arm.c:13153 msgid "code is ATPCS conformant" msgstr "" -#: config/tc-arm.c:11666 +#: config/tc-arm.c:13154 msgid "assemble for big-endian" msgstr "" -#: config/tc-arm.c:11667 +#: config/tc-arm.c:13155 msgid "assemble for little-endian" msgstr "" #. These are recognized by the assembler, but have no affect on code. -#: config/tc-arm.c:11671 +#: config/tc-arm.c:13159 msgid "use frame pointer" msgstr "" -#: config/tc-arm.c:11672 +#: config/tc-arm.c:13160 msgid "use stack size checking" msgstr "" #. DON'T add any new processors to this list -- we want the whole list #. to go away... Add them to the processors table instead. -#: config/tc-arm.c:11676 config/tc-arm.c:11677 +#: config/tc-arm.c:13164 config/tc-arm.c:13165 msgid "use -mcpu=arm1" msgstr "" -#: config/tc-arm.c:11678 config/tc-arm.c:11679 +#: config/tc-arm.c:13166 config/tc-arm.c:13167 msgid "use -mcpu=arm2" msgstr "" -#: config/tc-arm.c:11680 config/tc-arm.c:11681 +#: config/tc-arm.c:13168 config/tc-arm.c:13169 msgid "use -mcpu=arm250" msgstr "" -#: config/tc-arm.c:11682 config/tc-arm.c:11683 +#: config/tc-arm.c:13170 config/tc-arm.c:13171 msgid "use -mcpu=arm3" msgstr "" -#: config/tc-arm.c:11684 config/tc-arm.c:11685 +#: config/tc-arm.c:13172 config/tc-arm.c:13173 msgid "use -mcpu=arm6" msgstr "" -#: config/tc-arm.c:11686 config/tc-arm.c:11687 +#: config/tc-arm.c:13174 config/tc-arm.c:13175 msgid "use -mcpu=arm600" msgstr "" -#: config/tc-arm.c:11688 config/tc-arm.c:11689 +#: config/tc-arm.c:13176 config/tc-arm.c:13177 msgid "use -mcpu=arm610" msgstr "" -#: config/tc-arm.c:11690 config/tc-arm.c:11691 +#: config/tc-arm.c:13178 config/tc-arm.c:13179 msgid "use -mcpu=arm620" msgstr "" -#: config/tc-arm.c:11692 config/tc-arm.c:11693 +#: config/tc-arm.c:13180 config/tc-arm.c:13181 msgid "use -mcpu=arm7" msgstr "" -#: config/tc-arm.c:11694 config/tc-arm.c:11695 +#: config/tc-arm.c:13182 config/tc-arm.c:13183 msgid "use -mcpu=arm70" msgstr "" -#: config/tc-arm.c:11696 config/tc-arm.c:11697 +#: config/tc-arm.c:13184 config/tc-arm.c:13185 msgid "use -mcpu=arm700" msgstr "" -#: config/tc-arm.c:11698 config/tc-arm.c:11699 +#: config/tc-arm.c:13186 config/tc-arm.c:13187 msgid "use -mcpu=arm700i" msgstr "" -#: config/tc-arm.c:11700 config/tc-arm.c:11701 +#: config/tc-arm.c:13188 config/tc-arm.c:13189 msgid "use -mcpu=arm710" msgstr "" -#: config/tc-arm.c:11702 config/tc-arm.c:11703 +#: config/tc-arm.c:13190 config/tc-arm.c:13191 msgid "use -mcpu=arm710c" msgstr "" -#: config/tc-arm.c:11704 config/tc-arm.c:11705 +#: config/tc-arm.c:13192 config/tc-arm.c:13193 msgid "use -mcpu=arm720" msgstr "" -#: config/tc-arm.c:11706 config/tc-arm.c:11707 +#: config/tc-arm.c:13194 config/tc-arm.c:13195 msgid "use -mcpu=arm7d" msgstr "" -#: config/tc-arm.c:11708 config/tc-arm.c:11709 +#: config/tc-arm.c:13196 config/tc-arm.c:13197 msgid "use -mcpu=arm7di" msgstr "" -#: config/tc-arm.c:11710 config/tc-arm.c:11711 +#: config/tc-arm.c:13198 config/tc-arm.c:13199 msgid "use -mcpu=arm7m" msgstr "" -#: config/tc-arm.c:11712 config/tc-arm.c:11713 +#: config/tc-arm.c:13200 config/tc-arm.c:13201 msgid "use -mcpu=arm7dm" msgstr "" -#: config/tc-arm.c:11714 config/tc-arm.c:11715 +#: config/tc-arm.c:13202 config/tc-arm.c:13203 msgid "use -mcpu=arm7dmi" msgstr "" -#: config/tc-arm.c:11716 config/tc-arm.c:11717 +#: config/tc-arm.c:13204 config/tc-arm.c:13205 msgid "use -mcpu=arm7100" msgstr "" -#: config/tc-arm.c:11718 config/tc-arm.c:11719 +#: config/tc-arm.c:13206 config/tc-arm.c:13207 msgid "use -mcpu=arm7500" msgstr "" -#: config/tc-arm.c:11720 config/tc-arm.c:11721 +#: config/tc-arm.c:13208 config/tc-arm.c:13209 msgid "use -mcpu=arm7500fe" msgstr "" -#: config/tc-arm.c:11722 config/tc-arm.c:11723 config/tc-arm.c:11724 -#: config/tc-arm.c:11725 +#: config/tc-arm.c:13210 config/tc-arm.c:13211 config/tc-arm.c:13212 +#: config/tc-arm.c:13213 msgid "use -mcpu=arm7tdmi" msgstr "" -#: config/tc-arm.c:11726 config/tc-arm.c:11727 +#: config/tc-arm.c:13214 config/tc-arm.c:13215 msgid "use -mcpu=arm710t" msgstr "" -#: config/tc-arm.c:11728 config/tc-arm.c:11729 +#: config/tc-arm.c:13216 config/tc-arm.c:13217 msgid "use -mcpu=arm720t" msgstr "" -#: config/tc-arm.c:11730 config/tc-arm.c:11731 +#: config/tc-arm.c:13218 config/tc-arm.c:13219 msgid "use -mcpu=arm740t" msgstr "" -#: config/tc-arm.c:11732 config/tc-arm.c:11733 +#: config/tc-arm.c:13220 config/tc-arm.c:13221 msgid "use -mcpu=arm8" msgstr "" -#: config/tc-arm.c:11734 config/tc-arm.c:11735 +#: config/tc-arm.c:13222 config/tc-arm.c:13223 msgid "use -mcpu=arm810" msgstr "" -#: config/tc-arm.c:11736 config/tc-arm.c:11737 +#: config/tc-arm.c:13224 config/tc-arm.c:13225 msgid "use -mcpu=arm9" msgstr "" -#: config/tc-arm.c:11738 config/tc-arm.c:11739 +#: config/tc-arm.c:13226 config/tc-arm.c:13227 msgid "use -mcpu=arm9tdmi" msgstr "" -#: config/tc-arm.c:11740 config/tc-arm.c:11741 +#: config/tc-arm.c:13228 config/tc-arm.c:13229 msgid "use -mcpu=arm920" msgstr "" -#: config/tc-arm.c:11742 config/tc-arm.c:11743 +#: config/tc-arm.c:13230 config/tc-arm.c:13231 msgid "use -mcpu=arm940" msgstr "" -#: config/tc-arm.c:11744 +#: config/tc-arm.c:13232 msgid "use -mcpu=strongarm" msgstr "" -#: config/tc-arm.c:11746 +#: config/tc-arm.c:13234 msgid "use -mcpu=strongarm110" msgstr "" -#: config/tc-arm.c:11748 +#: config/tc-arm.c:13236 msgid "use -mcpu=strongarm1100" msgstr "" -#: config/tc-arm.c:11750 +#: config/tc-arm.c:13238 msgid "use -mcpu=strongarm1110" msgstr "" -#: config/tc-arm.c:11751 +#: config/tc-arm.c:13239 msgid "use -mcpu=xscale" msgstr "" -#: config/tc-arm.c:11752 +#: config/tc-arm.c:13240 msgid "use -mcpu=iwmmxt" msgstr "" -#: config/tc-arm.c:11753 +#: config/tc-arm.c:13241 msgid "use -mcpu=all" msgstr "" #. Architecture variants -- don't add any more to this list either. -#: config/tc-arm.c:11756 config/tc-arm.c:11757 +#: config/tc-arm.c:13244 config/tc-arm.c:13245 msgid "use -march=armv2" msgstr "" -#: config/tc-arm.c:11758 config/tc-arm.c:11759 +#: config/tc-arm.c:13246 config/tc-arm.c:13247 msgid "use -march=armv2a" msgstr "" -#: config/tc-arm.c:11760 config/tc-arm.c:11761 +#: config/tc-arm.c:13248 config/tc-arm.c:13249 msgid "use -march=armv3" msgstr "" -#: config/tc-arm.c:11762 config/tc-arm.c:11763 +#: config/tc-arm.c:13250 config/tc-arm.c:13251 msgid "use -march=armv3m" msgstr "" -#: config/tc-arm.c:11764 config/tc-arm.c:11765 +#: config/tc-arm.c:13252 config/tc-arm.c:13253 msgid "use -march=armv4" msgstr "" -#: config/tc-arm.c:11766 config/tc-arm.c:11767 +#: config/tc-arm.c:13254 config/tc-arm.c:13255 msgid "use -march=armv4t" msgstr "" -#: config/tc-arm.c:11768 config/tc-arm.c:11769 +#: config/tc-arm.c:13256 config/tc-arm.c:13257 msgid "use -march=armv5" msgstr "" -#: config/tc-arm.c:11770 config/tc-arm.c:11771 +#: config/tc-arm.c:13258 config/tc-arm.c:13259 msgid "use -march=armv5t" msgstr "" -#: config/tc-arm.c:11772 config/tc-arm.c:11773 +#: config/tc-arm.c:13260 config/tc-arm.c:13261 msgid "use -march=armv5te" msgstr "" #. Floating point variants -- don't add any more to this list either. -#: config/tc-arm.c:11776 +#: config/tc-arm.c:13264 msgid "use -mfpu=fpe" msgstr "" -#: config/tc-arm.c:11777 +#: config/tc-arm.c:13265 msgid "use -mfpu=fpa10" msgstr "" -#: config/tc-arm.c:11778 +#: config/tc-arm.c:13266 msgid "use -mfpu=fpa11" msgstr "" -#: config/tc-arm.c:11780 +#: config/tc-arm.c:13268 msgid "use either -mfpu=softfpa or -mfpu=softvfp" msgstr "" -#: config/tc-arm.c:11963 +#: config/tc-arm.c:13474 msgid "invalid architectural extension" msgstr "" -#: config/tc-arm.c:11977 +#: config/tc-arm.c:13488 msgid "missing architectural extension" msgstr "" -#: config/tc-arm.c:11990 +#: config/tc-arm.c:13501 #, c-format msgid "unknown architectural extnsion `%s'" msgstr "" -#: config/tc-arm.c:12015 +#: config/tc-arm.c:13526 #, c-format msgid "missing cpu name `%s'" msgstr "" -#: config/tc-arm.c:12031 +#: config/tc-arm.c:13542 #, c-format msgid "unknown cpu `%s'" msgstr "" -#: config/tc-arm.c:12050 +#: config/tc-arm.c:13561 #, c-format msgid "missing architecture name `%s'" msgstr "" -#: config/tc-arm.c:12067 +#: config/tc-arm.c:13578 #, c-format msgid "unknown architecture `%s'\n" msgstr "" -#: config/tc-arm.c:12084 +#: config/tc-arm.c:13595 #, c-format msgid "unknown floating point format `%s'\n" msgstr "" -#: config/tc-arm.c:12090 +#: config/tc-arm.c:13612 +#, c-format +msgid "unknown floating point abi `%s'\n" +msgstr "" + +#: config/tc-arm.c:13618 msgid "<cpu name>\t assemble for CPU <cpu name>" msgstr "" -#: config/tc-arm.c:12092 +#: config/tc-arm.c:13620 msgid "<arch name>\t assemble for architecture <arch name>" msgstr "" -#: config/tc-arm.c:12094 +#: config/tc-arm.c:13622 msgid "<fpu name>\t assemble for FPU architecture <fpu name>" msgstr "" -#: config/tc-arm.c:12136 config/tc-arm.c:12158 +#: config/tc-arm.c:13624 +msgid "<abi>\t assemble for floating point ABI <abi>" +msgstr "" + +#: config/tc-arm.c:13666 config/tc-arm.c:13688 #, c-format msgid "option `-%c%s' is deprecated: %s" msgstr "" -#: config/tc-arm.c:12167 +#: config/tc-arm.c:13697 #, c-format msgid "unrecognized option `-%c%s'" msgstr "" -#: config/tc-arm.c:12181 +#: config/tc-arm.c:13711 +#, c-format msgid " ARM-specific assembler options:\n" msgstr "" -#: config/tc-arm.c:12192 +#: config/tc-arm.c:13722 +#, c-format msgid " -EB assemble code for a big-endian cpu\n" msgstr "" -#: config/tc-arm.c:12197 +#: config/tc-arm.c:13727 +#, c-format msgid " -EL assemble code for a little-endian cpu\n" msgstr "" -#: config/tc-arm.c:12381 +#: config/tc-arm.c:13909 #, c-format msgid "%s: unexpected function type: %d" msgstr "" -#: config/tc-arm.c:12756 +#: config/tc-arm.c:14285 msgid "alignments greater than 32 bytes not supported in .text sections." msgstr "" -#: config/tc-arm.h:98 +#: config/tc-arm.h:101 msgid "arm convert_frag\n" msgstr "" #: config/tc-avr.c:203 +#, c-format msgid "Known MCU names:" msgstr "" #: config/tc-avr.c:272 +#, c-format msgid "" "AVR options:\n" " -mmcu=[avr-name] select microcontroller variant\n" @@ -2667,6 +2811,7 @@ msgid "" msgstr "" #: config/tc-avr.c:282 +#, c-format msgid "" " -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n" " -mno-skip-bug disable warnings for skipping two-word instructions\n" @@ -2675,7 +2820,7 @@ msgid "" " (default for avr3, avr5)\n" msgstr "" -#: config/tc-avr.c:330 config/tc-msp430.c:257 +#: config/tc-avr.c:330 config/tc-msp430.c:272 #, c-format msgid "unknown MCU: %s\n" msgstr "" @@ -2686,9 +2831,9 @@ msgid "redefinition of mcu type `%s' to `%s'" msgstr "" #: config/tc-avr.c:390 config/tc-d10v.c:319 config/tc-d30v.c:365 -#: config/tc-mips.c:10137 config/tc-mmix.c:2246 config/tc-mn10200.c:361 -#: config/tc-msp430.c:378 config/tc-pj.c:374 config/tc-ppc.c:5105 -#: config/tc-sh.c:2528 config/tc-v850.c:1244 +#: config/tc-mips.c:10125 config/tc-mmix.c:2310 config/tc-mn10200.c:361 +#: config/tc-msp430.c:393 config/tc-pj.c:374 config/tc-ppc.c:5191 +#: config/tc-sh.c:2821 config/tc-v850.c:1253 msgid "bad call to md_atof" msgstr "" @@ -2763,20 +2908,20 @@ msgid "unknown constraint `%c'" msgstr "" #: config/tc-avr.c:881 config/tc-avr.c:897 config/tc-avr.c:998 -#: config/tc-msp430.c:1431 config/tc-msp430.c:1448 +#: config/tc-msp430.c:1437 config/tc-msp430.c:1454 #, c-format msgid "odd address operand: %ld" msgstr "" #: config/tc-avr.c:889 config/tc-avr.c:908 config/tc-d10v.c:586 -#: config/tc-d30v.c:655 config/tc-msp430.c:1439 config/tc-msp430.c:1453 -#: config/tc-msp430.c:1463 +#: config/tc-d30v.c:655 config/tc-msp430.c:1445 config/tc-msp430.c:1459 +#: config/tc-msp430.c:1469 #, c-format msgid "operand out of range: %ld" msgstr "" #: config/tc-avr.c:1007 config/tc-d10v.c:1793 config/tc-d30v.c:1973 -#: config/tc-msp430.c:1481 +#: config/tc-msp430.c:1487 #, c-format msgid "line %d: unknown relocation type: 0x%x" msgstr "" @@ -2786,16 +2931,16 @@ msgid "only constant expression allowed" msgstr "" #: config/tc-avr.c:1057 config/tc-d10v.c:1659 config/tc-d30v.c:1806 -#: config/tc-mn10200.c:1255 config/tc-mn10300.c:2303 config/tc-msp430.c:1520 -#: config/tc-or32.c:1618 config/tc-ppc.c:5919 config/tc-v850.c:2263 +#: config/tc-mn10200.c:1255 config/tc-mn10300.c:2303 config/tc-msp430.c:1525 +#: config/tc-or32.c:1618 config/tc-ppc.c:6014 config/tc-v850.c:2280 #, c-format msgid "reloc %d not supported by object file format" msgstr "" #: config/tc-avr.c:1081 config/tc-d10v.c:1248 config/tc-d10v.c:1262 -#: config/tc-h8300.c:1915 config/tc-h8500.c:1106 config/tc-mcore.c:938 -#: config/tc-msp430.c:438 config/tc-pj.c:283 config/tc-sh.c:2096 -#: config/tc-z8k.c:1238 +#: config/tc-h8300.c:1895 config/tc-h8500.c:1106 config/tc-mcore.c:938 +#: config/tc-msp430.c:453 config/tc-pj.c:283 config/tc-sh.c:2275 +#: config/tc-z8k.c:1204 msgid "can't find opcode " msgstr "" @@ -2808,7 +2953,7 @@ msgstr "" msgid "garbage at end of line" msgstr "" -#: config/tc-avr.c:1170 read.c:3226 +#: config/tc-avr.c:1170 read.c:3100 msgid "illegal expression" msgstr "" @@ -2830,17 +2975,17 @@ msgstr "" msgid "illegal %srelocation size: %d" msgstr "" -#: config/tc-cris.c:386 config/tc-m68hc11.c:2831 +#: config/tc-cris.c:386 config/tc-m68hc11.c:2793 #, c-format msgid "internal inconsistency problem in %s: fr_symbol %lx" msgstr "" -#: config/tc-cris.c:390 config/tc-m68hc11.c:2835 +#: config/tc-cris.c:390 config/tc-m68hc11.c:2797 #, c-format msgid "internal inconsistency problem in %s: resolved symbol" msgstr "" -#: config/tc-cris.c:396 config/tc-m68hc11.c:2841 +#: config/tc-cris.c:396 config/tc-m68hc11.c:2803 #, c-format msgid "internal inconsistency problem in %s: fr_subtype %d" msgstr "" @@ -2968,6 +3113,7 @@ msgid "Value not in 6 bit unsigned range: %ld" msgstr "" #: config/tc-cris.c:2924 +#, c-format msgid "Please use --help to see usage and options for this assembler.\n" msgstr "" @@ -2988,6 +3134,7 @@ msgstr "" #. The messages are formatted to line up with the generic options. #: config/tc-cris.c:3078 +#, c-format msgid "CRIS-specific options:\n" msgstr "" @@ -3058,6 +3205,7 @@ msgid "Pseudodirective .loc is only valid when generating ELF" msgstr "" #: config/tc-d10v.c:252 +#, c-format msgid "" "D10V options:\n" "-O Optimize. Will do some operations in parallel.\n" @@ -3068,8 +3216,8 @@ msgid "" msgstr "" #: config/tc-d10v.c:543 config/tc-d30v.c:549 config/tc-mn10200.c:937 -#: config/tc-mn10300.c:1812 config/tc-ppc.c:2332 config/tc-s390.c:1234 -#: config/tc-tic80.c:275 config/tc-v850.c:2021 +#: config/tc-mn10300.c:1812 config/tc-ppc.c:2369 config/tc-s390.c:1234 +#: config/tc-tic80.c:275 config/tc-v850.c:2038 msgid "illegal operand" msgstr "" @@ -3169,7 +3317,7 @@ msgstr "" msgid "bad opcode or operands" msgstr "" -#: config/tc-d10v.c:1503 config/tc-m68k.c:4305 +#: config/tc-d10v.c:1503 config/tc-m68k.c:4475 msgid "value out of range" msgstr "" @@ -3201,6 +3349,7 @@ msgid "Register name %s conflicts with symbol of the same name" msgstr "" #: config/tc-d30v.c:287 +#, c-format msgid "" "\n" "D30V options:\n" @@ -3332,7 +3481,7 @@ msgstr "" msgid "value too large to fit in %d bits" msgstr "" -#: config/tc-d30v.c:2196 +#: config/tc-d30v.c:2194 #, c-format msgid "Alignment too large: %d assumed" msgstr "" @@ -3345,48 +3494,49 @@ msgstr "" msgid ".endfunc missing for previous .proc" msgstr "" -#: config/tc-dlx.c:498 +#: config/tc-dlx.c:497 #, c-format msgid "Expression Error for operand modifier %%hi/%%lo\n" msgstr "" -#: config/tc-dlx.c:552 +#: config/tc-dlx.c:551 #, c-format msgid "Bad operand for a load instruction: <%s>" msgstr "" -#: config/tc-dlx.c:667 +#: config/tc-dlx.c:666 #, c-format msgid "Bad operand for a store instruction: <%s>" msgstr "" -#: config/tc-dlx.c:865 +#: config/tc-dlx.c:864 msgid "Can not set dlx_skip_hi16_flag" msgstr "" -#: config/tc-dlx.c:879 +#: config/tc-dlx.c:878 #, c-format msgid "Missing arguments for opcode <%s>." msgstr "" -#: config/tc-dlx.c:950 +#: config/tc-dlx.c:949 #, c-format msgid "Both the_insn.HI and the_insn.LO are set : %s" msgstr "" -#: config/tc-dlx.c:1022 +#: config/tc-dlx.c:1021 msgid "failed regnum sanity check." msgstr "" -#: config/tc-dlx.c:1035 +#: config/tc-dlx.c:1034 msgid "failed general register sanity check." msgstr "" -#: config/tc-dlx.c:1324 +#: config/tc-dlx.c:1321 msgid "Invalid expression after # number\n" msgstr "" #: config/tc-fr30.c:85 +#, c-format msgid " FR30 specific command line options:\n" msgstr "" @@ -3395,282 +3545,317 @@ msgstr "" msgid "Instruction %s not allowed in a delay slot." msgstr "" -#: config/tc-fr30.c:383 config/tc-m32r.c:1576 +#: config/tc-fr30.c:383 config/tc-m32r.c:1850 msgid "Addend to unresolved symbol not on word boundary." msgstr "" -#: config/tc-fr30.c:524 config/tc-frv.c:1289 config/tc-i960.c:798 -#: config/tc-ip2k.c:351 config/tc-m32r.c:1884 config/tc-openrisc.c:452 +#: config/tc-fr30.c:524 config/tc-frv.c:1478 config/tc-i960.c:798 +#: config/tc-ip2k.c:350 config/tc-m32r.c:2166 config/tc-openrisc.c:452 #: config/tc-xstormy16.c:636 msgid "Bad call to md_atof()" msgstr "" -#: config/tc-frv.c:413 +#: config/tc-frv.c:447 +#, c-format msgid "FRV specific command line options:\n" msgstr "" -#: config/tc-frv.c:414 +#: config/tc-frv.c:448 +#, c-format msgid "-G n Data >= n bytes is in small data area\n" msgstr "" -#: config/tc-frv.c:415 +#: config/tc-frv.c:449 +#, c-format msgid "-mgpr-32 Note 32 gprs are used\n" msgstr "" -#: config/tc-frv.c:416 +#: config/tc-frv.c:450 +#, c-format msgid "-mgpr-64 Note 64 gprs are used\n" msgstr "" -#: config/tc-frv.c:417 +#: config/tc-frv.c:451 +#, c-format msgid "-mfpr-32 Note 32 fprs are used\n" msgstr "" -#: config/tc-frv.c:418 +#: config/tc-frv.c:452 +#, c-format msgid "-mfpr-64 Note 64 fprs are used\n" msgstr "" -#: config/tc-frv.c:419 +#: config/tc-frv.c:453 +#, c-format msgid "-msoft-float Note software fp is used\n" msgstr "" -#: config/tc-frv.c:420 +#: config/tc-frv.c:454 +#, c-format msgid "-mdword Note stack is aligned to a 8 byte boundary\n" msgstr "" -#: config/tc-frv.c:421 +#: config/tc-frv.c:455 +#, c-format msgid "-mno-dword Note stack is aligned to a 4 byte boundary\n" msgstr "" -#: config/tc-frv.c:422 +#: config/tc-frv.c:456 +#, c-format msgid "-mdouble Note fp double insns are used\n" msgstr "" -#: config/tc-frv.c:423 +#: config/tc-frv.c:457 +#, c-format msgid "-mmedia Note media insns are used\n" msgstr "" -#: config/tc-frv.c:424 +#: config/tc-frv.c:458 +#, c-format msgid "-mmuladd Note multiply add/subtract insns are used\n" msgstr "" -#: config/tc-frv.c:425 +#: config/tc-frv.c:459 +#, c-format msgid "-mpack Note instructions are packed\n" msgstr "" -#: config/tc-frv.c:426 +#: config/tc-frv.c:460 +#, c-format msgid "-mno-pack Do not allow instructions to be packed\n" msgstr "" -#: config/tc-frv.c:427 +#: config/tc-frv.c:461 +#, c-format msgid "-mpic Note small position independent code\n" msgstr "" -#: config/tc-frv.c:428 +#: config/tc-frv.c:462 +#, c-format msgid "-mPIC Note large position independent code\n" msgstr "" -#: config/tc-frv.c:429 +#: config/tc-frv.c:463 +#, c-format msgid "-mlibrary-pic Compile library for large position indepedent code\n" msgstr "" -#: config/tc-frv.c:430 -msgid "-mcpu={fr500|fr400|fr300|frv|simple|tomcat}\n" +#: config/tc-frv.c:464 +#, c-format +msgid "-mcpu={fr500|fr550|fr400|fr405|fr450|fr300|frv|simple|tomcat}\n" msgstr "" -#: config/tc-frv.c:431 +#: config/tc-frv.c:465 +#, c-format msgid " Record the cpu type\n" msgstr "" -#: config/tc-frv.c:432 +#: config/tc-frv.c:466 +#, c-format msgid "-mtomcat-stats Print out stats for tomcat workarounds\n" msgstr "" -#: config/tc-frv.c:433 +#: config/tc-frv.c:467 +#, c-format msgid "-mtomcat-debug Debug tomcat workarounds\n" msgstr "" -#: config/tc-frv.c:1012 +#: config/tc-frv.c:1165 msgid "VLIW packing used for -mno-pack" msgstr "" -#: config/tc-frv.c:1025 +#: config/tc-frv.c:1175 +msgid "Instruction not supported by this architecture" +msgstr "" + +#: config/tc-frv.c:1185 msgid "VLIW packing constraint violation" msgstr "" -#: config/tc-frv.c:1540 +#: config/tc-frv.c:1742 #, c-format msgid "Relocation %s is not safe for %s" msgstr "" -#: config/tc-h8300.c:84 config/tc-h8300.c:96 config/tc-h8300.c:109 -#: config/tc-h8300.c:122 config/tc-h8300.c:135 config/tc-h8300.c:149 -#: config/tc-h8300.c:222 config/tc-hppa.c:1423 config/tc-hppa.c:6909 -#: config/tc-hppa.c:6915 config/tc-hppa.c:6921 config/tc-hppa.c:6927 +#: config/tc-h8300.c:82 config/tc-h8300.c:93 config/tc-h8300.c:105 +#: config/tc-h8300.c:117 config/tc-h8300.c:129 config/tc-h8300.c:142 +#: config/tc-h8300.c:213 config/tc-hppa.c:1436 config/tc-hppa.c:6920 +#: config/tc-hppa.c:6926 config/tc-hppa.c:6932 config/tc-hppa.c:6938 #: config/tc-mn10300.c:1218 config/tc-mn10300.c:1223 config/tc-mn10300.c:2722 msgid "could not set architecture and machine" msgstr "" -#: config/tc-h8300.c:436 config/tc-h8300.c:444 +#: config/tc-h8300.c:416 config/tc-h8300.c:424 msgid "Reg not valid for H8/300" msgstr "" -#: config/tc-h8300.c:529 +#: config/tc-h8300.c:505 msgid "invalid operand size requested" msgstr "" -#: config/tc-h8300.c:626 config/tc-h8300.c:629 +#: config/tc-h8300.c:604 msgid "Invalid register list for ldm/stm\n" msgstr "" -#: config/tc-h8300.c:632 -msgid "Invalid register list for ldm/stm)\n" -msgstr "" - -#: config/tc-h8300.c:658 config/tc-h8300.c:663 config/tc-h8300.c:670 +#: config/tc-h8300.c:630 config/tc-h8300.c:635 config/tc-h8300.c:642 msgid "mismatch between register and suffix" msgstr "" -#: config/tc-h8300.c:697 +#: config/tc-h8300.c:669 msgid "address too high for vector table jmp/jsr" msgstr "" -#: config/tc-h8300.c:722 config/tc-h8300.c:832 config/tc-h8300.c:840 +#: config/tc-h8300.c:696 config/tc-h8300.c:808 config/tc-h8300.c:818 msgid "Wrong size pointer register for architecture." msgstr "" -#: config/tc-h8300.c:781 config/tc-h8300.c:789 config/tc-h8300.c:818 +#: config/tc-h8300.c:755 config/tc-h8300.c:763 config/tc-h8300.c:792 msgid "expected @(exp, reg16)" msgstr "" -#: config/tc-h8300.c:807 +#: config/tc-h8300.c:781 msgid "expected .L, .W or .B for register in indexed addressing mode" msgstr "" -#: config/tc-h8300.c:1000 +#: config/tc-h8300.c:975 msgid "expected valid addressing mode for mova: \"@(disp, ea.sz),ERn\"" msgstr "" -#: config/tc-h8300.c:1018 config/tc-h8300.c:1027 +#: config/tc-h8300.c:992 config/tc-h8300.c:1001 msgid "expected register" msgstr "" -#: config/tc-h8300.c:1043 +#: config/tc-h8300.c:1017 msgid "expected closing paren" msgstr "" -#: config/tc-h8300.c:1104 +#: config/tc-h8300.c:1076 #, c-format msgid "can't use high part of register in operand %d" msgstr "" -#: config/tc-h8300.c:1268 +#: config/tc-h8300.c:1242 #, c-format msgid "Opcode `%s' with these operand types not available in %s mode" msgstr "" -#: config/tc-h8300.c:1277 +#: config/tc-h8300.c:1251 msgid "mismatch between opcode size and operand size" msgstr "" -#: config/tc-h8300.c:1316 +#: config/tc-h8300.c:1287 #, c-format msgid "operand %s0x%lx out of range." msgstr "" -#: config/tc-h8300.c:1415 +#: config/tc-h8300.c:1383 msgid "Can't work out size of operand.\n" msgstr "" -#: config/tc-h8300.c:1466 +#: config/tc-h8300.c:1432 #, c-format msgid "Opcode `%s' with these operand types not available in H8/300 mode" msgstr "" -#: config/tc-h8300.c:1471 +#: config/tc-h8300.c:1437 #, c-format msgid "Opcode `%s' with these operand types not available in H8/300H mode" msgstr "" -#: config/tc-h8300.c:1477 +#: config/tc-h8300.c:1443 #, c-format msgid "Opcode `%s' with these operand types not available in H8/300S mode" msgstr "" -#: config/tc-h8300.c:1538 config/tc-h8300.c:1558 +#: config/tc-h8300.c:1504 config/tc-h8300.c:1524 msgid "Need #1 or #2 here" msgstr "" -#: config/tc-h8300.c:1553 +#: config/tc-h8300.c:1519 msgid "#4 not valid on H8/300." msgstr "" -#: config/tc-h8300.c:1645 config/tc-h8300.c:1727 +#: config/tc-h8300.c:1625 config/tc-h8300.c:1707 #, c-format msgid "branch operand has odd offset (%lx)\n" msgstr "" -#: config/tc-h8300.c:1766 +#: config/tc-h8300.c:1745 msgid "destination operand must be 16 bit register" msgstr "" -#: config/tc-h8300.c:1775 +#: config/tc-h8300.c:1754 msgid "source operand must be 8 bit register" msgstr "" -#: config/tc-h8300.c:1783 +#: config/tc-h8300.c:1762 msgid "destination operand must be 16bit absolute address" msgstr "" -#: config/tc-h8300.c:1790 +#: config/tc-h8300.c:1769 msgid "destination operand must be 8 bit register" msgstr "" -#: config/tc-h8300.c:1798 +#: config/tc-h8300.c:1777 msgid "source operand must be 16bit absolute address" msgstr "" #. This seems more sane than saying "too many operands". We'll #. get here only if the trailing trash starts with a comma. -#: config/tc-h8300.c:1806 config/tc-mmix.c:454 config/tc-mmix.c:466 -#: config/tc-mmix.c:2502 config/tc-mmix.c:2526 config/tc-mmix.c:2802 +#. Types or values of args don't match. +#: config/tc-h8300.c:1785 config/tc-mmix.c:499 config/tc-mmix.c:511 +#: config/tc-mmix.c:2577 config/tc-mmix.c:2601 config/tc-mmix.c:2878 #: config/tc-or32.c:640 config/tc-or32.c:854 msgid "invalid operands" msgstr "" -#: config/tc-h8300.c:1839 +#: config/tc-h8300.c:1816 msgid "operand/size mis-match" msgstr "" -#: config/tc-h8300.c:1926 config/tc-h8500.c:1112 config/tc-mips.c:9302 -#: config/tc-sh.c:2363 config/tc-sh64.c:2837 config/tc-w65.c:691 -#: config/tc-z8k.c:1248 +#: config/tc-h8300.c:1912 config/tc-h8500.c:1112 config/tc-mips.c:9289 +#: config/tc-sh64.c:2784 config/tc-sh.c:2655 config/tc-w65.c:691 +#: config/tc-z8k.c:1214 msgid "unknown opcode" msgstr "" -#: config/tc-h8300.c:2031 config/tc-h8500.c:1139 config/tc-sh.c:2483 -#: config/tc-z8k.c:1304 +#: config/tc-h8300.c:1945 +msgid "invalid operand in ldm" +msgstr "" + +#: config/tc-h8300.c:1954 +msgid "invalid operand in stm" +msgstr "" + +#: config/tc-h8300.c:2037 config/tc-h8500.c:1139 config/tc-sh.c:2780 +#: config/tc-z8k.c:1269 +#, c-format msgid "call to tc_crawl_symbol_chain \n" msgstr "" -#: config/tc-h8300.c:2047 config/tc-h8500.c:1153 config/tc-sh.c:2490 -#: config/tc-z8k.c:1320 +#: config/tc-h8300.c:2051 config/tc-h8500.c:1153 config/tc-sh.c:2786 +#: config/tc-z8k.c:1283 +#, c-format msgid "call to tc_headers_hook \n" msgstr "" -#: config/tc-h8300.c:2140 +#: config/tc-h8300.c:2138 +#, c-format msgid "call to tc_aout_fix_to_chars \n" msgstr "" -#: config/tc-h8300.c:2154 +#: config/tc-h8300.c:2152 +#, c-format msgid "call to md_convert_frag \n" msgstr "" -#: config/tc-h8300.c:2216 +#: config/tc-h8300.c:2206 +#, c-format msgid "call tomd_estimate_size_before_relax \n" msgstr "" -#: config/tc-h8300.c:2337 config/tc-mcore.c:2355 config/tc-pj.c:581 -#: config/tc-sh.c:3956 +#: config/tc-h8300.c:2317 config/tc-mcore.c:2355 config/tc-pj.c:581 +#: config/tc-sh.c:4240 #, c-format msgid "Cannot represent relocation type %s" msgstr "" @@ -3703,7 +3888,7 @@ msgstr "" msgid "@Rn needs word register" msgstr "" -#: config/tc-h8500.c:838 config/tc-sh.c:1827 +#: config/tc-h8500.c:838 config/tc-sh.c:2013 #, c-format msgid "unhandled %d\n" msgstr "" @@ -3713,597 +3898,601 @@ msgstr "" msgid "operand must be absolute in range %d..%d" msgstr "" -#: config/tc-h8500.c:963 config/tc-sh.c:2036 +#: config/tc-h8500.c:963 config/tc-sh.c:2216 #, c-format msgid "failed for %d\n" msgstr "" -#: config/tc-h8500.c:1128 config/tc-sh.c:2138 config/tc-sh.c:2412 +#: config/tc-h8500.c:1128 config/tc-sh.c:2316 config/tc-sh.c:2711 #: config/tc-w65.c:710 msgid "invalid operands for opcode" msgstr "" -#. Simple range checking for FIELD againt HIGH and LOW bounds. +#. Simple range checking for FIELD against HIGH and LOW bounds. #. IGNORE is used to suppress the error message. -#: config/tc-hppa.c:1156 config/tc-hppa.c:1170 +#. Variant of CHECK_FIELD for use in md_apply_fix3 and other places where +#. the current file and line number are not valid. +#: config/tc-hppa.c:1169 config/tc-hppa.c:1183 #, c-format msgid "Field out of range [%d..%d] (%d)." msgstr "" -#. Simple alignment checking for FIELD againt ALIGN (a power of two). +#. Simple alignment checking for FIELD against ALIGN (a power of two). #. IGNORE is used to suppress the error message. -#: config/tc-hppa.c:1184 +#: config/tc-hppa.c:1197 #, c-format msgid "Field not properly aligned [%d] (%d)." msgstr "" -#: config/tc-hppa.c:1213 +#: config/tc-hppa.c:1226 msgid "Missing .exit\n" msgstr "" -#: config/tc-hppa.c:1216 +#: config/tc-hppa.c:1229 msgid "Missing .procend\n" msgstr "" -#: config/tc-hppa.c:1396 +#: config/tc-hppa.c:1409 #, c-format msgid "Invalid field selector. Assuming F%%." msgstr "" -#: config/tc-hppa.c:1429 +#: config/tc-hppa.c:1442 msgid "-R option not supported on this target." msgstr "" -#: config/tc-hppa.c:1445 config/tc-sparc.c:809 config/tc-sparc.c:845 +#: config/tc-hppa.c:1458 config/tc-sparc.c:814 config/tc-sparc.c:850 #, c-format msgid "Internal error: can't hash `%s': %s\n" msgstr "" -#: config/tc-hppa.c:1453 config/tc-i860.c:201 +#: config/tc-hppa.c:1466 config/tc-i860.c:238 #, c-format msgid "internal error: losing opcode: `%s' \"%s\"\n" msgstr "" -#: config/tc-hppa.c:1524 config/tc-hppa.c:7048 config/tc-hppa.c:7105 +#: config/tc-hppa.c:1537 config/tc-hppa.c:7059 config/tc-hppa.c:7116 msgid "Missing function name for .PROC (corrupted label chain)" msgstr "" -#: config/tc-hppa.c:1527 config/tc-hppa.c:7108 +#: config/tc-hppa.c:1540 config/tc-hppa.c:7119 msgid "Missing function name for .PROC" msgstr "" -#: config/tc-hppa.c:1634 config/tc-hppa.c:4905 +#: config/tc-hppa.c:1647 config/tc-hppa.c:4916 msgid "could not update architecture and machine" msgstr "" -#: config/tc-hppa.c:1842 +#: config/tc-hppa.c:1855 msgid "Invalid Indexed Load Completer." msgstr "" -#: config/tc-hppa.c:1847 +#: config/tc-hppa.c:1860 msgid "Invalid Indexed Load Completer Syntax." msgstr "" -#: config/tc-hppa.c:1884 +#: config/tc-hppa.c:1897 msgid "Invalid Short Load/Store Completer." msgstr "" -#: config/tc-hppa.c:1944 config/tc-hppa.c:1949 +#: config/tc-hppa.c:1957 config/tc-hppa.c:1962 msgid "Invalid Store Bytes Short Completer" msgstr "" -#: config/tc-hppa.c:2260 config/tc-hppa.c:2266 +#: config/tc-hppa.c:2273 config/tc-hppa.c:2279 msgid "Invalid left/right combination completer" msgstr "" -#: config/tc-hppa.c:2315 config/tc-hppa.c:2322 +#: config/tc-hppa.c:2328 config/tc-hppa.c:2335 msgid "Invalid permutation completer" msgstr "" -#: config/tc-hppa.c:2423 +#: config/tc-hppa.c:2435 #, c-format msgid "Invalid Add Condition: %s" msgstr "" -#: config/tc-hppa.c:2434 config/tc-hppa.c:2444 +#: config/tc-hppa.c:2446 config/tc-hppa.c:2456 msgid "Invalid Add and Branch Condition" msgstr "" -#: config/tc-hppa.c:2465 config/tc-hppa.c:2603 +#: config/tc-hppa.c:2477 config/tc-hppa.c:2614 msgid "Invalid Compare/Subtract Condition" msgstr "" -#: config/tc-hppa.c:2505 +#: config/tc-hppa.c:2517 #, c-format msgid "Invalid Bit Branch Condition: %c" msgstr "" -#: config/tc-hppa.c:2591 +#: config/tc-hppa.c:2602 #, c-format msgid "Invalid Compare/Subtract Condition: %s" msgstr "" -#: config/tc-hppa.c:2618 +#: config/tc-hppa.c:2629 msgid "Invalid Compare and Branch Condition" msgstr "" -#: config/tc-hppa.c:2714 +#: config/tc-hppa.c:2725 msgid "Invalid Logical Instruction Condition." msgstr "" -#: config/tc-hppa.c:2769 +#: config/tc-hppa.c:2780 msgid "Invalid Shift/Extract/Deposit Condition." msgstr "" -#: config/tc-hppa.c:2881 +#: config/tc-hppa.c:2892 msgid "Invalid Unit Instruction Condition." msgstr "" -#: config/tc-hppa.c:3258 config/tc-hppa.c:3290 config/tc-hppa.c:3321 -#: config/tc-hppa.c:3351 +#: config/tc-hppa.c:3269 config/tc-hppa.c:3301 config/tc-hppa.c:3332 +#: config/tc-hppa.c:3362 msgid "Branch to unaligned address" msgstr "" -#: config/tc-hppa.c:3529 +#: config/tc-hppa.c:3540 msgid "Invalid SFU identifier" msgstr "" -#: config/tc-hppa.c:3579 +#: config/tc-hppa.c:3590 msgid "Invalid COPR identifier" msgstr "" -#: config/tc-hppa.c:3708 +#: config/tc-hppa.c:3719 msgid "Invalid Floating Point Operand Format." msgstr "" -#: config/tc-hppa.c:3825 config/tc-hppa.c:3845 config/tc-hppa.c:3865 -#: config/tc-hppa.c:3885 config/tc-hppa.c:3905 +#: config/tc-hppa.c:3836 config/tc-hppa.c:3856 config/tc-hppa.c:3876 +#: config/tc-hppa.c:3896 config/tc-hppa.c:3916 msgid "Invalid register for single precision fmpyadd or fmpysub" msgstr "" -#: config/tc-hppa.c:3962 +#: config/tc-hppa.c:3973 #, c-format msgid "Invalid operands %s" msgstr "" -#: config/tc-hppa.c:4080 +#: config/tc-hppa.c:4091 msgid "Cannot handle fixup" msgstr "" -#: config/tc-hppa.c:4381 +#: config/tc-hppa.c:4392 +#, c-format msgid " -Q ignored\n" msgstr "" -#: config/tc-hppa.c:4385 +#: config/tc-hppa.c:4396 +#, c-format msgid " -c print a warning if a comment is found\n" msgstr "" -#: config/tc-hppa.c:4456 +#: config/tc-hppa.c:4467 #, c-format msgid "no hppa_fixup entry for fixup type 0x%x" msgstr "" -#: config/tc-hppa.c:4627 +#: config/tc-hppa.c:4638 msgid "Unknown relocation encountered in md_apply_fix." msgstr "" -#: config/tc-hppa.c:4769 config/tc-hppa.c:4794 +#: config/tc-hppa.c:4780 config/tc-hppa.c:4805 #, c-format msgid "Undefined register: '%s'." msgstr "" -#: config/tc-hppa.c:4828 +#: config/tc-hppa.c:4839 #, c-format msgid "Non-absolute symbol: '%s'." msgstr "" -#: config/tc-hppa.c:4843 +#: config/tc-hppa.c:4854 #, c-format msgid "Undefined absolute constant: '%s'." msgstr "" -#: config/tc-hppa.c:4944 +#: config/tc-hppa.c:4955 #, c-format msgid "Invalid FP Compare Condition: %s" msgstr "" -#: config/tc-hppa.c:5000 +#: config/tc-hppa.c:5011 #, c-format msgid "Invalid FTEST completer: %s" msgstr "" -#: config/tc-hppa.c:5067 config/tc-hppa.c:5105 +#: config/tc-hppa.c:5078 config/tc-hppa.c:5116 #, c-format msgid "Invalid FP Operand Format: %3s" msgstr "" -#: config/tc-hppa.c:5184 +#: config/tc-hppa.c:5195 msgid "Bad segment in expression." msgstr "" -#: config/tc-hppa.c:5243 +#: config/tc-hppa.c:5254 msgid "Bad segment (should be absolute)." msgstr "" -#: config/tc-hppa.c:5286 +#: config/tc-hppa.c:5297 #, c-format msgid "Invalid argument location: %s\n" msgstr "" -#: config/tc-hppa.c:5317 +#: config/tc-hppa.c:5328 #, c-format msgid "Invalid argument description: %d" msgstr "" -#: config/tc-hppa.c:5340 +#: config/tc-hppa.c:5351 #, c-format msgid "Invalid Nullification: (%c)" msgstr "" -#: config/tc-hppa.c:6060 +#: config/tc-hppa.c:6071 #, c-format msgid "Invalid .CALL argument: %s" msgstr "" -#: config/tc-hppa.c:6182 +#: config/tc-hppa.c:6193 msgid ".callinfo is not within a procedure definition" msgstr "" -#: config/tc-hppa.c:6202 +#: config/tc-hppa.c:6213 #, c-format msgid "FRAME parameter must be a multiple of 8: %d\n" msgstr "" -#: config/tc-hppa.c:6221 +#: config/tc-hppa.c:6232 msgid "Value for ENTRY_GR must be in the range 3..18\n" msgstr "" -#: config/tc-hppa.c:6233 +#: config/tc-hppa.c:6244 msgid "Value for ENTRY_FR must be in the range 12..21\n" msgstr "" -#: config/tc-hppa.c:6243 +#: config/tc-hppa.c:6254 msgid "Value for ENTRY_SR must be 3\n" msgstr "" -#: config/tc-hppa.c:6299 +#: config/tc-hppa.c:6310 #, c-format msgid "Invalid .CALLINFO argument: %s" msgstr "" -#: config/tc-hppa.c:6410 +#: config/tc-hppa.c:6421 msgid "The .ENTER pseudo-op is not supported" msgstr "" -#: config/tc-hppa.c:6426 +#: config/tc-hppa.c:6437 msgid "Misplaced .entry. Ignored." msgstr "" -#: config/tc-hppa.c:6430 +#: config/tc-hppa.c:6441 msgid "Missing .callinfo." msgstr "" -#: config/tc-hppa.c:6496 +#: config/tc-hppa.c:6507 msgid ".REG expression must be a register" msgstr "" -#: config/tc-hppa.c:6512 +#: config/tc-hppa.c:6523 msgid "bad or irreducible absolute expression; zero assumed" msgstr "" -#: config/tc-hppa.c:6523 +#: config/tc-hppa.c:6534 msgid ".REG must use a label" msgstr "" -#: config/tc-hppa.c:6525 +#: config/tc-hppa.c:6536 msgid ".EQU must use a label" msgstr "" -#: config/tc-hppa.c:6578 +#: config/tc-hppa.c:6589 msgid ".EXIT must appear within a procedure" msgstr "" -#: config/tc-hppa.c:6582 +#: config/tc-hppa.c:6593 msgid "Missing .callinfo" msgstr "" -#: config/tc-hppa.c:6586 +#: config/tc-hppa.c:6597 msgid "No .ENTRY for this .EXIT" msgstr "" -#: config/tc-hppa.c:6613 +#: config/tc-hppa.c:6624 #, c-format msgid "Cannot define export symbol: %s\n" msgstr "" -#: config/tc-hppa.c:6671 +#: config/tc-hppa.c:6682 #, c-format msgid "Using ENTRY rather than CODE in export directive for %s" msgstr "" -#: config/tc-hppa.c:6788 +#: config/tc-hppa.c:6799 #, c-format msgid "Undefined .EXPORT/.IMPORT argument (ignored): %s" msgstr "" -#: config/tc-hppa.c:6870 +#: config/tc-hppa.c:6881 msgid "Missing label name on .LABEL" msgstr "" -#: config/tc-hppa.c:6875 +#: config/tc-hppa.c:6886 msgid "extra .LABEL arguments ignored." msgstr "" -#: config/tc-hppa.c:6892 +#: config/tc-hppa.c:6903 msgid "The .LEAVE pseudo-op is not supported" msgstr "" -#: config/tc-hppa.c:6931 +#: config/tc-hppa.c:6942 msgid "Unrecognized .LEVEL argument\n" msgstr "" -#: config/tc-hppa.c:6967 +#: config/tc-hppa.c:6978 #, c-format msgid "Cannot define static symbol: %s\n" msgstr "" -#: config/tc-hppa.c:7002 +#: config/tc-hppa.c:7013 msgid "Nested procedures" msgstr "" -#: config/tc-hppa.c:7012 +#: config/tc-hppa.c:7023 msgid "Cannot allocate unwind descriptor\n" msgstr "" -#: config/tc-hppa.c:7112 +#: config/tc-hppa.c:7123 msgid "misplaced .procend" msgstr "" -#: config/tc-hppa.c:7115 +#: config/tc-hppa.c:7126 msgid "Missing .callinfo for this procedure" msgstr "" -#: config/tc-hppa.c:7118 +#: config/tc-hppa.c:7129 msgid "Missing .EXIT for a .ENTRY" msgstr "" -#: config/tc-hppa.c:7156 +#: config/tc-hppa.c:7167 msgid "Not in a space.\n" msgstr "" -#: config/tc-hppa.c:7159 +#: config/tc-hppa.c:7170 msgid "Not in a subspace.\n" msgstr "" -#: config/tc-hppa.c:7250 +#: config/tc-hppa.c:7261 msgid "Invalid .SPACE argument" msgstr "" -#: config/tc-hppa.c:7297 +#: config/tc-hppa.c:7308 msgid "Can't change spaces within a procedure definition. Ignored" msgstr "" -#: config/tc-hppa.c:7426 +#: config/tc-hppa.c:7437 #, c-format msgid "Undefined space: '%s' Assuming space number = 0." msgstr "" -#: config/tc-hppa.c:7450 +#: config/tc-hppa.c:7461 msgid "Must be in a space before changing or declaring subspaces.\n" msgstr "" -#: config/tc-hppa.c:7454 +#: config/tc-hppa.c:7465 msgid "Can't change subspaces within a procedure definition. Ignored" msgstr "" -#: config/tc-hppa.c:7489 +#: config/tc-hppa.c:7500 msgid "Parameters of an existing subspace can't be modified" msgstr "" -#: config/tc-hppa.c:7540 +#: config/tc-hppa.c:7551 msgid "Alignment must be a power of 2" msgstr "" -#: config/tc-hppa.c:7582 +#: config/tc-hppa.c:7593 msgid "FIRST not supported as a .SUBSPACE argument" msgstr "" -#: config/tc-hppa.c:7584 +#: config/tc-hppa.c:7595 msgid "Invalid .SUBSPACE argument" msgstr "" -#: config/tc-hppa.c:7764 +#: config/tc-hppa.c:7775 #, c-format msgid "Internal error: Unable to find containing space for %s." msgstr "" -#: config/tc-hppa.c:7803 +#: config/tc-hppa.c:7814 #, c-format msgid "Out of memory: could not allocate new space chain entry: %s\n" msgstr "" -#: config/tc-hppa.c:7889 +#: config/tc-hppa.c:7900 #, c-format msgid "Out of memory: could not allocate new subspace chain entry: %s\n" msgstr "" -#: config/tc-hppa.c:8622 +#: config/tc-hppa.c:8633 #, c-format msgid "Symbol '%s' could not be created." msgstr "" -#: config/tc-hppa.c:8626 +#: config/tc-hppa.c:8637 msgid "No memory for symbol name." msgstr "" -#: config/tc-i386.c:689 +#: config/tc-i386.c:684 #, c-format msgid "%s shortened to %s" msgstr "" -#: config/tc-i386.c:745 +#: config/tc-i386.c:740 msgid "same type of prefix used twice" msgstr "" -#: config/tc-i386.c:763 +#: config/tc-i386.c:758 msgid "64bit mode not supported on this CPU." msgstr "" -#: config/tc-i386.c:767 +#: config/tc-i386.c:762 msgid "32bit mode not supported on this CPU." msgstr "" -#: config/tc-i386.c:800 +#: config/tc-i386.c:795 msgid "bad argument to syntax directive." msgstr "" -#: config/tc-i386.c:844 +#: config/tc-i386.c:832 #, c-format msgid "no such architecture: `%s'" msgstr "" -#: config/tc-i386.c:849 +#: config/tc-i386.c:837 msgid "missing cpu architecture" msgstr "" -#: config/tc-i386.c:863 +#: config/tc-i386.c:851 #, c-format msgid "no such architecture modifier: `%s'" msgstr "" -#: config/tc-i386.c:880 config/tc-i386.c:5022 +#: config/tc-i386.c:867 config/tc-i386.c:4961 msgid "Unknown architecture" msgstr "" -#: config/tc-i386.c:915 config/tc-i386.c:938 config/tc-m68k.c:3816 +#: config/tc-i386.c:901 config/tc-i386.c:924 config/tc-m68k.c:3980 #, c-format msgid "Internal Error: Can't hash %s: %s" msgstr "" -#: config/tc-i386.c:1192 +#: config/tc-i386.c:1177 msgid "There are no unsigned pc-relative relocations" msgstr "" -#: config/tc-i386.c:1199 config/tc-i386.c:5234 +#: config/tc-i386.c:1184 config/tc-i386.c:5168 #, c-format msgid "can not do %d byte pc-relative relocation" msgstr "" -#: config/tc-i386.c:1216 +#: config/tc-i386.c:1201 #, c-format msgid "can not do %s %d byte relocation" msgstr "" -#: config/tc-i386.c:1428 +#: config/tc-i386.c:1391 #, c-format msgid "can't use register '%%%s' as operand %d in '%s'." msgstr "" #. UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. -#: config/tc-i386.c:1457 +#: config/tc-i386.c:1420 #, c-format msgid "translating to `%sp'" msgstr "" -#: config/tc-i386.c:1502 +#: config/tc-i386.c:1465 #, c-format msgid "can't encode register '%%%s' in an instruction requiring REX prefix.\n" msgstr "" -#: config/tc-i386.c:1541 config/tc-i386.c:1636 +#: config/tc-i386.c:1504 config/tc-i386.c:1599 #, c-format msgid "no such instruction: `%s'" msgstr "" -#: config/tc-i386.c:1551 config/tc-i386.c:1668 +#: config/tc-i386.c:1514 config/tc-i386.c:1631 #, c-format msgid "invalid character %s in mnemonic" msgstr "" -#: config/tc-i386.c:1558 +#: config/tc-i386.c:1521 msgid "expecting prefix; got nothing" msgstr "" -#: config/tc-i386.c:1560 +#: config/tc-i386.c:1523 msgid "expecting mnemonic; got nothing" msgstr "" -#: config/tc-i386.c:1579 +#: config/tc-i386.c:1542 #, c-format msgid "redundant %s prefix" msgstr "" -#: config/tc-i386.c:1677 +#: config/tc-i386.c:1640 #, c-format msgid "`%s' is not supported on `%s'" msgstr "" -#: config/tc-i386.c:1682 +#: config/tc-i386.c:1645 msgid "use .code16 to ensure correct addressing mode" msgstr "" -#: config/tc-i386.c:1689 +#: config/tc-i386.c:1652 #, c-format msgid "expecting string instruction after `%s'" msgstr "" -#: config/tc-i386.c:1717 +#: config/tc-i386.c:1680 #, c-format msgid "invalid character %s before operand %d" msgstr "" -#: config/tc-i386.c:1731 +#: config/tc-i386.c:1694 #, c-format msgid "unbalanced parenthesis in operand %d." msgstr "" -#: config/tc-i386.c:1734 +#: config/tc-i386.c:1697 #, c-format msgid "unbalanced brackets in operand %d." msgstr "" -#: config/tc-i386.c:1743 +#: config/tc-i386.c:1706 #, c-format msgid "invalid character %s in operand %d" msgstr "" -#: config/tc-i386.c:1770 +#: config/tc-i386.c:1733 #, c-format msgid "spurious operands; (%d operands/instruction max)" msgstr "" -#: config/tc-i386.c:1793 +#: config/tc-i386.c:1756 msgid "expecting operand after ','; got nothing" msgstr "" -#: config/tc-i386.c:1798 +#: config/tc-i386.c:1761 msgid "expecting operand before ','; got nothing" msgstr "" #. We found no match. -#: config/tc-i386.c:2140 +#: config/tc-i386.c:2103 #, c-format msgid "suffix or operands invalid for `%s'" msgstr "" -#: config/tc-i386.c:2151 +#: config/tc-i386.c:2114 #, c-format msgid "indirect %s without `*'" msgstr "" #. Warn them that a data or address size prefix doesn't #. affect assembly of the next line of code. -#: config/tc-i386.c:2159 +#: config/tc-i386.c:2122 #, c-format msgid "stand-alone `%s' prefix" msgstr "" -#: config/tc-i386.c:2188 config/tc-i386.c:2203 +#: config/tc-i386.c:2151 config/tc-i386.c:2166 #, c-format msgid "`%s' operand %d must use `%%es' segment" msgstr "" -#: config/tc-i386.c:2283 +#: config/tc-i386.c:2246 msgid "" "no instruction mnemonic suffix given and no register operands; can't size " "instruction" @@ -4311,192 +4500,188 @@ msgstr "" #. Prohibit these changes in the 64bit mode, since the #. lowering is more complicated. -#: config/tc-i386.c:2367 config/tc-i386.c:2426 config/tc-i386.c:2443 -#: config/tc-i386.c:2475 config/tc-i386.c:2508 +#: config/tc-i386.c:2330 config/tc-i386.c:2389 config/tc-i386.c:2406 +#: config/tc-i386.c:2438 config/tc-i386.c:2471 #, c-format msgid "Incorrect register `%%%s' used with `%c' suffix" msgstr "" -#: config/tc-i386.c:2375 config/tc-i386.c:2433 config/tc-i386.c:2515 +#: config/tc-i386.c:2338 config/tc-i386.c:2396 config/tc-i386.c:2478 #, c-format msgid "using `%%%s' instead of `%%%s' due to `%c' suffix" msgstr "" -#: config/tc-i386.c:2390 config/tc-i386.c:2411 config/tc-i386.c:2462 -#: config/tc-i386.c:2493 +#: config/tc-i386.c:2353 config/tc-i386.c:2374 config/tc-i386.c:2425 +#: config/tc-i386.c:2456 #, c-format msgid "`%%%s' not allowed with `%s%c'" msgstr "" -#: config/tc-i386.c:2556 +#: config/tc-i386.c:2519 msgid "no instruction mnemonic suffix given; can't determine immediate size" msgstr "" -#: config/tc-i386.c:2589 +#: config/tc-i386.c:2552 #, c-format msgid "" "no instruction mnemonic suffix given; can't determine immediate size %x %c" msgstr "" #. Reversed arguments on faddp, fsubp, etc. -#: config/tc-i386.c:2638 +#: config/tc-i386.c:2601 #, c-format msgid "translating to `%s %%%s,%%%s'" msgstr "" #. Extraneous `l' suffix on fp insn. -#: config/tc-i386.c:2645 +#: config/tc-i386.c:2608 #, c-format msgid "translating to `%s %%%s'" msgstr "" -#: config/tc-i386.c:2663 +#: config/tc-i386.c:2626 #, c-format msgid "you can't `pop %%cs'" msgstr "" #. lea -#: config/tc-i386.c:2682 +#: config/tc-i386.c:2645 msgid "segment override on `lea' is ineffectual" msgstr "" -#: config/tc-i386.c:2991 config/tc-i386.c:3085 config/tc-i386.c:3130 +#: config/tc-i386.c:2954 config/tc-i386.c:3048 config/tc-i386.c:3093 msgid "skipping prefixes on this instruction" msgstr "" -#: config/tc-i386.c:3150 +#: config/tc-i386.c:3113 msgid "16-bit jump out of range" msgstr "" -#: config/tc-i386.c:3159 +#: config/tc-i386.c:3122 #, c-format msgid "can't handle non absolute segment in `%s'" msgstr "" -#: config/tc-i386.c:3601 +#: config/tc-i386.c:3580 #, c-format msgid "@%s reloc is not supported in %s bit mode" msgstr "" -#: config/tc-i386.c:3677 +#: config/tc-i386.c:3656 msgid "only 1 or 2 immediate operands are allowed" msgstr "" -#: config/tc-i386.c:3700 config/tc-i386.c:3892 +#: config/tc-i386.c:3679 config/tc-i386.c:3861 #, c-format msgid "junk `%s' after expression" msgstr "" #. Missing or bad expr becomes absolute 0. -#: config/tc-i386.c:3711 +#: config/tc-i386.c:3690 #, c-format msgid "missing or invalid immediate expression `%s' taken as 0" msgstr "" -#: config/tc-i386.c:3743 config/tc-i386.c:3958 +#: config/tc-i386.c:3715 config/tc-i386.c:3919 #, c-format msgid "unimplemented segment %s in operand" msgstr "" -#: config/tc-i386.c:3745 config/tc-i386.c:3960 -#, c-format -msgid "unimplemented segment type %d in operand" -msgstr "" - -#: config/tc-i386.c:3789 config/tc-i386.c:6011 +#: config/tc-i386.c:3758 config/tc-i386.c:5879 #, c-format msgid "expecting scale factor of 1, 2, 4, or 8: got `%s'" msgstr "" -#: config/tc-i386.c:3796 +#: config/tc-i386.c:3765 #, c-format msgid "scale factor of %d without an index register" msgstr "" -#: config/tc-i386.c:3912 +#: config/tc-i386.c:3880 #, c-format msgid "bad expression used with @%s" msgstr "" #. Missing or bad expr becomes absolute 0. -#: config/tc-i386.c:3934 +#: config/tc-i386.c:3901 #, c-format msgid "missing or invalid displacement expression `%s' taken as 0" msgstr "" -#: config/tc-i386.c:4058 +#: config/tc-i386.c:4016 #, c-format msgid "`%s' is not a valid base/index expression" msgstr "" -#: config/tc-i386.c:4062 +#: config/tc-i386.c:4020 #, c-format msgid "`%s' is not a valid %s bit base/index expression" msgstr "" -#: config/tc-i386.c:4137 +#: config/tc-i386.c:4095 #, c-format msgid "bad memory operand `%s'" msgstr "" -#: config/tc-i386.c:4152 +#: config/tc-i386.c:4110 #, c-format msgid "junk `%s' after register" msgstr "" -#: config/tc-i386.c:4161 config/tc-i386.c:4276 config/tc-i386.c:4314 +#: config/tc-i386.c:4119 config/tc-i386.c:4234 config/tc-i386.c:4272 #, c-format msgid "bad register name `%s'" msgstr "" -#: config/tc-i386.c:4169 +#: config/tc-i386.c:4127 msgid "immediate operand illegal with absolute jump" msgstr "" -#: config/tc-i386.c:4191 +#: config/tc-i386.c:4149 #, c-format msgid "too many memory references for `%s'" msgstr "" -#: config/tc-i386.c:4269 +#: config/tc-i386.c:4227 #, c-format msgid "expecting `,' or `)' after index register in `%s'" msgstr "" -#: config/tc-i386.c:4293 +#: config/tc-i386.c:4251 #, c-format msgid "expecting `)' after scale factor in `%s'" msgstr "" -#: config/tc-i386.c:4300 +#: config/tc-i386.c:4258 #, c-format msgid "expecting index register or scale factor after `,'; got '%c'" msgstr "" -#: config/tc-i386.c:4307 +#: config/tc-i386.c:4265 #, c-format msgid "expecting `,' or `)' after base register in `%s'" msgstr "" #. It's not a memory operand; argh! -#: config/tc-i386.c:4348 +#: config/tc-i386.c:4306 #, c-format msgid "invalid char %s beginning operand %d `%s'" msgstr "" -#: config/tc-i386.c:4531 +#: config/tc-i386.c:4481 msgid "long jump required" msgstr "" -#: config/tc-i386.c:4805 +#: config/tc-i386.c:4745 msgid "Bad call to md_atof ()" msgstr "" -#: config/tc-i386.c:4973 +#: config/tc-i386.c:4913 msgid "No compiled in support for x86_64" msgstr "" -#: config/tc-i386.c:4994 +#: config/tc-i386.c:4934 +#, c-format msgid "" " -Q ignored\n" " -V print assembler version number\n" @@ -4506,162 +4691,188 @@ msgid "" " -s ignored\n" msgstr "" -#: config/tc-i386.c:5002 +#: config/tc-i386.c:4942 +#, c-format msgid "" " -n Do not optimize code alignment\n" " -q quieten some warnings\n" msgstr "" -#: config/tc-i386.c:5104 config/tc-s390.c:1841 +#: config/tc-i386.c:5042 config/tc-s390.c:1847 msgid "GOT already in symbol table" msgstr "" -#: config/tc-i386.c:5249 +#: config/tc-i386.c:5183 #, c-format msgid "can not do %d byte relocation" msgstr "" -#: config/tc-i386.c:5317 config/tc-s390.c:2285 +#: config/tc-i386.c:5251 config/tc-s390.c:2291 #, c-format msgid "cannot represent relocation type %s" msgstr "" -#: config/tc-i386.c:5613 +#: config/tc-i386.c:5480 #, c-format msgid "too many memory references for '%s'" msgstr "" -#: config/tc-i386.c:5776 +#: config/tc-i386.c:5644 #, c-format msgid "Unknown operand modifier `%s'\n" msgstr "" -#: config/tc-i386.c:5983 +#: config/tc-i386.c:5851 #, c-format msgid "`%s' is not a valid segment register" msgstr "" -#: config/tc-i386.c:5993 config/tc-i386.c:6114 +#: config/tc-i386.c:5861 config/tc-i386.c:5982 msgid "Register scaling only allowed in memory operands." msgstr "" -#: config/tc-i386.c:6024 +#: config/tc-i386.c:5892 msgid "Too many register references in memory operand.\n" msgstr "" -#: config/tc-i386.c:6093 +#: config/tc-i386.c:5961 #, c-format msgid "Syntax error. Expecting a constant. Got `%s'.\n" msgstr "" -#: config/tc-i386.c:6163 +#: config/tc-i386.c:6031 #, c-format msgid "Unrecognized token '%s'" msgstr "" -#: config/tc-i386.c:6180 +#: config/tc-i386.c:6048 #, c-format msgid "Unexpected token `%s'\n" msgstr "" -#: config/tc-i386.c:6324 +#: config/tc-i386.c:6192 #, c-format msgid "Unrecognized token `%s'\n" msgstr "" -#: config/tc-i860.c:165 config/tc-i860.c:169 +#: config/tc-i860.c:124 +msgid "Directive .dual available only with -mintel-syntax option" +msgstr "" + +#: config/tc-i860.c:134 +msgid "Directive .enddual available only with -mintel-syntax option" +msgstr "" + +#: config/tc-i860.c:147 +msgid "Directive .atmp available only with -mintel-syntax option" +msgstr "" + +#: config/tc-i860.c:169 config/tc-i860.c:173 msgid "Unknown temporary pseudo register" msgstr "" -#: config/tc-i860.c:192 config/tc-mips.c:1105 +#: config/tc-i860.c:229 config/tc-mips.c:1149 #, c-format msgid "internal error: can't hash `%s': %s\n" msgstr "" -#: config/tc-i860.c:212 +#: config/tc-i860.c:249 msgid "Defective assembler. No assembly attempted." msgstr "" -#: config/tc-i860.c:362 +#: config/tc-i860.c:402 #, c-format msgid "Expanded opcode after delayed branch: `%s'" msgstr "" -#: config/tc-i860.c:366 +#: config/tc-i860.c:406 #, c-format msgid "Expanded opcode in dual mode: `%s'" msgstr "" -#: config/tc-i860.c:370 +#: config/tc-i860.c:410 #, c-format msgid "An instruction was expanded (%s)" msgstr "" -#: config/tc-i860.c:643 +#: config/tc-i860.c:676 msgid "Pipelined instruction: fsrc1 = fdest" msgstr "" -#: config/tc-i860.c:844 config/tc-i860.c:851 config/tc-i860.c:858 +#: config/tc-i860.c:879 config/tc-i860.c:886 config/tc-i860.c:893 msgid "Assembler does not yet support PIC" msgstr "" -#: config/tc-i860.c:919 +#: config/tc-i860.c:957 #, c-format msgid "Illegal operands for %s" msgstr "" -#: config/tc-i860.c:947 config/tc-sparc.c:2834 +#: config/tc-i860.c:974 +#, c-format +msgid "'d.%s' must be 8-byte aligned" +msgstr "" + +#: config/tc-i860.c:982 +#, c-format +msgid "Prefix 'd.' invalid for instruction `%s'" +msgstr "" + +#: config/tc-i860.c:1005 config/tc-sparc.c:2845 msgid "bad segment" msgstr "" -#: config/tc-i860.c:1037 +#: config/tc-i860.c:1088 msgid "i860_estimate_size_before_relax\n" msgstr "" -#: config/tc-i860.c:1134 +#: config/tc-i860.c:1187 +#, c-format msgid "" " -EL\t\t\t generate code for little endian mode (default)\n" " -EB\t\t\t generate code for big endian mode\n" " -mwarn-expand\t\t warn if pseudo operations are expanded\n" " -mxp\t\t\t enable i860XP support (disabled by default)\n" +" -mintel-syntax\t enable Intel syntax (default to AT&T/SVR4)\n" msgstr "" #. SVR4 compatibility flags. -#: config/tc-i860.c:1141 +#: config/tc-i860.c:1195 +#, c-format msgid "" " -V\t\t\t print assembler version number\n" " -Qy, -Qn\t\t ignored\n" msgstr "" -#: config/tc-i860.c:1210 +#: config/tc-i860.c:1258 msgid "This immediate requires 0 MOD 2 alignment" msgstr "" -#: config/tc-i860.c:1213 +#: config/tc-i860.c:1261 msgid "This immediate requires 0 MOD 4 alignment" msgstr "" -#: config/tc-i860.c:1216 +#: config/tc-i860.c:1264 msgid "This immediate requires 0 MOD 8 alignment" msgstr "" -#: config/tc-i860.c:1219 +#: config/tc-i860.c:1267 msgid "This immediate requires 0 MOD 16 alignment" msgstr "" -#: config/tc-i860.c:1317 +#: config/tc-i860.c:1362 msgid "5-bit immediate too large" msgstr "" -#: config/tc-i860.c:1320 +#: config/tc-i860.c:1365 msgid "5-bit field must be absolute" msgstr "" -#: config/tc-i860.c:1365 config/tc-i860.c:1388 +#: config/tc-i860.c:1410 config/tc-i860.c:1433 msgid "A branch offset requires 0 MOD 4 alignment" msgstr "" -#: config/tc-i860.c:1409 +#: config/tc-i860.c:1454 #, c-format msgid "Unrecognized fix-up (0x%08lx)" msgstr "" @@ -4701,10 +4912,12 @@ msgid "invalid architecture %s" msgstr "" #: config/tc-i960.c:1014 +#, c-format msgid "I960 options:\n" msgstr "" #: config/tc-i960.c:1017 +#, c-format msgid "" "\n" "\t\t\tspecify variant of 960 architecture\n" @@ -4715,7 +4928,7 @@ msgid "" "\t\t\tlong displacements\n" msgstr "" -#: config/tc-i960.c:1419 config/tc-xtensa.c:8604 +#: config/tc-i960.c:1419 config/tc-xtensa.c:8466 msgid "too many operands" msgstr "" @@ -4824,99 +5037,99 @@ msgstr "" msgid "option --link-relax is only supported in b.out format" msgstr "" -#: config/tc-ia64.c:982 +#: config/tc-ia64.c:984 msgid "Bad .section directive: want a,o,s,w,x,M,S,G,T in string" msgstr "" -#: config/tc-ia64.c:1105 +#: config/tc-ia64.c:1127 msgid "Unwind directive not followed by an instruction." msgstr "" -#: config/tc-ia64.c:4563 +#: config/tc-ia64.c:4606 msgid "Register name expected" msgstr "" -#: config/tc-ia64.c:4568 config/tc-ia64.c:4854 +#: config/tc-ia64.c:4611 config/tc-ia64.c:4897 msgid "Comma expected" msgstr "" -#: config/tc-ia64.c:4576 +#: config/tc-ia64.c:4619 msgid "Register value annotation ignored" msgstr "" -#: config/tc-ia64.c:4600 +#: config/tc-ia64.c:4643 msgid "Directive invalid within a bundle" msgstr "" -#: config/tc-ia64.c:4667 +#: config/tc-ia64.c:4710 msgid "Missing predicate relation type" msgstr "" -#: config/tc-ia64.c:4683 +#: config/tc-ia64.c:4726 msgid "Unrecognized predicate relation type" msgstr "" -#: config/tc-ia64.c:4703 config/tc-ia64.c:4728 +#: config/tc-ia64.c:4746 config/tc-ia64.c:4771 msgid "Predicate register expected" msgstr "" -#: config/tc-ia64.c:4715 +#: config/tc-ia64.c:4758 msgid "Duplicate predicate register ignored" msgstr "" -#: config/tc-ia64.c:4737 +#: config/tc-ia64.c:4780 msgid "Bad register range" msgstr "" -#: config/tc-ia64.c:4765 +#: config/tc-ia64.c:4808 msgid "Predicate source and target required" msgstr "" -#: config/tc-ia64.c:4767 config/tc-ia64.c:4779 +#: config/tc-ia64.c:4810 config/tc-ia64.c:4822 msgid "Use of p0 is not valid in this context" msgstr "" -#: config/tc-ia64.c:4774 +#: config/tc-ia64.c:4817 msgid "At least two PR arguments expected" msgstr "" -#: config/tc-ia64.c:4788 +#: config/tc-ia64.c:4831 msgid "At least one PR argument expected" msgstr "" -#: config/tc-ia64.c:4824 +#: config/tc-ia64.c:4867 #, c-format msgid "Inserting \"%s\" into entry hint table failed: %s" msgstr "" #. FIXME -- need 62-bit relocation type -#: config/tc-ia64.c:5302 +#: config/tc-ia64.c:5345 msgid "62-bit relocation not yet implemented" msgstr "" #. XXX technically, this is wrong: we should not be issuing warning #. messages until we're sure this instruction pattern is going to #. be used! -#: config/tc-ia64.c:5375 +#: config/tc-ia64.c:5418 msgid "lower 16 bits of mask ignored" msgstr "" -#: config/tc-ia64.c:5939 +#: config/tc-ia64.c:5982 msgid "Value truncated to 62 bits" msgstr "" -#: config/tc-ia64.c:6291 +#: config/tc-ia64.c:6355 msgid "" "Additional NOP may be necessary to workaround Itanium processor A/B step " "errata" msgstr "" -#: config/tc-ia64.c:6474 +#: config/tc-ia64.c:6546 #, c-format msgid "Unrecognized option '-x%s'" msgstr "" -#: config/tc-ia64.c:6502 +#: config/tc-ia64.c:6574 msgid "" "IA-64 options:\n" " --mconstant-gp\t mark output file as using the constant-GP model\n" @@ -4931,88 +5144,95 @@ msgid "" " -xdebug\t\t debug dependency violation checker\n" msgstr "" -#: config/tc-ia64.c:6521 +#: config/tc-ia64.c:6593 msgid "--gstabs is not supported for ia64" msgstr "" -#: config/tc-ia64.c:6824 config/tc-mips.c:1094 +#: config/tc-ia64.c:6896 config/tc-mips.c:1138 msgid "Could not set architecture and machine" msgstr "" -#: config/tc-ia64.c:6931 +#: config/tc-ia64.c:7003 msgid "Explicit stops are ignored in auto mode" msgstr "" -#: config/tc-ia64.c:6981 +#: config/tc-ia64.c:7053 msgid "Found '{' after explicit switch to automatic mode" msgstr "" -#: config/tc-ia64.c:7428 +#: config/tc-ia64.c:7517 #, c-format msgid "Unhandled dependency %s for %s (%s), note %d" msgstr "" -#: config/tc-ia64.c:8704 +#: config/tc-ia64.c:8793 #, c-format msgid "Unrecognized dependency specifier %d\n" msgstr "" -#: config/tc-ia64.c:9506 +#: config/tc-ia64.c:9668 msgid "Only the first path encountering the conflict is reported" msgstr "" -#: config/tc-ia64.c:9509 +#: config/tc-ia64.c:9671 msgid "This is the location of the conflicting usage" msgstr "" -#: config/tc-ia64.c:10778 read.c:1370 read.c:1976 read.c:2184 read.c:2795 +#: config/tc-ia64.c:10886 +msgid "Can't add stop bit to mark end of instruction group" +msgstr "" + +#: config/tc-ia64.c:10983 read.c:1344 read.c:2075 read.c:2669 msgid "expected symbol name" msgstr "" -#: config/tc-ia64.c:10788 read.c:1380 read.c:2194 read.c:2805 stabs.c:478 +#: config/tc-ia64.c:10993 read.c:2085 read.c:2679 stabs.c:471 #, c-format msgid "expected comma after \"%s\"" msgstr "" -#: config/tc-ia64.c:10829 +#: config/tc-ia64.c:11034 #, c-format msgid "`%s' is already the alias of %s `%s'" msgstr "" -#: config/tc-ia64.c:10839 +#: config/tc-ia64.c:11044 #, c-format msgid "%s `%s' already has an alias `%s'" msgstr "" -#: config/tc-ia64.c:10850 +#: config/tc-ia64.c:11055 #, c-format msgid "inserting \"%s\" into %s alias hash table failed: %s" msgstr "" -#: config/tc-ia64.c:10858 +#: config/tc-ia64.c:11063 #, c-format msgid "inserting \"%s\" into %s name hash table failed: %s" msgstr "" -#: config/tc-ia64.c:10877 +#: config/tc-ia64.c:11082 #, c-format msgid "symbol `%s' aliased to `%s' is not used" msgstr "" -#: config/tc-ia64.c:10899 +#: config/tc-ia64.c:11104 #, c-format msgid "section `%s' aliased to `%s' is not used" msgstr "" #: config/tc-ip2k.c:123 +#, c-format msgid "IP2K specific command line options:\n" msgstr "" #: config/tc-ip2k.c:124 +#, c-format msgid " -mip2022 restrict to IP2022 insns \n" msgstr "" #: config/tc-ip2k.c:125 +#, c-format msgid " -mip2022ext permit extended IP2022 insn\n" msgstr "" @@ -5021,169 +5241,269 @@ msgid "md_pcrel_from\n" msgstr "" #. Pretend that we do not recognise this option. -#: config/tc-m32r.c:233 +#: config/tc-m32r.c:349 msgid "Unrecognised option: -hidden" msgstr "" -#: config/tc-m32r.c:267 +#: config/tc-m32r.c:376 config/tc-sparc.c:596 +msgid "Unrecognized option following -K" +msgstr "" + +#: config/tc-m32r.c:402 +#, c-format msgid " M32R specific command line options:\n" msgstr "" -#: config/tc-m32r.c:269 +#: config/tc-m32r.c:404 +#, c-format msgid "" " -m32r disable support for the m32rx instruction set\n" msgstr "" -#: config/tc-m32r.c:271 +#: config/tc-m32r.c:406 +#, c-format msgid " -m32rx support the extended m32rx instruction set\n" msgstr "" -#: config/tc-m32r.c:273 -msgid " -O try to combine instructions in parallel\n" +#: config/tc-m32r.c:408 +#, c-format +msgid " -m32r2 support the extended m32r2 instruction set\n" +msgstr "" + +#: config/tc-m32r.c:410 +#, c-format +msgid " -EL,-little produce little endian code and data\n" +msgstr "" + +#: config/tc-m32r.c:412 +#, c-format +msgid " -EB,-big produce big endian code and data\n" +msgstr "" + +#: config/tc-m32r.c:414 +#, c-format +msgid " -parallel try to combine instructions in parallel\n" +msgstr "" + +#: config/tc-m32r.c:416 +#, c-format +msgid " -no-parallel disable -parallel\n" +msgstr "" + +#: config/tc-m32r.c:418 +#, c-format +msgid "" +" -no-bitinst disallow the M32R2's extended bit-field " +"instructions\n" msgstr "" -#: config/tc-m32r.c:276 +#: config/tc-m32r.c:420 +#, c-format +msgid " -O try to optimize code. Implies -parallel\n" +msgstr "" + +#: config/tc-m32r.c:423 +#, c-format msgid "" " -warn-explicit-parallel-conflicts warn when parallel instructions\n" msgstr "" -#: config/tc-m32r.c:278 -msgid " violate contraints\n" +#: config/tc-m32r.c:425 +#, c-format +msgid " might violate contraints\n" msgstr "" -#: config/tc-m32r.c:280 +#: config/tc-m32r.c:427 +#, c-format msgid " -no-warn-explicit-parallel-conflicts do not warn when parallel\n" msgstr "" -#: config/tc-m32r.c:282 +#: config/tc-m32r.c:429 +#, c-format msgid "" -" instructions violate contraints\n" +" instructions might violate " +"contraints\n" msgstr "" -#: config/tc-m32r.c:284 +#: config/tc-m32r.c:431 +#, c-format msgid "" " -Wp synonym for -warn-explicit-parallel-conflicts\n" msgstr "" -#: config/tc-m32r.c:286 +#: config/tc-m32r.c:433 +#, c-format msgid "" " -Wnp synonym for -no-warn-explicit-parallel-conflicts\n" msgstr "" -#: config/tc-m32r.c:289 +#: config/tc-m32r.c:435 +#, c-format +msgid "" +" -ignore-parallel-conflicts do not check parallel instructions\n" +msgstr "" + +#: config/tc-m32r.c:437 +#, c-format +msgid " fo contraint violations\n" +msgstr "" + +#: config/tc-m32r.c:439 +#, c-format +msgid "" +" -no-ignore-parallel-conflicts check parallel instructions for\n" +msgstr "" + +#: config/tc-m32r.c:441 +#, c-format +msgid " contraint violations\n" +msgstr "" + +#: config/tc-m32r.c:443 +#, c-format +msgid " -Ip synonym for -ignore-parallel-conflicts\n" +msgstr "" + +#: config/tc-m32r.c:445 +#, c-format +msgid " -nIp synonym for -no-ignore-parallel-conflicts\n" +msgstr "" + +#: config/tc-m32r.c:448 +#, c-format msgid "" " -warn-unmatched-high warn when an (s)high reloc has no matching low " "reloc\n" msgstr "" -#: config/tc-m32r.c:291 +#: config/tc-m32r.c:450 +#, c-format msgid " -no-warn-unmatched-high do not warn about missing low relocs\n" msgstr "" -#: config/tc-m32r.c:293 +#: config/tc-m32r.c:452 +#, c-format msgid " -Wuh synonym for -warn-unmatched-high\n" msgstr "" -#: config/tc-m32r.c:295 +#: config/tc-m32r.c:454 +#, c-format msgid " -Wnuh synonym for -no-warn-unmatched-high\n" msgstr "" -#: config/tc-m32r.c:299 +#: config/tc-m32r.c:457 +#, c-format +msgid " -KPIC generate PIC\n" +msgstr "" + +#: config/tc-m32r.c:461 +#, c-format msgid " -relax create linker relaxable code\n" msgstr "" -#: config/tc-m32r.c:301 +#: config/tc-m32r.c:463 +#, c-format msgid " -cpu-desc provide runtime cpu description file\n" msgstr "" -#: config/tc-m32r.c:700 -msgid "Instructions write to the same destination register." +#: config/tc-m32r.c:898 +msgid "instructions write to the same destination register." msgstr "" -#: config/tc-m32r.c:708 +#: config/tc-m32r.c:906 msgid "Instructions do not use parallel execution pipelines." msgstr "" -#: config/tc-m32r.c:715 +#: config/tc-m32r.c:914 msgid "Instructions share the same execution pipeline" msgstr "" -#: config/tc-m32r.c:791 config/tc-m32r.c:887 +#: config/tc-m32r.c:990 config/tc-m32r.c:1104 #, c-format msgid "not a 16 bit instruction '%s'" msgstr "" -#: config/tc-m32r.c:798 config/tc-m32r.c:894 config/tc-m32r.c:1050 +#: config/tc-m32r.c:1002 config/tc-m32r.c:1116 config/tc-m32r.c:1301 +#, c-format +msgid "instruction '%s' is for the M32R2 only" +msgstr "" + +#: config/tc-m32r.c:1015 config/tc-m32r.c:1129 config/tc-m32r.c:1314 #, c-format msgid "unknown instruction '%s'" msgstr "" -#: config/tc-m32r.c:807 config/tc-m32r.c:901 config/tc-m32r.c:1057 +#: config/tc-m32r.c:1024 config/tc-m32r.c:1136 config/tc-m32r.c:1321 #, c-format msgid "instruction '%s' is for the M32RX only" msgstr "" -#: config/tc-m32r.c:816 config/tc-m32r.c:910 +#: config/tc-m32r.c:1033 config/tc-m32r.c:1145 #, c-format msgid "instruction '%s' cannot be executed in parallel." msgstr "" -#: config/tc-m32r.c:871 config/tc-m32r.c:935 config/tc-m32r.c:1107 +#: config/tc-m32r.c:1088 config/tc-m32r.c:1170 config/tc-m32r.c:1378 msgid "internal error: lookup/get operands failed" msgstr "" -#: config/tc-m32r.c:920 +#: config/tc-m32r.c:1155 #, c-format msgid "'%s': only the NOP instruction can be issued in parallel on the m32r" msgstr "" -#: config/tc-m32r.c:949 +#: config/tc-m32r.c:1184 #, c-format msgid "" "%s: output of 1st instruction is the same as an input to 2nd instruction - " "is this intentional ?" msgstr "" -#: config/tc-m32r.c:953 +#: config/tc-m32r.c:1188 #, c-format msgid "" "%s: output of 2nd instruction is the same as an input to 1st instruction - " "is this intentional ?" msgstr "" -#: config/tc-m32r.c:1267 config/tc-ppc.c:1732 config/tc-ppc.c:4263 +#: config/tc-m32r.c:1537 config/tc-ppc.c:1768 config/tc-ppc.c:4349 msgid "Expected comma after symbol-name: rest of line ignored." msgstr "" -#: config/tc-m32r.c:1277 +#: config/tc-m32r.c:1547 #, c-format msgid ".SCOMMon length (%ld.) <0! Ignored." msgstr "" -#: config/tc-m32r.c:1291 config/tc-ppc.c:1754 config/tc-ppc.c:2899 -#: config/tc-ppc.c:4287 +#: config/tc-m32r.c:1561 config/tc-ppc.c:1790 config/tc-ppc.c:2936 +#: config/tc-ppc.c:4373 msgid "ignoring bad alignment" msgstr "" -#: config/tc-m32r.c:1303 config/tc-ppc.c:1791 config/tc-v850.c:335 +#: config/tc-m32r.c:1573 config/tc-ppc.c:1827 config/tc-v850.c:335 msgid "Common alignment not a power of 2" msgstr "" -#: config/tc-m32r.c:1318 config/tc-ppc.c:1765 config/tc-ppc.c:4299 +#: config/tc-m32r.c:1588 config/tc-ppc.c:1801 config/tc-ppc.c:4385 #, c-format msgid "Ignoring attempt to re-define symbol `%s'." msgstr "" -#: config/tc-m32r.c:1327 +#: config/tc-m32r.c:1597 #, c-format msgid "Length of .scomm \"%s\" is already %ld. Not changed to %ld." msgstr "" -#: config/tc-m32r.c:1808 +#: config/tc-m32r.c:2090 msgid "Unmatched high/shigh reloc" msgstr "" -#: config/tc-m68hc11.c:372 +#: config/tc-m32r.c:2332 config/tc-sparc.c:3491 +#, c-format +msgid "internal error: can't export reloc type %d (`%s')" +msgstr "" + +#: config/tc-m68hc11.c:368 #, c-format msgid "" "Motorola 68HC11/68HC12/68HCS12 options:\n" @@ -5204,55 +5524,56 @@ msgid "" " (used for testing)\n" msgstr "" -#: config/tc-m68hc11.c:418 +#: config/tc-m68hc11.c:414 #, c-format msgid "Default target `%s' is not supported." msgstr "" #. Dump the opcode statistics table. -#: config/tc-m68hc11.c:437 +#: config/tc-m68hc11.c:432 +#, c-format msgid "Name # Modes Min ops Max ops Modes mask # Used\n" msgstr "" -#: config/tc-m68hc11.c:505 +#: config/tc-m68hc11.c:498 #, c-format msgid "Option `%s' is not recognized." msgstr "" -#: config/tc-m68hc11.c:737 +#: config/tc-m68hc11.c:720 msgid "#<imm8>" msgstr "" -#: config/tc-m68hc11.c:746 +#: config/tc-m68hc11.c:729 msgid "#<imm16>" msgstr "" -#: config/tc-m68hc11.c:755 config/tc-m68hc11.c:764 +#: config/tc-m68hc11.c:738 config/tc-m68hc11.c:747 msgid "<imm8>,X" msgstr "" -#: config/tc-m68hc11.c:791 +#: config/tc-m68hc11.c:774 msgid "*<abs8>" msgstr "" -#: config/tc-m68hc11.c:803 +#: config/tc-m68hc11.c:786 msgid "#<mask>" msgstr "" -#: config/tc-m68hc11.c:813 +#: config/tc-m68hc11.c:796 #, c-format msgid "symbol%d" msgstr "" -#: config/tc-m68hc11.c:815 +#: config/tc-m68hc11.c:798 msgid "<abs>" msgstr "" -#: config/tc-m68hc11.c:834 +#: config/tc-m68hc11.c:817 msgid "<label>" msgstr "" -#: config/tc-m68hc11.c:850 +#: config/tc-m68hc11.c:833 #, c-format msgid "" "# Example of `%s' instructions\n" @@ -5260,618 +5581,645 @@ msgid "" "_start:\n" msgstr "" -#: config/tc-m68hc11.c:898 +#: config/tc-m68hc11.c:880 #, c-format msgid "Instruction `%s' is not recognized." msgstr "" -#: config/tc-m68hc11.c:903 +#: config/tc-m68hc11.c:885 #, c-format msgid "Instruction formats for `%s':" msgstr "" -#: config/tc-m68hc11.c:1038 +#: config/tc-m68hc11.c:1015 #, c-format msgid "Immediate operand is not allowed for operand %d." msgstr "" -#: config/tc-m68hc11.c:1082 +#: config/tc-m68hc11.c:1059 msgid "Indirect indexed addressing is not valid for 68HC11." msgstr "" -#: config/tc-m68hc11.c:1102 +#: config/tc-m68hc11.c:1079 msgid "Spurious `,' or bad indirect register addressing mode." msgstr "" -#: config/tc-m68hc11.c:1124 +#: config/tc-m68hc11.c:1101 msgid "Missing second register or offset for indexed-indirect mode." msgstr "" -#: config/tc-m68hc11.c:1134 +#: config/tc-m68hc11.c:1111 msgid "Missing second register for indexed-indirect mode." msgstr "" -#: config/tc-m68hc11.c:1150 +#: config/tc-m68hc11.c:1127 msgid "Missing `]' to close indexed-indirect mode." msgstr "" -#: config/tc-m68hc11.c:1195 +#: config/tc-m68hc11.c:1172 msgid "Illegal operand." msgstr "" -#: config/tc-m68hc11.c:1200 +#: config/tc-m68hc11.c:1177 msgid "Missing operand." msgstr "" -#: config/tc-m68hc11.c:1253 +#: config/tc-m68hc11.c:1230 msgid "Pre-increment mode is not valid for 68HC11" msgstr "" -#: config/tc-m68hc11.c:1266 +#: config/tc-m68hc11.c:1243 msgid "Wrong register in register indirect mode." msgstr "" -#: config/tc-m68hc11.c:1274 +#: config/tc-m68hc11.c:1251 msgid "Missing `]' to close register indirect operand." msgstr "" -#: config/tc-m68hc11.c:1294 +#: config/tc-m68hc11.c:1271 msgid "Post-decrement mode is not valid for 68HC11." msgstr "" -#: config/tc-m68hc11.c:1302 +#: config/tc-m68hc11.c:1279 msgid "Post-increment mode is not valid for 68HC11." msgstr "" -#: config/tc-m68hc11.c:1320 +#: config/tc-m68hc11.c:1297 msgid "Invalid indexed indirect mode." msgstr "" -#: config/tc-m68hc11.c:1417 +#: config/tc-m68hc11.c:1389 #, c-format msgid "Trap id `%ld' is out of range." msgstr "" -#: config/tc-m68hc11.c:1421 +#: config/tc-m68hc11.c:1393 msgid "Trap id must be within [0x30..0x39] or [0x40..0xff]." msgstr "" -#: config/tc-m68hc11.c:1428 +#: config/tc-m68hc11.c:1400 #, c-format msgid "Operand out of 8-bit range: `%ld'." msgstr "" -#: config/tc-m68hc11.c:1435 +#: config/tc-m68hc11.c:1407 msgid "The trap id must be a constant." msgstr "" -#: config/tc-m68hc11.c:1470 +#: config/tc-m68hc11.c:1442 #, c-format msgid "Operand `%x' not recognized in fixup8." msgstr "" -#: config/tc-m68hc11.c:1490 config/tc-m68hc11.c:1542 +#: config/tc-m68hc11.c:1459 config/tc-m68hc11.c:1508 #, c-format msgid "Operand out of 16-bit range: `%ld'." msgstr "" -#: config/tc-m68hc11.c:1522 config/tc-m68hc11.c:1558 +#: config/tc-m68hc11.c:1491 config/tc-m68hc11.c:1524 #, c-format msgid "Operand `%x' not recognized in fixup16." msgstr "" -#: config/tc-m68hc11.c:1576 +#: config/tc-m68hc11.c:1541 #, c-format msgid "Unexpected branch conversion with `%x'" msgstr "" -#: config/tc-m68hc11.c:1671 config/tc-m68hc11.c:1812 +#: config/tc-m68hc11.c:1632 config/tc-m68hc11.c:1770 #, c-format msgid "Operand out of range for a relative branch: `%ld'" msgstr "" -#: config/tc-m68hc11.c:1780 +#: config/tc-m68hc11.c:1738 msgid "Invalid register for dbcc/tbcc instruction." msgstr "" -#: config/tc-m68hc11.c:1871 +#: config/tc-m68hc11.c:1826 #, c-format msgid "Increment/decrement value is out of range: `%ld'." msgstr "" -#: config/tc-m68hc11.c:1882 +#: config/tc-m68hc11.c:1837 msgid "Expecting a register." msgstr "" -#: config/tc-m68hc11.c:1897 +#: config/tc-m68hc11.c:1852 msgid "Invalid register for post/pre increment." msgstr "" -#: config/tc-m68hc11.c:1927 +#: config/tc-m68hc11.c:1882 msgid "Invalid register." msgstr "" -#: config/tc-m68hc11.c:1934 +#: config/tc-m68hc11.c:1889 #, c-format msgid "Offset out of 16-bit range: %ld." msgstr "" -#: config/tc-m68hc11.c:1939 +#: config/tc-m68hc11.c:1894 #, c-format msgid "Offset out of 5-bit range for movw/movb insn: %ld." msgstr "" -#: config/tc-m68hc11.c:2020 +#: config/tc-m68hc11.c:2000 msgid "Expecting register D for indexed indirect mode." msgstr "" -#: config/tc-m68hc11.c:2022 +#: config/tc-m68hc11.c:2002 msgid "Indexed indirect mode is not allowed for movb/movw." msgstr "" -#: config/tc-m68hc11.c:2039 +#: config/tc-m68hc11.c:2019 msgid "Invalid accumulator register." msgstr "" -#: config/tc-m68hc11.c:2064 +#: config/tc-m68hc11.c:2044 msgid "Invalid indexed register." msgstr "" -#: config/tc-m68hc11.c:2072 +#: config/tc-m68hc11.c:2052 msgid "Addressing mode not implemented yet." msgstr "" -#: config/tc-m68hc11.c:2087 +#: config/tc-m68hc11.c:2065 msgid "Invalid source register for this instruction, use 'tfr'." msgstr "" -#: config/tc-m68hc11.c:2089 +#: config/tc-m68hc11.c:2067 msgid "Invalid source register." msgstr "" -#: config/tc-m68hc11.c:2094 +#: config/tc-m68hc11.c:2072 msgid "Invalid destination register for this instruction, use 'tfr'." msgstr "" -#: config/tc-m68hc11.c:2096 +#: config/tc-m68hc11.c:2074 msgid "Invalid destination register." msgstr "" -#: config/tc-m68hc11.c:2194 +#: config/tc-m68hc11.c:2170 msgid "Invalid indexed register, expecting register X." msgstr "" -#: config/tc-m68hc11.c:2196 +#: config/tc-m68hc11.c:2172 msgid "Invalid indexed register, expecting register Y." msgstr "" -#: config/tc-m68hc11.c:2508 +#: config/tc-m68hc11.c:2478 msgid "No instruction or missing opcode." msgstr "" -#: config/tc-m68hc11.c:2573 +#: config/tc-m68hc11.c:2543 #, c-format msgid "Opcode `%s' is not recognized." msgstr "" -#: config/tc-m68hc11.c:2595 +#: config/tc-m68hc11.c:2565 #, c-format msgid "Garbage at end of instruction: `%s'." msgstr "" -#: config/tc-m68hc11.c:2618 +#: config/tc-m68hc11.c:2588 #, c-format msgid "Invalid operand for `%s'" msgstr "" -#: config/tc-m68hc11.c:2670 +#: config/tc-m68hc11.c:2639 #, c-format msgid "Invalid mode: %s\n" msgstr "" -#: config/tc-m68hc11.c:2732 +#: config/tc-m68hc11.c:2699 msgid "bad .relax format" msgstr "" -#: config/tc-m68hc11.c:2779 +#: config/tc-m68hc11.c:2743 #, c-format msgid "Relocation %d is not supported by object file format." msgstr "" -#: config/tc-m68hc11.c:3065 +#: config/tc-m68hc11.c:3022 msgid "bra or bsr with undefined symbol." msgstr "" -#: config/tc-m68hc11.c:3168 config/tc-m68hc11.c:3225 +#: config/tc-m68hc11.c:3125 config/tc-m68hc11.c:3182 #, c-format msgid "Subtype %d is not recognized." msgstr "" -#: config/tc-m68hc11.c:3289 +#: config/tc-m68hc11.c:3241 msgid "Expression too complex." msgstr "" -#: config/tc-m68hc11.c:3322 +#: config/tc-m68hc11.c:3274 msgid "Value out of 16-bit range." msgstr "" -#: config/tc-m68hc11.c:3346 +#: config/tc-m68hc11.c:3298 #, c-format msgid "Value %ld too large for 8-bit PC-relative branch." msgstr "" -#: config/tc-m68hc11.c:3353 +#: config/tc-m68hc11.c:3305 #, c-format msgid "Auto increment/decrement offset '%ld' is out of range." msgstr "" -#: config/tc-m68hc11.c:3371 +#: config/tc-m68hc11.c:3318 +#, c-format +msgid "Offset out of 5-bit range for movw/movb insn: %ld" +msgstr "" + +#: config/tc-m68hc11.c:3334 #, c-format msgid "Line %d: unknown relocation type: 0x%x." msgstr "" -#: config/tc-m68k.c:678 +#: config/tc-m68k.c:680 config/tc-m68k.c:4562 config/tc-m68k.c:4964 +msgid "Tried to convert PC relative branch to absolute jump" +msgstr "" + +#: config/tc-m68k.c:687 config/tc-m68k.c:4552 +msgid "Tried to convert PC relative BSR to absolute JSR" +msgstr "" + +#: config/tc-m68k.c:692 msgid "Unknown PC relative instruction" msgstr "" -#: config/tc-m68k.c:817 +#: config/tc-m68k.c:831 #, c-format msgid "Can not do %d byte pc-relative relocation" msgstr "" -#: config/tc-m68k.c:819 +#: config/tc-m68k.c:833 #, c-format msgid "Can not do %d byte pc-relative pic relocation" msgstr "" -#: config/tc-m68k.c:824 +#: config/tc-m68k.c:838 #, c-format msgid "Can not do %d byte relocation" msgstr "" -#: config/tc-m68k.c:826 +#: config/tc-m68k.c:840 #, c-format msgid "Can not do %d byte pic relocation" msgstr "" -#: config/tc-m68k.c:894 +#: config/tc-m68k.c:908 #, c-format msgid "Unable to produce reloc against symbol '%s'" msgstr "" -#: config/tc-m68k.c:938 config/tc-mips.c:13322 config/tc-vax.c:3441 +#: config/tc-m68k.c:952 config/tc-mips.c:13143 config/tc-vax.c:3450 #, c-format msgid "Cannot make %s relocation PC relative" msgstr "" -#: config/tc-m68k.c:1031 config/tc-tahoe.c:1495 config/tc-vax.c:1889 +#: config/tc-m68k.c:1045 config/tc-tahoe.c:1495 config/tc-vax.c:1889 msgid "No operator" msgstr "" -#: config/tc-m68k.c:1061 config/tc-tahoe.c:1512 config/tc-vax.c:1906 +#: config/tc-m68k.c:1075 config/tc-tahoe.c:1512 config/tc-vax.c:1906 msgid "Unknown operator" msgstr "" -#: config/tc-m68k.c:1836 +#: config/tc-m68k.c:1905 msgid "invalid instruction for this architecture; needs " msgstr "" -#: config/tc-m68k.c:1841 +#: config/tc-m68k.c:1910 +msgid "ColdFire fpu (cfv4e)" +msgstr "" + +#: config/tc-m68k.c:1913 msgid "fpu (68040, 68060 or 68881/68882)" msgstr "" -#: config/tc-m68k.c:1844 +#: config/tc-m68k.c:1916 msgid "mmu (68030 or 68851)" msgstr "" -#: config/tc-m68k.c:1847 +#: config/tc-m68k.c:1919 msgid "68020 or higher" msgstr "" -#: config/tc-m68k.c:1850 +#: config/tc-m68k.c:1922 msgid "68000 or higher" msgstr "" -#: config/tc-m68k.c:1853 +#: config/tc-m68k.c:1925 msgid "68010 or higher" msgstr "" -#: config/tc-m68k.c:1882 +#: config/tc-m68k.c:1954 msgid "operands mismatch" msgstr "" -#: config/tc-m68k.c:1939 config/tc-m68k.c:1945 config/tc-m68k.c:1951 -#: config/tc-mmix.c:2464 config/tc-mmix.c:2488 +#: config/tc-m68k.c:2014 config/tc-m68k.c:2020 config/tc-m68k.c:2026 +#: config/tc-mmix.c:2539 config/tc-mmix.c:2563 msgid "operand out of range" msgstr "" -#: config/tc-m68k.c:2008 +#: config/tc-m68k.c:2083 #, c-format msgid "Bignum too big for %c format; truncated" msgstr "" -#: config/tc-m68k.c:2076 +#: config/tc-m68k.c:2151 msgid "displacement too large for this architecture; needs 68020 or higher" msgstr "" -#: config/tc-m68k.c:2186 +#: config/tc-m68k.c:2262 msgid "" "scale factor invalid on this architecture; needs cpu32 or 68020 or higher" msgstr "" -#: config/tc-m68k.c:2191 +#: config/tc-m68k.c:2267 msgid "invalid index size for coldfire" msgstr "" -#: config/tc-m68k.c:2244 +#: config/tc-m68k.c:2320 msgid "Forcing byte displacement" msgstr "" -#: config/tc-m68k.c:2246 +#: config/tc-m68k.c:2322 msgid "byte displacement out of range" msgstr "" -#: config/tc-m68k.c:2293 config/tc-m68k.c:2331 +#: config/tc-m68k.c:2369 config/tc-m68k.c:2407 msgid "invalid operand mode for this architecture; needs 68020 or higher" msgstr "" -#: config/tc-m68k.c:2317 config/tc-m68k.c:2351 +#: config/tc-m68k.c:2393 config/tc-m68k.c:2427 msgid ":b not permitted; defaulting to :w" msgstr "" -#: config/tc-m68k.c:2428 +#: config/tc-m68k.c:2504 msgid "unsupported byte value; use a different suffix" msgstr "" -#: config/tc-m68k.c:2442 +#: config/tc-m68k.c:2519 msgid "unknown/incorrect operand" msgstr "" -#: config/tc-m68k.c:2475 config/tc-m68k.c:2483 config/tc-m68k.c:2490 -#: config/tc-m68k.c:2497 +#: config/tc-m68k.c:2552 config/tc-m68k.c:2560 config/tc-m68k.c:2567 +#: config/tc-m68k.c:2574 msgid "out of range" msgstr "" -#: config/tc-m68k.c:2543 +#: config/tc-m68k.c:2620 msgid "Can't use long branches on 68000/68010/5200" msgstr "" -#: config/tc-m68k.c:2653 +#: config/tc-m68k.c:2730 msgid "Expression out of range, using 0" msgstr "" -#: config/tc-m68k.c:2765 config/tc-m68k.c:2781 +#: config/tc-m68k.c:2898 config/tc-m68k.c:2914 msgid "Floating point register in register list" msgstr "" -#: config/tc-m68k.c:2771 +#: config/tc-m68k.c:2904 msgid "Wrong register in floating-point reglist" msgstr "" -#: config/tc-m68k.c:2787 +#: config/tc-m68k.c:2920 msgid "incorrect register in reglist" msgstr "" -#: config/tc-m68k.c:2793 +#: config/tc-m68k.c:2926 msgid "wrong register in floating-point reglist" msgstr "" -#. ERROR -#: config/tc-m68k.c:3234 +#. ERROR. +#: config/tc-m68k.c:3373 msgid "Extra )" msgstr "" -#. ERROR -#: config/tc-m68k.c:3245 +#. ERROR. +#: config/tc-m68k.c:3384 msgid "Missing )" msgstr "" -#: config/tc-m68k.c:3262 +#: config/tc-m68k.c:3401 msgid "Missing operand" msgstr "" -#: config/tc-m68k.c:3594 +#: config/tc-m68k.c:3758 #, c-format msgid "%s -- statement `%s' ignored" msgstr "" -#: config/tc-m68k.c:3643 +#: config/tc-m68k.c:3807 #, c-format msgid "Don't know how to figure width of %c in md_assemble()" msgstr "" -#: config/tc-m68k.c:3825 config/tc-m68k.c:3863 +#: config/tc-m68k.c:3989 config/tc-m68k.c:4027 #, c-format msgid "Internal Error: Can't find %s in hash table" msgstr "" -#: config/tc-m68k.c:3828 config/tc-m68k.c:3866 +#: config/tc-m68k.c:3992 config/tc-m68k.c:4030 #, c-format msgid "Internal Error: Can't hash %s: %s" msgstr "" -#: config/tc-m68k.c:3948 +#: config/tc-m68k.c:4112 msgid "architecture not yet selected: defaulting to 68020" msgstr "" -#: config/tc-m68k.c:3997 +#: config/tc-m68k.c:4167 #, c-format msgid "unrecognized default cpu `%s' ???" msgstr "" -#: config/tc-m68k.c:4009 +#: config/tc-m68k.c:4179 msgid "68040 and 68851 specified; mmu instructions may assemble incorrectly" msgstr "" -#: config/tc-m68k.c:4029 +#: config/tc-m68k.c:4199 msgid "options for 68881 and no-68881 both given" msgstr "" -#: config/tc-m68k.c:4031 +#: config/tc-m68k.c:4201 msgid "options for 68851 and no-68851 both given" msgstr "" -#: config/tc-m68k.c:4102 +#: config/tc-m68k.c:4272 #, c-format msgid "text label `%s' aligned to odd boundary" msgstr "" -#: config/tc-m68k.c:4321 +#: config/tc-m68k.c:4491 msgid "invalid byte branch offset" msgstr "" -#: config/tc-m68k.c:4358 +#: config/tc-m68k.c:4528 msgid "short branch with zero offset: use :w" msgstr "" -#: config/tc-m68k.c:4827 config/tc-m68k.c:4838 +#: config/tc-m68k.c:4578 config/tc-m68k.c:4637 config/tc-m68k.c:4701 +msgid "Tried to convert PC relative conditional branch to absolute jump" +msgstr "" + +#: config/tc-m68k.c:4618 +msgid "Tried to convert DBcc to absolute jump" +msgstr "" + +#: config/tc-m68k.c:5010 config/tc-m68k.c:5021 config/tc-m68k.c:5062 msgid "expression out of range: defaulting to 1" msgstr "" -#: config/tc-m68k.c:4870 +#: config/tc-m68k.c:5053 msgid "expression out of range: defaulting to 0" msgstr "" -#: config/tc-m68k.c:4903 config/tc-m68k.c:4915 +#: config/tc-m68k.c:5095 config/tc-m68k.c:5107 #, c-format msgid "Can't deal with expression; defaulting to %ld" msgstr "" -#: config/tc-m68k.c:4929 +#: config/tc-m68k.c:5121 msgid "expression doesn't fit in BYTE" msgstr "" -#: config/tc-m68k.c:4933 +#: config/tc-m68k.c:5125 msgid "expression doesn't fit in WORD" msgstr "" -#: config/tc-m68k.c:5026 +#: config/tc-m68k.c:5218 #, c-format msgid "%s: unrecognized processor name" msgstr "" -#: config/tc-m68k.c:5091 +#: config/tc-m68k.c:5283 msgid "bad coprocessor id" msgstr "" -#: config/tc-m68k.c:5097 +#: config/tc-m68k.c:5289 msgid "unrecognized fopt option" msgstr "" -#: config/tc-m68k.c:5231 +#: config/tc-m68k.c:5423 #, c-format msgid "option `%s' may not be negated" msgstr "" -#: config/tc-m68k.c:5242 +#: config/tc-m68k.c:5434 #, c-format msgid "option `%s' not recognized" msgstr "" -#: config/tc-m68k.c:5275 +#: config/tc-m68k.c:5467 msgid "bad format of OPT NEST=depth" msgstr "" -#: config/tc-m68k.c:5338 +#: config/tc-m68k.c:5530 msgid "missing label" msgstr "" -#: config/tc-m68k.c:5362 config/tc-m68k.c:5391 +#: config/tc-m68k.c:5554 config/tc-m68k.c:5583 msgid "bad register list" msgstr "" -#: config/tc-m68k.c:5364 +#: config/tc-m68k.c:5556 #, c-format msgid "bad register list: %s" msgstr "" -#: config/tc-m68k.c:5462 +#: config/tc-m68k.c:5654 msgid "restore without save" msgstr "" -#: config/tc-m68k.c:5636 config/tc-m68k.c:6023 +#: config/tc-m68k.c:5828 config/tc-m68k.c:6215 msgid "syntax error in structured control directive" msgstr "" -#: config/tc-m68k.c:5685 +#: config/tc-m68k.c:5877 msgid "missing condition code in structured control directive" msgstr "" -#: config/tc-m68k.c:5757 +#: config/tc-m68k.c:5949 #, c-format msgid "" "Condition <%c%c> in structured control directive can not be encoded correctly" msgstr "" -#: config/tc-m68k.c:6066 +#: config/tc-m68k.c:6258 msgid "missing then" msgstr "" -#: config/tc-m68k.c:6148 +#: config/tc-m68k.c:6340 msgid "else without matching if" msgstr "" -#: config/tc-m68k.c:6182 +#: config/tc-m68k.c:6374 msgid "endi without matching if" msgstr "" -#: config/tc-m68k.c:6223 +#: config/tc-m68k.c:6415 msgid "break outside of structured loop" msgstr "" -#: config/tc-m68k.c:6262 +#: config/tc-m68k.c:6454 msgid "next outside of structured loop" msgstr "" -#: config/tc-m68k.c:6314 +#: config/tc-m68k.c:6506 msgid "missing =" msgstr "" -#: config/tc-m68k.c:6352 +#: config/tc-m68k.c:6544 msgid "missing to or downto" msgstr "" -#: config/tc-m68k.c:6388 config/tc-m68k.c:6422 config/tc-m68k.c:6641 +#: config/tc-m68k.c:6580 config/tc-m68k.c:6614 config/tc-m68k.c:6832 msgid "missing do" msgstr "" -#: config/tc-m68k.c:6525 +#: config/tc-m68k.c:6716 msgid "endf without for" msgstr "" -#: config/tc-m68k.c:6581 +#: config/tc-m68k.c:6772 msgid "until without repeat" msgstr "" -#: config/tc-m68k.c:6677 +#: config/tc-m68k.c:6868 msgid "endw without while" msgstr "" -#: config/tc-m68k.c:6801 +#: config/tc-m68k.c:6992 #, c-format msgid "unrecognized option `%s'" msgstr "" -#: config/tc-m68k.c:6846 +#: config/tc-m68k.c:7037 #, c-format msgid "unrecognized architecture specification `%s'" msgstr "" -#: config/tc-m68k.c:6940 +#: config/tc-m68k.c:7131 #, c-format msgid "" "680X0 options:\n" "-l\t\t\tuse 1 word for refs to undefined symbols [default 2]\n" "-m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060 |\n" "-m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -m68360 | -mcpu32 |\n" -"-m5200 | -m5202 | -m5204 | -m5206 | -m5206e | -m5307 | -m5407\n" +"-m5200 | -m5202 | -m5204 | -m5206 | -m5206e | -m528x | -m5307 |\n" +"-m5407 | -mcfv4 | -mcfv4e\n" "\t\t\tspecify variant of 680X0 architecture [default %s]\n" "-m68881 | -m68882 | -mno-68881 | -mno-68882\n" "\t\t\ttarget has/lacks floating-point coprocessor\n" "\t\t\t[default yes for 68020, 68030, and cpu32]\n" msgstr "" -#: config/tc-m68k.c:6951 +#: config/tc-m68k.c:7143 +#, c-format msgid "" "-m68851 | -mno-68851\n" "\t\t\ttarget has/lacks memory-management unit coprocessor\n" @@ -5884,7 +6232,8 @@ msgid "" "--bitwise-or\t\tdo not treat `|' as a comment character\n" msgstr "" -#: config/tc-m68k.c:6961 +#: config/tc-m68k.c:7153 +#, c-format msgid "" "--base-size-default-16\tbase reg without size is 16 bits\n" "--base-size-default-32\tbase reg without size is 32 bits (default)\n" @@ -5892,12 +6241,12 @@ msgid "" "--disp-size-default-32\tdisplacement with unknown size is 32 bits (default)\n" msgstr "" -#: config/tc-m68k.c:6996 +#: config/tc-m68k.c:7188 #, c-format msgid "Error %s in %s\n" msgstr "" -#: config/tc-m68k.c:7000 +#: config/tc-m68k.c:7192 #, c-format msgid "Opcode(%d.%s): " msgstr "" @@ -6108,6 +6457,7 @@ msgid "unrecognised cpu type '%s'" msgstr "" #: config/tc-mcore.c:1807 +#, c-format msgid "" "MCORE specific options:\n" " -{no-}jsri2bsr\t {dis}able jsri to bsr transformation (def: dis)\n" @@ -6164,630 +6514,632 @@ msgid "pc-relative" msgstr "" #. Prototypes for static functions. -#: config/tc-mips.c:818 +#: config/tc-mips.c:860 #, c-format msgid "internal Error, line %d, %s" msgstr "" -#: config/tc-mips.c:1131 +#: config/tc-mips.c:1175 #, c-format msgid "internal: can't hash `%s': %s" msgstr "" -#: config/tc-mips.c:1139 +#: config/tc-mips.c:1183 #, c-format msgid "internal error: bad mips16 opcode: %s %s\n" msgstr "" -#: config/tc-mips.c:1332 +#: config/tc-mips.c:1377 #, c-format msgid "returned from mips_ip(%s) insn_opcode = 0x%x\n" msgstr "" -#: config/tc-mips.c:1976 config/tc-mips.c:13666 +#: config/tc-mips.c:2063 config/tc-mips.c:13484 msgid "extended instruction in delay slot" msgstr "" -#: config/tc-mips.c:2022 config/tc-mips.c:2032 +#: config/tc-mips.c:2124 config/tc-mips.c:2134 #, c-format msgid "jump to misaligned address (0x%lx)" msgstr "" -#: config/tc-mips.c:2025 config/tc-mips.c:2035 +#: config/tc-mips.c:2127 config/tc-mips.c:2137 #, c-format msgid "jump address range overflow (0x%lx)" msgstr "" -#: config/tc-mips.c:2805 config/tc-mips.c:3194 +#: config/tc-mips.c:2927 +msgid "" +"Macro instruction expanded into multiple instructions in a branch delay slot" +msgstr "" + +#: config/tc-mips.c:2930 msgid "Macro instruction expanded into multiple instructions" msgstr "" -#: config/tc-mips.c:2817 -msgid "" -"Macro instruction expanded into multiple instructions in a branch delay slot" +#: config/tc-mips.c:3408 config/tc-mips.c:3574 config/tc-mips.c:5897 +msgid "constant too large" msgstr "" -#: config/tc-mips.c:3225 config/tc-mips.c:7549 config/tc-mips.c:7575 -#: config/tc-mips.c:7653 config/tc-mips.c:7678 +#: config/tc-mips.c:3416 config/tc-mips.c:7514 config/tc-mips.c:7538 +#: config/tc-mips.c:7608 config/tc-mips.c:7631 msgid "operand overflow" msgstr "" -#: config/tc-mips.c:3251 config/tc-mips.c:6902 config/tc-mips.c:7754 +#: config/tc-mips.c:3435 config/tc-mips.c:6907 config/tc-mips.c:7698 msgid "Macro used $at after \".set noat\"" msgstr "" -#: config/tc-mips.c:3281 +#: config/tc-mips.c:3472 msgid "unsupported large constant" msgstr "" -#: config/tc-mips.c:3283 +#: config/tc-mips.c:3474 #, c-format msgid "Instruction %s requires absolute expression" msgstr "" -#: config/tc-mips.c:3422 +#: config/tc-mips.c:3609 #, c-format msgid "Number (0x%lx) larger than 32 bits" msgstr "" -#: config/tc-mips.c:3444 +#: config/tc-mips.c:3630 msgid "Number larger than 64 bits" msgstr "" -#: config/tc-mips.c:3747 config/tc-mips.c:3787 config/tc-mips.c:3829 -#: config/tc-mips.c:3886 config/tc-mips.c:6069 config/tc-mips.c:6111 -#: config/tc-mips.c:6163 config/tc-mips.c:6661 config/tc-mips.c:6716 +#: config/tc-mips.c:3907 config/tc-mips.c:3935 config/tc-mips.c:3973 +#: config/tc-mips.c:4018 config/tc-mips.c:6166 config/tc-mips.c:6205 +#: config/tc-mips.c:6244 config/tc-mips.c:6692 config/tc-mips.c:6744 msgid "PIC code offset overflow (max 16 signed bits)" msgstr "" -#: config/tc-mips.c:4146 +#: config/tc-mips.c:4327 config/tc-mips.c:4391 config/tc-mips.c:4475 +#: config/tc-mips.c:4520 config/tc-mips.c:4578 config/tc-mips.c:4626 +#: config/tc-mips.c:7796 config/tc-mips.c:7803 config/tc-mips.c:7810 +#: config/tc-mips.c:7917 +msgid "Unsupported large constant" +msgstr "" + +#. result is always true +#: config/tc-mips.c:4359 #, c-format -msgid "Branch %s is always false (nop)" +msgid "Branch %s is always true" msgstr "" -#: config/tc-mips.c:4153 +#: config/tc-mips.c:4589 config/tc-mips.c:4637 config/tc-mips.c:8242 #, c-format -msgid "Branch likely %s is always false" +msgid "Improper position (%lu)" msgstr "" -#: config/tc-mips.c:4160 config/tc-mips.c:4228 config/tc-mips.c:4320 -#: config/tc-mips.c:4369 config/tc-mips.c:7857 config/tc-mips.c:7865 -#: config/tc-mips.c:7872 config/tc-mips.c:7979 -msgid "Unsupported large constant" +#: config/tc-mips.c:4595 config/tc-mips.c:8310 +#, c-format +msgid "Improper extract size (%lu, position %lu)" msgstr "" -#. result is always true -#: config/tc-mips.c:4194 +#: config/tc-mips.c:4643 config/tc-mips.c:8274 #, c-format -msgid "Branch %s is always true" +msgid "Improper insert size (%lu, position %lu)" msgstr "" -#: config/tc-mips.c:4437 config/tc-mips.c:4540 +#: config/tc-mips.c:4680 config/tc-mips.c:4778 msgid "Divide by zero." msgstr "" -#: config/tc-mips.c:4622 +#: config/tc-mips.c:4865 msgid "dla used to load 32-bit register" msgstr "" -#: config/tc-mips.c:4625 +#: config/tc-mips.c:4868 msgid "la used to load 64-bit address" msgstr "" -#: config/tc-mips.c:5000 config/tc-mips.c:5353 +#: config/tc-mips.c:5189 config/tc-mips.c:5467 msgid "PIC code offset overflow (max 32 signed bits)" msgstr "" -#: config/tc-mips.c:5419 +#: config/tc-mips.c:5535 msgid "MIPS PIC call to register other than $25" msgstr "" -#: config/tc-mips.c:5425 config/tc-mips.c:5436 config/tc-mips.c:5574 -#: config/tc-mips.c:5585 +#: config/tc-mips.c:5541 config/tc-mips.c:5552 config/tc-mips.c:5676 +#: config/tc-mips.c:5687 msgid "No .cprestore pseudo-op used in PIC code" msgstr "" -#: config/tc-mips.c:5430 config/tc-mips.c:5579 +#: config/tc-mips.c:5546 config/tc-mips.c:5681 msgid "No .frame pseudo-op used in PIC code" msgstr "" -#: config/tc-mips.c:5657 config/tc-mips.c:5746 config/tc-mips.c:6414 -#: config/tc-mips.c:6453 config/tc-mips.c:6471 config/tc-mips.c:7221 +#: config/tc-mips.c:5759 config/tc-mips.c:5848 config/tc-mips.c:6477 +#: config/tc-mips.c:6511 config/tc-mips.c:6529 config/tc-mips.c:7209 msgid "opcode not supported on this processor" msgstr "" -#: config/tc-mips.c:5970 +#: config/tc-mips.c:6082 msgid "load/store address overflow (max 32 bits)" msgstr "" -#: config/tc-mips.c:7084 config/tc-mips.c:7117 config/tc-mips.c:7167 -#: config/tc-mips.c:7199 +#: config/tc-mips.c:7081 config/tc-mips.c:7111 config/tc-mips.c:7159 +#: config/tc-mips.c:7188 msgid "Improper rotate count" msgstr "" -#: config/tc-mips.c:7260 +#: config/tc-mips.c:7242 #, c-format msgid "Instruction %s: result is always false" msgstr "" -#: config/tc-mips.c:7418 +#: config/tc-mips.c:7391 #, c-format msgid "Instruction %s: result is always true" msgstr "" #. FIXME: Check if this is one of the itbl macros, since they #. are added dynamically. -#: config/tc-mips.c:7750 +#: config/tc-mips.c:7694 #, c-format msgid "Macro %s not implemented yet" msgstr "" -#: config/tc-mips.c:8010 +#: config/tc-mips.c:7948 #, c-format msgid "internal: bad mips opcode (mask error): %s %s" msgstr "" -#: config/tc-mips.c:8030 config/tc-mips.c:8361 +#: config/tc-mips.c:7973 config/tc-mips.c:8336 #, c-format msgid "internal: bad mips opcode (unknown extension operand type `+%c'): %s %s" msgstr "" -#: config/tc-mips.c:8091 +#: config/tc-mips.c:8034 #, c-format msgid "internal: bad mips opcode (unknown operand type `%c'): %s %s" msgstr "" -#: config/tc-mips.c:8098 +#: config/tc-mips.c:8041 #, c-format msgid "internal: bad mips opcode (bits 0x%lx undefined): %s %s" msgstr "" -#: config/tc-mips.c:8212 +#: config/tc-mips.c:8155 #, c-format msgid "opcode not supported on this processor: %s (%s)" msgstr "" -#: config/tc-mips.c:8293 -#, c-format -msgid "Improper position (%lu)" -msgstr "" - -#: config/tc-mips.c:8319 -#, c-format -msgid "Improper insert size (%lu, position %lu)" -msgstr "" - -#: config/tc-mips.c:8345 -#, c-format -msgid "Improper extract size (%lu, position %lu)" +#: config/tc-mips.c:8330 config/tc-mips.c:8819 +msgid "absolute expression required" msgstr "" -#: config/tc-mips.c:8379 +#: config/tc-mips.c:8354 #, c-format msgid "Improper shift amount (%lu)" msgstr "" -#: config/tc-mips.c:8405 config/tc-mips.c:9655 config/tc-mips.c:9770 +#: config/tc-mips.c:8380 config/tc-mips.c:9643 config/tc-mips.c:9758 #, c-format msgid "Invalid value for `%s' (%lu)" msgstr "" -#: config/tc-mips.c:8423 +#: config/tc-mips.c:8398 #, c-format msgid "Illegal break code (%lu)" msgstr "" -#: config/tc-mips.c:8437 +#: config/tc-mips.c:8412 #, c-format msgid "Illegal lower break code (%lu)" msgstr "" -#: config/tc-mips.c:8450 +#: config/tc-mips.c:8425 #, c-format msgid "Illegal 20-bit code (%lu)" msgstr "" -#: config/tc-mips.c:8462 +#: config/tc-mips.c:8437 #, c-format msgid "Coproccesor code > 25 bits (%lu)" msgstr "" -#: config/tc-mips.c:8475 +#: config/tc-mips.c:8450 #, c-format msgid "Illegal 19-bit code (%lu)" msgstr "" -#: config/tc-mips.c:8487 +#: config/tc-mips.c:8462 #, c-format msgid "Invalid performance register (%lu)" msgstr "" -#: config/tc-mips.c:8525 +#: config/tc-mips.c:8500 #, c-format msgid "Invalid register number (%d)" msgstr "" -#: config/tc-mips.c:8703 +#: config/tc-mips.c:8678 #, c-format msgid "Invalid MDMX Immediate (%ld)" msgstr "" -#: config/tc-mips.c:8746 +#: config/tc-mips.c:8721 #, c-format msgid "Invalid float register number (%d)" msgstr "" -#: config/tc-mips.c:8756 +#: config/tc-mips.c:8731 #, c-format msgid "Float register should be even, was %d" msgstr "" -#: config/tc-mips.c:8795 +#: config/tc-mips.c:8770 #, c-format msgid "Bad element selector %ld" msgstr "" -#: config/tc-mips.c:8802 +#: config/tc-mips.c:8777 #, c-format msgid "Expecting ']' found '%s'" msgstr "" -#: config/tc-mips.c:8844 -msgid "absolute expression required" -msgstr "" - -#: config/tc-mips.c:8912 +#: config/tc-mips.c:8888 #, c-format msgid "Bad floating point constant: %s" msgstr "" -#: config/tc-mips.c:9040 +#: config/tc-mips.c:9016 msgid "Can't use floating point insn in this section" msgstr "" -#: config/tc-mips.c:9101 +#: config/tc-mips.c:9077 msgid "expression out of range" msgstr "" -#: config/tc-mips.c:9141 +#: config/tc-mips.c:9117 msgid "lui expression not in range 0..65535" msgstr "" -#: config/tc-mips.c:9165 +#: config/tc-mips.c:9141 +#, c-format +msgid "Invalid condition code register $fcc%d" +msgstr "" + +#: config/tc-mips.c:9146 +#, c-format +msgid "Condition code register should be even for %s, was %d" +msgstr "" + +#: config/tc-mips.c:9151 #, c-format -msgid "invalid condition code register $fcc%d" +msgid "Condition code register should be 0 or 4 for %s, was %d" msgstr "" -#: config/tc-mips.c:9190 +#: config/tc-mips.c:9177 msgid "invalid coprocessor sub-selection value (0-7)" msgstr "" -#: config/tc-mips.c:9202 config/tc-mips.c:9219 +#: config/tc-mips.c:9189 config/tc-mips.c:9206 #, c-format msgid "bad byte vector index (%ld)" msgstr "" -#: config/tc-mips.c:9230 +#: config/tc-mips.c:9217 #, c-format msgid "bad char = '%c'\n" msgstr "" -#: config/tc-mips.c:9241 config/tc-mips.c:9246 config/tc-mips.c:9795 +#: config/tc-mips.c:9228 config/tc-mips.c:9233 config/tc-mips.c:9783 msgid "illegal operands" msgstr "" -#: config/tc-mips.c:9311 +#: config/tc-mips.c:9298 msgid "unrecognized opcode" msgstr "" -#: config/tc-mips.c:9423 +#: config/tc-mips.c:9411 #, c-format msgid "invalid register number (%d)" msgstr "" -#: config/tc-mips.c:9514 +#: config/tc-mips.c:9502 msgid "used $at without \".set noat\"" msgstr "" -#: config/tc-mips.c:9689 +#: config/tc-mips.c:9677 msgid "can't parse register list" msgstr "" -#: config/tc-mips.c:9913 +#: config/tc-mips.c:9901 msgid "extended operand requested but not required" msgstr "" -#: config/tc-mips.c:9915 +#: config/tc-mips.c:9903 msgid "invalid unextended operand value" msgstr "" -#: config/tc-mips.c:9943 +#: config/tc-mips.c:9931 msgid "operand value out of range for instruction" msgstr "" -#: config/tc-mips.c:10341 +#: config/tc-mips.c:10335 #, c-format msgid "A different %s was already specified, is now %s" msgstr "" -#: config/tc-mips.c:10502 +#: config/tc-mips.c:10496 msgid "-G may not be used with embedded PIC code" msgstr "" -#: config/tc-mips.c:10531 +#: config/tc-mips.c:10525 msgid "-call_shared is supported only for ELF format" msgstr "" -#: config/tc-mips.c:10538 config/tc-mips.c:11849 config/tc-mips.c:12087 +#: config/tc-mips.c:10532 config/tc-mips.c:11787 config/tc-mips.c:12028 msgid "-G may not be used with SVR4 PIC code" msgstr "" -#: config/tc-mips.c:10547 +#: config/tc-mips.c:10541 msgid "-non_shared is supported only for ELF format" msgstr "" -#: config/tc-mips.c:10565 +#: config/tc-mips.c:10559 msgid "-G is not supported for this configuration" msgstr "" -#: config/tc-mips.c:10570 +#: config/tc-mips.c:10564 msgid "-G may not be used with SVR4 or embedded PIC code" msgstr "" -#: config/tc-mips.c:10584 +#: config/tc-mips.c:10578 msgid "-32 is supported for ELF format only" msgstr "" -#: config/tc-mips.c:10593 +#: config/tc-mips.c:10587 msgid "-n32 is supported for ELF format only" msgstr "" -#: config/tc-mips.c:10602 +#: config/tc-mips.c:10596 msgid "-64 is supported for ELF format only" msgstr "" -#: config/tc-mips.c:10607 config/tc-mips.c:10644 +#: config/tc-mips.c:10601 config/tc-mips.c:10638 msgid "No compiled in support for 64 bit object file format" msgstr "" -#: config/tc-mips.c:10631 +#: config/tc-mips.c:10625 msgid "-mabi is supported for ELF format only" msgstr "" -#: config/tc-mips.c:10651 +#: config/tc-mips.c:10645 #, c-format msgid "invalid abi -mabi=%s" msgstr "" -#: config/tc-mips.c:10718 +#: config/tc-mips.c:10720 msgid "-G not supported in this configuration." msgstr "" -#: config/tc-mips.c:10744 +#: config/tc-mips.c:10746 #, c-format msgid "-%s conflicts with the other architecture options, which imply -%s" msgstr "" -#: config/tc-mips.c:10775 +#: config/tc-mips.c:10777 msgid "-mgp64 used with a 32-bit processor" msgstr "" -#: config/tc-mips.c:10777 +#: config/tc-mips.c:10779 msgid "-mgp32 used with a 64-bit ABI" msgstr "" -#: config/tc-mips.c:10779 +#: config/tc-mips.c:10781 msgid "-mgp64 used with a 32-bit ABI" msgstr "" -#: config/tc-mips.c:10809 +#: config/tc-mips.c:10811 msgid "trap exception not supported at ISA 1" msgstr "" -#: config/tc-mips.c:10957 +#: config/tc-mips.c:10959 #, c-format msgid "Unmatched %%hi reloc" msgstr "" -#: config/tc-mips.c:11049 +#: config/tc-mips.c:11051 msgid "Cannot branch to undefined symbol." msgstr "" -#: config/tc-mips.c:11056 +#: config/tc-mips.c:11058 msgid "Cannot branch to symbol in another section." msgstr "" -#: config/tc-mips.c:11065 +#: config/tc-mips.c:11067 msgid "Pretending global symbol used as branch target is local." msgstr "" -#: config/tc-mips.c:11230 +#: config/tc-mips.c:11152 msgid "Invalid PC relative reloc" msgstr "" -#: config/tc-mips.c:11325 config/tc-sparc.c:3185 config/tc-sparc.c:3192 -#: config/tc-sparc.c:3199 config/tc-sparc.c:3206 config/tc-sparc.c:3213 -#: config/tc-sparc.c:3222 config/tc-sparc.c:3233 config/tc-sparc.c:3255 -#: config/tc-sparc.c:3279 write.c:998 write.c:1070 +#: config/tc-mips.c:11247 config/tc-sparc.c:3196 config/tc-sparc.c:3203 +#: config/tc-sparc.c:3210 config/tc-sparc.c:3217 config/tc-sparc.c:3224 +#: config/tc-sparc.c:3233 config/tc-sparc.c:3244 config/tc-sparc.c:3266 +#: config/tc-sparc.c:3290 write.c:964 write.c:1036 msgid "relocation overflow" msgstr "" -#: config/tc-mips.c:11335 +#: config/tc-mips.c:11257 #, c-format msgid "Branch to odd address (%lx)" msgstr "" -#: config/tc-mips.c:11384 +#: config/tc-mips.c:11306 msgid "Branch out of range" msgstr "" -#: config/tc-mips.c:11491 +#: config/tc-mips.c:11413 #, c-format msgid "%08lx UNDEFINED\n" msgstr "" -#: config/tc-mips.c:11550 +#: config/tc-mips.c:11472 #, c-format msgid "Alignment too large: %d. assumed." msgstr "" -#: config/tc-mips.c:11553 +#: config/tc-mips.c:11475 msgid "Alignment negative: 0 assumed." msgstr "" -#: config/tc-mips.c:11640 +#: config/tc-mips.c:11562 msgid "No read only data section in this object file format" msgstr "" -#: config/tc-mips.c:11663 +#: config/tc-mips.c:11585 msgid "Global pointers not supported; recompile -G 0" msgstr "" -#: config/tc-mips.c:11805 +#: config/tc-mips.c:11743 #, c-format msgid "%s: no such section" msgstr "" -#: config/tc-mips.c:11844 +#: config/tc-mips.c:11782 #, c-format msgid ".option pic%d not supported" msgstr "" -#: config/tc-mips.c:11855 +#: config/tc-mips.c:11793 #, c-format msgid "Unrecognized option \"%s\"" msgstr "" -#: config/tc-mips.c:11917 +#: config/tc-mips.c:11855 msgid "`noreorder' must be set before `nomacro'" msgstr "" -#: config/tc-mips.c:11989 +#: config/tc-mips.c:11929 #, c-format msgid "unknown architecture %s" msgstr "" -#: config/tc-mips.c:11997 config/tc-mips.c:12018 +#: config/tc-mips.c:11937 config/tc-mips.c:11959 #, c-format msgid "unknown ISA level %s" msgstr "" -#: config/tc-mips.c:12046 +#: config/tc-mips.c:11987 msgid ".set pop with no .set push" msgstr "" -#: config/tc-mips.c:12070 +#: config/tc-mips.c:12011 #, c-format msgid "Tried to set unrecognized symbol: %s\n" msgstr "" -#: config/tc-mips.c:12120 +#: config/tc-mips.c:12060 msgid ".cpload not in noreorder section" msgstr "" -#: config/tc-mips.c:12176 config/tc-mips.c:12195 +#: config/tc-mips.c:12116 config/tc-mips.c:12135 msgid "missing argument separator ',' for .cpsetup" msgstr "" -#: config/tc-mips.c:12373 +#: config/tc-mips.c:12315 msgid "Unsupported use of .gpword" msgstr "" -#: config/tc-mips.c:12409 +#: config/tc-mips.c:12351 msgid "Unsupported use of .gpdword" msgstr "" -#: config/tc-mips.c:12544 +#: config/tc-mips.c:12486 msgid "expected `$'" msgstr "" -#: config/tc-mips.c:12552 +#: config/tc-mips.c:12494 msgid "Bad register number" msgstr "" -#: config/tc-mips.c:12600 +#: config/tc-mips.c:12542 msgid "Unrecognized register name" msgstr "" -#: config/tc-mips.c:12835 +#: config/tc-mips.c:12777 msgid "unsupported PC relative reference to different section" msgstr "" -#: config/tc-mips.c:12948 +#: config/tc-mips.c:12890 msgid "unsupported relocation" msgstr "" -#: config/tc-mips.c:13063 -msgid "AT used after \".set noat\" or macro used after \".set nomacro\"" -msgstr "" - -#: config/tc-mips.c:13126 +#: config/tc-mips.c:13057 msgid "Double check fx_r_type in tc-mips.c:tc_gen_reloc" msgstr "" -#: config/tc-mips.c:13341 config/tc-sh.c:3800 +#: config/tc-mips.c:13162 config/tc-sh.c:4087 #, c-format msgid "Can not represent %s relocation in this object file format" msgstr "" -#: config/tc-mips.c:13430 +#: config/tc-mips.c:13248 msgid "relaxed out-of-range branch into a jump" msgstr "" -#: config/tc-mips.c:13903 +#: config/tc-mips.c:13761 msgid "missing .end at end of assembly" msgstr "" -#: config/tc-mips.c:13918 +#: config/tc-mips.c:13776 msgid "expected simple number" msgstr "" -#: config/tc-mips.c:13944 +#: config/tc-mips.c:13802 #, c-format msgid " *input_line_pointer == '%c' 0x%02x\n" msgstr "" -#: config/tc-mips.c:13946 +#: config/tc-mips.c:13804 msgid "invalid number" msgstr "" -#: config/tc-mips.c:14019 +#: config/tc-mips.c:13877 msgid ".end not in text section" msgstr "" -#: config/tc-mips.c:14023 +#: config/tc-mips.c:13881 msgid ".end directive without a preceding .ent directive." msgstr "" -#: config/tc-mips.c:14032 +#: config/tc-mips.c:13890 msgid ".end symbol does not match .ent symbol." msgstr "" -#: config/tc-mips.c:14039 +#: config/tc-mips.c:13897 msgid ".end directive missing or unknown symbol" msgstr "" -#: config/tc-mips.c:14099 +#: config/tc-mips.c:13958 msgid ".ent or .aent not in text section." msgstr "" -#: config/tc-mips.c:14102 +#: config/tc-mips.c:13961 msgid "missing .end" msgstr "" -#: config/tc-mips.c:14154 +#: config/tc-mips.c:14013 msgid "Bad .frame directive" msgstr "" -#: config/tc-mips.c:14186 +#: config/tc-mips.c:14045 msgid ".mask/.fmask outside of .ent" msgstr "" -#: config/tc-mips.c:14193 +#: config/tc-mips.c:14052 msgid "Bad .mask/.fmask directive" msgstr "" -#: config/tc-mips.c:14472 +#: config/tc-mips.c:14332 +#, c-format msgid "" "MIPS options:\n" "-membedded-pic\t\tgenerate embedded position independent code\n" @@ -6798,7 +7150,8 @@ msgid "" "\t\t\timplicitly with the gp register [default 8]\n" msgstr "" -#: config/tc-mips.c:14480 +#: config/tc-mips.c:14340 +#, c-format msgid "" "-mips1\t\t\tgenerate MIPS ISA I instructions\n" "-mips2\t\t\tgenerate MIPS ISA II instructions\n" @@ -6808,96 +7161,112 @@ msgid "" "-mips32 generate MIPS32 ISA instructions\n" "-mips32r2 generate MIPS32 release 2 ISA instructions\n" "-mips64 generate MIPS64 ISA instructions\n" +"-mips64r2 generate MIPS64 release 2 ISA instructions\n" "-march=CPU/-mtune=CPU\tgenerate code/schedule for CPU, where CPU is one of:\n" msgstr "" -#: config/tc-mips.c:14498 +#: config/tc-mips.c:14359 +#, c-format msgid "" "-mCPU\t\t\tequivalent to -march=CPU -mtune=CPU. Deprecated.\n" "-no-mCPU\t\tdon't generate code specific to CPU.\n" "\t\t\tFor -mCPU and -no-mCPU, CPU must be one of:\n" msgstr "" -#: config/tc-mips.c:14511 +#: config/tc-mips.c:14372 +#, c-format msgid "" "-mips16\t\t\tgenerate mips16 instructions\n" "-no-mips16\t\tdo not generate mips16 instructions\n" msgstr "" -#: config/tc-mips.c:14514 +#: config/tc-mips.c:14375 +#, c-format msgid "" "-mgp32\t\t\tuse 32-bit GPRs, regardless of the chosen ISA\n" "-mfp32\t\t\tuse 32-bit FPRs, regardless of the chosen ISA\n" "-O0\t\t\tremove unneeded NOPs, do not swap branches\n" "-O\t\t\tremove unneeded NOPs and swap branches\n" -"-n\t\t\twarn about NOPs generated from macros\n" "--[no-]construct-floats [dis]allow floating point values to be constructed\n" "--trap, --no-break\ttrap exception on div by 0 and mult overflow\n" "--break, --no-trap\tbreak exception on div by 0 and mult overflow\n" msgstr "" -#: config/tc-mips.c:14524 +#: config/tc-mips.c:14384 +#, c-format msgid "" "-KPIC, -call_shared\tgenerate SVR4 position independent code\n" "-non_shared\t\tdo not generate position independent code\n" "-xgot\t\t\tassume a 32 bit GOT\n" +"-mpdr, -mno-pdr\t\tenable/disable creation of .pdr sections\n" "-mabi=ABI\t\tcreate ABI conformant object file for:\n" msgstr "" -#: config/tc-mips.c:14540 +#: config/tc-mips.c:14401 +#, c-format msgid "" "-32\t\t\tcreate o32 ABI object file (default)\n" "-n32\t\t\tcreate n32 ABI object file\n" "-64\t\t\tcreate 64 ABI object file\n" msgstr "" -#: config/tc-mmix.c:677 +#: config/tc-mmix.c:726 +#, c-format msgid " MMIX-specific command line options:\n" msgstr "" -#: config/tc-mmix.c:678 +#: config/tc-mmix.c:727 +#, c-format msgid "" " -fixed-special-register-names\n" " Allow only the original special register names.\n" msgstr "" -#: config/tc-mmix.c:681 +#: config/tc-mmix.c:730 +#, c-format msgid " -globalize-symbols Make all symbols global.\n" msgstr "" -#: config/tc-mmix.c:683 +#: config/tc-mmix.c:732 +#, c-format msgid " -gnu-syntax Turn off mmixal syntax compatibility.\n" msgstr "" -#: config/tc-mmix.c:685 +#: config/tc-mmix.c:734 +#, c-format msgid " -relax Create linker relaxable code.\n" msgstr "" -#: config/tc-mmix.c:687 +#: config/tc-mmix.c:736 +#, c-format msgid "" " -no-predefined-syms Do not provide mmixal built-in constants.\n" " Implies -fixed-special-register-names.\n" msgstr "" -#: config/tc-mmix.c:690 +#: config/tc-mmix.c:739 +#, c-format msgid "" " -no-expand Do not expand GETA, branches, PUSHJ or JUMP\n" " into multiple instructions.\n" msgstr "" -#: config/tc-mmix.c:693 +#: config/tc-mmix.c:742 +#, c-format msgid "" " -no-merge-gregs Do not merge GREG definitions with nearby values.\n" msgstr "" -#: config/tc-mmix.c:695 +#: config/tc-mmix.c:744 +#, c-format msgid "" " -linker-allocated-gregs If there's no suitable GREG definition for " "the operands of an instruction, let the linker " "resolve.\n" msgstr "" -#: config/tc-mmix.c:698 +#: config/tc-mmix.c:747 +#, c-format msgid "" " -x Do not warn when an operand to GETA, a branch,\n" " PUSHJ or JUMP is not known to be within range.\n" @@ -6905,185 +7274,185 @@ msgid "" " -linker-allocated-gregs." msgstr "" -#: config/tc-mmix.c:825 +#: config/tc-mmix.c:874 #, c-format msgid "unknown opcode: `%s'" msgstr "" -#: config/tc-mmix.c:947 config/tc-mmix.c:962 +#: config/tc-mmix.c:996 config/tc-mmix.c:1011 msgid "specified location wasn't TETRA-aligned" msgstr "" -#: config/tc-mmix.c:949 config/tc-mmix.c:964 config/tc-mmix.c:4015 -#: config/tc-mmix.c:4031 +#: config/tc-mmix.c:998 config/tc-mmix.c:1013 config/tc-mmix.c:4199 +#: config/tc-mmix.c:4215 msgid "unaligned data at an absolute location is not supported" msgstr "" -#: config/tc-mmix.c:1074 +#: config/tc-mmix.c:1123 #, c-format msgid "invalid operand to opcode %s: `%s'" msgstr "" -#: config/tc-mmix.c:1096 config/tc-mmix.c:1123 config/tc-mmix.c:1156 -#: config/tc-mmix.c:1164 config/tc-mmix.c:1181 config/tc-mmix.c:1209 -#: config/tc-mmix.c:1230 config/tc-mmix.c:1255 config/tc-mmix.c:1303 -#: config/tc-mmix.c:1401 config/tc-mmix.c:1426 config/tc-mmix.c:1458 -#: config/tc-mmix.c:1490 config/tc-mmix.c:1520 config/tc-mmix.c:1573 -#: config/tc-mmix.c:1590 config/tc-mmix.c:1617 config/tc-mmix.c:1645 -#: config/tc-mmix.c:1672 config/tc-mmix.c:1698 config/tc-mmix.c:1714 -#: config/tc-mmix.c:1740 config/tc-mmix.c:1756 config/tc-mmix.c:1772 -#: config/tc-mmix.c:1835 config/tc-mmix.c:1851 +#: config/tc-mmix.c:1145 config/tc-mmix.c:1172 config/tc-mmix.c:1205 +#: config/tc-mmix.c:1213 config/tc-mmix.c:1230 config/tc-mmix.c:1258 +#: config/tc-mmix.c:1279 config/tc-mmix.c:1304 config/tc-mmix.c:1352 +#: config/tc-mmix.c:1450 config/tc-mmix.c:1475 config/tc-mmix.c:1507 +#: config/tc-mmix.c:1539 config/tc-mmix.c:1569 config/tc-mmix.c:1622 +#: config/tc-mmix.c:1639 config/tc-mmix.c:1666 config/tc-mmix.c:1694 +#: config/tc-mmix.c:1721 config/tc-mmix.c:1747 config/tc-mmix.c:1763 +#: config/tc-mmix.c:1789 config/tc-mmix.c:1805 config/tc-mmix.c:1821 +#: config/tc-mmix.c:1884 config/tc-mmix.c:1900 #, c-format msgid "invalid operands to opcode %s: `%s'" msgstr "" -#: config/tc-mmix.c:1828 +#: config/tc-mmix.c:1877 #, c-format msgid "unsupported operands to %s: `%s'" msgstr "" -#: config/tc-mmix.c:1956 +#: config/tc-mmix.c:2005 msgid "internal: mmix_prefix_name but empty prefix" msgstr "" -#: config/tc-mmix.c:2001 +#: config/tc-mmix.c:2050 #, c-format msgid "too many GREG registers allocated (max %d)" msgstr "" -#: config/tc-mmix.c:2061 +#: config/tc-mmix.c:2110 msgid "BSPEC already active. Nesting is not supported." msgstr "" -#: config/tc-mmix.c:2070 +#: config/tc-mmix.c:2119 msgid "invalid BSPEC expression" msgstr "" -#: config/tc-mmix.c:2086 +#: config/tc-mmix.c:2135 #, c-format msgid "can't create section %s" msgstr "" -#: config/tc-mmix.c:2091 +#: config/tc-mmix.c:2140 #, c-format msgid "can't set section flags for section %s" msgstr "" -#: config/tc-mmix.c:2113 +#: config/tc-mmix.c:2162 msgid "ESPEC without preceding BSPEC" msgstr "" -#: config/tc-mmix.c:2143 +#: config/tc-mmix.c:2192 msgid "missing local expression" msgstr "" -#: config/tc-mmix.c:2363 +#: config/tc-mmix.c:2437 msgid "operand out of range, instruction expanded" msgstr "" #. The BFD_RELOC_MMIX_LOCAL-specific message is supposed to be #. user-friendly, though a little bit non-substantial. -#: config/tc-mmix.c:2620 +#: config/tc-mmix.c:2695 msgid "directive LOCAL must be placed in code or data" msgstr "" -#: config/tc-mmix.c:2621 +#: config/tc-mmix.c:2696 msgid "internal confusion: relocation in a section without contents" msgstr "" -#: config/tc-mmix.c:2734 +#: config/tc-mmix.c:2810 msgid "internal: BFD_RELOC_MMIX_BASE_PLUS_OFFSET not resolved to section" msgstr "" -#: config/tc-mmix.c:2782 +#: config/tc-mmix.c:2858 msgid "no suitable GREG definition for operands" msgstr "" -#: config/tc-mmix.c:2841 +#: config/tc-mmix.c:2917 msgid "operands were not reducible at assembly-time" msgstr "" -#: config/tc-mmix.c:2868 +#: config/tc-mmix.c:2944 #, c-format msgid "cannot generate relocation type for symbol %s, code %s" msgstr "" -#: config/tc-mmix.c:2888 +#: config/tc-mmix.c:2964 #, c-format msgid "internal: unhandled label %s" msgstr "" -#: config/tc-mmix.c:2942 +#: config/tc-mmix.c:3018 msgid "[0-9]H labels may not appear alone on a line" msgstr "" -#: config/tc-mmix.c:2951 +#: config/tc-mmix.c:3027 msgid "[0-9]H labels do not mix with dot-pseudos" msgstr "" -#: config/tc-mmix.c:3015 +#: config/tc-mmix.c:3091 msgid "invalid characters in input" msgstr "" -#: config/tc-mmix.c:3119 +#: config/tc-mmix.c:3195 msgid "empty label field for IS" msgstr "" -#: config/tc-mmix.c:3344 +#: config/tc-mmix.c:3528 #, c-format msgid "internal: unexpected relax type %d:%d" msgstr "" -#: config/tc-mmix.c:3366 +#: config/tc-mmix.c:3550 msgid "BSPEC without ESPEC." msgstr "" -#: config/tc-mmix.c:3568 +#: config/tc-mmix.c:3752 msgid "GREG expression too complicated" msgstr "" -#: config/tc-mmix.c:3583 +#: config/tc-mmix.c:3767 msgid "internal: GREG expression not resolved to section" msgstr "" -#: config/tc-mmix.c:3634 +#: config/tc-mmix.c:3818 msgid "register section has contents\n" msgstr "" -#: config/tc-mmix.c:3768 +#: config/tc-mmix.c:3952 msgid "section change from within a BSPEC/ESPEC pair is not supported" msgstr "" -#: config/tc-mmix.c:3790 +#: config/tc-mmix.c:3974 msgid "directive LOC from within a BSPEC/ESPEC pair is not supported" msgstr "" -#: config/tc-mmix.c:3801 +#: config/tc-mmix.c:3985 msgid "invalid LOC expression" msgstr "" -#: config/tc-mmix.c:3826 config/tc-mmix.c:3852 +#: config/tc-mmix.c:4010 config/tc-mmix.c:4036 msgid "LOC expression stepping backwards is not supported" msgstr "" #. We will only get here in rare cases involving #NO_APP, #. where the unterminated string is not recognized by the #. preformatting pass. -#: config/tc-mmix.c:3936 config/tc-mmix.c:4097 +#: config/tc-mmix.c:4120 config/tc-mmix.c:4281 msgid "unterminated string" msgstr "" -#: config/tc-mmix.c:3953 +#: config/tc-mmix.c:4137 msgid "BYTE expression not a pure number" msgstr "" #. Note that mmixal does not allow negative numbers in #. BYTE sequences, so neither should we. -#: config/tc-mmix.c:3962 +#: config/tc-mmix.c:4146 msgid "BYTE expression not in the range 0..255" msgstr "" -#: config/tc-mmix.c:4013 config/tc-mmix.c:4029 +#: config/tc-mmix.c:4197 config/tc-mmix.c:4213 msgid "data item with alignment larger than location" msgstr "" @@ -7094,42 +7463,44 @@ msgid "`&' serial number operator is not supported" msgstr "" #: config/tc-mn10200.c:319 +#, c-format msgid "" "MN10200 options:\n" "none yet\n" msgstr "" -#: config/tc-mn10200.c:793 config/tc-mn10300.c:1387 config/tc-ppc.c:2088 -#: config/tc-s390.c:1540 config/tc-v850.c:1677 +#: config/tc-mn10200.c:793 config/tc-mn10300.c:1387 config/tc-ppc.c:2124 +#: config/tc-s390.c:1540 config/tc-v850.c:1694 #, c-format msgid "Unrecognized opcode: `%s'" msgstr "" -#: config/tc-mn10200.c:1036 config/tc-mn10300.c:1960 config/tc-ppc.c:2566 -#: config/tc-s390.c:1455 config/tc-v850.c:2100 +#: config/tc-mn10200.c:1036 config/tc-mn10300.c:1960 config/tc-ppc.c:2603 +#: config/tc-s390.c:1455 config/tc-v850.c:2117 #, c-format msgid "junk at end of line: `%s'" msgstr "" -#: config/tc-mn10200.c:1242 write.c:2691 +#: config/tc-mn10200.c:1242 write.c:2642 #, c-format msgid "can't resolve `%s' {%s section} - `%s' {%s section}" msgstr "" -#: config/tc-mn10200.c:1347 config/tc-mn10300.c:2589 config/tc-ppc.c:1426 -#: config/tc-v850.c:1606 +#: config/tc-mn10200.c:1347 config/tc-mn10300.c:2589 config/tc-ppc.c:1462 +#: config/tc-v850.c:1623 #, c-format msgid "operand out of range (%s not between %ld and %ld)" msgstr "" #: config/tc-mn10300.c:690 +#, c-format msgid "" "MN10300 options:\n" "none yet\n" msgstr "" -#: config/tc-mn10300.c:1356 config/tc-sh.c:805 config/tc-xtensa.c:5177 -#: read.c:3764 +#: config/tc-mn10300.c:1356 config/tc-sh.c:772 config/tc-xtensa.c:5062 +#: read.c:3634 #, c-format msgid "unsupported BFD relocation size %u" msgstr "" @@ -7147,16 +7518,18 @@ msgstr "" msgid "Bad relocation fixup type (%d)" msgstr "" -#: config/tc-msp430.c:170 +#: config/tc-msp430.c:183 +#, c-format msgid "Known MCU names:\n" msgstr "" -#: config/tc-msp430.c:173 +#: config/tc-msp430.c:186 #, c-format msgid "\t %s\n" msgstr "" -#: config/tc-msp430.c:183 +#: config/tc-msp430.c:196 +#, c-format msgid "" "MSP430 options:\n" " -mmcu=[msp430-name] select microcontroller type\n" @@ -7175,120 +7548,122 @@ msgid "" " msp430x323 msp430x325\n" " msp430x336 msp430x337\n" " msp430x412 msp430x413\n" +" msp430xE423 msp430xE425 msp430E427\n" +" msp430xW423 msp430xW425 msp430W427\n" " msp430x435 msp430x436 msp430x437\n" " msp430x447 msp430x448 msp430x449\n" msgstr "" -#: config/tc-msp430.c:263 +#: config/tc-msp430.c:278 #, c-format msgid "redefinition of mcu type %s' to %s'" msgstr "" -#: config/tc-msp430.c:496 +#: config/tc-msp430.c:511 #, c-format msgid "instruction %s requires %d operand(s)" msgstr "" -#: config/tc-msp430.c:743 +#: config/tc-msp430.c:757 #, c-format msgid "Even number required. Rounded to %d" msgstr "" -#: config/tc-msp430.c:754 +#: config/tc-msp430.c:768 #, c-format msgid "Wrong displacement %d" msgstr "" -#: config/tc-msp430.c:771 +#: config/tc-msp430.c:785 msgid "instruction requires label sans '$'" msgstr "" -#: config/tc-msp430.c:777 +#: config/tc-msp430.c:791 msgid "instruction requires label or value in range -511:512" msgstr "" -#: config/tc-msp430.c:783 +#: config/tc-msp430.c:797 msgid "instruction requires label" msgstr "" -#: config/tc-msp430.c:789 +#: config/tc-msp430.c:803 msgid "Ilegal instruction or not implmented opcode." msgstr "" -#: config/tc-msp430.c:817 +#: config/tc-msp430.c:831 #, c-format msgid "Internal bug. Try to use 0(r%d) instead of @r%d" msgstr "" -#: config/tc-msp430.c:827 +#: config/tc-msp430.c:841 msgid "this addressing mode is not applicable for destination operand" msgstr "" -#: config/tc-msp430.c:944 +#: config/tc-msp430.c:958 #, c-format msgid "value %ld out of range. Use #lo() or #hi()" msgstr "" -#: config/tc-msp430.c:1040 +#: config/tc-msp430.c:1046 #, c-format msgid "unknown expression in operand %s. use #llo() #lhi() #hlo() #hhi() " msgstr "" -#: config/tc-msp430.c:1090 config/tc-msp430.c:1304 +#: config/tc-msp430.c:1096 config/tc-msp430.c:1310 #, c-format msgid "unknown operand %s" msgstr "" -#: config/tc-msp430.c:1111 config/tc-msp430.c:1242 +#: config/tc-msp430.c:1117 config/tc-msp430.c:1248 #, c-format msgid "value out of range: %d" msgstr "" -#: config/tc-msp430.c:1120 config/tc-msp430.c:1259 +#: config/tc-msp430.c:1126 config/tc-msp430.c:1265 #, c-format msgid "unknown expression in operand %s" msgstr "" -#: config/tc-msp430.c:1134 config/tc-msp430.c:1141 +#: config/tc-msp430.c:1140 config/tc-msp430.c:1147 #, c-format msgid "unknown addressing mode %s" msgstr "" -#: config/tc-msp430.c:1149 +#: config/tc-msp430.c:1155 #, c-format msgid "Bad register name r%s" msgstr "" -#: config/tc-msp430.c:1161 +#: config/tc-msp430.c:1167 #, c-format msgid "MSP430 does not have %d registers" msgstr "" -#: config/tc-msp430.c:1181 +#: config/tc-msp430.c:1187 msgid "')' required" msgstr "" -#: config/tc-msp430.c:1194 +#: config/tc-msp430.c:1200 #, c-format msgid "unknown operator %s. Did you mean X(Rn) or #[hl][hl][oi](CONST) ?" msgstr "" -#: config/tc-msp430.c:1203 +#: config/tc-msp430.c:1209 #, c-format msgid "unknown operator (r%s substituded as a register name" msgstr "" -#: config/tc-msp430.c:1215 config/tc-msp430.c:1226 +#: config/tc-msp430.c:1221 config/tc-msp430.c:1232 #, c-format msgid "unknown operator %s" msgstr "" -#: config/tc-msp430.c:1220 +#: config/tc-msp430.c:1226 msgid "r2 should not be used in indexed addressing mode" msgstr "" #. Unreachable. -#: config/tc-msp430.c:1321 +#: config/tc-msp430.c:1327 #, c-format msgid "unknown addressing mode for operand %s" msgstr "" @@ -7459,6 +7834,7 @@ msgid "invalid default displacement size \"%s\". Defaulting to %d." msgstr "" #: config/tc-ns32k.c:2213 +#, c-format msgid "" "NS32K options:\n" "-m32032 | -m32532\tselect variant of NS32K architecture\n" @@ -7527,20 +7903,21 @@ msgstr "" msgid "can't have relocation for ipush" msgstr "" -#: config/tc-pj.c:290 config/tc-xtensa.c:4976 +#: config/tc-pj.c:290 config/tc-xtensa.c:4864 #, c-format msgid "unknown opcode %s" msgstr "" #: config/tc-pj.c:439 +#, c-format msgid "" "PJ options:\n" "-little\t\t\tgenerate little endian code\n" "-big\t\t\tgenerate big endian code\n" msgstr "" -#: config/tc-pj.c:469 config/tc-sh.c:3464 config/tc-sh.c:3471 -#: config/tc-sh.c:3478 config/tc-sh.c:3485 +#: config/tc-pj.c:469 config/tc-sh.c:3763 config/tc-sh.c:3770 +#: config/tc-sh.c:3777 config/tc-sh.c:3784 msgid "pcrel too far" msgstr "" @@ -7552,17 +7929,18 @@ msgstr "" msgid "estimate size\n" msgstr "" -#: config/tc-ppc.c:879 +#: config/tc-ppc.c:980 #, c-format msgid "%s unsupported" msgstr "" -#: config/tc-ppc.c:1029 config/tc-s390.c:414 config/tc-s390.c:421 +#: config/tc-ppc.c:1046 config/tc-s390.c:414 config/tc-s390.c:421 #, c-format msgid "invalid switch -m%s" msgstr "" -#: config/tc-ppc.c:1066 +#: config/tc-ppc.c:1083 +#, c-format msgid "" "PowerPC options:\n" "-a32\t\t\tgenerate ELF32/XCOFF32\n" @@ -7574,11 +7952,13 @@ msgid "" "-mppc, -mppc32, -m603, -m604\n" "\t\t\tgenerate code for PowerPC 603/604\n" "-m403, -m405\t\tgenerate code for PowerPC 403/405\n" +"-m440\t\t\tgenerate code for PowerPC 440\n" "-m7400, -m7410, -m7450, -m7455\n" "\t\t\tgenerate code For PowerPC 7400/7410/7450/7455\n" msgstr "" -#: config/tc-ppc.c:1079 +#: config/tc-ppc.c:1097 +#, c-format msgid "" "-mppc64, -m620\t\tgenerate code for PowerPC 620/625/630\n" "-mppc64bridge\t\tgenerate code for PowerPC 64, including bridge insns\n" @@ -7589,7 +7969,8 @@ msgid "" "-many\t\t\tgenerate code for any architecture (PWR/PWRX/PPC)\n" msgstr "" -#: config/tc-ppc.c:1087 +#: config/tc-ppc.c:1105 +#, c-format msgid "" "-maltivec\t\tgenerate code for AltiVec\n" "-me500, -me500x2\tgenerate code for Motorola e500 core complex\n" @@ -7598,7 +7979,8 @@ msgid "" "-mno-regnames\t\tDo not allow symbolic names for registers\n" msgstr "" -#: config/tc-ppc.c:1094 +#: config/tc-ppc.c:1112 +#, c-format msgid "" "-mrelocatable\t\tsupport for GCC's -mrelocatble option\n" "-mrelocatable-lib\tsupport for GCC's -mrelocatble-lib option\n" @@ -7613,221 +7995,244 @@ msgid "" "-Qy, -Qn\t\tignored\n" msgstr "" -#: config/tc-ppc.c:1136 +#: config/tc-ppc.c:1154 #, c-format msgid "Unknown default cpu = %s, os = %s" msgstr "" -#: config/tc-ppc.c:1161 +#: config/tc-ppc.c:1179 msgid "Neither Power nor PowerPC opcodes were selected." msgstr "" -#: config/tc-ppc.c:1257 config/tc-s390.c:516 +#: config/tc-ppc.c:1269 config/tc-s390.c:516 #, c-format msgid "Internal assembler error for instruction %s" msgstr "" -#: config/tc-ppc.c:1277 +#: config/tc-ppc.c:1293 #, c-format msgid "Internal assembler error for macro %s" msgstr "" -#: config/tc-ppc.c:1599 +#: config/tc-ppc.c:1635 msgid "identifier+constant@got means identifier@got+constant" msgstr "" -#: config/tc-ppc.c:1666 +#: config/tc-ppc.c:1702 #, c-format msgid "%s relocations do not fit in %d bytes\n" msgstr "" -#: config/tc-ppc.c:1773 +#: config/tc-ppc.c:1809 #, c-format msgid "Length of .lcomm \"%s\" is already %ld. Not changed to %ld." msgstr "" -#: config/tc-ppc.c:1855 +#: config/tc-ppc.c:1891 msgid "Relocation cannot be done when using -mrelocatable" msgstr "" -#: config/tc-ppc.c:1981 +#: config/tc-ppc.c:2017 #, c-format msgid "syntax error: invalid toc specifier `%s'" msgstr "" -#: config/tc-ppc.c:1995 +#: config/tc-ppc.c:2031 #, c-format msgid "syntax error: expected `]', found `%c'" msgstr "" -#: config/tc-ppc.c:2272 +#: config/tc-ppc.c:2309 msgid "[tocv] symbol is not a toc symbol" msgstr "" -#: config/tc-ppc.c:2283 +#: config/tc-ppc.c:2320 msgid "Unimplemented toc32 expression modifier" msgstr "" -#: config/tc-ppc.c:2288 +#: config/tc-ppc.c:2325 msgid "Unimplemented toc64 expression modifier" msgstr "" -#: config/tc-ppc.c:2292 +#: config/tc-ppc.c:2329 #, c-format msgid "Unexpected return value [%d] from parse_toc_entry!\n" msgstr "" -#: config/tc-ppc.c:2510 +#: config/tc-ppc.c:2547 msgid "unsupported relocation for DS offset field" msgstr "" -#: config/tc-ppc.c:2554 +#: config/tc-ppc.c:2591 #, c-format msgid "syntax error; found `%c' but expected `%c'" msgstr "" -#: config/tc-ppc.c:2703 +#: config/tc-ppc.c:2740 msgid "wrong number of operands" msgstr "" -#: config/tc-ppc.c:2759 +#: config/tc-ppc.c:2796 msgid "Bad .section directive: want a,e,w,x,M,S,G,T in string" msgstr "" -#: config/tc-ppc.c:2874 +#: config/tc-ppc.c:2911 msgid "missing size" msgstr "" -#: config/tc-ppc.c:2883 +#: config/tc-ppc.c:2920 msgid "negative size" msgstr "" -#: config/tc-ppc.c:2920 +#: config/tc-ppc.c:2957 msgid "missing real symbol name" msgstr "" -#: config/tc-ppc.c:2941 +#: config/tc-ppc.c:2978 msgid "attempt to redefine symbol" msgstr "" -#: config/tc-ppc.c:3188 +#: config/tc-ppc.c:3225 msgid "The XCOFF file format does not support arbitrary sections" msgstr "" -#: config/tc-ppc.c:3265 +#: config/tc-ppc.c:3302 msgid "missing rename string" msgstr "" -#: config/tc-ppc.c:3296 config/tc-ppc.c:3851 read.c:3060 +#: config/tc-ppc.c:3333 config/tc-ppc.c:3888 read.c:2932 msgid "missing value" msgstr "" -#: config/tc-ppc.c:3314 +#: config/tc-ppc.c:3351 msgid "illegal .stabx expression; zero assumed" msgstr "" -#: config/tc-ppc.c:3346 +#: config/tc-ppc.c:3383 msgid "missing class" msgstr "" -#: config/tc-ppc.c:3355 +#: config/tc-ppc.c:3392 msgid "missing type" msgstr "" -#: config/tc-ppc.c:3436 +#: config/tc-ppc.c:3473 msgid "missing symbol name" msgstr "" -#: config/tc-ppc.c:3630 +#: config/tc-ppc.c:3667 msgid "nested .bs blocks" msgstr "" -#: config/tc-ppc.c:3663 +#: config/tc-ppc.c:3700 msgid ".es without preceding .bs" msgstr "" -#: config/tc-ppc.c:3843 +#: config/tc-ppc.c:3880 msgid "non-constant byte count" msgstr "" -#: config/tc-ppc.c:3891 +#: config/tc-ppc.c:3928 msgid ".tc not in .toc section" msgstr "" -#: config/tc-ppc.c:3910 +#: config/tc-ppc.c:3947 msgid ".tc with no label" msgstr "" -#: config/tc-ppc.c:4021 +#: config/tc-ppc.c:4039 +msgid ".machine stack overflow" +msgstr "" + +#: config/tc-ppc.c:4046 +msgid ".machine stack underflow" +msgstr "" + +#: config/tc-ppc.c:4053 +#, c-format +msgid "invalid machine `%s'" +msgstr "" + +#: config/tc-ppc.c:4107 msgid "No previous section to return to. Directive ignored." msgstr "" #. Section Contents #. unknown -#: config/tc-ppc.c:4438 +#: config/tc-ppc.c:4524 msgid "Unsupported section attribute -- 'a'" msgstr "" -#: config/tc-ppc.c:4627 +#: config/tc-ppc.c:4713 msgid "bad symbol suffix" msgstr "" -#: config/tc-ppc.c:4720 +#: config/tc-ppc.c:4806 msgid "Unrecognized symbol suffix" msgstr "" -#: config/tc-ppc.c:4806 +#: config/tc-ppc.c:4892 msgid "two .function pseudo-ops with no intervening .ef" msgstr "" -#: config/tc-ppc.c:4819 +#: config/tc-ppc.c:4905 msgid ".ef with no preceding .function" msgstr "" -#: config/tc-ppc.c:4947 +#: config/tc-ppc.c:5033 #, c-format msgid "warning: symbol %s has no csect" msgstr "" -#: config/tc-ppc.c:5251 +#: config/tc-ppc.c:5337 msgid "symbol in .toc does not match any .tc" msgstr "" -#: config/tc-ppc.c:5584 config/tc-s390.c:2072 config/tc-v850.c:2401 +#: config/tc-ppc.c:5670 config/tc-s390.c:2078 config/tc-v850.c:2418 #: config/tc-xstormy16.c:537 msgid "unresolved expression that must be resolved" msgstr "" -#: config/tc-ppc.c:5587 +#: config/tc-ppc.c:5673 #, c-format msgid "unsupported relocation against %s" msgstr "" -#: config/tc-ppc.c:5662 +#: config/tc-ppc.c:5748 #, c-format msgid "cannot emit PC relative %s relocation against %s" msgstr "" -#: config/tc-ppc.c:5667 +#: config/tc-ppc.c:5753 #, c-format msgid "cannot emit PC relative %s relocation" msgstr "" -#: config/tc-ppc.c:5841 +#: config/tc-ppc.c:5906 +#, c-format +msgid "Unable to handle reference to symbol %s" +msgstr "" + +#: config/tc-ppc.c:5909 +msgid "Unable to resolve expression" +msgstr "" + +#: config/tc-ppc.c:5936 msgid "must branch to an address a multiple of 4" msgstr "" -#: config/tc-ppc.c:5845 +#: config/tc-ppc.c:5940 #, c-format msgid "@local or @plt branch destination is too far away, %ld bytes" msgstr "" -#: config/tc-ppc.c:5876 +#: config/tc-ppc.c:5971 #, c-format msgid "Gas failure, reloc value %d\n" msgstr "" #: config/tc-s390.c:457 +#, c-format msgid "" " S390 options:\n" " -mregnames Allow symbolic names for registers\n" @@ -7838,6 +8243,7 @@ msgid "" msgstr "" #: config/tc-s390.c:464 +#, c-format msgid "" " -V print assembler version number\n" " -Qy, -Qn ignored\n" @@ -7865,7 +8271,7 @@ msgstr "" msgid "Big number is too big" msgstr "" -#: config/tc-s390.c:1144 config/tc-s390.c:1722 +#: config/tc-s390.c:1144 config/tc-s390.c:1728 #, c-format msgid "%s relocations do not fit in %d bytes" msgstr "" @@ -7894,7 +8300,7 @@ msgstr "" msgid "syntax error; ')' not allowed here" msgstr "" -#: config/tc-s390.c:1602 config/tc-s390.c:1622 config/tc-s390.c:1635 +#: config/tc-s390.c:1602 config/tc-s390.c:1628 config/tc-s390.c:1641 msgid "Invalid .insn format\n" msgstr "" @@ -7903,366 +8309,407 @@ msgstr "" msgid "Unrecognized opcode format: `%s'" msgstr "" -#: config/tc-s390.c:1638 +#: config/tc-s390.c:1644 msgid "second operand of .insn not a constant\n" msgstr "" -#: config/tc-s390.c:1641 +#: config/tc-s390.c:1647 msgid "missing comma after insn constant\n" msgstr "" -#: config/tc-s390.c:2075 +#: config/tc-s390.c:2081 msgid "unsupported relocation type" msgstr "" -#: config/tc-sh64.c:596 +#: config/tc-sh64.c:568 msgid "This operand must be constant at assembly time" msgstr "" -#: config/tc-sh64.c:711 +#: config/tc-sh64.c:681 msgid "Invalid operand expression" msgstr "" -#: config/tc-sh64.c:798 config/tc-sh64.c:904 +#: config/tc-sh64.c:768 config/tc-sh64.c:872 msgid "PTB operand is a SHmedia symbol" msgstr "" -#: config/tc-sh64.c:801 config/tc-sh64.c:901 +#: config/tc-sh64.c:771 config/tc-sh64.c:869 msgid "PTA operand is a SHcompact symbol" msgstr "" -#: config/tc-sh64.c:817 +#: config/tc-sh64.c:787 msgid "invalid expression in operand" msgstr "" -#: config/tc-sh64.c:1514 +#: config/tc-sh64.c:1478 #, c-format msgid "invalid operand, not a 5-bit unsigned value: %d" msgstr "" -#: config/tc-sh64.c:1519 +#: config/tc-sh64.c:1483 #, c-format msgid "invalid operand, not a 6-bit signed value: %d" msgstr "" -#: config/tc-sh64.c:1524 +#: config/tc-sh64.c:1488 #, c-format msgid "invalid operand, not a 6-bit unsigned value: %d" msgstr "" -#: config/tc-sh64.c:1529 config/tc-sh64.c:1541 +#: config/tc-sh64.c:1493 config/tc-sh64.c:1505 #, c-format msgid "invalid operand, not a 11-bit signed value: %d" msgstr "" -#: config/tc-sh64.c:1531 +#: config/tc-sh64.c:1495 #, c-format msgid "invalid operand, not a multiple of 32: %d" msgstr "" -#: config/tc-sh64.c:1536 +#: config/tc-sh64.c:1500 #, c-format msgid "invalid operand, not a 10-bit signed value: %d" msgstr "" -#: config/tc-sh64.c:1543 +#: config/tc-sh64.c:1507 #, c-format msgid "invalid operand, not an even value: %d" msgstr "" -#: config/tc-sh64.c:1548 +#: config/tc-sh64.c:1512 #, c-format msgid "invalid operand, not a 12-bit signed value: %d" msgstr "" -#: config/tc-sh64.c:1550 +#: config/tc-sh64.c:1514 #, c-format msgid "invalid operand, not a multiple of 4: %d" msgstr "" -#: config/tc-sh64.c:1555 +#: config/tc-sh64.c:1519 #, c-format msgid "invalid operand, not a 13-bit signed value: %d" msgstr "" -#: config/tc-sh64.c:1557 +#: config/tc-sh64.c:1521 #, c-format msgid "invalid operand, not a multiple of 8: %d" msgstr "" -#: config/tc-sh64.c:1562 +#: config/tc-sh64.c:1526 #, c-format msgid "invalid operand, not a 16-bit signed value: %d" msgstr "" -#: config/tc-sh64.c:1567 +#: config/tc-sh64.c:1531 #, c-format msgid "invalid operand, not an 16-bit unsigned value: %d" msgstr "" -#: config/tc-sh64.c:1573 +#: config/tc-sh64.c:1537 msgid "operand out of range for PT, PTA and PTB" msgstr "" -#: config/tc-sh64.c:1575 +#: config/tc-sh64.c:1539 #, c-format msgid "operand not a multiple of 4 for PT, PTA or PTB: %d" msgstr "" -#: config/tc-sh64.c:2103 +#: config/tc-sh64.c:2059 #, c-format msgid "MOVI operand is not a 32-bit signed value: 0x%8x%08x" msgstr "" -#: config/tc-sh64.c:2466 config/tc-sh64.c:2631 config/tc-sh64.c:2646 +#: config/tc-sh64.c:2416 config/tc-sh64.c:2579 config/tc-sh64.c:2594 msgid "invalid PIC reference" msgstr "" -#: config/tc-sh64.c:2524 +#: config/tc-sh64.c:2473 msgid "can't find opcode" msgstr "" -#: config/tc-sh64.c:2854 +#: config/tc-sh64.c:2801 #, c-format msgid "invalid operands to %s" msgstr "" -#: config/tc-sh64.c:2860 +#: config/tc-sh64.c:2807 #, c-format msgid "excess operands to %s" msgstr "" -#: config/tc-sh64.c:2906 +#: config/tc-sh64.c:2852 #, c-format msgid "The `.mode %s' directive is not valid with this architecture" msgstr "" -#: config/tc-sh64.c:2914 +#: config/tc-sh64.c:2860 #, c-format msgid "Invalid argument to .mode: %s" msgstr "" -#: config/tc-sh64.c:2945 +#: config/tc-sh64.c:2890 #, c-format msgid "The `.abi %s' directive is not valid with this architecture" msgstr "" -#: config/tc-sh64.c:2951 +#: config/tc-sh64.c:2896 msgid "`.abi 64' but command-line options do not specify 64-bit ABI" msgstr "" -#: config/tc-sh64.c:2956 +#: config/tc-sh64.c:2901 msgid "`.abi 32' but command-line options do not specify 32-bit ABI" msgstr "" -#: config/tc-sh64.c:2959 +#: config/tc-sh64.c:2904 #, c-format msgid "Invalid argument to .abi: %s" msgstr "" -#: config/tc-sh64.c:3014 +#: config/tc-sh64.c:2959 msgid "-no-mix is invalid without specifying SHcompact or SHmedia" msgstr "" -#: config/tc-sh64.c:3019 +#: config/tc-sh64.c:2964 msgid "-shcompact-const-crange is invalid without SHcompact" msgstr "" -#: config/tc-sh64.c:3022 +#: config/tc-sh64.c:2967 msgid "-expand-pt32 only valid with -abi=64" msgstr "" -#: config/tc-sh64.c:3025 +#: config/tc-sh64.c:2970 msgid "-no-expand only valid with SHcompact or SHmedia" msgstr "" -#: config/tc-sh64.c:3028 +#: config/tc-sh64.c:2973 msgid "-expand-pt32 invalid together with -no-expand" msgstr "" -#: config/tc-sh64.c:3250 +#: config/tc-sh64.c:3190 msgid "" "SHmedia code not allowed in same section as constants and SHcompact code" msgstr "" -#: config/tc-sh64.c:3268 +#: config/tc-sh64.c:3208 msgid "No segment info for current section" msgstr "" -#: config/tc-sh64.c:3310 +#: config/tc-sh64.c:3246 msgid "duplicate datalabel operator ignored" msgstr "" -#: config/tc-sh64.c:3380 +#: config/tc-sh64.c:3316 msgid "Invalid DataLabel expression" msgstr "" -#: config/tc-sh.c:91 +#: config/tc-sh.c:65 msgid "directive .big encountered when option -big required" msgstr "" -#: config/tc-sh.c:102 +#: config/tc-sh.c:75 msgid "directive .little encountered when option -little required" msgstr "" -#: config/tc-sh.c:776 +#: config/tc-sh.c:743 msgid "Invalid PIC expression." msgstr "" -#: config/tc-sh.c:1269 +#: config/tc-sh.c:1235 msgid "misplaced PIC operand" msgstr "" -#: config/tc-sh.c:1310 +#: config/tc-sh.c:1274 msgid "illegal register after @-" msgstr "" -#: config/tc-sh.c:1326 +#: config/tc-sh.c:1290 msgid "must be @(r0,...)" msgstr "" -#: config/tc-sh.c:1350 +#: config/tc-sh.c:1314 msgid "syntax error in @(r0,...)" msgstr "" -#: config/tc-sh.c:1355 +#: config/tc-sh.c:1319 msgid "syntax error in @(r0...)" msgstr "" -#: config/tc-sh.c:1396 +#: config/tc-sh.c:1360 msgid "Deprecated syntax." msgstr "" -#: config/tc-sh.c:1408 config/tc-sh.c:1413 +#: config/tc-sh.c:1372 config/tc-sh.c:1377 msgid "syntax error in @(disp,[Rn, gbr, pc])" msgstr "" -#: config/tc-sh.c:1418 +#: config/tc-sh.c:1382 msgid "expecting )" msgstr "" -#: config/tc-sh.c:1426 +#: config/tc-sh.c:1390 msgid "illegal register after @" msgstr "" -#: config/tc-sh.c:1977 +#: config/tc-sh.c:2154 #, c-format msgid "Invalid register: 'r%d'" msgstr "" -#: config/tc-sh.c:2143 +#: config/tc-sh.c:2321 msgid "insn can't be combined with parallel processing insn" msgstr "" -#: config/tc-sh.c:2150 config/tc-sh.c:2161 +#: config/tc-sh.c:2328 config/tc-sh.c:2339 config/tc-sh.c:2371 msgid "multiple movx specifications" msgstr "" -#: config/tc-sh.c:2155 config/tc-sh.c:2182 +#: config/tc-sh.c:2333 config/tc-sh.c:2355 config/tc-sh.c:2394 msgid "multiple movy specifications" msgstr "" -#: config/tc-sh.c:2163 +#: config/tc-sh.c:2342 config/tc-sh.c:2375 msgid "invalid movx address register" msgstr "" -#: config/tc-sh.c:2169 config/tc-sh.c:2174 +#: config/tc-sh.c:2344 +msgid "insn cannot be combined with non-nopy" +msgstr "" + +#: config/tc-sh.c:2358 config/tc-sh.c:2414 +msgid "invalid movy address register" +msgstr "" + +#: config/tc-sh.c:2360 +msgid "insn cannot be combined with non-nopx" +msgstr "" + +#: config/tc-sh.c:2373 +msgid "previous movy requires nopx" +msgstr "" + +#: config/tc-sh.c:2381 config/tc-sh.c:2386 msgid "invalid movx dsp register" msgstr "" -#: config/tc-sh.c:2191 config/tc-sh.c:2196 -msgid "invalid movy dsp register" +#: config/tc-sh.c:2396 +msgid "previous movx requires nopy" msgstr "" -#: config/tc-sh.c:2200 -msgid "invalid movy address register" +#: config/tc-sh.c:2405 config/tc-sh.c:2410 +msgid "invalid movy dsp register" msgstr "" -#: config/tc-sh.c:2206 +#: config/tc-sh.c:2420 msgid "dsp immediate shift value not constant" msgstr "" -#: config/tc-sh.c:2213 config/tc-sh.c:2226 +#: config/tc-sh.c:2434 config/tc-sh.c:2460 msgid "multiple parallel processing specifications" msgstr "" -#: config/tc-sh.c:2219 +#: config/tc-sh.c:2453 msgid "multiple condition specifications" msgstr "" -#: config/tc-sh.c:2235 +#: config/tc-sh.c:2491 msgid "insn cannot be combined with pmuls" msgstr "" -#: config/tc-sh.c:2252 -msgid "bad padd / psub pmuls output operand" +#: config/tc-sh.c:2507 +msgid "bad combined pmuls output operand" msgstr "" -#: config/tc-sh.c:2262 +#: config/tc-sh.c:2517 msgid "destination register is same for parallel insns" msgstr "" -#: config/tc-sh.c:2271 +#: config/tc-sh.c:2526 msgid "condition not followed by conditionalizable insn" msgstr "" -#: config/tc-sh.c:2281 +#: config/tc-sh.c:2536 msgid "unrecognized characters at end of parallel processing insn" msgstr "" -#: config/tc-sh.c:2417 +#: config/tc-sh.c:2651 +msgid "opcode not valid for this cpu variant" +msgstr "" + +#: config/tc-sh.c:2684 +msgid "Delayed branches not available on SH1" +msgstr "" + +#: config/tc-sh.c:2716 #, c-format msgid "excess operands: '%s'" msgstr "" -#: config/tc-sh.c:2569 +#: config/tc-sh.c:2861 msgid ".uses pseudo-op seen when not relaxing" msgstr "" -#: config/tc-sh.c:2575 +#: config/tc-sh.c:2867 msgid "bad .uses format" msgstr "" -#: config/tc-sh.c:2654 +#: config/tc-sh.c:2954 msgid "Invalid combination: --isa=SHcompact with --isa=SHmedia" msgstr "" -#: config/tc-sh.c:2660 +#: config/tc-sh.c:2960 msgid "Invalid combination: --isa=SHmedia with --isa=SHcompact" msgstr "" -#: config/tc-sh.c:2662 +#: config/tc-sh.c:2962 msgid "Invalid combination: --abi=64 with --isa=SHcompact" msgstr "" -#: config/tc-sh.c:2675 +#: config/tc-sh.c:2975 msgid "Invalid combination: --abi=32 with --abi=64" msgstr "" -#: config/tc-sh.c:2681 +#: config/tc-sh.c:2981 msgid "Invalid combination: --abi=64 with --abi=32" msgstr "" -#: config/tc-sh.c:2683 +#: config/tc-sh.c:2983 msgid "Invalid combination: --isa=SHcompact with --abi=64" msgstr "" -#: config/tc-sh.c:2718 +#: config/tc-sh.c:3017 +#, c-format msgid "" "SH options:\n" "-little\t\t\tgenerate little endian code\n" "-big\t\t\tgenerate big endian code\n" "-relax\t\t\talter jump instructions for long displacements\n" "-small\t\t\talign sections to 4 byte boundaries, not 16\n" -"-dsp\t\t\tenable sh-dsp insns, and disable sh2e/sh3e/sh4 insns.\n" +"-dsp\t\t\tenable sh-dsp insns, and disable floating-point ISAs.\n" +"-isa=[sh4\n" +" | sh4-nofpu\t\tsh4 with fpu disabled\n" +" | sh4-nommu-nofpu sh4 with no MMU or FPU\n" +" | sh4a\n" +"\\ " +msgstr "" + +#: config/tc-sh.c:3030 +#, c-format +msgid "));" +msgstr "" + +#: config/tc-sh.c:3032 +#, c-format +msgid "" +"-isa=[shmedia\t\tset as the default instruction set for SH64\n" +" | SHmedia\n" +" | shcompact\n" +" | SHcompact]\n" msgstr "" -#: config/tc-sh.c:2726 +#: config/tc-sh.c:3037 +#, c-format msgid "" -"-isa=[shmedia\t\tset default instruction set for SH64\n" -" | SHmedia\n" -" | shcompact\n" -" | SHcompact]\n" "-abi=[32|64]\t\tset size of expanded SHmedia operands and object\n" "\t\t\tfile type\n" "-shcompact-const-crange\temit code-range descriptors for constants in\n" @@ -8271,95 +8718,93 @@ msgid "" "\t\t\tconstants and SHcompact code\n" "-no-expand\t\tdo not expand MOVI, PT, PTA or PTB instructions\n" "-expand-pt32\t\twith -abi=64, expand PT, PTA and PTB instructions\n" -"\t\t\tto 32 bits only" +"\t\t\tto 32 bits only\n" msgstr "" -#: config/tc-sh.c:2823 +#: config/tc-sh.c:3125 msgid ".uses does not refer to a local symbol in the same section" msgstr "" -#: config/tc-sh.c:2842 +#: config/tc-sh.c:3144 msgid "can't find fixup pointed to by .uses" msgstr "" -#: config/tc-sh.c:2865 +#: config/tc-sh.c:3167 msgid ".uses target does not refer to a local symbol in the same section" msgstr "" -#: config/tc-sh.c:2967 +#: config/tc-sh.c:3267 msgid "displacement overflows 12-bit field" msgstr "" -#: config/tc-sh.c:2970 +#: config/tc-sh.c:3270 #, c-format msgid "displacement to defined symbol %s overflows 12-bit field" msgstr "" -#: config/tc-sh.c:2974 +#: config/tc-sh.c:3274 #, c-format msgid "displacement to undefined symbol %s overflows 12-bit field" msgstr "" -#: config/tc-sh.c:3052 +#: config/tc-sh.c:3352 msgid "displacement overflows 8-bit field" msgstr "" -#: config/tc-sh.c:3055 +#: config/tc-sh.c:3355 #, c-format msgid "displacement to defined symbol %s overflows 8-bit field" msgstr "" -#: config/tc-sh.c:3059 +#: config/tc-sh.c:3359 #, c-format msgid "displacement to undefined symbol %s overflows 8-bit field " msgstr "" -#: config/tc-sh.c:3076 +#: config/tc-sh.c:3376 #, c-format msgid "overflow in branch to %s; converted into longer instruction sequence" msgstr "" -#: config/tc-sh.c:3151 config/tc-sh.c:3199 config/tc-sparc.c:4192 -#: config/tc-sparc.c:4217 +#: config/tc-sh.c:3447 config/tc-sh.c:3494 config/tc-sparc.c:4203 +#: config/tc-sparc.c:4228 msgid "misaligned data" msgstr "" -#: config/tc-sh.c:3585 +#: config/tc-sh.c:3884 msgid "misaligned offset" msgstr "" -#: config/tc-sparc.c:287 +#: config/tc-sparc.c:291 msgid "Invalid default architecture, broken assembler." msgstr "" -#: config/tc-sparc.c:291 config/tc-sparc.c:494 +#: config/tc-sparc.c:295 config/tc-sparc.c:498 msgid "Bad opcode table, broken assembler." msgstr "" -#: config/tc-sparc.c:486 +#: config/tc-sparc.c:490 #, c-format msgid "invalid architecture -xarch=%s" msgstr "" -#: config/tc-sparc.c:488 +#: config/tc-sparc.c:492 #, c-format msgid "invalid architecture -A%s" msgstr "" -#: config/tc-sparc.c:555 +#: config/tc-sparc.c:559 #, c-format msgid "No compiled in support for %d bit object file format" msgstr "" -#: config/tc-sparc.c:592 -msgid "Unrecognized option following -K" -msgstr "" - -#: config/tc-sparc.c:633 +#: config/tc-sparc.c:637 +#, c-format msgid "SPARC options:\n" msgstr "" -#: config/tc-sparc.c:662 +#: config/tc-sparc.c:666 +#, c-format msgid "" "\n" "\t\t\tspecify variant of SPARC architecture\n" @@ -8370,34 +8815,38 @@ msgid "" "-no-relax\t\tavoid changing any jumps and branches\n" msgstr "" -#: config/tc-sparc.c:670 +#: config/tc-sparc.c:674 +#, c-format msgid "-k\t\t\tgenerate PIC\n" msgstr "" -#: config/tc-sparc.c:674 +#: config/tc-sparc.c:678 +#, c-format msgid "" "-32\t\t\tcreate 32 bit object file\n" "-64\t\t\tcreate 64 bit object file\n" msgstr "" -#: config/tc-sparc.c:677 +#: config/tc-sparc.c:681 #, c-format msgid "\t\t\t[default is %d]\n" msgstr "" -#: config/tc-sparc.c:679 +#: config/tc-sparc.c:683 +#, c-format msgid "" "-TSO\t\t\tuse Total Store Ordering\n" "-PSO\t\t\tuse Partial Store Ordering\n" "-RMO\t\t\tuse Relaxed Memory Ordering\n" msgstr "" -#: config/tc-sparc.c:683 +#: config/tc-sparc.c:687 #, c-format msgid "\t\t\t[default is %s]\n" msgstr "" -#: config/tc-sparc.c:685 +#: config/tc-sparc.c:689 +#, c-format msgid "" "-KPIC\t\t\tgenerate PIC\n" "-V\t\t\tprint assembler version number\n" @@ -8410,7 +8859,8 @@ msgid "" "-s\t\t\tignored\n" msgstr "" -#: config/tc-sparc.c:697 +#: config/tc-sparc.c:701 +#, c-format msgid "" "-EL\t\t\tgenerate code for a little endian machine\n" "-EB\t\t\tgenerate code for a big endian machine\n" @@ -8418,302 +8868,297 @@ msgid "" " instructions and little endian data.\n" msgstr "" -#: config/tc-sparc.c:817 +#: config/tc-sparc.c:822 #, c-format msgid "Internal error: losing opcode: `%s' \"%s\"\n" msgstr "" -#: config/tc-sparc.c:836 +#: config/tc-sparc.c:841 #, c-format msgid "Internal error: can't find opcode `%s' for `%s'\n" msgstr "" -#: config/tc-sparc.c:982 +#: config/tc-sparc.c:987 msgid "Support for 64-bit arithmetic not compiled in." msgstr "" -#: config/tc-sparc.c:1029 +#: config/tc-sparc.c:1034 msgid "set: number not in 0..4294967295 range" msgstr "" -#: config/tc-sparc.c:1036 +#: config/tc-sparc.c:1041 msgid "set: number not in -2147483648..4294967295 range" msgstr "" -#: config/tc-sparc.c:1096 +#: config/tc-sparc.c:1101 msgid "setsw: number not in -2147483648..4294967295 range" msgstr "" -#: config/tc-sparc.c:1145 +#: config/tc-sparc.c:1150 msgid "setx: temporary register same as destination register" msgstr "" -#: config/tc-sparc.c:1216 +#: config/tc-sparc.c:1221 msgid "setx: illegal temporary register g0" msgstr "" -#: config/tc-sparc.c:1313 +#: config/tc-sparc.c:1318 msgid "FP branch in delay slot" msgstr "" -#: config/tc-sparc.c:1329 +#: config/tc-sparc.c:1334 msgid "FP branch preceded by FP instruction; NOP inserted" msgstr "" -#: config/tc-sparc.c:1369 +#: config/tc-sparc.c:1374 msgid "failed special case insn sanity check" msgstr "" -#: config/tc-sparc.c:1457 +#: config/tc-sparc.c:1462 msgid ": invalid membar mask name" msgstr "" -#: config/tc-sparc.c:1473 +#: config/tc-sparc.c:1478 msgid ": invalid membar mask expression" msgstr "" -#: config/tc-sparc.c:1478 +#: config/tc-sparc.c:1483 msgid ": invalid membar mask number" msgstr "" -#: config/tc-sparc.c:1493 +#: config/tc-sparc.c:1498 msgid ": invalid siam mode expression" msgstr "" -#: config/tc-sparc.c:1498 +#: config/tc-sparc.c:1503 msgid ": invalid siam mode number" msgstr "" -#: config/tc-sparc.c:1514 +#: config/tc-sparc.c:1519 msgid ": invalid prefetch function name" msgstr "" -#: config/tc-sparc.c:1522 +#: config/tc-sparc.c:1527 msgid ": invalid prefetch function expression" msgstr "" -#: config/tc-sparc.c:1527 +#: config/tc-sparc.c:1532 msgid ": invalid prefetch function number" msgstr "" -#: config/tc-sparc.c:1555 config/tc-sparc.c:1567 +#: config/tc-sparc.c:1560 config/tc-sparc.c:1572 msgid ": unrecognizable privileged register" msgstr "" -#: config/tc-sparc.c:1591 config/tc-sparc.c:1616 +#: config/tc-sparc.c:1596 config/tc-sparc.c:1621 msgid ": unrecognizable v9a or v9b ancillary state register" msgstr "" -#: config/tc-sparc.c:1596 +#: config/tc-sparc.c:1601 msgid ": rd on write only ancillary state register" msgstr "" #. %sys_tick and %sys_tick_cmpr are v9bnotv9a -#: config/tc-sparc.c:1604 +#: config/tc-sparc.c:1609 msgid ": unrecognizable v9a ancillary state register" msgstr "" -#: config/tc-sparc.c:1640 +#: config/tc-sparc.c:1645 msgid ": asr number must be between 16 and 31" msgstr "" -#: config/tc-sparc.c:1648 +#: config/tc-sparc.c:1653 msgid ": asr number must be between 0 and 31" msgstr "" -#: config/tc-sparc.c:1658 +#: config/tc-sparc.c:1663 +#, c-format msgid ": expecting %asrN" msgstr "" -#: config/tc-sparc.c:1840 config/tc-sparc.c:1878 config/tc-sparc.c:2279 -#: config/tc-sparc.c:2315 +#: config/tc-sparc.c:1845 config/tc-sparc.c:1883 config/tc-sparc.c:2290 +#: config/tc-sparc.c:2326 #, c-format msgid "Illegal operands: %%%s requires arguments in ()" msgstr "" -#: config/tc-sparc.c:1846 +#: config/tc-sparc.c:1851 #, c-format msgid "" "Illegal operands: %%%s cannot be used together with other relocs in the insn " "()" msgstr "" -#: config/tc-sparc.c:1857 +#: config/tc-sparc.c:1862 #, c-format msgid "Illegal operands: %%%s can be only used with call __tls_get_addr" msgstr "" -#: config/tc-sparc.c:2064 +#: config/tc-sparc.c:2069 msgid "detected global register use not covered by .register pseudo-op" msgstr "" -#: config/tc-sparc.c:2135 +#: config/tc-sparc.c:2140 msgid ": There are only 64 f registers; [0-63]" msgstr "" -#: config/tc-sparc.c:2137 config/tc-sparc.c:2149 +#: config/tc-sparc.c:2142 config/tc-sparc.c:2160 msgid ": There are only 32 f registers; [0-31]" msgstr "" -#: config/tc-sparc.c:2327 +#: config/tc-sparc.c:2152 +msgid ": There are only 32 single precision f registers; [0-31]" +msgstr "" + +#: config/tc-sparc.c:2338 #, c-format msgid "" "Illegal operands: Can't do arithmetics other than + and - involving %%%s()" msgstr "" -#: config/tc-sparc.c:2437 +#: config/tc-sparc.c:2448 #, c-format msgid "Illegal operands: Can't add non-constant expression to %%%s()" msgstr "" -#: config/tc-sparc.c:2447 +#: config/tc-sparc.c:2458 #, c-format msgid "" "Illegal operands: Can't do arithmetics involving %%%s() of a relocatable " "symbol" msgstr "" -#: config/tc-sparc.c:2465 +#: config/tc-sparc.c:2476 msgid ": PC-relative operand can't be a constant" msgstr "" -#: config/tc-sparc.c:2472 +#: config/tc-sparc.c:2483 msgid ": TLS operand can't be a constant" msgstr "" -#: config/tc-sparc.c:2505 +#: config/tc-sparc.c:2516 msgid ": invalid ASI name" msgstr "" -#: config/tc-sparc.c:2513 +#: config/tc-sparc.c:2524 msgid ": invalid ASI expression" msgstr "" -#: config/tc-sparc.c:2518 +#: config/tc-sparc.c:2529 msgid ": invalid ASI number" msgstr "" -#: config/tc-sparc.c:2615 +#: config/tc-sparc.c:2626 msgid "OPF immediate operand out of range (0-0x1ff)" msgstr "" -#: config/tc-sparc.c:2620 +#: config/tc-sparc.c:2631 msgid "non-immediate OPF operand, ignored" msgstr "" -#: config/tc-sparc.c:2639 +#: config/tc-sparc.c:2650 msgid ": invalid cpreg name" msgstr "" -#: config/tc-sparc.c:2668 +#: config/tc-sparc.c:2679 #, c-format msgid "Illegal operands%s" msgstr "" -#: config/tc-sparc.c:2702 +#: config/tc-sparc.c:2713 #, c-format msgid "architecture bumped from \"%s\" to \"%s\" on \"%s\"" msgstr "" -#: config/tc-sparc.c:2738 +#: config/tc-sparc.c:2749 #, c-format msgid "Architecture mismatch on \"%s\"." msgstr "" -#: config/tc-sparc.c:2739 +#: config/tc-sparc.c:2750 #, c-format msgid " (Requires %s; requested architecture is %s.)" msgstr "" -#: config/tc-sparc.c:3325 +#: config/tc-sparc.c:3336 #, c-format msgid "bad or unhandled relocation type: 0x%02x" msgstr "" -#: config/tc-sparc.c:3480 -#, c-format -msgid "internal error: can't export reloc type %d (`%s')" -msgstr "" - -#: config/tc-sparc.c:3644 +#: config/tc-sparc.c:3655 #, c-format msgid "BSS length (%d.) <0! Ignored." msgstr "" -#: config/tc-sparc.c:3656 +#: config/tc-sparc.c:3667 msgid "bad .reserve segment -- expected BSS segment" msgstr "" -#: config/tc-sparc.c:3673 read.c:2048 +#: config/tc-sparc.c:3684 msgid "missing alignment" msgstr "" -#: config/tc-sparc.c:3684 config/tc-sparc.c:3835 +#: config/tc-sparc.c:3695 config/tc-sparc.c:3846 #, c-format msgid "alignment too large; assuming %d" msgstr "" -#: config/tc-sparc.c:3690 config/tc-sparc.c:3841 +#: config/tc-sparc.c:3701 config/tc-sparc.c:3852 msgid "negative alignment" msgstr "" -#: config/tc-sparc.c:3700 config/tc-sparc.c:3864 read.c:1251 read.c:2064 +#: config/tc-sparc.c:3711 config/tc-sparc.c:3875 read.c:1226 read.c:2012 msgid "alignment not a power of 2" msgstr "" -#: config/tc-sparc.c:3778 config/tc-v850.c:233 +#: config/tc-sparc.c:3789 config/tc-v850.c:233 msgid "Expected comma after symbol-name" msgstr "" -#: config/tc-sparc.c:3788 read.c:1392 +#: config/tc-sparc.c:3799 #, c-format msgid ".COMMon length (%lu) out of range ignored" msgstr "" -#: config/tc-sparc.c:3807 config/tc-v850.c:266 -#, c-format -msgid "Length of .comm \"%s\" is already %ld. Not changed to %d." -msgstr "" - -#: config/tc-sparc.c:3821 +#: config/tc-sparc.c:3832 msgid "Expected comma after common length" msgstr "" -#: config/tc-sparc.c:4062 config/tc-sparc.c:4072 +#: config/tc-sparc.c:4073 config/tc-sparc.c:4083 #, c-format msgid "register syntax is .register %%g[2367],{#scratch|symbolname|#ignore}" msgstr "" -#: config/tc-sparc.c:4090 +#: config/tc-sparc.c:4101 msgid "redefinition of global register" msgstr "" -#: config/tc-sparc.c:4101 +#: config/tc-sparc.c:4112 #, c-format msgid "Register symbol %s already defined." msgstr "" -#: config/tc-sparc.c:4310 +#: config/tc-sparc.c:4321 #, c-format msgid "Illegal operands: %%r_plt in %d-byte data field" msgstr "" -#: config/tc-sparc.c:4320 +#: config/tc-sparc.c:4331 #, c-format msgid "Illegal operands: %%r_tls_dtpoff in %d-byte data field" msgstr "" -#: config/tc-sparc.c:4357 +#: config/tc-sparc.c:4368 #, c-format msgid "Illegal operands: Only %%r_%s%d allowed in %d-byte data fields" msgstr "" -#: config/tc-sparc.c:4365 config/tc-sparc.c:4396 config/tc-sparc.c:4405 +#: config/tc-sparc.c:4376 config/tc-sparc.c:4407 config/tc-sparc.c:4416 #, c-format msgid "Illegal operands: %%r_%s%d requires arguments in ()" msgstr "" -#: config/tc-sparc.c:4414 +#: config/tc-sparc.c:4425 #, c-format msgid "Illegal operands: garbage after %%r_%s%d()" msgstr "" @@ -8730,29 +9175,30 @@ msgstr "" msgid "The -a option doesn't exist. (Despite what the man page says!" msgstr "" -#: config/tc-tahoe.c:407 config/tc-vax.c:3285 +#: config/tc-tahoe.c:407 config/tc-vax.c:3289 #, c-format msgid "Displacement length %s ignored!" msgstr "" -#: config/tc-tahoe.c:411 config/tc-vax.c:3277 +#: config/tc-tahoe.c:411 config/tc-vax.c:3281 msgid "SYMBOL TABLE not implemented" msgstr "" -#: config/tc-tahoe.c:415 config/tc-vax.c:3281 +#: config/tc-tahoe.c:415 config/tc-vax.c:3285 msgid "TOKEN TRACE not implemented" msgstr "" -#: config/tc-tahoe.c:419 config/tc-vax.c:3289 +#: config/tc-tahoe.c:419 config/tc-vax.c:3293 #, c-format msgid "I don't need or use temp. file \"%s\"." msgstr "" -#: config/tc-tahoe.c:423 config/tc-vax.c:3293 +#: config/tc-tahoe.c:423 config/tc-vax.c:3297 msgid "I don't use an interpass file! -V ignored" msgstr "" #: config/tc-tahoe.c:437 +#, c-format msgid "" "Tahoe options:\n" "-a\t\t\tignored\n" @@ -8955,26 +9401,32 @@ msgid "pseudo-op illegal within .struct/.union" msgstr "" #: config/tc-tic54x.c:349 +#, c-format msgid "C54x-specific command line options:\n" msgstr "" #: config/tc-tic54x.c:350 +#, c-format msgid "-mfar-mode | -mf Use extended addressing\n" msgstr "" #: config/tc-tic54x.c:351 +#, c-format msgid "-mcpu=<CPU version> Specify the CPU version\n" msgstr "" #: config/tc-tic54x.c:353 +#, c-format msgid "-mcoff-version={0|1|2} Select COFF version\n" msgstr "" #: config/tc-tic54x.c:355 +#, c-format msgid "-merrors-to-file <filename>\n" msgstr "" #: config/tc-tic54x.c:356 +#, c-format msgid "-me <filename> Redirect errors to a file\n" msgstr "" @@ -9487,157 +9939,174 @@ msgstr "" msgid ".COMMon length (%d.) < 0! Ignored." msgstr "" +#: config/tc-v850.c:266 +#, c-format +msgid "Length of .comm \"%s\" is already %ld. Not changed to %d." +msgstr "" + #: config/tc-v850.c:293 msgid "Common alignment negative; 0 assumed" msgstr "" -#: config/tc-v850.c:974 +#: config/tc-v850.c:976 #, c-format msgid "unknown operand shift: %x\n" msgstr "" -#: config/tc-v850.c:975 +#: config/tc-v850.c:977 msgid "internal failure in parse_register_list" msgstr "" -#: config/tc-v850.c:991 +#: config/tc-v850.c:993 msgid "constant expression or register list expected" msgstr "" -#: config/tc-v850.c:996 config/tc-v850.c:1009 config/tc-v850.c:1028 +#: config/tc-v850.c:998 config/tc-v850.c:1011 config/tc-v850.c:1030 msgid "high bits set in register list expression" msgstr "" -#: config/tc-v850.c:1067 config/tc-v850.c:1130 +#: config/tc-v850.c:1069 config/tc-v850.c:1132 msgid "illegal register included in list" msgstr "" -#: config/tc-v850.c:1073 +#: config/tc-v850.c:1075 msgid "system registers cannot be included in list" msgstr "" -#: config/tc-v850.c:1078 +#: config/tc-v850.c:1080 msgid "PSW cannot be included in list" msgstr "" -#: config/tc-v850.c:1085 +#: config/tc-v850.c:1087 msgid "High value system registers cannot be included in list" msgstr "" -#: config/tc-v850.c:1109 +#: config/tc-v850.c:1111 msgid "second register should follow dash in register list" msgstr "" -#: config/tc-v850.c:1154 +#: config/tc-v850.c:1156 +#, c-format msgid " V850 options:\n" msgstr "" -#: config/tc-v850.c:1155 +#: config/tc-v850.c:1157 +#, c-format msgid " -mwarn-signed-overflow Warn if signed immediate values overflow\n" msgstr "" -#: config/tc-v850.c:1156 +#: config/tc-v850.c:1158 +#, c-format msgid "" " -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n" msgstr "" -#: config/tc-v850.c:1157 +#: config/tc-v850.c:1159 +#, c-format msgid " -mv850 The code is targeted at the v850\n" msgstr "" -#: config/tc-v850.c:1158 +#: config/tc-v850.c:1160 +#, c-format msgid " -mv850e The code is targeted at the v850e\n" msgstr "" -#: config/tc-v850.c:1159 +#: config/tc-v850.c:1161 +#, c-format +msgid " -mv850e1 The code is targeted at the v850e1\n" +msgstr "" + +#: config/tc-v850.c:1162 +#, c-format msgid "" " -mv850any The code is generic, despite any processor " "specific instructions\n" msgstr "" -#: config/tc-v850.c:1160 +#: config/tc-v850.c:1163 +#, c-format msgid " -mrelax Enable relaxation\n" msgstr "" -#: config/tc-v850.c:1172 config/tc-v850.c:1207 +#: config/tc-v850.c:1175 config/tc-v850.c:1216 #, c-format msgid "unknown command line option: -%c%s\n" msgstr "" -#: config/tc-v850.c:1348 +#: config/tc-v850.c:1365 #, c-format msgid "Unable to determine default target processor from string: %s" msgstr "" -#: config/tc-v850.c:1385 +#: config/tc-v850.c:1402 msgid "ctoff() relocation used on an instruction which does not support it" msgstr "" -#: config/tc-v850.c:1411 +#: config/tc-v850.c:1428 msgid "sdaoff() relocation used on an instruction which does not support it" msgstr "" -#: config/tc-v850.c:1437 +#: config/tc-v850.c:1454 msgid "zdaoff() relocation used on an instruction which does not support it" msgstr "" -#: config/tc-v850.c:1474 +#: config/tc-v850.c:1491 msgid "tdaoff() relocation used on an instruction which does not support it" msgstr "" -#: config/tc-v850.c:1698 +#: config/tc-v850.c:1715 msgid "Target processor does not support this instruction." msgstr "" -#: config/tc-v850.c:1788 config/tc-v850.c:1817 config/tc-v850.c:2005 +#: config/tc-v850.c:1805 config/tc-v850.c:1834 config/tc-v850.c:2022 msgid "immediate operand is too large" msgstr "" -#: config/tc-v850.c:1799 +#: config/tc-v850.c:1816 msgid "AAARG -> unhandled constant reloc" msgstr "" -#: config/tc-v850.c:1843 +#: config/tc-v850.c:1860 msgid "invalid register name" msgstr "" -#: config/tc-v850.c:1848 +#: config/tc-v850.c:1865 msgid "register r0 cannot be used here" msgstr "" -#: config/tc-v850.c:1860 +#: config/tc-v850.c:1877 msgid "invalid system register name" msgstr "" -#: config/tc-v850.c:1873 +#: config/tc-v850.c:1890 msgid "expected EP register" msgstr "" -#: config/tc-v850.c:1890 +#: config/tc-v850.c:1907 msgid "invalid condition code name" msgstr "" -#: config/tc-v850.c:1911 config/tc-v850.c:1915 +#: config/tc-v850.c:1928 config/tc-v850.c:1932 msgid "constant too big to fit into instruction" msgstr "" -#: config/tc-v850.c:1968 +#: config/tc-v850.c:1985 msgid "syntax error: value is missing before the register name" msgstr "" -#: config/tc-v850.c:1970 +#: config/tc-v850.c:1987 msgid "syntax error: register not expected" msgstr "" -#: config/tc-v850.c:1984 +#: config/tc-v850.c:2001 msgid "syntax error: system register not expected" msgstr "" -#: config/tc-v850.c:1989 +#: config/tc-v850.c:2006 msgid "syntax error: condition code not expected" msgstr "" -#: config/tc-v850.c:2030 +#: config/tc-v850.c:2047 msgid "invalid operand" msgstr "" @@ -9818,7 +10287,8 @@ msgstr "" msgid "PC part of operand unpredictable" msgstr "" -#: config/tc-vax.c:3345 +#: config/tc-vax.c:3354 +#, c-format msgid "" "VAX options:\n" "-d LENGTH\t\tignored\n" @@ -9829,7 +10299,8 @@ msgid "" "-V\t\t\tignored\n" msgstr "" -#: config/tc-vax.c:3354 +#: config/tc-vax.c:3363 +#, c-format msgid "" "VMS options:\n" "-+\t\t\thash encode names longer than 31 characters\n" @@ -9849,6 +10320,7 @@ msgid "syntax error after <exp" msgstr "" #: config/tc-xstormy16.c:80 +#, c-format msgid " XSTORMY16 specific command line options:\n" msgstr "" @@ -9857,520 +10329,539 @@ msgstr "" msgid "internal error: can't install fix for reloc type %d (`%s')" msgstr "" -#: config/tc-xtensa.c:929 +#: config/tc-xtensa.c:928 msgid "'--density' option not supported in this Xtensa configuration" msgstr "" -#: config/tc-xtensa.c:1030 +#: config/tc-xtensa.c:1029 msgid "" "'--literal-section-name' is deprecated; use '--rename-section ." "literal=NEWNAME'" msgstr "" -#: config/tc-xtensa.c:1036 +#: config/tc-xtensa.c:1035 msgid "" "'--text-section-name' is deprecated; use '--rename-section .text=NEWNAME'" msgstr "" -#: config/tc-xtensa.c:1042 +#: config/tc-xtensa.c:1041 msgid "" "'--data-section-name' is deprecated; use '--rename-section .data=NEWNAME'" msgstr "" -#: config/tc-xtensa.c:1048 +#: config/tc-xtensa.c:1047 msgid "'--bss-section-name' is deprecated; use '--rename-section .bss=NEWNAME'" msgstr "" -#: config/tc-xtensa.c:1186 +#: config/tc-xtensa.c:1185 msgid "unmatched end directive" msgstr "" -#: config/tc-xtensa.c:1215 +#: config/tc-xtensa.c:1214 msgid ".begin directive with no matching .end directive" msgstr "" -#: config/tc-xtensa.c:1259 +#: config/tc-xtensa.c:1258 #, c-format msgid "directive %s can't be negated" msgstr "" -#: config/tc-xtensa.c:1265 +#: config/tc-xtensa.c:1264 msgid "unknown directive" msgstr "" -#: config/tc-xtensa.c:1300 +#: config/tc-xtensa.c:1308 msgid "cannot set literal_prefix inside literal fragment" msgstr "" -#: config/tc-xtensa.c:1337 config/tc-xtensa.c:1371 +#: config/tc-xtensa.c:1345 config/tc-xtensa.c:1381 msgid "Xtensa density option not supported; ignored" msgstr "" -#: config/tc-xtensa.c:1383 +#: config/tc-xtensa.c:1393 #, c-format msgid "does not match begin %s%s at %s:%d" msgstr "" -#: config/tc-xtensa.c:1429 +#: config/tc-xtensa.c:1445 msgid ".literal_position inside literal directive; ignoring" msgstr "" -#: config/tc-xtensa.c:1480 +#: config/tc-xtensa.c:1468 +msgid ".literal not allowed inside .begin literal region" +msgstr "" + +#: config/tc-xtensa.c:1502 msgid "expected comma or colon after symbol name; rest of line ignored" msgstr "" -#: config/tc-xtensa.c:1655 config/tc-xtensa.c:1672 +#: config/tc-xtensa.c:1638 config/tc-xtensa.c:1655 #, c-format msgid "bad register name: %s" msgstr "" -#: config/tc-xtensa.c:1661 +#: config/tc-xtensa.c:1644 #, c-format msgid "bad register number: %s" msgstr "" -#: config/tc-xtensa.c:1724 +#: config/tc-xtensa.c:1704 msgid "register number out of range" msgstr "" -#: config/tc-xtensa.c:1836 +#: config/tc-xtensa.c:1816 msgid "too many arguments" msgstr "" -#: config/tc-xtensa.c:1922 +#: config/tc-xtensa.c:1902 #, c-format msgid "not enough operands (%d) for '%s'; expected %d" msgstr "" -#: config/tc-xtensa.c:1929 +#: config/tc-xtensa.c:1909 #, c-format msgid "too many operands (%d) for '%s'; expected %d" msgstr "" -#: config/tc-xtensa.c:1973 +#: config/tc-xtensa.c:1953 #, c-format msgid "register number for `%s' is not a constant" msgstr "" -#: config/tc-xtensa.c:1978 +#: config/tc-xtensa.c:1958 #, c-format msgid "register number (%ld) for `%s' is out of range" msgstr "" -#: config/tc-xtensa.c:2464 +#: config/tc-xtensa.c:2444 #, c-format msgid "operand %d not properly aligned for '%s'" msgstr "" -#: config/tc-xtensa.c:2469 +#: config/tc-xtensa.c:2449 #, c-format msgid "operand %d not in immediate table for '%s'" msgstr "" -#: config/tc-xtensa.c:2474 +#: config/tc-xtensa.c:2454 #, c-format msgid "operand %d too large for '%s'" msgstr "" -#: config/tc-xtensa.c:2479 +#: config/tc-xtensa.c:2459 #, c-format msgid "operand %d too small for '%s'" msgstr "" -#: config/tc-xtensa.c:2484 +#: config/tc-xtensa.c:2464 #, c-format msgid "operand %d is invalid for '%s'" msgstr "" -#: config/tc-xtensa.c:3716 +#: config/tc-xtensa.c:3540 msgid "INSTR_LABEL_DEF not supported yet" msgstr "" -#: config/tc-xtensa.c:3745 +#: config/tc-xtensa.c:3569 msgid "can't handle generation of literal/labels yet" msgstr "" -#: config/tc-xtensa.c:3749 +#: config/tc-xtensa.c:3573 msgid "can't handle undefined OP TYPE" msgstr "" -#: config/tc-xtensa.c:3810 +#: config/tc-xtensa.c:3634 #, c-format msgid "found %d operands for '%s': Expected %d" msgstr "" -#: config/tc-xtensa.c:3817 +#: config/tc-xtensa.c:3641 #, c-format msgid "found too many (%d) operands for '%s': Expected %d" msgstr "" -#: config/tc-xtensa.c:4072 +#: config/tc-xtensa.c:3927 msgid "instruction fragment may contain data" msgstr "" -#: config/tc-xtensa.c:4105 +#: config/tc-xtensa.c:3962 #, c-format msgid "invalid operand %d on '%s'" msgstr "" -#: config/tc-xtensa.c:4116 +#: config/tc-xtensa.c:3973 #, c-format msgid "invalid expression for operand %d on '%s'" msgstr "" -#: config/tc-xtensa.c:4177 +#: config/tc-xtensa.c:4034 #, c-format msgid "invalid relocation operand %i on '%s'" msgstr "" -#: config/tc-xtensa.c:4186 +#: config/tc-xtensa.c:4043 #, c-format msgid "undefined symbol for opcode \"%s\"." msgstr "" -#: config/tc-xtensa.c:4280 +#: config/tc-xtensa.c:4137 msgid "instruction with constant operands does not fit" msgstr "" -#: config/tc-xtensa.c:4289 +#: config/tc-xtensa.c:4146 msgid "instruction with constant operands does not fit without widening" msgstr "" -#: config/tc-xtensa.c:4379 +#: config/tc-xtensa.c:4236 msgid "instruction's constant operands do not fit" msgstr "" -#: config/tc-xtensa.c:4718 +#: config/tc-xtensa.c:4594 msgid "opcode 'NOP.N' unavailable in this configuration" msgstr "" -#: config/tc-xtensa.c:4727 +#: config/tc-xtensa.c:4603 msgid "opcode 'OR' unavailable in this configuration" msgstr "" -#: config/tc-xtensa.c:4737 +#: config/tc-xtensa.c:4613 #, c-format msgid "invalid %d-byte NOP requested" msgstr "" -#: config/tc-xtensa.c:4757 +#: config/tc-xtensa.c:4633 msgid "get_expanded_loop_offset: undefined opcode" msgstr "" -#: config/tc-xtensa.c:4764 +#: config/tc-xtensa.c:4640 msgid "get_expanded_loop_offset: invalid opcode" msgstr "" -#: config/tc-xtensa.c:4880 +#: config/tc-xtensa.c:4760 msgid "invalid last instruction for a zero-overhead loop" msgstr "" -#: config/tc-xtensa.c:4935 +#: config/tc-xtensa.c:4823 #, c-format msgid "cannot assemble '%s' into a literal fragment" msgstr "" -#: config/tc-xtensa.c:4937 +#: config/tc-xtensa.c:4825 msgid "..." msgstr "" -#: config/tc-xtensa.c:5071 +#: config/tc-xtensa.c:4951 msgid "entry instruction with stack decrement < 16" msgstr "" -#: config/tc-xtensa.c:5075 +#: config/tc-xtensa.c:4955 msgid "entry instruction with non-constant decrement" msgstr "" -#: config/tc-xtensa.c:5152 +#: config/tc-xtensa.c:5037 #, c-format msgid "undefined @ suffix '%s', expected '%s'" msgstr "" -#: config/tc-xtensa.c:5242 +#: config/tc-xtensa.c:5127 #, c-format msgid "invalid operand relocation for '%s' instruction" msgstr "" -#: config/tc-xtensa.c:5245 +#: config/tc-xtensa.c:5130 #, c-format msgid "invalid relocation for operand %d in '%s' instruction" msgstr "" -#: config/tc-xtensa.c:5252 +#: config/tc-xtensa.c:5137 #, c-format msgid "invalid relocation type %d for %s instruction" msgstr "" -#: config/tc-xtensa.c:5261 +#: config/tc-xtensa.c:5146 #, c-format msgid "invalid relocation for operand %d of '%s'" msgstr "" -#: config/tc-xtensa.c:5269 +#: config/tc-xtensa.c:5154 #, c-format msgid "non-PCREL relocation operand %d for '%s': %s" msgstr "" -#: config/tc-xtensa.c:5328 config/tc-xtensa.c:5366 +#: config/tc-xtensa.c:5213 config/tc-xtensa.c:5251 #, c-format msgid "unhandled local relocation fix %s" msgstr "" -#: config/tc-xtensa.c:5350 +#: config/tc-xtensa.c:5235 msgid "undecodable FIX" msgstr "" -#: config/tc-xtensa.c:5478 +#: config/tc-xtensa.c:5363 msgid "emitting simplification relocation" msgstr "" -#: config/tc-xtensa.c:5482 +#: config/tc-xtensa.c:5367 msgid "emitting unknown relocation" msgstr "" -#: config/tc-xtensa.c:5814 +#: config/tc-xtensa.c:5698 #, c-format msgid "fr_var %lu < length %d; ignoring" msgstr "" -#: config/tc-xtensa.c:6000 config/tc-xtensa.c:6044 +#: config/tc-xtensa.c:5884 config/tc-xtensa.c:5928 msgid "undecodable instruction in instruction frag" msgstr "" -#: config/tc-xtensa.c:6092 +#: config/tc-xtensa.c:5976 msgid "invalid empty loop" msgstr "" -#: config/tc-xtensa.c:6097 +#: config/tc-xtensa.c:5981 msgid "loop target does not follow loop instruction in section" msgstr "" -#: config/tc-xtensa.c:6215 +#: config/tc-xtensa.c:6099 msgid "get_text_align_power: argument too large" msgstr "" -#: config/tc-xtensa.c:6420 config/tc-xtensa.c:6566 +#: config/tc-xtensa.c:6304 config/tc-xtensa.c:6450 msgid "invalid opcode for RELAX_ALIGN_NEXT_OPCODE" msgstr "" -#: config/tc-xtensa.c:6421 config/tc-xtensa.c:6567 +#: config/tc-xtensa.c:6305 config/tc-xtensa.c:6451 msgid "cannot continue" msgstr "" -#: config/tc-xtensa.c:6458 +#: config/tc-xtensa.c:6342 msgid "expected loop opcode in relax align next target" msgstr "" -#: config/tc-xtensa.c:6475 +#: config/tc-xtensa.c:6359 msgid "expected align_code or RELAX_ALIGN_NEXT_OPCODE" msgstr "" -#: config/tc-xtensa.c:6549 config/tc-xtensa.c:6587 config/tc-xtensa.c:6591 -#: config/tc-xtensa.c:6595 +#: config/tc-xtensa.c:6433 config/tc-xtensa.c:6471 config/tc-xtensa.c:6475 +#: config/tc-xtensa.c:6479 msgid "internal error aligning" msgstr "" -#: config/tc-xtensa.c:6676 +#: config/tc-xtensa.c:6560 msgid "bad relaxation state" msgstr "" -#: config/tc-xtensa.c:6752 +#: config/tc-xtensa.c:6636 #, c-format msgid "fr_var (%ld) < length (%d); ignoring" msgstr "" -#: config/tc-xtensa.c:6928 +#: config/tc-xtensa.c:6812 msgid "internal error: relaxation failed" msgstr "" -#: config/tc-xtensa.c:6934 +#: config/tc-xtensa.c:6818 msgid "internal error: relaxation requires too many steps" msgstr "" -#: config/tc-xtensa.c:7055 +#: config/tc-xtensa.c:6939 msgid "invalid relaxation fragment result" msgstr "" -#: config/tc-xtensa.c:7128 +#: config/tc-xtensa.c:7012 msgid "unable to widen instruction" msgstr "" -#: config/tc-xtensa.c:7215 +#: config/tc-xtensa.c:7099 msgid "multiple literals in expansion" msgstr "" -#: config/tc-xtensa.c:7219 +#: config/tc-xtensa.c:7103 msgid "no registered fragment for literal" msgstr "" -#: config/tc-xtensa.c:7221 +#: config/tc-xtensa.c:7105 msgid "number of literal tokens != 1" msgstr "" -#: config/tc-xtensa.c:7298 config/tc-xtensa.c:7304 +#: config/tc-xtensa.c:7182 config/tc-xtensa.c:7188 #, c-format msgid "unresolved loop target symbol: %s" msgstr "" -#: config/tc-xtensa.c:7401 +#: config/tc-xtensa.c:7285 msgid "loop relaxation specification does not correspond" msgstr "" -#: config/tc-xtensa.c:7428 +#: config/tc-xtensa.c:7312 msgid "loop too long for LOOP instruction" msgstr "" -#: config/tc-xtensa.c:7465 +#: config/tc-xtensa.c:7349 #, c-format msgid "invalid expression evaluation type %d" msgstr "" -#: config/tc-xtensa.c:7702 +#: config/tc-xtensa.c:7587 #, c-format msgid "fixes not all moved from %s" msgstr "" -#: config/tc-xtensa.c:7835 +#: config/tc-xtensa.c:7698 msgid "inlining literal pool; specify location with .literal_position." msgstr "" -#: config/tc-xtensa.c:8230 +#: config/tc-xtensa.c:8092 #, c-format msgid "could not create section %s" msgstr "" -#: config/tc-xtensa.c:8232 +#: config/tc-xtensa.c:8094 #, c-format msgid "invalid flag combination on section %s" msgstr "" -#: config/tc-xtensa.c:8481 +#: config/tc-xtensa.c:8343 #, c-format msgid "invalid symbolic operand %d on '%s'" msgstr "" -#: config/tc-xtensa.c:8545 +#: config/tc-xtensa.c:8407 msgid "operand number mismatch" msgstr "" -#: config/tc-xtensa.c:8592 +#: config/tc-xtensa.c:8454 msgid "invalid opcode" msgstr "" -#: config/tc-xtensa.c:8598 +#: config/tc-xtensa.c:8460 msgid "too few operands" msgstr "" -#: config/tc-xtensa.c:8817 +#: config/tc-xtensa.c:8679 msgid "ignoring extra '-rename-section' delimiter ':'" msgstr "" -#: config/tc-xtensa.c:8822 +#: config/tc-xtensa.c:8684 #, c-format msgid "ignoring invalid '-rename-section' specification: '%s'" msgstr "" -#: config/tc-xtensa.c:8845 +#: config/tc-xtensa.c:8707 #, c-format msgid "section %s renamed multiple times" msgstr "" -#: config/tc-xtensa.c:8847 +#: config/tc-xtensa.c:8709 #, c-format msgid "multiple sections remapped to output section %s" msgstr "" -#: config/tc-z8k.c:314 +#: config/tc-z8k.c:271 #, c-format msgid "register rr%d out of range" msgstr "" -#: config/tc-z8k.c:316 +#: config/tc-z8k.c:273 #, c-format msgid "register rr%d does not exist" msgstr "" -#: config/tc-z8k.c:326 +#: config/tc-z8k.c:283 #, c-format msgid "register rh%d out of range" msgstr "" -#: config/tc-z8k.c:336 +#: config/tc-z8k.c:293 #, c-format msgid "register rl%d out of range" msgstr "" -#: config/tc-z8k.c:347 +#: config/tc-z8k.c:304 #, c-format msgid "register rq%d out of range" msgstr "" -#: config/tc-z8k.c:349 +#: config/tc-z8k.c:306 #, c-format msgid "register rq%d does not exist" msgstr "" -#: config/tc-z8k.c:359 +#: config/tc-z8k.c:316 #, c-format msgid "register r%d out of range" msgstr "" -#: config/tc-z8k.c:404 +#: config/tc-z8k.c:357 #, c-format msgid "expected %c" msgstr "" -#: config/tc-z8k.c:421 +#: config/tc-z8k.c:372 #, c-format msgid "register is wrong size for a word %s" msgstr "" -#: config/tc-z8k.c:437 +#: config/tc-z8k.c:386 #, c-format msgid "register is wrong size for address %s" msgstr "" +#: config/tc-z8k.c:520 +#, c-format +msgid "unknown interrupt %s" +msgstr "" + #. No interrupt type specified, opcode won't do anything. -#: config/tc-z8k.c:585 +#: config/tc-z8k.c:543 msgid "opcode has no effect" msgstr "" -#: config/tc-z8k.c:697 +#: config/tc-z8k.c:653 msgid "Missing ) in ra(rb)" msgstr "" -#: config/tc-z8k.c:919 config/tc-z8k.c:925 -msgid "invalid indirect register size" +#: config/tc-z8k.c:736 config/tc-z8k.c:775 +#, c-format +msgid "invalid condition code '%s'" msgstr "" -#: config/tc-z8k.c:971 +#: config/tc-z8k.c:748 #, c-format -msgid "operand %s0x%x out of range" +msgid "invalid flag '%s'" +msgstr "" + +#: config/tc-z8k.c:902 config/tc-z8k.c:908 +msgid "invalid indirect register size" +msgstr "" + +#: config/tc-z8k.c:925 config/tc-z8k.c:1074 config/tc-z8k.c:1079 +msgid "invalid control register name" msgstr "" -#: config/tc-z8k.c:1099 +#: config/tc-z8k.c:1063 msgid "immediate must be 1 or 2" msgstr "" -#: config/tc-z8k.c:1102 +#: config/tc-z8k.c:1066 msgid "immediate 1 or 2 expected" msgstr "" -#: config/tc-z8k.c:1129 +#: config/tc-z8k.c:1097 msgid "can't use R0 here" msgstr "" -#: config/tc-z8k.c:1292 +#: config/tc-z8k.c:1258 msgid "Can't find opcode to match operands" msgstr "" -#: config/tc-z8k.c:1411 +#: config/tc-z8k.c:1369 #, c-format msgid "invalid architecture -z%s" msgstr "" -#: config/tc-z8k.c:1432 +#: config/tc-z8k.c:1389 +#, c-format msgid "" " Z8K options:\n" " -z8001 generate segmented code\n" @@ -10378,46 +10869,48 @@ msgid "" " -linkrelax create linker relaxable code\n" msgstr "" -#: config/tc-z8k.c:1445 +#: config/tc-z8k.c:1401 +#, c-format msgid "call to md_convert_frag\n" msgstr "" -#: config/tc-z8k.c:1476 config/tc-z8k.c:1487 +#: config/tc-z8k.c:1436 config/tc-z8k.c:1455 config/tc-z8k.c:1474 msgid "cannot branch to odd address" msgstr "" -#: config/tc-z8k.c:1479 config/tc-z8k.c:1490 +#: config/tc-z8k.c:1439 config/tc-z8k.c:1458 msgid "relative jump out of range" msgstr "" -#: config/tc-z8k.c:1497 +#: config/tc-z8k.c:1476 msgid "relative call out of range" msgstr "" -#: config/tc-z8k.c:1523 +#: config/tc-z8k.c:1505 msgid "relative address out of range" msgstr "" -#: config/tc-z8k.c:1543 +#: config/tc-z8k.c:1525 #, c-format msgid "md_apply_fix3: unknown r_type 0x%x\n" msgstr "" -#: config/tc-z8k.c:1556 +#: config/tc-z8k.c:1537 +#, c-format msgid "call to md_estimate_size_before_relax\n" msgstr "" -#: config/tc-z8k.c:1600 +#: config/tc-z8k.c:1574 #, c-format msgid "Can't subtract symbols in different sections %s %s" msgstr "" -#: depend.c:200 +#: depend.c:193 #, c-format msgid "can't open `%s' for writing" msgstr "" -#: depend.c:212 +#: depend.c:205 #, c-format msgid "can't close `%s'" msgstr "" @@ -10427,328 +10920,334 @@ msgstr "" msgid "register save offset not a multiple of %u" msgstr "" -#: dw2gencfi.c:388 +#: dw2gencfi.c:389 msgid "missing separator" msgstr "" -#: dw2gencfi.c:410 dw2gencfi.c:428 +#: dw2gencfi.c:411 dw2gencfi.c:429 msgid "bad register expression" msgstr "" -#: dw2gencfi.c:450 dw2gencfi.c:547 +#: dw2gencfi.c:451 dw2gencfi.c:552 msgid "CFI instruction used without previous .cfi_startproc" msgstr "" -#: dw2gencfi.c:579 +#: dw2gencfi.c:584 msgid "previous CFI entry not closed (missing .cfi_endproc)" msgstr "" -#: dw2gencfi.c:612 +#: dw2gencfi.c:617 msgid ".cfi_endproc without corresponding .cfi_startproc" msgstr "" -#: dw2gencfi.c:987 +#: dw2gencfi.c:1012 msgid "open CFI at the end of file; missing .cfi_endproc directive" msgstr "" -#: dwarf2dbg.c:468 dwarf2dbg.c:498 +#: dwarf2dbg.c:457 dwarf2dbg.c:486 msgid "file number less than one" msgstr "" -#: dwarf2dbg.c:474 +#: dwarf2dbg.c:463 #, c-format msgid "file number %ld already allocated" msgstr "" -#: dwarf2dbg.c:503 dwarf2dbg.c:1064 +#: dwarf2dbg.c:491 dwarf2dbg.c:1024 #, c-format msgid "unassigned file number %ld" msgstr "" -#: dwarf2dbg.c:1130 dwarf2dbg.c:1327 +#: dwarf2dbg.c:1089 dwarf2dbg.c:1280 msgid "internal error: unknown dwarf2 format" msgstr "" -#: dwarf2dbg.c:1472 dwarf2dbg.c:1480 dwarf2dbg.c:1488 dwarf2dbg.c:1509 +#: dwarf2dbg.c:1425 dwarf2dbg.c:1433 dwarf2dbg.c:1441 dwarf2dbg.c:1462 msgid "dwarf2 is not supported for this object file format" msgstr "" -#: ecoff.c:1556 +#: ecoff.c:1551 #, c-format msgid "string too big (%lu bytes)" msgstr "" -#: ecoff.c:1582 +#: ecoff.c:1577 #, c-format msgid "inserting \"%s\" into string hash table: %s" msgstr "" -#: ecoff.c:1614 ecoff.c:1808 ecoff.c:1833 ecoff.c:1865 ecoff.c:2019 -#: ecoff.c:2132 +#: ecoff.c:1608 ecoff.c:1801 ecoff.c:1824 ecoff.c:1855 ecoff.c:2008 +#: ecoff.c:2119 msgid "no current file pointer" msgstr "" -#: ecoff.c:1701 +#: ecoff.c:1695 msgid "too many st_End's" msgstr "" -#: ecoff.c:2044 +#: ecoff.c:2033 #, c-format msgid "inserting \"%s\" into tag hash table: %s" msgstr "" -#: ecoff.c:2210 +#: ecoff.c:2194 msgid "fake .file after real one" msgstr "" -#: ecoff.c:2300 +#: ecoff.c:2284 msgid "filename goes over one page boundary" msgstr "" -#: ecoff.c:2435 +#: ecoff.c:2417 msgid ".begin directive without a preceding .file directive" msgstr "" -#: ecoff.c:2442 +#: ecoff.c:2424 msgid ".begin directive without a preceding .ent directive" msgstr "" -#: ecoff.c:2474 +#: ecoff.c:2455 msgid ".bend directive without a preceding .file directive" msgstr "" -#: ecoff.c:2481 +#: ecoff.c:2462 msgid ".bend directive without a preceding .ent directive" msgstr "" -#: ecoff.c:2494 +#: ecoff.c:2475 msgid ".bend directive names unknown symbol" msgstr "" -#: ecoff.c:2538 +#: ecoff.c:2518 msgid ".def pseudo-op used inside of .def/.endef; ignored" msgstr "" -#: ecoff.c:2540 +#: ecoff.c:2520 msgid "empty symbol name in .def; ignored" msgstr "" -#: ecoff.c:2578 +#: ecoff.c:2557 msgid ".dim pseudo-op used outside of .def/.endef; ignored" msgstr "" -#: ecoff.c:2593 +#: ecoff.c:2572 msgid "badly formed .dim directive" msgstr "" -#: ecoff.c:2606 +#: ecoff.c:2585 msgid "too many .dim entries" msgstr "" -#: ecoff.c:2627 +#: ecoff.c:2605 msgid ".scl pseudo-op used outside of .def/.endef; ignored" msgstr "" -#: ecoff.c:2653 +#: ecoff.c:2630 msgid ".size pseudo-op used outside of .def/.endef; ignored" msgstr "" -#: ecoff.c:2668 +#: ecoff.c:2645 msgid "badly formed .size directive" msgstr "" -#: ecoff.c:2681 +#: ecoff.c:2658 msgid "too many .size entries" msgstr "" -#: ecoff.c:2704 +#: ecoff.c:2680 msgid ".type pseudo-op used outside of .def/.endef; ignored" msgstr "" #. FIXME: We could handle this by setting the continued bit. #. There would still be a limit: the .type argument can not #. be infinite. -#: ecoff.c:2722 +#: ecoff.c:2698 #, c-format msgid "the type of %s is too complex; it will be simplified" msgstr "" -#: ecoff.c:2733 +#: ecoff.c:2709 msgid "Unrecognized .type argument" msgstr "" -#: ecoff.c:2772 +#: ecoff.c:2747 msgid ".tag pseudo-op used outside of .def/.endef; ignored" msgstr "" -#: ecoff.c:2798 +#: ecoff.c:2772 msgid ".val pseudo-op used outside of .def/.endef; ignored" msgstr "" -#: ecoff.c:2806 +#: ecoff.c:2780 msgid ".val expression is too copmlex" msgstr "" -#: ecoff.c:2837 +#: ecoff.c:2810 msgid ".endef pseudo-op used before .def; ignored" msgstr "" -#: ecoff.c:2863 ecoff.c:2944 +#: ecoff.c:2836 ecoff.c:2917 msgid "bad COFF debugging information" msgstr "" -#: ecoff.c:2912 +#: ecoff.c:2885 #, c-format msgid "no tag specified for %s" msgstr "" -#: ecoff.c:3015 +#: ecoff.c:2987 msgid ".end directive without a preceding .file directive" msgstr "" -#: ecoff.c:3022 +#: ecoff.c:2994 msgid ".end directive without a preceding .ent directive" msgstr "" -#: ecoff.c:3044 +#: ecoff.c:3016 msgid ".end directive names unknown symbol" msgstr "" -#: ecoff.c:3072 +#: ecoff.c:3043 msgid "second .ent directive found before .end directive" msgstr "" -#: ecoff.c:3146 +#: ecoff.c:3115 msgid "no way to handle .file within .ent/.end section" msgstr "" -#: ecoff.c:3271 +#: ecoff.c:3236 msgid ".loc before .file" msgstr "" -#: ecoff.c:3410 +#: ecoff.c:3358 read.c:1381 read.c:1488 read.c:2125 read.c:2737 read.c:4808 +#: symbols.c:356 symbols.c:455 +#, c-format +msgid "symbol `%s' is already defined" +msgstr "" + +#: ecoff.c:3371 msgid "bad .weakext directive" msgstr "" -#: ecoff.c:3479 +#: ecoff.c:3439 #, c-format msgid ".stab%c is not supported" msgstr "" -#: ecoff.c:3489 +#: ecoff.c:3449 #, c-format msgid ".stab%c: ignoring non-zero other field" msgstr "" -#: ecoff.c:3523 +#: ecoff.c:3483 #, c-format msgid "" "line number (%d) for .stab%c directive cannot fit in index field (20 bits)" msgstr "" -#: ecoff.c:3559 +#: ecoff.c:3519 #, c-format msgid "illegal .stab%c directive, bad character" msgstr "" -#: ecoff.c:4021 ecoff.c:4210 ecoff.c:4235 +#: ecoff.c:3976 ecoff.c:4165 ecoff.c:4190 msgid ".begin/.bend in different segments" msgstr "" -#: ecoff.c:4737 +#: ecoff.c:4686 msgid "missing .end or .bend at end of file" msgstr "" -#: ecoff.c:5227 +#: ecoff.c:5171 msgid "GP prologue size exceeds field size, using 0 instead" msgstr "" -#: expr.c:83 read.c:3232 +#: expr.c:82 read.c:3106 msgid "bignum invalid" msgstr "" -#: expr.c:85 read.c:3234 read.c:3574 read.c:4474 +#: expr.c:84 read.c:3108 read.c:3444 read.c:4319 msgid "floating point number invalid" msgstr "" -#: expr.c:243 +#: expr.c:232 msgid "bad floating-point constant: exponent overflow" msgstr "" -#: expr.c:247 +#: expr.c:236 #, c-format msgid "bad floating-point constant: unknown error code=%d" msgstr "" -#: expr.c:425 +#: expr.c:412 msgid "" "a bignum with underscores may not have more than 8 hex digits in any word" msgstr "" -#: expr.c:448 +#: expr.c:435 msgid "a bignum with underscores must have exactly 4 words" msgstr "" #. Either not seen or not defined. #. @@ Should print out the original string instead of #. the parsed number. -#: expr.c:571 +#: expr.c:558 #, c-format msgid "backward ref to unknown label \"%d:\"" msgstr "" -#: expr.c:694 +#: expr.c:680 msgid "character constant too large" msgstr "" -#: expr.c:942 +#: expr.c:926 #, c-format msgid "expr.c(operand): bad atof_generic return val %d" msgstr "" -#: expr.c:1004 +#: expr.c:988 #, c-format msgid "missing '%c'" msgstr "" -#: expr.c:1016 read.c:3945 +#: expr.c:1000 read.c:3815 msgid "EBCDIC constants are not supported" msgstr "" -#: expr.c:1099 +#: expr.c:1090 #, c-format msgid "Unary operator %c ignored because bad operand follows" msgstr "" -#: expr.c:1145 expr.c:1170 +#: expr.c:1136 expr.c:1161 msgid "syntax error in .startof. or .sizeof." msgstr "" -#: expr.c:1666 +#: expr.c:1662 msgid "missing operand; zero assumed" msgstr "" -#: expr.c:1701 +#: expr.c:1697 msgid "left operand is a bignum; integer 0 assumed" msgstr "" -#: expr.c:1703 +#: expr.c:1699 msgid "left operand is a float; integer 0 assumed" msgstr "" -#: expr.c:1712 +#: expr.c:1708 msgid "right operand is a bignum; integer 0 assumed" msgstr "" -#: expr.c:1714 +#: expr.c:1710 msgid "right operand is a float; integer 0 assumed" msgstr "" -#: expr.c:1770 symbols.c:1191 +#: expr.c:1766 symbols.c:1154 msgid "division by zero" msgstr "" -#: expr.c:1868 +#: expr.c:1864 msgid "operation combines symbols in different segments" msgstr "" @@ -10760,11 +11259,12 @@ msgstr "" msgid "attempt to allocate data in common section" msgstr "" -#: frags.c:107 +#: frags.c:105 #, c-format msgid "can't extend frag %u chars" msgstr "" +#. For error messages. #. Detect if we are reading from stdin by examining the file #. name returned by as_where(). #. @@ -10776,165 +11276,172 @@ msgstr "" #. line here (assuming of course that we actually have a line of #. input to read), so that it can be displayed in the listing #. that is produced at the end of the assembly. -#: input-file.c:145 input-scrub.c:242 listing.c:343 +#: input-file.c:146 input-scrub.c:239 listing.c:332 msgid "{standard input}" msgstr "" -#: input-file.c:149 +#: input-file.c:157 #, c-format -msgid "can't open %s for reading" +msgid "Can't open %s for reading" msgstr "" -#: input-file.c:212 input-file.c:239 +#: input-file.c:225 input-file.c:254 #, c-format msgid "Can't read from %s" msgstr "" -#: input-file.c:247 +#: input-file.c:266 #, c-format msgid "Can't close %s" msgstr "" -#: input-scrub.c:272 +#: input-scrub.c:264 msgid "macros nested too deeply" msgstr "" -#: input-scrub.c:375 input-scrub.c:397 +#: input-scrub.c:366 input-scrub.c:388 msgid "partial line at end of file ignored" msgstr "" -#: itbl-ops.c:351 +#: itbl-ops.c:349 +#, c-format msgid "Unable to allocate memory for new instructions\n" msgstr "" -#: listing.c:243 +#: listing.c:238 msgid "Warning:" msgstr "" -#: listing.c:250 +#: listing.c:244 msgid "Error:" msgstr "" -#: listing.c:1130 +#: listing.c:1096 #, c-format msgid "can't open list file: %s" msgstr "" -#: listing.c:1154 +#: listing.c:1118 #, c-format msgid "error closing list file: %s" msgstr "" -#: listing.c:1233 +#: listing.c:1191 msgid "strange paper height, set to no form" msgstr "" -#: listing.c:1299 +#: listing.c:1255 msgid "new line in title" msgstr "" #. Turns the next expression into a string. -#: macro.c:382 +#: macro.c:363 #, no-c-format msgid "% operator needs absolute expression" msgstr "" -#: macro.c:545 +#: macro.c:519 msgid "unexpected end of file in macro definition" msgstr "" -#: macro.c:554 +#: macro.c:528 msgid "missing ) after formals" msgstr "" -#: macro.c:703 +#: macro.c:663 msgid "missplaced )" msgstr "" -#: macro.c:960 +#: macro.c:916 msgid "confusion in formal parameters" msgstr "" -#: macro.c:965 +#: macro.c:921 msgid "macro formal argument does not exist" msgstr "" -#: macro.c:980 +#: macro.c:936 msgid "can't mix positional and keyword arguments" msgstr "" -#: macro.c:988 +#: macro.c:944 msgid "too many positional arguments" msgstr "" -#: macro.c:1163 +#: macro.c:1110 msgid "unexpected end of file in irp or irpc" msgstr "" -#: macro.c:1171 +#: macro.c:1118 msgid "missing model parameter" msgstr "" -#: messages.c:104 +#: messages.c:103 +#, c-format msgid "Assembler messages:\n" msgstr "" -#: messages.c:214 +#: messages.c:211 +#, c-format msgid "Warning: " msgstr "" -#: messages.c:318 +#: messages.c:312 +#, c-format msgid "Error: " msgstr "" -#: messages.c:413 messages.c:433 +#: messages.c:407 messages.c:427 +#, c-format msgid "Fatal error: " msgstr "" -#: messages.c:450 +#: messages.c:442 +#, c-format msgid "Internal error!\n" msgstr "" -#: messages.c:452 +#: messages.c:444 #, c-format msgid "Assertion failure in %s at %s line %d.\n" msgstr "" -#: messages.c:455 +#: messages.c:447 #, c-format msgid "Assertion failure at %s line %d.\n" msgstr "" -#: messages.c:456 messages.c:475 +#: messages.c:448 messages.c:465 +#, c-format msgid "Please report this bug.\n" msgstr "" -#: messages.c:470 +#: messages.c:460 #, c-format msgid "Internal error, aborting at %s line %d in %s\n" msgstr "" -#: messages.c:473 +#: messages.c:463 #, c-format msgid "Internal error, aborting at %s line %d\n" msgstr "" -#: output-file.c:48 +#: output-file.c:47 #, c-format msgid "can't open a bfd on stdout %s" msgstr "" -#: output-file.c:52 output-file.c:115 +#: output-file.c:51 output-file.c:114 #, c-format msgid "FATAL: can't create %s" msgstr "" -#: output-file.c:73 output-file.c:80 +#: output-file.c:71 output-file.c:78 #, c-format msgid "FATAL: can't close %s\n" msgstr "" -#: output-file.c:126 +#: output-file.c:127 #, c-format msgid "FATAL: can't close %s" msgstr "" @@ -10947,337 +11454,332 @@ msgstr "" msgid "can't continue" msgstr "" -#: read.c:442 +#: read.c:428 #, c-format msgid "error constructing %s pseudo-op table: %s" msgstr "" -#: read.c:809 +#: read.c:794 #, c-format msgid "unknown pseudo-op: `%s'" msgstr "" -#: read.c:940 +#: read.c:925 #, c-format msgid "label \"%d$\" redefined" msgstr "" -#: read.c:1152 +#: read.c:1133 msgid ".abort detected. Abandoning ship." msgstr "" -#: read.c:1174 read.c:2413 +#: read.c:1151 read.c:2297 msgid "ignoring fill value in absolute section" msgstr "" -#: read.c:1260 +#: read.c:1235 #, c-format msgid "alignment too large: %u assumed" msgstr "" -#: read.c:1292 +#: read.c:1267 msgid "expected fill pattern missing" msgstr "" -#: read.c:1417 +#: read.c:1364 +msgid "missing size expression" +msgstr "" + +#: read.c:1371 #, c-format -msgid "length of .comm \"%s\" is already %ld; not changing to %ld" +msgid "size (%ld) out of range, ignored" +msgstr "" + +#: read.c:1391 +#, c-format +msgid "size of \"%s\" is already %ld; not changing to %ld" msgstr "" #. Some of the back ends can't deal with non-positive line numbers. #. Besides, it's silly. -#: read.c:1636 +#: read.c:1613 #, c-format msgid "line numbers must be positive; line number %d rejected" msgstr "" -#: read.c:1664 +#: read.c:1640 msgid "start address not supported" msgstr "" -#: read.c:1674 +#: read.c:1649 msgid ".err encountered" msgstr "" -#: read.c:1693 read.c:1695 +#: read.c:1667 read.c:1669 #, c-format msgid ".fail %ld encountered" msgstr "" -#: read.c:1732 +#: read.c:1705 #, c-format msgid ".fill size clamped to %d" msgstr "" -#: read.c:1737 +#: read.c:1710 msgid "size negative; .fill ignored" msgstr "" -#: read.c:1743 +#: read.c:1716 msgid "repeat < 0; .fill ignored" msgstr "" -#: read.c:1903 +#: read.c:1873 #, c-format msgid "unrecognized .linkonce type `%s'" msgstr "" -#: read.c:1916 read.c:1942 +#: read.c:1886 read.c:1912 msgid ".linkonce is not supported for this object file format" msgstr "" -#: read.c:1938 +#: read.c:1908 #, c-format msgid "bfd_set_section_flags: %s" msgstr "" -#: read.c:1993 -msgid "missing size expression" -msgstr "" - -#: read.c:1999 -#, c-format -msgid "BSS length (%d) < 0 ignored" -msgstr "" - -#: read.c:2015 +#: read.c:1938 #, c-format msgid "error setting flags for \".sbss\": %s" msgstr "" -#: read.c:2038 -msgid "expected comma after size" -msgstr "" - -#: read.c:2072 -#, c-format -msgid "alignment too large; %d assumed" +#: read.c:1986 +msgid "expected alignment after size" msgstr "" -#: read.c:2077 +#: read.c:2000 msgid "alignment negative; 0 assumed" msgstr "" -#: read.c:2342 +#: read.c:2231 #, c-format msgid "attempt to redefine pseudo-op `%s' ignored" msgstr "" -#: read.c:2408 +#: read.c:2292 #, c-format msgid "invalid segment \"%s\"" msgstr "" -#: read.c:2416 +#: read.c:2300 msgid "only constant offsets supported in absolute section" msgstr "" -#: read.c:2456 +#: read.c:2339 msgid "MRI style ORG pseudo-op not supported" msgstr "" -#: read.c:2613 +#: read.c:2495 #, c-format msgid "unrecognized section type `%s'" msgstr "" -#: read.c:2627 +#: read.c:2509 msgid "absolute sections are not supported" msgstr "" -#: read.c:2642 +#: read.c:2524 #, c-format msgid "unrecognized section command `%s'" msgstr "" -#: read.c:2708 +#: read.c:2588 msgid ".endr encountered without preceeding .rept, .irc, or .irp" msgstr "" -#: read.c:2740 +#: read.c:2616 #, c-format msgid "%s without %s" msgstr "" -#: read.c:2949 +#: read.c:2822 msgid "unsupported variable size or fill value" msgstr "" -#: read.c:2974 +#: read.c:2847 msgid ".space repeat count is zero, ignored" msgstr "" -#: read.c:2976 +#: read.c:2849 msgid ".space repeat count is negative, ignored" msgstr "" -#: read.c:3005 +#: read.c:2878 msgid "space allocation too complex in absolute section" msgstr "" -#: read.c:3011 +#: read.c:2884 msgid "space allocation too complex in common section" msgstr "" -#: read.c:3099 read.c:4190 +#: read.c:2971 read.c:4057 #, c-format msgid "bad floating literal: %s" msgstr "" -#: read.c:3172 +#: read.c:3036 #, c-format -msgid "rest of line ignored; first ignored character is `%c'" +msgid "junk at end of line, first unrecognized character is `%c'" msgstr "" -#: read.c:3175 +#: read.c:3039 #, c-format -msgid "rest of line ignored; first ignored character valued 0x%x" +msgid "junk at end of line, first unrecognized character valued 0x%x" msgstr "" -#: read.c:3228 +#: read.c:3102 msgid "missing expression" msgstr "" -#: read.c:3404 +#: read.c:3278 msgid "rva without symbol" msgstr "" -#: read.c:3530 +#: read.c:3400 msgid "attempt to store value in absolute section" msgstr "" -#: read.c:3568 read.c:4468 +#: read.c:3438 read.c:4313 msgid "zero assumed for missing expression" msgstr "" -#: read.c:3580 read.c:4480 write.c:322 +#: read.c:3450 read.c:4325 write.c:318 msgid "register value used as expression" msgstr "" #. Leading bits contain both 0s & 1s. -#: read.c:3671 +#: read.c:3541 #, c-format msgid "value 0x%lx truncated to 0x%lx" msgstr "" -#: read.c:3687 +#: read.c:3557 #, c-format msgid "bignum truncated to %d bytes" msgstr "" -#: read.c:3854 +#: read.c:3724 msgid "using a bit field width of zero" msgstr "" -#: read.c:3862 +#: read.c:3732 #, c-format msgid "field width \"%s\" too complex for a bitfield" msgstr "" -#: read.c:3870 +#: read.c:3740 #, c-format msgid "field width %lu too big to fit in %d bytes: truncated to %d bits" msgstr "" -#: read.c:3892 +#: read.c:3762 #, c-format msgid "field value \"%s\" too complex for a bitfield" msgstr "" -#: read.c:4018 read.c:4212 +#: read.c:3888 read.c:4079 msgid "unresolvable or nonpositive repeat count; using 1" msgstr "" -#: read.c:4069 +#: read.c:3937 #, c-format msgid "unknown floating type type '%c'" msgstr "" -#: read.c:4091 +#: read.c:3959 msgid "floating point constant too large" msgstr "" -#: read.c:4581 +#: read.c:4429 msgid "strings must be placed into a section" msgstr "" -#: read.c:4631 +#: read.c:4479 msgid "expected <nn>" msgstr "" #. To be compatible with BSD 4.2 as: give the luser a linefeed!! -#: read.c:4664 read.c:4750 +#: read.c:4512 read.c:4598 msgid "unterminated string; newline inserted" msgstr "" -#: read.c:4758 +#: read.c:4606 msgid "bad escaped character in string" msgstr "" -#: read.c:4784 +#: read.c:4631 msgid "expected address expression" msgstr "" -#: read.c:4804 +#: read.c:4650 #, c-format msgid "symbol \"%s\" undefined; zero assumed" msgstr "" -#: read.c:4807 +#: read.c:4653 msgid "some symbol undefined; zero assumed" msgstr "" -#: read.c:4824 +#: read.c:4669 msgid "bad or irreducible absolute expression" msgstr "" -#: read.c:4867 +#: read.c:4710 msgid "this string may not contain '\\0'" msgstr "" -#: read.c:4904 +#: read.c:4746 msgid "missing string" msgstr "" -#: read.c:5027 +#: read.c:4866 #, c-format msgid ".incbin count zero, ignoring `%s'" msgstr "" -#: read.c:5053 +#: read.c:4892 #, c-format msgid "file not found: %s" msgstr "" -#: read.c:5067 +#: read.c:4906 #, c-format msgid "seek to end of .incbin file failed `%s'" msgstr "" -#: read.c:5078 +#: read.c:4917 #, c-format msgid "skip (%ld) + count (%ld) larger than file size (%ld)" msgstr "" -#: read.c:5085 +#: read.c:4924 #, c-format msgid "could not skip to %ld in file `%s'" msgstr "" -#: read.c:5094 +#: read.c:4933 #, c-format msgid "truncated file `%s', %ld of %ld bytes read" msgstr "" -#: read.c:5257 +#: read.c:5091 msgid "missing .func" msgstr "" -#: read.c:5274 +#: read.c:5108 msgid ".endfunc missing for previous .func" msgstr "" -#: stabs.c:220 stabs.c:228 stabs.c:236 stabs.c:255 +#: stabs.c:215 stabs.c:223 stabs.c:231 stabs.c:250 #, c-format msgid ".stab%c: missing comma" msgstr "" @@ -11285,183 +11787,183 @@ msgstr "" #. This could happen for example with a source file with a huge #. number of lines. The only cure is to use a different debug #. format, probably DWARF. -#: stabs.c:248 +#: stabs.c:243 #, c-format msgid ".stab%c: description field '%x' too big, try a different debug format" msgstr "" -#: stabs.c:433 +#: stabs.c:426 msgid "comma missing in .xstabs" msgstr "" -#: subsegs.c:377 +#: subsegs.c:373 #, c-format msgid "attempt to switch to nonexistent segment \"%s\"" msgstr "" -#: symbols.c:318 +#: symbols.c:307 #, c-format msgid "cannot define symbol `%s' in absolute section" msgstr "" -#: symbols.c:452 +#: symbols.c:441 #, c-format msgid "symbol `%s' is already defined as \"%s\"/%s%ld" msgstr "" -#: symbols.c:529 symbols.c:536 +#: symbols.c:517 symbols.c:524 #, c-format msgid "inserting \"%s\" into symbol table failed: %s" msgstr "" -#: symbols.c:874 symbols.c:878 +#: symbols.c:838 symbols.c:842 #, c-format msgid "undefined symbol `%s' in operation" msgstr "" -#: symbols.c:885 +#: symbols.c:849 #, c-format msgid "invalid sections for operation on `%s' and `%s'" msgstr "" -#: symbols.c:889 +#: symbols.c:853 #, c-format msgid "invalid section for operation on `%s'" msgstr "" -#: symbols.c:897 symbols.c:900 +#: symbols.c:861 symbols.c:864 #, c-format msgid "undefined symbol `%s' in operation setting `%s'" msgstr "" -#: symbols.c:907 +#: symbols.c:871 #, c-format msgid "invalid sections for operation on `%s' and `%s' setting `%s'" msgstr "" -#: symbols.c:911 +#: symbols.c:875 #, c-format msgid "invalid section for operation on `%s' setting `%s'" msgstr "" -#: symbols.c:964 +#: symbols.c:927 #, c-format msgid "symbol definition loop encountered at `%s'" msgstr "" -#: symbols.c:1193 +#: symbols.c:1156 #, c-format msgid "division by zero when setting `%s'" msgstr "" -#: symbols.c:1280 write.c:2008 +#: symbols.c:1243 write.c:1973 #, c-format msgid "can't resolve value for symbol `%s'" msgstr "" -#: symbols.c:1674 +#: symbols.c:1627 #, c-format msgid "\"%d\" (instance number %d of a %s label)" msgstr "" -#: symbols.c:1711 +#: symbols.c:1663 #, c-format msgid "attempt to get value of unresolved symbol `%s'" msgstr "" -#: symbols.c:1971 +#: symbols.c:1904 msgid "section symbols are already global" msgstr "" -#: symbols.c:2014 +#: symbols.c:1944 #, c-format msgid "Accessing function `%s' as thread-local object" msgstr "" -#: symbols.c:2018 +#: symbols.c:1948 #, c-format msgid "Accessing `%s' as thread-local object" msgstr "" -#: write.c:215 +#: write.c:213 #, c-format msgid "field fx_size too small to hold %d" msgstr "" -#: write.c:349 +#: write.c:345 msgid "rva not supported" msgstr "" -#: write.c:570 +#: write.c:545 #, c-format msgid "attempt to .org/.space backwards? (%ld)" msgstr "" -#: write.c:1002 write.c:1074 +#: write.c:968 write.c:1040 msgid "relocation out of range" msgstr "" -#: write.c:1005 write.c:1077 +#: write.c:971 write.c:1043 #, c-format msgid "%s:%u: bad return from bfd_install_relocation: %x" msgstr "" -#: write.c:1057 +#: write.c:1023 msgid "internal error: fixup not contained within frag" msgstr "" -#: write.c:1164 write.c:1188 +#: write.c:1129 write.c:1153 #, c-format msgid "FATAL: Can't write %s" msgstr "" -#: write.c:1220 +#: write.c:1185 msgid "cannot write to output file" msgstr "" -#: write.c:1477 +#: write.c:1442 #, c-format msgid "%d error%s, %d warning%s, generating bad object file" msgstr "" -#: write.c:1484 +#: write.c:1449 #, c-format msgid "%d error%s, %d warning%s, no object file generated" msgstr "" -#: write.c:1945 +#: write.c:1910 #, c-format msgid "local label `%s' is not defined" msgstr "" -#: write.c:2244 +#: write.c:2203 #, c-format msgid "alignment padding (%lu bytes) not a multiple of %ld" msgstr "" -#: write.c:2361 +#: write.c:2320 #, c-format msgid ".word %s-%s+%s didn't fit" msgstr "" -#: write.c:2446 +#: write.c:2405 msgid "attempt to move .org backwards" msgstr "" -#: write.c:2474 +#: write.c:2433 msgid ".space specifies non-absolute value" msgstr "" -#: write.c:2481 +#: write.c:2440 msgid ".space or .fill with negative value, ignored" msgstr "" -#: write.c:2773 +#: write.c:2724 #, c-format msgid "value of %s too large for field of %d bytes at %s" msgstr "" -#: write.c:2785 +#: write.c:2736 #, c-format msgid "signed .word overflow; switch may be too large; %ld at 0x%lx" msgstr "" diff --git a/gas/read.c b/gas/read.c index f50409ccebe..93e3ec41b17 100644 --- a/gas/read.c +++ b/gas/read.c @@ -1053,7 +1053,7 @@ read_a_source_file (char *name) #endif input_line_pointer--; /* Report unknown char as ignored. */ - ignore_rest_of_line (); + demand_empty_rest_of_line (); } #ifdef md_after_pass_hook @@ -1155,6 +1155,9 @@ do_align (int n, char *fill, int len, int max) len = 0; } +#ifdef md_flush_pending_output + md_flush_pending_output (); +#endif #ifdef md_do_align md_do_align (n, fill, len, max, just_record_alignment); #endif @@ -3020,6 +3023,10 @@ s_text (int ignore ATTRIBUTE_UNUSED) #endif } + +/* Verify that we are at the end of a line. If not, issue an error and + skip to EOL. */ + void demand_empty_rest_of_line (void) { @@ -3027,28 +3034,29 @@ demand_empty_rest_of_line (void) if (is_end_of_line[(unsigned char) *input_line_pointer]) input_line_pointer++; else - ignore_rest_of_line (); - - /* Return having already swallowed end-of-line. */ -} - -void -ignore_rest_of_line (void) -{ - /* For suspect lines: gives warning. */ - if (!is_end_of_line[(unsigned char) *input_line_pointer]) { if (ISPRINT (*input_line_pointer)) - as_warn (_("rest of line ignored; first ignored character is `%c'"), + as_bad (_("junk at end of line, first unrecognized character is `%c'"), *input_line_pointer); else - as_warn (_("rest of line ignored; first ignored character valued 0x%x"), + as_bad (_("junk at end of line, first unrecognized character valued 0x%x"), *input_line_pointer); - - while (input_line_pointer < buffer_limit - && !is_end_of_line[(unsigned char) *input_line_pointer]) - input_line_pointer++; + ignore_rest_of_line (); } + + /* Return pointing just after end-of-line. */ + know (is_end_of_line[(unsigned char) input_line_pointer[-1]]); +} + +/* Silently advance to the end of line. Use this after already having + issued an error about something bad. */ + +void +ignore_rest_of_line (void) +{ + while (input_line_pointer < buffer_limit + && !is_end_of_line[(unsigned char) *input_line_pointer]) + input_line_pointer++; input_line_pointer++; @@ -4738,7 +4746,7 @@ demand_copy_string (int *lenP) } else { - as_warn (_("missing string")); + as_bad (_("missing string")); retval = NULL; ignore_rest_of_line (); } @@ -4814,7 +4822,7 @@ equals (char *sym_name, int reassign) if (flag_mri) { /* Check garbage after the expression. */ - ignore_rest_of_line (); + demand_empty_rest_of_line (); mri_comment_end (stop, stopc); } } diff --git a/gas/stabs.c b/gas/stabs.c index 3d32729901b..f8acdc84257 100644 --- a/gas/stabs.c +++ b/gas/stabs.c @@ -520,7 +520,7 @@ generate_asm_file (int type, char *file) char *buf; char *tmp = file; char *endp = file + strlen (file); - char *bufp = buf; + char *bufp; if (last_file != NULL && strcmp (last_file, file) == 0) diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 9783ad262c6..c7286720db0 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,176 @@ +2004-04-30 H.J. Lu <hongjiu.lu@intel.com> + + * gas/elf/elf.exp: Remove group1, add group1a and group1b for + section group. + + * gas/elf/group1a.d: New file. + * gas/elf/group1b.d: Likewise. + + * gas/elf/group1.e: Removed. + +2004-04-30 Nick Clifton <nickc@redhat.com> + + * gas/arm/reg-alias.s: New file: Test case sensitive register + aliases. + * gas/arm/reg-alias.d: New file: Expected test output. + * gas/arm/arm.exp: Run reg-alias test. + Arrange tests in a more orderly fashion. + +2004-04-30 Ben Elliston <bje@au.ibm.com> + + * gas/ppc/power4.s: Add dcbz and dcbzl test cases. + * gas/ppc/power4.d: Update accordingly. + +2004-04-26 H.J. Lu <hongjiu.lu@intel.com> + + * gas/elf/elf.exp: Add group0a, group0b and group1 for section + group. + + * gas/elf/group0.s: New file. + * gas/elf/group0a.d: Likewise. + * gas/elf/group0b.d: Likewise. + * gas/elf/group1.e: Likewise. + * gas/elf/group1.s: Likewise. + +2004-04-23 Nick Clifton <nickc@redhat.com> + + * gas/symver/symver1.d: Cope with extra symbols inserted by + arm-elf toolchains. + * gas/symver/symver0.d: Likewise + * gas/elf/symver.d: Likewise. + +2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp> + + * gas/sh/pcrel2.d: Update. + * gas/sh/tlsd.d: Update. + * gas/sh/tlsnopic.d: Update. + * gas/sh/tlspic.d: Update. + +2004-04-22 Mark Kettenis <kettenis@gnu.org> + + * lib/gas-defs.exp (is_elf_format): Add OpenBSD support. + +2004-04-22 Atsushi Nemoto <anemo@mba.ocn.ne.jp> + + * gas/mips/lb-xgot-ilocks.d: Remove nops in load delay slot. + * gas/mips/mips-abi32-pic.d: Likewise. + * gas/mips/mips-abi32-pic2.d: Likewise. + * gas/mips/mips-gp32-fp32-pic.d: Likewise. + * gas/mips/mips-gp32-fp64-pic.d: Likewise. + * gas/mips/mips-gp64-fp32-pic.d: Likewise. + * gas/mips/mips-gp64-fp64-pic.d: Likewise. + * gas/mips/relax-swap1-mips2.d: Likewise. + * gas/mips/lb-svr4pic-ilocks.d: New test. + * gas/mips/mips.exp: Run it. + +2004-04-22 Paul Brook <paul@codesourcery.com> + + * maverick.c (off8s): Test full shifted operand range. + (MCC2): Define. + (MVDSPACC, MVACCDSP): Use it. + * maverick.d, maverick.s: Regenerate. + +2004-04-22 Peter Barada <peter@the-baradas.com> + + * gas/m68k/mcf-mac.s: New test: Check ColdFire MAC instructions. + * gas/m68k/mcf-emac.s: New test: Similar checks. + * gas/m68k/mcf-mac.d: New test: Expected output. + * gas/m68k/mcf-emac.d: New test: Likewise. + * gas/m68k/all.exp: Run new tests. + +2004-04-21 Chris Demetriou <cgd@broadcom.com> + + * gas/mips/elempic.d: File removed as part of -membedded-pic removal. + * gas/mips/empic.d: Likewise. + * gas/mips/empic.l: Likewise. + * gas/mips/empic.s: Likewise. + * gas/mips/empic2.d: Likewise. + * gas/mips/empic2.s: Likewise. + * gas/mips/empic3_e.d: Likewise. + * gas/mips/empic3_e.s: Likewise. + * gas/mips/empic3_g1.d: Likewise. + * gas/mips/empic3_g1.s: Likewise. + * gas/mips/empic3_g2.d: Likewise. + * gas/mips/empic3_g2.s: Likewise. + * gas/mips/jal-empic-elf-2.d: Likewise. + * gas/mips/jal-empic-elf-2.s: Likewise. + * gas/mips/jal-empic-elf-3.d: Likewise. + * gas/mips/jal-empic-elf-3.s: Likewise. + * gas/mips/jal-empic-elf.d: Likewise. + * gas/mips/jal-empic.d: Likewise. + * gas/mips/la-empic.d: Likewise. + * gas/mips/la-empic.s: Likewise. + * gas/mips/lb-empic.d: Likewise. + * gas/mips/ld-empic.d: Likewise. + * gas/mips/lif-empic.d: Likewise. + * gas/mips/telempic.d: Likewise. + * gas/mips/tempic.d: Likewise. + * gas/mips/ulh-empic.d: Likewise. + * gas/mips/ld-pic.s: Remove code conditional on EMPIC. + * gas/mips/lifloat.s: Likewise. + * gas/mips/mips.exp: Remove -membedded-pic tests and related comments. + +2004-04-20 Brian Ford <ford@vss.fsi.com> + DJ Delorie <dj@redhat.com> + + * gas/i386/secrel.s: New test for .secrel32. + * gas/i386/secrel.d: Likewise. + * gas/i386/i386.exp: Call it for PE targets. + +2004-04-19 Jakub Jelinek <jakub@redhat.com> + + * gas/cfi/cfi-sparc64-1.d: Update. + +2004-04-14 Richard Sandiford <rsandifo@redhat.com> + + * gas/mips/vr4122.[sd]: Change option to -mfix-vr4120. + +2004-04-14 Richard Sandiford <rsandifo@redhat.com> + + * gas/elf/section2.e-mips: Allow named section symbols. + * gas/mips/{,el}empic.d, gas/mips/mips{,el}16-[ef].d: Likewise. + +2004-04-13 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> + + * gas/m32r/parallel-2.s: New file: Test case for parallel code. + * gas/m32r/parallel-2.d: New file: Expected results. + * gas/m32r/m32r2.exp: Run the test. + + * gas/m32r/seth.s: New file: Test for seth. + * gas/m32r/seth.d: New file: Expected results. + * gas/m32r/m32r.exp: Run the new test. + +2004-04-01 Asgari Jinia <asgarij@kpitcummins.com> + + * gas/sh/renesas-1.s, gas/sh/renesas-1.d: New test for -renesas + option. + * gas/sh/basic.exp: Run the new test. + +2004-04-01 Dave Korn <dk@artimi.com> + + * gas/dlx/alltests.exp: Execute new lohi test. + * gas/dlx/lohi.s: New test for spurious lo16/hi16 + reloc overflow checking. + * gas/dlx/lohi.d: New file: expected output. + * gas/dlx/lhi.d: Updated to properly expect lo16 + relocations where asked for. + * gas/dlx/itype.d: Likewise. + * gas/dlx/lhi.d: Corrected cut+paste error in test name. + +2004-03-30 Stan Shebs <shebs@apple.com> + + * gas/macros/macros.exp: Remove mention of MPW config. + +2004-03-27 Alan Modra <amodra@bigpond.net.au> + + * gas/i860/dir-intel03-err.l: Update for junk at end line becoming + an error. + * gas/m68hc11/m68hc11.exp: Likewise. + +2004-03-23 Andreas Schwab <schwab@suse.de> + + * gas/cfi/cfi-m68k.d: Adjust offsets. + 2004-03-22 Hans-Peter Nilsson <hp@axis.com> * gas/cris/regreg.d: Assemble with --no-mul-bug-abort. @@ -38,6 +211,51 @@ VIA PadLock instructions. * gas/i386/i386.exp: Run padlock tests. +2004-03-12 Alan Modra <amodra@bigpond.net.au> + + * gas/i386/katmai.d: Revert last change. + + * gas/i386/katmai.d: Adjust for clflush change. + +2004-03-08 Andreas Jaeger <aj@suse.de> + + * gas/cfi/cfi-s390x-1.d: Adjust offsets. + +2004-03-07 Richard Henderson <rth@redhat.com> + + * gas/cfi/cfi-common-2.d, gas/cfi/cfi-i386.d: Adjust offsets. + +2004-03-07 Andreas Jaeger <aj@suse.de> + + * gas/cfi/cfi-x86_64.d: Adjust offsets. + +2004-03-07 Richard Henderson <rth@redhat.com> + + * gas/alpha/elf-reloc-8.d, gas/cfi/cfi-alpha-1.d, + gas/cfi/cfi-alpha-2.d, gas/cfi/cfi-alpha-3.d, gas/cfi/cfi-common-1.d, + gas/cfi/cfi-common-2.d, gas/cfi/cfi-common-3.d: Adjust offsets. + +2004-03-03 Kaz Kojima <kkojima@rr.iij4u.or.jp> + + * gas/sh/sh64/err-dsp.s: Fix expected error message. + +2004-03-01 Richard Sandiford <rsandifo@redhat.com> + + * gas/frv/fr405-insn.[sdl]: New test. + * gas/frv/fr450-spr.[sd]: New test. + * gas/frv/fr450-insn.[sdl]: New test. + * gas/frv/fr450-media-issue.[sl]: New test. + * gas/frv/allinsn.exp: Run new tests. Ensure fr405 instructions + aren't accepted for -mcpu=fr400 or -mcpu=fr500. Ensure fr450 + instructions aren't accepted for -mcpu=fr400, -mcpu=fr405 or + -mcpu=fr500. + +2004-03-01 Richard Sandiford <rsandifo@redhat.com> + + * gas/frv/allinsn.s (rstb, rsth, rst, rstd, rstq): Replace with nops. + (rstbf, rsthf, rstf, rstdf, rstqf): Likewise. + * gas/frv/allinsn.d: Update accordingly. + 2004-02-17 Petko Manolov <petkan@nucleusys.com> * gas/arm/maverick.c: DSPSC to/from opcode fixes. diff --git a/gas/testsuite/gas/alpha/elf-reloc-8.d b/gas/testsuite/gas/alpha/elf-reloc-8.d index 32ebf97222a..8ba78c3c122 100644 --- a/gas/testsuite/gas/alpha/elf-reloc-8.d +++ b/gas/testsuite/gas/alpha/elf-reloc-8.d @@ -311,20 +311,20 @@ OFFSET *TYPE *VALUE RELOCATION RECORDS FOR \[\.eh_frame\]: OFFSET *TYPE *VALUE -0*000001b SREL32 \.init\.text -0*0000031 SREL32 \.init\.text\+0x0*0000050 -0*0000042 SREL32 \.init\.text\+0x0*0000080 -0*0000053 SREL32 \.init\.text\+0x0*00000b0 -0*0000074 SREL32 \.init\.text\+0x0*00002c0 -0*0000092 SREL32 \.init\.text\+0x0*00005a0 -0*00000aa SREL32 \.init\.text\+0x0*00005f0 -0*00000bb SREL32 \.init\.text\+0x0*0000610 -0*00000cc SREL32 \.init\.text\+0x0*0000630 -0*00000e6 SREL32 \.init\.text\+0x0*0000750 -0*000010a SREL32 \.init\.text\+0x0*0000990 -0*0000124 SREL32 \.init\.text\+0x0*0000a10 -0*0000135 SREL32 \.init\.text\+0x0*0000a20 -0*0000146 SREL32 \.init\.text\+0x0*0000a40 -0*000015e SREL32 \.init\.text\+0x0*0000a90 -0*000016f SREL32 \.init\.text\+0x0*0000aa0 -0*0000180 SREL32 \.text +0*000001c SREL32 \.init\.text +0*0000034 SREL32 \.init\.text\+0x0*0000050 +0*0000048 SREL32 \.init\.text\+0x0*0000080 +0*000005c SREL32 \.init\.text\+0x0*00000b0 +0*0000080 SREL32 \.init\.text\+0x0*00002c0 +0*00000a0 SREL32 \.init\.text\+0x0*00005a0 +0*00000b8 SREL32 \.init\.text\+0x0*00005f0 +0*00000cc SREL32 \.init\.text\+0x0*0000610 +0*00000e0 SREL32 \.init\.text\+0x0*0000630 +0*00000fc SREL32 \.init\.text\+0x0*0000750 +0*0000120 SREL32 \.init\.text\+0x0*0000990 +0*000013c SREL32 \.init\.text\+0x0*0000a10 +0*0000150 SREL32 \.init\.text\+0x0*0000a20 +0*0000164 SREL32 \.init\.text\+0x0*0000a40 +0*000017c SREL32 \.init\.text\+0x0*0000a90 +0*0000190 SREL32 \.init\.text\+0x0*0000aa0 +0*00001a4 SREL32 \.text diff --git a/gas/testsuite/gas/arm/arm.exp b/gas/testsuite/gas/arm/arm.exp index e5ec8be4126..36045e6c1ef 100644 --- a/gas/testsuite/gas/arm/arm.exp +++ b/gas/testsuite/gas/arm/arm.exp @@ -28,66 +28,44 @@ if {[istarget *arm*-*-*] || [istarget "xscale-*-*"]} then { run_dump_test "copro" } - run_dump_test "armv1" - - run_errors_test "armv1-bad" "-mcpu=arm7m" "ARM v1 errors" - gas_test "arm3.s" "-mcpu=arm3" $stdoptlist "Arm 3 instructions" - gas_test "arm6.s" "-mcpu=arm6" $stdoptlist "Arm 6 instructions" - gas_test "arm7dm.s" "-mcpu=arm7dm" $stdoptlist "Arm 7DM instructions" - - if {! [istarget arm*-*-aout] && ![istarget arm-*-pe]} then { - # The arm-aout port does not support Thumb mode. - gas_test "thumb.s" "-mcpu=arm7t" $stdoptlist "Thumb instructions" - } - gas_test "arch4t.s" "-march=armv4t" $stdoptlist "Arm architecture 4t instructions" - - run_dump_test "arch5tej" - gas_test "immed.s" "" $stdoptlist "immediate expressions" - gas_test "float.s" "-mcpu=arm7tdmi -mfpu=fpa" $stdoptlist "Core floating point instructions" + gas_test "offset.s" "" $stdoptlist "OFFSET_IMM regression" + run_dump_test "armv1" + run_dump_test "arch5tej" run_dump_test "fpa-monadic" - run_dump_test "fpa-dyadic" - run_dump_test "fpa-mem" - run_dump_test "vfp1xD" - run_dump_test "vfp1" - run_dump_test "vfp2" - - run_errors_test "vfp-bad" "-mfpu=vfp" "VFP errors" - run_dump_test "xscale" - run_dump_test "adrl" - - run_errors_test "req" "-mcpu=arm7m" ".req errors" - - run_dump_test "maverick" - + run_dump_test "reg-alias" + run_dump_test "maverick" run_dump_test "archv6" - run_dump_test "thumbv6" - + + run_errors_test "vfp-bad" "-mfpu=vfp" "VFP errors" + run_errors_test "req" "-mcpu=arm7m" ".req errors" + run_errors_test "armv1-bad" "-mcpu=arm7m" "ARM v1 errors" run_errors_test "r15-bad" "" "Invalid use of r15 errors" + run_errors_test "undefined" "" "Undefined local label error" if {[istarget *-*-elf*] || [istarget *-*-linux*]} then { run_dump_test "pic" - run_dump_test "mapping" } - gas_test "offset.s" "" $stdoptlist "OFFSET_IMM regression" - - run_errors_test "undefined" "" "Undefined local label error" + if {! [istarget arm*-*-aout] && ![istarget arm-*-pe]} then { + # The arm-aout port does not support Thumb mode. + gas_test "thumb.s" "-mcpu=arm7t" $stdoptlist "Thumb instructions" + } } # Not all arm targets are bi-endian, so only run this test on ones diff --git a/gas/testsuite/gas/arm/maverick.c b/gas/testsuite/gas/arm/maverick.c index 5f55e86aff2..a696edd0aa0 100644 --- a/gas/testsuite/gas/arm/maverick.c +++ b/gas/testsuite/gas/arm/maverick.c @@ -75,16 +75,16 @@ arm_cond (func_arg * arg, insn_data * data) /* The sign of an offset is actually used to determined whether the absolute value of the offset should be added or subtracted, so we - must adjust negative values so that they do not overflow: -256 is + must adjust negative values so that they do not overflow: -1024 is not valid, but -0 is distinct from +0. */ int off8s (func_arg * arg, insn_data * data) #define off8s { off8s } { int val; - char value[6]; + char value[9]; - /* Values less that -255 or between -3 and 0 are problematical. + /* Zero values are problematical. The assembler performs translations on the addressing modes for these values, meaning that we cannot just recreate the disassembler string in the LDST macro without knowing what @@ -93,26 +93,23 @@ off8s (func_arg * arg, insn_data * data) { val = get_bits (9s); } - while (val < -255 || (val > -4 && val < 1)); + while (val == -1 || val == 0); + val <<= 2; if (val < 0) { - val = - val; - val &= ~3; + val = -4 - val; sprintf (value, ", #-%i", val); data->dis_out = strdup (value); sprintf (value, ", #-%i", val); data->as_in = strdup (value); - val >>= 2; - data->bits = val; + data->bits = val >> 2; } else { - val &= ~3; sprintf (value, ", #%i", val); data->as_in = data->dis_out = strdup (value); - val >>= 2; - data->bits = val | (1 << 23); + data->bits = (val >> 2) | (1 << 23); } return 0; @@ -273,13 +270,20 @@ imm7 (func_arg *arg, insn_data *data) MCRC2 (mv ## insname, cpnum, 0, 1, opcode2, \ armreg (12), mvreg (regDSPname, 16)) +/* Move between coprocessor registers. A two operand CDP insn. */ +#define MCC2(insname, opcode1, opcode2, reg1spec, reg2spec) \ + mv_insn (insname, , \ + ((14 << 24) | ((opcode1) << 20) | \ + (4 << 8) | ((opcode2) << 5)), \ + reg1spec, comma, reg2spec) + /* Define a move from a DSP register to a DSP accumulator. */ #define MVDSPACC(insname, opcode2, regDSPname) \ - MCRC2 (mv ## insname, 6, 0, 1, opcode2, acreg (0), mvreg (regDSPname, 16)) + MCC2 (mv ## insname, 2, opcode2, acreg (12), mvreg (regDSPname, 16)) /* Define a move from a DSP accumulator to a DSP register. */ #define MVACCDSP(insname, opcode2, regDSPname) \ - MCRC2 (mv ## insname, 6, 0, 0, opcode2, mvreg (regDSPname, 0), acreg (16)) + MCC2 (mv ## insname, 1, opcode2, mvreg (regDSPname, 12), acreg (16)) /* Define move insns between a float DSP register and an ARM register. */ @@ -355,13 +359,13 @@ MVd (dlr, rdl, 0); MVd (dhr, rdh, 1); MVdx (64lr, r64l, 0); MVdx (64hr, r64h, 1); -MVfxa (al32, 32al, 0); -MVfxa (am32, 32am, 1); -MVfxa (ah32, 32ah, 2); -MVfxa (a32, 32a, 3); -MVdxa (a64, 64a, 4); -MCRC2 (mvsc32, 4, 1, 0, 7, dspsc, mvreg ("dx", 12)); -MCRC2 (mv32sc, 4, 0, 1, 7, mvreg ("dx", 12), dspsc); +MVfxa (al32, 32al, 2); +MVfxa (am32, 32am, 3); +MVfxa (ah32, 32ah, 4); +MVfxa (a32, 32a, 5); +MVdxa (a64, 64a, 6); +MCC2 (mvsc32, 2, 7, dspsc, mvreg ("dx", 12)); +MCC2 (mv32sc, 1, 7, mvreg ("dx", 12), dspsc); CDP2 (cpys, , 4, 0, 0, "f", "f"); CDP2 (cpyd, , 4, 0, 1, "d", "d"); diff --git a/gas/testsuite/gas/arm/maverick.d b/gas/testsuite/gas/arm/maverick.d index 26e82dfdb09..dcf5c7da7eb 100644 --- a/gas/testsuite/gas/arm/maverick.d +++ b/gas/testsuite/gas/arm/maverick.d @@ -8,470 +8,470 @@ Disassembly of section .text: # load_store: -0*0 <load_store> 0d ?9d ?54 ?3f ? * cfldrseq mvf5, ?\[sp, #252\] -0*4 <load_store\+0x4> 4d ?9b ?e4 ?12 ? * cfldrsmi mvf14, ?\[fp, #72\] -0*8 <load_store\+0x8> 7d ?1c ?24 ?3c ? * cfldrsvc mvf2, ?\[ip, #-240\] -0*c <load_store\+0xc> bd ?9a ?04 ?3f ? * cfldrslt mvf0, ?\[sl, #252\] -0*10 <load_store\+0x10> cd ?9b ?a4 ?12 ? * cfldrsgt mvf10, ?\[fp, #72\] -0*14 <load_store\+0x14> dd ?3c ?64 ?3c ? * cfldrsle mvf6, ?\[ip, #-240\]! -0*18 <load_store\+0x18> 9d ?ba ?04 ?3f ? * cfldrsls mvf0, ?\[sl, #252\]! -0*1c <load_store\+0x1c> 4d ?bb ?e4 ?12 ? * cfldrsmi mvf14, ?\[fp, #72\]! -0*20 <load_store\+0x20> 7d ?3c ?24 ?3c ? * cfldrsvc mvf2, ?\[ip, #-240\]! -0*24 <load_store\+0x24> bd ?ba ?04 ?3f ? * cfldrslt mvf0, ?\[sl, #252\]! -0*28 <load_store\+0x28> cc ?bb ?a4 ?12 ? * cfldrsgt mvf10, ?\[fp\], #72 -0*2c <load_store\+0x2c> dc ?3c ?64 ?3c ? * cfldrsle mvf6, ?\[ip\], #-240 -0*30 <load_store\+0x30> 9c ?ba ?04 ?3f ? * cfldrsls mvf0, ?\[sl\], #252 -0*34 <load_store\+0x34> 4c ?bb ?e4 ?12 ? * cfldrsmi mvf14, ?\[fp\], #72 -0*38 <load_store\+0x38> 7c ?3c ?24 ?3c ? * cfldrsvc mvf2, ?\[ip\], #-240 -0*3c <load_store\+0x3c> bd ?da ?04 ?3f ? * cfldrdlt mvd0, ?\[sl, #252\] -0*40 <load_store\+0x40> cd ?db ?a4 ?12 ? * cfldrdgt mvd10, ?\[fp, #72\] -0*44 <load_store\+0x44> dd ?5c ?64 ?3c ? * cfldrdle mvd6, ?\[ip, #-240\] -0*48 <load_store\+0x48> 9d ?da ?04 ?3f ? * cfldrdls mvd0, ?\[sl, #252\] -0*4c <load_store\+0x4c> 4d ?db ?e4 ?12 ? * cfldrdmi mvd14, ?\[fp, #72\] -0*50 <load_store\+0x50> 7d ?7c ?24 ?3c ? * cfldrdvc mvd2, ?\[ip, #-240\]! -0*54 <load_store\+0x54> bd ?fa ?04 ?3f ? * cfldrdlt mvd0, ?\[sl, #252\]! -0*58 <load_store\+0x58> cd ?fb ?a4 ?12 ? * cfldrdgt mvd10, ?\[fp, #72\]! -0*5c <load_store\+0x5c> dd ?7c ?64 ?3c ? * cfldrdle mvd6, ?\[ip, #-240\]! -0*60 <load_store\+0x60> 9d ?fa ?04 ?3f ? * cfldrdls mvd0, ?\[sl, #252\]! -0*64 <load_store\+0x64> 4c ?fb ?e4 ?12 ? * cfldrdmi mvd14, ?\[fp\], #72 -0*68 <load_store\+0x68> 7c ?7c ?24 ?3c ? * cfldrdvc mvd2, ?\[ip\], #-240 -0*6c <load_store\+0x6c> bc ?fa ?04 ?3f ? * cfldrdlt mvd0, ?\[sl\], #252 -0*70 <load_store\+0x70> cc ?fb ?a4 ?12 ? * cfldrdgt mvd10, ?\[fp\], #72 -0*74 <load_store\+0x74> dc ?7c ?64 ?3c ? * cfldrdle mvd6, ?\[ip\], #-240 -0*78 <load_store\+0x78> 9d ?9a ?05 ?3f ? * cfldr32ls mvfx0, ?\[sl, #252\] -0*7c <load_store\+0x7c> 4d ?9b ?e5 ?12 ? * cfldr32mi mvfx14, ?\[fp, #72\] -0*80 <load_store\+0x80> 7d ?1c ?25 ?3c ? * cfldr32vc mvfx2, ?\[ip, #-240\] -0*84 <load_store\+0x84> bd ?9a ?05 ?3f ? * cfldr32lt mvfx0, ?\[sl, #252\] -0*88 <load_store\+0x88> cd ?9b ?a5 ?12 ? * cfldr32gt mvfx10, ?\[fp, #72\] -0*8c <load_store\+0x8c> dd ?3c ?65 ?3c ? * cfldr32le mvfx6, ?\[ip, #-240\]! -0*90 <load_store\+0x90> 9d ?ba ?05 ?3f ? * cfldr32ls mvfx0, ?\[sl, #252\]! -0*94 <load_store\+0x94> 4d ?bb ?e5 ?12 ? * cfldr32mi mvfx14, ?\[fp, #72\]! -0*98 <load_store\+0x98> 7d ?3c ?25 ?3c ? * cfldr32vc mvfx2, ?\[ip, #-240\]! -0*9c <load_store\+0x9c> bd ?ba ?05 ?3f ? * cfldr32lt mvfx0, ?\[sl, #252\]! -0*a0 <load_store\+0xa0> cc ?bb ?a5 ?12 ? * cfldr32gt mvfx10, ?\[fp\], #72 -0*a4 <load_store\+0xa4> dc ?3c ?65 ?3c ? * cfldr32le mvfx6, ?\[ip\], #-240 -0*a8 <load_store\+0xa8> 9c ?ba ?05 ?3f ? * cfldr32ls mvfx0, ?\[sl\], #252 -0*ac <load_store\+0xac> 4c ?bb ?e5 ?12 ? * cfldr32mi mvfx14, ?\[fp\], #72 -0*b0 <load_store\+0xb0> 7c ?3c ?25 ?3c ? * cfldr32vc mvfx2, ?\[ip\], #-240 -0*b4 <load_store\+0xb4> bd ?da ?05 ?3f ? * cfldr64lt mvdx0, ?\[sl, #252\] -0*b8 <load_store\+0xb8> cd ?db ?a5 ?12 ? * cfldr64gt mvdx10, ?\[fp, #72\] -0*bc <load_store\+0xbc> dd ?5c ?65 ?3c ? * cfldr64le mvdx6, ?\[ip, #-240\] -0*c0 <load_store\+0xc0> 9d ?da ?05 ?3f ? * cfldr64ls mvdx0, ?\[sl, #252\] -0*c4 <load_store\+0xc4> 4d ?db ?e5 ?12 ? * cfldr64mi mvdx14, ?\[fp, #72\] -0*c8 <load_store\+0xc8> 7d ?7c ?25 ?3c ? * cfldr64vc mvdx2, ?\[ip, #-240\]! -0*cc <load_store\+0xcc> bd ?fa ?05 ?3f ? * cfldr64lt mvdx0, ?\[sl, #252\]! -0*d0 <load_store\+0xd0> cd ?fb ?a5 ?12 ? * cfldr64gt mvdx10, ?\[fp, #72\]! -0*d4 <load_store\+0xd4> dd ?7c ?65 ?3c ? * cfldr64le mvdx6, ?\[ip, #-240\]! -0*d8 <load_store\+0xd8> 9d ?fa ?05 ?3f ? * cfldr64ls mvdx0, ?\[sl, #252\]! -0*dc <load_store\+0xdc> 4c ?fb ?e5 ?12 ? * cfldr64mi mvdx14, ?\[fp\], #72 -0*e0 <load_store\+0xe0> 7c ?7c ?25 ?3c ? * cfldr64vc mvdx2, ?\[ip\], #-240 -0*e4 <load_store\+0xe4> bc ?fa ?05 ?3f ? * cfldr64lt mvdx0, ?\[sl\], #252 -0*e8 <load_store\+0xe8> cc ?fb ?a5 ?12 ? * cfldr64gt mvdx10, ?\[fp\], #72 -0*ec <load_store\+0xec> dc ?7c ?65 ?3c ? * cfldr64le mvdx6, ?\[ip\], #-240 -0*f0 <load_store\+0xf0> 9d ?8a ?04 ?3f ? * cfstrsls mvf0, ?\[sl, #252\] -0*f4 <load_store\+0xf4> 4d ?8b ?e4 ?12 ? * cfstrsmi mvf14, ?\[fp, #72\] -0*f8 <load_store\+0xf8> 7d ?0c ?24 ?3c ? * cfstrsvc mvf2, ?\[ip, #-240\] -0*fc <load_store\+0xfc> bd ?8a ?04 ?3f ? * cfstrslt mvf0, ?\[sl, #252\] -0*100 <load_store\+0x100> cd ?8b ?a4 ?12 ? * cfstrsgt mvf10, ?\[fp, #72\] -0*104 <load_store\+0x104> dd ?2c ?64 ?3c ? * cfstrsle mvf6, ?\[ip, #-240\]! -0*108 <load_store\+0x108> 9d ?aa ?04 ?3f ? * cfstrsls mvf0, ?\[sl, #252\]! -0*10c <load_store\+0x10c> 4d ?ab ?e4 ?12 ? * cfstrsmi mvf14, ?\[fp, #72\]! -0*110 <load_store\+0x110> 7d ?2c ?24 ?3c ? * cfstrsvc mvf2, ?\[ip, #-240\]! -0*114 <load_store\+0x114> bd ?aa ?04 ?3f ? * cfstrslt mvf0, ?\[sl, #252\]! -0*118 <load_store\+0x118> cc ?ab ?a4 ?12 ? * cfstrsgt mvf10, ?\[fp\], #72 -0*11c <load_store\+0x11c> dc ?2c ?64 ?3c ? * cfstrsle mvf6, ?\[ip\], #-240 -0*120 <load_store\+0x120> 9c ?aa ?04 ?3f ? * cfstrsls mvf0, ?\[sl\], #252 -0*124 <load_store\+0x124> 4c ?ab ?e4 ?12 ? * cfstrsmi mvf14, ?\[fp\], #72 -0*128 <load_store\+0x128> 7c ?2c ?24 ?3c ? * cfstrsvc mvf2, ?\[ip\], #-240 -0*12c <load_store\+0x12c> bd ?ca ?04 ?3f ? * cfstrdlt mvd0, ?\[sl, #252\] -0*130 <load_store\+0x130> cd ?cb ?a4 ?12 ? * cfstrdgt mvd10, ?\[fp, #72\] -0*134 <load_store\+0x134> dd ?4c ?64 ?3c ? * cfstrdle mvd6, ?\[ip, #-240\] -0*138 <load_store\+0x138> 9d ?ca ?04 ?3f ? * cfstrdls mvd0, ?\[sl, #252\] -0*13c <load_store\+0x13c> 4d ?cb ?e4 ?12 ? * cfstrdmi mvd14, ?\[fp, #72\] -0*140 <load_store\+0x140> 7d ?6c ?24 ?3c ? * cfstrdvc mvd2, ?\[ip, #-240\]! -0*144 <load_store\+0x144> bd ?ea ?04 ?3f ? * cfstrdlt mvd0, ?\[sl, #252\]! -0*148 <load_store\+0x148> cd ?eb ?a4 ?12 ? * cfstrdgt mvd10, ?\[fp, #72\]! -0*14c <load_store\+0x14c> dd ?6c ?64 ?3c ? * cfstrdle mvd6, ?\[ip, #-240\]! -0*150 <load_store\+0x150> 9d ?ea ?04 ?3f ? * cfstrdls mvd0, ?\[sl, #252\]! -0*154 <load_store\+0x154> 4c ?eb ?e4 ?12 ? * cfstrdmi mvd14, ?\[fp\], #72 -0*158 <load_store\+0x158> 7c ?6c ?24 ?3c ? * cfstrdvc mvd2, ?\[ip\], #-240 -0*15c <load_store\+0x15c> bc ?ea ?04 ?3f ? * cfstrdlt mvd0, ?\[sl\], #252 -0*160 <load_store\+0x160> cc ?eb ?a4 ?12 ? * cfstrdgt mvd10, ?\[fp\], #72 -0*164 <load_store\+0x164> dc ?6c ?64 ?3c ? * cfstrdle mvd6, ?\[ip\], #-240 -0*168 <load_store\+0x168> 9d ?8a ?05 ?3f ? * cfstr32ls mvfx0, ?\[sl, #252\] -0*16c <load_store\+0x16c> 4d ?8b ?e5 ?12 ? * cfstr32mi mvfx14, ?\[fp, #72\] -0*170 <load_store\+0x170> 7d ?0c ?25 ?3c ? * cfstr32vc mvfx2, ?\[ip, #-240\] -0*174 <load_store\+0x174> bd ?8a ?05 ?3f ? * cfstr32lt mvfx0, ?\[sl, #252\] -0*178 <load_store\+0x178> cd ?8b ?a5 ?12 ? * cfstr32gt mvfx10, ?\[fp, #72\] -0*17c <load_store\+0x17c> dd ?2c ?65 ?3c ? * cfstr32le mvfx6, ?\[ip, #-240\]! -0*180 <load_store\+0x180> 9d ?aa ?05 ?3f ? * cfstr32ls mvfx0, ?\[sl, #252\]! -0*184 <load_store\+0x184> 4d ?ab ?e5 ?12 ? * cfstr32mi mvfx14, ?\[fp, #72\]! -0*188 <load_store\+0x188> 7d ?2c ?25 ?3c ? * cfstr32vc mvfx2, ?\[ip, #-240\]! -0*18c <load_store\+0x18c> bd ?aa ?05 ?3f ? * cfstr32lt mvfx0, ?\[sl, #252\]! -0*190 <load_store\+0x190> cc ?ab ?a5 ?12 ? * cfstr32gt mvfx10, ?\[fp\], #72 -0*194 <load_store\+0x194> dc ?2c ?65 ?3c ? * cfstr32le mvfx6, ?\[ip\], #-240 -0*198 <load_store\+0x198> 9c ?aa ?05 ?3f ? * cfstr32ls mvfx0, ?\[sl\], #252 -0*19c <load_store\+0x19c> 4c ?ab ?e5 ?12 ? * cfstr32mi mvfx14, ?\[fp\], #72 -0*1a0 <load_store\+0x1a0> 7c ?2c ?25 ?3c ? * cfstr32vc mvfx2, ?\[ip\], #-240 -0*1a4 <load_store\+0x1a4> bd ?ca ?05 ?3f ? * cfstr64lt mvdx0, ?\[sl, #252\] -0*1a8 <load_store\+0x1a8> cd ?cb ?a5 ?12 ? * cfstr64gt mvdx10, ?\[fp, #72\] -0*1ac <load_store\+0x1ac> dd ?4c ?65 ?3c ? * cfstr64le mvdx6, ?\[ip, #-240\] -0*1b0 <load_store\+0x1b0> 9d ?ca ?05 ?3f ? * cfstr64ls mvdx0, ?\[sl, #252\] -0*1b4 <load_store\+0x1b4> 4d ?cb ?e5 ?12 ? * cfstr64mi mvdx14, ?\[fp, #72\] -0*1b8 <load_store\+0x1b8> 7d ?6c ?25 ?3c ? * cfstr64vc mvdx2, ?\[ip, #-240\]! -0*1bc <load_store\+0x1bc> bd ?ea ?05 ?3f ? * cfstr64lt mvdx0, ?\[sl, #252\]! -0*1c0 <load_store\+0x1c0> cd ?eb ?a5 ?12 ? * cfstr64gt mvdx10, ?\[fp, #72\]! -0*1c4 <load_store\+0x1c4> dd ?6c ?65 ?3c ? * cfstr64le mvdx6, ?\[ip, #-240\]! -0*1c8 <load_store\+0x1c8> 9d ?ea ?05 ?3f ? * cfstr64ls mvdx0, ?\[sl, #252\]! -0*1cc <load_store\+0x1cc> 4c ?eb ?e5 ?12 ? * cfstr64mi mvdx14, ?\[fp\], #72 -0*1d0 <load_store\+0x1d0> 7c ?6c ?25 ?3c ? * cfstr64vc mvdx2, ?\[ip\], #-240 -0*1d4 <load_store\+0x1d4> bc ?ea ?05 ?3f ? * cfstr64lt mvdx0, ?\[sl\], #252 -0*1d8 <load_store\+0x1d8> cc ?eb ?a5 ?12 ? * cfstr64gt mvdx10, ?\[fp\], #72 -0*1dc <load_store\+0x1dc> dc ?6c ?65 ?3c ? * cfstr64le mvdx6, ?\[ip\], #-240 +0*0 <load_store> 0d ?9d ?54 ?ff ? * cfldrseq mvf5, ?\[sp, #1020\] +0*4 <load_store\+0x4> 4d ?9b ?e4 ?49 ? * cfldrsmi mvf14, ?\[fp, #292\] +0*8 <load_store\+0x8> 7d ?1c ?24 ?ef ? * cfldrsvc mvf2, ?\[ip, #-956\] +0*c <load_store\+0xc> bd ?1a ?04 ?ff ? * cfldrslt mvf0, ?\[sl, #-1020\] +0*10 <load_store\+0x10> 3d ?11 ?c4 ?27 ? * cfldrscc mvf12, ?\[r1, #-156\] +0*14 <load_store\+0x14> ed ?bf ?d4 ?68 ? * cfldrs mvf13, ?\[pc, #416\]! +0*18 <load_store\+0x18> 2d ?30 ?94 ?ff ? * cfldrscs mvf9, ?\[r0, #-1020\]! +0*1c <load_store\+0x1c> 9d ?31 ?44 ?27 ? * cfldrsls mvf4, ?\[r1, #-156\]! +0*20 <load_store\+0x20> dd ?bf ?74 ?68 ? * cfldrsle mvf7, ?\[pc, #416\]! +0*24 <load_store\+0x24> 6d ?30 ?b4 ?ff ? * cfldrsvs mvf11, ?\[r0, #-1020\]! +0*28 <load_store\+0x28> 3c ?31 ?c4 ?27 ? * cfldrscc mvf12, ?\[r1\], #-156 +0*2c <load_store\+0x2c> ec ?bf ?d4 ?68 ? * cfldrs mvf13, ?\[pc\], #416 +0*30 <load_store\+0x30> 2c ?30 ?94 ?ff ? * cfldrscs mvf9, ?\[r0\], #-1020 +0*34 <load_store\+0x34> 9c ?31 ?44 ?27 ? * cfldrsls mvf4, ?\[r1\], #-156 +0*38 <load_store\+0x38> dc ?bf ?74 ?68 ? * cfldrsle mvf7, ?\[pc\], #416 +0*3c <load_store\+0x3c> 6d ?50 ?b4 ?ff ? * cfldrdvs mvd11, ?\[r0, #-1020\] +0*40 <load_store\+0x40> 3d ?51 ?c4 ?27 ? * cfldrdcc mvd12, ?\[r1, #-156\] +0*44 <load_store\+0x44> ed ?df ?d4 ?68 ? * cfldrd mvd13, ?\[pc, #416\] +0*48 <load_store\+0x48> 2d ?50 ?94 ?ff ? * cfldrdcs mvd9, ?\[r0, #-1020\] +0*4c <load_store\+0x4c> 9d ?51 ?44 ?27 ? * cfldrdls mvd4, ?\[r1, #-156\] +0*50 <load_store\+0x50> dd ?ff ?74 ?68 ? * cfldrdle mvd7, ?\[pc, #416\]! +0*54 <load_store\+0x54> 6d ?70 ?b4 ?ff ? * cfldrdvs mvd11, ?\[r0, #-1020\]! +0*58 <load_store\+0x58> 3d ?71 ?c4 ?27 ? * cfldrdcc mvd12, ?\[r1, #-156\]! +0*5c <load_store\+0x5c> ed ?ff ?d4 ?68 ? * cfldrd mvd13, ?\[pc, #416\]! +0*60 <load_store\+0x60> 2d ?70 ?94 ?ff ? * cfldrdcs mvd9, ?\[r0, #-1020\]! +0*64 <load_store\+0x64> 9c ?71 ?44 ?27 ? * cfldrdls mvd4, ?\[r1\], #-156 +0*68 <load_store\+0x68> dc ?ff ?74 ?68 ? * cfldrdle mvd7, ?\[pc\], #416 +0*6c <load_store\+0x6c> 6c ?70 ?b4 ?ff ? * cfldrdvs mvd11, ?\[r0\], #-1020 +0*70 <load_store\+0x70> 3c ?71 ?c4 ?27 ? * cfldrdcc mvd12, ?\[r1\], #-156 +0*74 <load_store\+0x74> ec ?ff ?d4 ?68 ? * cfldrd mvd13, ?\[pc\], #416 +0*78 <load_store\+0x78> 2d ?10 ?95 ?ff ? * cfldr32cs mvfx9, ?\[r0, #-1020\] +0*7c <load_store\+0x7c> 9d ?11 ?45 ?27 ? * cfldr32ls mvfx4, ?\[r1, #-156\] +0*80 <load_store\+0x80> dd ?9f ?75 ?68 ? * cfldr32le mvfx7, ?\[pc, #416\] +0*84 <load_store\+0x84> 6d ?10 ?b5 ?ff ? * cfldr32vs mvfx11, ?\[r0, #-1020\] +0*88 <load_store\+0x88> 3d ?11 ?c5 ?27 ? * cfldr32cc mvfx12, ?\[r1, #-156\] +0*8c <load_store\+0x8c> ed ?bf ?d5 ?68 ? * cfldr32 mvfx13, ?\[pc, #416\]! +0*90 <load_store\+0x90> 2d ?30 ?95 ?ff ? * cfldr32cs mvfx9, ?\[r0, #-1020\]! +0*94 <load_store\+0x94> 9d ?31 ?45 ?27 ? * cfldr32ls mvfx4, ?\[r1, #-156\]! +0*98 <load_store\+0x98> dd ?bf ?75 ?68 ? * cfldr32le mvfx7, ?\[pc, #416\]! +0*9c <load_store\+0x9c> 6d ?30 ?b5 ?ff ? * cfldr32vs mvfx11, ?\[r0, #-1020\]! +0*a0 <load_store\+0xa0> 3c ?31 ?c5 ?27 ? * cfldr32cc mvfx12, ?\[r1\], #-156 +0*a4 <load_store\+0xa4> ec ?bf ?d5 ?68 ? * cfldr32 mvfx13, ?\[pc\], #416 +0*a8 <load_store\+0xa8> 2c ?30 ?95 ?ff ? * cfldr32cs mvfx9, ?\[r0\], #-1020 +0*ac <load_store\+0xac> 9c ?31 ?45 ?27 ? * cfldr32ls mvfx4, ?\[r1\], #-156 +0*b0 <load_store\+0xb0> dc ?bf ?75 ?68 ? * cfldr32le mvfx7, ?\[pc\], #416 +0*b4 <load_store\+0xb4> 6d ?50 ?b5 ?ff ? * cfldr64vs mvdx11, ?\[r0, #-1020\] +0*b8 <load_store\+0xb8> 3d ?51 ?c5 ?27 ? * cfldr64cc mvdx12, ?\[r1, #-156\] +0*bc <load_store\+0xbc> ed ?df ?d5 ?68 ? * cfldr64 mvdx13, ?\[pc, #416\] +0*c0 <load_store\+0xc0> 2d ?50 ?95 ?ff ? * cfldr64cs mvdx9, ?\[r0, #-1020\] +0*c4 <load_store\+0xc4> 9d ?51 ?45 ?27 ? * cfldr64ls mvdx4, ?\[r1, #-156\] +0*c8 <load_store\+0xc8> dd ?ff ?75 ?68 ? * cfldr64le mvdx7, ?\[pc, #416\]! +0*cc <load_store\+0xcc> 6d ?70 ?b5 ?ff ? * cfldr64vs mvdx11, ?\[r0, #-1020\]! +0*d0 <load_store\+0xd0> 3d ?71 ?c5 ?27 ? * cfldr64cc mvdx12, ?\[r1, #-156\]! +0*d4 <load_store\+0xd4> ed ?ff ?d5 ?68 ? * cfldr64 mvdx13, ?\[pc, #416\]! +0*d8 <load_store\+0xd8> 2d ?70 ?95 ?ff ? * cfldr64cs mvdx9, ?\[r0, #-1020\]! +0*dc <load_store\+0xdc> 9c ?71 ?45 ?27 ? * cfldr64ls mvdx4, ?\[r1\], #-156 +0*e0 <load_store\+0xe0> dc ?ff ?75 ?68 ? * cfldr64le mvdx7, ?\[pc\], #416 +0*e4 <load_store\+0xe4> 6c ?70 ?b5 ?ff ? * cfldr64vs mvdx11, ?\[r0\], #-1020 +0*e8 <load_store\+0xe8> 3c ?71 ?c5 ?27 ? * cfldr64cc mvdx12, ?\[r1\], #-156 +0*ec <load_store\+0xec> ec ?ff ?d5 ?68 ? * cfldr64 mvdx13, ?\[pc\], #416 +0*f0 <load_store\+0xf0> 2d ?00 ?94 ?ff ? * cfstrscs mvf9, ?\[r0, #-1020\] +0*f4 <load_store\+0xf4> 9d ?01 ?44 ?27 ? * cfstrsls mvf4, ?\[r1, #-156\] +0*f8 <load_store\+0xf8> dd ?8f ?74 ?68 ? * cfstrsle mvf7, ?\[pc, #416\] +0*fc <load_store\+0xfc> 6d ?00 ?b4 ?ff ? * cfstrsvs mvf11, ?\[r0, #-1020\] +0*100 <load_store\+0x100> 3d ?01 ?c4 ?27 ? * cfstrscc mvf12, ?\[r1, #-156\] +0*104 <load_store\+0x104> ed ?af ?d4 ?68 ? * cfstrs mvf13, ?\[pc, #416\]! +0*108 <load_store\+0x108> 2d ?20 ?94 ?ff ? * cfstrscs mvf9, ?\[r0, #-1020\]! +0*10c <load_store\+0x10c> 9d ?21 ?44 ?27 ? * cfstrsls mvf4, ?\[r1, #-156\]! +0*110 <load_store\+0x110> dd ?af ?74 ?68 ? * cfstrsle mvf7, ?\[pc, #416\]! +0*114 <load_store\+0x114> 6d ?20 ?b4 ?ff ? * cfstrsvs mvf11, ?\[r0, #-1020\]! +0*118 <load_store\+0x118> 3c ?21 ?c4 ?27 ? * cfstrscc mvf12, ?\[r1\], #-156 +0*11c <load_store\+0x11c> ec ?af ?d4 ?68 ? * cfstrs mvf13, ?\[pc\], #416 +0*120 <load_store\+0x120> 2c ?20 ?94 ?ff ? * cfstrscs mvf9, ?\[r0\], #-1020 +0*124 <load_store\+0x124> 9c ?21 ?44 ?27 ? * cfstrsls mvf4, ?\[r1\], #-156 +0*128 <load_store\+0x128> dc ?af ?74 ?68 ? * cfstrsle mvf7, ?\[pc\], #416 +0*12c <load_store\+0x12c> 6d ?40 ?b4 ?ff ? * cfstrdvs mvd11, ?\[r0, #-1020\] +0*130 <load_store\+0x130> 3d ?41 ?c4 ?27 ? * cfstrdcc mvd12, ?\[r1, #-156\] +0*134 <load_store\+0x134> ed ?cf ?d4 ?68 ? * cfstrd mvd13, ?\[pc, #416\] +0*138 <load_store\+0x138> 2d ?40 ?94 ?ff ? * cfstrdcs mvd9, ?\[r0, #-1020\] +0*13c <load_store\+0x13c> 9d ?41 ?44 ?27 ? * cfstrdls mvd4, ?\[r1, #-156\] +0*140 <load_store\+0x140> dd ?ef ?74 ?68 ? * cfstrdle mvd7, ?\[pc, #416\]! +0*144 <load_store\+0x144> 6d ?60 ?b4 ?ff ? * cfstrdvs mvd11, ?\[r0, #-1020\]! +0*148 <load_store\+0x148> 3d ?61 ?c4 ?27 ? * cfstrdcc mvd12, ?\[r1, #-156\]! +0*14c <load_store\+0x14c> ed ?ef ?d4 ?68 ? * cfstrd mvd13, ?\[pc, #416\]! +0*150 <load_store\+0x150> 2d ?60 ?94 ?ff ? * cfstrdcs mvd9, ?\[r0, #-1020\]! +0*154 <load_store\+0x154> 9c ?61 ?44 ?27 ? * cfstrdls mvd4, ?\[r1\], #-156 +0*158 <load_store\+0x158> dc ?ef ?74 ?68 ? * cfstrdle mvd7, ?\[pc\], #416 +0*15c <load_store\+0x15c> 6c ?60 ?b4 ?ff ? * cfstrdvs mvd11, ?\[r0\], #-1020 +0*160 <load_store\+0x160> 3c ?61 ?c4 ?27 ? * cfstrdcc mvd12, ?\[r1\], #-156 +0*164 <load_store\+0x164> ec ?ef ?d4 ?68 ? * cfstrd mvd13, ?\[pc\], #416 +0*168 <load_store\+0x168> 2d ?00 ?95 ?ff ? * cfstr32cs mvfx9, ?\[r0, #-1020\] +0*16c <load_store\+0x16c> 9d ?01 ?45 ?27 ? * cfstr32ls mvfx4, ?\[r1, #-156\] +0*170 <load_store\+0x170> dd ?8f ?75 ?68 ? * cfstr32le mvfx7, ?\[pc, #416\] +0*174 <load_store\+0x174> 6d ?00 ?b5 ?ff ? * cfstr32vs mvfx11, ?\[r0, #-1020\] +0*178 <load_store\+0x178> 3d ?01 ?c5 ?27 ? * cfstr32cc mvfx12, ?\[r1, #-156\] +0*17c <load_store\+0x17c> ed ?af ?d5 ?68 ? * cfstr32 mvfx13, ?\[pc, #416\]! +0*180 <load_store\+0x180> 2d ?20 ?95 ?ff ? * cfstr32cs mvfx9, ?\[r0, #-1020\]! +0*184 <load_store\+0x184> 9d ?21 ?45 ?27 ? * cfstr32ls mvfx4, ?\[r1, #-156\]! +0*188 <load_store\+0x188> dd ?af ?75 ?68 ? * cfstr32le mvfx7, ?\[pc, #416\]! +0*18c <load_store\+0x18c> 6d ?20 ?b5 ?ff ? * cfstr32vs mvfx11, ?\[r0, #-1020\]! +0*190 <load_store\+0x190> 3c ?21 ?c5 ?27 ? * cfstr32cc mvfx12, ?\[r1\], #-156 +0*194 <load_store\+0x194> ec ?af ?d5 ?68 ? * cfstr32 mvfx13, ?\[pc\], #416 +0*198 <load_store\+0x198> 2c ?20 ?95 ?ff ? * cfstr32cs mvfx9, ?\[r0\], #-1020 +0*19c <load_store\+0x19c> 9c ?21 ?45 ?27 ? * cfstr32ls mvfx4, ?\[r1\], #-156 +0*1a0 <load_store\+0x1a0> dc ?af ?75 ?68 ? * cfstr32le mvfx7, ?\[pc\], #416 +0*1a4 <load_store\+0x1a4> 6d ?40 ?b5 ?ff ? * cfstr64vs mvdx11, ?\[r0, #-1020\] +0*1a8 <load_store\+0x1a8> 3d ?41 ?c5 ?27 ? * cfstr64cc mvdx12, ?\[r1, #-156\] +0*1ac <load_store\+0x1ac> ed ?cf ?d5 ?68 ? * cfstr64 mvdx13, ?\[pc, #416\] +0*1b0 <load_store\+0x1b0> 2d ?40 ?95 ?ff ? * cfstr64cs mvdx9, ?\[r0, #-1020\] +0*1b4 <load_store\+0x1b4> 9d ?41 ?45 ?27 ? * cfstr64ls mvdx4, ?\[r1, #-156\] +0*1b8 <load_store\+0x1b8> dd ?ef ?75 ?68 ? * cfstr64le mvdx7, ?\[pc, #416\]! +0*1bc <load_store\+0x1bc> 6d ?60 ?b5 ?ff ? * cfstr64vs mvdx11, ?\[r0, #-1020\]! +0*1c0 <load_store\+0x1c0> 3d ?61 ?c5 ?27 ? * cfstr64cc mvdx12, ?\[r1, #-156\]! +0*1c4 <load_store\+0x1c4> ed ?ef ?d5 ?68 ? * cfstr64 mvdx13, ?\[pc, #416\]! +0*1c8 <load_store\+0x1c8> 2d ?60 ?95 ?ff ? * cfstr64cs mvdx9, ?\[r0, #-1020\]! +0*1cc <load_store\+0x1cc> 9c ?61 ?45 ?27 ? * cfstr64ls mvdx4, ?\[r1\], #-156 +0*1d0 <load_store\+0x1d0> dc ?ef ?75 ?68 ? * cfstr64le mvdx7, ?\[pc\], #416 +0*1d4 <load_store\+0x1d4> 6c ?60 ?b5 ?ff ? * cfstr64vs mvdx11, ?\[r0\], #-1020 +0*1d8 <load_store\+0x1d8> 3c ?61 ?c5 ?27 ? * cfstr64cc mvdx12, ?\[r1\], #-156 +0*1dc <load_store\+0x1dc> ec ?ef ?d5 ?68 ? * cfstr64 mvdx13, ?\[pc\], #416 # move: -0*1e0 <move> 9e ?00 ?a4 ?50 ? * cfmvsrls mvf0, ?sl -0*1e4 <move\+0x4> ee ?0a ?44 ?50 ? * cfmvsr mvf10, ?r4 -0*1e8 <move\+0x8> 4e ?0e ?b4 ?50 ? * cfmvsrmi mvf14, ?fp -0*1ec <move\+0xc> 8e ?0d ?54 ?50 ? * cfmvsrhi mvf13, ?r5 -0*1f0 <move\+0x10> 2e ?01 ?64 ?50 ? * cfmvsrcs mvf1, ?r6 -0*1f4 <move\+0x14> 6e ?10 ?34 ?50 ? * cfmvrsvs r3, ?mvf0 -0*1f8 <move\+0x18> 7e ?1e ?d4 ?50 ? * cfmvrsvc sp, ?mvf14 -0*1fc <move\+0x1c> 3e ?1a ?e4 ?50 ? * cfmvrscc lr, ?mvf10 -0*200 <move\+0x20> 1e ?1f ?84 ?50 ? * cfmvrsne r8, ?mvf15 -0*204 <move\+0x24> de ?1b ?f4 ?50 ? * cfmvrsle pc, ?mvf11 -0*208 <move\+0x28> 4e ?02 ?34 ?10 ? * cfmvdlrmi mvd2, ?r3 -0*20c <move\+0x2c> 0e ?05 ?d4 ?10 ? * cfmvdlreq mvd5, ?sp -0*210 <move\+0x30> ae ?09 ?e4 ?10 ? * cfmvdlrge mvd9, ?lr -0*214 <move\+0x34> ee ?03 ?84 ?10 ? * cfmvdlr mvd3, ?r8 -0*218 <move\+0x38> de ?07 ?f4 ?10 ? * cfmvdlrle mvd7, ?pc -0*21c <move\+0x3c> 1e ?16 ?64 ?10 ? * cfmvrdlne r6, ?mvd6 -0*220 <move\+0x40> be ?17 ?04 ?10 ? * cfmvrdllt r0, ?mvd7 -0*224 <move\+0x44> 5e ?13 ?74 ?10 ? * cfmvrdlpl r7, ?mvd3 -0*228 <move\+0x48> ce ?11 ?14 ?10 ? * cfmvrdlgt r1, ?mvd1 -0*22c <move\+0x4c> 8e ?1d ?24 ?10 ? * cfmvrdlhi r2, ?mvd13 -0*230 <move\+0x50> 6e ?0b ?64 ?30 ? * cfmvdhrvs mvd11, ?r6 -0*234 <move\+0x54> 2e ?09 ?04 ?30 ? * cfmvdhrcs mvd9, ?r0 -0*238 <move\+0x58> 5e ?0f ?74 ?30 ? * cfmvdhrpl mvd15, ?r7 -0*23c <move\+0x5c> 9e ?04 ?14 ?30 ? * cfmvdhrls mvd4, ?r1 -0*240 <move\+0x60> 3e ?08 ?24 ?30 ? * cfmvdhrcc mvd8, ?r2 -0*244 <move\+0x64> 7e ?11 ?f4 ?30 ? * cfmvrdhvc pc, ?mvd1 -0*248 <move\+0x68> ce ?1b ?94 ?30 ? * cfmvrdhgt r9, ?mvd11 -0*24c <move\+0x6c> 0e ?15 ?a4 ?30 ? * cfmvrdheq sl, ?mvd5 -0*250 <move\+0x70> ee ?1c ?44 ?30 ? * cfmvrdh r4, ?mvd12 -0*254 <move\+0x74> ae ?18 ?b4 ?30 ? * cfmvrdhge fp, ?mvd8 -0*258 <move\+0x78> ee ?0d ?f5 ?10 ? * cfmv64lr mvdx13, ?pc -0*25c <move\+0x7c> be ?04 ?95 ?10 ? * cfmv64lrlt mvdx4, ?r9 -0*260 <move\+0x80> 9e ?00 ?a5 ?10 ? * cfmv64lrls mvdx0, ?sl -0*264 <move\+0x84> ee ?0a ?45 ?10 ? * cfmv64lr mvdx10, ?r4 -0*268 <move\+0x88> 4e ?0e ?b5 ?10 ? * cfmv64lrmi mvdx14, ?fp -0*26c <move\+0x8c> 8e ?17 ?25 ?10 ? * cfmvr64lhi r2, ?mvdx7 -0*270 <move\+0x90> 2e ?1c ?c5 ?10 ? * cfmvr64lcs ip, ?mvdx12 -0*274 <move\+0x94> 6e ?10 ?35 ?10 ? * cfmvr64lvs r3, ?mvdx0 -0*278 <move\+0x98> 7e ?1e ?d5 ?10 ? * cfmvr64lvc sp, ?mvdx14 -0*27c <move\+0x9c> 3e ?1a ?e5 ?10 ? * cfmvr64lcc lr, ?mvdx10 -0*280 <move\+0xa0> 1e ?08 ?25 ?30 ? * cfmv64hrne mvdx8, ?r2 -0*284 <move\+0xa4> de ?06 ?c5 ?30 ? * cfmv64hrle mvdx6, ?ip -0*288 <move\+0xa8> 4e ?02 ?35 ?30 ? * cfmv64hrmi mvdx2, ?r3 -0*28c <move\+0xac> 0e ?05 ?d5 ?30 ? * cfmv64hreq mvdx5, ?sp -0*290 <move\+0xb0> ae ?09 ?e5 ?30 ? * cfmv64hrge mvdx9, ?lr -0*294 <move\+0xb4> ee ?18 ?b5 ?30 ? * cfmvr64h fp, ?mvdx8 -0*298 <move\+0xb8> de ?12 ?55 ?30 ? * cfmvr64hle r5, ?mvdx2 -0*29c <move\+0xbc> 1e ?16 ?65 ?30 ? * cfmvr64hne r6, ?mvdx6 -0*2a0 <move\+0xc0> be ?17 ?05 ?30 ? * cfmvr64hlt r0, ?mvdx7 -0*2a4 <move\+0xc4> 5e ?13 ?75 ?30 ? * cfmvr64hpl r7, ?mvdx3 -0*2a8 <move\+0xc8> ce ?21 ?14 ?40 ? * cfmval32gt mvax1, ?mvfx1 -0*2ac <move\+0xcc> 8e ?2d ?34 ?40 ? * cfmval32hi mvax3, ?mvfx13 -0*2b0 <move\+0xd0> 6e ?24 ?34 ?40 ? * cfmval32vs mvax3, ?mvfx4 -0*2b4 <move\+0xd4> 2e ?20 ?14 ?40 ? * cfmval32cs mvax1, ?mvfx0 -0*2b8 <move\+0xd8> 5e ?2a ?34 ?40 ? * cfmval32pl mvax3, ?mvfx10 -0*2bc <move\+0xdc> 9e ?11 ?44 ?40 ? * cfmv32alls mvfx4, ?mvax1 -0*2c0 <move\+0xe0> 3e ?13 ?84 ?40 ? * cfmv32alcc mvfx8, ?mvax3 -0*2c4 <move\+0xe4> 7e ?13 ?24 ?40 ? * cfmv32alvc mvfx2, ?mvax3 -0*2c8 <move\+0xe8> ce ?11 ?64 ?40 ? * cfmv32algt mvfx6, ?mvax1 -0*2cc <move\+0xec> 0e ?13 ?74 ?40 ? * cfmv32aleq mvfx7, ?mvax3 -0*2d0 <move\+0xf0> ee ?2c ?24 ?60 ? * cfmvam32 mvax2, ?mvfx12 -0*2d4 <move\+0xf4> ae ?28 ?34 ?60 ? * cfmvam32ge mvax3, ?mvfx8 -0*2d8 <move\+0xf8> ee ?26 ?24 ?60 ? * cfmvam32 mvax2, ?mvfx6 -0*2dc <move\+0xfc> be ?22 ?24 ?60 ? * cfmvam32lt mvax2, ?mvfx2 -0*2e0 <move\+0x100> 9e ?25 ?04 ?60 ? * cfmvam32ls mvax0, ?mvfx5 -0*2e4 <move\+0x104> ee ?12 ?a4 ?60 ? * cfmv32am mvfx10, ?mvax2 -0*2e8 <move\+0x108> 4e ?13 ?e4 ?60 ? * cfmv32ammi mvfx14, ?mvax3 -0*2ec <move\+0x10c> 8e ?12 ?d4 ?60 ? * cfmv32amhi mvfx13, ?mvax2 -0*2f0 <move\+0x110> 2e ?12 ?14 ?60 ? * cfmv32amcs mvfx1, ?mvax2 -0*2f4 <move\+0x114> 6e ?10 ?b4 ?60 ? * cfmv32amvs mvfx11, ?mvax0 -0*2f8 <move\+0x118> 7e ?2e ?34 ?80 ? * cfmvah32vc mvax3, ?mvfx14 -0*2fc <move\+0x11c> 3e ?2a ?04 ?80 ? * cfmvah32cc mvax0, ?mvfx10 -0*300 <move\+0x120> 1e ?2f ?14 ?80 ? * cfmvah32ne mvax1, ?mvfx15 -0*304 <move\+0x124> de ?2b ?04 ?80 ? * cfmvah32le mvax0, ?mvfx11 -0*308 <move\+0x128> 4e ?29 ?04 ?80 ? * cfmvah32mi mvax0, ?mvfx9 -0*30c <move\+0x12c> 0e ?13 ?54 ?80 ? * cfmv32aheq mvfx5, ?mvax3 -0*310 <move\+0x130> ae ?10 ?94 ?80 ? * cfmv32ahge mvfx9, ?mvax0 -0*314 <move\+0x134> ee ?11 ?34 ?80 ? * cfmv32ah mvfx3, ?mvax1 -0*318 <move\+0x138> de ?10 ?74 ?80 ? * cfmv32ahle mvfx7, ?mvax0 -0*31c <move\+0x13c> 1e ?10 ?c4 ?80 ? * cfmv32ahne mvfx12, ?mvax0 -0*320 <move\+0x140> be ?27 ?04 ?a0 ? * cfmva32lt mvax0, ?mvfx7 -0*324 <move\+0x144> 5e ?23 ?24 ?a0 ? * cfmva32pl mvax2, ?mvfx3 -0*328 <move\+0x148> ce ?21 ?14 ?a0 ? * cfmva32gt mvax1, ?mvfx1 -0*32c <move\+0x14c> 8e ?2d ?34 ?a0 ? * cfmva32hi mvax3, ?mvfx13 -0*330 <move\+0x150> 6e ?24 ?34 ?a0 ? * cfmva32vs mvax3, ?mvfx4 -0*334 <move\+0x154> 2e ?10 ?94 ?a0 ? * cfmv32acs mvfx9, ?mvax0 -0*338 <move\+0x158> 5e ?12 ?f4 ?a0 ? * cfmv32apl mvfx15, ?mvax2 -0*33c <move\+0x15c> 9e ?11 ?44 ?a0 ? * cfmv32als mvfx4, ?mvax1 -0*340 <move\+0x160> 3e ?13 ?84 ?a0 ? * cfmv32acc mvfx8, ?mvax3 -0*344 <move\+0x164> 7e ?13 ?24 ?a0 ? * cfmv32avc mvfx2, ?mvax3 -0*348 <move\+0x168> ce ?2b ?04 ?c0 ? * cfmva64gt mvax0, ?mvdx11 -0*34c <move\+0x16c> 0e ?25 ?14 ?c0 ? * cfmva64eq mvax1, ?mvdx5 -0*350 <move\+0x170> ee ?2c ?24 ?c0 ? * cfmva64 mvax2, ?mvdx12 -0*354 <move\+0x174> ae ?28 ?34 ?c0 ? * cfmva64ge mvax3, ?mvdx8 -0*358 <move\+0x178> ee ?26 ?24 ?c0 ? * cfmva64 mvax2, ?mvdx6 -0*35c <move\+0x17c> be ?10 ?44 ?c0 ? * cfmv64alt mvdx4, ?mvax0 -0*360 <move\+0x180> 9e ?11 ?04 ?c0 ? * cfmv64als mvdx0, ?mvax1 -0*364 <move\+0x184> ee ?12 ?a4 ?c0 ? * cfmv64a mvdx10, ?mvax2 -0*368 <move\+0x188> 4e ?13 ?e4 ?c0 ? * cfmv64ami mvdx14, ?mvax3 -0*36c <move\+0x18c> 8e ?12 ?d4 ?c0 ? * cfmv64ahi mvdx13, ?mvax2 -0*370 <move\+0x190> 2e ?20 ?c4 ?e0 ? * cfmvsc32cs dspsc, ?mvdx12 -0*374 <move\+0x194> 6e ?20 ?04 ?e0 ? * cfmvsc32vs dspsc, ?mvdx0 -0*378 <move\+0x198> 7e ?20 ?e4 ?e0 ? * cfmvsc32vc dspsc, ?mvdx14 -0*37c <move\+0x19c> 3e ?20 ?a4 ?e0 ? * cfmvsc32cc dspsc, ?mvdx10 -0*380 <move\+0x1a0> 1e ?20 ?f4 ?e0 ? * cfmvsc32ne dspsc, ?mvdx15 -0*384 <move\+0x1a4> de ?10 ?64 ?e0 ? * cfmv32scle mvdx6, ?dspsc -0*388 <move\+0x1a8> 4e ?10 ?24 ?e0 ? * cfmv32scmi mvdx2, ?dspsc -0*38c <move\+0x1ac> 0e ?10 ?54 ?e0 ? * cfmv32sceq mvdx5, ?dspsc -0*390 <move\+0x1b0> ae ?10 ?94 ?e0 ? * cfmv32scge mvdx9, ?dspsc -0*394 <move\+0x1b4> ee ?10 ?34 ?e0 ? * cfmv32sc mvdx3, ?dspsc -0*398 <move\+0x1b8> de ?02 ?74 ?00 ? * cfcpysle mvf7, ?mvf2 -0*39c <move\+0x1bc> 1e ?06 ?c4 ?00 ? * cfcpysne mvf12, ?mvf6 -0*3a0 <move\+0x1c0> be ?07 ?04 ?00 ? * cfcpyslt mvf0, ?mvf7 -0*3a4 <move\+0x1c4> 5e ?03 ?e4 ?00 ? * cfcpyspl mvf14, ?mvf3 -0*3a8 <move\+0x1c8> ce ?01 ?a4 ?00 ? * cfcpysgt mvf10, ?mvf1 -0*3ac <move\+0x1cc> 8e ?0d ?f4 ?20 ? * cfcpydhi mvd15, ?mvd13 -0*3b0 <move\+0x1d0> 6e ?04 ?b4 ?20 ? * cfcpydvs mvd11, ?mvd4 -0*3b4 <move\+0x1d4> 2e ?00 ?94 ?20 ? * cfcpydcs mvd9, ?mvd0 -0*3b8 <move\+0x1d8> 5e ?0a ?f4 ?20 ? * cfcpydpl mvd15, ?mvd10 -0*3bc <move\+0x1dc> 9e ?0e ?44 ?20 ? * cfcpydls mvd4, ?mvd14 +0*1e0 <move> 2e ?09 ?04 ?50 ? * cfmvsrcs mvf9, ?r0 +0*1e4 <move\+0x4> 5e ?0f ?74 ?50 ? * cfmvsrpl mvf15, ?r7 +0*1e8 <move\+0x8> 9e ?04 ?14 ?50 ? * cfmvsrls mvf4, ?r1 +0*1ec <move\+0xc> 3e ?08 ?24 ?50 ? * cfmvsrcc mvf8, ?r2 +0*1f0 <move\+0x10> 7e ?02 ?c4 ?50 ? * cfmvsrvc mvf2, ?ip +0*1f4 <move\+0x14> ce ?1b ?94 ?50 ? * cfmvrsgt r9, ?mvf11 +0*1f8 <move\+0x18> 0e ?15 ?a4 ?50 ? * cfmvrseq sl, ?mvf5 +0*1fc <move\+0x1c> ee ?1c ?44 ?50 ? * cfmvrs r4, ?mvf12 +0*200 <move\+0x20> ae ?18 ?b4 ?50 ? * cfmvrsge fp, ?mvf8 +0*204 <move\+0x24> ee ?16 ?54 ?50 ? * cfmvrs r5, ?mvf6 +0*208 <move\+0x28> be ?04 ?94 ?10 ? * cfmvdlrlt mvd4, ?r9 +0*20c <move\+0x2c> 9e ?00 ?a4 ?10 ? * cfmvdlrls mvd0, ?sl +0*210 <move\+0x30> ee ?0a ?44 ?10 ? * cfmvdlr mvd10, ?r4 +0*214 <move\+0x34> 4e ?0e ?b4 ?10 ? * cfmvdlrmi mvd14, ?fp +0*218 <move\+0x38> 8e ?0d ?54 ?10 ? * cfmvdlrhi mvd13, ?r5 +0*21c <move\+0x3c> 2e ?1c ?c4 ?10 ? * cfmvrdlcs ip, ?mvd12 +0*220 <move\+0x40> 6e ?10 ?34 ?10 ? * cfmvrdlvs r3, ?mvd0 +0*224 <move\+0x44> 7e ?1e ?d4 ?10 ? * cfmvrdlvc sp, ?mvd14 +0*228 <move\+0x48> 3e ?1a ?e4 ?10 ? * cfmvrdlcc lr, ?mvd10 +0*22c <move\+0x4c> 1e ?1f ?84 ?10 ? * cfmvrdlne r8, ?mvd15 +0*230 <move\+0x50> de ?06 ?c4 ?30 ? * cfmvdhrle mvd6, ?ip +0*234 <move\+0x54> 4e ?02 ?34 ?30 ? * cfmvdhrmi mvd2, ?r3 +0*238 <move\+0x58> 0e ?05 ?d4 ?30 ? * cfmvdhreq mvd5, ?sp +0*23c <move\+0x5c> ae ?09 ?e4 ?30 ? * cfmvdhrge mvd9, ?lr +0*240 <move\+0x60> ee ?03 ?84 ?30 ? * cfmvdhr mvd3, ?r8 +0*244 <move\+0x64> de ?12 ?54 ?30 ? * cfmvrdhle r5, ?mvd2 +0*248 <move\+0x68> 1e ?16 ?64 ?30 ? * cfmvrdhne r6, ?mvd6 +0*24c <move\+0x6c> be ?17 ?04 ?30 ? * cfmvrdhlt r0, ?mvd7 +0*250 <move\+0x70> 5e ?13 ?74 ?30 ? * cfmvrdhpl r7, ?mvd3 +0*254 <move\+0x74> ce ?11 ?14 ?30 ? * cfmvrdhgt r1, ?mvd1 +0*258 <move\+0x78> 8e ?0f ?55 ?10 ? * cfmv64lrhi mvdx15, ?r5 +0*25c <move\+0x7c> 6e ?0b ?65 ?10 ? * cfmv64lrvs mvdx11, ?r6 +0*260 <move\+0x80> 2e ?09 ?05 ?10 ? * cfmv64lrcs mvdx9, ?r0 +0*264 <move\+0x84> 5e ?0f ?75 ?10 ? * cfmv64lrpl mvdx15, ?r7 +0*268 <move\+0x88> 9e ?04 ?15 ?10 ? * cfmv64lrls mvdx4, ?r1 +0*26c <move\+0x8c> 3e ?1d ?85 ?10 ? * cfmvr64lcc r8, ?mvdx13 +0*270 <move\+0x90> 7e ?11 ?f5 ?10 ? * cfmvr64lvc pc, ?mvdx1 +0*274 <move\+0x94> ce ?1b ?95 ?10 ? * cfmvr64lgt r9, ?mvdx11 +0*278 <move\+0x98> 0e ?15 ?a5 ?10 ? * cfmvr64leq sl, ?mvdx5 +0*27c <move\+0x9c> ee ?1c ?45 ?10 ? * cfmvr64l r4, ?mvdx12 +0*280 <move\+0xa0> ae ?01 ?85 ?30 ? * cfmv64hrge mvdx1, ?r8 +0*284 <move\+0xa4> ee ?0d ?f5 ?30 ? * cfmv64hr mvdx13, ?pc +0*288 <move\+0xa8> be ?04 ?95 ?30 ? * cfmv64hrlt mvdx4, ?r9 +0*28c <move\+0xac> 9e ?00 ?a5 ?30 ? * cfmv64hrls mvdx0, ?sl +0*290 <move\+0xb0> ee ?0a ?45 ?30 ? * cfmv64hr mvdx10, ?r4 +0*294 <move\+0xb4> 4e ?13 ?15 ?30 ? * cfmvr64hmi r1, ?mvdx3 +0*298 <move\+0xb8> 8e ?17 ?25 ?30 ? * cfmvr64hhi r2, ?mvdx7 +0*29c <move\+0xbc> 2e ?1c ?c5 ?30 ? * cfmvr64hcs ip, ?mvdx12 +0*2a0 <move\+0xc0> 6e ?10 ?35 ?30 ? * cfmvr64hvs r3, ?mvdx0 +0*2a4 <move\+0xc4> 7e ?1e ?d5 ?30 ? * cfmvr64hvc sp, ?mvdx14 +0*2a8 <move\+0xc8> 3e ?2a ?04 ?40 ? * cfmval32cc mvax0, ?mvfx10 +0*2ac <move\+0xcc> 1e ?2f ?14 ?40 ? * cfmval32ne mvax1, ?mvfx15 +0*2b0 <move\+0xd0> de ?2b ?04 ?40 ? * cfmval32le mvax0, ?mvfx11 +0*2b4 <move\+0xd4> 4e ?29 ?04 ?40 ? * cfmval32mi mvax0, ?mvfx9 +0*2b8 <move\+0xd8> 0e ?2f ?14 ?40 ? * cfmval32eq mvax1, ?mvfx15 +0*2bc <move\+0xdc> ae ?10 ?94 ?40 ? * cfmv32alge mvfx9, ?mvax0 +0*2c0 <move\+0xe0> ee ?11 ?34 ?40 ? * cfmv32al mvfx3, ?mvax1 +0*2c4 <move\+0xe4> de ?10 ?74 ?40 ? * cfmv32alle mvfx7, ?mvax0 +0*2c8 <move\+0xe8> 1e ?10 ?c4 ?40 ? * cfmv32alne mvfx12, ?mvax0 +0*2cc <move\+0xec> be ?11 ?04 ?40 ? * cfmv32allt mvfx0, ?mvax1 +0*2d0 <move\+0xf0> 5e ?23 ?24 ?60 ? * cfmvam32pl mvax2, ?mvfx3 +0*2d4 <move\+0xf4> ce ?21 ?14 ?60 ? * cfmvam32gt mvax1, ?mvfx1 +0*2d8 <move\+0xf8> 8e ?2d ?34 ?60 ? * cfmvam32hi mvax3, ?mvfx13 +0*2dc <move\+0xfc> 6e ?24 ?34 ?60 ? * cfmvam32vs mvax3, ?mvfx4 +0*2e0 <move\+0x100> 2e ?20 ?14 ?60 ? * cfmvam32cs mvax1, ?mvfx0 +0*2e4 <move\+0x104> 5e ?12 ?f4 ?60 ? * cfmv32ampl mvfx15, ?mvax2 +0*2e8 <move\+0x108> 9e ?11 ?44 ?60 ? * cfmv32amls mvfx4, ?mvax1 +0*2ec <move\+0x10c> 3e ?13 ?84 ?60 ? * cfmv32amcc mvfx8, ?mvax3 +0*2f0 <move\+0x110> 7e ?13 ?24 ?60 ? * cfmv32amvc mvfx2, ?mvax3 +0*2f4 <move\+0x114> ce ?11 ?64 ?60 ? * cfmv32amgt mvfx6, ?mvax1 +0*2f8 <move\+0x118> 0e ?25 ?14 ?80 ? * cfmvah32eq mvax1, ?mvfx5 +0*2fc <move\+0x11c> ee ?2c ?24 ?80 ? * cfmvah32 mvax2, ?mvfx12 +0*300 <move\+0x120> ae ?28 ?34 ?80 ? * cfmvah32ge mvax3, ?mvfx8 +0*304 <move\+0x124> ee ?26 ?24 ?80 ? * cfmvah32 mvax2, ?mvfx6 +0*308 <move\+0x128> be ?22 ?24 ?80 ? * cfmvah32lt mvax2, ?mvfx2 +0*30c <move\+0x12c> 9e ?11 ?04 ?80 ? * cfmv32ahls mvfx0, ?mvax1 +0*310 <move\+0x130> ee ?12 ?a4 ?80 ? * cfmv32ah mvfx10, ?mvax2 +0*314 <move\+0x134> 4e ?13 ?e4 ?80 ? * cfmv32ahmi mvfx14, ?mvax3 +0*318 <move\+0x138> 8e ?12 ?d4 ?80 ? * cfmv32ahhi mvfx13, ?mvax2 +0*31c <move\+0x13c> 2e ?12 ?14 ?80 ? * cfmv32ahcs mvfx1, ?mvax2 +0*320 <move\+0x140> 6e ?20 ?14 ?a0 ? * cfmva32vs mvax1, ?mvfx0 +0*324 <move\+0x144> 7e ?2e ?34 ?a0 ? * cfmva32vc mvax3, ?mvfx14 +0*328 <move\+0x148> 3e ?2a ?04 ?a0 ? * cfmva32cc mvax0, ?mvfx10 +0*32c <move\+0x14c> 1e ?2f ?14 ?a0 ? * cfmva32ne mvax1, ?mvfx15 +0*330 <move\+0x150> de ?2b ?04 ?a0 ? * cfmva32le mvax0, ?mvfx11 +0*334 <move\+0x154> 4e ?11 ?24 ?a0 ? * cfmv32ami mvfx2, ?mvax1 +0*338 <move\+0x158> 0e ?13 ?54 ?a0 ? * cfmv32aeq mvfx5, ?mvax3 +0*33c <move\+0x15c> ae ?10 ?94 ?a0 ? * cfmv32age mvfx9, ?mvax0 +0*340 <move\+0x160> ee ?11 ?34 ?a0 ? * cfmv32a mvfx3, ?mvax1 +0*344 <move\+0x164> de ?10 ?74 ?a0 ? * cfmv32ale mvfx7, ?mvax0 +0*348 <move\+0x168> 1e ?26 ?24 ?c0 ? * cfmva64ne mvax2, ?mvdx6 +0*34c <move\+0x16c> be ?27 ?04 ?c0 ? * cfmva64lt mvax0, ?mvdx7 +0*350 <move\+0x170> 5e ?23 ?24 ?c0 ? * cfmva64pl mvax2, ?mvdx3 +0*354 <move\+0x174> ce ?21 ?14 ?c0 ? * cfmva64gt mvax1, ?mvdx1 +0*358 <move\+0x178> 8e ?2d ?34 ?c0 ? * cfmva64hi mvax3, ?mvdx13 +0*35c <move\+0x17c> 6e ?12 ?b4 ?c0 ? * cfmv64avs mvdx11, ?mvax2 +0*360 <move\+0x180> 2e ?10 ?94 ?c0 ? * cfmv64acs mvdx9, ?mvax0 +0*364 <move\+0x184> 5e ?12 ?f4 ?c0 ? * cfmv64apl mvdx15, ?mvax2 +0*368 <move\+0x188> 9e ?11 ?44 ?c0 ? * cfmv64als mvdx4, ?mvax1 +0*36c <move\+0x18c> 3e ?13 ?84 ?c0 ? * cfmv64acc mvdx8, ?mvax3 +0*370 <move\+0x190> 7e ?20 ?14 ?e0 ? * cfmvsc32vc dspsc, ?mvdx1 +0*374 <move\+0x194> ce ?20 ?b4 ?e0 ? * cfmvsc32gt dspsc, ?mvdx11 +0*378 <move\+0x198> 0e ?20 ?54 ?e0 ? * cfmvsc32eq dspsc, ?mvdx5 +0*37c <move\+0x19c> ee ?20 ?c4 ?e0 ? * cfmvsc32 dspsc, ?mvdx12 +0*380 <move\+0x1a0> ae ?20 ?84 ?e0 ? * cfmvsc32ge dspsc, ?mvdx8 +0*384 <move\+0x1a4> ee ?10 ?d4 ?e0 ? * cfmv32sc mvdx13, ?dspsc +0*388 <move\+0x1a8> be ?10 ?44 ?e0 ? * cfmv32sclt mvdx4, ?dspsc +0*38c <move\+0x1ac> 9e ?10 ?04 ?e0 ? * cfmv32scls mvdx0, ?dspsc +0*390 <move\+0x1b0> ee ?10 ?a4 ?e0 ? * cfmv32sc mvdx10, ?dspsc +0*394 <move\+0x1b4> 4e ?10 ?e4 ?e0 ? * cfmv32scmi mvdx14, ?dspsc +0*398 <move\+0x1b8> 8e ?07 ?d4 ?00 ? * cfcpyshi mvf13, ?mvf7 +0*39c <move\+0x1bc> 2e ?0c ?14 ?00 ? * cfcpyscs mvf1, ?mvf12 +0*3a0 <move\+0x1c0> 6e ?00 ?b4 ?00 ? * cfcpysvs mvf11, ?mvf0 +0*3a4 <move\+0x1c4> 7e ?0e ?54 ?00 ? * cfcpysvc mvf5, ?mvf14 +0*3a8 <move\+0x1c8> 3e ?0a ?c4 ?00 ? * cfcpyscc mvf12, ?mvf10 +0*3ac <move\+0x1cc> 1e ?0f ?84 ?20 ? * cfcpydne mvd8, ?mvd15 +0*3b0 <move\+0x1d0> de ?0b ?64 ?20 ? * cfcpydle mvd6, ?mvd11 +0*3b4 <move\+0x1d4> 4e ?09 ?24 ?20 ? * cfcpydmi mvd2, ?mvd9 +0*3b8 <move\+0x1d8> 0e ?0f ?54 ?20 ? * cfcpydeq mvd5, ?mvd15 +0*3bc <move\+0x1dc> ae ?04 ?94 ?20 ? * cfcpydge mvd9, ?mvd4 # conv: -0*3c0 <conv> 3e ?0d ?84 ?60 ? * cfcvtsdcc mvd8, ?mvf13 -0*3c4 <conv\+0x4> 7e ?01 ?24 ?60 ? * cfcvtsdvc mvd2, ?mvf1 -0*3c8 <conv\+0x8> ce ?0b ?64 ?60 ? * cfcvtsdgt mvd6, ?mvf11 -0*3cc <conv\+0xc> 0e ?05 ?74 ?60 ? * cfcvtsdeq mvd7, ?mvf5 -0*3d0 <conv\+0x10> ee ?0c ?34 ?60 ? * cfcvtsd mvd3, ?mvf12 -0*3d4 <conv\+0x14> ae ?08 ?14 ?40 ? * cfcvtdsge mvf1, ?mvd8 -0*3d8 <conv\+0x18> ee ?06 ?d4 ?40 ? * cfcvtds mvf13, ?mvd6 -0*3dc <conv\+0x1c> be ?02 ?44 ?40 ? * cfcvtdslt mvf4, ?mvd2 -0*3e0 <conv\+0x20> 9e ?05 ?04 ?40 ? * cfcvtdsls mvf0, ?mvd5 -0*3e4 <conv\+0x24> ee ?09 ?a4 ?40 ? * cfcvtds mvf10, ?mvd9 -0*3e8 <conv\+0x28> 4e ?03 ?e4 ?80 ? * cfcvt32smi mvf14, ?mvfx3 -0*3ec <conv\+0x2c> 8e ?07 ?d4 ?80 ? * cfcvt32shi mvf13, ?mvfx7 -0*3f0 <conv\+0x30> 2e ?0c ?14 ?80 ? * cfcvt32scs mvf1, ?mvfx12 -0*3f4 <conv\+0x34> 6e ?00 ?b4 ?80 ? * cfcvt32svs mvf11, ?mvfx0 -0*3f8 <conv\+0x38> 7e ?0e ?54 ?80 ? * cfcvt32svc mvf5, ?mvfx14 -0*3fc <conv\+0x3c> 3e ?0a ?c4 ?a0 ? * cfcvt32dcc mvd12, ?mvfx10 -0*400 <conv\+0x40> 1e ?0f ?84 ?a0 ? * cfcvt32dne mvd8, ?mvfx15 -0*404 <conv\+0x44> de ?0b ?64 ?a0 ? * cfcvt32dle mvd6, ?mvfx11 -0*408 <conv\+0x48> 4e ?09 ?24 ?a0 ? * cfcvt32dmi mvd2, ?mvfx9 -0*40c <conv\+0x4c> 0e ?0f ?54 ?a0 ? * cfcvt32deq mvd5, ?mvfx15 -0*410 <conv\+0x50> ae ?04 ?94 ?c0 ? * cfcvt64sge mvf9, ?mvdx4 -0*414 <conv\+0x54> ee ?08 ?34 ?c0 ? * cfcvt64s mvf3, ?mvdx8 -0*418 <conv\+0x58> de ?02 ?74 ?c0 ? * cfcvt64sle mvf7, ?mvdx2 -0*41c <conv\+0x5c> 1e ?06 ?c4 ?c0 ? * cfcvt64sne mvf12, ?mvdx6 -0*420 <conv\+0x60> be ?07 ?04 ?c0 ? * cfcvt64slt mvf0, ?mvdx7 -0*424 <conv\+0x64> 5e ?03 ?e4 ?e0 ? * cfcvt64dpl mvd14, ?mvdx3 -0*428 <conv\+0x68> ce ?01 ?a4 ?e0 ? * cfcvt64dgt mvd10, ?mvdx1 -0*42c <conv\+0x6c> 8e ?0d ?f4 ?e0 ? * cfcvt64dhi mvd15, ?mvdx13 -0*430 <conv\+0x70> 6e ?04 ?b4 ?e0 ? * cfcvt64dvs mvd11, ?mvdx4 -0*434 <conv\+0x74> 2e ?00 ?94 ?e0 ? * cfcvt64dcs mvd9, ?mvdx0 -0*438 <conv\+0x78> 5e ?1a ?f5 ?80 ? * cfcvts32pl mvfx15, ?mvf10 -0*43c <conv\+0x7c> 9e ?1e ?45 ?80 ? * cfcvts32ls mvfx4, ?mvf14 -0*440 <conv\+0x80> 3e ?1d ?85 ?80 ? * cfcvts32cc mvfx8, ?mvf13 -0*444 <conv\+0x84> 7e ?11 ?25 ?80 ? * cfcvts32vc mvfx2, ?mvf1 -0*448 <conv\+0x88> ce ?1b ?65 ?80 ? * cfcvts32gt mvfx6, ?mvf11 -0*44c <conv\+0x8c> 0e ?15 ?75 ?a0 ? * cfcvtd32eq mvfx7, ?mvd5 -0*450 <conv\+0x90> ee ?1c ?35 ?a0 ? * cfcvtd32 mvfx3, ?mvd12 -0*454 <conv\+0x94> ae ?18 ?15 ?a0 ? * cfcvtd32ge mvfx1, ?mvd8 -0*458 <conv\+0x98> ee ?16 ?d5 ?a0 ? * cfcvtd32 mvfx13, ?mvd6 -0*45c <conv\+0x9c> be ?12 ?45 ?a0 ? * cfcvtd32lt mvfx4, ?mvd2 -0*460 <conv\+0xa0> 9e ?15 ?05 ?c0 ? * cftruncs32ls mvfx0, ?mvf5 -0*464 <conv\+0xa4> ee ?19 ?a5 ?c0 ? * cftruncs32 mvfx10, ?mvf9 -0*468 <conv\+0xa8> 4e ?13 ?e5 ?c0 ? * cftruncs32mi mvfx14, ?mvf3 -0*46c <conv\+0xac> 8e ?17 ?d5 ?c0 ? * cftruncs32hi mvfx13, ?mvf7 -0*470 <conv\+0xb0> 2e ?1c ?15 ?c0 ? * cftruncs32cs mvfx1, ?mvf12 -0*474 <conv\+0xb4> 6e ?10 ?b5 ?e0 ? * cftruncd32vs mvfx11, ?mvd0 -0*478 <conv\+0xb8> 7e ?1e ?55 ?e0 ? * cftruncd32vc mvfx5, ?mvd14 -0*47c <conv\+0xbc> 3e ?1a ?c5 ?e0 ? * cftruncd32cc mvfx12, ?mvd10 -0*480 <conv\+0xc0> 1e ?1f ?85 ?e0 ? * cftruncd32ne mvfx8, ?mvd15 -0*484 <conv\+0xc4> de ?1b ?65 ?e0 ? * cftruncd32le mvfx6, ?mvd11 +0*3c0 <conv> ee ?08 ?34 ?60 ? * cfcvtsd mvd3, ?mvf8 +0*3c4 <conv\+0x4> de ?02 ?74 ?60 ? * cfcvtsdle mvd7, ?mvf2 +0*3c8 <conv\+0x8> 1e ?06 ?c4 ?60 ? * cfcvtsdne mvd12, ?mvf6 +0*3cc <conv\+0xc> be ?07 ?04 ?60 ? * cfcvtsdlt mvd0, ?mvf7 +0*3d0 <conv\+0x10> 5e ?03 ?e4 ?60 ? * cfcvtsdpl mvd14, ?mvf3 +0*3d4 <conv\+0x14> ce ?01 ?a4 ?40 ? * cfcvtdsgt mvf10, ?mvd1 +0*3d8 <conv\+0x18> 8e ?0d ?f4 ?40 ? * cfcvtdshi mvf15, ?mvd13 +0*3dc <conv\+0x1c> 6e ?04 ?b4 ?40 ? * cfcvtdsvs mvf11, ?mvd4 +0*3e0 <conv\+0x20> 2e ?00 ?94 ?40 ? * cfcvtdscs mvf9, ?mvd0 +0*3e4 <conv\+0x24> 5e ?0a ?f4 ?40 ? * cfcvtdspl mvf15, ?mvd10 +0*3e8 <conv\+0x28> 9e ?0e ?44 ?80 ? * cfcvt32sls mvf4, ?mvfx14 +0*3ec <conv\+0x2c> 3e ?0d ?84 ?80 ? * cfcvt32scc mvf8, ?mvfx13 +0*3f0 <conv\+0x30> 7e ?01 ?24 ?80 ? * cfcvt32svc mvf2, ?mvfx1 +0*3f4 <conv\+0x34> ce ?0b ?64 ?80 ? * cfcvt32sgt mvf6, ?mvfx11 +0*3f8 <conv\+0x38> 0e ?05 ?74 ?80 ? * cfcvt32seq mvf7, ?mvfx5 +0*3fc <conv\+0x3c> ee ?0c ?34 ?a0 ? * cfcvt32d mvd3, ?mvfx12 +0*400 <conv\+0x40> ae ?08 ?14 ?a0 ? * cfcvt32dge mvd1, ?mvfx8 +0*404 <conv\+0x44> ee ?06 ?d4 ?a0 ? * cfcvt32d mvd13, ?mvfx6 +0*408 <conv\+0x48> be ?02 ?44 ?a0 ? * cfcvt32dlt mvd4, ?mvfx2 +0*40c <conv\+0x4c> 9e ?05 ?04 ?a0 ? * cfcvt32dls mvd0, ?mvfx5 +0*410 <conv\+0x50> ee ?09 ?a4 ?c0 ? * cfcvt64s mvf10, ?mvdx9 +0*414 <conv\+0x54> 4e ?03 ?e4 ?c0 ? * cfcvt64smi mvf14, ?mvdx3 +0*418 <conv\+0x58> 8e ?07 ?d4 ?c0 ? * cfcvt64shi mvf13, ?mvdx7 +0*41c <conv\+0x5c> 2e ?0c ?14 ?c0 ? * cfcvt64scs mvf1, ?mvdx12 +0*420 <conv\+0x60> 6e ?00 ?b4 ?c0 ? * cfcvt64svs mvf11, ?mvdx0 +0*424 <conv\+0x64> 7e ?0e ?54 ?e0 ? * cfcvt64dvc mvd5, ?mvdx14 +0*428 <conv\+0x68> 3e ?0a ?c4 ?e0 ? * cfcvt64dcc mvd12, ?mvdx10 +0*42c <conv\+0x6c> 1e ?0f ?84 ?e0 ? * cfcvt64dne mvd8, ?mvdx15 +0*430 <conv\+0x70> de ?0b ?64 ?e0 ? * cfcvt64dle mvd6, ?mvdx11 +0*434 <conv\+0x74> 4e ?09 ?24 ?e0 ? * cfcvt64dmi mvd2, ?mvdx9 +0*438 <conv\+0x78> 0e ?1f ?55 ?80 ? * cfcvts32eq mvfx5, ?mvf15 +0*43c <conv\+0x7c> ae ?14 ?95 ?80 ? * cfcvts32ge mvfx9, ?mvf4 +0*440 <conv\+0x80> ee ?18 ?35 ?80 ? * cfcvts32 mvfx3, ?mvf8 +0*444 <conv\+0x84> de ?12 ?75 ?80 ? * cfcvts32le mvfx7, ?mvf2 +0*448 <conv\+0x88> 1e ?16 ?c5 ?80 ? * cfcvts32ne mvfx12, ?mvf6 +0*44c <conv\+0x8c> be ?17 ?05 ?a0 ? * cfcvtd32lt mvfx0, ?mvd7 +0*450 <conv\+0x90> 5e ?13 ?e5 ?a0 ? * cfcvtd32pl mvfx14, ?mvd3 +0*454 <conv\+0x94> ce ?11 ?a5 ?a0 ? * cfcvtd32gt mvfx10, ?mvd1 +0*458 <conv\+0x98> 8e ?1d ?f5 ?a0 ? * cfcvtd32hi mvfx15, ?mvd13 +0*45c <conv\+0x9c> 6e ?14 ?b5 ?a0 ? * cfcvtd32vs mvfx11, ?mvd4 +0*460 <conv\+0xa0> 2e ?10 ?95 ?c0 ? * cftruncs32cs mvfx9, ?mvf0 +0*464 <conv\+0xa4> 5e ?1a ?f5 ?c0 ? * cftruncs32pl mvfx15, ?mvf10 +0*468 <conv\+0xa8> 9e ?1e ?45 ?c0 ? * cftruncs32ls mvfx4, ?mvf14 +0*46c <conv\+0xac> 3e ?1d ?85 ?c0 ? * cftruncs32cc mvfx8, ?mvf13 +0*470 <conv\+0xb0> 7e ?11 ?25 ?c0 ? * cftruncs32vc mvfx2, ?mvf1 +0*474 <conv\+0xb4> ce ?1b ?65 ?e0 ? * cftruncd32gt mvfx6, ?mvd11 +0*478 <conv\+0xb8> 0e ?15 ?75 ?e0 ? * cftruncd32eq mvfx7, ?mvd5 +0*47c <conv\+0xbc> ee ?1c ?35 ?e0 ? * cftruncd32 mvfx3, ?mvd12 +0*480 <conv\+0xc0> ae ?18 ?15 ?e0 ? * cftruncd32ge mvfx1, ?mvd8 +0*484 <conv\+0xc4> ee ?16 ?d5 ?e0 ? * cftruncd32 mvfx13, ?mvd6 # shift: -0*488 <shift> 4e ?02 ?05 ?59 ? * cfrshl32mi mvfx2, ?mvfx9, ?r0 -0*48c <shift\+0x4> ee ?0a ?e5 ?59 ? * cfrshl32 mvfx10, ?mvfx9, ?lr -0*490 <shift\+0x8> 3e ?08 ?55 ?5d ? * cfrshl32cc mvfx8, ?mvfx13, ?r5 -0*494 <shift\+0xc> 1e ?0c ?35 ?56 ? * cfrshl32ne mvfx12, ?mvfx6, ?r3 -0*498 <shift\+0x10> 7e ?05 ?45 ?5e ? * cfrshl32vc mvfx5, ?mvfx14, ?r4 -0*49c <shift\+0x14> ae ?01 ?25 ?78 ? * cfrshl64ge mvdx1, ?mvdx8, ?r2 -0*4a0 <shift\+0x18> 6e ?0b ?95 ?74 ? * cfrshl64vs mvdx11, ?mvdx4, ?r9 -0*4a4 <shift\+0x1c> 0e ?05 ?75 ?7f ? * cfrshl64eq mvdx5, ?mvdx15, ?r7 -0*4a8 <shift\+0x20> 4e ?0e ?85 ?73 ? * cfrshl64mi mvdx14, ?mvdx3, ?r8 -0*4ac <shift\+0x24> 7e ?02 ?65 ?71 ? * cfrshl64vc mvdx2, ?mvdx1, ?r6 -0*4b0 <shift\+0x28> be ?07 ?05 ?80 ? * cfsh32lt mvfx0, ?mvfx7, ?#-64 -0*4b4 <shift\+0x2c> 3e ?0a ?c5 ?cc ? * cfsh32cc mvfx12, ?mvfx10, ?#-20 -0*4b8 <shift\+0x30> ee ?06 ?d5 ?48 ? * cfsh32 mvfx13, ?mvfx6, ?#40 -0*4bc <shift\+0x34> 2e ?00 ?95 ?ef ? * cfsh32cs mvfx9, ?mvfx0, ?#-1 -0*4c0 <shift\+0x38> ae ?04 ?95 ?28 ? * cfsh32ge mvfx9, ?mvfx4, ?#24 -0*4c4 <shift\+0x3c> 8e ?27 ?d5 ?41 ? * cfsh64hi mvdx13, ?mvdx7, ?#33 -0*4c8 <shift\+0x40> ce ?2b ?65 ?00 ? * cfsh64gt mvdx6, ?mvdx11, ?#0 -0*4cc <shift\+0x44> 5e ?23 ?e5 ?40 ? * cfsh64pl mvdx14, ?mvdx3, ?#32 -0*4d0 <shift\+0x48> 1e ?2f ?85 ?c1 ? * cfsh64ne mvdx8, ?mvdx15, ?#-31 -0*4d4 <shift\+0x4c> be ?22 ?45 ?01 ? * cfsh64lt mvdx4, ?mvdx2, ?#1 +0*488 <shift> be ?04 ?35 ?52 ? * cfrshl32lt mvfx4, ?mvfx2, ?r3 +0*48c <shift\+0x4> 5e ?0f ?45 ?5a ? * cfrshl32pl mvfx15, ?mvfx10, ?r4 +0*490 <shift\+0x8> ee ?03 ?25 ?58 ? * cfrshl32 mvfx3, ?mvfx8, ?r2 +0*494 <shift\+0xc> 2e ?01 ?95 ?5c ? * cfrshl32cs mvfx1, ?mvfx12, ?r9 +0*498 <shift\+0x10> 0e ?07 ?75 ?55 ? * cfrshl32eq mvfx7, ?mvfx5, ?r7 +0*49c <shift\+0x14> ce ?0a ?85 ?71 ? * cfrshl64gt mvdx10, ?mvdx1, ?r8 +0*4a0 <shift\+0x18> de ?06 ?65 ?7b ? * cfrshl64le mvdx6, ?mvdx11, ?r6 +0*4a4 <shift\+0x1c> 9e ?00 ?d5 ?75 ? * cfrshl64ls mvdx0, ?mvdx5, ?sp +0*4a8 <shift\+0x20> 9e ?04 ?b5 ?7e ? * cfrshl64ls mvdx4, ?mvdx14, ?fp +0*4ac <shift\+0x24> de ?07 ?c5 ?72 ? * cfrshl64le mvdx7, ?mvdx2, ?ip +0*4b0 <shift\+0x28> 6e ?00 ?b5 ?ef ? * cfsh32vs mvfx11, ?mvfx0, ?#-1 +0*4b4 <shift\+0x2c> ee ?0c ?35 ?28 ? * cfsh32 mvfx3, ?mvfx12, ?#24 +0*4b8 <shift\+0x30> 8e ?0d ?f5 ?41 ? * cfsh32hi mvfx15, ?mvfx13, ?#33 +0*4bc <shift\+0x34> 4e ?09 ?25 ?00 ? * cfsh32mi mvfx2, ?mvfx9, ?#0 +0*4c0 <shift\+0x38> ee ?09 ?a5 ?40 ? * cfsh32 mvfx10, ?mvfx9, ?#32 +0*4c4 <shift\+0x3c> 3e ?2d ?85 ?c1 ? * cfsh64cc mvdx8, ?mvdx13, ?#-31 +0*4c8 <shift\+0x40> 1e ?26 ?c5 ?01 ? * cfsh64ne mvdx12, ?mvdx6, ?#1 +0*4cc <shift\+0x44> 7e ?2e ?55 ?c0 ? * cfsh64vc mvdx5, ?mvdx14, ?#-32 +0*4d0 <shift\+0x48> ae ?28 ?15 ?c5 ? * cfsh64ge mvdx1, ?mvdx8, ?#-27 +0*4d4 <shift\+0x4c> 6e ?24 ?b5 ?eb ? * cfsh64vs mvdx11, ?mvdx4, ?#-5 # comp: -0*4d8 <comp> 5e ?1a ?d4 ?99 ? * cfcmpspl sp, ?mvf10, ?mvf9 -0*4dc <comp\+0x4> ee ?18 ?b4 ?9d ? * cfcmps fp, ?mvf8, ?mvf13 -0*4e0 <comp\+0x8> 2e ?1c ?c4 ?96 ? * cfcmpscs ip, ?mvf12, ?mvf6 -0*4e4 <comp\+0xc> 0e ?15 ?a4 ?9e ? * cfcmpseq sl, ?mvf5, ?mvf14 -0*4e8 <comp\+0x10> ce ?11 ?14 ?98 ? * cfcmpsgt r1, ?mvf1, ?mvf8 -0*4ec <comp\+0x14> de ?1b ?f4 ?b4 ? * cfcmpdle pc, ?mvd11, ?mvd4 -0*4f0 <comp\+0x18> 9e ?15 ?04 ?bf ? * cfcmpdls r0, ?mvd5, ?mvd15 -0*4f4 <comp\+0x1c> 9e ?1e ?e4 ?b3 ? * cfcmpdls lr, ?mvd14, ?mvd3 -0*4f8 <comp\+0x20> de ?12 ?54 ?b1 ? * cfcmpdle r5, ?mvd2, ?mvd1 -0*4fc <comp\+0x24> 6e ?10 ?34 ?b7 ? * cfcmpdvs r3, ?mvd0, ?mvd7 -0*500 <comp\+0x28> ee ?1c ?45 ?9a ? * cfcmp32 r4, ?mvfx12, ?mvfx10 -0*504 <comp\+0x2c> 8e ?1d ?25 ?96 ? * cfcmp32hi r2, ?mvfx13, ?mvfx6 -0*508 <comp\+0x30> 4e ?19 ?95 ?90 ? * cfcmp32mi r9, ?mvfx9, ?mvfx0 -0*50c <comp\+0x34> ee ?19 ?75 ?94 ? * cfcmp32 r7, ?mvfx9, ?mvfx4 -0*510 <comp\+0x38> 3e ?1d ?85 ?97 ? * cfcmp32cc r8, ?mvfx13, ?mvfx7 -0*514 <comp\+0x3c> 1e ?16 ?65 ?bb ? * cfcmp64ne r6, ?mvdx6, ?mvdx11 -0*518 <comp\+0x40> 7e ?1e ?d5 ?b3 ? * cfcmp64vc sp, ?mvdx14, ?mvdx3 -0*51c <comp\+0x44> ae ?18 ?b5 ?bf ? * cfcmp64ge fp, ?mvdx8, ?mvdx15 -0*520 <comp\+0x48> 6e ?14 ?c5 ?b2 ? * cfcmp64vs ip, ?mvdx4, ?mvdx2 -0*524 <comp\+0x4c> 0e ?1f ?a5 ?ba ? * cfcmp64eq sl, ?mvdx15, ?mvdx10 +0*4d8 <comp> 0e ?1f ?a4 ?9a ? * cfcmpseq sl, ?mvf15, ?mvf10 +0*4dc <comp\+0x4> 4e ?13 ?14 ?98 ? * cfcmpsmi r1, ?mvf3, ?mvf8 +0*4e0 <comp\+0x8> 7e ?11 ?f4 ?9c ? * cfcmpsvc pc, ?mvf1, ?mvf12 +0*4e4 <comp\+0xc> be ?17 ?04 ?95 ? * cfcmpslt r0, ?mvf7, ?mvf5 +0*4e8 <comp\+0x10> 3e ?1a ?e4 ?91 ? * cfcmpscc lr, ?mvf10, ?mvf1 +0*4ec <comp\+0x14> ee ?16 ?54 ?bb ? * cfcmpd r5, ?mvd6, ?mvd11 +0*4f0 <comp\+0x18> 2e ?10 ?34 ?b5 ? * cfcmpdcs r3, ?mvd0, ?mvd5 +0*4f4 <comp\+0x1c> ae ?14 ?44 ?be ? * cfcmpdge r4, ?mvd4, ?mvd14 +0*4f8 <comp\+0x20> 8e ?17 ?24 ?b2 ? * cfcmpdhi r2, ?mvd7, ?mvd2 +0*4fc <comp\+0x24> ce ?1b ?94 ?b0 ? * cfcmpdgt r9, ?mvd11, ?mvd0 +0*500 <comp\+0x28> 5e ?13 ?75 ?9c ? * cfcmp32pl r7, ?mvfx3, ?mvfx12 +0*504 <comp\+0x2c> 1e ?1f ?85 ?9d ? * cfcmp32ne r8, ?mvfx15, ?mvfx13 +0*508 <comp\+0x30> be ?12 ?65 ?99 ? * cfcmp32lt r6, ?mvfx2, ?mvfx9 +0*50c <comp\+0x34> 5e ?1a ?d5 ?99 ? * cfcmp32pl sp, ?mvfx10, ?mvfx9 +0*510 <comp\+0x38> ee ?18 ?b5 ?9d ? * cfcmp32 fp, ?mvfx8, ?mvfx13 +0*514 <comp\+0x3c> 2e ?1c ?c5 ?b6 ? * cfcmp64cs ip, ?mvdx12, ?mvdx6 +0*518 <comp\+0x40> 0e ?15 ?a5 ?be ? * cfcmp64eq sl, ?mvdx5, ?mvdx14 +0*51c <comp\+0x44> ce ?11 ?15 ?b8 ? * cfcmp64gt r1, ?mvdx1, ?mvdx8 +0*520 <comp\+0x48> de ?1b ?f5 ?b4 ? * cfcmp64le pc, ?mvdx11, ?mvdx4 +0*524 <comp\+0x4c> 9e ?15 ?05 ?bf ? * cfcmp64ls r0, ?mvdx5, ?mvdx15 # fp_arith: -0*528 <fp_arith> 4e ?33 ?e4 ?00 ? * cfabssmi mvf14, ?mvf3 -0*52c <fp_arith\+0x4> 8e ?37 ?d4 ?00 ? * cfabsshi mvf13, ?mvf7 -0*530 <fp_arith\+0x8> 2e ?3c ?14 ?00 ? * cfabsscs mvf1, ?mvf12 -0*534 <fp_arith\+0xc> 6e ?30 ?b4 ?00 ? * cfabssvs mvf11, ?mvf0 -0*538 <fp_arith\+0x10> 7e ?3e ?54 ?00 ? * cfabssvc mvf5, ?mvf14 -0*53c <fp_arith\+0x14> 3e ?3a ?c4 ?20 ? * cfabsdcc mvd12, ?mvd10 -0*540 <fp_arith\+0x18> 1e ?3f ?84 ?20 ? * cfabsdne mvd8, ?mvd15 -0*544 <fp_arith\+0x1c> de ?3b ?64 ?20 ? * cfabsdle mvd6, ?mvd11 -0*548 <fp_arith\+0x20> 4e ?39 ?24 ?20 ? * cfabsdmi mvd2, ?mvd9 -0*54c <fp_arith\+0x24> 0e ?3f ?54 ?20 ? * cfabsdeq mvd5, ?mvd15 -0*550 <fp_arith\+0x28> ae ?34 ?94 ?40 ? * cfnegsge mvf9, ?mvf4 -0*554 <fp_arith\+0x2c> ee ?38 ?34 ?40 ? * cfnegs mvf3, ?mvf8 -0*558 <fp_arith\+0x30> de ?32 ?74 ?40 ? * cfnegsle mvf7, ?mvf2 -0*55c <fp_arith\+0x34> 1e ?36 ?c4 ?40 ? * cfnegsne mvf12, ?mvf6 -0*560 <fp_arith\+0x38> be ?37 ?04 ?40 ? * cfnegslt mvf0, ?mvf7 -0*564 <fp_arith\+0x3c> 5e ?33 ?e4 ?60 ? * cfnegdpl mvd14, ?mvd3 -0*568 <fp_arith\+0x40> ce ?31 ?a4 ?60 ? * cfnegdgt mvd10, ?mvd1 -0*56c <fp_arith\+0x44> 8e ?3d ?f4 ?60 ? * cfnegdhi mvd15, ?mvd13 -0*570 <fp_arith\+0x48> 6e ?34 ?b4 ?60 ? * cfnegdvs mvd11, ?mvd4 -0*574 <fp_arith\+0x4c> 2e ?30 ?94 ?60 ? * cfnegdcs mvd9, ?mvd0 -0*578 <fp_arith\+0x50> 5e ?3a ?f4 ?89 ? * cfaddspl mvf15, ?mvf10, ?mvf9 -0*57c <fp_arith\+0x54> ee ?38 ?34 ?8d ? * cfadds mvf3, ?mvf8, ?mvf13 -0*580 <fp_arith\+0x58> 2e ?3c ?14 ?86 ? * cfaddscs mvf1, ?mvf12, ?mvf6 -0*584 <fp_arith\+0x5c> 0e ?35 ?74 ?8e ? * cfaddseq mvf7, ?mvf5, ?mvf14 -0*588 <fp_arith\+0x60> ce ?31 ?a4 ?88 ? * cfaddsgt mvf10, ?mvf1, ?mvf8 -0*58c <fp_arith\+0x64> de ?3b ?64 ?a4 ? * cfadddle mvd6, ?mvd11, ?mvd4 -0*590 <fp_arith\+0x68> 9e ?35 ?04 ?af ? * cfadddls mvd0, ?mvd5, ?mvd15 -0*594 <fp_arith\+0x6c> 9e ?3e ?44 ?a3 ? * cfadddls mvd4, ?mvd14, ?mvd3 -0*598 <fp_arith\+0x70> de ?32 ?74 ?a1 ? * cfadddle mvd7, ?mvd2, ?mvd1 -0*59c <fp_arith\+0x74> 6e ?30 ?b4 ?a7 ? * cfadddvs mvd11, ?mvd0, ?mvd7 -0*5a0 <fp_arith\+0x78> ee ?3c ?34 ?ca ? * cfsubs mvf3, ?mvf12, ?mvf10 -0*5a4 <fp_arith\+0x7c> 8e ?3d ?f4 ?c6 ? * cfsubshi mvf15, ?mvf13, ?mvf6 -0*5a8 <fp_arith\+0x80> 4e ?39 ?24 ?c0 ? * cfsubsmi mvf2, ?mvf9, ?mvf0 -0*5ac <fp_arith\+0x84> ee ?39 ?a4 ?c4 ? * cfsubs mvf10, ?mvf9, ?mvf4 -0*5b0 <fp_arith\+0x88> 3e ?3d ?84 ?c7 ? * cfsubscc mvf8, ?mvf13, ?mvf7 -0*5b4 <fp_arith\+0x8c> 1e ?36 ?c4 ?eb ? * cfsubdne mvd12, ?mvd6, ?mvd11 -0*5b8 <fp_arith\+0x90> 7e ?3e ?54 ?e3 ? * cfsubdvc mvd5, ?mvd14, ?mvd3 -0*5bc <fp_arith\+0x94> ae ?38 ?14 ?ef ? * cfsubdge mvd1, ?mvd8, ?mvd15 -0*5c0 <fp_arith\+0x98> 6e ?34 ?b4 ?e2 ? * cfsubdvs mvd11, ?mvd4, ?mvd2 -0*5c4 <fp_arith\+0x9c> 0e ?3f ?54 ?ea ? * cfsubdeq mvd5, ?mvd15, ?mvd10 -0*5c8 <fp_arith\+0xa0> 4e ?13 ?e4 ?08 ? * cfmulsmi mvf14, ?mvf3, ?mvf8 -0*5cc <fp_arith\+0xa4> 7e ?11 ?24 ?0c ? * cfmulsvc mvf2, ?mvf1, ?mvf12 -0*5d0 <fp_arith\+0xa8> be ?17 ?04 ?05 ? * cfmulslt mvf0, ?mvf7, ?mvf5 -0*5d4 <fp_arith\+0xac> 3e ?1a ?c4 ?01 ? * cfmulscc mvf12, ?mvf10, ?mvf1 -0*5d8 <fp_arith\+0xb0> ee ?16 ?d4 ?0b ? * cfmuls mvf13, ?mvf6, ?mvf11 -0*5dc <fp_arith\+0xb4> 2e ?10 ?94 ?25 ? * cfmuldcs mvd9, ?mvd0, ?mvd5 -0*5e0 <fp_arith\+0xb8> ae ?14 ?94 ?2e ? * cfmuldge mvd9, ?mvd4, ?mvd14 -0*5e4 <fp_arith\+0xbc> 8e ?17 ?d4 ?22 ? * cfmuldhi mvd13, ?mvd7, ?mvd2 -0*5e8 <fp_arith\+0xc0> ce ?1b ?64 ?20 ? * cfmuldgt mvd6, ?mvd11, ?mvd0 -0*5ec <fp_arith\+0xc4> 5e ?13 ?e4 ?2c ? * cfmuldpl mvd14, ?mvd3, ?mvd12 +0*528 <fp_arith> 9e ?3e ?44 ?00 ? * cfabssls mvf4, ?mvf14 +0*52c <fp_arith\+0x4> 3e ?3d ?84 ?00 ? * cfabsscc mvf8, ?mvf13 +0*530 <fp_arith\+0x8> 7e ?31 ?24 ?00 ? * cfabssvc mvf2, ?mvf1 +0*534 <fp_arith\+0xc> ce ?3b ?64 ?00 ? * cfabssgt mvf6, ?mvf11 +0*538 <fp_arith\+0x10> 0e ?35 ?74 ?00 ? * cfabsseq mvf7, ?mvf5 +0*53c <fp_arith\+0x14> ee ?3c ?34 ?20 ? * cfabsd mvd3, ?mvd12 +0*540 <fp_arith\+0x18> ae ?38 ?14 ?20 ? * cfabsdge mvd1, ?mvd8 +0*544 <fp_arith\+0x1c> ee ?36 ?d4 ?20 ? * cfabsd mvd13, ?mvd6 +0*548 <fp_arith\+0x20> be ?32 ?44 ?20 ? * cfabsdlt mvd4, ?mvd2 +0*54c <fp_arith\+0x24> 9e ?35 ?04 ?20 ? * cfabsdls mvd0, ?mvd5 +0*550 <fp_arith\+0x28> ee ?39 ?a4 ?40 ? * cfnegs mvf10, ?mvf9 +0*554 <fp_arith\+0x2c> 4e ?33 ?e4 ?40 ? * cfnegsmi mvf14, ?mvf3 +0*558 <fp_arith\+0x30> 8e ?37 ?d4 ?40 ? * cfnegshi mvf13, ?mvf7 +0*55c <fp_arith\+0x34> 2e ?3c ?14 ?40 ? * cfnegscs mvf1, ?mvf12 +0*560 <fp_arith\+0x38> 6e ?30 ?b4 ?40 ? * cfnegsvs mvf11, ?mvf0 +0*564 <fp_arith\+0x3c> 7e ?3e ?54 ?60 ? * cfnegdvc mvd5, ?mvd14 +0*568 <fp_arith\+0x40> 3e ?3a ?c4 ?60 ? * cfnegdcc mvd12, ?mvd10 +0*56c <fp_arith\+0x44> 1e ?3f ?84 ?60 ? * cfnegdne mvd8, ?mvd15 +0*570 <fp_arith\+0x48> de ?3b ?64 ?60 ? * cfnegdle mvd6, ?mvd11 +0*574 <fp_arith\+0x4c> 4e ?39 ?24 ?60 ? * cfnegdmi mvd2, ?mvd9 +0*578 <fp_arith\+0x50> 0e ?3f ?54 ?8a ? * cfaddseq mvf5, ?mvf15, ?mvf10 +0*57c <fp_arith\+0x54> 4e ?33 ?e4 ?88 ? * cfaddsmi mvf14, ?mvf3, ?mvf8 +0*580 <fp_arith\+0x58> 7e ?31 ?24 ?8c ? * cfaddsvc mvf2, ?mvf1, ?mvf12 +0*584 <fp_arith\+0x5c> be ?37 ?04 ?85 ? * cfaddslt mvf0, ?mvf7, ?mvf5 +0*588 <fp_arith\+0x60> 3e ?3a ?c4 ?81 ? * cfaddscc mvf12, ?mvf10, ?mvf1 +0*58c <fp_arith\+0x64> ee ?36 ?d4 ?ab ? * cfaddd mvd13, ?mvd6, ?mvd11 +0*590 <fp_arith\+0x68> 2e ?30 ?94 ?a5 ? * cfadddcs mvd9, ?mvd0, ?mvd5 +0*594 <fp_arith\+0x6c> ae ?34 ?94 ?ae ? * cfadddge mvd9, ?mvd4, ?mvd14 +0*598 <fp_arith\+0x70> 8e ?37 ?d4 ?a2 ? * cfadddhi mvd13, ?mvd7, ?mvd2 +0*59c <fp_arith\+0x74> ce ?3b ?64 ?a0 ? * cfadddgt mvd6, ?mvd11, ?mvd0 +0*5a0 <fp_arith\+0x78> 5e ?33 ?e4 ?cc ? * cfsubspl mvf14, ?mvf3, ?mvf12 +0*5a4 <fp_arith\+0x7c> 1e ?3f ?84 ?cd ? * cfsubsne mvf8, ?mvf15, ?mvf13 +0*5a8 <fp_arith\+0x80> be ?32 ?44 ?c9 ? * cfsubslt mvf4, ?mvf2, ?mvf9 +0*5ac <fp_arith\+0x84> 5e ?3a ?f4 ?c9 ? * cfsubspl mvf15, ?mvf10, ?mvf9 +0*5b0 <fp_arith\+0x88> ee ?38 ?34 ?cd ? * cfsubs mvf3, ?mvf8, ?mvf13 +0*5b4 <fp_arith\+0x8c> 2e ?3c ?14 ?e6 ? * cfsubdcs mvd1, ?mvd12, ?mvd6 +0*5b8 <fp_arith\+0x90> 0e ?35 ?74 ?ee ? * cfsubdeq mvd7, ?mvd5, ?mvd14 +0*5bc <fp_arith\+0x94> ce ?31 ?a4 ?e8 ? * cfsubdgt mvd10, ?mvd1, ?mvd8 +0*5c0 <fp_arith\+0x98> de ?3b ?64 ?e4 ? * cfsubdle mvd6, ?mvd11, ?mvd4 +0*5c4 <fp_arith\+0x9c> 9e ?35 ?04 ?ef ? * cfsubdls mvd0, ?mvd5, ?mvd15 +0*5c8 <fp_arith\+0xa0> 9e ?1e ?44 ?03 ? * cfmulsls mvf4, ?mvf14, ?mvf3 +0*5cc <fp_arith\+0xa4> de ?12 ?74 ?01 ? * cfmulsle mvf7, ?mvf2, ?mvf1 +0*5d0 <fp_arith\+0xa8> 6e ?10 ?b4 ?07 ? * cfmulsvs mvf11, ?mvf0, ?mvf7 +0*5d4 <fp_arith\+0xac> ee ?1c ?34 ?0a ? * cfmuls mvf3, ?mvf12, ?mvf10 +0*5d8 <fp_arith\+0xb0> 8e ?1d ?f4 ?06 ? * cfmulshi mvf15, ?mvf13, ?mvf6 +0*5dc <fp_arith\+0xb4> 4e ?19 ?24 ?20 ? * cfmuldmi mvd2, ?mvd9, ?mvd0 +0*5e0 <fp_arith\+0xb8> ee ?19 ?a4 ?24 ? * cfmuld mvd10, ?mvd9, ?mvd4 +0*5e4 <fp_arith\+0xbc> 3e ?1d ?84 ?27 ? * cfmuldcc mvd8, ?mvd13, ?mvd7 +0*5e8 <fp_arith\+0xc0> 1e ?16 ?c4 ?2b ? * cfmuldne mvd12, ?mvd6, ?mvd11 +0*5ec <fp_arith\+0xc4> 7e ?1e ?54 ?23 ? * cfmuldvc mvd5, ?mvd14, ?mvd3 # int_arith: -0*5f0 <int_arith> 1e ?3f ?85 ?00 ? * cfabs32ne mvfx8, ?mvfx15 -0*5f4 <int_arith\+0x4> de ?3b ?65 ?00 ? * cfabs32le mvfx6, ?mvfx11 -0*5f8 <int_arith\+0x8> 4e ?39 ?25 ?00 ? * cfabs32mi mvfx2, ?mvfx9 -0*5fc <int_arith\+0xc> 0e ?3f ?55 ?00 ? * cfabs32eq mvfx5, ?mvfx15 -0*600 <int_arith\+0x10> ae ?34 ?95 ?00 ? * cfabs32ge mvfx9, ?mvfx4 -0*604 <int_arith\+0x14> ee ?38 ?35 ?20 ? * cfabs64 mvdx3, ?mvdx8 -0*608 <int_arith\+0x18> de ?32 ?75 ?20 ? * cfabs64le mvdx7, ?mvdx2 -0*60c <int_arith\+0x1c> 1e ?36 ?c5 ?20 ? * cfabs64ne mvdx12, ?mvdx6 -0*610 <int_arith\+0x20> be ?37 ?05 ?20 ? * cfabs64lt mvdx0, ?mvdx7 -0*614 <int_arith\+0x24> 5e ?33 ?e5 ?20 ? * cfabs64pl mvdx14, ?mvdx3 -0*618 <int_arith\+0x28> ce ?31 ?a5 ?40 ? * cfneg32gt mvfx10, ?mvfx1 -0*61c <int_arith\+0x2c> 8e ?3d ?f5 ?40 ? * cfneg32hi mvfx15, ?mvfx13 -0*620 <int_arith\+0x30> 6e ?34 ?b5 ?40 ? * cfneg32vs mvfx11, ?mvfx4 -0*624 <int_arith\+0x34> 2e ?30 ?95 ?40 ? * cfneg32cs mvfx9, ?mvfx0 -0*628 <int_arith\+0x38> 5e ?3a ?f5 ?40 ? * cfneg32pl mvfx15, ?mvfx10 -0*62c <int_arith\+0x3c> 9e ?3e ?45 ?60 ? * cfneg64ls mvdx4, ?mvdx14 -0*630 <int_arith\+0x40> 3e ?3d ?85 ?60 ? * cfneg64cc mvdx8, ?mvdx13 -0*634 <int_arith\+0x44> 7e ?31 ?25 ?60 ? * cfneg64vc mvdx2, ?mvdx1 -0*638 <int_arith\+0x48> ce ?3b ?65 ?60 ? * cfneg64gt mvdx6, ?mvdx11 -0*63c <int_arith\+0x4c> 0e ?35 ?75 ?60 ? * cfneg64eq mvdx7, ?mvdx5 -0*640 <int_arith\+0x50> ee ?3c ?35 ?8a ? * cfadd32 mvfx3, ?mvfx12, ?mvfx10 -0*644 <int_arith\+0x54> 8e ?3d ?f5 ?86 ? * cfadd32hi mvfx15, ?mvfx13, ?mvfx6 -0*648 <int_arith\+0x58> 4e ?39 ?25 ?80 ? * cfadd32mi mvfx2, ?mvfx9, ?mvfx0 -0*64c <int_arith\+0x5c> ee ?39 ?a5 ?84 ? * cfadd32 mvfx10, ?mvfx9, ?mvfx4 -0*650 <int_arith\+0x60> 3e ?3d ?85 ?87 ? * cfadd32cc mvfx8, ?mvfx13, ?mvfx7 -0*654 <int_arith\+0x64> 1e ?36 ?c5 ?ab ? * cfadd64ne mvdx12, ?mvdx6, ?mvdx11 -0*658 <int_arith\+0x68> 7e ?3e ?55 ?a3 ? * cfadd64vc mvdx5, ?mvdx14, ?mvdx3 -0*65c <int_arith\+0x6c> ae ?38 ?15 ?af ? * cfadd64ge mvdx1, ?mvdx8, ?mvdx15 -0*660 <int_arith\+0x70> 6e ?34 ?b5 ?a2 ? * cfadd64vs mvdx11, ?mvdx4, ?mvdx2 -0*664 <int_arith\+0x74> 0e ?3f ?55 ?aa ? * cfadd64eq mvdx5, ?mvdx15, ?mvdx10 -0*668 <int_arith\+0x78> 4e ?33 ?e5 ?c8 ? * cfsub32mi mvfx14, ?mvfx3, ?mvfx8 -0*66c <int_arith\+0x7c> 7e ?31 ?25 ?cc ? * cfsub32vc mvfx2, ?mvfx1, ?mvfx12 -0*670 <int_arith\+0x80> be ?37 ?05 ?c5 ? * cfsub32lt mvfx0, ?mvfx7, ?mvfx5 -0*674 <int_arith\+0x84> 3e ?3a ?c5 ?c1 ? * cfsub32cc mvfx12, ?mvfx10, ?mvfx1 -0*678 <int_arith\+0x88> ee ?36 ?d5 ?cb ? * cfsub32 mvfx13, ?mvfx6, ?mvfx11 -0*67c <int_arith\+0x8c> 2e ?30 ?95 ?e5 ? * cfsub64cs mvdx9, ?mvdx0, ?mvdx5 -0*680 <int_arith\+0x90> ae ?34 ?95 ?ee ? * cfsub64ge mvdx9, ?mvdx4, ?mvdx14 -0*684 <int_arith\+0x94> 8e ?37 ?d5 ?e2 ? * cfsub64hi mvdx13, ?mvdx7, ?mvdx2 -0*688 <int_arith\+0x98> ce ?3b ?65 ?e0 ? * cfsub64gt mvdx6, ?mvdx11, ?mvdx0 -0*68c <int_arith\+0x9c> 5e ?33 ?e5 ?ec ? * cfsub64pl mvdx14, ?mvdx3, ?mvdx12 -0*690 <int_arith\+0xa0> 1e ?1f ?85 ?0d ? * cfmul32ne mvfx8, ?mvfx15, ?mvfx13 -0*694 <int_arith\+0xa4> be ?12 ?45 ?09 ? * cfmul32lt mvfx4, ?mvfx2, ?mvfx9 -0*698 <int_arith\+0xa8> 5e ?1a ?f5 ?09 ? * cfmul32pl mvfx15, ?mvfx10, ?mvfx9 -0*69c <int_arith\+0xac> ee ?18 ?35 ?0d ? * cfmul32 mvfx3, ?mvfx8, ?mvfx13 -0*6a0 <int_arith\+0xb0> 2e ?1c ?15 ?06 ? * cfmul32cs mvfx1, ?mvfx12, ?mvfx6 -0*6a4 <int_arith\+0xb4> 0e ?15 ?75 ?2e ? * cfmul64eq mvdx7, ?mvdx5, ?mvdx14 -0*6a8 <int_arith\+0xb8> ce ?11 ?a5 ?28 ? * cfmul64gt mvdx10, ?mvdx1, ?mvdx8 -0*6ac <int_arith\+0xbc> de ?1b ?65 ?24 ? * cfmul64le mvdx6, ?mvdx11, ?mvdx4 -0*6b0 <int_arith\+0xc0> 9e ?15 ?05 ?2f ? * cfmul64ls mvdx0, ?mvdx5, ?mvdx15 -0*6b4 <int_arith\+0xc4> 9e ?1e ?45 ?23 ? * cfmul64ls mvdx4, ?mvdx14, ?mvdx3 -0*6b8 <int_arith\+0xc8> de ?12 ?75 ?41 ? * cfmac32le mvfx7, ?mvfx2, ?mvfx1 -0*6bc <int_arith\+0xcc> 6e ?10 ?b5 ?47 ? * cfmac32vs mvfx11, ?mvfx0, ?mvfx7 -0*6c0 <int_arith\+0xd0> ee ?1c ?35 ?4a ? * cfmac32 mvfx3, ?mvfx12, ?mvfx10 -0*6c4 <int_arith\+0xd4> 8e ?1d ?f5 ?46 ? * cfmac32hi mvfx15, ?mvfx13, ?mvfx6 -0*6c8 <int_arith\+0xd8> 4e ?19 ?25 ?40 ? * cfmac32mi mvfx2, ?mvfx9, ?mvfx0 -0*6cc <int_arith\+0xdc> ee ?19 ?a5 ?64 ? * cfmsc32 mvfx10, ?mvfx9, ?mvfx4 -0*6d0 <int_arith\+0xe0> 3e ?1d ?85 ?67 ? * cfmsc32cc mvfx8, ?mvfx13, ?mvfx7 -0*6d4 <int_arith\+0xe4> 1e ?16 ?c5 ?6b ? * cfmsc32ne mvfx12, ?mvfx6, ?mvfx11 -0*6d8 <int_arith\+0xe8> 7e ?1e ?55 ?63 ? * cfmsc32vc mvfx5, ?mvfx14, ?mvfx3 -0*6dc <int_arith\+0xec> ae ?18 ?15 ?6f ? * cfmsc32ge mvfx1, ?mvfx8, ?mvfx15 +0*5f0 <int_arith> ae ?38 ?15 ?00 ? * cfabs32ge mvfx1, ?mvfx8 +0*5f4 <int_arith\+0x4> ee ?36 ?d5 ?00 ? * cfabs32 mvfx13, ?mvfx6 +0*5f8 <int_arith\+0x8> be ?32 ?45 ?00 ? * cfabs32lt mvfx4, ?mvfx2 +0*5fc <int_arith\+0xc> 9e ?35 ?05 ?00 ? * cfabs32ls mvfx0, ?mvfx5 +0*600 <int_arith\+0x10> ee ?39 ?a5 ?00 ? * cfabs32 mvfx10, ?mvfx9 +0*604 <int_arith\+0x14> 4e ?33 ?e5 ?20 ? * cfabs64mi mvdx14, ?mvdx3 +0*608 <int_arith\+0x18> 8e ?37 ?d5 ?20 ? * cfabs64hi mvdx13, ?mvdx7 +0*60c <int_arith\+0x1c> 2e ?3c ?15 ?20 ? * cfabs64cs mvdx1, ?mvdx12 +0*610 <int_arith\+0x20> 6e ?30 ?b5 ?20 ? * cfabs64vs mvdx11, ?mvdx0 +0*614 <int_arith\+0x24> 7e ?3e ?55 ?20 ? * cfabs64vc mvdx5, ?mvdx14 +0*618 <int_arith\+0x28> 3e ?3a ?c5 ?40 ? * cfneg32cc mvfx12, ?mvfx10 +0*61c <int_arith\+0x2c> 1e ?3f ?85 ?40 ? * cfneg32ne mvfx8, ?mvfx15 +0*620 <int_arith\+0x30> de ?3b ?65 ?40 ? * cfneg32le mvfx6, ?mvfx11 +0*624 <int_arith\+0x34> 4e ?39 ?25 ?40 ? * cfneg32mi mvfx2, ?mvfx9 +0*628 <int_arith\+0x38> 0e ?3f ?55 ?40 ? * cfneg32eq mvfx5, ?mvfx15 +0*62c <int_arith\+0x3c> ae ?34 ?95 ?60 ? * cfneg64ge mvdx9, ?mvdx4 +0*630 <int_arith\+0x40> ee ?38 ?35 ?60 ? * cfneg64 mvdx3, ?mvdx8 +0*634 <int_arith\+0x44> de ?32 ?75 ?60 ? * cfneg64le mvdx7, ?mvdx2 +0*638 <int_arith\+0x48> 1e ?36 ?c5 ?60 ? * cfneg64ne mvdx12, ?mvdx6 +0*63c <int_arith\+0x4c> be ?37 ?05 ?60 ? * cfneg64lt mvdx0, ?mvdx7 +0*640 <int_arith\+0x50> 5e ?33 ?e5 ?8c ? * cfadd32pl mvfx14, ?mvfx3, ?mvfx12 +0*644 <int_arith\+0x54> 1e ?3f ?85 ?8d ? * cfadd32ne mvfx8, ?mvfx15, ?mvfx13 +0*648 <int_arith\+0x58> be ?32 ?45 ?89 ? * cfadd32lt mvfx4, ?mvfx2, ?mvfx9 +0*64c <int_arith\+0x5c> 5e ?3a ?f5 ?89 ? * cfadd32pl mvfx15, ?mvfx10, ?mvfx9 +0*650 <int_arith\+0x60> ee ?38 ?35 ?8d ? * cfadd32 mvfx3, ?mvfx8, ?mvfx13 +0*654 <int_arith\+0x64> 2e ?3c ?15 ?a6 ? * cfadd64cs mvdx1, ?mvdx12, ?mvdx6 +0*658 <int_arith\+0x68> 0e ?35 ?75 ?ae ? * cfadd64eq mvdx7, ?mvdx5, ?mvdx14 +0*65c <int_arith\+0x6c> ce ?31 ?a5 ?a8 ? * cfadd64gt mvdx10, ?mvdx1, ?mvdx8 +0*660 <int_arith\+0x70> de ?3b ?65 ?a4 ? * cfadd64le mvdx6, ?mvdx11, ?mvdx4 +0*664 <int_arith\+0x74> 9e ?35 ?05 ?af ? * cfadd64ls mvdx0, ?mvdx5, ?mvdx15 +0*668 <int_arith\+0x78> 9e ?3e ?45 ?c3 ? * cfsub32ls mvfx4, ?mvfx14, ?mvfx3 +0*66c <int_arith\+0x7c> de ?32 ?75 ?c1 ? * cfsub32le mvfx7, ?mvfx2, ?mvfx1 +0*670 <int_arith\+0x80> 6e ?30 ?b5 ?c7 ? * cfsub32vs mvfx11, ?mvfx0, ?mvfx7 +0*674 <int_arith\+0x84> ee ?3c ?35 ?ca ? * cfsub32 mvfx3, ?mvfx12, ?mvfx10 +0*678 <int_arith\+0x88> 8e ?3d ?f5 ?c6 ? * cfsub32hi mvfx15, ?mvfx13, ?mvfx6 +0*67c <int_arith\+0x8c> 4e ?39 ?25 ?e0 ? * cfsub64mi mvdx2, ?mvdx9, ?mvdx0 +0*680 <int_arith\+0x90> ee ?39 ?a5 ?e4 ? * cfsub64 mvdx10, ?mvdx9, ?mvdx4 +0*684 <int_arith\+0x94> 3e ?3d ?85 ?e7 ? * cfsub64cc mvdx8, ?mvdx13, ?mvdx7 +0*688 <int_arith\+0x98> 1e ?36 ?c5 ?eb ? * cfsub64ne mvdx12, ?mvdx6, ?mvdx11 +0*68c <int_arith\+0x9c> 7e ?3e ?55 ?e3 ? * cfsub64vc mvdx5, ?mvdx14, ?mvdx3 +0*690 <int_arith\+0xa0> ae ?18 ?15 ?0f ? * cfmul32ge mvfx1, ?mvfx8, ?mvfx15 +0*694 <int_arith\+0xa4> 6e ?14 ?b5 ?02 ? * cfmul32vs mvfx11, ?mvfx4, ?mvfx2 +0*698 <int_arith\+0xa8> 0e ?1f ?55 ?0a ? * cfmul32eq mvfx5, ?mvfx15, ?mvfx10 +0*69c <int_arith\+0xac> 4e ?13 ?e5 ?08 ? * cfmul32mi mvfx14, ?mvfx3, ?mvfx8 +0*6a0 <int_arith\+0xb0> 7e ?11 ?25 ?0c ? * cfmul32vc mvfx2, ?mvfx1, ?mvfx12 +0*6a4 <int_arith\+0xb4> be ?17 ?05 ?25 ? * cfmul64lt mvdx0, ?mvdx7, ?mvdx5 +0*6a8 <int_arith\+0xb8> 3e ?1a ?c5 ?21 ? * cfmul64cc mvdx12, ?mvdx10, ?mvdx1 +0*6ac <int_arith\+0xbc> ee ?16 ?d5 ?2b ? * cfmul64 mvdx13, ?mvdx6, ?mvdx11 +0*6b0 <int_arith\+0xc0> 2e ?10 ?95 ?25 ? * cfmul64cs mvdx9, ?mvdx0, ?mvdx5 +0*6b4 <int_arith\+0xc4> ae ?14 ?95 ?2e ? * cfmul64ge mvdx9, ?mvdx4, ?mvdx14 +0*6b8 <int_arith\+0xc8> 8e ?17 ?d5 ?42 ? * cfmac32hi mvfx13, ?mvfx7, ?mvfx2 +0*6bc <int_arith\+0xcc> ce ?1b ?65 ?40 ? * cfmac32gt mvfx6, ?mvfx11, ?mvfx0 +0*6c0 <int_arith\+0xd0> 5e ?13 ?e5 ?4c ? * cfmac32pl mvfx14, ?mvfx3, ?mvfx12 +0*6c4 <int_arith\+0xd4> 1e ?1f ?85 ?4d ? * cfmac32ne mvfx8, ?mvfx15, ?mvfx13 +0*6c8 <int_arith\+0xd8> be ?12 ?45 ?49 ? * cfmac32lt mvfx4, ?mvfx2, ?mvfx9 +0*6cc <int_arith\+0xdc> 5e ?1a ?f5 ?69 ? * cfmsc32pl mvfx15, ?mvfx10, ?mvfx9 +0*6d0 <int_arith\+0xe0> ee ?18 ?35 ?6d ? * cfmsc32 mvfx3, ?mvfx8, ?mvfx13 +0*6d4 <int_arith\+0xe4> 2e ?1c ?15 ?66 ? * cfmsc32cs mvfx1, ?mvfx12, ?mvfx6 +0*6d8 <int_arith\+0xe8> 0e ?15 ?75 ?6e ? * cfmsc32eq mvfx7, ?mvfx5, ?mvfx14 +0*6dc <int_arith\+0xec> ce ?11 ?a5 ?68 ? * cfmsc32gt mvfx10, ?mvfx1, ?mvfx8 # acc_arith: -0*6e0 <acc_arith> 6e ?02 ?46 ?69 ? * cfmadd32vs mvax3, ?mvfx4, ?mvfx2, ?mvfx9 -0*6e4 <acc_arith\+0x4> 0e ?0a ?f6 ?29 ? * cfmadd32eq mvax1, ?mvfx15, ?mvfx10, ?mvfx9 -0*6e8 <acc_arith\+0x8> 4e ?08 ?36 ?2d ? * cfmadd32mi mvax1, ?mvfx3, ?mvfx8, ?mvfx13 -0*6ec <acc_arith\+0xc> 7e ?0c ?16 ?06 ? * cfmadd32vc mvax0, ?mvfx1, ?mvfx12, ?mvfx6 -0*6f0 <acc_arith\+0x10> be ?05 ?76 ?0e ? * cfmadd32lt mvax0, ?mvfx7, ?mvfx5, ?mvfx14 -0*6f4 <acc_arith\+0x14> 3e ?11 ?a6 ?08 ? * cfmsub32cc mvax0, ?mvfx10, ?mvfx1, ?mvfx8 -0*6f8 <acc_arith\+0x18> ee ?1b ?66 ?44 ? * cfmsub32 mvax2, ?mvfx6, ?mvfx11, ?mvfx4 -0*6fc <acc_arith\+0x1c> 2e ?15 ?06 ?2f ? * cfmsub32cs mvax1, ?mvfx0, ?mvfx5, ?mvfx15 -0*700 <acc_arith\+0x20> ae ?1e ?46 ?43 ? * cfmsub32ge mvax2, ?mvfx4, ?mvfx14, ?mvfx3 -0*704 <acc_arith\+0x24> 8e ?12 ?76 ?61 ? * cfmsub32hi mvax3, ?mvfx7, ?mvfx2, ?mvfx1 -0*708 <acc_arith\+0x28> ce ?20 ?16 ?07 ? * cfmadda32gt mvax0, ?mvax1, ?mvfx0, ?mvfx7 -0*70c <acc_arith\+0x2c> 5e ?2c ?26 ?4a ? * cfmadda32pl mvax2, ?mvax2, ?mvfx12, ?mvfx10 -0*710 <acc_arith\+0x30> 1e ?2d ?36 ?26 ? * cfmadda32ne mvax1, ?mvax3, ?mvfx13, ?mvfx6 -0*714 <acc_arith\+0x34> be ?29 ?06 ?40 ? * cfmadda32lt mvax2, ?mvax0, ?mvfx9, ?mvfx0 -0*718 <acc_arith\+0x38> 5e ?29 ?26 ?64 ? * cfmadda32pl mvax3, ?mvax2, ?mvfx9, ?mvfx4 -0*71c <acc_arith\+0x3c> ee ?3d ?16 ?67 ? * cfmsuba32 mvax3, ?mvax1, ?mvfx13, ?mvfx7 -0*720 <acc_arith\+0x40> 2e ?36 ?26 ?6b ? * cfmsuba32cs mvax3, ?mvax2, ?mvfx6, ?mvfx11 -0*724 <acc_arith\+0x44> 0e ?3e ?36 ?23 ? * cfmsuba32eq mvax1, ?mvax3, ?mvfx14, ?mvfx3 -0*728 <acc_arith\+0x48> ce ?38 ?36 ?2f ? * cfmsuba32gt mvax1, ?mvax3, ?mvfx8, ?mvfx15 -0*72c <acc_arith\+0x4c> de ?34 ?36 ?02 ? * cfmsuba32le mvax0, ?mvax3, ?mvfx4, ?mvfx2 +0*6e0 <acc_arith> de ?04 ?b6 ?02 ? * cfmadd32le mvax0, ?mvfx11, ?mvfx4, ?mvfx2 +0*6e4 <acc_arith\+0x4> 9e ?0f ?56 ?0a ? * cfmadd32ls mvax0, ?mvfx5, ?mvfx15, ?mvfx10 +0*6e8 <acc_arith\+0x8> 9e ?03 ?e6 ?08 ? * cfmadd32ls mvax0, ?mvfx14, ?mvfx3, ?mvfx8 +0*6ec <acc_arith\+0xc> de ?01 ?26 ?4c ? * cfmadd32le mvax2, ?mvfx2, ?mvfx1, ?mvfx12 +0*6f0 <acc_arith\+0x10> 6e ?07 ?06 ?25 ? * cfmadd32vs mvax1, ?mvfx0, ?mvfx7, ?mvfx5 +0*6f4 <acc_arith\+0x14> ee ?1a ?c6 ?41 ? * cfmsub32 mvax2, ?mvfx12, ?mvfx10, ?mvfx1 +0*6f8 <acc_arith\+0x18> 8e ?16 ?d6 ?6b ? * cfmsub32hi mvax3, ?mvfx13, ?mvfx6, ?mvfx11 +0*6fc <acc_arith\+0x1c> 4e ?10 ?96 ?05 ? * cfmsub32mi mvax0, ?mvfx9, ?mvfx0, ?mvfx5 +0*700 <acc_arith\+0x20> ee ?14 ?96 ?4e ? * cfmsub32 mvax2, ?mvfx9, ?mvfx4, ?mvfx14 +0*704 <acc_arith\+0x24> 3e ?17 ?d6 ?22 ? * cfmsub32cc mvax1, ?mvfx13, ?mvfx7, ?mvfx2 +0*708 <acc_arith\+0x28> 1e ?2b ?06 ?40 ? * cfmadda32ne mvax2, ?mvax0, ?mvfx11, ?mvfx0 +0*70c <acc_arith\+0x2c> 7e ?23 ?26 ?6c ? * cfmadda32vc mvax3, ?mvax2, ?mvfx3, ?mvfx12 +0*710 <acc_arith\+0x30> ae ?2f ?16 ?6d ? * cfmadda32ge mvax3, ?mvax1, ?mvfx15, ?mvfx13 +0*714 <acc_arith\+0x34> 6e ?22 ?26 ?69 ? * cfmadda32vs mvax3, ?mvax2, ?mvfx2, ?mvfx9 +0*718 <acc_arith\+0x38> 0e ?2a ?36 ?29 ? * cfmadda32eq mvax1, ?mvax3, ?mvfx10, ?mvfx9 +0*71c <acc_arith\+0x3c> 4e ?38 ?36 ?2d ? * cfmsuba32mi mvax1, ?mvax3, ?mvfx8, ?mvfx13 +0*720 <acc_arith\+0x40> 7e ?3c ?36 ?06 ? * cfmsuba32vc mvax0, ?mvax3, ?mvfx12, ?mvfx6 +0*724 <acc_arith\+0x44> be ?35 ?16 ?0e ? * cfmsuba32lt mvax0, ?mvax1, ?mvfx5, ?mvfx14 +0*728 <acc_arith\+0x48> 3e ?31 ?16 ?08 ? * cfmsuba32cc mvax0, ?mvax1, ?mvfx1, ?mvfx8 +0*72c <acc_arith\+0x4c> ee ?3b ?06 ?44 ? * cfmsuba32 mvax2, ?mvax0, ?mvfx11, ?mvfx4 diff --git a/gas/testsuite/gas/arm/maverick.s b/gas/testsuite/gas/arm/maverick.s index c044348d8dd..ca39f63786a 100644 --- a/gas/testsuite/gas/arm/maverick.s +++ b/gas/testsuite/gas/arm/maverick.s @@ -1,470 +1,470 @@ .text .align load_store: - cfldrseq mvf5, [sp, #252] - cfldrsmi mvf14, [r11, #72] - cfldrsvc mvf2, [r12, #-240] - cfldrslt mvf0, [sl, #252] - cfldrsgt mvf10, [fp, #72] - cfldrsle mvf6, [ip, #-240]! - cfldrsls mvf0, [r10, #252]! - cfldrsmi mvf14, [r11, #72]! - cfldrsvc mvf2, [r12, #-240]! - cfldrslt mvf0, [sl, #252]! - cfldrsgt mvf10, [fp], #72 - cfldrsle mvf6, [ip], #-240 - cfldrsls mvf0, [r10], #252 - cfldrsmi mvf14, [r11], #72 - cfldrsvc mvf2, [r12], #-240 - cfldrdlt mvd0, [sl, #252] - cfldrdgt mvd10, [fp, #72] - cfldrdle mvd6, [ip, #-240] - cfldrdls mvd0, [r10, #252] - cfldrdmi mvd14, [r11, #72] - cfldrdvc mvd2, [r12, #-240]! - cfldrdlt mvd0, [sl, #252]! - cfldrdgt mvd10, [fp, #72]! - cfldrdle mvd6, [ip, #-240]! - cfldrdls mvd0, [r10, #252]! - cfldrdmi mvd14, [r11], #72 - cfldrdvc mvd2, [r12], #-240 - cfldrdlt mvd0, [sl], #252 - cfldrdgt mvd10, [fp], #72 - cfldrdle mvd6, [ip], #-240 - cfldr32ls mvfx0, [r10, #252] - cfldr32mi mvfx14, [r11, #72] - cfldr32vc mvfx2, [r12, #-240] - cfldr32lt mvfx0, [sl, #252] - cfldr32gt mvfx10, [fp, #72] - cfldr32le mvfx6, [ip, #-240]! - cfldr32ls mvfx0, [r10, #252]! - cfldr32mi mvfx14, [r11, #72]! - cfldr32vc mvfx2, [r12, #-240]! - cfldr32lt mvfx0, [sl, #252]! - cfldr32gt mvfx10, [fp], #72 - cfldr32le mvfx6, [ip], #-240 - cfldr32ls mvfx0, [r10], #252 - cfldr32mi mvfx14, [r11], #72 - cfldr32vc mvfx2, [r12], #-240 - cfldr64lt mvdx0, [sl, #252] - cfldr64gt mvdx10, [fp, #72] - cfldr64le mvdx6, [ip, #-240] - cfldr64ls mvdx0, [r10, #252] - cfldr64mi mvdx14, [r11, #72] - cfldr64vc mvdx2, [r12, #-240]! - cfldr64lt mvdx0, [sl, #252]! - cfldr64gt mvdx10, [fp, #72]! - cfldr64le mvdx6, [ip, #-240]! - cfldr64ls mvdx0, [r10, #252]! - cfldr64mi mvdx14, [r11], #72 - cfldr64vc mvdx2, [r12], #-240 - cfldr64lt mvdx0, [sl], #252 - cfldr64gt mvdx10, [fp], #72 - cfldr64le mvdx6, [ip], #-240 - cfstrsls mvf0, [r10, #252] - cfstrsmi mvf14, [r11, #72] - cfstrsvc mvf2, [r12, #-240] - cfstrslt mvf0, [sl, #252] - cfstrsgt mvf10, [fp, #72] - cfstrsle mvf6, [ip, #-240]! - cfstrsls mvf0, [r10, #252]! - cfstrsmi mvf14, [r11, #72]! - cfstrsvc mvf2, [r12, #-240]! - cfstrslt mvf0, [sl, #252]! - cfstrsgt mvf10, [fp], #72 - cfstrsle mvf6, [ip], #-240 - cfstrsls mvf0, [r10], #252 - cfstrsmi mvf14, [r11], #72 - cfstrsvc mvf2, [r12], #-240 - cfstrdlt mvd0, [sl, #252] - cfstrdgt mvd10, [fp, #72] - cfstrdle mvd6, [ip, #-240] - cfstrdls mvd0, [r10, #252] - cfstrdmi mvd14, [r11, #72] - cfstrdvc mvd2, [r12, #-240]! - cfstrdlt mvd0, [sl, #252]! - cfstrdgt mvd10, [fp, #72]! - cfstrdle mvd6, [ip, #-240]! - cfstrdls mvd0, [r10, #252]! - cfstrdmi mvd14, [r11], #72 - cfstrdvc mvd2, [r12], #-240 - cfstrdlt mvd0, [sl], #252 - cfstrdgt mvd10, [fp], #72 - cfstrdle mvd6, [ip], #-240 - cfstr32ls mvfx0, [r10, #252] - cfstr32mi mvfx14, [r11, #72] - cfstr32vc mvfx2, [r12, #-240] - cfstr32lt mvfx0, [sl, #252] - cfstr32gt mvfx10, [fp, #72] - cfstr32le mvfx6, [ip, #-240]! - cfstr32ls mvfx0, [r10, #252]! - cfstr32mi mvfx14, [r11, #72]! - cfstr32vc mvfx2, [r12, #-240]! - cfstr32lt mvfx0, [sl, #252]! - cfstr32gt mvfx10, [fp], #72 - cfstr32le mvfx6, [ip], #-240 - cfstr32ls mvfx0, [r10], #252 - cfstr32mi mvfx14, [r11], #72 - cfstr32vc mvfx2, [r12], #-240 - cfstr64lt mvdx0, [sl, #252] - cfstr64gt mvdx10, [fp, #72] - cfstr64le mvdx6, [ip, #-240] - cfstr64ls mvdx0, [r10, #252] - cfstr64mi mvdx14, [r11, #72] - cfstr64vc mvdx2, [r12, #-240]! - cfstr64lt mvdx0, [sl, #252]! - cfstr64gt mvdx10, [fp, #72]! - cfstr64le mvdx6, [ip, #-240]! - cfstr64ls mvdx0, [r10, #252]! - cfstr64mi mvdx14, [r11], #72 - cfstr64vc mvdx2, [r12], #-240 - cfstr64lt mvdx0, [sl], #252 - cfstr64gt mvdx10, [fp], #72 - cfstr64le mvdx6, [ip], #-240 + cfldrseq mvf5, [sp, #1020] + cfldrsmi mvf14, [r11, #292] + cfldrsvc mvf2, [r12, #-956] + cfldrslt mvf0, [sl, #-1020] + cfldrscc mvf12, [r1, #-156] + cfldrs mvf13, [r15, #416]! + cfldrscs mvf9, [r0, #-1020]! + cfldrsls mvf4, [r1, #-156]! + cfldrsle mvf7, [pc, #416]! + cfldrsvs mvf11, [r0, #-1020]! + cfldrscc mvf12, [r1], #-156 + cfldrs mvf13, [r15], #416 + cfldrscs mvf9, [r0], #-1020 + cfldrsls mvf4, [r1], #-156 + cfldrsle mvf7, [pc], #416 + cfldrdvs mvd11, [r0, #-1020] + cfldrdcc mvd12, [r1, #-156] + cfldrd mvd13, [r15, #416] + cfldrdcs mvd9, [r0, #-1020] + cfldrdls mvd4, [r1, #-156] + cfldrdle mvd7, [pc, #416]! + cfldrdvs mvd11, [r0, #-1020]! + cfldrdcc mvd12, [r1, #-156]! + cfldrd mvd13, [r15, #416]! + cfldrdcs mvd9, [r0, #-1020]! + cfldrdls mvd4, [r1], #-156 + cfldrdle mvd7, [pc], #416 + cfldrdvs mvd11, [r0], #-1020 + cfldrdcc mvd12, [r1], #-156 + cfldrd mvd13, [r15], #416 + cfldr32cs mvfx9, [r0, #-1020] + cfldr32ls mvfx4, [r1, #-156] + cfldr32le mvfx7, [pc, #416] + cfldr32vs mvfx11, [r0, #-1020] + cfldr32cc mvfx12, [r1, #-156] + cfldr32 mvfx13, [r15, #416]! + cfldr32cs mvfx9, [r0, #-1020]! + cfldr32ls mvfx4, [r1, #-156]! + cfldr32le mvfx7, [pc, #416]! + cfldr32vs mvfx11, [r0, #-1020]! + cfldr32cc mvfx12, [r1], #-156 + cfldr32 mvfx13, [r15], #416 + cfldr32cs mvfx9, [r0], #-1020 + cfldr32ls mvfx4, [r1], #-156 + cfldr32le mvfx7, [pc], #416 + cfldr64vs mvdx11, [r0, #-1020] + cfldr64cc mvdx12, [r1, #-156] + cfldr64 mvdx13, [r15, #416] + cfldr64cs mvdx9, [r0, #-1020] + cfldr64ls mvdx4, [r1, #-156] + cfldr64le mvdx7, [pc, #416]! + cfldr64vs mvdx11, [r0, #-1020]! + cfldr64cc mvdx12, [r1, #-156]! + cfldr64 mvdx13, [r15, #416]! + cfldr64cs mvdx9, [r0, #-1020]! + cfldr64ls mvdx4, [r1], #-156 + cfldr64le mvdx7, [pc], #416 + cfldr64vs mvdx11, [r0], #-1020 + cfldr64cc mvdx12, [r1], #-156 + cfldr64 mvdx13, [r15], #416 + cfstrscs mvf9, [r0, #-1020] + cfstrsls mvf4, [r1, #-156] + cfstrsle mvf7, [pc, #416] + cfstrsvs mvf11, [r0, #-1020] + cfstrscc mvf12, [r1, #-156] + cfstrs mvf13, [r15, #416]! + cfstrscs mvf9, [r0, #-1020]! + cfstrsls mvf4, [r1, #-156]! + cfstrsle mvf7, [pc, #416]! + cfstrsvs mvf11, [r0, #-1020]! + cfstrscc mvf12, [r1], #-156 + cfstrs mvf13, [r15], #416 + cfstrscs mvf9, [r0], #-1020 + cfstrsls mvf4, [r1], #-156 + cfstrsle mvf7, [pc], #416 + cfstrdvs mvd11, [r0, #-1020] + cfstrdcc mvd12, [r1, #-156] + cfstrd mvd13, [r15, #416] + cfstrdcs mvd9, [r0, #-1020] + cfstrdls mvd4, [r1, #-156] + cfstrdle mvd7, [pc, #416]! + cfstrdvs mvd11, [r0, #-1020]! + cfstrdcc mvd12, [r1, #-156]! + cfstrd mvd13, [r15, #416]! + cfstrdcs mvd9, [r0, #-1020]! + cfstrdls mvd4, [r1], #-156 + cfstrdle mvd7, [pc], #416 + cfstrdvs mvd11, [r0], #-1020 + cfstrdcc mvd12, [r1], #-156 + cfstrd mvd13, [r15], #416 + cfstr32cs mvfx9, [r0, #-1020] + cfstr32ls mvfx4, [r1, #-156] + cfstr32le mvfx7, [pc, #416] + cfstr32vs mvfx11, [r0, #-1020] + cfstr32cc mvfx12, [r1, #-156] + cfstr32 mvfx13, [r15, #416]! + cfstr32cs mvfx9, [r0, #-1020]! + cfstr32ls mvfx4, [r1, #-156]! + cfstr32le mvfx7, [pc, #416]! + cfstr32vs mvfx11, [r0, #-1020]! + cfstr32cc mvfx12, [r1], #-156 + cfstr32 mvfx13, [r15], #416 + cfstr32cs mvfx9, [r0], #-1020 + cfstr32ls mvfx4, [r1], #-156 + cfstr32le mvfx7, [pc], #416 + cfstr64vs mvdx11, [r0, #-1020] + cfstr64cc mvdx12, [r1, #-156] + cfstr64 mvdx13, [r15, #416] + cfstr64cs mvdx9, [r0, #-1020] + cfstr64ls mvdx4, [r1, #-156] + cfstr64le mvdx7, [pc, #416]! + cfstr64vs mvdx11, [r0, #-1020]! + cfstr64cc mvdx12, [r1, #-156]! + cfstr64 mvdx13, [r15, #416]! + cfstr64cs mvdx9, [r0, #-1020]! + cfstr64ls mvdx4, [r1], #-156 + cfstr64le mvdx7, [pc], #416 + cfstr64vs mvdx11, [r0], #-1020 + cfstr64cc mvdx12, [r1], #-156 + cfstr64 mvdx13, [r15], #416 move: - cfmvsrls mvf0, r10 - cfmvsr mvf10, r4 - cfmvsrmi mvf14, r11 - cfmvsrhi mvf13, r5 - cfmvsrcs mvf1, r6 - cfmvrsvs r3, mvf0 - cfmvrsvc r13, mvf14 - cfmvrscc r14, mvf10 - cfmvrsne r8, mvf15 - cfmvrsle r15, mvf11 - cfmvdlrmi mvd2, r3 - cfmvdlreq mvd5, sp - cfmvdlrge mvd9, lr - cfmvdlral mvd3, r8 - cfmvdlrle mvd7, pc - cfmvrdlne r6, mvd6 - cfmvrdllt r0, mvd7 - cfmvrdlpl r7, mvd3 - cfmvrdlgt r1, mvd1 - cfmvrdlhi r2, mvd13 - cfmvdhrvs mvd11, r6 - cfmvdhrcs mvd9, r0 - cfmvdhrpl mvd15, r7 - cfmvdhrls mvd4, r1 - cfmvdhrcc mvd8, r2 - cfmvrdhvc pc, mvd1 - cfmvrdhgt r9, mvd11 - cfmvrdheq sl, mvd5 - cfmvrdhal r4, mvd12 - cfmvrdhge fp, mvd8 - cfmv64lr mvdx13, r15 - cfmv64lrlt mvdx4, r9 - cfmv64lrls mvdx0, r10 - cfmv64lr mvdx10, r4 - cfmv64lrmi mvdx14, r11 - cfmvr64lhi r2, mvdx7 - cfmvr64lcs r12, mvdx12 - cfmvr64lvs r3, mvdx0 - cfmvr64lvc r13, mvdx14 - cfmvr64lcc r14, mvdx10 - cfmv64hrne mvdx8, r2 - cfmv64hrle mvdx6, ip - cfmv64hrmi mvdx2, r3 - cfmv64hreq mvdx5, sp - cfmv64hrge mvdx9, lr - cfmvr64hal r11, mvdx8 - cfmvr64hle r5, mvdx2 - cfmvr64hne r6, mvdx6 - cfmvr64hlt r0, mvdx7 - cfmvr64hpl r7, mvdx3 - cfmval32gt mvax1, mvfx1 - cfmval32hi mvax3, mvfx13 - cfmval32vs mvax3, mvfx4 - cfmval32cs mvax1, mvfx0 - cfmval32pl mvax3, mvfx10 - cfmv32alls mvfx4, mvax1 - cfmv32alcc mvfx8, mvax3 - cfmv32alvc mvfx2, mvax3 - cfmv32algt mvfx6, mvax1 - cfmv32aleq mvfx7, mvax3 - cfmvam32al mvax2, mvfx12 - cfmvam32ge mvax3, mvfx8 - cfmvam32 mvax2, mvfx6 - cfmvam32lt mvax2, mvfx2 - cfmvam32ls mvax0, mvfx5 - cfmv32am mvfx10, mvax2 - cfmv32ammi mvfx14, mvax3 - cfmv32amhi mvfx13, mvax2 - cfmv32amcs mvfx1, mvax2 - cfmv32amvs mvfx11, mvax0 - cfmvah32vc mvax3, mvfx14 - cfmvah32cc mvax0, mvfx10 - cfmvah32ne mvax1, mvfx15 - cfmvah32le mvax0, mvfx11 - cfmvah32mi mvax0, mvfx9 - cfmv32aheq mvfx5, mvax3 - cfmv32ahge mvfx9, mvax0 - cfmv32ahal mvfx3, mvax1 - cfmv32ahle mvfx7, mvax0 - cfmv32ahne mvfx12, mvax0 - cfmva32lt mvax0, mvfx7 - cfmva32pl mvax2, mvfx3 - cfmva32gt mvax1, mvfx1 - cfmva32hi mvax3, mvfx13 - cfmva32vs mvax3, mvfx4 - cfmv32acs mvfx9, mvax0 - cfmv32apl mvfx15, mvax2 - cfmv32als mvfx4, mvax1 - cfmv32acc mvfx8, mvax3 - cfmv32avc mvfx2, mvax3 - cfmva64gt mvax0, mvdx11 - cfmva64eq mvax1, mvdx5 - cfmva64al mvax2, mvdx12 - cfmva64ge mvax3, mvdx8 - cfmva64 mvax2, mvdx6 - cfmv64alt mvdx4, mvax0 - cfmv64als mvdx0, mvax1 - cfmv64a mvdx10, mvax2 - cfmv64ami mvdx14, mvax3 - cfmv64ahi mvdx13, mvax2 - cfmvsc32cs dspsc, mvdx12 - cfmvsc32vs dspsc, mvdx0 - cfmvsc32vc dspsc, mvdx14 - cfmvsc32cc dspsc, mvdx10 - cfmvsc32ne dspsc, mvdx15 - cfmv32scle mvdx6, dspsc - cfmv32scmi mvdx2, dspsc - cfmv32sceq mvdx5, dspsc - cfmv32scge mvdx9, dspsc - cfmv32scal mvdx3, dspsc - cfcpysle mvf7, mvf2 - cfcpysne mvf12, mvf6 - cfcpyslt mvf0, mvf7 - cfcpyspl mvf14, mvf3 - cfcpysgt mvf10, mvf1 - cfcpydhi mvd15, mvd13 - cfcpydvs mvd11, mvd4 - cfcpydcs mvd9, mvd0 - cfcpydpl mvd15, mvd10 - cfcpydls mvd4, mvd14 + cfmvsrcs mvf9, r0 + cfmvsrpl mvf15, r7 + cfmvsrls mvf4, r1 + cfmvsrcc mvf8, r2 + cfmvsrvc mvf2, r12 + cfmvrsgt r9, mvf11 + cfmvrseq sl, mvf5 + cfmvrsal r4, mvf12 + cfmvrsge fp, mvf8 + cfmvrs r5, mvf6 + cfmvdlrlt mvd4, r9 + cfmvdlrls mvd0, r10 + cfmvdlr mvd10, r4 + cfmvdlrmi mvd14, r11 + cfmvdlrhi mvd13, r5 + cfmvrdlcs r12, mvd12 + cfmvrdlvs r3, mvd0 + cfmvrdlvc r13, mvd14 + cfmvrdlcc r14, mvd10 + cfmvrdlne r8, mvd15 + cfmvdhrle mvd6, ip + cfmvdhrmi mvd2, r3 + cfmvdhreq mvd5, sp + cfmvdhrge mvd9, lr + cfmvdhral mvd3, r8 + cfmvrdhle r5, mvd2 + cfmvrdhne r6, mvd6 + cfmvrdhlt r0, mvd7 + cfmvrdhpl r7, mvd3 + cfmvrdhgt r1, mvd1 + cfmv64lrhi mvdx15, r5 + cfmv64lrvs mvdx11, r6 + cfmv64lrcs mvdx9, r0 + cfmv64lrpl mvdx15, r7 + cfmv64lrls mvdx4, r1 + cfmvr64lcc r8, mvdx13 + cfmvr64lvc pc, mvdx1 + cfmvr64lgt r9, mvdx11 + cfmvr64leq sl, mvdx5 + cfmvr64lal r4, mvdx12 + cfmv64hrge mvdx1, r8 + cfmv64hr mvdx13, r15 + cfmv64hrlt mvdx4, r9 + cfmv64hrls mvdx0, r10 + cfmv64hr mvdx10, r4 + cfmvr64hmi r1, mvdx3 + cfmvr64hhi r2, mvdx7 + cfmvr64hcs r12, mvdx12 + cfmvr64hvs r3, mvdx0 + cfmvr64hvc r13, mvdx14 + cfmval32cc mvax0, mvfx10 + cfmval32ne mvax1, mvfx15 + cfmval32le mvax0, mvfx11 + cfmval32mi mvax0, mvfx9 + cfmval32eq mvax1, mvfx15 + cfmv32alge mvfx9, mvax0 + cfmv32alal mvfx3, mvax1 + cfmv32alle mvfx7, mvax0 + cfmv32alne mvfx12, mvax0 + cfmv32allt mvfx0, mvax1 + cfmvam32pl mvax2, mvfx3 + cfmvam32gt mvax1, mvfx1 + cfmvam32hi mvax3, mvfx13 + cfmvam32vs mvax3, mvfx4 + cfmvam32cs mvax1, mvfx0 + cfmv32ampl mvfx15, mvax2 + cfmv32amls mvfx4, mvax1 + cfmv32amcc mvfx8, mvax3 + cfmv32amvc mvfx2, mvax3 + cfmv32amgt mvfx6, mvax1 + cfmvah32eq mvax1, mvfx5 + cfmvah32al mvax2, mvfx12 + cfmvah32ge mvax3, mvfx8 + cfmvah32 mvax2, mvfx6 + cfmvah32lt mvax2, mvfx2 + cfmv32ahls mvfx0, mvax1 + cfmv32ah mvfx10, mvax2 + cfmv32ahmi mvfx14, mvax3 + cfmv32ahhi mvfx13, mvax2 + cfmv32ahcs mvfx1, mvax2 + cfmva32vs mvax1, mvfx0 + cfmva32vc mvax3, mvfx14 + cfmva32cc mvax0, mvfx10 + cfmva32ne mvax1, mvfx15 + cfmva32le mvax0, mvfx11 + cfmv32ami mvfx2, mvax1 + cfmv32aeq mvfx5, mvax3 + cfmv32age mvfx9, mvax0 + cfmv32aal mvfx3, mvax1 + cfmv32ale mvfx7, mvax0 + cfmva64ne mvax2, mvdx6 + cfmva64lt mvax0, mvdx7 + cfmva64pl mvax2, mvdx3 + cfmva64gt mvax1, mvdx1 + cfmva64hi mvax3, mvdx13 + cfmv64avs mvdx11, mvax2 + cfmv64acs mvdx9, mvax0 + cfmv64apl mvdx15, mvax2 + cfmv64als mvdx4, mvax1 + cfmv64acc mvdx8, mvax3 + cfmvsc32vc dspsc, mvdx1 + cfmvsc32gt dspsc, mvdx11 + cfmvsc32eq dspsc, mvdx5 + cfmvsc32al dspsc, mvdx12 + cfmvsc32ge dspsc, mvdx8 + cfmv32sc mvdx13, dspsc + cfmv32sclt mvdx4, dspsc + cfmv32scls mvdx0, dspsc + cfmv32sc mvdx10, dspsc + cfmv32scmi mvdx14, dspsc + cfcpyshi mvf13, mvf7 + cfcpyscs mvf1, mvf12 + cfcpysvs mvf11, mvf0 + cfcpysvc mvf5, mvf14 + cfcpyscc mvf12, mvf10 + cfcpydne mvd8, mvd15 + cfcpydle mvd6, mvd11 + cfcpydmi mvd2, mvd9 + cfcpydeq mvd5, mvd15 + cfcpydge mvd9, mvd4 conv: - cfcvtsdcc mvd8, mvf13 - cfcvtsdvc mvd2, mvf1 - cfcvtsdgt mvd6, mvf11 - cfcvtsdeq mvd7, mvf5 - cfcvtsdal mvd3, mvf12 - cfcvtdsge mvf1, mvd8 - cfcvtds mvf13, mvd6 - cfcvtdslt mvf4, mvd2 - cfcvtdsls mvf0, mvd5 - cfcvtds mvf10, mvd9 - cfcvt32smi mvf14, mvfx3 - cfcvt32shi mvf13, mvfx7 - cfcvt32scs mvf1, mvfx12 - cfcvt32svs mvf11, mvfx0 - cfcvt32svc mvf5, mvfx14 - cfcvt32dcc mvd12, mvfx10 - cfcvt32dne mvd8, mvfx15 - cfcvt32dle mvd6, mvfx11 - cfcvt32dmi mvd2, mvfx9 - cfcvt32deq mvd5, mvfx15 - cfcvt64sge mvf9, mvdx4 - cfcvt64sal mvf3, mvdx8 - cfcvt64sle mvf7, mvdx2 - cfcvt64sne mvf12, mvdx6 - cfcvt64slt mvf0, mvdx7 - cfcvt64dpl mvd14, mvdx3 - cfcvt64dgt mvd10, mvdx1 - cfcvt64dhi mvd15, mvdx13 - cfcvt64dvs mvd11, mvdx4 - cfcvt64dcs mvd9, mvdx0 - cfcvts32pl mvfx15, mvf10 - cfcvts32ls mvfx4, mvf14 - cfcvts32cc mvfx8, mvf13 - cfcvts32vc mvfx2, mvf1 - cfcvts32gt mvfx6, mvf11 - cfcvtd32eq mvfx7, mvd5 - cfcvtd32al mvfx3, mvd12 - cfcvtd32ge mvfx1, mvd8 - cfcvtd32 mvfx13, mvd6 - cfcvtd32lt mvfx4, mvd2 - cftruncs32ls mvfx0, mvf5 - cftruncs32 mvfx10, mvf9 - cftruncs32mi mvfx14, mvf3 - cftruncs32hi mvfx13, mvf7 - cftruncs32cs mvfx1, mvf12 - cftruncd32vs mvfx11, mvd0 - cftruncd32vc mvfx5, mvd14 - cftruncd32cc mvfx12, mvd10 - cftruncd32ne mvfx8, mvd15 - cftruncd32le mvfx6, mvd11 + cfcvtsdal mvd3, mvf8 + cfcvtsdle mvd7, mvf2 + cfcvtsdne mvd12, mvf6 + cfcvtsdlt mvd0, mvf7 + cfcvtsdpl mvd14, mvf3 + cfcvtdsgt mvf10, mvd1 + cfcvtdshi mvf15, mvd13 + cfcvtdsvs mvf11, mvd4 + cfcvtdscs mvf9, mvd0 + cfcvtdspl mvf15, mvd10 + cfcvt32sls mvf4, mvfx14 + cfcvt32scc mvf8, mvfx13 + cfcvt32svc mvf2, mvfx1 + cfcvt32sgt mvf6, mvfx11 + cfcvt32seq mvf7, mvfx5 + cfcvt32dal mvd3, mvfx12 + cfcvt32dge mvd1, mvfx8 + cfcvt32d mvd13, mvfx6 + cfcvt32dlt mvd4, mvfx2 + cfcvt32dls mvd0, mvfx5 + cfcvt64s mvf10, mvdx9 + cfcvt64smi mvf14, mvdx3 + cfcvt64shi mvf13, mvdx7 + cfcvt64scs mvf1, mvdx12 + cfcvt64svs mvf11, mvdx0 + cfcvt64dvc mvd5, mvdx14 + cfcvt64dcc mvd12, mvdx10 + cfcvt64dne mvd8, mvdx15 + cfcvt64dle mvd6, mvdx11 + cfcvt64dmi mvd2, mvdx9 + cfcvts32eq mvfx5, mvf15 + cfcvts32ge mvfx9, mvf4 + cfcvts32al mvfx3, mvf8 + cfcvts32le mvfx7, mvf2 + cfcvts32ne mvfx12, mvf6 + cfcvtd32lt mvfx0, mvd7 + cfcvtd32pl mvfx14, mvd3 + cfcvtd32gt mvfx10, mvd1 + cfcvtd32hi mvfx15, mvd13 + cfcvtd32vs mvfx11, mvd4 + cftruncs32cs mvfx9, mvf0 + cftruncs32pl mvfx15, mvf10 + cftruncs32ls mvfx4, mvf14 + cftruncs32cc mvfx8, mvf13 + cftruncs32vc mvfx2, mvf1 + cftruncd32gt mvfx6, mvd11 + cftruncd32eq mvfx7, mvd5 + cftruncd32al mvfx3, mvd12 + cftruncd32ge mvfx1, mvd8 + cftruncd32 mvfx13, mvd6 shift: - cfrshl32mi mvfx2, mvfx9, r0 - cfrshl32 mvfx10, mvfx9, lr - cfrshl32cc mvfx8, mvfx13, r5 - cfrshl32ne mvfx12, mvfx6, r3 - cfrshl32vc mvfx5, mvfx14, r4 - cfrshl64ge mvdx1, mvdx8, r2 - cfrshl64vs mvdx11, mvdx4, r9 - cfrshl64eq mvdx5, mvdx15, r7 - cfrshl64mi mvdx14, mvdx3, r8 - cfrshl64vc mvdx2, mvdx1, r6 - cfsh32lt mvfx0, mvfx7, #-64 - cfsh32cc mvfx12, mvfx10, #-20 - cfsh32 mvfx13, mvfx6, #40 - cfsh32cs mvfx9, mvfx0, #-1 - cfsh32ge mvfx9, mvfx4, #24 - cfsh64hi mvdx13, mvdx7, #33 - cfsh64gt mvdx6, mvdx11, #0 - cfsh64pl mvdx14, mvdx3, #32 - cfsh64ne mvdx8, mvdx15, #-31 - cfsh64lt mvdx4, mvdx2, #1 + cfrshl32lt mvfx4, mvfx2, r3 + cfrshl32pl mvfx15, mvfx10, r4 + cfrshl32al mvfx3, mvfx8, r2 + cfrshl32cs mvfx1, mvfx12, r9 + cfrshl32eq mvfx7, mvfx5, r7 + cfrshl64gt mvdx10, mvdx1, r8 + cfrshl64le mvdx6, mvdx11, r6 + cfrshl64ls mvdx0, mvdx5, sp + cfrshl64ls mvdx4, mvdx14, r11 + cfrshl64le mvdx7, mvdx2, r12 + cfsh32vs mvfx11, mvfx0, #-1 + cfsh32al mvfx3, mvfx12, #24 + cfsh32hi mvfx15, mvfx13, #33 + cfsh32mi mvfx2, mvfx9, #0 + cfsh32 mvfx10, mvfx9, #32 + cfsh64cc mvdx8, mvdx13, #-31 + cfsh64ne mvdx12, mvdx6, #1 + cfsh64vc mvdx5, mvdx14, #-32 + cfsh64ge mvdx1, mvdx8, #-27 + cfsh64vs mvdx11, mvdx4, #-5 comp: - cfcmpspl sp, mvf10, mvf9 - cfcmpsal r11, mvf8, mvf13 - cfcmpscs r12, mvf12, mvf6 - cfcmpseq sl, mvf5, mvf14 - cfcmpsgt r1, mvf1, mvf8 - cfcmpdle r15, mvd11, mvd4 - cfcmpdls r0, mvd5, mvd15 - cfcmpdls lr, mvd14, mvd3 - cfcmpdle r5, mvd2, mvd1 - cfcmpdvs r3, mvd0, mvd7 - cfcmp32al r4, mvfx12, mvfx10 - cfcmp32hi r2, mvfx13, mvfx6 - cfcmp32mi r9, mvfx9, mvfx0 - cfcmp32 r7, mvfx9, mvfx4 - cfcmp32cc r8, mvfx13, mvfx7 - cfcmp64ne r6, mvdx6, mvdx11 - cfcmp64vc r13, mvdx14, mvdx3 - cfcmp64ge fp, mvdx8, mvdx15 - cfcmp64vs ip, mvdx4, mvdx2 - cfcmp64eq r10, mvdx15, mvdx10 + cfcmpseq r10, mvf15, mvf10 + cfcmpsmi r1, mvf3, mvf8 + cfcmpsvc pc, mvf1, mvf12 + cfcmpslt r0, mvf7, mvf5 + cfcmpscc r14, mvf10, mvf1 + cfcmpd r5, mvd6, mvd11 + cfcmpdcs r3, mvd0, mvd5 + cfcmpdge r4, mvd4, mvd14 + cfcmpdhi r2, mvd7, mvd2 + cfcmpdgt r9, mvd11, mvd0 + cfcmp32pl r7, mvfx3, mvfx12 + cfcmp32ne r8, mvfx15, mvfx13 + cfcmp32lt r6, mvfx2, mvfx9 + cfcmp32pl sp, mvfx10, mvfx9 + cfcmp32al r11, mvfx8, mvfx13 + cfcmp64cs r12, mvdx12, mvdx6 + cfcmp64eq sl, mvdx5, mvdx14 + cfcmp64gt r1, mvdx1, mvdx8 + cfcmp64le r15, mvdx11, mvdx4 + cfcmp64ls r0, mvdx5, mvdx15 fp_arith: - cfabssmi mvf14, mvf3 - cfabsshi mvf13, mvf7 - cfabsscs mvf1, mvf12 - cfabssvs mvf11, mvf0 - cfabssvc mvf5, mvf14 - cfabsdcc mvd12, mvd10 - cfabsdne mvd8, mvd15 - cfabsdle mvd6, mvd11 - cfabsdmi mvd2, mvd9 - cfabsdeq mvd5, mvd15 - cfnegsge mvf9, mvf4 - cfnegsal mvf3, mvf8 - cfnegsle mvf7, mvf2 - cfnegsne mvf12, mvf6 - cfnegslt mvf0, mvf7 - cfnegdpl mvd14, mvd3 - cfnegdgt mvd10, mvd1 - cfnegdhi mvd15, mvd13 - cfnegdvs mvd11, mvd4 - cfnegdcs mvd9, mvd0 - cfaddspl mvf15, mvf10, mvf9 - cfaddsal mvf3, mvf8, mvf13 - cfaddscs mvf1, mvf12, mvf6 - cfaddseq mvf7, mvf5, mvf14 - cfaddsgt mvf10, mvf1, mvf8 - cfadddle mvd6, mvd11, mvd4 - cfadddls mvd0, mvd5, mvd15 - cfadddls mvd4, mvd14, mvd3 - cfadddle mvd7, mvd2, mvd1 - cfadddvs mvd11, mvd0, mvd7 - cfsubsal mvf3, mvf12, mvf10 - cfsubshi mvf15, mvf13, mvf6 - cfsubsmi mvf2, mvf9, mvf0 - cfsubs mvf10, mvf9, mvf4 - cfsubscc mvf8, mvf13, mvf7 - cfsubdne mvd12, mvd6, mvd11 - cfsubdvc mvd5, mvd14, mvd3 - cfsubdge mvd1, mvd8, mvd15 - cfsubdvs mvd11, mvd4, mvd2 - cfsubdeq mvd5, mvd15, mvd10 - cfmulsmi mvf14, mvf3, mvf8 - cfmulsvc mvf2, mvf1, mvf12 - cfmulslt mvf0, mvf7, mvf5 - cfmulscc mvf12, mvf10, mvf1 - cfmuls mvf13, mvf6, mvf11 - cfmuldcs mvd9, mvd0, mvd5 - cfmuldge mvd9, mvd4, mvd14 - cfmuldhi mvd13, mvd7, mvd2 - cfmuldgt mvd6, mvd11, mvd0 - cfmuldpl mvd14, mvd3, mvd12 + cfabssls mvf4, mvf14 + cfabsscc mvf8, mvf13 + cfabssvc mvf2, mvf1 + cfabssgt mvf6, mvf11 + cfabsseq mvf7, mvf5 + cfabsdal mvd3, mvd12 + cfabsdge mvd1, mvd8 + cfabsd mvd13, mvd6 + cfabsdlt mvd4, mvd2 + cfabsdls mvd0, mvd5 + cfnegs mvf10, mvf9 + cfnegsmi mvf14, mvf3 + cfnegshi mvf13, mvf7 + cfnegscs mvf1, mvf12 + cfnegsvs mvf11, mvf0 + cfnegdvc mvd5, mvd14 + cfnegdcc mvd12, mvd10 + cfnegdne mvd8, mvd15 + cfnegdle mvd6, mvd11 + cfnegdmi mvd2, mvd9 + cfaddseq mvf5, mvf15, mvf10 + cfaddsmi mvf14, mvf3, mvf8 + cfaddsvc mvf2, mvf1, mvf12 + cfaddslt mvf0, mvf7, mvf5 + cfaddscc mvf12, mvf10, mvf1 + cfaddd mvd13, mvd6, mvd11 + cfadddcs mvd9, mvd0, mvd5 + cfadddge mvd9, mvd4, mvd14 + cfadddhi mvd13, mvd7, mvd2 + cfadddgt mvd6, mvd11, mvd0 + cfsubspl mvf14, mvf3, mvf12 + cfsubsne mvf8, mvf15, mvf13 + cfsubslt mvf4, mvf2, mvf9 + cfsubspl mvf15, mvf10, mvf9 + cfsubsal mvf3, mvf8, mvf13 + cfsubdcs mvd1, mvd12, mvd6 + cfsubdeq mvd7, mvd5, mvd14 + cfsubdgt mvd10, mvd1, mvd8 + cfsubdle mvd6, mvd11, mvd4 + cfsubdls mvd0, mvd5, mvd15 + cfmulsls mvf4, mvf14, mvf3 + cfmulsle mvf7, mvf2, mvf1 + cfmulsvs mvf11, mvf0, mvf7 + cfmulsal mvf3, mvf12, mvf10 + cfmulshi mvf15, mvf13, mvf6 + cfmuldmi mvd2, mvd9, mvd0 + cfmuld mvd10, mvd9, mvd4 + cfmuldcc mvd8, mvd13, mvd7 + cfmuldne mvd12, mvd6, mvd11 + cfmuldvc mvd5, mvd14, mvd3 int_arith: - cfabs32ne mvfx8, mvfx15 - cfabs32le mvfx6, mvfx11 - cfabs32mi mvfx2, mvfx9 - cfabs32eq mvfx5, mvfx15 - cfabs32ge mvfx9, mvfx4 - cfabs64al mvdx3, mvdx8 - cfabs64le mvdx7, mvdx2 - cfabs64ne mvdx12, mvdx6 - cfabs64lt mvdx0, mvdx7 - cfabs64pl mvdx14, mvdx3 - cfneg32gt mvfx10, mvfx1 - cfneg32hi mvfx15, mvfx13 - cfneg32vs mvfx11, mvfx4 - cfneg32cs mvfx9, mvfx0 - cfneg32pl mvfx15, mvfx10 - cfneg64ls mvdx4, mvdx14 - cfneg64cc mvdx8, mvdx13 - cfneg64vc mvdx2, mvdx1 - cfneg64gt mvdx6, mvdx11 - cfneg64eq mvdx7, mvdx5 - cfadd32al mvfx3, mvfx12, mvfx10 - cfadd32hi mvfx15, mvfx13, mvfx6 - cfadd32mi mvfx2, mvfx9, mvfx0 - cfadd32 mvfx10, mvfx9, mvfx4 - cfadd32cc mvfx8, mvfx13, mvfx7 - cfadd64ne mvdx12, mvdx6, mvdx11 - cfadd64vc mvdx5, mvdx14, mvdx3 - cfadd64ge mvdx1, mvdx8, mvdx15 - cfadd64vs mvdx11, mvdx4, mvdx2 - cfadd64eq mvdx5, mvdx15, mvdx10 - cfsub32mi mvfx14, mvfx3, mvfx8 - cfsub32vc mvfx2, mvfx1, mvfx12 - cfsub32lt mvfx0, mvfx7, mvfx5 - cfsub32cc mvfx12, mvfx10, mvfx1 - cfsub32 mvfx13, mvfx6, mvfx11 - cfsub64cs mvdx9, mvdx0, mvdx5 - cfsub64ge mvdx9, mvdx4, mvdx14 - cfsub64hi mvdx13, mvdx7, mvdx2 - cfsub64gt mvdx6, mvdx11, mvdx0 - cfsub64pl mvdx14, mvdx3, mvdx12 - cfmul32ne mvfx8, mvfx15, mvfx13 - cfmul32lt mvfx4, mvfx2, mvfx9 - cfmul32pl mvfx15, mvfx10, mvfx9 - cfmul32al mvfx3, mvfx8, mvfx13 - cfmul32cs mvfx1, mvfx12, mvfx6 - cfmul64eq mvdx7, mvdx5, mvdx14 - cfmul64gt mvdx10, mvdx1, mvdx8 - cfmul64le mvdx6, mvdx11, mvdx4 - cfmul64ls mvdx0, mvdx5, mvdx15 - cfmul64ls mvdx4, mvdx14, mvdx3 - cfmac32le mvfx7, mvfx2, mvfx1 - cfmac32vs mvfx11, mvfx0, mvfx7 - cfmac32al mvfx3, mvfx12, mvfx10 - cfmac32hi mvfx15, mvfx13, mvfx6 - cfmac32mi mvfx2, mvfx9, mvfx0 - cfmsc32 mvfx10, mvfx9, mvfx4 - cfmsc32cc mvfx8, mvfx13, mvfx7 - cfmsc32ne mvfx12, mvfx6, mvfx11 - cfmsc32vc mvfx5, mvfx14, mvfx3 - cfmsc32ge mvfx1, mvfx8, mvfx15 + cfabs32ge mvfx1, mvfx8 + cfabs32 mvfx13, mvfx6 + cfabs32lt mvfx4, mvfx2 + cfabs32ls mvfx0, mvfx5 + cfabs32 mvfx10, mvfx9 + cfabs64mi mvdx14, mvdx3 + cfabs64hi mvdx13, mvdx7 + cfabs64cs mvdx1, mvdx12 + cfabs64vs mvdx11, mvdx0 + cfabs64vc mvdx5, mvdx14 + cfneg32cc mvfx12, mvfx10 + cfneg32ne mvfx8, mvfx15 + cfneg32le mvfx6, mvfx11 + cfneg32mi mvfx2, mvfx9 + cfneg32eq mvfx5, mvfx15 + cfneg64ge mvdx9, mvdx4 + cfneg64al mvdx3, mvdx8 + cfneg64le mvdx7, mvdx2 + cfneg64ne mvdx12, mvdx6 + cfneg64lt mvdx0, mvdx7 + cfadd32pl mvfx14, mvfx3, mvfx12 + cfadd32ne mvfx8, mvfx15, mvfx13 + cfadd32lt mvfx4, mvfx2, mvfx9 + cfadd32pl mvfx15, mvfx10, mvfx9 + cfadd32al mvfx3, mvfx8, mvfx13 + cfadd64cs mvdx1, mvdx12, mvdx6 + cfadd64eq mvdx7, mvdx5, mvdx14 + cfadd64gt mvdx10, mvdx1, mvdx8 + cfadd64le mvdx6, mvdx11, mvdx4 + cfadd64ls mvdx0, mvdx5, mvdx15 + cfsub32ls mvfx4, mvfx14, mvfx3 + cfsub32le mvfx7, mvfx2, mvfx1 + cfsub32vs mvfx11, mvfx0, mvfx7 + cfsub32al mvfx3, mvfx12, mvfx10 + cfsub32hi mvfx15, mvfx13, mvfx6 + cfsub64mi mvdx2, mvdx9, mvdx0 + cfsub64 mvdx10, mvdx9, mvdx4 + cfsub64cc mvdx8, mvdx13, mvdx7 + cfsub64ne mvdx12, mvdx6, mvdx11 + cfsub64vc mvdx5, mvdx14, mvdx3 + cfmul32ge mvfx1, mvfx8, mvfx15 + cfmul32vs mvfx11, mvfx4, mvfx2 + cfmul32eq mvfx5, mvfx15, mvfx10 + cfmul32mi mvfx14, mvfx3, mvfx8 + cfmul32vc mvfx2, mvfx1, mvfx12 + cfmul64lt mvdx0, mvdx7, mvdx5 + cfmul64cc mvdx12, mvdx10, mvdx1 + cfmul64 mvdx13, mvdx6, mvdx11 + cfmul64cs mvdx9, mvdx0, mvdx5 + cfmul64ge mvdx9, mvdx4, mvdx14 + cfmac32hi mvfx13, mvfx7, mvfx2 + cfmac32gt mvfx6, mvfx11, mvfx0 + cfmac32pl mvfx14, mvfx3, mvfx12 + cfmac32ne mvfx8, mvfx15, mvfx13 + cfmac32lt mvfx4, mvfx2, mvfx9 + cfmsc32pl mvfx15, mvfx10, mvfx9 + cfmsc32al mvfx3, mvfx8, mvfx13 + cfmsc32cs mvfx1, mvfx12, mvfx6 + cfmsc32eq mvfx7, mvfx5, mvfx14 + cfmsc32gt mvfx10, mvfx1, mvfx8 acc_arith: - cfmadd32vs mvax3, mvfx4, mvfx2, mvfx9 - cfmadd32eq mvax1, mvfx15, mvfx10, mvfx9 - cfmadd32mi mvax1, mvfx3, mvfx8, mvfx13 - cfmadd32vc mvax0, mvfx1, mvfx12, mvfx6 - cfmadd32lt mvax0, mvfx7, mvfx5, mvfx14 - cfmsub32cc mvax0, mvfx10, mvfx1, mvfx8 - cfmsub32 mvax2, mvfx6, mvfx11, mvfx4 - cfmsub32cs mvax1, mvfx0, mvfx5, mvfx15 - cfmsub32ge mvax2, mvfx4, mvfx14, mvfx3 - cfmsub32hi mvax3, mvfx7, mvfx2, mvfx1 - cfmadda32gt mvax0, mvax1, mvfx0, mvfx7 - cfmadda32pl mvax2, mvax2, mvfx12, mvfx10 - cfmadda32ne mvax1, mvax3, mvfx13, mvfx6 - cfmadda32lt mvax2, mvax0, mvfx9, mvfx0 - cfmadda32pl mvax3, mvax2, mvfx9, mvfx4 - cfmsuba32al mvax3, mvax1, mvfx13, mvfx7 - cfmsuba32cs mvax3, mvax2, mvfx6, mvfx11 - cfmsuba32eq mvax1, mvax3, mvfx14, mvfx3 - cfmsuba32gt mvax1, mvax3, mvfx8, mvfx15 - cfmsuba32le mvax0, mvax3, mvfx4, mvfx2 + cfmadd32le mvax0, mvfx11, mvfx4, mvfx2 + cfmadd32ls mvax0, mvfx5, mvfx15, mvfx10 + cfmadd32ls mvax0, mvfx14, mvfx3, mvfx8 + cfmadd32le mvax2, mvfx2, mvfx1, mvfx12 + cfmadd32vs mvax1, mvfx0, mvfx7, mvfx5 + cfmsub32al mvax2, mvfx12, mvfx10, mvfx1 + cfmsub32hi mvax3, mvfx13, mvfx6, mvfx11 + cfmsub32mi mvax0, mvfx9, mvfx0, mvfx5 + cfmsub32 mvax2, mvfx9, mvfx4, mvfx14 + cfmsub32cc mvax1, mvfx13, mvfx7, mvfx2 + cfmadda32ne mvax2, mvax0, mvfx11, mvfx0 + cfmadda32vc mvax3, mvax2, mvfx3, mvfx12 + cfmadda32ge mvax3, mvax1, mvfx15, mvfx13 + cfmadda32vs mvax3, mvax2, mvfx2, mvfx9 + cfmadda32eq mvax1, mvax3, mvfx10, mvfx9 + cfmsuba32mi mvax1, mvax3, mvfx8, mvfx13 + cfmsuba32vc mvax0, mvax3, mvfx12, mvfx6 + cfmsuba32lt mvax0, mvax1, mvfx5, mvfx14 + cfmsuba32cc mvax0, mvax1, mvfx1, mvfx8 + cfmsuba32 mvax2, mvax0, mvfx11, mvfx4 diff --git a/gas/testsuite/gas/arm/reg-alias.d b/gas/testsuite/gas/arm/reg-alias.d new file mode 100644 index 00000000000..d9b4be29acb --- /dev/null +++ b/gas/testsuite/gas/arm/reg-alias.d @@ -0,0 +1,10 @@ +#objdump: -dr --prefix-addresses --show-raw-insn +#name: Case Sensitive Register Aliases + +.*: +file format .*arm.* + +Disassembly of section .text: +0+0 <.*> ee060f10 mcr 15, 0, r0, cr6, cr0, \{0\} +0+4 <.*> e1a00000 nop \(mov r0,r0\) +0+8 <.*> e1a00000 nop \(mov r0,r0\) +0+c <.*> e1a00000 nop \(mov r0,r0\) diff --git a/gas/testsuite/gas/arm/reg-alias.s b/gas/testsuite/gas/arm/reg-alias.s new file mode 100644 index 00000000000..5086b8b4ca1 --- /dev/null +++ b/gas/testsuite/gas/arm/reg-alias.s @@ -0,0 +1,14 @@ + @ Test case-sensitive register aliases + .text + .global fred +fred: + +MMUPurgeTLBReg .req c6 +MMUCP .req p15 + +MCR MMUCP, 0, a1, MMUPurgeTLBReg, c0, 0 + @ The NOPs are here for ports like arm-aout which will pad + @ the .text section to a 16 byte boundary. + nop + nop + nop diff --git a/gas/testsuite/gas/cfi/cfi-alpha-1.d b/gas/testsuite/gas/cfi/cfi-alpha-1.d index 73783e95d94..9568d3b9c28 100644 --- a/gas/testsuite/gas/cfi/cfi-alpha-1.d +++ b/gas/testsuite/gas/cfi/cfi-alpha-1.d @@ -2,7 +2,7 @@ #name: CFI on alpha The section .eh_frame contains: -00000000 0000000f 00000000 CIE +00000000 00000010 00000000 CIE Version: 1 Augmentation: "zR" Code alignment factor: 4 @@ -11,12 +11,19 @@ The section .eh_frame contains: Augmentation data: 1b DW_CFA_def_cfa_reg: r30 + DW_CFA_nop -00000013 00000019 00000017 FDE cie=00000000 pc=0000001b..0000004f - DW_CFA_advance_loc: 24 to 00000033 +00000014 00000020 00000018 FDE cie=00000000 pc=0000001c..00000050 + DW_CFA_advance_loc: 24 to 00000034 DW_CFA_def_cfa: r15 ofs 32 DW_CFA_offset: r26 at cfa-32 DW_CFA_offset: r9 at cfa-24 DW_CFA_offset: r15 at cfa-16 DW_CFA_offset: r34 at cfa-8 - + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop diff --git a/gas/testsuite/gas/cfi/cfi-alpha-2.d b/gas/testsuite/gas/cfi/cfi-alpha-2.d index 49f8cceeb8a..4a87da2d9a5 100644 --- a/gas/testsuite/gas/cfi/cfi-alpha-2.d +++ b/gas/testsuite/gas/cfi/cfi-alpha-2.d @@ -5,5 +5,5 @@ RELOCATION RECORDS FOR \[\.eh_frame\]: OFFSET TYPE VALUE -0*000001b SREL32 \.text -0*000002c SREL32 \.text\+0x0*0000004 +0*000001c SREL32 \.text +0*0000030 SREL32 \.text\+0x0*0000004 diff --git a/gas/testsuite/gas/cfi/cfi-alpha-3.d b/gas/testsuite/gas/cfi/cfi-alpha-3.d index 4d8bd887ee0..f3ad084235b 100644 --- a/gas/testsuite/gas/cfi/cfi-alpha-3.d +++ b/gas/testsuite/gas/cfi/cfi-alpha-3.d @@ -2,7 +2,7 @@ #name: CFI on alpha, 3 The section .eh_frame contains: -00000000 0000000f 00000000 CIE +00000000 00000010 00000000 CIE Version: 1 Augmentation: "zR" Code alignment factor: 4 @@ -11,26 +11,26 @@ The section .eh_frame contains: Augmentation data: 1b DW_CFA_def_cfa_reg: r30 + DW_CFA_nop -00000013 00000029 00000017 FDE cie=00000000 pc=0000001b..0000005b - DW_CFA_advance_loc: 4 to 0000001f +00000014 00000028 00000018 FDE cie=00000000 pc=0000001c..0000005c + DW_CFA_advance_loc: 4 to 00000020 DW_CFA_def_cfa_offset: 32 - DW_CFA_advance_loc: 4 to 00000023 + DW_CFA_advance_loc: 4 to 00000024 DW_CFA_offset: r26 at cfa-32 - DW_CFA_advance_loc: 4 to 00000027 + DW_CFA_advance_loc: 4 to 00000028 DW_CFA_offset: r9 at cfa-24 - DW_CFA_advance_loc: 4 to 0000002b + DW_CFA_advance_loc: 4 to 0000002c DW_CFA_offset: r15 at cfa-16 - DW_CFA_advance_loc: 4 to 0000002f + DW_CFA_advance_loc: 4 to 00000030 DW_CFA_offset: r34 at cfa-8 - DW_CFA_advance_loc: 4 to 00000033 + DW_CFA_advance_loc: 4 to 00000034 DW_CFA_def_cfa_reg: r15 - DW_CFA_advance_loc: 36 to 00000057 + DW_CFA_advance_loc: 36 to 00000058 DW_CFA_def_cfa: r30 ofs 0 DW_CFA_nop DW_CFA_nop DW_CFA_nop DW_CFA_nop DW_CFA_nop - DW_CFA_nop diff --git a/gas/testsuite/gas/cfi/cfi-common-1.d b/gas/testsuite/gas/cfi/cfi-common-1.d index 0634b702752..332c4774c0c 100644 --- a/gas/testsuite/gas/cfi/cfi-common-1.d +++ b/gas/testsuite/gas/cfi/cfi-common-1.d @@ -2,7 +2,7 @@ #name: CFI common 1 The section .eh_frame contains: -00000000 0000000d 00000000 CIE +00000000 00000010 00000000 CIE Version: 1 Augmentation: "zR" Code alignment factor: .* @@ -10,14 +10,14 @@ The section .eh_frame contains: Return address column: .* Augmentation data: 1b + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop -00000011 0000001b 00000015 FDE cie=00000000 pc=.* +00000014 00000018 00000018 FDE cie=00000000 pc=.* DW_CFA_advance_loc: 4 to .* DW_CFA_def_cfa: r0 ofs 16 DW_CFA_offset: r1 at cfa-8 DW_CFA_advance_loc: 4 to .* DW_CFA_def_cfa_offset: 32 DW_CFA_offset: r2 at cfa-24 - DW_CFA_nop - DW_CFA_nop - DW_CFA_nop diff --git a/gas/testsuite/gas/cfi/cfi-common-2.d b/gas/testsuite/gas/cfi/cfi-common-2.d index 4c50cdbb0c2..a1f1d068541 100644 --- a/gas/testsuite/gas/cfi/cfi-common-2.d +++ b/gas/testsuite/gas/cfi/cfi-common-2.d @@ -2,16 +2,15 @@ #name: CFI common 2 The section .eh_frame contains: -00000000 0000000d 00000000 CIE +00000000 00000010 00000000 CIE Version: 1 Augmentation: "zR" Code alignment factor: .* Data alignment factor: .* Return address column: .* Augmentation data: 1b - - -00000011 0000001[bf] 00000015 FDE cie=00000000 pc=.* +#... +00000014 000000[12][c0] 00000018 FDE cie=00000000 pc=.* DW_CFA_advance_loc: 4 to .* DW_CFA_def_cfa: r0 ofs 16 DW_CFA_advance_loc: 4 to .* @@ -22,5 +21,4 @@ The section .eh_frame contains: DW_CFA_restore_state DW_CFA_advance_loc: 4 to .* DW_CFA_def_cfa_offset: 0 -# 64-bit arches will have here 4 times DW_CFA_nop -#... +#pass diff --git a/gas/testsuite/gas/cfi/cfi-common-3.d b/gas/testsuite/gas/cfi/cfi-common-3.d index 9ddbc457f3c..82a4193280f 100644 --- a/gas/testsuite/gas/cfi/cfi-common-3.d +++ b/gas/testsuite/gas/cfi/cfi-common-3.d @@ -2,19 +2,16 @@ #name: CFI common 3 The section .eh_frame contains: -00000000 0000000d 00000000 CIE +00000000 00000010 00000000 CIE Version: 1 Augmentation: "zR" Code alignment factor: .* Data alignment factor: .* Return address column: .* Augmentation data: 1b - - -00000011 00000013 00000015 FDE cie=00000000 pc=.* +#... +00000014 00000010 00000018 FDE cie=00000000 pc=.* DW_CFA_advance_loc: 4 to .* DW_CFA_remember_state DW_CFA_restore_state - DW_CFA_nop - DW_CFA_nop - DW_CFA_nop +#pass diff --git a/gas/testsuite/gas/cfi/cfi-i386.d b/gas/testsuite/gas/cfi/cfi-i386.d index 272372789db..471f5e1514b 100644 --- a/gas/testsuite/gas/cfi/cfi-i386.d +++ b/gas/testsuite/gas/cfi/cfi-i386.d @@ -2,7 +2,7 @@ #name: CFI on i386 The section .eh_frame contains: -00000000 00000012 00000000 CIE +00000000 00000014 00000000 CIE Version: 1 Augmentation: "zR" Code alignment factor: 1 @@ -12,29 +12,37 @@ The section .eh_frame contains: DW_CFA_def_cfa: r4 ofs 4 DW_CFA_offset: r8 at cfa-4 + DW_CFA_nop + DW_CFA_nop -00000016 00000014 0000001a FDE cie=00000000 pc=0000001e..00000030 - DW_CFA_advance_loc: 6 to 00000024 +00000018 00000014 0000001c FDE cie=00000000 pc=00000020..00000032 + DW_CFA_advance_loc: 6 to 00000026 DW_CFA_def_cfa_offset: 4664 - DW_CFA_advance_loc: 11 to 0000002f + DW_CFA_advance_loc: 11 to 00000031 DW_CFA_def_cfa_offset: 4 -0000002e 00000018 00000032 FDE cie=00000000 pc=00000048..00000055 - DW_CFA_advance_loc: 1 to 00000049 +00000030 00000018 00000034 FDE cie=00000000 pc=0000004a..00000057 + DW_CFA_advance_loc: 1 to 0000004b DW_CFA_def_cfa_offset: 8 DW_CFA_offset: r5 at cfa-8 - DW_CFA_advance_loc: 2 to 0000004b + DW_CFA_advance_loc: 2 to 0000004d DW_CFA_def_cfa_reg: r5 - DW_CFA_advance_loc: 9 to 00000054 + DW_CFA_advance_loc: 9 to 00000056 DW_CFA_def_cfa_reg: r4 -0000004a 00000014 0000004e FDE cie=00000000 pc=00000071..00000081 - DW_CFA_advance_loc: 2 to 00000073 +0000004c 00000014 00000050 FDE cie=00000000 pc=00000073..00000083 + DW_CFA_advance_loc: 2 to 00000075 DW_CFA_def_cfa_reg: r3 - DW_CFA_advance_loc: 13 to 00000080 + DW_CFA_advance_loc: 13 to 00000082 DW_CFA_def_cfa: r4 ofs 4 -00000062 0000000d 00000066 FDE cie=00000000 pc=00000099..0000009f +00000064 00000010 00000068 FDE cie=00000000 pc=0000009b..000000a1 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop -00000073 0000000d 00000077 FDE cie=00000000 pc=000000b0..000000bf +00000078 00000010 0000007c FDE cie=00000000 pc=000000b5..000000c4 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop diff --git a/gas/testsuite/gas/cfi/cfi-m68k.d b/gas/testsuite/gas/cfi/cfi-m68k.d index a7287591d40..ff239f31731 100644 --- a/gas/testsuite/gas/cfi/cfi-m68k.d +++ b/gas/testsuite/gas/cfi/cfi-m68k.d @@ -2,7 +2,7 @@ #name: CFI on m68k The section .eh_frame contains: -00000000 00000012 00000000 CIE +00000000 00000014 00000000 CIE Version: 1 Augmentation: "zR" Code alignment factor: 2 @@ -12,22 +12,27 @@ The section .eh_frame contains: DW_CFA_def_cfa: r15 ofs 4 DW_CFA_offset: r24 at cfa-4 + DW_CFA_nop + DW_CFA_nop -00000016 00000014 0000001a FDE cie=00000000 pc=0000001e..0000002a - DW_CFA_advance_loc: 4 to 00000022 +00000018 00000014 0000001c FDE cie=00000000 pc=00000020..0000002c + DW_CFA_advance_loc: 4 to 00000024 DW_CFA_def_cfa_offset: 4664 - DW_CFA_advance_loc: 6 to 00000028 + DW_CFA_advance_loc: 6 to 0000002a DW_CFA_def_cfa_offset: 4 -0000002e 00000017 00000032 FDE cie=00000000 pc=00000036..00000042 - DW_CFA_advance_loc: 4 to 0000003a +00000030 00000018 00000034 FDE cie=00000000 pc=00000038..00000044 + DW_CFA_advance_loc: 4 to 0000003c DW_CFA_def_cfa_offset: 8 DW_CFA_offset: r14 at cfa-8 DW_CFA_def_cfa_reg: r14 - DW_CFA_advance_loc: 6 to 00000040 + DW_CFA_advance_loc: 6 to 00000042 DW_CFA_def_cfa_reg: r15 + DW_CFA_nop -00000049 0000000f 0000004d FDE cie=00000000 pc=00000051..00000055 +0000004c 00000010 00000050 FDE cie=00000000 pc=00000054..00000058 DW_CFA_nop DW_CFA_nop + DW_CFA_nop + diff --git a/gas/testsuite/gas/cfi/cfi-s390x-1.d b/gas/testsuite/gas/cfi/cfi-s390x-1.d index 88438f2bc1c..ad67addc2ab 100644 --- a/gas/testsuite/gas/cfi/cfi-s390x-1.d +++ b/gas/testsuite/gas/cfi/cfi-s390x-1.d @@ -4,7 +4,7 @@ The section .eh_frame contains: -00000000 00000011 00000000 CIE +00000000 00000014 00000000 CIE Version: 1 Augmentation: "zR" Code alignment factor: 1 @@ -13,9 +13,12 @@ The section .eh_frame contains: Augmentation data: 1b DW_CFA_def_cfa: r15 ofs 160 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop -00000015 00000027 00000019 FDE cie=00000000 pc=0000001d..0000008d - DW_CFA_advance_loc: 6 to 00000023 +00000018 00000024 0000001c FDE cie=00000000 pc=00000020..00000090 + DW_CFA_advance_loc: 6 to 00000026 DW_CFA_offset: r15 at cfa-40 DW_CFA_offset: r14 at cfa-48 DW_CFA_offset: r13 at cfa-56 @@ -24,11 +27,8 @@ The section .eh_frame contains: DW_CFA_offset: r10 at cfa-80 DW_CFA_offset: r9 at cfa-88 DW_CFA_offset: r8 at cfa-96 - DW_CFA_advance_loc: 8 to 0000002b + DW_CFA_advance_loc: 8 to 0000002e DW_CFA_def_cfa_offset: 320 DW_CFA_nop DW_CFA_nop - DW_CFA_nop - DW_CFA_nop - DW_CFA_nop diff --git a/gas/testsuite/gas/cfi/cfi-sparc64-1.d b/gas/testsuite/gas/cfi/cfi-sparc64-1.d index ffe62392b1d..10d3ea9a4f5 100644 --- a/gas/testsuite/gas/cfi/cfi-sparc64-1.d +++ b/gas/testsuite/gas/cfi/cfi-sparc64-1.d @@ -4,7 +4,7 @@ The section .eh_frame contains: -00000000 00000011 00000000 CIE +00000000 00000014 00000000 CIE Version: 1 Augmentation: "zR" Code alignment factor: 4 @@ -13,13 +13,13 @@ The section .eh_frame contains: Augmentation data: 1b DW_CFA_def_cfa: r14 ofs 2047 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop -00000015 00000017 00000019 FDE cie=00000000 pc=0000001d..0000004d - DW_CFA_advance_loc: 4 to 00000021 +00000018 00000014 0000001c FDE cie=00000000 pc=00000020..00000050 + DW_CFA_advance_loc: 4 to 00000024 DW_CFA_def_cfa_reg: r30 DW_CFA_GNU_window_save DW_CFA_register: r15 in r31 - DW_CFA_nop - DW_CFA_nop - DW_CFA_nop diff --git a/gas/testsuite/gas/cfi/cfi-x86_64.d b/gas/testsuite/gas/cfi/cfi-x86_64.d index 17456ae2364..2b19641ed2a 100644 --- a/gas/testsuite/gas/cfi/cfi-x86_64.d +++ b/gas/testsuite/gas/cfi/cfi-x86_64.d @@ -2,7 +2,7 @@ #name: CFI on x86-64 The section .eh_frame contains: -00000000 00000012 00000000 CIE +00000000 00000014 00000000 CIE Version: 1 Augmentation: "zR" Code alignment factor: 1 @@ -12,33 +12,41 @@ The section .eh_frame contains: DW_CFA_def_cfa: r7 ofs 8 DW_CFA_offset: r16 at cfa-8 + DW_CFA_nop + DW_CFA_nop -00000016 00000014 0000001a FDE cie=00000000 pc=0000001e..00000032 - DW_CFA_advance_loc: 7 to 00000025 +00000018 00000014 0000001c FDE cie=00000000 pc=00000020..00000034 + DW_CFA_advance_loc: 7 to 00000027 DW_CFA_def_cfa_offset: 4668 - DW_CFA_advance_loc: 12 to 00000031 + DW_CFA_advance_loc: 12 to 00000033 DW_CFA_def_cfa_offset: 8 -0000002e 00000019 00000032 FDE cie=00000000 pc=00000036..00000045 - DW_CFA_advance_loc: 1 to 00000037 +00000030 0000001c 00000034 FDE cie=00000000 pc=00000038..00000047 + DW_CFA_advance_loc: 1 to 00000039 DW_CFA_def_cfa_offset: 16 DW_CFA_offset: r6 at cfa-16 - DW_CFA_advance_loc: 3 to 0000003a + DW_CFA_advance_loc: 3 to 0000003c DW_CFA_def_cfa_reg: r6 - DW_CFA_advance_loc: 10 to 00000044 + DW_CFA_advance_loc: 10 to 00000046 DW_CFA_def_cfa: r7 ofs 8 + DW_CFA_nop + DW_CFA_nop + DW_CFA_nop -0000004b 00000013 0000004f FDE cie=00000000 pc=00000053..00000066 - DW_CFA_advance_loc: 3 to 00000056 +00000050 00000014 00000054 FDE cie=00000000 pc=00000058..0000006b + DW_CFA_advance_loc: 3 to 0000005b DW_CFA_def_cfa_reg: r12 - DW_CFA_advance_loc: 15 to 00000065 + DW_CFA_advance_loc: 15 to 0000006a DW_CFA_def_cfa_reg: r7 + DW_CFA_nop -00000062 0000000d 00000066 FDE cie=00000000 pc=0000006a..00000070 - -00000073 00000011 00000077 FDE cie=00000000 pc=0000007b..0000008d +00000068 00000010 0000006c FDE cie=00000000 pc=00000070..00000076 + DW_CFA_nop DW_CFA_nop DW_CFA_nop + +0000007c 00000010 00000080 FDE cie=00000000 pc=00000084..00000096 + DW_CFA_nop DW_CFA_nop DW_CFA_nop diff --git a/gas/testsuite/gas/dlx/alltests.exp b/gas/testsuite/gas/dlx/alltests.exp index 003448bc689..cee7f350c8e 100644 --- a/gas/testsuite/gas/dlx/alltests.exp +++ b/gas/testsuite/gas/dlx/alltests.exp @@ -5,6 +5,7 @@ if [istarget dlx*-*-*] { run_dump_test "itype" run_dump_test "lhi" run_dump_test "load" + run_dump_test "lohi" run_dump_test "rtype" run_dump_test "store" } diff --git a/gas/testsuite/gas/dlx/itype.d b/gas/testsuite/gas/dlx/itype.d index 845ae4162e3..1b8e92ba712 100644 --- a/gas/testsuite/gas/dlx/itype.d +++ b/gas/testsuite/gas/dlx/itype.d @@ -16,7 +16,7 @@ Disassembly of section .text: 12: R_DLX_RELOC_16 .text 14: 35 4c 00 78 ori r12,r10,0x0078 18: 39 af 00 00 xori r15,r13,0x0000 - 1a: R_DLX_RELOC_16 .text + 1a: R_DLX_RELOC_16_LO .text 1c: da 30 00 1c slli r16,r17,0x001c 1e: R_DLX_RELOC_16 .text 20: e2 93 00 0f srai r19,r20,0x000f diff --git a/gas/testsuite/gas/dlx/lhi.d b/gas/testsuite/gas/dlx/lhi.d index db3b35d659e..e8551297408 100644 --- a/gas/testsuite/gas/dlx/lhi.d +++ b/gas/testsuite/gas/dlx/lhi.d @@ -1,6 +1,6 @@ #as: #objdump: -dr -#name: itype +#name: lhi .*: +file format .* @@ -11,7 +11,7 @@ Disassembly of section .text: 4: 3c 03 00 00 lhi r3,0x0000 6: R_DLX_RELOC_16_HI .text 8: 3c 04 00 00 lhi r4,0x0000 - a: R_DLX_RELOC_16 .text + a: R_DLX_RELOC_16_LO .text c: 3c 04 ff fb lhi r4,0xfffb e: R_DLX_RELOC_16 .text 10: 3c 04 00 0c lhi r4,0x000c @@ -19,5 +19,5 @@ Disassembly of section .text: 18: 20 04 00 00 addi r4,r0,0x0000 1a: R_DLX_RELOC_16_HI .text 1c: 34 84 00 18 ori r4,r4,0x0018 - 1e: R_DLX_RELOC_16 .text + 1e: R_DLX_RELOC_16_LO .text 20: 20 64 00 00 addi r4,r3,0x0000 diff --git a/gas/testsuite/gas/dlx/lohi.d b/gas/testsuite/gas/dlx/lohi.d new file mode 100644 index 00000000000..f97ef355d34 --- /dev/null +++ b/gas/testsuite/gas/dlx/lohi.d @@ -0,0 +1,18 @@ +#as: +#objdump: -dr +#name: lohi + +.*: +file format .* + +Disassembly of section .text: + +00000000 <.text>: + 0: 00 00 00 00 nop + 4: 3c 01 00 03 lhi r1,0x0003 + 6: R_DLX_RELOC_16_HI .text + 8: 34 01 0d 44 ori r1,r0,0x0d44 + a: R_DLX_RELOC_16_LO .text + c: 3c 01 0b eb lhi r1,0x0beb + e: R_DLX_RELOC_16_HI .text + 10: 34 01 c2 04 ori r1,r0,0xc204 + 12: R_DLX_RELOC_16_LO .text diff --git a/gas/testsuite/gas/dlx/lohi.s b/gas/testsuite/gas/dlx/lohi.s new file mode 100644 index 00000000000..f88ad44dfd9 --- /dev/null +++ b/gas/testsuite/gas/dlx/lohi.s @@ -0,0 +1,9 @@ + .text + .align 2 + nop +.L1: + lhi r1,%hi(.L1 + 200000) + ori r1,r0,%lo(.L1 + 200000) + lhi r1,%hi(.L1 + 200000000) + ori r1,r0,%lo(.L1 + 200000000) + .end diff --git a/gas/testsuite/gas/elf/elf.exp b/gas/testsuite/gas/elf/elf.exp index f4274822ac6..4680dcebdb4 100644 --- a/gas/testsuite/gas/elf/elf.exp +++ b/gas/testsuite/gas/elf/elf.exp @@ -48,6 +48,10 @@ if { ([istarget "*-*-elf*"] set target_machine -m32r } run_dump_test "ehopt0" + run_dump_test "group0a" + run_dump_test "group0b" + run_dump_test "group1a" + run_dump_test "group1b" run_dump_test "section0" run_dump_test "section1" run_list_test "section2" "$target_machine" "-al" "" diff --git a/gas/testsuite/gas/elf/group0.s b/gas/testsuite/gas/elf/group0.s new file mode 100644 index 00000000000..26bdda2bd1b --- /dev/null +++ b/gas/testsuite/gas/elf/group0.s @@ -0,0 +1,4 @@ + .section .foo,"axG",@progbits,.foo_group,comdat + .byte 1 + .section .bar,"aG",@progbits,.foo_group,comdat + .byte 1 diff --git a/gas/testsuite/gas/elf/group0a.d b/gas/testsuite/gas/elf/group0a.d new file mode 100644 index 00000000000..9b2b967bab9 --- /dev/null +++ b/gas/testsuite/gas/elf/group0a.d @@ -0,0 +1,9 @@ +#readelf: -SW +#name: group section +#source: group0.s + +#... +[ ]*\[.*\][ ]+\.foo[ ]+PROGBITS.*[ ]+AXG[ ]+.* +[ ]*\[.*\][ ]+\.bar[ ]+PROGBITS.*[ ]+AG[ ]+.* +[ ]*\[.*\][ ]+\.foo_group[ ]+GROUP.* +#pass diff --git a/gas/testsuite/gas/elf/group0b.d b/gas/testsuite/gas/elf/group0b.d new file mode 100644 index 00000000000..847a86b949d --- /dev/null +++ b/gas/testsuite/gas/elf/group0b.d @@ -0,0 +1,10 @@ +#readelf: -g +#name: group section +#source: group0.s + +#... +COMDAT group section `.foo_group' \[.foo_group\] contains 2 sections: +[ ]+\[Index\][ ]+Name +[ ]+\[.*\][ ]+.foo +[ ]+\[.*\][ ]+.bar +#pass diff --git a/gas/testsuite/gas/elf/group1.s b/gas/testsuite/gas/elf/group1.s new file mode 100644 index 00000000000..1645f0bf749 --- /dev/null +++ b/gas/testsuite/gas/elf/group1.s @@ -0,0 +1,2 @@ + .section .text,"axG",@progbits,.foo_group,comdat + .byte 1 diff --git a/gas/testsuite/gas/elf/group1a.d b/gas/testsuite/gas/elf/group1a.d new file mode 100644 index 00000000000..2db4033afea --- /dev/null +++ b/gas/testsuite/gas/elf/group1a.d @@ -0,0 +1,10 @@ +#readelf: -SW +#name: group section with multiple sections of same name +#source: group1.s + +#... +[ ]*\[.*\][ ]+\.text[ ]+PROGBITS.*[ ]+AX[ ]+.* +#... +[ ]*\[.*\][ ]+\.text[ ]+PROGBITS.*[ ]+AXG[ ]+.* +[ ]*\[.*\][ ]+\.foo_group[ ]+GROUP.* +#pass diff --git a/gas/testsuite/gas/elf/group1b.d b/gas/testsuite/gas/elf/group1b.d new file mode 100644 index 00000000000..c7e84e8a975 --- /dev/null +++ b/gas/testsuite/gas/elf/group1b.d @@ -0,0 +1,9 @@ +#readelf: -g +#name: group section with multiple sections of same name +#source: group1.s + +#... +COMDAT group section `.foo_group' \[.foo_group\] contains 1 sections: +[ ]+\[Index\][ ]+Name +[ ]+\[.*\][ ]+.text +#pass diff --git a/gas/testsuite/gas/elf/section2.e-mips b/gas/testsuite/gas/elf/section2.e-mips index d09ab19525d..8dd50a16f68 100644 --- a/gas/testsuite/gas/elf/section2.e-mips +++ b/gas/testsuite/gas/elf/section2.e-mips @@ -2,9 +2,9 @@ Symbol table '.symtab' contains 7 entries: Num: Value[ ]* Size Type Bind Vis Ndx Name 0: 0+0 0 NOTYPE LOCAL DEFAULT UND - 1: 0+0 0 SECTION LOCAL DEFAULT 1 - 2: 0+0 0 SECTION LOCAL DEFAULT 2 - 3: 0+0 0 SECTION LOCAL DEFAULT 3 - 4: 0+0 0 SECTION LOCAL DEFAULT 6 - 5: 0+0 0 SECTION LOCAL DEFAULT 4 - 6: 0+0 0 SECTION LOCAL DEFAULT 5 + 1: 0+0 0 SECTION LOCAL DEFAULT 1 (|\.text) + 2: 0+0 0 SECTION LOCAL DEFAULT 2 (|\.data) + 3: 0+0 0 SECTION LOCAL DEFAULT 3 (|\.bss) + 4: 0+0 0 SECTION LOCAL DEFAULT 6 (|A) + 5: 0+0 0 SECTION LOCAL DEFAULT 4 (|\.reginfo) + 6: 0+0 0 SECTION LOCAL DEFAULT 5 (|\.pdr) diff --git a/gas/testsuite/gas/elf/symver.d b/gas/testsuite/gas/elf/symver.d index 67b8a4cf13b..78bb6186e0c 100644 --- a/gas/testsuite/gas/elf/symver.d +++ b/gas/testsuite/gas/elf/symver.d @@ -3,6 +3,7 @@ # # The #... and #pass are there to match extra symbols inserted by # some toolchains, eg the mips-elf port will add .reginfo and .ptrd +# and the arm-elf toolchain will add $d. dump.o: file format .* @@ -13,5 +14,6 @@ SYMBOL TABLE: 0+000 l.*d.*\.bss.*0+000.* #... 0+000 l.*O.*\.data.*0+004 x +#... 0+000 l.*O.*\.data.*0+004 x@VERS\.0 #pass diff --git a/gas/testsuite/gas/frv/allinsn.d b/gas/testsuite/gas/frv/allinsn.d index 5ff96af8d62..7b96806721b 100644 --- a/gas/testsuite/gas/frv/allinsn.d +++ b/gas/testsuite/gas/frv/allinsn.d @@ -514,22 +514,22 @@ Disassembly of section .text: 2a0: 80 0c 19 41 stc cpr0,@\(sp,sp\) 000002a4 <rstb>: - 2a4: 82 0c 18 01 rstb sp,@\(sp,sp\) + 2a4: 80 88 00 00 nop 000002a8 <rsth>: - 2a8: 82 0c 18 41 rsth sp,@\(sp,sp\) + 2a8: 80 88 00 00 nop 000002ac <rst>: - 2ac: 82 0c 18 81 rst sp,@\(sp,sp\) + 2ac: 80 88 00 00 nop 000002b0 <rstbf>: - 2b0: 80 0c 1a 01 rstbf fr0,@\(sp,sp\) + 2b0: 80 88 00 00 nop 000002b4 <rsthf>: - 2b4: 80 0c 1a 41 rsthf fr0,@\(sp,sp\) + 2b4: 80 88 00 00 nop 000002b8 <rstf>: - 2b8: 80 0c 1a 81 rstf fr0,@\(sp,sp\) + 2b8: 80 88 00 00 nop 000002bc <std>: 2bc: 84 0c 10 c1 std fp,@\(sp,sp\) @@ -541,10 +541,10 @@ Disassembly of section .text: 2c4: 80 0c 19 81 stdc cpr0,@\(sp,sp\) 000002c8 <rstd>: - 2c8: 84 0c 18 c1 rstd fp,@\(sp,sp\) + 2c8: 80 88 00 00 nop 000002cc <rstdf>: - 2cc: 80 0c 1a c1 rstdf fr0,@\(sp,sp\) + 2cc: 80 88 00 00 nop 000002d0 <stq>: 2d0: 82 0c 11 01 stq sp,@\(sp,sp\) @@ -556,10 +556,10 @@ Disassembly of section .text: 2d8: 80 0c 19 c1 stqc cpr0,@\(sp,sp\) 000002dc <rstq>: - 2dc: 82 0c 19 01 rstq sp,@\(sp,sp\) + 2dc: 80 88 00 00 nop 000002e0 <rstqf>: - 2e0: 80 0c 1b 01 rstqf fr0,@\(sp,sp\) + 2e0: 80 88 00 00 nop 000002e4 <stbu>: 2e4: 82 0c 14 01 stbu sp,@\(sp,sp\) diff --git a/gas/testsuite/gas/frv/allinsn.exp b/gas/testsuite/gas/frv/allinsn.exp index a9fc9654416..8684e4c68fa 100644 --- a/gas/testsuite/gas/frv/allinsn.exp +++ b/gas/testsuite/gas/frv/allinsn.exp @@ -1,8 +1,30 @@ # FRV assembler testsuite. +proc run_list_test { name opts } { + global srcdir subdir + set testname "$name error test ($opts)" + gas_run $name.s $opts >&dump.out + if {[regexp_diff dump.out $srcdir/$subdir/$name.l]} { + fail $testname + verbose "output is [file_contents dump.out]" 2 + return + } + pass $testname +} + if [istarget frv*-*-*] { run_dump_test "allinsn" run_dump_test "fdpic" run_dump_test "reloc1" + run_dump_test "fr405-insn" + run_list_test "fr405-insn" "-mcpu=fr400" + run_list_test "fr405-insn" "-mcpu=fr500" + + run_dump_test "fr450-spr" + run_dump_test "fr450-insn" + run_list_test "fr450-insn" "-mcpu=fr405" + run_list_test "fr450-insn" "-mcpu=fr400" + run_list_test "fr450-insn" "-mcpu=fr500" + run_list_test "fr450-media-issue" "-mcpu=fr450" } diff --git a/gas/testsuite/gas/frv/allinsn.s b/gas/testsuite/gas/frv/allinsn.s index 66aed2bbb29..2657f03127f 100644 --- a/gas/testsuite/gas/frv/allinsn.s +++ b/gas/testsuite/gas/frv/allinsn.s @@ -681,27 +681,27 @@ stc: .text .global rstb rstb: - rstb sp,@(sp,sp) + nop .text .global rsth rsth: - rsth sp,@(sp,sp) + nop .text .global rst rst: - rst sp,@(sp,sp) + nop .text .global rstbf rstbf: - rstbf fr0,@(sp,sp) + nop .text .global rsthf rsthf: - rsthf fr0,@(sp,sp) + nop .text .global rstf rstf: - rstf fr0,@(sp,sp) + nop .text .global std std: @@ -717,11 +717,11 @@ stdc: .text .global rstd rstd: - rstd fp,@(sp,sp) + nop .text .global rstdf rstdf: - rstdf fr0,@(sp,sp) + nop .text .global stq stq: @@ -737,11 +737,11 @@ stqc: .text .global rstq rstq: - rstq sp,@(sp,sp) + nop .text .global rstqf rstqf: - rstqf fr0,@(sp,sp) + nop .text .global stbu stbu: diff --git a/gas/testsuite/gas/frv/fr405-insn.d b/gas/testsuite/gas/frv/fr405-insn.d new file mode 100644 index 00000000000..6cc848b3a5d --- /dev/null +++ b/gas/testsuite/gas/frv/fr405-insn.d @@ -0,0 +1,15 @@ +#as: -mcpu=fr405 +#objdump: -dr + +.*: file format elf32-frv + +Disassembly of section \.text: + +00000000 <.*>: +.*: 81 18 41 45 smu gr4,gr5 +.*: 81 18 41 85 smass gr4,gr5 +.*: 81 18 41 c5 smsss gr4,gr5 +.*: 8d 18 40 85 slass gr4,gr5,gr6 +.*: 8b 18 01 04 scutss gr4,gr5 +.*: 8d 18 40 05 addss gr4,gr5,gr6 +.*: 8d 18 40 45 subss gr4,gr5,gr6 diff --git a/gas/testsuite/gas/frv/fr405-insn.l b/gas/testsuite/gas/frv/fr405-insn.l new file mode 100644 index 00000000000..8c84f80ece9 --- /dev/null +++ b/gas/testsuite/gas/frv/fr405-insn.l @@ -0,0 +1,8 @@ +.*: Assembler messages: +.*:1: Error: Instruction not supported by this architecture +.*:2: Error: Instruction not supported by this architecture +.*:3: Error: Instruction not supported by this architecture +.*:4: Error: Instruction not supported by this architecture +.*:5: Error: Instruction not supported by this architecture +.*:6: Error: Instruction not supported by this architecture +.*:7: Error: Instruction not supported by this architecture diff --git a/gas/testsuite/gas/frv/fr405-insn.s b/gas/testsuite/gas/frv/fr405-insn.s new file mode 100644 index 00000000000..acd5ea26c05 --- /dev/null +++ b/gas/testsuite/gas/frv/fr405-insn.s @@ -0,0 +1,7 @@ + smu gr4,gr5 + smass gr4,gr5 + smsss gr4,gr5 + slass gr4,gr5,gr6 + scutss gr4,gr5 + addss gr4,gr5,gr6 + subss gr4,gr5,gr6 diff --git a/gas/testsuite/gas/frv/fr450-insn.d b/gas/testsuite/gas/frv/fr450-insn.d new file mode 100644 index 00000000000..5739c892718 --- /dev/null +++ b/gas/testsuite/gas/frv/fr450-insn.d @@ -0,0 +1,41 @@ +#as: -mcpu=fr450 +#objdump: -dr + +.*: file format elf32-frv + +Disassembly of section \.text: + +00000000 <.*>: +# +.*: 80 0d f8 00 lrai gr31,gr0,0x0,0x0,0x0 +.*: be 0c 08 00 lrai gr0,gr31,0x0,0x0,0x0 +.*: 80 0c 08 20 lrai gr0,gr0,0x1,0x0,0x0 +.*: 80 0c 08 10 lrai gr0,gr0,0x0,0x1,0x0 +.*: 80 0c 08 08 lrai gr0,gr0,0x0,0x0,0x1 +# +.*: 80 0d f8 40 lrad gr31,gr0,0x0,0x0,0x0 +.*: be 0c 08 40 lrad gr0,gr31,0x0,0x0,0x0 +.*: 80 0c 08 60 lrad gr0,gr0,0x1,0x0,0x0 +.*: 80 0c 08 50 lrad gr0,gr0,0x0,0x1,0x0 +.*: 80 0c 08 48 lrad gr0,gr0,0x0,0x0,0x1 +# +.*: 80 0d f9 00 tlbpr gr31,gr0,0x0,0x0 +.*: 80 0c 09 1f tlbpr gr0,gr31,0x0,0x0 +.*: 9c 0c 09 00 tlbpr gr0,gr0,0x7,0x0 +.*: 82 0c 09 00 tlbpr gr0,gr0,0x0,0x1 +# +.*: 81 e1 e4 00 mqlclrhs fr30,fr0,fr0 +.*: 81 e0 04 1e mqlclrhs fr0,fr30,fr0 +.*: bd e0 04 00 mqlclrhs fr0,fr0,fr30 +# +.*: 81 e1 e5 00 mqlmths fr30,fr0,fr0 +.*: 81 e0 05 1e mqlmths fr0,fr30,fr0 +.*: bd e0 05 00 mqlmths fr0,fr0,fr30 +# +.*: 81 e1 e4 40 mqsllhi fr30,0x0,fr0 +.*: 81 e0 04 7f mqsllhi fr0,0x3f,fr0 +.*: bd e0 04 40 mqsllhi fr0,0x0,fr30 +# +.*: 81 e1 e4 c0 mqsrahi fr30,0x0,fr0 +.*: 81 e0 04 ff mqsrahi fr0,0x3f,fr0 +.*: bd e0 04 c0 mqsrahi fr0,0x0,fr30 diff --git a/gas/testsuite/gas/frv/fr450-insn.l b/gas/testsuite/gas/frv/fr450-insn.l new file mode 100644 index 00000000000..106a8f7041e --- /dev/null +++ b/gas/testsuite/gas/frv/fr450-insn.l @@ -0,0 +1,33 @@ +.*: Assembler messages: +.*:1: Error: Instruction not supported by this architecture +.*:2: Error: Instruction not supported by this architecture +.*:3: Error: Instruction not supported by this architecture +.*:4: Error: Instruction not supported by this architecture +.*:5: Error: Instruction not supported by this architecture +# +.*:7: Error: Instruction not supported by this architecture +.*:8: Error: Instruction not supported by this architecture +.*:9: Error: Instruction not supported by this architecture +.*:10: Error: Instruction not supported by this architecture +.*:11: Error: Instruction not supported by this architecture +# +.*:13: Error: Instruction not supported by this architecture +.*:14: Error: Instruction not supported by this architecture +.*:15: Error: Instruction not supported by this architecture +.*:16: Error: Instruction not supported by this architecture +# +.*:18: Error: Instruction not supported by this architecture +.*:19: Error: Instruction not supported by this architecture +.*:20: Error: Instruction not supported by this architecture +# +.*:22: Error: Instruction not supported by this architecture +.*:23: Error: Instruction not supported by this architecture +.*:24: Error: Instruction not supported by this architecture +# +.*:26: Error: Instruction not supported by this architecture +.*:27: Error: Instruction not supported by this architecture +.*:28: Error: Instruction not supported by this architecture +# +.*:30: Error: Instruction not supported by this architecture +.*:31: Error: Instruction not supported by this architecture +.*:32: Error: Instruction not supported by this architecture diff --git a/gas/testsuite/gas/frv/fr450-insn.s b/gas/testsuite/gas/frv/fr450-insn.s new file mode 100644 index 00000000000..7224c30ca80 --- /dev/null +++ b/gas/testsuite/gas/frv/fr450-insn.s @@ -0,0 +1,32 @@ + lrai gr31,gr0,#0,#0,#0 + lrai gr0,gr31,#0,#0,#0 + lrai gr0,gr0,#1,#0,#0 + lrai gr0,gr0,#0,#1,#0 + lrai gr0,gr0,#0,#0,#1 + + lrad gr31,gr0,#0,#0,#0 + lrad gr0,gr31,#0,#0,#0 + lrad gr0,gr0,#1,#0,#0 + lrad gr0,gr0,#0,#1,#0 + lrad gr0,gr0,#0,#0,#1 + + tlbpr gr31,gr0,#0,#0 + tlbpr gr0,gr31,#0,#0 + tlbpr gr0,gr0,#7,#0 + tlbpr gr0,gr0,#0,#1 + + mqlclrhs fr30,fr0,fr0 + mqlclrhs fr0,fr30,fr0 + mqlclrhs fr0,fr0,fr30 + + mqlmths fr30,fr0,fr0 + mqlmths fr0,fr30,fr0 + mqlmths fr0,fr0,fr30 + + mqsllhi fr30,#0,fr0 + mqsllhi fr0,#63,fr0 + mqsllhi fr0,#0,fr30 + + mqsrahi fr30,#0,fr0 + mqsrahi fr0,#63,fr0 + mqsrahi fr0,#0,fr30 diff --git a/gas/testsuite/gas/frv/fr450-media-issue.l b/gas/testsuite/gas/frv/fr450-media-issue.l new file mode 100644 index 00000000000..679702191bc --- /dev/null +++ b/gas/testsuite/gas/frv/fr450-media-issue.l @@ -0,0 +1,31 @@ +.*: Assembler messages: +.*:5: Error: VLIW packing constraint violation +.*:9: Error: VLIW packing constraint violation +.*:13: Error: VLIW packing constraint violation +# +.*:17: Error: VLIW packing constraint violation +.*:19: Error: VLIW packing constraint violation +.*:21: Error: VLIW packing constraint violation +.*:23: Error: VLIW packing constraint violation +.*:25: Error: VLIW packing constraint violation +.*:27: Error: VLIW packing constraint violation +# +.*:33: Error: VLIW packing constraint violation +.*:37: Error: VLIW packing constraint violation +.*:41: Error: VLIW packing constraint violation +# +.*:45: Error: VLIW packing constraint violation +.*:47: Error: VLIW packing constraint violation +.*:49: Error: VLIW packing constraint violation +.*:51: Error: VLIW packing constraint violation +# +.*:61: Error: VLIW packing constraint violation +.*:65: Error: VLIW packing constraint violation +.*:69: Error: VLIW packing constraint violation +# +.*:73: Error: VLIW packing constraint violation +.*:75: Error: VLIW packing constraint violation +.*:77: Error: VLIW packing constraint violation +.*:79: Error: VLIW packing constraint violation +.*:81: Error: VLIW packing constraint violation +.*:83: Error: VLIW packing constraint violation diff --git a/gas/testsuite/gas/frv/fr450-media-issue.s b/gas/testsuite/gas/frv/fr450-media-issue.s new file mode 100644 index 00000000000..e73fc98aa55 --- /dev/null +++ b/gas/testsuite/gas/frv/fr450-media-issue.s @@ -0,0 +1,83 @@ + ; M-1 first + mand.p fr0,fr1,fr2 ; M1 + mpackh fr4,fr5,fr6 ; M1 -- ok + mand.p fr0,fr1,fr2 ; M1 + mcpli fr4,#1,fr6 ; M2 -- error + mand.p fr0,fr1,fr2 ; M1 + mmulhu fr4,fr6,acc8 ; M3 -- ok + mand.p fr0,fr1,fr2 ; M1 + mqmulhu fr4,fr6,acc8 ; M4 -- error + mand.p fr0,fr1,fr2 ; M1 + mcuti acc8,#2,fr8 ; M5 -- ok + mand.p fr0,fr1,fr2 ; M1 + mdcutssi acc8,#2,fr8 ; M6 -- error + + ; M-2 first + mqaddhss.p fr0,fr2,fr2 ; M2 + mpackh fr4,fr5,fr6 ; M1 -- error + mqaddhss.p fr0,fr2,fr2 ; M2 + mcpli fr4,#1,fr6 ; M2 -- error + mqaddhss.p fr0,fr2,fr2 ; M2 + mmulhu fr4,fr6,acc8 ; M3 -- error + mqaddhss.p fr0,fr2,fr2 ; M2 + mqmulhu fr4,fr6,acc8 ; M4 -- error + mqaddhss.p fr0,fr2,fr2 ; M2 + mcuti acc8,#2,fr8 ; M5 -- error + mqaddhss.p fr0,fr2,fr2 ; M2 + mdcutssi acc8,#2,fr8 ; M6 -- error + + ; M-3 first + mwtacc.p fr0,acc0 ; M3 + mpackh fr4,fr5,fr6 ; M1 -- ok + mwtacc.p fr0,acc0 ; M3 + mcpli fr4,#1,fr6 ; M2 -- error + mwtacc.p fr0,acc0 ; M3 + mmulhu fr4,fr6,acc8 ; M3 -- ok + mwtacc.p fr0,acc0 ; M3 + mqmulhu fr4,fr6,acc8 ; M4 -- error + mwtacc.p fr0,acc0 ; M3 + mcuti acc8,#2,fr8 ; M5 -- ok + mwtacc.p fr0,acc0 ; M3 + mdcutssi acc8,#2,fr8 ; M6 -- error + + ; M-4 first + mqcpxrs.p fr0,fr2,acc0 ; M4 + mpackh fr4,fr5,fr6 ; M1 -- error + mqcpxrs.p fr0,fr2,acc0 ; M4 + mcpli fr4,#1,fr6 ; M2 -- error + mqcpxrs.p fr0,fr2,acc0 ; M4 + mmulhu fr4,fr6,acc8 ; M3 -- error + mqcpxrs.p fr0,fr2,acc0 ; M4 + mqmulhu fr4,fr6,acc8 ; M4 -- error + mqcpxrs.p fr0,fr2,acc0 ; M4 + mcuti acc8,#2,fr8 ; M5 -- ok + mqcpxrs.p fr0,fr2,acc0 ; M4 + mdcutssi acc8,#2,fr8 ; M6 -- ok + + ; M-5 first + mrdacc.p acc0,fr0 ; M5 + mpackh fr4,fr5,fr6 ; M1 -- ok + mrdacc.p acc0,fr0 ; M5 + mcpli fr4,#1,fr6 ; M2 -- error + mrdacc.p acc0,fr0 ; M5 + mmulhu fr4,fr6,acc8 ; M3 -- ok + mrdacc.p acc0,fr0 ; M5 + mqmulhu fr4,fr6,acc8 ; M4 -- error + mrdacc.p acc0,fr0 ; M5 + mcuti acc8,#2,fr8 ; M5 -- ok + mrdacc.p acc0,fr0 ; M5 + mdcutssi acc8,#2,fr8 ; M6 -- error + + ; M-6 first + mdcutssi.p acc0,#3,fr0 ; M6 + mpackh fr4,fr5,fr6 ; M1 -- error + mdcutssi.p acc0,#3,fr0 ; M6 + mcpli fr4,#1,fr6 ; M2 -- error + mdcutssi.p acc0,#3,fr0 ; M6 + mmulhu fr4,fr6,acc8 ; M3 -- error + mdcutssi.p acc0,#3,fr0 ; M6 + mqmulhu fr4,fr6,acc8 ; M4 -- error + mdcutssi.p acc0,#3,fr0 ; M6 + mcuti acc8,#2,fr8 ; M5 -- error + mdcutssi.p acc0,#3,fr0 ; M6 + mdcutssi acc8,#2,fr8 ; M6 -- error diff --git a/gas/testsuite/gas/frv/fr450-spr.d b/gas/testsuite/gas/frv/fr450-spr.d new file mode 100644 index 00000000000..85b1f092c94 --- /dev/null +++ b/gas/testsuite/gas/frv/fr450-spr.d @@ -0,0 +1,107 @@ +#as: -mcpu=fr450 +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +.* <\.text>: +.*: 80 0c 01 84 movgs gr4,psr +.*: 80 0c 11 84 movgs gr4,pcsr +.*: 80 0c 21 84 movgs gr4,bpcsr +.*: 80 0c 31 84 movgs gr4,tbr +.*: 80 0c 41 84 movgs gr4,bpsr +.*: 80 0d 01 84 movgs gr4,hsr0 +.*: 88 0c 01 84 movgs gr4,ccr +.*: 88 0c 71 84 movgs gr4,cccr +.*: 88 0d 01 84 movgs gr4,lr +.*: 88 0d 11 84 movgs gr4,lcr +.*: 88 0d 81 84 movgs gr4,iacc0h +.*: 88 0d 91 84 movgs gr4,iacc0l +.*: 88 0e 01 84 movgs gr4,isr +.*: 90 0c 01 84 movgs gr4,epcr0 +.*: 92 0c 01 84 movgs gr4,esr0 +.*: 92 0c e1 84 movgs gr4,esr14 +.*: 92 0c f1 84 movgs gr4,esr15 +.*: 94 0e 11 84 movgs gr4,esfr1 +.*: 9a 0c 01 84 movgs gr4,scr0 +.*: 9a 0c 11 84 movgs gr4,scr1 +.*: 9a 0c 21 84 movgs gr4,scr2 +.*: 9a 0c 31 84 movgs gr4,scr3 +.*: a8 0c 01 84 movgs gr4,msr0 +.*: a8 0c 11 84 movgs gr4,msr1 +.*: b0 0c 01 84 movgs gr4,ear0 +.*: b0 0c f1 84 movgs gr4,ear15 +.*: b4 0c 01 84 movgs gr4,iamlr0 +.*: b4 0c 11 84 movgs gr4,iamlr1 +.*: b4 0c 21 84 movgs gr4,iamlr2 +.*: b4 0c 31 84 movgs gr4,iamlr3 +.*: b4 0c 41 84 movgs gr4,iamlr4 +.*: b4 0c 51 84 movgs gr4,iamlr5 +.*: b4 0c 61 84 movgs gr4,iamlr6 +.*: b4 0c 71 84 movgs gr4,iamlr7 +.*: b6 0c 01 84 movgs gr4,iampr0 +.*: b6 0c 11 84 movgs gr4,iampr1 +.*: b6 0c 21 84 movgs gr4,iampr2 +.*: b6 0c 31 84 movgs gr4,iampr3 +.*: b6 0c 41 84 movgs gr4,iampr4 +.*: b6 0c 51 84 movgs gr4,iampr5 +.*: b6 0c 61 84 movgs gr4,iampr6 +.*: b6 0c 71 84 movgs gr4,iampr7 +.*: b8 0c 01 84 movgs gr4,damlr0 +.*: b8 0c 11 84 movgs gr4,damlr1 +.*: b8 0c 21 84 movgs gr4,damlr2 +.*: b8 0c 31 84 movgs gr4,damlr3 +.*: b8 0c 41 84 movgs gr4,damlr4 +.*: b8 0c 51 84 movgs gr4,damlr5 +.*: b8 0c 61 84 movgs gr4,damlr6 +.*: b8 0c 71 84 movgs gr4,damlr7 +.*: b8 0c 81 84 movgs gr4,damlr8 +.*: b8 0c 91 84 movgs gr4,damlr9 +.*: b8 0c a1 84 movgs gr4,damlr10 +.*: b8 0c b1 84 movgs gr4,damlr11 +.*: ba 0c 01 84 movgs gr4,dampr0 +.*: ba 0c 11 84 movgs gr4,dampr1 +.*: ba 0c 21 84 movgs gr4,dampr2 +.*: ba 0c 31 84 movgs gr4,dampr3 +.*: ba 0c 41 84 movgs gr4,dampr4 +.*: ba 0c 51 84 movgs gr4,dampr5 +.*: ba 0c 61 84 movgs gr4,dampr6 +.*: ba 0c 71 84 movgs gr4,dampr7 +.*: ba 0c 81 84 movgs gr4,dampr8 +.*: ba 0c 91 84 movgs gr4,dampr9 +.*: ba 0c a1 84 movgs gr4,dampr10 +.*: ba 0c b1 84 movgs gr4,dampr11 +.*: bc 0c 01 84 movgs gr4,amcr +.*: bc 0c 51 84 movgs gr4,iamvr1 +.*: bc 0c 71 84 movgs gr4,damvr1 +.*: bc 0d 01 84 movgs gr4,cxnr +.*: bc 0d 11 84 movgs gr4,ttbr +.*: bc 0d 21 84 movgs gr4,tplr +.*: bc 0d 31 84 movgs gr4,tppr +.*: bc 0d 41 84 movgs gr4,tpxr +.*: bc 0e 01 84 movgs gr4,timerh +.*: bc 0e 11 84 movgs gr4,timerl +.*: bc 0e 21 84 movgs gr4,timerd +.*: c0 0c 01 84 movgs gr4,dcr +.*: c0 0c 11 84 movgs gr4,brr +.*: c0 0c 21 84 movgs gr4,nmar +.*: c0 0c 31 84 movgs gr4,btbr +.*: c0 0c 41 84 movgs gr4,ibar0 +.*: c0 0c 51 84 movgs gr4,ibar1 +.*: c0 0c 61 84 movgs gr4,ibar2 +.*: c0 0c 71 84 movgs gr4,ibar3 +.*: c0 0c 81 84 movgs gr4,dbar0 +.*: c0 0c 91 84 movgs gr4,dbar1 +.*: c0 0c a1 84 movgs gr4,dbar2 +.*: c0 0c b1 84 movgs gr4,dbar3 +.*: c0 0c c1 84 movgs gr4,dbdr00 +.*: c0 0c d1 84 movgs gr4,dbdr01 +.*: c0 0c e1 84 movgs gr4,dbdr02 +.*: c0 0c f1 84 movgs gr4,dbdr03 +.*: c0 0d 01 84 movgs gr4,dbdr10 +.*: c0 0d 11 84 movgs gr4,dbdr11 +.*: c0 0d c1 84 movgs gr4,dbmr00 +.*: c0 0d d1 84 movgs gr4,dbmr01 +.*: c0 0e 01 84 movgs gr4,dbmr10 +.*: c0 0e 11 84 movgs gr4,dbmr11 diff --git a/gas/testsuite/gas/frv/fr450-spr.s b/gas/testsuite/gas/frv/fr450-spr.s new file mode 100644 index 00000000000..2be3ba65070 --- /dev/null +++ b/gas/testsuite/gas/frv/fr450-spr.s @@ -0,0 +1,99 @@ + movgs gr4, psr ; 0x000 00000 + movgs gr4, pcsr ; 0x001 00001 + movgs gr4, bpcsr ; 0x002 00002 + movgs gr4, tbr ; 0x003 00003 + movgs gr4, bpsr ; 0x004 00004 + movgs gr4, hsr0 ; 0x010 00020 + movgs gr4, ccr ; 0x100 00400 + movgs gr4, cccr ; 0x107 00407 + movgs gr4, lr ; 0x110 00420 + movgs gr4, lcr ; 0x111 00421 + movgs gr4, iacc0h ; 0x118 00430 + movgs gr4, iacc0l ; 0x119 00431 + movgs gr4, isr ; 0x120 00440 + movgs gr4, epcr0 ; 0x200 01000 + movgs gr4, esr0 ; 0x240 01100 + movgs gr4, esr14 ; 0x24e 01116 + movgs gr4, esr15 ; 0x24f 01117 + movgs gr4, esfr1 ; 0x2a1 01241 + movgs gr4, scr0 ; 0x340 01500 + movgs gr4, scr1 ; 0x341 01501 + movgs gr4, scr2 ; 0x342 01502 + movgs gr4, scr3 ; 0x343 01503 + movgs gr4, msr0 ; 0x500 02400 + movgs gr4, msr1 ; 0x501 02401 + movgs gr4, ear0 ; 0x600 03000 + movgs gr4, ear15 ; 0x60f 03017 + movgs gr4, iamlr0 ; 0x680 03200 + movgs gr4, iamlr1 ; 0x681 03201 + movgs gr4, iamlr2 ; 0x682 03202 + movgs gr4, iamlr3 ; 0x683 03203 + movgs gr4, iamlr4 ; 0x684 03204 + movgs gr4, iamlr5 ; 0x685 03205 + movgs gr4, iamlr6 ; 0x686 03206 + movgs gr4, iamlr7 ; 0x687 03207 + movgs gr4, iampr0 ; 0x6c0 03300 + movgs gr4, iampr1 ; 0x6c1 03301 + movgs gr4, iampr2 ; 0x6c2 03302 + movgs gr4, iampr3 ; 0x6c3 03303 + movgs gr4, iampr4 ; 0x6c4 03304 + movgs gr4, iampr5 ; 0x6c5 03305 + movgs gr4, iampr6 ; 0x6c6 03306 + movgs gr4, iampr7 ; 0x6c7 03307 + movgs gr4, damlr0 ; 0x700 03400 + movgs gr4, damlr1 ; 0x701 03401 + movgs gr4, damlr2 ; 0x702 03402 + movgs gr4, damlr3 ; 0x703 03403 + movgs gr4, damlr4 ; 0x704 03404 + movgs gr4, damlr5 ; 0x705 03405 + movgs gr4, damlr6 ; 0x706 03406 + movgs gr4, damlr7 ; 0x707 03407 + movgs gr4, damlr8 ; 0x708 03410 + movgs gr4, damlr9 ; 0x709 03411 + movgs gr4, damlr10 ; 0x70a 03412 + movgs gr4, damlr11 ; 0x70b 03413 + movgs gr4, dampr0 ; 0x740 03500 + movgs gr4, dampr1 ; 0x741 03501 + movgs gr4, dampr2 ; 0x742 03502 + movgs gr4, dampr3 ; 0x743 03503 + movgs gr4, dampr4 ; 0x744 03504 + movgs gr4, dampr5 ; 0x745 03505 + movgs gr4, dampr6 ; 0x746 03506 + movgs gr4, dampr7 ; 0x747 03507 + movgs gr4, dampr8 ; 0x748 03510 + movgs gr4, dampr9 ; 0x749 03511 + movgs gr4, dampr10 ; 0x74a 03512 + movgs gr4, dampr11 ; 0x74b 03513 + movgs gr4, amcr ; 0x780 03600 + movgs gr4, iamvr1 ; 0x785 03605 + movgs gr4, damvr1 ; 0x787 03607 + movgs gr4, cxnr ; 0x790 03620 + movgs gr4, ttbr ; 0x791 03621 + movgs gr4, tplr ; 0x792 03622 + movgs gr4, tppr ; 0x793 03623 + movgs gr4, tpxr ; 0x794 03624 + movgs gr4, timerh ; 0x7a0 03640 + movgs gr4, timerl ; 0x7a1 03641 + movgs gr4, timerd ; 0x7a2 03642 + movgs gr4, dcr ; 0x800 04000 + movgs gr4, brr ; 0x801 04001 + movgs gr4, nmar ; 0x802 04002 + movgs gr4, btbr ; 0x803 04003 + movgs gr4, ibar0 ; 0x804 04004 + movgs gr4, ibar1 ; 0x805 04005 + movgs gr4, ibar2 ; 0x806 04006 + movgs gr4, ibar3 ; 0x807 04007 + movgs gr4, dbar0 ; 0x808 04010 + movgs gr4, dbar1 ; 0x809 04011 + movgs gr4, dbar2 ; 0x80A 04012 + movgs gr4, dbar3 ; 0x80B 04013 + movgs gr4, dbdr00 ; 0x80C 04014 + movgs gr4, dbdr01 ; 0x80D 04015 + movgs gr4, dbdr02 ; 0x80E 04016 + movgs gr4, dbdr03 ; 0x80F 04017 + movgs gr4, dbdr10 ; 0x810 04020 + movgs gr4, dbdr11 ; 0x811 04021 + movgs gr4, dbmr00 ; 0x81C 04034 + movgs gr4, dbmr01 ; 0x81D 04035 + movgs gr4, dbmr10 ; 0x820 04040 + movgs gr4, dbmr11 ; 0x821 04041 diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 3ccb7e2e2ba..946cf9e9629 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -88,6 +88,13 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]] run_dump_test "tlsnopic" } + # This is a PE specific test. + if { [istarget "*-*-cygwin*"] || [istarget "*-*-pe"] + || [istarget "*-*-mingw*"] + } then { + run_dump_test "secrel" + } + set ASFLAGS "$old_ASFLAGS" } diff --git a/gas/testsuite/gas/i386/secrel.d b/gas/testsuite/gas/i386/secrel.d new file mode 100644 index 00000000000..7df55f76983 --- /dev/null +++ b/gas/testsuite/gas/i386/secrel.d @@ -0,0 +1,43 @@ +#objdump: -rs
+#name: i386 secrel reloc
+
+.*: +file format pe-i386
+
+RELOCATION RECORDS FOR \[\.data\]:
+OFFSET TYPE VALUE
+00000024 secrel32 \.text
+00000029 secrel32 \.text
+0000002e secrel32 \.text
+00000033 secrel32 \.text
+00000044 secrel32 \.data
+00000049 secrel32 \.data
+0000004e secrel32 \.data
+00000053 secrel32 \.data
+00000064 secrel32 \.rdata
+00000069 secrel32 \.rdata
+0000006e secrel32 \.rdata
+00000073 secrel32 \.rdata
+00000084 secrel32 ext24
+00000089 secrel32 ext2d
+0000008e secrel32 ext36
+00000093 secrel32 ext3f
+
+
+Contents of section \.text:
+ 0000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c >>>><<<<>>>>><<<
+ 0010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c >>>>>><<>>>>>>><
+Contents of section \.data:
+ 0000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c >>>><<<<>>>>><<<
+ 0010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c >>>>>><<>>>>>>><
+ 0020 3e3e3e3e 04000000 110d0000 00111600 >>>>............
+ 0030 0000111f 00000011 3c3c3c3c 3c3c3c3c ........<<<<<<<<
+ 0040 3e3e3e3e 04000000 110d0000 00111600 >>>>............
+ 0050 0000111f 00000011 3c3c3c3c 3c3c3c3c ........<<<<<<<<
+ 0060 3e3e3e3e 04000000 110d0000 00111600 >>>>............
+ 0070 0000111f 00000011 3c3c3c3c 3c3c3c3c ........<<<<<<<<
+ 0080 3e3e3e3e 00000000 11000000 00110000 >>>>............
+ 0090 00001100 00000011 3c3c3c3c 3c3c3c3c ........<<<<<<<<
+Contents of section \.rdata:
+ 0000 3e3e3e3e 3c3c3c3c 3e3e3e3e 3e3c3c3c >>>><<<<>>>>><<<
+ 0010 3e3e3e3e 3e3e3c3c 3e3e3e3e 3e3e3e3c >>>>>><<>>>>>>><
+ 0020 3e3e3e3e >>>>
diff --git a/gas/testsuite/gas/i386/secrel.s b/gas/testsuite/gas/i386/secrel.s new file mode 100644 index 00000000000..eaf59cdf216 --- /dev/null +++ b/gas/testsuite/gas/i386/secrel.s @@ -0,0 +1,77 @@ +.text
+
+ .ascii ">>>>"
+pre04: .ascii "<<<<"
+ .ascii ">>>>>"
+pre0d: .ascii "<<<"
+ .ascii ">>>>>>"
+pre16: .ascii "<<"
+ .ascii ">>>>>>>"
+pre1f: .ascii "<"
+
+.data
+
+ .ascii ">>>>"
+sam04: .ascii "<<<<"
+ .ascii ">>>>>"
+sam0d: .ascii "<<<"
+ .ascii ">>>>>>"
+sam16: .ascii "<<"
+ .ascii ">>>>>>>"
+sam1f: .ascii "<"
+
+ .ascii ">>>>"
+ .secrel32 pre04
+ .byte 0x11
+ .secrel32 pre0d
+ .byte 0x11
+ .secrel32 pre16
+ .byte 0x11
+ .secrel32 pre1f
+ .byte 0x11
+ .ascii "<<<<<<<<"
+
+ .ascii ">>>>"
+ .secrel32 sam04
+ .byte 0x11
+ .secrel32 sam0d
+ .byte 0x11
+ .secrel32 sam16
+ .byte 0x11
+ .secrel32 sam1f
+ .byte 0x11
+ .ascii "<<<<<<<<"
+
+ .ascii ">>>>"
+ .secrel32 nex04
+ .byte 0x11
+ .secrel32 nex0d
+ .byte 0x11
+ .secrel32 nex16
+ .byte 0x11
+ .secrel32 nex1f
+ .byte 0x11
+ .ascii "<<<<<<<<"
+
+ .ascii ">>>>"
+ .secrel32 ext24
+ .byte 0x11
+ .secrel32 ext2d
+ .byte 0x11
+ .secrel32 ext36
+ .byte 0x11
+ .secrel32 ext3f
+ .byte 0x11
+ .ascii "<<<<<<<<"
+
+.section .rdata
+
+ .ascii ">>>>"
+nex04: .ascii "<<<<"
+ .ascii ">>>>>"
+nex0d: .ascii "<<<"
+ .ascii ">>>>>>"
+nex16: .ascii "<<"
+ .ascii ">>>>>>>"
+nex1f: .ascii "<"
+ .ascii ">>>>"
diff --git a/gas/testsuite/gas/i860/dir-intel03-err.l b/gas/testsuite/gas/i860/dir-intel03-err.l index 480e1aea583..b8261282bf7 100644 --- a/gas/testsuite/gas/i860/dir-intel03-err.l +++ b/gas/testsuite/gas/i860/dir-intel03-err.l @@ -1,5 +1,5 @@ .*: Assembler messages: .*:8: Error: Directive .atmp available only with -mintel-syntax option -.*:8: Warning: rest of line ignored; first ignored character is `r' +.*:8: Error: junk at end of line, first unrecognized character is `r' .*:10: Error: Directive .dual available only with -mintel-syntax option .*:13: Error: Directive .enddual available only with -mintel-syntax option diff --git a/gas/testsuite/gas/m32r/m32r.exp b/gas/testsuite/gas/m32r/m32r.exp index 0ac272b1358..353f738a3f4 100644 --- a/gas/testsuite/gas/m32r/m32r.exp +++ b/gas/testsuite/gas/m32r/m32r.exp @@ -6,4 +6,5 @@ if [istarget m32r*-*-*] { run_dump_test "uppercase" run_dump_test "fslot" run_dump_test "signed-relocs" + run_dump_test "seth" } diff --git a/gas/testsuite/gas/m32r/m32r2.exp b/gas/testsuite/gas/m32r/m32r2.exp index 03a160aa589..f5f7415d9ed 100644 --- a/gas/testsuite/gas/m32r/m32r2.exp +++ b/gas/testsuite/gas/m32r/m32r2.exp @@ -2,4 +2,5 @@ if [istarget m32r*-*-*] { run_dump_test "m32r2" + run_dump_test "parallel-2" } diff --git a/gas/testsuite/gas/m32r/parallel-2.d b/gas/testsuite/gas/m32r/parallel-2.d new file mode 100644 index 00000000000..5638c33f02e --- /dev/null +++ b/gas/testsuite/gas/m32r/parallel-2.d @@ -0,0 +1,10 @@ +#as: -m32r2 -O +#objdump: -dr + +.*: +file format .* + +Disassembly of section .text: + +0+0000 <test>: + 0: 04 a5 24 46 add r4,r5 -> st r4,@r6 + 4: 7c ff c6 04 bc 0 <test> \|\| addi r6,[#]4 diff --git a/gas/testsuite/gas/m32r/parallel-2.s b/gas/testsuite/gas/m32r/parallel-2.s new file mode 100644 index 00000000000..7ea40c2e051 --- /dev/null +++ b/gas/testsuite/gas/m32r/parallel-2.s @@ -0,0 +1,7 @@ + .text +test: + add r4,r5 + st r4,@(r6) + addi r6,#4 + .debugsym .LM568 + bc.s test diff --git a/gas/testsuite/gas/m32r/seth.d b/gas/testsuite/gas/m32r/seth.d new file mode 100644 index 00000000000..fd792e55799 --- /dev/null +++ b/gas/testsuite/gas/m32r/seth.d @@ -0,0 +1,8 @@ +#objdump: -dr + +.*: +file format .* + +Disassembly of section .text: + +0+000 <.text>: + 0: d0 c0 00 00 seth r0,[#]0x0 diff --git a/gas/testsuite/gas/m32r/seth.s b/gas/testsuite/gas/m32r/seth.s new file mode 100644 index 00000000000..32160a3759d --- /dev/null +++ b/gas/testsuite/gas/m32r/seth.s @@ -0,0 +1,3 @@ + .text + seth r0, #shigh(0xffff8000) + .end diff --git a/gas/testsuite/gas/m68hc11/m68hc11.exp b/gas/testsuite/gas/m68hc11/m68hc11.exp index 2bfa8803aab..868241a832c 100644 --- a/gas/testsuite/gas/m68hc11/m68hc11.exp +++ b/gas/testsuite/gas/m68hc11/m68hc11.exp @@ -161,7 +161,7 @@ setup_xfail m6812-*-* gas_m68hc11_warning "" ".mode \"bar\"\n" "Invalid mode: .bar." gas_m68hc11_error "" ".relax 23\n" "bad .relax format" gas_m68hc11_error "" ".relax bar-23\n" "bad .relax format" -gas_m68hc11_warning "" ".far bar bar\n" "rest of line ignored" +gas_m68hc11_error "" ".far bar bar\n" "junk at end of line" run_dump_test insns diff --git a/gas/testsuite/gas/m68k/all.exp b/gas/testsuite/gas/m68k/all.exp index d28f9f66a2d..c98179cbe9f 100644 --- a/gas/testsuite/gas/m68k/all.exp +++ b/gas/testsuite/gas/m68k/all.exp @@ -35,6 +35,8 @@ if [istarget m68*-*-*] then { run_dump_test link run_dump_test fmoveml run_dump_test mcf-mov3q + run_dump_test mcf-mac + run_dump_test mcf-emac set testname "68000 operands" gas_run "operands.s" "-m68000" "2>err.out" diff --git a/gas/testsuite/gas/m68k/mcf-emac.d b/gas/testsuite/gas/m68k/mcf-emac.d new file mode 100644 index 00000000000..aa7e562404c --- /dev/null +++ b/gas/testsuite/gas/m68k/mcf-emac.d @@ -0,0 +1,6538 @@ +#name: mcf-emac +#objdump: -d --architecture=m68k:cfv4e +#as: -mcfv4e + +.*: file format .* + +Disassembly of section .text: + +00000000 <.text>: + 0: a241 0280 macw %d1l,%a1u,<<,%acc0 + 4: aad1 0280 macw %d1u,%a5u,<<,%a1@,%a5,%acc1 + 8: a6d5 02a0 macw %d5u,%a3u,>>,%a5@&,%a3,%acc1 + c: a13c 00bc 614e movel #12345678,%acc0 + 12: a301 movel %d1,%acc1 + 14: a33c 00bc 614e movel #12345678,%acc1 + 1a: a53c 00bc 614e movel #12345678,%acc2 + 20: a309 movel %a1,%acc1 + 22: a73c 00bc 614e movel #12345678,%acc3 + 28: a8c3 0640 macw %d3u,%a4l,,%acc0 + 2c: acc5 0040 macw %d5u,%fpl,%acc0 + 30: a602 0800 macl %d2,%d3,%acc0 + 34: a682 0800 macl %d2,%d3,%acc0 + 38: a602 0810 macl %d2,%d3,%acc2 + 3c: a682 0810 macl %d2,%d3,%acc2 + 40: a1c1 movclrl %acc0,%d1 + 42: a3ca movclrl %acc1,%a2 + 44: a5c3 movclrl %acc2,%d3 + 46: a7cd movclrl %acc3,%a5 + 48: a381 movel %acc1,%d1 + 4a: a78b movel %acc3,%a3 + 4c: a185 movel %acc0,%d5 + 4e: a38f movel %acc1,%sp + 50: a110 movel %acc1,%acc0 + 52: a310 movel %acc3,%acc1 + 54: a510 movel %acc1,%acc2 + 56: a710 movel %acc3,%acc3 + 58: a111 movel %acc1,%acc0 + 5a: a311 movel %acc3,%acc1 + 5c: a511 movel %acc1,%acc2 + 5e: a711 movel %acc3,%acc3 + 60: a112 movel %acc1,%acc0 + 62: a312 movel %acc3,%acc1 + 64: a512 movel %acc1,%acc2 + 66: a712 movel %acc3,%acc3 + 68: a113 movel %acc1,%acc0 + 6a: a313 movel %acc3,%acc1 + 6c: a513 movel %acc1,%acc2 + 6e: a713 movel %acc3,%acc3 + 70: ab88 movel %accext23,%a0 + 72: af8f movel %accext23,%sp + 74: a180 movel %acc0,%d0 + 76: a389 movel %acc1,%a1 + 78: a582 movel %acc2,%d2 + 7a: a78b movel %acc3,%a3 + 7c: a4c9 0080 macw %a1l,%a2u,%acc0 + 80: a449 0090 macw %a1l,%a2u,%acc2 + 84: a4c9 0280 macw %a1l,%a2u,,%acc0 + 88: a449 0290 macw %a1l,%a2u,,%acc2 + 8c: a4c9 0680 macw %a1l,%a2u,,%acc0 + 90: a449 0690 macw %a1l,%a2u,,%acc2 + 94: a4c9 0280 macw %a1l,%a2u,,%acc0 + 98: a449 0290 macw %a1l,%a2u,,%acc2 + 9c: a4c9 0680 macw %a1l,%a2u,,%acc0 + a0: a449 0690 macw %a1l,%a2u,,%acc2 + a4: a689 0000 macw %a1l,%d3l,%acc0 + a8: a609 0010 macw %a1l,%d3l,%acc2 + ac: a689 0200 macw %a1l,%d3l,>>,%acc0 + b0: a609 0210 macw %a1l,%d3l,>>,%acc2 + b4: a689 0600 macw %a1l,%d3l,>>,%acc0 + b8: a609 0610 macw %a1l,%d3l,>>,%acc2 + bc: a689 0200 macw %a1l,%d3l,>>,%acc0 + c0: a609 0210 macw %a1l,%d3l,>>,%acc2 + c4: a689 0600 macw %a1l,%d3l,>>,%acc0 + c8: a609 0610 macw %a1l,%d3l,>>,%acc2 + cc: aec9 0080 macw %a1l,%spu,%acc0 + d0: ae49 0090 macw %a1l,%spu,%acc2 + d4: aec9 0280 macw %a1l,%spu,>>,%acc0 + d8: ae49 0290 macw %a1l,%spu,>>,%acc2 + dc: aec9 0680 macw %a1l,%spu,>>,%acc0 + e0: ae49 0690 macw %a1l,%spu,>>,%acc2 + e4: aec9 0280 macw %a1l,%spu,>>,%acc0 + e8: ae49 0290 macw %a1l,%spu,>>,%acc2 + ec: aec9 0680 macw %a1l,%spu,>>,%acc0 + f0: ae49 0690 macw %a1l,%spu,>>,%acc2 + f4: a289 0000 macw %a1l,%d1l,%acc0 + f8: a209 0010 macw %a1l,%d1l,%acc2 + fc: a289 0200 macw %a1l,%d1l,<<,%acc0 + 100: a209 0210 macw %a1l,%d1l,<<,%acc2 + 104: a289 0600 macw %a1l,%d1l,<<,%acc0 + 108: a209 0610 macw %a1l,%d1l,<<,%acc2 + 10c: a289 0200 macw %a1l,%d1l,<<,%acc0 + 110: a209 0210 macw %a1l,%d1l,<<,%acc2 + 114: a289 0600 macw %a1l,%d1l,<<,%acc0 + 118: a209 0610 macw %a1l,%d1l,<<,%acc2 + 11c: a4c2 00c0 macw %d2u,%a2u,%acc0 + 120: a442 00d0 macw %d2u,%a2u,%acc2 + 124: a4c2 02c0 macw %d2u,%a2u,,%acc0 + 128: a442 02d0 macw %d2u,%a2u,,%acc2 + 12c: a4c2 06c0 macw %d2u,%a2u,,%acc0 + 130: a442 06d0 macw %d2u,%a2u,,%acc2 + 134: a4c2 02c0 macw %d2u,%a2u,,%acc0 + 138: a442 02d0 macw %d2u,%a2u,,%acc2 + 13c: a4c2 06c0 macw %d2u,%a2u,,%acc0 + 140: a442 06d0 macw %d2u,%a2u,,%acc2 + 144: a682 0040 macw %d2u,%d3l,%acc0 + 148: a602 0050 macw %d2u,%d3l,%acc2 + 14c: a682 0240 macw %d2u,%d3l,>>,%acc0 + 150: a602 0250 macw %d2u,%d3l,>>,%acc2 + 154: a682 0640 macw %d2u,%d3l,>>,%acc0 + 158: a602 0650 macw %d2u,%d3l,>>,%acc2 + 15c: a682 0240 macw %d2u,%d3l,>>,%acc0 + 160: a602 0250 macw %d2u,%d3l,>>,%acc2 + 164: a682 0640 macw %d2u,%d3l,>>,%acc0 + 168: a602 0650 macw %d2u,%d3l,>>,%acc2 + 16c: aec2 00c0 macw %d2u,%spu,%acc0 + 170: ae42 00d0 macw %d2u,%spu,%acc2 + 174: aec2 02c0 macw %d2u,%spu,>>,%acc0 + 178: ae42 02d0 macw %d2u,%spu,>>,%acc2 + 17c: aec2 06c0 macw %d2u,%spu,>>,%acc0 + 180: ae42 06d0 macw %d2u,%spu,>>,%acc2 + 184: aec2 02c0 macw %d2u,%spu,>>,%acc0 + 188: ae42 02d0 macw %d2u,%spu,>>,%acc2 + 18c: aec2 06c0 macw %d2u,%spu,>>,%acc0 + 190: ae42 06d0 macw %d2u,%spu,>>,%acc2 + 194: a282 0040 macw %d2u,%d1l,%acc0 + 198: a202 0050 macw %d2u,%d1l,%acc2 + 19c: a282 0240 macw %d2u,%d1l,<<,%acc0 + 1a0: a202 0250 macw %d2u,%d1l,<<,%acc2 + 1a4: a282 0640 macw %d2u,%d1l,<<,%acc0 + 1a8: a202 0650 macw %d2u,%d1l,<<,%acc2 + 1ac: a282 0240 macw %d2u,%d1l,<<,%acc0 + 1b0: a202 0250 macw %d2u,%d1l,<<,%acc2 + 1b4: a282 0640 macw %d2u,%d1l,<<,%acc0 + 1b8: a202 0650 macw %d2u,%d1l,<<,%acc2 + 1bc: a4cd 0080 macw %a5l,%a2u,%acc0 + 1c0: a44d 0090 macw %a5l,%a2u,%acc2 + 1c4: a4cd 0280 macw %a5l,%a2u,,%acc0 + 1c8: a44d 0290 macw %a5l,%a2u,,%acc2 + 1cc: a4cd 0680 macw %a5l,%a2u,,%acc0 + 1d0: a44d 0690 macw %a5l,%a2u,,%acc2 + 1d4: a4cd 0280 macw %a5l,%a2u,,%acc0 + 1d8: a44d 0290 macw %a5l,%a2u,,%acc2 + 1dc: a4cd 0680 macw %a5l,%a2u,,%acc0 + 1e0: a44d 0690 macw %a5l,%a2u,,%acc2 + 1e4: a68d 0000 macw %a5l,%d3l,%acc0 + 1e8: a60d 0010 macw %a5l,%d3l,%acc2 + 1ec: a68d 0200 macw %a5l,%d3l,>>,%acc0 + 1f0: a60d 0210 macw %a5l,%d3l,>>,%acc2 + 1f4: a68d 0600 macw %a5l,%d3l,>>,%acc0 + 1f8: a60d 0610 macw %a5l,%d3l,>>,%acc2 + 1fc: a68d 0200 macw %a5l,%d3l,>>,%acc0 + 200: a60d 0210 macw %a5l,%d3l,>>,%acc2 + 204: a68d 0600 macw %a5l,%d3l,>>,%acc0 + 208: a60d 0610 macw %a5l,%d3l,>>,%acc2 + 20c: aecd 0080 macw %a5l,%spu,%acc0 + 210: ae4d 0090 macw %a5l,%spu,%acc2 + 214: aecd 0280 macw %a5l,%spu,>>,%acc0 + 218: ae4d 0290 macw %a5l,%spu,>>,%acc2 + 21c: aecd 0680 macw %a5l,%spu,>>,%acc0 + 220: ae4d 0690 macw %a5l,%spu,>>,%acc2 + 224: aecd 0280 macw %a5l,%spu,>>,%acc0 + 228: ae4d 0290 macw %a5l,%spu,>>,%acc2 + 22c: aecd 0680 macw %a5l,%spu,>>,%acc0 + 230: ae4d 0690 macw %a5l,%spu,>>,%acc2 + 234: a28d 0000 macw %a5l,%d1l,%acc0 + 238: a20d 0010 macw %a5l,%d1l,%acc2 + 23c: a28d 0200 macw %a5l,%d1l,<<,%acc0 + 240: a20d 0210 macw %a5l,%d1l,<<,%acc2 + 244: a28d 0600 macw %a5l,%d1l,<<,%acc0 + 248: a20d 0610 macw %a5l,%d1l,<<,%acc2 + 24c: a28d 0200 macw %a5l,%d1l,<<,%acc0 + 250: a20d 0210 macw %a5l,%d1l,<<,%acc2 + 254: a28d 0600 macw %a5l,%d1l,<<,%acc0 + 258: a20d 0610 macw %a5l,%d1l,<<,%acc2 + 25c: a4c6 00c0 macw %d6u,%a2u,%acc0 + 260: a446 00d0 macw %d6u,%a2u,%acc2 + 264: a4c6 02c0 macw %d6u,%a2u,,%acc0 + 268: a446 02d0 macw %d6u,%a2u,,%acc2 + 26c: a4c6 06c0 macw %d6u,%a2u,,%acc0 + 270: a446 06d0 macw %d6u,%a2u,,%acc2 + 274: a4c6 02c0 macw %d6u,%a2u,,%acc0 + 278: a446 02d0 macw %d6u,%a2u,,%acc2 + 27c: a4c6 06c0 macw %d6u,%a2u,,%acc0 + 280: a446 06d0 macw %d6u,%a2u,,%acc2 + 284: a686 0040 macw %d6u,%d3l,%acc0 + 288: a606 0050 macw %d6u,%d3l,%acc2 + 28c: a686 0240 macw %d6u,%d3l,>>,%acc0 + 290: a606 0250 macw %d6u,%d3l,>>,%acc2 + 294: a686 0640 macw %d6u,%d3l,>>,%acc0 + 298: a606 0650 macw %d6u,%d3l,>>,%acc2 + 29c: a686 0240 macw %d6u,%d3l,>>,%acc0 + 2a0: a606 0250 macw %d6u,%d3l,>>,%acc2 + 2a4: a686 0640 macw %d6u,%d3l,>>,%acc0 + 2a8: a606 0650 macw %d6u,%d3l,>>,%acc2 + 2ac: aec6 00c0 macw %d6u,%spu,%acc0 + 2b0: ae46 00d0 macw %d6u,%spu,%acc2 + 2b4: aec6 02c0 macw %d6u,%spu,>>,%acc0 + 2b8: ae46 02d0 macw %d6u,%spu,>>,%acc2 + 2bc: aec6 06c0 macw %d6u,%spu,>>,%acc0 + 2c0: ae46 06d0 macw %d6u,%spu,>>,%acc2 + 2c4: aec6 02c0 macw %d6u,%spu,>>,%acc0 + 2c8: ae46 02d0 macw %d6u,%spu,>>,%acc2 + 2cc: aec6 06c0 macw %d6u,%spu,>>,%acc0 + 2d0: ae46 06d0 macw %d6u,%spu,>>,%acc2 + 2d4: a286 0040 macw %d6u,%d1l,%acc0 + 2d8: a206 0050 macw %d6u,%d1l,%acc2 + 2dc: a286 0240 macw %d6u,%d1l,<<,%acc0 + 2e0: a206 0250 macw %d6u,%d1l,<<,%acc2 + 2e4: a286 0640 macw %d6u,%d1l,<<,%acc0 + 2e8: a206 0650 macw %d6u,%d1l,<<,%acc2 + 2ec: a286 0240 macw %d6u,%d1l,<<,%acc0 + 2f0: a206 0250 macw %d6u,%d1l,<<,%acc2 + 2f4: a286 0640 macw %d6u,%d1l,<<,%acc0 + 2f8: a206 0650 macw %d6u,%d1l,<<,%acc2 + 2fc: a65b 0080 macw %a3u,%a3u,%a3@\+,%a3,%acc1 + 300: a6db 0090 macw %a3u,%a3u,%a3@\+,%a3,%acc3 + 304: a65b 0080 macw %a3u,%a3u,%a3@\+,%a3,%acc1 + 308: a6db 0090 macw %a3u,%a3u,%a3@\+,%a3,%acc3 + 30c: a45b 0080 macw %a3u,%a2u,%a3@\+,%a2,%acc1 + 310: a4db 0090 macw %a3u,%a2u,%a3@\+,%a2,%acc3 + 314: ae5b 0080 macw %a3u,%spu,%a3@\+,%sp,%acc1 + 318: aedb 0090 macw %a3u,%spu,%a3@\+,%sp,%acc3 + 31c: a65b 00a0 macw %a3u,%a3u,%a3@\+&,%a3,%acc1 + 320: a6db 00b0 macw %a3u,%a3u,%a3@\+&,%a3,%acc3 + 324: a65b 00a0 macw %a3u,%a3u,%a3@\+&,%a3,%acc1 + 328: a6db 00b0 macw %a3u,%a3u,%a3@\+&,%a3,%acc3 + 32c: a45b 00a0 macw %a3u,%a2u,%a3@\+&,%a2,%acc1 + 330: a4db 00b0 macw %a3u,%a2u,%a3@\+&,%a2,%acc3 + 334: ae5b 00a0 macw %a3u,%spu,%a3@\+&,%sp,%acc1 + 338: aedb 00b0 macw %a3u,%spu,%a3@\+&,%sp,%acc3 + 33c: a65b 0080 macw %a3u,%a3u,%a3@\+,%a3,%acc1 + 340: a6db 0090 macw %a3u,%a3u,%a3@\+,%a3,%acc3 + 344: a65b 0080 macw %a3u,%a3u,%a3@\+,%a3,%acc1 + 348: a6db 0090 macw %a3u,%a3u,%a3@\+,%a3,%acc3 + 34c: a45b 0080 macw %a3u,%a2u,%a3@\+,%a2,%acc1 + 350: a4db 0090 macw %a3u,%a2u,%a3@\+,%a2,%acc3 + 354: ae5b 0080 macw %a3u,%spu,%a3@\+,%sp,%acc1 + 358: aedb 0090 macw %a3u,%spu,%a3@\+,%sp,%acc3 + 35c: a65b 00a0 macw %a3u,%a3u,%a3@\+&,%a3,%acc1 + 360: a6db 00b0 macw %a3u,%a3u,%a3@\+&,%a3,%acc3 + 364: a65b 00a0 macw %a3u,%a3u,%a3@\+&,%a3,%acc1 + 368: a6db 00b0 macw %a3u,%a3u,%a3@\+&,%a3,%acc3 + 36c: a45b 00a0 macw %a3u,%a2u,%a3@\+&,%a2,%acc1 + 370: a4db 00b0 macw %a3u,%a2u,%a3@\+&,%a2,%acc3 + 374: ae5b 00a0 macw %a3u,%spu,%a3@\+&,%sp,%acc1 + 378: aedb 00b0 macw %a3u,%spu,%a3@\+&,%sp,%acc3 + 37c: a66f 0080 000a macw %spl,%a3u,%sp@\(10\),%a3,%acc1 + 382: a6ef 0090 000a macw %spl,%a3u,%sp@\(10\),%a3,%acc3 + 388: a66f 0080 000a macw %spl,%a3u,%sp@\(10\),%a3,%acc1 + 38e: a6ef 0090 000a macw %spl,%a3u,%sp@\(10\),%a3,%acc3 + 394: a46f 0080 000a macw %spl,%a2u,%sp@\(10\),%a2,%acc1 + 39a: a4ef 0090 000a macw %spl,%a2u,%sp@\(10\),%a2,%acc3 + 3a0: ae6f 0080 000a macw %spl,%spu,%sp@\(10\),%sp,%acc1 + 3a6: aeef 0090 000a macw %spl,%spu,%sp@\(10\),%sp,%acc3 + 3ac: a66f 00a0 000a macw %spl,%a3u,%sp@\(10\)&,%a3,%acc1 + 3b2: a6ef 00b0 000a macw %spl,%a3u,%sp@\(10\)&,%a3,%acc3 + 3b8: a66f 00a0 000a macw %spl,%a3u,%sp@\(10\)&,%a3,%acc1 + 3be: a6ef 00b0 000a macw %spl,%a3u,%sp@\(10\)&,%a3,%acc3 + 3c4: a46f 00a0 000a macw %spl,%a2u,%sp@\(10\)&,%a2,%acc1 + 3ca: a4ef 00b0 000a macw %spl,%a2u,%sp@\(10\)&,%a2,%acc3 + 3d0: ae6f 00a0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc1 + 3d6: aeef 00b0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc3 + 3dc: a669 0080 a6e9 macw %a1l,%a3u,%a1@\(-22807\),%a3,%acc1 + 3e2: 0090 a669 0080 oril #-1503068032,%d0 + 3e8: a6e9 0090 a469 macw %a1l,%a3u,%a1@\(-23447\),%a3,%acc3 + 3ee: 0080 a4e9 0090 oril #-1528233840,%d0 + 3f4: ae69 0080 aee9 macw %a1l,%spu,%a1@\(-20759\),%sp,%acc1 + 3fa: 0090 a669 00a0 oril #-1503068000,%d0 + 400: a6e9 00b0 a669 macw %a1l,%a3u,%a1@\(-22935\)&,%a3,%acc3 + 406: 00a0 a6e9 00b0 oril #-1494679376,%d0 + 40c: a469 00a0 a4e9 macw %a1l,%a2u,%a1@\(-23319\)&,%a2,%acc1 + 412: 00b0 ae69 00a0 oril #-1368850272,%d0 + 418: aee9 00b0 a65b macw %a1l,%spu,%a1@\(-22949\)&,%sp,%acc3 + 41e: 0280 a6db 0290 andil #-1495596400,%d0 + 424: a65b 0280 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc1 + 428: a6db 0290 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc3 + 42c: a45b 0280 macw %a3u,%a2u,,%a3@\+,%a2,%acc1 + 430: a4db 0290 macw %a3u,%a2u,,%a3@\+,%a2,%acc3 + 434: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 438: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 43c: a65b 02a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 440: a6db 02b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 444: a65b 02a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 448: a6db 02b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 44c: a45b 02a0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc1 + 450: a4db 02b0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc3 + 454: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 458: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 45c: a65b 0280 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc1 + 460: a6db 0290 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc3 + 464: a65b 0280 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc1 + 468: a6db 0290 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc3 + 46c: a45b 0280 macw %a3u,%a2u,,%a3@\+,%a2,%acc1 + 470: a4db 0290 macw %a3u,%a2u,,%a3@\+,%a2,%acc3 + 474: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 478: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 47c: a65b 02a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 480: a6db 02b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 484: a65b 02a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 488: a6db 02b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 48c: a45b 02a0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc1 + 490: a4db 02b0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc3 + 494: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 498: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 49c: a66f 0280 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 4a2: a6ef 0290 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 4a8: a66f 0280 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 4ae: a6ef 0290 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 4b4: a46f 0280 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc1 + 4ba: a4ef 0290 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc3 + 4c0: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 4c6: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 4cc: a66f 02a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 4d2: a6ef 02b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 4d8: a66f 02a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 4de: a6ef 02b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 4e4: a46f 02a0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc1 + 4ea: a4ef 02b0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc3 + 4f0: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 4f6: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 4fc: a669 0280 a6e9 macw %a1l,%a3u,>>,%a1@\(-22807\),%a3,%acc1 + 502: 0290 a669 0280 andil #-1503067520,%d0 + 508: a6e9 0290 a469 macw %a1l,%a3u,>>,%a1@\(-23447\),%a3,%acc3 + 50e: 0280 a4e9 0290 andil #-1528233328,%d0 + 514: ae69 0280 aee9 macw %a1l,%spu,>>,%a1@\(-20759\),%sp,%acc1 + 51a: 0290 a669 02a0 andil #-1503067488,%d0 + 520: a6e9 02b0 a669 macw %a1l,%a3u,>>,%a1@\(-22935\)&,%a3,%acc3 + 526: 02a0 a6e9 02b0 andil #-1494678864,%d0 + 52c: a469 02a0 a4e9 macw %a1l,%a2u,,%a1@\(-23319\)&,%a2,%acc1 + 532: 02b0 ae69 02a0 andil #-1368849760,%d0 + 538: aee9 02b0 a65b macw %a1l,%spu,>>,%a1@\(-22949\)&,%sp,%acc3 + 53e: 0680 a6db 0690 addil #-1495595376,%d0 + 544: a65b 0680 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc1 + 548: a6db 0690 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc3 + 54c: a45b 0680 macw %a3u,%a2u,,%a3@\+,%a2,%acc1 + 550: a4db 0690 macw %a3u,%a2u,,%a3@\+,%a2,%acc3 + 554: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 558: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 55c: a65b 06a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 560: a6db 06b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 564: a65b 06a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 568: a6db 06b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 56c: a45b 06a0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc1 + 570: a4db 06b0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc3 + 574: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 578: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 57c: a65b 0680 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc1 + 580: a6db 0690 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc3 + 584: a65b 0680 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc1 + 588: a6db 0690 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc3 + 58c: a45b 0680 macw %a3u,%a2u,,%a3@\+,%a2,%acc1 + 590: a4db 0690 macw %a3u,%a2u,,%a3@\+,%a2,%acc3 + 594: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 598: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 59c: a65b 06a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 5a0: a6db 06b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 5a4: a65b 06a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 5a8: a6db 06b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 5ac: a45b 06a0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc1 + 5b0: a4db 06b0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc3 + 5b4: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 5b8: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 5bc: a66f 0680 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 5c2: a6ef 0690 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 5c8: a66f 0680 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 5ce: a6ef 0690 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 5d4: a46f 0680 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc1 + 5da: a4ef 0690 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc3 + 5e0: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 5e6: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 5ec: a66f 06a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 5f2: a6ef 06b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 5f8: a66f 06a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 5fe: a6ef 06b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 604: a46f 06a0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc1 + 60a: a4ef 06b0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc3 + 610: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 616: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 61c: a669 0680 a6e9 macw %a1l,%a3u,>>,%a1@\(-22807\),%a3,%acc1 + 622: 0690 a669 0680 addil #-1503066496,%d0 + 628: a6e9 0690 a469 macw %a1l,%a3u,>>,%a1@\(-23447\),%a3,%acc3 + 62e: 0680 a4e9 0690 addil #-1528232304,%d0 + 634: ae69 0680 aee9 macw %a1l,%spu,>>,%a1@\(-20759\),%sp,%acc1 + 63a: 0690 a669 06a0 addil #-1503066464,%d0 + 640: a6e9 06b0 a669 macw %a1l,%a3u,>>,%a1@\(-22935\)&,%a3,%acc3 + 646: 06a0 a6e9 06b0 addil #-1494677840,%d0 + 64c: a469 06a0 a4e9 macw %a1l,%a2u,,%a1@\(-23319\)&,%a2,%acc1 + 652: 06b0 ae69 06a0 addil #-1368848736,%d0 + 658: aee9 06b0 a65b macw %a1l,%spu,>>,%a1@\(-22949\)&,%sp,%acc3 + 65e: 0280 a6db 0290 andil #-1495596400,%d0 + 664: a65b 0280 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc1 + 668: a6db 0290 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc3 + 66c: a45b 0280 macw %a3u,%a2u,,%a3@\+,%a2,%acc1 + 670: a4db 0290 macw %a3u,%a2u,,%a3@\+,%a2,%acc3 + 674: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 678: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 67c: a65b 02a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 680: a6db 02b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 684: a65b 02a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 688: a6db 02b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 68c: a45b 02a0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc1 + 690: a4db 02b0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc3 + 694: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 698: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 69c: a65b 0280 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc1 + 6a0: a6db 0290 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc3 + 6a4: a65b 0280 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc1 + 6a8: a6db 0290 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc3 + 6ac: a45b 0280 macw %a3u,%a2u,,%a3@\+,%a2,%acc1 + 6b0: a4db 0290 macw %a3u,%a2u,,%a3@\+,%a2,%acc3 + 6b4: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 6b8: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 6bc: a65b 02a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 6c0: a6db 02b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 6c4: a65b 02a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 6c8: a6db 02b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 6cc: a45b 02a0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc1 + 6d0: a4db 02b0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc3 + 6d4: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 6d8: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 6dc: a66f 0280 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 6e2: a6ef 0290 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 6e8: a66f 0280 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 6ee: a6ef 0290 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 6f4: a46f 0280 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc1 + 6fa: a4ef 0290 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc3 + 700: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 706: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 70c: a66f 02a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 712: a6ef 02b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 718: a66f 02a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 71e: a6ef 02b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 724: a46f 02a0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc1 + 72a: a4ef 02b0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc3 + 730: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 736: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 73c: a669 0280 a6e9 macw %a1l,%a3u,>>,%a1@\(-22807\),%a3,%acc1 + 742: 0290 a669 0280 andil #-1503067520,%d0 + 748: a6e9 0290 a469 macw %a1l,%a3u,>>,%a1@\(-23447\),%a3,%acc3 + 74e: 0280 a4e9 0290 andil #-1528233328,%d0 + 754: ae69 0280 aee9 macw %a1l,%spu,>>,%a1@\(-20759\),%sp,%acc1 + 75a: 0290 a669 02a0 andil #-1503067488,%d0 + 760: a6e9 02b0 a669 macw %a1l,%a3u,>>,%a1@\(-22935\)&,%a3,%acc3 + 766: 02a0 a6e9 02b0 andil #-1494678864,%d0 + 76c: a469 02a0 a4e9 macw %a1l,%a2u,,%a1@\(-23319\)&,%a2,%acc1 + 772: 02b0 ae69 02a0 andil #-1368849760,%d0 + 778: aee9 02b0 a65b macw %a1l,%spu,>>,%a1@\(-22949\)&,%sp,%acc3 + 77e: 0680 a6db 0690 addil #-1495595376,%d0 + 784: a65b 0680 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc1 + 788: a6db 0690 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc3 + 78c: a45b 0680 macw %a3u,%a2u,,%a3@\+,%a2,%acc1 + 790: a4db 0690 macw %a3u,%a2u,,%a3@\+,%a2,%acc3 + 794: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 798: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 79c: a65b 06a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 7a0: a6db 06b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 7a4: a65b 06a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 7a8: a6db 06b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 7ac: a45b 06a0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc1 + 7b0: a4db 06b0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc3 + 7b4: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 7b8: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 7bc: a65b 0680 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc1 + 7c0: a6db 0690 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc3 + 7c4: a65b 0680 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc1 + 7c8: a6db 0690 macw %a3u,%a3u,>>,%a3@\+,%a3,%acc3 + 7cc: a45b 0680 macw %a3u,%a2u,,%a3@\+,%a2,%acc1 + 7d0: a4db 0690 macw %a3u,%a2u,,%a3@\+,%a2,%acc3 + 7d4: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 7d8: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 7dc: a65b 06a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 7e0: a6db 06b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 7e4: a65b 06a0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc1 + 7e8: a6db 06b0 macw %a3u,%a3u,>>,%a3@\+&,%a3,%acc3 + 7ec: a45b 06a0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc1 + 7f0: a4db 06b0 macw %a3u,%a2u,,%a3@\+&,%a2,%acc3 + 7f4: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 7f8: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 7fc: a66f 0680 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 802: a6ef 0690 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 808: a66f 0680 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 80e: a6ef 0690 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 814: a46f 0680 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc1 + 81a: a4ef 0690 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc3 + 820: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 826: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 82c: a66f 06a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 832: a6ef 06b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 838: a66f 06a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 83e: a6ef 06b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 844: a46f 06a0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc1 + 84a: a4ef 06b0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc3 + 850: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 856: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 85c: a669 0680 a6e9 macw %a1l,%a3u,>>,%a1@\(-22807\),%a3,%acc1 + 862: 0690 a669 0680 addil #-1503066496,%d0 + 868: a6e9 0690 a469 macw %a1l,%a3u,>>,%a1@\(-23447\),%a3,%acc3 + 86e: 0680 a4e9 0690 addil #-1528232304,%d0 + 874: ae69 0680 aee9 macw %a1l,%spu,>>,%a1@\(-20759\),%sp,%acc1 + 87a: 0690 a669 06a0 addil #-1503066464,%d0 + 880: a6e9 06b0 a669 macw %a1l,%a3u,>>,%a1@\(-22935\)&,%a3,%acc3 + 886: 06a0 a6e9 06b0 addil #-1494677840,%d0 + 88c: a469 06a0 a4e9 macw %a1l,%a2u,,%a1@\(-23319\)&,%a2,%acc1 + 892: 06b0 ae69 06a0 addil #-1368848736,%d0 + 898: aee9 06b0 a61b macw %a1l,%spu,>>,%a1@\(-23013\)&,%sp,%acc3 + 89e: 0000 00 + 8a0: a69b 0010 macw %a3u,%d3l,%a3@\+,%d3,%acc3 + 8a4: a65b 0000 macw %a3u,%a3l,%a3@\+,%a3,%acc1 + 8a8: a6db 0010 macw %a3u,%a3l,%a3@\+,%a3,%acc3 + 8ac: a61b 0000 macw %a3u,%d3l,%a3@\+,%d3,%acc1 + 8b0: a69b 0010 macw %a3u,%d3l,%a3@\+,%d3,%acc3 + 8b4: ae5b 0000 macw %a3u,%spl,%a3@\+,%sp,%acc1 + 8b8: aedb 0010 macw %a3u,%spl,%a3@\+,%sp,%acc3 + 8bc: a61b 0020 macw %a3u,%d3l,%a3@\+&,%d3,%acc1 + 8c0: a69b 0030 macw %a3u,%d3l,%a3@\+&,%d3,%acc3 + 8c4: a65b 0020 macw %a3u,%a3l,%a3@\+&,%a3,%acc1 + 8c8: a6db 0030 macw %a3u,%a3l,%a3@\+&,%a3,%acc3 + 8cc: a61b 0020 macw %a3u,%d3l,%a3@\+&,%d3,%acc1 + 8d0: a69b 0030 macw %a3u,%d3l,%a3@\+&,%d3,%acc3 + 8d4: ae5b 0020 macw %a3u,%spl,%a3@\+&,%sp,%acc1 + 8d8: aedb 0030 macw %a3u,%spl,%a3@\+&,%sp,%acc3 + 8dc: a61b 0000 macw %a3u,%d3l,%a3@\+,%d3,%acc1 + 8e0: a69b 0010 macw %a3u,%d3l,%a3@\+,%d3,%acc3 + 8e4: a65b 0000 macw %a3u,%a3l,%a3@\+,%a3,%acc1 + 8e8: a6db 0010 macw %a3u,%a3l,%a3@\+,%a3,%acc3 + 8ec: a61b 0000 macw %a3u,%d3l,%a3@\+,%d3,%acc1 + 8f0: a69b 0010 macw %a3u,%d3l,%a3@\+,%d3,%acc3 + 8f4: ae5b 0000 macw %a3u,%spl,%a3@\+,%sp,%acc1 + 8f8: aedb 0010 macw %a3u,%spl,%a3@\+,%sp,%acc3 + 8fc: a61b 0020 macw %a3u,%d3l,%a3@\+&,%d3,%acc1 + 900: a69b 0030 macw %a3u,%d3l,%a3@\+&,%d3,%acc3 + 904: a65b 0020 macw %a3u,%a3l,%a3@\+&,%a3,%acc1 + 908: a6db 0030 macw %a3u,%a3l,%a3@\+&,%a3,%acc3 + 90c: a61b 0020 macw %a3u,%d3l,%a3@\+&,%d3,%acc1 + 910: a69b 0030 macw %a3u,%d3l,%a3@\+&,%d3,%acc3 + 914: ae5b 0020 macw %a3u,%spl,%a3@\+&,%sp,%acc1 + 918: aedb 0030 macw %a3u,%spl,%a3@\+&,%sp,%acc3 + 91c: a62f 0000 000a macw %spl,%d3l,%sp@\(10\),%d3,%acc1 + 922: a6af 0010 000a macw %spl,%d3l,%sp@\(10\),%d3,%acc3 + 928: a66f 0000 000a macw %spl,%a3l,%sp@\(10\),%a3,%acc1 + 92e: a6ef 0010 000a macw %spl,%a3l,%sp@\(10\),%a3,%acc3 + 934: a62f 0000 000a macw %spl,%d3l,%sp@\(10\),%d3,%acc1 + 93a: a6af 0010 000a macw %spl,%d3l,%sp@\(10\),%d3,%acc3 + 940: ae6f 0000 000a macw %spl,%spl,%sp@\(10\),%sp,%acc1 + 946: aeef 0010 000a macw %spl,%spl,%sp@\(10\),%sp,%acc3 + 94c: a62f 0020 000a macw %spl,%d3l,%sp@\(10\)&,%d3,%acc1 + 952: a6af 0030 000a macw %spl,%d3l,%sp@\(10\)&,%d3,%acc3 + 958: a66f 0020 000a macw %spl,%a3l,%sp@\(10\)&,%a3,%acc1 + 95e: a6ef 0030 000a macw %spl,%a3l,%sp@\(10\)&,%a3,%acc3 + 964: a62f 0020 000a macw %spl,%d3l,%sp@\(10\)&,%d3,%acc1 + 96a: a6af 0030 000a macw %spl,%d3l,%sp@\(10\)&,%d3,%acc3 + 970: ae6f 0020 000a macw %spl,%spl,%sp@\(10\)&,%sp,%acc1 + 976: aeef 0030 000a macw %spl,%spl,%sp@\(10\)&,%sp,%acc3 + 97c: a629 0000 a6a9 macw %a1l,%d3l,%a1@\(-22871\),%d3,%acc1 + 982: 0010 020 + 984: a669 0000 a6e9 macw %a1l,%a3l,%a1@\(-22807\),%a3,%acc1 + 98a: 0010 020 + 98c: a629 0000 a6a9 macw %a1l,%d3l,%a1@\(-22871\),%d3,%acc1 + 992: 0010 020 + 994: ae69 0000 aee9 macw %a1l,%spl,%a1@\(-20759\),%sp,%acc1 + 99a: 0010 020 + 99c: a629 0020 a6a9 macw %a1l,%d3l,%a1@\(-22871\)&,%d3,%acc1 + 9a2: 0030 060 + 9a4: a669 0020 a6e9 macw %a1l,%a3l,%a1@\(-22807\)&,%a3,%acc1 + 9aa: 0030 060 + 9ac: a629 0020 a6a9 macw %a1l,%d3l,%a1@\(-22871\)&,%d3,%acc1 + 9b2: 0030 060 + 9b4: ae69 0020 aee9 macw %a1l,%spl,%a1@\(-20759\)&,%sp,%acc1 + 9ba: 0030 060 + 9bc: a61b 0200 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + 9c0: a69b 0210 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + 9c4: a65b 0200 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + 9c8: a6db 0210 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + 9cc: a61b 0200 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + 9d0: a69b 0210 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + 9d4: ae5b 0200 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + 9d8: aedb 0210 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + 9dc: a61b 0220 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + 9e0: a69b 0230 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + 9e4: a65b 0220 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + 9e8: a6db 0230 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + 9ec: a61b 0220 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + 9f0: a69b 0230 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + 9f4: ae5b 0220 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + 9f8: aedb 0230 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + 9fc: a61b 0200 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + a00: a69b 0210 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + a04: a65b 0200 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + a08: a6db 0210 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + a0c: a61b 0200 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + a10: a69b 0210 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + a14: ae5b 0200 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + a18: aedb 0210 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + a1c: a61b 0220 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + a20: a69b 0230 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + a24: a65b 0220 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + a28: a6db 0230 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + a2c: a61b 0220 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + a30: a69b 0230 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + a34: ae5b 0220 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + a38: aedb 0230 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + a3c: a62f 0200 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + a42: a6af 0210 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + a48: a66f 0200 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + a4e: a6ef 0210 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + a54: a62f 0200 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + a5a: a6af 0210 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + a60: ae6f 0200 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + a66: aeef 0210 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + a6c: a62f 0220 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + a72: a6af 0230 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + a78: a66f 0220 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + a7e: a6ef 0230 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + a84: a62f 0220 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + a8a: a6af 0230 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + a90: ae6f 0220 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + a96: aeef 0230 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + a9c: a629 0200 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\),%d3,%acc1 + aa2: 0210 01020 + aa4: a669 0200 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\),%a3,%acc1 + aaa: 0210 01020 + aac: a629 0200 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\),%d3,%acc1 + ab2: 0210 01020 + ab4: ae69 0200 aee9 macw %a1l,%spl,>>,%a1@\(-20759\),%sp,%acc1 + aba: 0210 01020 + abc: a629 0220 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\)&,%d3,%acc1 + ac2: 0230 01060 + ac4: a669 0220 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\)&,%a3,%acc1 + aca: 0230 01060 + acc: a629 0220 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\)&,%d3,%acc1 + ad2: 0230 01060 + ad4: ae69 0220 aee9 macw %a1l,%spl,>>,%a1@\(-20759\)&,%sp,%acc1 + ada: 0230 01060 + adc: a61b 0600 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + ae0: a69b 0610 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + ae4: a65b 0600 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + ae8: a6db 0610 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + aec: a61b 0600 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + af0: a69b 0610 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + af4: ae5b 0600 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + af8: aedb 0610 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + afc: a61b 0620 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + b00: a69b 0630 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + b04: a65b 0620 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + b08: a6db 0630 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + b0c: a61b 0620 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + b10: a69b 0630 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + b14: ae5b 0620 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + b18: aedb 0630 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + b1c: a61b 0600 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + b20: a69b 0610 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + b24: a65b 0600 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + b28: a6db 0610 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + b2c: a61b 0600 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + b30: a69b 0610 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + b34: ae5b 0600 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + b38: aedb 0610 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + b3c: a61b 0620 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + b40: a69b 0630 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + b44: a65b 0620 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + b48: a6db 0630 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + b4c: a61b 0620 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + b50: a69b 0630 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + b54: ae5b 0620 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + b58: aedb 0630 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + b5c: a62f 0600 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + b62: a6af 0610 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + b68: a66f 0600 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + b6e: a6ef 0610 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + b74: a62f 0600 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + b7a: a6af 0610 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + b80: ae6f 0600 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + b86: aeef 0610 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + b8c: a62f 0620 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + b92: a6af 0630 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + b98: a66f 0620 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + b9e: a6ef 0630 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + ba4: a62f 0620 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + baa: a6af 0630 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + bb0: ae6f 0620 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + bb6: aeef 0630 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + bbc: a629 0600 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\),%d3,%acc1 + bc2: 0610 03020 + bc4: a669 0600 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\),%a3,%acc1 + bca: 0610 03020 + bcc: a629 0600 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\),%d3,%acc1 + bd2: 0610 03020 + bd4: ae69 0600 aee9 macw %a1l,%spl,>>,%a1@\(-20759\),%sp,%acc1 + bda: 0610 03020 + bdc: a629 0620 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\)&,%d3,%acc1 + be2: 0630 03060 + be4: a669 0620 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\)&,%a3,%acc1 + bea: 0630 03060 + bec: a629 0620 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\)&,%d3,%acc1 + bf2: 0630 03060 + bf4: ae69 0620 aee9 macw %a1l,%spl,>>,%a1@\(-20759\)&,%sp,%acc1 + bfa: 0630 03060 + bfc: a61b 0200 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + c00: a69b 0210 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + c04: a65b 0200 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + c08: a6db 0210 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + c0c: a61b 0200 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + c10: a69b 0210 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + c14: ae5b 0200 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + c18: aedb 0210 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + c1c: a61b 0220 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + c20: a69b 0230 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + c24: a65b 0220 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + c28: a6db 0230 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + c2c: a61b 0220 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + c30: a69b 0230 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + c34: ae5b 0220 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + c38: aedb 0230 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + c3c: a61b 0200 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + c40: a69b 0210 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + c44: a65b 0200 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + c48: a6db 0210 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + c4c: a61b 0200 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + c50: a69b 0210 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + c54: ae5b 0200 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + c58: aedb 0210 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + c5c: a61b 0220 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + c60: a69b 0230 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + c64: a65b 0220 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + c68: a6db 0230 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + c6c: a61b 0220 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + c70: a69b 0230 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + c74: ae5b 0220 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + c78: aedb 0230 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + c7c: a62f 0200 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + c82: a6af 0210 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + c88: a66f 0200 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + c8e: a6ef 0210 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + c94: a62f 0200 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + c9a: a6af 0210 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + ca0: ae6f 0200 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + ca6: aeef 0210 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + cac: a62f 0220 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + cb2: a6af 0230 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + cb8: a66f 0220 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + cbe: a6ef 0230 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + cc4: a62f 0220 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + cca: a6af 0230 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + cd0: ae6f 0220 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + cd6: aeef 0230 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + cdc: a629 0200 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\),%d3,%acc1 + ce2: 0210 01020 + ce4: a669 0200 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\),%a3,%acc1 + cea: 0210 01020 + cec: a629 0200 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\),%d3,%acc1 + cf2: 0210 01020 + cf4: ae69 0200 aee9 macw %a1l,%spl,>>,%a1@\(-20759\),%sp,%acc1 + cfa: 0210 01020 + cfc: a629 0220 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\)&,%d3,%acc1 + d02: 0230 01060 + d04: a669 0220 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\)&,%a3,%acc1 + d0a: 0230 01060 + d0c: a629 0220 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\)&,%d3,%acc1 + d12: 0230 01060 + d14: ae69 0220 aee9 macw %a1l,%spl,>>,%a1@\(-20759\)&,%sp,%acc1 + d1a: 0230 01060 + d1c: a61b 0600 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + d20: a69b 0610 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + d24: a65b 0600 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + d28: a6db 0610 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + d2c: a61b 0600 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + d30: a69b 0610 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + d34: ae5b 0600 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + d38: aedb 0610 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + d3c: a61b 0620 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + d40: a69b 0630 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + d44: a65b 0620 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + d48: a6db 0630 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + d4c: a61b 0620 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + d50: a69b 0630 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + d54: ae5b 0620 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + d58: aedb 0630 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + d5c: a61b 0600 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + d60: a69b 0610 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + d64: a65b 0600 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + d68: a6db 0610 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + d6c: a61b 0600 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + d70: a69b 0610 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + d74: ae5b 0600 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + d78: aedb 0610 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + d7c: a61b 0620 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + d80: a69b 0630 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + d84: a65b 0620 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + d88: a6db 0630 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + d8c: a61b 0620 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + d90: a69b 0630 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + d94: ae5b 0620 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + d98: aedb 0630 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + d9c: a62f 0600 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + da2: a6af 0610 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + da8: a66f 0600 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + dae: a6ef 0610 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + db4: a62f 0600 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + dba: a6af 0610 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + dc0: ae6f 0600 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + dc6: aeef 0610 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + dcc: a62f 0620 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + dd2: a6af 0630 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + dd8: a66f 0620 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + dde: a6ef 0630 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + de4: a62f 0620 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + dea: a6af 0630 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + df0: ae6f 0620 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + df6: aeef 0630 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + dfc: a629 0600 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\),%d3,%acc1 + e02: 0610 03020 + e04: a669 0600 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\),%a3,%acc1 + e0a: 0610 03020 + e0c: a629 0600 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\),%d3,%acc1 + e12: 0610 03020 + e14: ae69 0600 aee9 macw %a1l,%spl,>>,%a1@\(-20759\),%sp,%acc1 + e1a: 0610 03020 + e1c: a629 0620 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\)&,%d3,%acc1 + e22: 0630 03060 + e24: a669 0620 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\)&,%a3,%acc1 + e2a: 0630 03060 + e2c: a629 0620 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\)&,%d3,%acc1 + e32: 0630 03060 + e34: ae69 0620 aee9 macw %a1l,%spl,>>,%a1@\(-20759\)&,%sp,%acc1 + e3a: 0630 03060 + e3c: ae5b 0080 macw %a3u,%spu,%a3@\+,%sp,%acc1 + e40: aedb 0090 macw %a3u,%spu,%a3@\+,%sp,%acc3 + e44: ae5b 0080 macw %a3u,%spu,%a3@\+,%sp,%acc1 + e48: aedb 0090 macw %a3u,%spu,%a3@\+,%sp,%acc3 + e4c: ae5b 0080 macw %a3u,%spu,%a3@\+,%sp,%acc1 + e50: aedb 0090 macw %a3u,%spu,%a3@\+,%sp,%acc3 + e54: ae5b 0080 macw %a3u,%spu,%a3@\+,%sp,%acc1 + e58: aedb 0090 macw %a3u,%spu,%a3@\+,%sp,%acc3 + e5c: ae5b 00a0 macw %a3u,%spu,%a3@\+&,%sp,%acc1 + e60: aedb 00b0 macw %a3u,%spu,%a3@\+&,%sp,%acc3 + e64: ae5b 00a0 macw %a3u,%spu,%a3@\+&,%sp,%acc1 + e68: aedb 00b0 macw %a3u,%spu,%a3@\+&,%sp,%acc3 + e6c: ae5b 00a0 macw %a3u,%spu,%a3@\+&,%sp,%acc1 + e70: aedb 00b0 macw %a3u,%spu,%a3@\+&,%sp,%acc3 + e74: ae5b 00a0 macw %a3u,%spu,%a3@\+&,%sp,%acc1 + e78: aedb 00b0 macw %a3u,%spu,%a3@\+&,%sp,%acc3 + e7c: ae5b 0080 macw %a3u,%spu,%a3@\+,%sp,%acc1 + e80: aedb 0090 macw %a3u,%spu,%a3@\+,%sp,%acc3 + e84: ae5b 0080 macw %a3u,%spu,%a3@\+,%sp,%acc1 + e88: aedb 0090 macw %a3u,%spu,%a3@\+,%sp,%acc3 + e8c: ae5b 0080 macw %a3u,%spu,%a3@\+,%sp,%acc1 + e90: aedb 0090 macw %a3u,%spu,%a3@\+,%sp,%acc3 + e94: ae5b 0080 macw %a3u,%spu,%a3@\+,%sp,%acc1 + e98: aedb 0090 macw %a3u,%spu,%a3@\+,%sp,%acc3 + e9c: ae5b 00a0 macw %a3u,%spu,%a3@\+&,%sp,%acc1 + ea0: aedb 00b0 macw %a3u,%spu,%a3@\+&,%sp,%acc3 + ea4: ae5b 00a0 macw %a3u,%spu,%a3@\+&,%sp,%acc1 + ea8: aedb 00b0 macw %a3u,%spu,%a3@\+&,%sp,%acc3 + eac: ae5b 00a0 macw %a3u,%spu,%a3@\+&,%sp,%acc1 + eb0: aedb 00b0 macw %a3u,%spu,%a3@\+&,%sp,%acc3 + eb4: ae5b 00a0 macw %a3u,%spu,%a3@\+&,%sp,%acc1 + eb8: aedb 00b0 macw %a3u,%spu,%a3@\+&,%sp,%acc3 + ebc: ae6f 0080 000a macw %spl,%spu,%sp@\(10\),%sp,%acc1 + ec2: aeef 0090 000a macw %spl,%spu,%sp@\(10\),%sp,%acc3 + ec8: ae6f 0080 000a macw %spl,%spu,%sp@\(10\),%sp,%acc1 + ece: aeef 0090 000a macw %spl,%spu,%sp@\(10\),%sp,%acc3 + ed4: ae6f 0080 000a macw %spl,%spu,%sp@\(10\),%sp,%acc1 + eda: aeef 0090 000a macw %spl,%spu,%sp@\(10\),%sp,%acc3 + ee0: ae6f 0080 000a macw %spl,%spu,%sp@\(10\),%sp,%acc1 + ee6: aeef 0090 000a macw %spl,%spu,%sp@\(10\),%sp,%acc3 + eec: ae6f 00a0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc1 + ef2: aeef 00b0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc3 + ef8: ae6f 00a0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc1 + efe: aeef 00b0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc3 + f04: ae6f 00a0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc1 + f0a: aeef 00b0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc3 + f10: ae6f 00a0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc1 + f16: aeef 00b0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc3 + f1c: ae69 0080 aee9 macw %a1l,%spu,%a1@\(-20759\),%sp,%acc1 + f22: 0090 ae69 0080 oril #-1368850304,%d0 + f28: aee9 0090 ae69 macw %a1l,%spu,%a1@\(-20887\),%sp,%acc3 + f2e: 0080 aee9 0090 oril #-1360461680,%d0 + f34: ae69 0080 aee9 macw %a1l,%spu,%a1@\(-20759\),%sp,%acc1 + f3a: 0090 ae69 00a0 oril #-1368850272,%d0 + f40: aee9 00b0 ae69 macw %a1l,%spu,%a1@\(-20887\)&,%sp,%acc3 + f46: 00a0 aee9 00b0 oril #-1360461648,%d0 + f4c: ae69 00a0 aee9 macw %a1l,%spu,%a1@\(-20759\)&,%sp,%acc1 + f52: 00b0 ae69 00a0 oril #-1368850272,%d0 + f58: aee9 00b0 ae5b macw %a1l,%spu,%a1@\(-20901\)&,%sp,%acc3 + f5e: 0280 aedb 0290 andil #-1361378672,%d0 + f64: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + f68: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + f6c: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + f70: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + f74: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + f78: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + f7c: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + f80: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + f84: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + f88: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + f8c: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + f90: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + f94: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + f98: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + f9c: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + fa0: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + fa4: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + fa8: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + fac: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + fb0: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + fb4: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + fb8: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + fbc: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + fc0: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + fc4: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + fc8: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + fcc: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + fd0: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + fd4: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + fd8: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + fdc: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + fe2: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + fe8: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + fee: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + ff4: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + ffa: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 1000: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 1006: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 100c: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 1012: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 1018: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 101e: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 1024: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 102a: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 1030: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 1036: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 103c: ae69 0280 aee9 macw %a1l,%spu,>>,%a1@\(-20759\),%sp,%acc1 + 1042: 0290 ae69 0280 andil #-1368849792,%d0 + 1048: aee9 0290 ae69 macw %a1l,%spu,>>,%a1@\(-20887\),%sp,%acc3 + 104e: 0280 aee9 0290 andil #-1360461168,%d0 + 1054: ae69 0280 aee9 macw %a1l,%spu,>>,%a1@\(-20759\),%sp,%acc1 + 105a: 0290 ae69 02a0 andil #-1368849760,%d0 + 1060: aee9 02b0 ae69 macw %a1l,%spu,>>,%a1@\(-20887\)&,%sp,%acc3 + 1066: 02a0 aee9 02b0 andil #-1360461136,%d0 + 106c: ae69 02a0 aee9 macw %a1l,%spu,>>,%a1@\(-20759\)&,%sp,%acc1 + 1072: 02b0 ae69 02a0 andil #-1368849760,%d0 + 1078: aee9 02b0 ae5b macw %a1l,%spu,>>,%a1@\(-20901\)&,%sp,%acc3 + 107e: 0680 aedb 0690 addil #-1361377648,%d0 + 1084: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 1088: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 108c: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 1090: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 1094: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 1098: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 109c: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 10a0: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 10a4: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 10a8: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 10ac: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 10b0: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 10b4: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 10b8: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 10bc: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 10c0: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 10c4: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 10c8: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 10cc: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 10d0: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 10d4: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 10d8: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 10dc: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 10e0: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 10e4: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 10e8: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 10ec: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 10f0: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 10f4: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 10f8: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 10fc: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 1102: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 1108: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 110e: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 1114: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 111a: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 1120: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 1126: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 112c: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 1132: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 1138: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 113e: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 1144: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 114a: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 1150: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 1156: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 115c: ae69 0680 aee9 macw %a1l,%spu,>>,%a1@\(-20759\),%sp,%acc1 + 1162: 0690 ae69 0680 addil #-1368848768,%d0 + 1168: aee9 0690 ae69 macw %a1l,%spu,>>,%a1@\(-20887\),%sp,%acc3 + 116e: 0680 aee9 0690 addil #-1360460144,%d0 + 1174: ae69 0680 aee9 macw %a1l,%spu,>>,%a1@\(-20759\),%sp,%acc1 + 117a: 0690 ae69 06a0 addil #-1368848736,%d0 + 1180: aee9 06b0 ae69 macw %a1l,%spu,>>,%a1@\(-20887\)&,%sp,%acc3 + 1186: 06a0 aee9 06b0 addil #-1360460112,%d0 + 118c: ae69 06a0 aee9 macw %a1l,%spu,>>,%a1@\(-20759\)&,%sp,%acc1 + 1192: 06b0 ae69 06a0 addil #-1368848736,%d0 + 1198: aee9 06b0 ae5b macw %a1l,%spu,>>,%a1@\(-20901\)&,%sp,%acc3 + 119e: 0280 aedb 0290 andil #-1361378672,%d0 + 11a4: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 11a8: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 11ac: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 11b0: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 11b4: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 11b8: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 11bc: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 11c0: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 11c4: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 11c8: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 11cc: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 11d0: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 11d4: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 11d8: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 11dc: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 11e0: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 11e4: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 11e8: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 11ec: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 11f0: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 11f4: ae5b 0280 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 11f8: aedb 0290 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 11fc: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 1200: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 1204: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 1208: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 120c: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 1210: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 1214: ae5b 02a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 1218: aedb 02b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 121c: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 1222: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 1228: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 122e: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 1234: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 123a: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 1240: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 1246: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 124c: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 1252: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 1258: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 125e: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 1264: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 126a: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 1270: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 1276: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 127c: ae69 0280 aee9 macw %a1l,%spu,>>,%a1@\(-20759\),%sp,%acc1 + 1282: 0290 ae69 0280 andil #-1368849792,%d0 + 1288: aee9 0290 ae69 macw %a1l,%spu,>>,%a1@\(-20887\),%sp,%acc3 + 128e: 0280 aee9 0290 andil #-1360461168,%d0 + 1294: ae69 0280 aee9 macw %a1l,%spu,>>,%a1@\(-20759\),%sp,%acc1 + 129a: 0290 ae69 02a0 andil #-1368849760,%d0 + 12a0: aee9 02b0 ae69 macw %a1l,%spu,>>,%a1@\(-20887\)&,%sp,%acc3 + 12a6: 02a0 aee9 02b0 andil #-1360461136,%d0 + 12ac: ae69 02a0 aee9 macw %a1l,%spu,>>,%a1@\(-20759\)&,%sp,%acc1 + 12b2: 02b0 ae69 02a0 andil #-1368849760,%d0 + 12b8: aee9 02b0 ae5b macw %a1l,%spu,>>,%a1@\(-20901\)&,%sp,%acc3 + 12be: 0680 aedb 0690 addil #-1361377648,%d0 + 12c4: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 12c8: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 12cc: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 12d0: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 12d4: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 12d8: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 12dc: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 12e0: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 12e4: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 12e8: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 12ec: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 12f0: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 12f4: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 12f8: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 12fc: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 1300: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 1304: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 1308: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 130c: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 1310: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 1314: ae5b 0680 macw %a3u,%spu,>>,%a3@\+,%sp,%acc1 + 1318: aedb 0690 macw %a3u,%spu,>>,%a3@\+,%sp,%acc3 + 131c: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 1320: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 1324: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 1328: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 132c: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 1330: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 1334: ae5b 06a0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc1 + 1338: aedb 06b0 macw %a3u,%spu,>>,%a3@\+&,%sp,%acc3 + 133c: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 1342: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 1348: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 134e: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 1354: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 135a: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 1360: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 1366: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 136c: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 1372: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 1378: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 137e: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 1384: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 138a: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 1390: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 1396: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 139c: ae69 0680 aee9 macw %a1l,%spu,>>,%a1@\(-20759\),%sp,%acc1 + 13a2: 0690 ae69 0680 addil #-1368848768,%d0 + 13a8: aee9 0690 ae69 macw %a1l,%spu,>>,%a1@\(-20887\),%sp,%acc3 + 13ae: 0680 aee9 0690 addil #-1360460144,%d0 + 13b4: ae69 0680 aee9 macw %a1l,%spu,>>,%a1@\(-20759\),%sp,%acc1 + 13ba: 0690 ae69 06a0 addil #-1368848736,%d0 + 13c0: aee9 06b0 ae69 macw %a1l,%spu,>>,%a1@\(-20887\)&,%sp,%acc3 + 13c6: 06a0 aee9 06b0 addil #-1360460112,%d0 + 13cc: ae69 06a0 aee9 macw %a1l,%spu,>>,%a1@\(-20759\)&,%sp,%acc1 + 13d2: 06b0 ae69 06a0 addil #-1368848736,%d0 + 13d8: aee9 06b0 a21b macw %a1l,%spu,>>,%a1@\(-24037\)&,%sp,%acc3 + 13de: 0000 00 + 13e0: a29b 0010 macw %a3u,%d1l,%a3@\+,%d1,%acc3 + 13e4: a65b 0000 macw %a3u,%a3l,%a3@\+,%a3,%acc1 + 13e8: a6db 0010 macw %a3u,%a3l,%a3@\+,%a3,%acc3 + 13ec: a61b 0000 macw %a3u,%d3l,%a3@\+,%d3,%acc1 + 13f0: a69b 0010 macw %a3u,%d3l,%a3@\+,%d3,%acc3 + 13f4: ae5b 0000 macw %a3u,%spl,%a3@\+,%sp,%acc1 + 13f8: aedb 0010 macw %a3u,%spl,%a3@\+,%sp,%acc3 + 13fc: a21b 0020 macw %a3u,%d1l,%a3@\+&,%d1,%acc1 + 1400: a29b 0030 macw %a3u,%d1l,%a3@\+&,%d1,%acc3 + 1404: a65b 0020 macw %a3u,%a3l,%a3@\+&,%a3,%acc1 + 1408: a6db 0030 macw %a3u,%a3l,%a3@\+&,%a3,%acc3 + 140c: a61b 0020 macw %a3u,%d3l,%a3@\+&,%d3,%acc1 + 1410: a69b 0030 macw %a3u,%d3l,%a3@\+&,%d3,%acc3 + 1414: ae5b 0020 macw %a3u,%spl,%a3@\+&,%sp,%acc1 + 1418: aedb 0030 macw %a3u,%spl,%a3@\+&,%sp,%acc3 + 141c: a21b 0000 macw %a3u,%d1l,%a3@\+,%d1,%acc1 + 1420: a29b 0010 macw %a3u,%d1l,%a3@\+,%d1,%acc3 + 1424: a65b 0000 macw %a3u,%a3l,%a3@\+,%a3,%acc1 + 1428: a6db 0010 macw %a3u,%a3l,%a3@\+,%a3,%acc3 + 142c: a61b 0000 macw %a3u,%d3l,%a3@\+,%d3,%acc1 + 1430: a69b 0010 macw %a3u,%d3l,%a3@\+,%d3,%acc3 + 1434: ae5b 0000 macw %a3u,%spl,%a3@\+,%sp,%acc1 + 1438: aedb 0010 macw %a3u,%spl,%a3@\+,%sp,%acc3 + 143c: a21b 0020 macw %a3u,%d1l,%a3@\+&,%d1,%acc1 + 1440: a29b 0030 macw %a3u,%d1l,%a3@\+&,%d1,%acc3 + 1444: a65b 0020 macw %a3u,%a3l,%a3@\+&,%a3,%acc1 + 1448: a6db 0030 macw %a3u,%a3l,%a3@\+&,%a3,%acc3 + 144c: a61b 0020 macw %a3u,%d3l,%a3@\+&,%d3,%acc1 + 1450: a69b 0030 macw %a3u,%d3l,%a3@\+&,%d3,%acc3 + 1454: ae5b 0020 macw %a3u,%spl,%a3@\+&,%sp,%acc1 + 1458: aedb 0030 macw %a3u,%spl,%a3@\+&,%sp,%acc3 + 145c: a22f 0000 000a macw %spl,%d1l,%sp@\(10\),%d1,%acc1 + 1462: a2af 0010 000a macw %spl,%d1l,%sp@\(10\),%d1,%acc3 + 1468: a66f 0000 000a macw %spl,%a3l,%sp@\(10\),%a3,%acc1 + 146e: a6ef 0010 000a macw %spl,%a3l,%sp@\(10\),%a3,%acc3 + 1474: a62f 0000 000a macw %spl,%d3l,%sp@\(10\),%d3,%acc1 + 147a: a6af 0010 000a macw %spl,%d3l,%sp@\(10\),%d3,%acc3 + 1480: ae6f 0000 000a macw %spl,%spl,%sp@\(10\),%sp,%acc1 + 1486: aeef 0010 000a macw %spl,%spl,%sp@\(10\),%sp,%acc3 + 148c: a22f 0020 000a macw %spl,%d1l,%sp@\(10\)&,%d1,%acc1 + 1492: a2af 0030 000a macw %spl,%d1l,%sp@\(10\)&,%d1,%acc3 + 1498: a66f 0020 000a macw %spl,%a3l,%sp@\(10\)&,%a3,%acc1 + 149e: a6ef 0030 000a macw %spl,%a3l,%sp@\(10\)&,%a3,%acc3 + 14a4: a62f 0020 000a macw %spl,%d3l,%sp@\(10\)&,%d3,%acc1 + 14aa: a6af 0030 000a macw %spl,%d3l,%sp@\(10\)&,%d3,%acc3 + 14b0: ae6f 0020 000a macw %spl,%spl,%sp@\(10\)&,%sp,%acc1 + 14b6: aeef 0030 000a macw %spl,%spl,%sp@\(10\)&,%sp,%acc3 + 14bc: a229 0000 a2a9 macw %a1l,%d1l,%a1@\(-23895\),%d1,%acc1 + 14c2: 0010 020 + 14c4: a669 0000 a6e9 macw %a1l,%a3l,%a1@\(-22807\),%a3,%acc1 + 14ca: 0010 020 + 14cc: a629 0000 a6a9 macw %a1l,%d3l,%a1@\(-22871\),%d3,%acc1 + 14d2: 0010 020 + 14d4: ae69 0000 aee9 macw %a1l,%spl,%a1@\(-20759\),%sp,%acc1 + 14da: 0010 020 + 14dc: a229 0020 a2a9 macw %a1l,%d1l,%a1@\(-23895\)&,%d1,%acc1 + 14e2: 0030 060 + 14e4: a669 0020 a6e9 macw %a1l,%a3l,%a1@\(-22807\)&,%a3,%acc1 + 14ea: 0030 060 + 14ec: a629 0020 a6a9 macw %a1l,%d3l,%a1@\(-22871\)&,%d3,%acc1 + 14f2: 0030 060 + 14f4: ae69 0020 aee9 macw %a1l,%spl,%a1@\(-20759\)&,%sp,%acc1 + 14fa: 0030 060 + 14fc: a21b 0200 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc1 + 1500: a29b 0210 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc3 + 1504: a65b 0200 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + 1508: a6db 0210 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + 150c: a61b 0200 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + 1510: a69b 0210 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + 1514: ae5b 0200 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + 1518: aedb 0210 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + 151c: a21b 0220 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc1 + 1520: a29b 0230 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc3 + 1524: a65b 0220 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + 1528: a6db 0230 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + 152c: a61b 0220 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + 1530: a69b 0230 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + 1534: ae5b 0220 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + 1538: aedb 0230 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + 153c: a21b 0200 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc1 + 1540: a29b 0210 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc3 + 1544: a65b 0200 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + 1548: a6db 0210 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + 154c: a61b 0200 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + 1550: a69b 0210 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + 1554: ae5b 0200 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + 1558: aedb 0210 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + 155c: a21b 0220 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc1 + 1560: a29b 0230 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc3 + 1564: a65b 0220 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + 1568: a6db 0230 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + 156c: a61b 0220 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + 1570: a69b 0230 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + 1574: ae5b 0220 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + 1578: aedb 0230 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + 157c: a22f 0200 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc1 + 1582: a2af 0210 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc3 + 1588: a66f 0200 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + 158e: a6ef 0210 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + 1594: a62f 0200 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 159a: a6af 0210 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 15a0: ae6f 0200 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + 15a6: aeef 0210 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + 15ac: a22f 0220 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc1 + 15b2: a2af 0230 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc3 + 15b8: a66f 0220 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + 15be: a6ef 0230 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + 15c4: a62f 0220 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 15ca: a6af 0230 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 15d0: ae6f 0220 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + 15d6: aeef 0230 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + 15dc: a229 0200 a2a9 macw %a1l,%d1l,<<,%a1@\(-23895\),%d1,%acc1 + 15e2: 0210 01020 + 15e4: a669 0200 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\),%a3,%acc1 + 15ea: 0210 01020 + 15ec: a629 0200 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\),%d3,%acc1 + 15f2: 0210 01020 + 15f4: ae69 0200 aee9 macw %a1l,%spl,>>,%a1@\(-20759\),%sp,%acc1 + 15fa: 0210 01020 + 15fc: a229 0220 a2a9 macw %a1l,%d1l,<<,%a1@\(-23895\)&,%d1,%acc1 + 1602: 0230 01060 + 1604: a669 0220 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\)&,%a3,%acc1 + 160a: 0230 01060 + 160c: a629 0220 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\)&,%d3,%acc1 + 1612: 0230 01060 + 1614: ae69 0220 aee9 macw %a1l,%spl,>>,%a1@\(-20759\)&,%sp,%acc1 + 161a: 0230 01060 + 161c: a21b 0600 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc1 + 1620: a29b 0610 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc3 + 1624: a65b 0600 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + 1628: a6db 0610 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + 162c: a61b 0600 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + 1630: a69b 0610 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + 1634: ae5b 0600 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + 1638: aedb 0610 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + 163c: a21b 0620 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc1 + 1640: a29b 0630 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc3 + 1644: a65b 0620 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + 1648: a6db 0630 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + 164c: a61b 0620 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + 1650: a69b 0630 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + 1654: ae5b 0620 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + 1658: aedb 0630 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + 165c: a21b 0600 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc1 + 1660: a29b 0610 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc3 + 1664: a65b 0600 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + 1668: a6db 0610 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + 166c: a61b 0600 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + 1670: a69b 0610 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + 1674: ae5b 0600 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + 1678: aedb 0610 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + 167c: a21b 0620 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc1 + 1680: a29b 0630 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc3 + 1684: a65b 0620 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + 1688: a6db 0630 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + 168c: a61b 0620 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + 1690: a69b 0630 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + 1694: ae5b 0620 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + 1698: aedb 0630 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + 169c: a22f 0600 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc1 + 16a2: a2af 0610 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc3 + 16a8: a66f 0600 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + 16ae: a6ef 0610 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + 16b4: a62f 0600 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 16ba: a6af 0610 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 16c0: ae6f 0600 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + 16c6: aeef 0610 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + 16cc: a22f 0620 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc1 + 16d2: a2af 0630 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc3 + 16d8: a66f 0620 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + 16de: a6ef 0630 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + 16e4: a62f 0620 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 16ea: a6af 0630 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 16f0: ae6f 0620 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + 16f6: aeef 0630 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + 16fc: a229 0600 a2a9 macw %a1l,%d1l,<<,%a1@\(-23895\),%d1,%acc1 + 1702: 0610 03020 + 1704: a669 0600 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\),%a3,%acc1 + 170a: 0610 03020 + 170c: a629 0600 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\),%d3,%acc1 + 1712: 0610 03020 + 1714: ae69 0600 aee9 macw %a1l,%spl,>>,%a1@\(-20759\),%sp,%acc1 + 171a: 0610 03020 + 171c: a229 0620 a2a9 macw %a1l,%d1l,<<,%a1@\(-23895\)&,%d1,%acc1 + 1722: 0630 03060 + 1724: a669 0620 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\)&,%a3,%acc1 + 172a: 0630 03060 + 172c: a629 0620 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\)&,%d3,%acc1 + 1732: 0630 03060 + 1734: ae69 0620 aee9 macw %a1l,%spl,>>,%a1@\(-20759\)&,%sp,%acc1 + 173a: 0630 03060 + 173c: a21b 0200 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc1 + 1740: a29b 0210 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc3 + 1744: a65b 0200 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + 1748: a6db 0210 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + 174c: a61b 0200 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + 1750: a69b 0210 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + 1754: ae5b 0200 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + 1758: aedb 0210 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + 175c: a21b 0220 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc1 + 1760: a29b 0230 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc3 + 1764: a65b 0220 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + 1768: a6db 0230 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + 176c: a61b 0220 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + 1770: a69b 0230 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + 1774: ae5b 0220 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + 1778: aedb 0230 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + 177c: a21b 0200 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc1 + 1780: a29b 0210 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc3 + 1784: a65b 0200 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + 1788: a6db 0210 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + 178c: a61b 0200 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + 1790: a69b 0210 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + 1794: ae5b 0200 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + 1798: aedb 0210 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + 179c: a21b 0220 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc1 + 17a0: a29b 0230 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc3 + 17a4: a65b 0220 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + 17a8: a6db 0230 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + 17ac: a61b 0220 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + 17b0: a69b 0230 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + 17b4: ae5b 0220 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + 17b8: aedb 0230 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + 17bc: a22f 0200 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc1 + 17c2: a2af 0210 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc3 + 17c8: a66f 0200 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + 17ce: a6ef 0210 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + 17d4: a62f 0200 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 17da: a6af 0210 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 17e0: ae6f 0200 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + 17e6: aeef 0210 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + 17ec: a22f 0220 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc1 + 17f2: a2af 0230 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc3 + 17f8: a66f 0220 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + 17fe: a6ef 0230 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + 1804: a62f 0220 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 180a: a6af 0230 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 1810: ae6f 0220 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + 1816: aeef 0230 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + 181c: a229 0200 a2a9 macw %a1l,%d1l,<<,%a1@\(-23895\),%d1,%acc1 + 1822: 0210 01020 + 1824: a669 0200 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\),%a3,%acc1 + 182a: 0210 01020 + 182c: a629 0200 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\),%d3,%acc1 + 1832: 0210 01020 + 1834: ae69 0200 aee9 macw %a1l,%spl,>>,%a1@\(-20759\),%sp,%acc1 + 183a: 0210 01020 + 183c: a229 0220 a2a9 macw %a1l,%d1l,<<,%a1@\(-23895\)&,%d1,%acc1 + 1842: 0230 01060 + 1844: a669 0220 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\)&,%a3,%acc1 + 184a: 0230 01060 + 184c: a629 0220 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\)&,%d3,%acc1 + 1852: 0230 01060 + 1854: ae69 0220 aee9 macw %a1l,%spl,>>,%a1@\(-20759\)&,%sp,%acc1 + 185a: 0230 01060 + 185c: a21b 0600 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc1 + 1860: a29b 0610 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc3 + 1864: a65b 0600 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + 1868: a6db 0610 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + 186c: a61b 0600 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + 1870: a69b 0610 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + 1874: ae5b 0600 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + 1878: aedb 0610 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + 187c: a21b 0620 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc1 + 1880: a29b 0630 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc3 + 1884: a65b 0620 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + 1888: a6db 0630 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + 188c: a61b 0620 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + 1890: a69b 0630 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + 1894: ae5b 0620 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + 1898: aedb 0630 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + 189c: a21b 0600 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc1 + 18a0: a29b 0610 macw %a3u,%d1l,<<,%a3@\+,%d1,%acc3 + 18a4: a65b 0600 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc1 + 18a8: a6db 0610 macw %a3u,%a3l,>>,%a3@\+,%a3,%acc3 + 18ac: a61b 0600 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc1 + 18b0: a69b 0610 macw %a3u,%d3l,>>,%a3@\+,%d3,%acc3 + 18b4: ae5b 0600 macw %a3u,%spl,>>,%a3@\+,%sp,%acc1 + 18b8: aedb 0610 macw %a3u,%spl,>>,%a3@\+,%sp,%acc3 + 18bc: a21b 0620 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc1 + 18c0: a29b 0630 macw %a3u,%d1l,<<,%a3@\+&,%d1,%acc3 + 18c4: a65b 0620 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc1 + 18c8: a6db 0630 macw %a3u,%a3l,>>,%a3@\+&,%a3,%acc3 + 18cc: a61b 0620 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc1 + 18d0: a69b 0630 macw %a3u,%d3l,>>,%a3@\+&,%d3,%acc3 + 18d4: ae5b 0620 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc1 + 18d8: aedb 0630 macw %a3u,%spl,>>,%a3@\+&,%sp,%acc3 + 18dc: a22f 0600 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc1 + 18e2: a2af 0610 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc3 + 18e8: a66f 0600 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + 18ee: a6ef 0610 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + 18f4: a62f 0600 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 18fa: a6af 0610 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 1900: ae6f 0600 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + 1906: aeef 0610 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + 190c: a22f 0620 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc1 + 1912: a2af 0630 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc3 + 1918: a66f 0620 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + 191e: a6ef 0630 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + 1924: a62f 0620 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 192a: a6af 0630 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 1930: ae6f 0620 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + 1936: aeef 0630 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + 193c: a229 0600 a2a9 macw %a1l,%d1l,<<,%a1@\(-23895\),%d1,%acc1 + 1942: 0610 03020 + 1944: a669 0600 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\),%a3,%acc1 + 194a: 0610 03020 + 194c: a629 0600 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\),%d3,%acc1 + 1952: 0610 03020 + 1954: ae69 0600 aee9 macw %a1l,%spl,>>,%a1@\(-20759\),%sp,%acc1 + 195a: 0610 03020 + 195c: a229 0620 a2a9 macw %a1l,%d1l,<<,%a1@\(-23895\)&,%d1,%acc1 + 1962: 0630 03060 + 1964: a669 0620 a6e9 macw %a1l,%a3l,>>,%a1@\(-22807\)&,%a3,%acc1 + 196a: 0630 03060 + 196c: a629 0620 a6a9 macw %a1l,%d3l,>>,%a1@\(-22871\)&,%d3,%acc1 + 1972: 0630 03060 + 1974: ae69 0620 aee9 macw %a1l,%spl,>>,%a1@\(-20759\)&,%sp,%acc1 + 197a: 0630 03060 + 197c: a653 00c0 macw %d3u,%a3u,%a3@,%a3,%acc1 + 1980: a6d3 00d0 macw %d3u,%a3u,%a3@,%a3,%acc3 + 1984: a653 00c0 macw %d3u,%a3u,%a3@,%a3,%acc1 + 1988: a6d3 00d0 macw %d3u,%a3u,%a3@,%a3,%acc3 + 198c: a453 00c0 macw %d3u,%a2u,%a3@,%a2,%acc1 + 1990: a4d3 00d0 macw %d3u,%a2u,%a3@,%a2,%acc3 + 1994: ae53 00c0 macw %d3u,%spu,%a3@,%sp,%acc1 + 1998: aed3 00d0 macw %d3u,%spu,%a3@,%sp,%acc3 + 199c: a653 00e0 macw %d3u,%a3u,%a3@&,%a3,%acc1 + 19a0: a6d3 00f0 macw %d3u,%a3u,%a3@&,%a3,%acc3 + 19a4: a653 00e0 macw %d3u,%a3u,%a3@&,%a3,%acc1 + 19a8: a6d3 00f0 macw %d3u,%a3u,%a3@&,%a3,%acc3 + 19ac: a453 00e0 macw %d3u,%a2u,%a3@&,%a2,%acc1 + 19b0: a4d3 00f0 macw %d3u,%a2u,%a3@&,%a2,%acc3 + 19b4: ae53 00e0 macw %d3u,%spu,%a3@&,%sp,%acc1 + 19b8: aed3 00f0 macw %d3u,%spu,%a3@&,%sp,%acc3 + 19bc: a65a 00c0 macw %a2u,%a3u,%a2@\+,%a3,%acc1 + 19c0: a6da 00d0 macw %a2u,%a3u,%a2@\+,%a3,%acc3 + 19c4: a65a 00c0 macw %a2u,%a3u,%a2@\+,%a3,%acc1 + 19c8: a6da 00d0 macw %a2u,%a3u,%a2@\+,%a3,%acc3 + 19cc: a45a 00c0 macw %a2u,%a2u,%a2@\+,%a2,%acc1 + 19d0: a4da 00d0 macw %a2u,%a2u,%a2@\+,%a2,%acc3 + 19d4: ae5a 00c0 macw %a2u,%spu,%a2@\+,%sp,%acc1 + 19d8: aeda 00d0 macw %a2u,%spu,%a2@\+,%sp,%acc3 + 19dc: a65a 00e0 macw %a2u,%a3u,%a2@\+&,%a3,%acc1 + 19e0: a6da 00f0 macw %a2u,%a3u,%a2@\+&,%a3,%acc3 + 19e4: a65a 00e0 macw %a2u,%a3u,%a2@\+&,%a3,%acc1 + 19e8: a6da 00f0 macw %a2u,%a3u,%a2@\+&,%a3,%acc3 + 19ec: a45a 00e0 macw %a2u,%a2u,%a2@\+&,%a2,%acc1 + 19f0: a4da 00f0 macw %a2u,%a2u,%a2@\+&,%a2,%acc3 + 19f4: ae5a 00e0 macw %a2u,%spu,%a2@\+&,%sp,%acc1 + 19f8: aeda 00f0 macw %a2u,%spu,%a2@\+&,%sp,%acc3 + 19fc: a66e 00c0 000a macw %fpu,%a3u,%fp@\(10\),%a3,%acc1 + 1a02: a6ee 00d0 000a macw %fpu,%a3u,%fp@\(10\),%a3,%acc3 + 1a08: a66e 00c0 000a macw %fpu,%a3u,%fp@\(10\),%a3,%acc1 + 1a0e: a6ee 00d0 000a macw %fpu,%a3u,%fp@\(10\),%a3,%acc3 + 1a14: a46e 00c0 000a macw %fpu,%a2u,%fp@\(10\),%a2,%acc1 + 1a1a: a4ee 00d0 000a macw %fpu,%a2u,%fp@\(10\),%a2,%acc3 + 1a20: ae6e 00c0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc1 + 1a26: aeee 00d0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc3 + 1a2c: a66e 00e0 000a macw %fpu,%a3u,%fp@\(10\)&,%a3,%acc1 + 1a32: a6ee 00f0 000a macw %fpu,%a3u,%fp@\(10\)&,%a3,%acc3 + 1a38: a66e 00e0 000a macw %fpu,%a3u,%fp@\(10\)&,%a3,%acc1 + 1a3e: a6ee 00f0 000a macw %fpu,%a3u,%fp@\(10\)&,%a3,%acc3 + 1a44: a46e 00e0 000a macw %fpu,%a2u,%fp@\(10\)&,%a2,%acc1 + 1a4a: a4ee 00f0 000a macw %fpu,%a2u,%fp@\(10\)&,%a2,%acc3 + 1a50: ae6e 00e0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc1 + 1a56: aeee 00f0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc3 + 1a5c: a663 00c0 macw %d3u,%a3u,%a3@-,%a3,%acc1 + 1a60: a6e3 00d0 macw %d3u,%a3u,%a3@-,%a3,%acc3 + 1a64: a663 00c0 macw %d3u,%a3u,%a3@-,%a3,%acc1 + 1a68: a6e3 00d0 macw %d3u,%a3u,%a3@-,%a3,%acc3 + 1a6c: a463 00c0 macw %d3u,%a2u,%a3@-,%a2,%acc1 + 1a70: a4e3 00d0 macw %d3u,%a2u,%a3@-,%a2,%acc3 + 1a74: ae63 00c0 macw %d3u,%spu,%a3@-,%sp,%acc1 + 1a78: aee3 00d0 macw %d3u,%spu,%a3@-,%sp,%acc3 + 1a7c: a663 00e0 macw %d3u,%a3u,%a3@-&,%a3,%acc1 + 1a80: a6e3 00f0 macw %d3u,%a3u,%a3@-&,%a3,%acc3 + 1a84: a663 00e0 macw %d3u,%a3u,%a3@-&,%a3,%acc1 + 1a88: a6e3 00f0 macw %d3u,%a3u,%a3@-&,%a3,%acc3 + 1a8c: a463 00e0 macw %d3u,%a2u,%a3@-&,%a2,%acc1 + 1a90: a4e3 00f0 macw %d3u,%a2u,%a3@-&,%a2,%acc3 + 1a94: ae63 00e0 macw %d3u,%spu,%a3@-&,%sp,%acc1 + 1a98: aee3 00f0 macw %d3u,%spu,%a3@-&,%sp,%acc3 + 1a9c: a653 02c0 macw %d3u,%a3u,>>,%a3@,%a3,%acc1 + 1aa0: a6d3 02d0 macw %d3u,%a3u,>>,%a3@,%a3,%acc3 + 1aa4: a653 02c0 macw %d3u,%a3u,>>,%a3@,%a3,%acc1 + 1aa8: a6d3 02d0 macw %d3u,%a3u,>>,%a3@,%a3,%acc3 + 1aac: a453 02c0 macw %d3u,%a2u,,%a3@,%a2,%acc1 + 1ab0: a4d3 02d0 macw %d3u,%a2u,,%a3@,%a2,%acc3 + 1ab4: ae53 02c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 1ab8: aed3 02d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 1abc: a653 02e0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc1 + 1ac0: a6d3 02f0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc3 + 1ac4: a653 02e0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc1 + 1ac8: a6d3 02f0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc3 + 1acc: a453 02e0 macw %d3u,%a2u,,%a3@&,%a2,%acc1 + 1ad0: a4d3 02f0 macw %d3u,%a2u,,%a3@&,%a2,%acc3 + 1ad4: ae53 02e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 1ad8: aed3 02f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 1adc: a65a 02c0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc1 + 1ae0: a6da 02d0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc3 + 1ae4: a65a 02c0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc1 + 1ae8: a6da 02d0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc3 + 1aec: a45a 02c0 macw %a2u,%a2u,,%a2@\+,%a2,%acc1 + 1af0: a4da 02d0 macw %a2u,%a2u,,%a2@\+,%a2,%acc3 + 1af4: ae5a 02c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 1af8: aeda 02d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 1afc: a65a 02e0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc1 + 1b00: a6da 02f0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc3 + 1b04: a65a 02e0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc1 + 1b08: a6da 02f0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc3 + 1b0c: a45a 02e0 macw %a2u,%a2u,,%a2@\+&,%a2,%acc1 + 1b10: a4da 02f0 macw %a2u,%a2u,,%a2@\+&,%a2,%acc3 + 1b14: ae5a 02e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 1b18: aeda 02f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 1b1c: a66e 02c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 1b22: a6ee 02d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 1b28: a66e 02c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 1b2e: a6ee 02d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 1b34: a46e 02c0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc1 + 1b3a: a4ee 02d0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc3 + 1b40: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 1b46: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 1b4c: a66e 02e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 1b52: a6ee 02f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 1b58: a66e 02e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 1b5e: a6ee 02f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 1b64: a46e 02e0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc1 + 1b6a: a4ee 02f0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc3 + 1b70: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 1b76: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 1b7c: a663 02c0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc1 + 1b80: a6e3 02d0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc3 + 1b84: a663 02c0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc1 + 1b88: a6e3 02d0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc3 + 1b8c: a463 02c0 macw %d3u,%a2u,,%a3@-,%a2,%acc1 + 1b90: a4e3 02d0 macw %d3u,%a2u,,%a3@-,%a2,%acc3 + 1b94: ae63 02c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 1b98: aee3 02d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 1b9c: a663 02e0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc1 + 1ba0: a6e3 02f0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc3 + 1ba4: a663 02e0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc1 + 1ba8: a6e3 02f0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc3 + 1bac: a463 02e0 macw %d3u,%a2u,,%a3@-&,%a2,%acc1 + 1bb0: a4e3 02f0 macw %d3u,%a2u,,%a3@-&,%a2,%acc3 + 1bb4: ae63 02e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 1bb8: aee3 02f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 1bbc: a653 06c0 macw %d3u,%a3u,>>,%a3@,%a3,%acc1 + 1bc0: a6d3 06d0 macw %d3u,%a3u,>>,%a3@,%a3,%acc3 + 1bc4: a653 06c0 macw %d3u,%a3u,>>,%a3@,%a3,%acc1 + 1bc8: a6d3 06d0 macw %d3u,%a3u,>>,%a3@,%a3,%acc3 + 1bcc: a453 06c0 macw %d3u,%a2u,,%a3@,%a2,%acc1 + 1bd0: a4d3 06d0 macw %d3u,%a2u,,%a3@,%a2,%acc3 + 1bd4: ae53 06c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 1bd8: aed3 06d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 1bdc: a653 06e0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc1 + 1be0: a6d3 06f0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc3 + 1be4: a653 06e0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc1 + 1be8: a6d3 06f0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc3 + 1bec: a453 06e0 macw %d3u,%a2u,,%a3@&,%a2,%acc1 + 1bf0: a4d3 06f0 macw %d3u,%a2u,,%a3@&,%a2,%acc3 + 1bf4: ae53 06e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 1bf8: aed3 06f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 1bfc: a65a 06c0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc1 + 1c00: a6da 06d0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc3 + 1c04: a65a 06c0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc1 + 1c08: a6da 06d0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc3 + 1c0c: a45a 06c0 macw %a2u,%a2u,,%a2@\+,%a2,%acc1 + 1c10: a4da 06d0 macw %a2u,%a2u,,%a2@\+,%a2,%acc3 + 1c14: ae5a 06c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 1c18: aeda 06d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 1c1c: a65a 06e0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc1 + 1c20: a6da 06f0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc3 + 1c24: a65a 06e0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc1 + 1c28: a6da 06f0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc3 + 1c2c: a45a 06e0 macw %a2u,%a2u,,%a2@\+&,%a2,%acc1 + 1c30: a4da 06f0 macw %a2u,%a2u,,%a2@\+&,%a2,%acc3 + 1c34: ae5a 06e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 1c38: aeda 06f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 1c3c: a66e 06c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 1c42: a6ee 06d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 1c48: a66e 06c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 1c4e: a6ee 06d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 1c54: a46e 06c0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc1 + 1c5a: a4ee 06d0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc3 + 1c60: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 1c66: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 1c6c: a66e 06e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 1c72: a6ee 06f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 1c78: a66e 06e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 1c7e: a6ee 06f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 1c84: a46e 06e0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc1 + 1c8a: a4ee 06f0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc3 + 1c90: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 1c96: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 1c9c: a663 06c0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc1 + 1ca0: a6e3 06d0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc3 + 1ca4: a663 06c0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc1 + 1ca8: a6e3 06d0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc3 + 1cac: a463 06c0 macw %d3u,%a2u,,%a3@-,%a2,%acc1 + 1cb0: a4e3 06d0 macw %d3u,%a2u,,%a3@-,%a2,%acc3 + 1cb4: ae63 06c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 1cb8: aee3 06d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 1cbc: a663 06e0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc1 + 1cc0: a6e3 06f0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc3 + 1cc4: a663 06e0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc1 + 1cc8: a6e3 06f0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc3 + 1ccc: a463 06e0 macw %d3u,%a2u,,%a3@-&,%a2,%acc1 + 1cd0: a4e3 06f0 macw %d3u,%a2u,,%a3@-&,%a2,%acc3 + 1cd4: ae63 06e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 1cd8: aee3 06f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 1cdc: a653 02c0 macw %d3u,%a3u,>>,%a3@,%a3,%acc1 + 1ce0: a6d3 02d0 macw %d3u,%a3u,>>,%a3@,%a3,%acc3 + 1ce4: a653 02c0 macw %d3u,%a3u,>>,%a3@,%a3,%acc1 + 1ce8: a6d3 02d0 macw %d3u,%a3u,>>,%a3@,%a3,%acc3 + 1cec: a453 02c0 macw %d3u,%a2u,,%a3@,%a2,%acc1 + 1cf0: a4d3 02d0 macw %d3u,%a2u,,%a3@,%a2,%acc3 + 1cf4: ae53 02c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 1cf8: aed3 02d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 1cfc: a653 02e0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc1 + 1d00: a6d3 02f0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc3 + 1d04: a653 02e0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc1 + 1d08: a6d3 02f0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc3 + 1d0c: a453 02e0 macw %d3u,%a2u,,%a3@&,%a2,%acc1 + 1d10: a4d3 02f0 macw %d3u,%a2u,,%a3@&,%a2,%acc3 + 1d14: ae53 02e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 1d18: aed3 02f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 1d1c: a65a 02c0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc1 + 1d20: a6da 02d0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc3 + 1d24: a65a 02c0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc1 + 1d28: a6da 02d0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc3 + 1d2c: a45a 02c0 macw %a2u,%a2u,,%a2@\+,%a2,%acc1 + 1d30: a4da 02d0 macw %a2u,%a2u,,%a2@\+,%a2,%acc3 + 1d34: ae5a 02c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 1d38: aeda 02d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 1d3c: a65a 02e0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc1 + 1d40: a6da 02f0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc3 + 1d44: a65a 02e0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc1 + 1d48: a6da 02f0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc3 + 1d4c: a45a 02e0 macw %a2u,%a2u,,%a2@\+&,%a2,%acc1 + 1d50: a4da 02f0 macw %a2u,%a2u,,%a2@\+&,%a2,%acc3 + 1d54: ae5a 02e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 1d58: aeda 02f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 1d5c: a66e 02c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 1d62: a6ee 02d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 1d68: a66e 02c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 1d6e: a6ee 02d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 1d74: a46e 02c0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc1 + 1d7a: a4ee 02d0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc3 + 1d80: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 1d86: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 1d8c: a66e 02e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 1d92: a6ee 02f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 1d98: a66e 02e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 1d9e: a6ee 02f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 1da4: a46e 02e0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc1 + 1daa: a4ee 02f0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc3 + 1db0: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 1db6: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 1dbc: a663 02c0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc1 + 1dc0: a6e3 02d0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc3 + 1dc4: a663 02c0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc1 + 1dc8: a6e3 02d0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc3 + 1dcc: a463 02c0 macw %d3u,%a2u,,%a3@-,%a2,%acc1 + 1dd0: a4e3 02d0 macw %d3u,%a2u,,%a3@-,%a2,%acc3 + 1dd4: ae63 02c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 1dd8: aee3 02d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 1ddc: a663 02e0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc1 + 1de0: a6e3 02f0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc3 + 1de4: a663 02e0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc1 + 1de8: a6e3 02f0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc3 + 1dec: a463 02e0 macw %d3u,%a2u,,%a3@-&,%a2,%acc1 + 1df0: a4e3 02f0 macw %d3u,%a2u,,%a3@-&,%a2,%acc3 + 1df4: ae63 02e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 1df8: aee3 02f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 1dfc: a653 06c0 macw %d3u,%a3u,>>,%a3@,%a3,%acc1 + 1e00: a6d3 06d0 macw %d3u,%a3u,>>,%a3@,%a3,%acc3 + 1e04: a653 06c0 macw %d3u,%a3u,>>,%a3@,%a3,%acc1 + 1e08: a6d3 06d0 macw %d3u,%a3u,>>,%a3@,%a3,%acc3 + 1e0c: a453 06c0 macw %d3u,%a2u,,%a3@,%a2,%acc1 + 1e10: a4d3 06d0 macw %d3u,%a2u,,%a3@,%a2,%acc3 + 1e14: ae53 06c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 1e18: aed3 06d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 1e1c: a653 06e0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc1 + 1e20: a6d3 06f0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc3 + 1e24: a653 06e0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc1 + 1e28: a6d3 06f0 macw %d3u,%a3u,>>,%a3@&,%a3,%acc3 + 1e2c: a453 06e0 macw %d3u,%a2u,,%a3@&,%a2,%acc1 + 1e30: a4d3 06f0 macw %d3u,%a2u,,%a3@&,%a2,%acc3 + 1e34: ae53 06e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 1e38: aed3 06f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 1e3c: a65a 06c0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc1 + 1e40: a6da 06d0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc3 + 1e44: a65a 06c0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc1 + 1e48: a6da 06d0 macw %a2u,%a3u,>>,%a2@\+,%a3,%acc3 + 1e4c: a45a 06c0 macw %a2u,%a2u,,%a2@\+,%a2,%acc1 + 1e50: a4da 06d0 macw %a2u,%a2u,,%a2@\+,%a2,%acc3 + 1e54: ae5a 06c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 1e58: aeda 06d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 1e5c: a65a 06e0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc1 + 1e60: a6da 06f0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc3 + 1e64: a65a 06e0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc1 + 1e68: a6da 06f0 macw %a2u,%a3u,>>,%a2@\+&,%a3,%acc3 + 1e6c: a45a 06e0 macw %a2u,%a2u,,%a2@\+&,%a2,%acc1 + 1e70: a4da 06f0 macw %a2u,%a2u,,%a2@\+&,%a2,%acc3 + 1e74: ae5a 06e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 1e78: aeda 06f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 1e7c: a66e 06c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 1e82: a6ee 06d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 1e88: a66e 06c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 1e8e: a6ee 06d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 1e94: a46e 06c0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc1 + 1e9a: a4ee 06d0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc3 + 1ea0: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 1ea6: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 1eac: a66e 06e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 1eb2: a6ee 06f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 1eb8: a66e 06e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 1ebe: a6ee 06f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 1ec4: a46e 06e0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc1 + 1eca: a4ee 06f0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc3 + 1ed0: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 1ed6: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 1edc: a663 06c0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc1 + 1ee0: a6e3 06d0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc3 + 1ee4: a663 06c0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc1 + 1ee8: a6e3 06d0 macw %d3u,%a3u,>>,%a3@-,%a3,%acc3 + 1eec: a463 06c0 macw %d3u,%a2u,,%a3@-,%a2,%acc1 + 1ef0: a4e3 06d0 macw %d3u,%a2u,,%a3@-,%a2,%acc3 + 1ef4: ae63 06c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 1ef8: aee3 06d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 1efc: a663 06e0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc1 + 1f00: a6e3 06f0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc3 + 1f04: a663 06e0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc1 + 1f08: a6e3 06f0 macw %d3u,%a3u,>>,%a3@-&,%a3,%acc3 + 1f0c: a463 06e0 macw %d3u,%a2u,,%a3@-&,%a2,%acc1 + 1f10: a4e3 06f0 macw %d3u,%a2u,,%a3@-&,%a2,%acc3 + 1f14: ae63 06e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 1f18: aee3 06f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 1f1c: a613 0040 macw %d3u,%d3l,%a3@,%d3,%acc1 + 1f20: a693 0050 macw %d3u,%d3l,%a3@,%d3,%acc3 + 1f24: a653 0040 macw %d3u,%a3l,%a3@,%a3,%acc1 + 1f28: a6d3 0050 macw %d3u,%a3l,%a3@,%a3,%acc3 + 1f2c: a613 0040 macw %d3u,%d3l,%a3@,%d3,%acc1 + 1f30: a693 0050 macw %d3u,%d3l,%a3@,%d3,%acc3 + 1f34: ae53 0040 macw %d3u,%spl,%a3@,%sp,%acc1 + 1f38: aed3 0050 macw %d3u,%spl,%a3@,%sp,%acc3 + 1f3c: a613 0060 macw %d3u,%d3l,%a3@&,%d3,%acc1 + 1f40: a693 0070 macw %d3u,%d3l,%a3@&,%d3,%acc3 + 1f44: a653 0060 macw %d3u,%a3l,%a3@&,%a3,%acc1 + 1f48: a6d3 0070 macw %d3u,%a3l,%a3@&,%a3,%acc3 + 1f4c: a613 0060 macw %d3u,%d3l,%a3@&,%d3,%acc1 + 1f50: a693 0070 macw %d3u,%d3l,%a3@&,%d3,%acc3 + 1f54: ae53 0060 macw %d3u,%spl,%a3@&,%sp,%acc1 + 1f58: aed3 0070 macw %d3u,%spl,%a3@&,%sp,%acc3 + 1f5c: a61a 0040 macw %a2u,%d3l,%a2@\+,%d3,%acc1 + 1f60: a69a 0050 macw %a2u,%d3l,%a2@\+,%d3,%acc3 + 1f64: a65a 0040 macw %a2u,%a3l,%a2@\+,%a3,%acc1 + 1f68: a6da 0050 macw %a2u,%a3l,%a2@\+,%a3,%acc3 + 1f6c: a61a 0040 macw %a2u,%d3l,%a2@\+,%d3,%acc1 + 1f70: a69a 0050 macw %a2u,%d3l,%a2@\+,%d3,%acc3 + 1f74: ae5a 0040 macw %a2u,%spl,%a2@\+,%sp,%acc1 + 1f78: aeda 0050 macw %a2u,%spl,%a2@\+,%sp,%acc3 + 1f7c: a61a 0060 macw %a2u,%d3l,%a2@\+&,%d3,%acc1 + 1f80: a69a 0070 macw %a2u,%d3l,%a2@\+&,%d3,%acc3 + 1f84: a65a 0060 macw %a2u,%a3l,%a2@\+&,%a3,%acc1 + 1f88: a6da 0070 macw %a2u,%a3l,%a2@\+&,%a3,%acc3 + 1f8c: a61a 0060 macw %a2u,%d3l,%a2@\+&,%d3,%acc1 + 1f90: a69a 0070 macw %a2u,%d3l,%a2@\+&,%d3,%acc3 + 1f94: ae5a 0060 macw %a2u,%spl,%a2@\+&,%sp,%acc1 + 1f98: aeda 0070 macw %a2u,%spl,%a2@\+&,%sp,%acc3 + 1f9c: a62e 0040 000a macw %fpu,%d3l,%fp@\(10\),%d3,%acc1 + 1fa2: a6ae 0050 000a macw %fpu,%d3l,%fp@\(10\),%d3,%acc3 + 1fa8: a66e 0040 000a macw %fpu,%a3l,%fp@\(10\),%a3,%acc1 + 1fae: a6ee 0050 000a macw %fpu,%a3l,%fp@\(10\),%a3,%acc3 + 1fb4: a62e 0040 000a macw %fpu,%d3l,%fp@\(10\),%d3,%acc1 + 1fba: a6ae 0050 000a macw %fpu,%d3l,%fp@\(10\),%d3,%acc3 + 1fc0: ae6e 0040 000a macw %fpu,%spl,%fp@\(10\),%sp,%acc1 + 1fc6: aeee 0050 000a macw %fpu,%spl,%fp@\(10\),%sp,%acc3 + 1fcc: a62e 0060 000a macw %fpu,%d3l,%fp@\(10\)&,%d3,%acc1 + 1fd2: a6ae 0070 000a macw %fpu,%d3l,%fp@\(10\)&,%d3,%acc3 + 1fd8: a66e 0060 000a macw %fpu,%a3l,%fp@\(10\)&,%a3,%acc1 + 1fde: a6ee 0070 000a macw %fpu,%a3l,%fp@\(10\)&,%a3,%acc3 + 1fe4: a62e 0060 000a macw %fpu,%d3l,%fp@\(10\)&,%d3,%acc1 + 1fea: a6ae 0070 000a macw %fpu,%d3l,%fp@\(10\)&,%d3,%acc3 + 1ff0: ae6e 0060 000a macw %fpu,%spl,%fp@\(10\)&,%sp,%acc1 + 1ff6: aeee 0070 000a macw %fpu,%spl,%fp@\(10\)&,%sp,%acc3 + 1ffc: a623 0040 macw %d3u,%d3l,%a3@-,%d3,%acc1 + 2000: a6a3 0050 macw %d3u,%d3l,%a3@-,%d3,%acc3 + 2004: a663 0040 macw %d3u,%a3l,%a3@-,%a3,%acc1 + 2008: a6e3 0050 macw %d3u,%a3l,%a3@-,%a3,%acc3 + 200c: a623 0040 macw %d3u,%d3l,%a3@-,%d3,%acc1 + 2010: a6a3 0050 macw %d3u,%d3l,%a3@-,%d3,%acc3 + 2014: ae63 0040 macw %d3u,%spl,%a3@-,%sp,%acc1 + 2018: aee3 0050 macw %d3u,%spl,%a3@-,%sp,%acc3 + 201c: a623 0060 macw %d3u,%d3l,%a3@-&,%d3,%acc1 + 2020: a6a3 0070 macw %d3u,%d3l,%a3@-&,%d3,%acc3 + 2024: a663 0060 macw %d3u,%a3l,%a3@-&,%a3,%acc1 + 2028: a6e3 0070 macw %d3u,%a3l,%a3@-&,%a3,%acc3 + 202c: a623 0060 macw %d3u,%d3l,%a3@-&,%d3,%acc1 + 2030: a6a3 0070 macw %d3u,%d3l,%a3@-&,%d3,%acc3 + 2034: ae63 0060 macw %d3u,%spl,%a3@-&,%sp,%acc1 + 2038: aee3 0070 macw %d3u,%spl,%a3@-&,%sp,%acc3 + 203c: a613 0240 macw %d3u,%d3l,>>,%a3@,%d3,%acc1 + 2040: a693 0250 macw %d3u,%d3l,>>,%a3@,%d3,%acc3 + 2044: a653 0240 macw %d3u,%a3l,>>,%a3@,%a3,%acc1 + 2048: a6d3 0250 macw %d3u,%a3l,>>,%a3@,%a3,%acc3 + 204c: a613 0240 macw %d3u,%d3l,>>,%a3@,%d3,%acc1 + 2050: a693 0250 macw %d3u,%d3l,>>,%a3@,%d3,%acc3 + 2054: ae53 0240 macw %d3u,%spl,>>,%a3@,%sp,%acc1 + 2058: aed3 0250 macw %d3u,%spl,>>,%a3@,%sp,%acc3 + 205c: a613 0260 macw %d3u,%d3l,>>,%a3@&,%d3,%acc1 + 2060: a693 0270 macw %d3u,%d3l,>>,%a3@&,%d3,%acc3 + 2064: a653 0260 macw %d3u,%a3l,>>,%a3@&,%a3,%acc1 + 2068: a6d3 0270 macw %d3u,%a3l,>>,%a3@&,%a3,%acc3 + 206c: a613 0260 macw %d3u,%d3l,>>,%a3@&,%d3,%acc1 + 2070: a693 0270 macw %d3u,%d3l,>>,%a3@&,%d3,%acc3 + 2074: ae53 0260 macw %d3u,%spl,>>,%a3@&,%sp,%acc1 + 2078: aed3 0270 macw %d3u,%spl,>>,%a3@&,%sp,%acc3 + 207c: a61a 0240 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc1 + 2080: a69a 0250 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc3 + 2084: a65a 0240 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc1 + 2088: a6da 0250 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc3 + 208c: a61a 0240 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc1 + 2090: a69a 0250 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc3 + 2094: ae5a 0240 macw %a2u,%spl,>>,%a2@\+,%sp,%acc1 + 2098: aeda 0250 macw %a2u,%spl,>>,%a2@\+,%sp,%acc3 + 209c: a61a 0260 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc1 + 20a0: a69a 0270 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc3 + 20a4: a65a 0260 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc1 + 20a8: a6da 0270 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc3 + 20ac: a61a 0260 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc1 + 20b0: a69a 0270 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc3 + 20b4: ae5a 0260 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc1 + 20b8: aeda 0270 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc3 + 20bc: a62e 0240 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 20c2: a6ae 0250 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 20c8: a66e 0240 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 20ce: a6ee 0250 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 20d4: a62e 0240 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 20da: a6ae 0250 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 20e0: ae6e 0240 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 20e6: aeee 0250 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 20ec: a62e 0260 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 20f2: a6ae 0270 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 20f8: a66e 0260 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 20fe: a6ee 0270 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 2104: a62e 0260 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 210a: a6ae 0270 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 2110: ae6e 0260 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 2116: aeee 0270 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 211c: a623 0240 macw %d3u,%d3l,>>,%a3@-,%d3,%acc1 + 2120: a6a3 0250 macw %d3u,%d3l,>>,%a3@-,%d3,%acc3 + 2124: a663 0240 macw %d3u,%a3l,>>,%a3@-,%a3,%acc1 + 2128: a6e3 0250 macw %d3u,%a3l,>>,%a3@-,%a3,%acc3 + 212c: a623 0240 macw %d3u,%d3l,>>,%a3@-,%d3,%acc1 + 2130: a6a3 0250 macw %d3u,%d3l,>>,%a3@-,%d3,%acc3 + 2134: ae63 0240 macw %d3u,%spl,>>,%a3@-,%sp,%acc1 + 2138: aee3 0250 macw %d3u,%spl,>>,%a3@-,%sp,%acc3 + 213c: a623 0260 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc1 + 2140: a6a3 0270 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc3 + 2144: a663 0260 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc1 + 2148: a6e3 0270 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc3 + 214c: a623 0260 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc1 + 2150: a6a3 0270 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc3 + 2154: ae63 0260 macw %d3u,%spl,>>,%a3@-&,%sp,%acc1 + 2158: aee3 0270 macw %d3u,%spl,>>,%a3@-&,%sp,%acc3 + 215c: a613 0640 macw %d3u,%d3l,>>,%a3@,%d3,%acc1 + 2160: a693 0650 macw %d3u,%d3l,>>,%a3@,%d3,%acc3 + 2164: a653 0640 macw %d3u,%a3l,>>,%a3@,%a3,%acc1 + 2168: a6d3 0650 macw %d3u,%a3l,>>,%a3@,%a3,%acc3 + 216c: a613 0640 macw %d3u,%d3l,>>,%a3@,%d3,%acc1 + 2170: a693 0650 macw %d3u,%d3l,>>,%a3@,%d3,%acc3 + 2174: ae53 0640 macw %d3u,%spl,>>,%a3@,%sp,%acc1 + 2178: aed3 0650 macw %d3u,%spl,>>,%a3@,%sp,%acc3 + 217c: a613 0660 macw %d3u,%d3l,>>,%a3@&,%d3,%acc1 + 2180: a693 0670 macw %d3u,%d3l,>>,%a3@&,%d3,%acc3 + 2184: a653 0660 macw %d3u,%a3l,>>,%a3@&,%a3,%acc1 + 2188: a6d3 0670 macw %d3u,%a3l,>>,%a3@&,%a3,%acc3 + 218c: a613 0660 macw %d3u,%d3l,>>,%a3@&,%d3,%acc1 + 2190: a693 0670 macw %d3u,%d3l,>>,%a3@&,%d3,%acc3 + 2194: ae53 0660 macw %d3u,%spl,>>,%a3@&,%sp,%acc1 + 2198: aed3 0670 macw %d3u,%spl,>>,%a3@&,%sp,%acc3 + 219c: a61a 0640 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc1 + 21a0: a69a 0650 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc3 + 21a4: a65a 0640 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc1 + 21a8: a6da 0650 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc3 + 21ac: a61a 0640 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc1 + 21b0: a69a 0650 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc3 + 21b4: ae5a 0640 macw %a2u,%spl,>>,%a2@\+,%sp,%acc1 + 21b8: aeda 0650 macw %a2u,%spl,>>,%a2@\+,%sp,%acc3 + 21bc: a61a 0660 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc1 + 21c0: a69a 0670 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc3 + 21c4: a65a 0660 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc1 + 21c8: a6da 0670 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc3 + 21cc: a61a 0660 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc1 + 21d0: a69a 0670 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc3 + 21d4: ae5a 0660 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc1 + 21d8: aeda 0670 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc3 + 21dc: a62e 0640 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 21e2: a6ae 0650 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 21e8: a66e 0640 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 21ee: a6ee 0650 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 21f4: a62e 0640 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 21fa: a6ae 0650 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 2200: ae6e 0640 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 2206: aeee 0650 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 220c: a62e 0660 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 2212: a6ae 0670 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 2218: a66e 0660 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 221e: a6ee 0670 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 2224: a62e 0660 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 222a: a6ae 0670 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 2230: ae6e 0660 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 2236: aeee 0670 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 223c: a623 0640 macw %d3u,%d3l,>>,%a3@-,%d3,%acc1 + 2240: a6a3 0650 macw %d3u,%d3l,>>,%a3@-,%d3,%acc3 + 2244: a663 0640 macw %d3u,%a3l,>>,%a3@-,%a3,%acc1 + 2248: a6e3 0650 macw %d3u,%a3l,>>,%a3@-,%a3,%acc3 + 224c: a623 0640 macw %d3u,%d3l,>>,%a3@-,%d3,%acc1 + 2250: a6a3 0650 macw %d3u,%d3l,>>,%a3@-,%d3,%acc3 + 2254: ae63 0640 macw %d3u,%spl,>>,%a3@-,%sp,%acc1 + 2258: aee3 0650 macw %d3u,%spl,>>,%a3@-,%sp,%acc3 + 225c: a623 0660 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc1 + 2260: a6a3 0670 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc3 + 2264: a663 0660 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc1 + 2268: a6e3 0670 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc3 + 226c: a623 0660 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc1 + 2270: a6a3 0670 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc3 + 2274: ae63 0660 macw %d3u,%spl,>>,%a3@-&,%sp,%acc1 + 2278: aee3 0670 macw %d3u,%spl,>>,%a3@-&,%sp,%acc3 + 227c: a613 0240 macw %d3u,%d3l,>>,%a3@,%d3,%acc1 + 2280: a693 0250 macw %d3u,%d3l,>>,%a3@,%d3,%acc3 + 2284: a653 0240 macw %d3u,%a3l,>>,%a3@,%a3,%acc1 + 2288: a6d3 0250 macw %d3u,%a3l,>>,%a3@,%a3,%acc3 + 228c: a613 0240 macw %d3u,%d3l,>>,%a3@,%d3,%acc1 + 2290: a693 0250 macw %d3u,%d3l,>>,%a3@,%d3,%acc3 + 2294: ae53 0240 macw %d3u,%spl,>>,%a3@,%sp,%acc1 + 2298: aed3 0250 macw %d3u,%spl,>>,%a3@,%sp,%acc3 + 229c: a613 0260 macw %d3u,%d3l,>>,%a3@&,%d3,%acc1 + 22a0: a693 0270 macw %d3u,%d3l,>>,%a3@&,%d3,%acc3 + 22a4: a653 0260 macw %d3u,%a3l,>>,%a3@&,%a3,%acc1 + 22a8: a6d3 0270 macw %d3u,%a3l,>>,%a3@&,%a3,%acc3 + 22ac: a613 0260 macw %d3u,%d3l,>>,%a3@&,%d3,%acc1 + 22b0: a693 0270 macw %d3u,%d3l,>>,%a3@&,%d3,%acc3 + 22b4: ae53 0260 macw %d3u,%spl,>>,%a3@&,%sp,%acc1 + 22b8: aed3 0270 macw %d3u,%spl,>>,%a3@&,%sp,%acc3 + 22bc: a61a 0240 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc1 + 22c0: a69a 0250 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc3 + 22c4: a65a 0240 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc1 + 22c8: a6da 0250 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc3 + 22cc: a61a 0240 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc1 + 22d0: a69a 0250 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc3 + 22d4: ae5a 0240 macw %a2u,%spl,>>,%a2@\+,%sp,%acc1 + 22d8: aeda 0250 macw %a2u,%spl,>>,%a2@\+,%sp,%acc3 + 22dc: a61a 0260 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc1 + 22e0: a69a 0270 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc3 + 22e4: a65a 0260 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc1 + 22e8: a6da 0270 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc3 + 22ec: a61a 0260 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc1 + 22f0: a69a 0270 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc3 + 22f4: ae5a 0260 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc1 + 22f8: aeda 0270 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc3 + 22fc: a62e 0240 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 2302: a6ae 0250 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 2308: a66e 0240 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 230e: a6ee 0250 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 2314: a62e 0240 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 231a: a6ae 0250 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 2320: ae6e 0240 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 2326: aeee 0250 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 232c: a62e 0260 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 2332: a6ae 0270 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 2338: a66e 0260 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 233e: a6ee 0270 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 2344: a62e 0260 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 234a: a6ae 0270 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 2350: ae6e 0260 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 2356: aeee 0270 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 235c: a623 0240 macw %d3u,%d3l,>>,%a3@-,%d3,%acc1 + 2360: a6a3 0250 macw %d3u,%d3l,>>,%a3@-,%d3,%acc3 + 2364: a663 0240 macw %d3u,%a3l,>>,%a3@-,%a3,%acc1 + 2368: a6e3 0250 macw %d3u,%a3l,>>,%a3@-,%a3,%acc3 + 236c: a623 0240 macw %d3u,%d3l,>>,%a3@-,%d3,%acc1 + 2370: a6a3 0250 macw %d3u,%d3l,>>,%a3@-,%d3,%acc3 + 2374: ae63 0240 macw %d3u,%spl,>>,%a3@-,%sp,%acc1 + 2378: aee3 0250 macw %d3u,%spl,>>,%a3@-,%sp,%acc3 + 237c: a623 0260 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc1 + 2380: a6a3 0270 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc3 + 2384: a663 0260 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc1 + 2388: a6e3 0270 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc3 + 238c: a623 0260 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc1 + 2390: a6a3 0270 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc3 + 2394: ae63 0260 macw %d3u,%spl,>>,%a3@-&,%sp,%acc1 + 2398: aee3 0270 macw %d3u,%spl,>>,%a3@-&,%sp,%acc3 + 239c: a613 0640 macw %d3u,%d3l,>>,%a3@,%d3,%acc1 + 23a0: a693 0650 macw %d3u,%d3l,>>,%a3@,%d3,%acc3 + 23a4: a653 0640 macw %d3u,%a3l,>>,%a3@,%a3,%acc1 + 23a8: a6d3 0650 macw %d3u,%a3l,>>,%a3@,%a3,%acc3 + 23ac: a613 0640 macw %d3u,%d3l,>>,%a3@,%d3,%acc1 + 23b0: a693 0650 macw %d3u,%d3l,>>,%a3@,%d3,%acc3 + 23b4: ae53 0640 macw %d3u,%spl,>>,%a3@,%sp,%acc1 + 23b8: aed3 0650 macw %d3u,%spl,>>,%a3@,%sp,%acc3 + 23bc: a613 0660 macw %d3u,%d3l,>>,%a3@&,%d3,%acc1 + 23c0: a693 0670 macw %d3u,%d3l,>>,%a3@&,%d3,%acc3 + 23c4: a653 0660 macw %d3u,%a3l,>>,%a3@&,%a3,%acc1 + 23c8: a6d3 0670 macw %d3u,%a3l,>>,%a3@&,%a3,%acc3 + 23cc: a613 0660 macw %d3u,%d3l,>>,%a3@&,%d3,%acc1 + 23d0: a693 0670 macw %d3u,%d3l,>>,%a3@&,%d3,%acc3 + 23d4: ae53 0660 macw %d3u,%spl,>>,%a3@&,%sp,%acc1 + 23d8: aed3 0670 macw %d3u,%spl,>>,%a3@&,%sp,%acc3 + 23dc: a61a 0640 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc1 + 23e0: a69a 0650 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc3 + 23e4: a65a 0640 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc1 + 23e8: a6da 0650 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc3 + 23ec: a61a 0640 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc1 + 23f0: a69a 0650 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc3 + 23f4: ae5a 0640 macw %a2u,%spl,>>,%a2@\+,%sp,%acc1 + 23f8: aeda 0650 macw %a2u,%spl,>>,%a2@\+,%sp,%acc3 + 23fc: a61a 0660 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc1 + 2400: a69a 0670 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc3 + 2404: a65a 0660 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc1 + 2408: a6da 0670 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc3 + 240c: a61a 0660 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc1 + 2410: a69a 0670 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc3 + 2414: ae5a 0660 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc1 + 2418: aeda 0670 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc3 + 241c: a62e 0640 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 2422: a6ae 0650 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 2428: a66e 0640 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 242e: a6ee 0650 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 2434: a62e 0640 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 243a: a6ae 0650 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 2440: ae6e 0640 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 2446: aeee 0650 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 244c: a62e 0660 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 2452: a6ae 0670 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 2458: a66e 0660 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 245e: a6ee 0670 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 2464: a62e 0660 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 246a: a6ae 0670 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 2470: ae6e 0660 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 2476: aeee 0670 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 247c: a623 0640 macw %d3u,%d3l,>>,%a3@-,%d3,%acc1 + 2480: a6a3 0650 macw %d3u,%d3l,>>,%a3@-,%d3,%acc3 + 2484: a663 0640 macw %d3u,%a3l,>>,%a3@-,%a3,%acc1 + 2488: a6e3 0650 macw %d3u,%a3l,>>,%a3@-,%a3,%acc3 + 248c: a623 0640 macw %d3u,%d3l,>>,%a3@-,%d3,%acc1 + 2490: a6a3 0650 macw %d3u,%d3l,>>,%a3@-,%d3,%acc3 + 2494: ae63 0640 macw %d3u,%spl,>>,%a3@-,%sp,%acc1 + 2498: aee3 0650 macw %d3u,%spl,>>,%a3@-,%sp,%acc3 + 249c: a623 0660 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc1 + 24a0: a6a3 0670 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc3 + 24a4: a663 0660 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc1 + 24a8: a6e3 0670 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc3 + 24ac: a623 0660 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc1 + 24b0: a6a3 0670 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc3 + 24b4: ae63 0660 macw %d3u,%spl,>>,%a3@-&,%sp,%acc1 + 24b8: aee3 0670 macw %d3u,%spl,>>,%a3@-&,%sp,%acc3 + 24bc: ae53 00c0 macw %d3u,%spu,%a3@,%sp,%acc1 + 24c0: aed3 00d0 macw %d3u,%spu,%a3@,%sp,%acc3 + 24c4: ae53 00c0 macw %d3u,%spu,%a3@,%sp,%acc1 + 24c8: aed3 00d0 macw %d3u,%spu,%a3@,%sp,%acc3 + 24cc: ae53 00c0 macw %d3u,%spu,%a3@,%sp,%acc1 + 24d0: aed3 00d0 macw %d3u,%spu,%a3@,%sp,%acc3 + 24d4: ae53 00c0 macw %d3u,%spu,%a3@,%sp,%acc1 + 24d8: aed3 00d0 macw %d3u,%spu,%a3@,%sp,%acc3 + 24dc: ae53 00e0 macw %d3u,%spu,%a3@&,%sp,%acc1 + 24e0: aed3 00f0 macw %d3u,%spu,%a3@&,%sp,%acc3 + 24e4: ae53 00e0 macw %d3u,%spu,%a3@&,%sp,%acc1 + 24e8: aed3 00f0 macw %d3u,%spu,%a3@&,%sp,%acc3 + 24ec: ae53 00e0 macw %d3u,%spu,%a3@&,%sp,%acc1 + 24f0: aed3 00f0 macw %d3u,%spu,%a3@&,%sp,%acc3 + 24f4: ae53 00e0 macw %d3u,%spu,%a3@&,%sp,%acc1 + 24f8: aed3 00f0 macw %d3u,%spu,%a3@&,%sp,%acc3 + 24fc: ae5a 00c0 macw %a2u,%spu,%a2@\+,%sp,%acc1 + 2500: aeda 00d0 macw %a2u,%spu,%a2@\+,%sp,%acc3 + 2504: ae5a 00c0 macw %a2u,%spu,%a2@\+,%sp,%acc1 + 2508: aeda 00d0 macw %a2u,%spu,%a2@\+,%sp,%acc3 + 250c: ae5a 00c0 macw %a2u,%spu,%a2@\+,%sp,%acc1 + 2510: aeda 00d0 macw %a2u,%spu,%a2@\+,%sp,%acc3 + 2514: ae5a 00c0 macw %a2u,%spu,%a2@\+,%sp,%acc1 + 2518: aeda 00d0 macw %a2u,%spu,%a2@\+,%sp,%acc3 + 251c: ae5a 00e0 macw %a2u,%spu,%a2@\+&,%sp,%acc1 + 2520: aeda 00f0 macw %a2u,%spu,%a2@\+&,%sp,%acc3 + 2524: ae5a 00e0 macw %a2u,%spu,%a2@\+&,%sp,%acc1 + 2528: aeda 00f0 macw %a2u,%spu,%a2@\+&,%sp,%acc3 + 252c: ae5a 00e0 macw %a2u,%spu,%a2@\+&,%sp,%acc1 + 2530: aeda 00f0 macw %a2u,%spu,%a2@\+&,%sp,%acc3 + 2534: ae5a 00e0 macw %a2u,%spu,%a2@\+&,%sp,%acc1 + 2538: aeda 00f0 macw %a2u,%spu,%a2@\+&,%sp,%acc3 + 253c: ae6e 00c0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc1 + 2542: aeee 00d0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc3 + 2548: ae6e 00c0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc1 + 254e: aeee 00d0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc3 + 2554: ae6e 00c0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc1 + 255a: aeee 00d0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc3 + 2560: ae6e 00c0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc1 + 2566: aeee 00d0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc3 + 256c: ae6e 00e0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc1 + 2572: aeee 00f0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc3 + 2578: ae6e 00e0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc1 + 257e: aeee 00f0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc3 + 2584: ae6e 00e0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc1 + 258a: aeee 00f0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc3 + 2590: ae6e 00e0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc1 + 2596: aeee 00f0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc3 + 259c: ae63 00c0 macw %d3u,%spu,%a3@-,%sp,%acc1 + 25a0: aee3 00d0 macw %d3u,%spu,%a3@-,%sp,%acc3 + 25a4: ae63 00c0 macw %d3u,%spu,%a3@-,%sp,%acc1 + 25a8: aee3 00d0 macw %d3u,%spu,%a3@-,%sp,%acc3 + 25ac: ae63 00c0 macw %d3u,%spu,%a3@-,%sp,%acc1 + 25b0: aee3 00d0 macw %d3u,%spu,%a3@-,%sp,%acc3 + 25b4: ae63 00c0 macw %d3u,%spu,%a3@-,%sp,%acc1 + 25b8: aee3 00d0 macw %d3u,%spu,%a3@-,%sp,%acc3 + 25bc: ae63 00e0 macw %d3u,%spu,%a3@-&,%sp,%acc1 + 25c0: aee3 00f0 macw %d3u,%spu,%a3@-&,%sp,%acc3 + 25c4: ae63 00e0 macw %d3u,%spu,%a3@-&,%sp,%acc1 + 25c8: aee3 00f0 macw %d3u,%spu,%a3@-&,%sp,%acc3 + 25cc: ae63 00e0 macw %d3u,%spu,%a3@-&,%sp,%acc1 + 25d0: aee3 00f0 macw %d3u,%spu,%a3@-&,%sp,%acc3 + 25d4: ae63 00e0 macw %d3u,%spu,%a3@-&,%sp,%acc1 + 25d8: aee3 00f0 macw %d3u,%spu,%a3@-&,%sp,%acc3 + 25dc: ae53 02c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 25e0: aed3 02d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 25e4: ae53 02c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 25e8: aed3 02d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 25ec: ae53 02c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 25f0: aed3 02d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 25f4: ae53 02c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 25f8: aed3 02d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 25fc: ae53 02e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2600: aed3 02f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 2604: ae53 02e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2608: aed3 02f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 260c: ae53 02e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2610: aed3 02f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 2614: ae53 02e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2618: aed3 02f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 261c: ae5a 02c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2620: aeda 02d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 2624: ae5a 02c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2628: aeda 02d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 262c: ae5a 02c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2630: aeda 02d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 2634: ae5a 02c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2638: aeda 02d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 263c: ae5a 02e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 2640: aeda 02f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 2644: ae5a 02e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 2648: aeda 02f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 264c: ae5a 02e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 2650: aeda 02f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 2654: ae5a 02e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 2658: aeda 02f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 265c: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 2662: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 2668: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 266e: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 2674: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 267a: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 2680: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 2686: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 268c: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 2692: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 2698: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 269e: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 26a4: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 26aa: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 26b0: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 26b6: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 26bc: ae63 02c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 26c0: aee3 02d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 26c4: ae63 02c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 26c8: aee3 02d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 26cc: ae63 02c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 26d0: aee3 02d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 26d4: ae63 02c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 26d8: aee3 02d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 26dc: ae63 02e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 26e0: aee3 02f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 26e4: ae63 02e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 26e8: aee3 02f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 26ec: ae63 02e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 26f0: aee3 02f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 26f4: ae63 02e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 26f8: aee3 02f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 26fc: ae53 06c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 2700: aed3 06d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 2704: ae53 06c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 2708: aed3 06d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 270c: ae53 06c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 2710: aed3 06d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 2714: ae53 06c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 2718: aed3 06d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 271c: ae53 06e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2720: aed3 06f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 2724: ae53 06e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2728: aed3 06f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 272c: ae53 06e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2730: aed3 06f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 2734: ae53 06e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2738: aed3 06f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 273c: ae5a 06c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2740: aeda 06d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 2744: ae5a 06c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2748: aeda 06d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 274c: ae5a 06c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2750: aeda 06d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 2754: ae5a 06c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2758: aeda 06d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 275c: ae5a 06e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 2760: aeda 06f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 2764: ae5a 06e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 2768: aeda 06f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 276c: ae5a 06e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 2770: aeda 06f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 2774: ae5a 06e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 2778: aeda 06f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 277c: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 2782: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 2788: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 278e: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 2794: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 279a: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 27a0: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 27a6: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 27ac: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 27b2: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 27b8: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 27be: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 27c4: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 27ca: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 27d0: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 27d6: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 27dc: ae63 06c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 27e0: aee3 06d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 27e4: ae63 06c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 27e8: aee3 06d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 27ec: ae63 06c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 27f0: aee3 06d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 27f4: ae63 06c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 27f8: aee3 06d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 27fc: ae63 06e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 2800: aee3 06f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 2804: ae63 06e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 2808: aee3 06f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 280c: ae63 06e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 2810: aee3 06f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 2814: ae63 06e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 2818: aee3 06f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 281c: ae53 02c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 2820: aed3 02d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 2824: ae53 02c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 2828: aed3 02d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 282c: ae53 02c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 2830: aed3 02d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 2834: ae53 02c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 2838: aed3 02d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 283c: ae53 02e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2840: aed3 02f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 2844: ae53 02e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2848: aed3 02f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 284c: ae53 02e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2850: aed3 02f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 2854: ae53 02e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2858: aed3 02f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 285c: ae5a 02c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2860: aeda 02d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 2864: ae5a 02c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2868: aeda 02d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 286c: ae5a 02c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2870: aeda 02d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 2874: ae5a 02c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2878: aeda 02d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 287c: ae5a 02e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 2880: aeda 02f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 2884: ae5a 02e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 2888: aeda 02f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 288c: ae5a 02e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 2890: aeda 02f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 2894: ae5a 02e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 2898: aeda 02f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 289c: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 28a2: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 28a8: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 28ae: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 28b4: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 28ba: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 28c0: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 28c6: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 28cc: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 28d2: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 28d8: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 28de: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 28e4: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 28ea: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 28f0: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 28f6: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 28fc: ae63 02c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 2900: aee3 02d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 2904: ae63 02c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 2908: aee3 02d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 290c: ae63 02c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 2910: aee3 02d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 2914: ae63 02c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 2918: aee3 02d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 291c: ae63 02e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 2920: aee3 02f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 2924: ae63 02e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 2928: aee3 02f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 292c: ae63 02e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 2930: aee3 02f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 2934: ae63 02e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 2938: aee3 02f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 293c: ae53 06c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 2940: aed3 06d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 2944: ae53 06c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 2948: aed3 06d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 294c: ae53 06c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 2950: aed3 06d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 2954: ae53 06c0 macw %d3u,%spu,>>,%a3@,%sp,%acc1 + 2958: aed3 06d0 macw %d3u,%spu,>>,%a3@,%sp,%acc3 + 295c: ae53 06e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2960: aed3 06f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 2964: ae53 06e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2968: aed3 06f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 296c: ae53 06e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2970: aed3 06f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 2974: ae53 06e0 macw %d3u,%spu,>>,%a3@&,%sp,%acc1 + 2978: aed3 06f0 macw %d3u,%spu,>>,%a3@&,%sp,%acc3 + 297c: ae5a 06c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2980: aeda 06d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 2984: ae5a 06c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2988: aeda 06d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 298c: ae5a 06c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2990: aeda 06d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 2994: ae5a 06c0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc1 + 2998: aeda 06d0 macw %a2u,%spu,>>,%a2@\+,%sp,%acc3 + 299c: ae5a 06e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 29a0: aeda 06f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 29a4: ae5a 06e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 29a8: aeda 06f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 29ac: ae5a 06e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 29b0: aeda 06f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 29b4: ae5a 06e0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc1 + 29b8: aeda 06f0 macw %a2u,%spu,>>,%a2@\+&,%sp,%acc3 + 29bc: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 29c2: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 29c8: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 29ce: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 29d4: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 29da: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 29e0: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 29e6: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 29ec: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 29f2: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 29f8: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 29fe: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 2a04: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 2a0a: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 2a10: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 2a16: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 2a1c: ae63 06c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 2a20: aee3 06d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 2a24: ae63 06c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 2a28: aee3 06d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 2a2c: ae63 06c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 2a30: aee3 06d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 2a34: ae63 06c0 macw %d3u,%spu,>>,%a3@-,%sp,%acc1 + 2a38: aee3 06d0 macw %d3u,%spu,>>,%a3@-,%sp,%acc3 + 2a3c: ae63 06e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 2a40: aee3 06f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 2a44: ae63 06e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 2a48: aee3 06f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 2a4c: ae63 06e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 2a50: aee3 06f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 2a54: ae63 06e0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc1 + 2a58: aee3 06f0 macw %d3u,%spu,>>,%a3@-&,%sp,%acc3 + 2a5c: a213 0040 macw %d3u,%d1l,%a3@,%d1,%acc1 + 2a60: a293 0050 macw %d3u,%d1l,%a3@,%d1,%acc3 + 2a64: a653 0040 macw %d3u,%a3l,%a3@,%a3,%acc1 + 2a68: a6d3 0050 macw %d3u,%a3l,%a3@,%a3,%acc3 + 2a6c: a613 0040 macw %d3u,%d3l,%a3@,%d3,%acc1 + 2a70: a693 0050 macw %d3u,%d3l,%a3@,%d3,%acc3 + 2a74: ae53 0040 macw %d3u,%spl,%a3@,%sp,%acc1 + 2a78: aed3 0050 macw %d3u,%spl,%a3@,%sp,%acc3 + 2a7c: a213 0060 macw %d3u,%d1l,%a3@&,%d1,%acc1 + 2a80: a293 0070 macw %d3u,%d1l,%a3@&,%d1,%acc3 + 2a84: a653 0060 macw %d3u,%a3l,%a3@&,%a3,%acc1 + 2a88: a6d3 0070 macw %d3u,%a3l,%a3@&,%a3,%acc3 + 2a8c: a613 0060 macw %d3u,%d3l,%a3@&,%d3,%acc1 + 2a90: a693 0070 macw %d3u,%d3l,%a3@&,%d3,%acc3 + 2a94: ae53 0060 macw %d3u,%spl,%a3@&,%sp,%acc1 + 2a98: aed3 0070 macw %d3u,%spl,%a3@&,%sp,%acc3 + 2a9c: a21a 0040 macw %a2u,%d1l,%a2@\+,%d1,%acc1 + 2aa0: a29a 0050 macw %a2u,%d1l,%a2@\+,%d1,%acc3 + 2aa4: a65a 0040 macw %a2u,%a3l,%a2@\+,%a3,%acc1 + 2aa8: a6da 0050 macw %a2u,%a3l,%a2@\+,%a3,%acc3 + 2aac: a61a 0040 macw %a2u,%d3l,%a2@\+,%d3,%acc1 + 2ab0: a69a 0050 macw %a2u,%d3l,%a2@\+,%d3,%acc3 + 2ab4: ae5a 0040 macw %a2u,%spl,%a2@\+,%sp,%acc1 + 2ab8: aeda 0050 macw %a2u,%spl,%a2@\+,%sp,%acc3 + 2abc: a21a 0060 macw %a2u,%d1l,%a2@\+&,%d1,%acc1 + 2ac0: a29a 0070 macw %a2u,%d1l,%a2@\+&,%d1,%acc3 + 2ac4: a65a 0060 macw %a2u,%a3l,%a2@\+&,%a3,%acc1 + 2ac8: a6da 0070 macw %a2u,%a3l,%a2@\+&,%a3,%acc3 + 2acc: a61a 0060 macw %a2u,%d3l,%a2@\+&,%d3,%acc1 + 2ad0: a69a 0070 macw %a2u,%d3l,%a2@\+&,%d3,%acc3 + 2ad4: ae5a 0060 macw %a2u,%spl,%a2@\+&,%sp,%acc1 + 2ad8: aeda 0070 macw %a2u,%spl,%a2@\+&,%sp,%acc3 + 2adc: a22e 0040 000a macw %fpu,%d1l,%fp@\(10\),%d1,%acc1 + 2ae2: a2ae 0050 000a macw %fpu,%d1l,%fp@\(10\),%d1,%acc3 + 2ae8: a66e 0040 000a macw %fpu,%a3l,%fp@\(10\),%a3,%acc1 + 2aee: a6ee 0050 000a macw %fpu,%a3l,%fp@\(10\),%a3,%acc3 + 2af4: a62e 0040 000a macw %fpu,%d3l,%fp@\(10\),%d3,%acc1 + 2afa: a6ae 0050 000a macw %fpu,%d3l,%fp@\(10\),%d3,%acc3 + 2b00: ae6e 0040 000a macw %fpu,%spl,%fp@\(10\),%sp,%acc1 + 2b06: aeee 0050 000a macw %fpu,%spl,%fp@\(10\),%sp,%acc3 + 2b0c: a22e 0060 000a macw %fpu,%d1l,%fp@\(10\)&,%d1,%acc1 + 2b12: a2ae 0070 000a macw %fpu,%d1l,%fp@\(10\)&,%d1,%acc3 + 2b18: a66e 0060 000a macw %fpu,%a3l,%fp@\(10\)&,%a3,%acc1 + 2b1e: a6ee 0070 000a macw %fpu,%a3l,%fp@\(10\)&,%a3,%acc3 + 2b24: a62e 0060 000a macw %fpu,%d3l,%fp@\(10\)&,%d3,%acc1 + 2b2a: a6ae 0070 000a macw %fpu,%d3l,%fp@\(10\)&,%d3,%acc3 + 2b30: ae6e 0060 000a macw %fpu,%spl,%fp@\(10\)&,%sp,%acc1 + 2b36: aeee 0070 000a macw %fpu,%spl,%fp@\(10\)&,%sp,%acc3 + 2b3c: a223 0040 macw %d3u,%d1l,%a3@-,%d1,%acc1 + 2b40: a2a3 0050 macw %d3u,%d1l,%a3@-,%d1,%acc3 + 2b44: a663 0040 macw %d3u,%a3l,%a3@-,%a3,%acc1 + 2b48: a6e3 0050 macw %d3u,%a3l,%a3@-,%a3,%acc3 + 2b4c: a623 0040 macw %d3u,%d3l,%a3@-,%d3,%acc1 + 2b50: a6a3 0050 macw %d3u,%d3l,%a3@-,%d3,%acc3 + 2b54: ae63 0040 macw %d3u,%spl,%a3@-,%sp,%acc1 + 2b58: aee3 0050 macw %d3u,%spl,%a3@-,%sp,%acc3 + 2b5c: a223 0060 macw %d3u,%d1l,%a3@-&,%d1,%acc1 + 2b60: a2a3 0070 macw %d3u,%d1l,%a3@-&,%d1,%acc3 + 2b64: a663 0060 macw %d3u,%a3l,%a3@-&,%a3,%acc1 + 2b68: a6e3 0070 macw %d3u,%a3l,%a3@-&,%a3,%acc3 + 2b6c: a623 0060 macw %d3u,%d3l,%a3@-&,%d3,%acc1 + 2b70: a6a3 0070 macw %d3u,%d3l,%a3@-&,%d3,%acc3 + 2b74: ae63 0060 macw %d3u,%spl,%a3@-&,%sp,%acc1 + 2b78: aee3 0070 macw %d3u,%spl,%a3@-&,%sp,%acc3 + 2b7c: a213 0240 macw %d3u,%d1l,<<,%a3@,%d1,%acc1 + 2b80: a293 0250 macw %d3u,%d1l,<<,%a3@,%d1,%acc3 + 2b84: a653 0240 macw %d3u,%a3l,>>,%a3@,%a3,%acc1 + 2b88: a6d3 0250 macw %d3u,%a3l,>>,%a3@,%a3,%acc3 + 2b8c: a613 0240 macw %d3u,%d3l,>>,%a3@,%d3,%acc1 + 2b90: a693 0250 macw %d3u,%d3l,>>,%a3@,%d3,%acc3 + 2b94: ae53 0240 macw %d3u,%spl,>>,%a3@,%sp,%acc1 + 2b98: aed3 0250 macw %d3u,%spl,>>,%a3@,%sp,%acc3 + 2b9c: a213 0260 macw %d3u,%d1l,<<,%a3@&,%d1,%acc1 + 2ba0: a293 0270 macw %d3u,%d1l,<<,%a3@&,%d1,%acc3 + 2ba4: a653 0260 macw %d3u,%a3l,>>,%a3@&,%a3,%acc1 + 2ba8: a6d3 0270 macw %d3u,%a3l,>>,%a3@&,%a3,%acc3 + 2bac: a613 0260 macw %d3u,%d3l,>>,%a3@&,%d3,%acc1 + 2bb0: a693 0270 macw %d3u,%d3l,>>,%a3@&,%d3,%acc3 + 2bb4: ae53 0260 macw %d3u,%spl,>>,%a3@&,%sp,%acc1 + 2bb8: aed3 0270 macw %d3u,%spl,>>,%a3@&,%sp,%acc3 + 2bbc: a21a 0240 macw %a2u,%d1l,<<,%a2@\+,%d1,%acc1 + 2bc0: a29a 0250 macw %a2u,%d1l,<<,%a2@\+,%d1,%acc3 + 2bc4: a65a 0240 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc1 + 2bc8: a6da 0250 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc3 + 2bcc: a61a 0240 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc1 + 2bd0: a69a 0250 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc3 + 2bd4: ae5a 0240 macw %a2u,%spl,>>,%a2@\+,%sp,%acc1 + 2bd8: aeda 0250 macw %a2u,%spl,>>,%a2@\+,%sp,%acc3 + 2bdc: a21a 0260 macw %a2u,%d1l,<<,%a2@\+&,%d1,%acc1 + 2be0: a29a 0270 macw %a2u,%d1l,<<,%a2@\+&,%d1,%acc3 + 2be4: a65a 0260 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc1 + 2be8: a6da 0270 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc3 + 2bec: a61a 0260 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc1 + 2bf0: a69a 0270 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc3 + 2bf4: ae5a 0260 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc1 + 2bf8: aeda 0270 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc3 + 2bfc: a22e 0240 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc1 + 2c02: a2ae 0250 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc3 + 2c08: a66e 0240 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 2c0e: a6ee 0250 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 2c14: a62e 0240 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 2c1a: a6ae 0250 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 2c20: ae6e 0240 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 2c26: aeee 0250 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 2c2c: a22e 0260 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc1 + 2c32: a2ae 0270 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc3 + 2c38: a66e 0260 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 2c3e: a6ee 0270 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 2c44: a62e 0260 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 2c4a: a6ae 0270 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 2c50: ae6e 0260 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 2c56: aeee 0270 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 2c5c: a223 0240 macw %d3u,%d1l,<<,%a3@-,%d1,%acc1 + 2c60: a2a3 0250 macw %d3u,%d1l,<<,%a3@-,%d1,%acc3 + 2c64: a663 0240 macw %d3u,%a3l,>>,%a3@-,%a3,%acc1 + 2c68: a6e3 0250 macw %d3u,%a3l,>>,%a3@-,%a3,%acc3 + 2c6c: a623 0240 macw %d3u,%d3l,>>,%a3@-,%d3,%acc1 + 2c70: a6a3 0250 macw %d3u,%d3l,>>,%a3@-,%d3,%acc3 + 2c74: ae63 0240 macw %d3u,%spl,>>,%a3@-,%sp,%acc1 + 2c78: aee3 0250 macw %d3u,%spl,>>,%a3@-,%sp,%acc3 + 2c7c: a223 0260 macw %d3u,%d1l,<<,%a3@-&,%d1,%acc1 + 2c80: a2a3 0270 macw %d3u,%d1l,<<,%a3@-&,%d1,%acc3 + 2c84: a663 0260 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc1 + 2c88: a6e3 0270 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc3 + 2c8c: a623 0260 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc1 + 2c90: a6a3 0270 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc3 + 2c94: ae63 0260 macw %d3u,%spl,>>,%a3@-&,%sp,%acc1 + 2c98: aee3 0270 macw %d3u,%spl,>>,%a3@-&,%sp,%acc3 + 2c9c: a213 0640 macw %d3u,%d1l,<<,%a3@,%d1,%acc1 + 2ca0: a293 0650 macw %d3u,%d1l,<<,%a3@,%d1,%acc3 + 2ca4: a653 0640 macw %d3u,%a3l,>>,%a3@,%a3,%acc1 + 2ca8: a6d3 0650 macw %d3u,%a3l,>>,%a3@,%a3,%acc3 + 2cac: a613 0640 macw %d3u,%d3l,>>,%a3@,%d3,%acc1 + 2cb0: a693 0650 macw %d3u,%d3l,>>,%a3@,%d3,%acc3 + 2cb4: ae53 0640 macw %d3u,%spl,>>,%a3@,%sp,%acc1 + 2cb8: aed3 0650 macw %d3u,%spl,>>,%a3@,%sp,%acc3 + 2cbc: a213 0660 macw %d3u,%d1l,<<,%a3@&,%d1,%acc1 + 2cc0: a293 0670 macw %d3u,%d1l,<<,%a3@&,%d1,%acc3 + 2cc4: a653 0660 macw %d3u,%a3l,>>,%a3@&,%a3,%acc1 + 2cc8: a6d3 0670 macw %d3u,%a3l,>>,%a3@&,%a3,%acc3 + 2ccc: a613 0660 macw %d3u,%d3l,>>,%a3@&,%d3,%acc1 + 2cd0: a693 0670 macw %d3u,%d3l,>>,%a3@&,%d3,%acc3 + 2cd4: ae53 0660 macw %d3u,%spl,>>,%a3@&,%sp,%acc1 + 2cd8: aed3 0670 macw %d3u,%spl,>>,%a3@&,%sp,%acc3 + 2cdc: a21a 0640 macw %a2u,%d1l,<<,%a2@\+,%d1,%acc1 + 2ce0: a29a 0650 macw %a2u,%d1l,<<,%a2@\+,%d1,%acc3 + 2ce4: a65a 0640 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc1 + 2ce8: a6da 0650 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc3 + 2cec: a61a 0640 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc1 + 2cf0: a69a 0650 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc3 + 2cf4: ae5a 0640 macw %a2u,%spl,>>,%a2@\+,%sp,%acc1 + 2cf8: aeda 0650 macw %a2u,%spl,>>,%a2@\+,%sp,%acc3 + 2cfc: a21a 0660 macw %a2u,%d1l,<<,%a2@\+&,%d1,%acc1 + 2d00: a29a 0670 macw %a2u,%d1l,<<,%a2@\+&,%d1,%acc3 + 2d04: a65a 0660 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc1 + 2d08: a6da 0670 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc3 + 2d0c: a61a 0660 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc1 + 2d10: a69a 0670 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc3 + 2d14: ae5a 0660 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc1 + 2d18: aeda 0670 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc3 + 2d1c: a22e 0640 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc1 + 2d22: a2ae 0650 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc3 + 2d28: a66e 0640 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 2d2e: a6ee 0650 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 2d34: a62e 0640 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 2d3a: a6ae 0650 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 2d40: ae6e 0640 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 2d46: aeee 0650 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 2d4c: a22e 0660 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc1 + 2d52: a2ae 0670 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc3 + 2d58: a66e 0660 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 2d5e: a6ee 0670 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 2d64: a62e 0660 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 2d6a: a6ae 0670 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 2d70: ae6e 0660 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 2d76: aeee 0670 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 2d7c: a223 0640 macw %d3u,%d1l,<<,%a3@-,%d1,%acc1 + 2d80: a2a3 0650 macw %d3u,%d1l,<<,%a3@-,%d1,%acc3 + 2d84: a663 0640 macw %d3u,%a3l,>>,%a3@-,%a3,%acc1 + 2d88: a6e3 0650 macw %d3u,%a3l,>>,%a3@-,%a3,%acc3 + 2d8c: a623 0640 macw %d3u,%d3l,>>,%a3@-,%d3,%acc1 + 2d90: a6a3 0650 macw %d3u,%d3l,>>,%a3@-,%d3,%acc3 + 2d94: ae63 0640 macw %d3u,%spl,>>,%a3@-,%sp,%acc1 + 2d98: aee3 0650 macw %d3u,%spl,>>,%a3@-,%sp,%acc3 + 2d9c: a223 0660 macw %d3u,%d1l,<<,%a3@-&,%d1,%acc1 + 2da0: a2a3 0670 macw %d3u,%d1l,<<,%a3@-&,%d1,%acc3 + 2da4: a663 0660 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc1 + 2da8: a6e3 0670 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc3 + 2dac: a623 0660 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc1 + 2db0: a6a3 0670 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc3 + 2db4: ae63 0660 macw %d3u,%spl,>>,%a3@-&,%sp,%acc1 + 2db8: aee3 0670 macw %d3u,%spl,>>,%a3@-&,%sp,%acc3 + 2dbc: a213 0240 macw %d3u,%d1l,<<,%a3@,%d1,%acc1 + 2dc0: a293 0250 macw %d3u,%d1l,<<,%a3@,%d1,%acc3 + 2dc4: a653 0240 macw %d3u,%a3l,>>,%a3@,%a3,%acc1 + 2dc8: a6d3 0250 macw %d3u,%a3l,>>,%a3@,%a3,%acc3 + 2dcc: a613 0240 macw %d3u,%d3l,>>,%a3@,%d3,%acc1 + 2dd0: a693 0250 macw %d3u,%d3l,>>,%a3@,%d3,%acc3 + 2dd4: ae53 0240 macw %d3u,%spl,>>,%a3@,%sp,%acc1 + 2dd8: aed3 0250 macw %d3u,%spl,>>,%a3@,%sp,%acc3 + 2ddc: a213 0260 macw %d3u,%d1l,<<,%a3@&,%d1,%acc1 + 2de0: a293 0270 macw %d3u,%d1l,<<,%a3@&,%d1,%acc3 + 2de4: a653 0260 macw %d3u,%a3l,>>,%a3@&,%a3,%acc1 + 2de8: a6d3 0270 macw %d3u,%a3l,>>,%a3@&,%a3,%acc3 + 2dec: a613 0260 macw %d3u,%d3l,>>,%a3@&,%d3,%acc1 + 2df0: a693 0270 macw %d3u,%d3l,>>,%a3@&,%d3,%acc3 + 2df4: ae53 0260 macw %d3u,%spl,>>,%a3@&,%sp,%acc1 + 2df8: aed3 0270 macw %d3u,%spl,>>,%a3@&,%sp,%acc3 + 2dfc: a21a 0240 macw %a2u,%d1l,<<,%a2@\+,%d1,%acc1 + 2e00: a29a 0250 macw %a2u,%d1l,<<,%a2@\+,%d1,%acc3 + 2e04: a65a 0240 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc1 + 2e08: a6da 0250 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc3 + 2e0c: a61a 0240 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc1 + 2e10: a69a 0250 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc3 + 2e14: ae5a 0240 macw %a2u,%spl,>>,%a2@\+,%sp,%acc1 + 2e18: aeda 0250 macw %a2u,%spl,>>,%a2@\+,%sp,%acc3 + 2e1c: a21a 0260 macw %a2u,%d1l,<<,%a2@\+&,%d1,%acc1 + 2e20: a29a 0270 macw %a2u,%d1l,<<,%a2@\+&,%d1,%acc3 + 2e24: a65a 0260 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc1 + 2e28: a6da 0270 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc3 + 2e2c: a61a 0260 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc1 + 2e30: a69a 0270 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc3 + 2e34: ae5a 0260 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc1 + 2e38: aeda 0270 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc3 + 2e3c: a22e 0240 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc1 + 2e42: a2ae 0250 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc3 + 2e48: a66e 0240 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 2e4e: a6ee 0250 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 2e54: a62e 0240 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 2e5a: a6ae 0250 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 2e60: ae6e 0240 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 2e66: aeee 0250 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 2e6c: a22e 0260 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc1 + 2e72: a2ae 0270 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc3 + 2e78: a66e 0260 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 2e7e: a6ee 0270 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 2e84: a62e 0260 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 2e8a: a6ae 0270 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 2e90: ae6e 0260 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 2e96: aeee 0270 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 2e9c: a223 0240 macw %d3u,%d1l,<<,%a3@-,%d1,%acc1 + 2ea0: a2a3 0250 macw %d3u,%d1l,<<,%a3@-,%d1,%acc3 + 2ea4: a663 0240 macw %d3u,%a3l,>>,%a3@-,%a3,%acc1 + 2ea8: a6e3 0250 macw %d3u,%a3l,>>,%a3@-,%a3,%acc3 + 2eac: a623 0240 macw %d3u,%d3l,>>,%a3@-,%d3,%acc1 + 2eb0: a6a3 0250 macw %d3u,%d3l,>>,%a3@-,%d3,%acc3 + 2eb4: ae63 0240 macw %d3u,%spl,>>,%a3@-,%sp,%acc1 + 2eb8: aee3 0250 macw %d3u,%spl,>>,%a3@-,%sp,%acc3 + 2ebc: a223 0260 macw %d3u,%d1l,<<,%a3@-&,%d1,%acc1 + 2ec0: a2a3 0270 macw %d3u,%d1l,<<,%a3@-&,%d1,%acc3 + 2ec4: a663 0260 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc1 + 2ec8: a6e3 0270 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc3 + 2ecc: a623 0260 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc1 + 2ed0: a6a3 0270 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc3 + 2ed4: ae63 0260 macw %d3u,%spl,>>,%a3@-&,%sp,%acc1 + 2ed8: aee3 0270 macw %d3u,%spl,>>,%a3@-&,%sp,%acc3 + 2edc: a213 0640 macw %d3u,%d1l,<<,%a3@,%d1,%acc1 + 2ee0: a293 0650 macw %d3u,%d1l,<<,%a3@,%d1,%acc3 + 2ee4: a653 0640 macw %d3u,%a3l,>>,%a3@,%a3,%acc1 + 2ee8: a6d3 0650 macw %d3u,%a3l,>>,%a3@,%a3,%acc3 + 2eec: a613 0640 macw %d3u,%d3l,>>,%a3@,%d3,%acc1 + 2ef0: a693 0650 macw %d3u,%d3l,>>,%a3@,%d3,%acc3 + 2ef4: ae53 0640 macw %d3u,%spl,>>,%a3@,%sp,%acc1 + 2ef8: aed3 0650 macw %d3u,%spl,>>,%a3@,%sp,%acc3 + 2efc: a213 0660 macw %d3u,%d1l,<<,%a3@&,%d1,%acc1 + 2f00: a293 0670 macw %d3u,%d1l,<<,%a3@&,%d1,%acc3 + 2f04: a653 0660 macw %d3u,%a3l,>>,%a3@&,%a3,%acc1 + 2f08: a6d3 0670 macw %d3u,%a3l,>>,%a3@&,%a3,%acc3 + 2f0c: a613 0660 macw %d3u,%d3l,>>,%a3@&,%d3,%acc1 + 2f10: a693 0670 macw %d3u,%d3l,>>,%a3@&,%d3,%acc3 + 2f14: ae53 0660 macw %d3u,%spl,>>,%a3@&,%sp,%acc1 + 2f18: aed3 0670 macw %d3u,%spl,>>,%a3@&,%sp,%acc3 + 2f1c: a21a 0640 macw %a2u,%d1l,<<,%a2@\+,%d1,%acc1 + 2f20: a29a 0650 macw %a2u,%d1l,<<,%a2@\+,%d1,%acc3 + 2f24: a65a 0640 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc1 + 2f28: a6da 0650 macw %a2u,%a3l,>>,%a2@\+,%a3,%acc3 + 2f2c: a61a 0640 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc1 + 2f30: a69a 0650 macw %a2u,%d3l,>>,%a2@\+,%d3,%acc3 + 2f34: ae5a 0640 macw %a2u,%spl,>>,%a2@\+,%sp,%acc1 + 2f38: aeda 0650 macw %a2u,%spl,>>,%a2@\+,%sp,%acc3 + 2f3c: a21a 0660 macw %a2u,%d1l,<<,%a2@\+&,%d1,%acc1 + 2f40: a29a 0670 macw %a2u,%d1l,<<,%a2@\+&,%d1,%acc3 + 2f44: a65a 0660 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc1 + 2f48: a6da 0670 macw %a2u,%a3l,>>,%a2@\+&,%a3,%acc3 + 2f4c: a61a 0660 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc1 + 2f50: a69a 0670 macw %a2u,%d3l,>>,%a2@\+&,%d3,%acc3 + 2f54: ae5a 0660 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc1 + 2f58: aeda 0670 macw %a2u,%spl,>>,%a2@\+&,%sp,%acc3 + 2f5c: a22e 0640 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc1 + 2f62: a2ae 0650 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc3 + 2f68: a66e 0640 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 2f6e: a6ee 0650 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 2f74: a62e 0640 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 2f7a: a6ae 0650 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 2f80: ae6e 0640 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 2f86: aeee 0650 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 2f8c: a22e 0660 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc1 + 2f92: a2ae 0670 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc3 + 2f98: a66e 0660 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 2f9e: a6ee 0670 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 2fa4: a62e 0660 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 2faa: a6ae 0670 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 2fb0: ae6e 0660 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 2fb6: aeee 0670 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 2fbc: a223 0640 macw %d3u,%d1l,<<,%a3@-,%d1,%acc1 + 2fc0: a2a3 0650 macw %d3u,%d1l,<<,%a3@-,%d1,%acc3 + 2fc4: a663 0640 macw %d3u,%a3l,>>,%a3@-,%a3,%acc1 + 2fc8: a6e3 0650 macw %d3u,%a3l,>>,%a3@-,%a3,%acc3 + 2fcc: a623 0640 macw %d3u,%d3l,>>,%a3@-,%d3,%acc1 + 2fd0: a6a3 0650 macw %d3u,%d3l,>>,%a3@-,%d3,%acc3 + 2fd4: ae63 0640 macw %d3u,%spl,>>,%a3@-,%sp,%acc1 + 2fd8: aee3 0650 macw %d3u,%spl,>>,%a3@-,%sp,%acc3 + 2fdc: a223 0660 macw %d3u,%d1l,<<,%a3@-&,%d1,%acc1 + 2fe0: a2a3 0670 macw %d3u,%d1l,<<,%a3@-&,%d1,%acc3 + 2fe4: a663 0660 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc1 + 2fe8: a6e3 0670 macw %d3u,%a3l,>>,%a3@-&,%a3,%acc3 + 2fec: a623 0660 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc1 + 2ff0: a6a3 0670 macw %d3u,%d3l,>>,%a3@-&,%d3,%acc3 + 2ff4: ae63 0660 macw %d3u,%spl,>>,%a3@-&,%sp,%acc1 + 2ff8: aee3 0670 macw %d3u,%spl,>>,%a3@-&,%sp,%acc3 + 2ffc: a65f 0080 macw %spu,%a3u,%sp@\+,%a3,%acc1 + 3000: a6df 0090 macw %spu,%a3u,%sp@\+,%a3,%acc3 + 3004: a65f 0080 macw %spu,%a3u,%sp@\+,%a3,%acc1 + 3008: a6df 0090 macw %spu,%a3u,%sp@\+,%a3,%acc3 + 300c: a45f 0080 macw %spu,%a2u,%sp@\+,%a2,%acc1 + 3010: a4df 0090 macw %spu,%a2u,%sp@\+,%a2,%acc3 + 3014: ae5f 0080 macw %spu,%spu,%sp@\+,%sp,%acc1 + 3018: aedf 0090 macw %spu,%spu,%sp@\+,%sp,%acc3 + 301c: a65f 00a0 macw %spu,%a3u,%sp@\+&,%a3,%acc1 + 3020: a6df 00b0 macw %spu,%a3u,%sp@\+&,%a3,%acc3 + 3024: a65f 00a0 macw %spu,%a3u,%sp@\+&,%a3,%acc1 + 3028: a6df 00b0 macw %spu,%a3u,%sp@\+&,%a3,%acc3 + 302c: a45f 00a0 macw %spu,%a2u,%sp@\+&,%a2,%acc1 + 3030: a4df 00b0 macw %spu,%a2u,%sp@\+&,%a2,%acc3 + 3034: ae5f 00a0 macw %spu,%spu,%sp@\+&,%sp,%acc1 + 3038: aedf 00b0 macw %spu,%spu,%sp@\+&,%sp,%acc3 + 303c: a65f 0080 macw %spu,%a3u,%sp@\+,%a3,%acc1 + 3040: a6df 0090 macw %spu,%a3u,%sp@\+,%a3,%acc3 + 3044: a65f 0080 macw %spu,%a3u,%sp@\+,%a3,%acc1 + 3048: a6df 0090 macw %spu,%a3u,%sp@\+,%a3,%acc3 + 304c: a45f 0080 macw %spu,%a2u,%sp@\+,%a2,%acc1 + 3050: a4df 0090 macw %spu,%a2u,%sp@\+,%a2,%acc3 + 3054: ae5f 0080 macw %spu,%spu,%sp@\+,%sp,%acc1 + 3058: aedf 0090 macw %spu,%spu,%sp@\+,%sp,%acc3 + 305c: a65f 00a0 macw %spu,%a3u,%sp@\+&,%a3,%acc1 + 3060: a6df 00b0 macw %spu,%a3u,%sp@\+&,%a3,%acc3 + 3064: a65f 00a0 macw %spu,%a3u,%sp@\+&,%a3,%acc1 + 3068: a6df 00b0 macw %spu,%a3u,%sp@\+&,%a3,%acc3 + 306c: a45f 00a0 macw %spu,%a2u,%sp@\+&,%a2,%acc1 + 3070: a4df 00b0 macw %spu,%a2u,%sp@\+&,%a2,%acc3 + 3074: ae5f 00a0 macw %spu,%spu,%sp@\+&,%sp,%acc1 + 3078: aedf 00b0 macw %spu,%spu,%sp@\+&,%sp,%acc3 + 307c: a66f 0080 000a macw %spl,%a3u,%sp@\(10\),%a3,%acc1 + 3082: a6ef 0090 000a macw %spl,%a3u,%sp@\(10\),%a3,%acc3 + 3088: a66f 0080 000a macw %spl,%a3u,%sp@\(10\),%a3,%acc1 + 308e: a6ef 0090 000a macw %spl,%a3u,%sp@\(10\),%a3,%acc3 + 3094: a46f 0080 000a macw %spl,%a2u,%sp@\(10\),%a2,%acc1 + 309a: a4ef 0090 000a macw %spl,%a2u,%sp@\(10\),%a2,%acc3 + 30a0: ae6f 0080 000a macw %spl,%spu,%sp@\(10\),%sp,%acc1 + 30a6: aeef 0090 000a macw %spl,%spu,%sp@\(10\),%sp,%acc3 + 30ac: a66f 00a0 000a macw %spl,%a3u,%sp@\(10\)&,%a3,%acc1 + 30b2: a6ef 00b0 000a macw %spl,%a3u,%sp@\(10\)&,%a3,%acc3 + 30b8: a66f 00a0 000a macw %spl,%a3u,%sp@\(10\)&,%a3,%acc1 + 30be: a6ef 00b0 000a macw %spl,%a3u,%sp@\(10\)&,%a3,%acc3 + 30c4: a46f 00a0 000a macw %spl,%a2u,%sp@\(10\)&,%a2,%acc1 + 30ca: a4ef 00b0 000a macw %spl,%a2u,%sp@\(10\)&,%a2,%acc3 + 30d0: ae6f 00a0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc1 + 30d6: aeef 00b0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc3 + 30dc: a66d 0080 a6ed macw %a5l,%a3u,%a5@\(-22803\),%a3,%acc1 + 30e2: 0090 a66d 0080 oril #-1502805888,%d0 + 30e8: a6ed 0090 a46d macw %a5l,%a3u,%a5@\(-23443\),%a3,%acc3 + 30ee: 0080 a4ed 0090 oril #-1527971696,%d0 + 30f4: ae6d 0080 aeed macw %a5l,%spu,%a5@\(-20755\),%sp,%acc1 + 30fa: 0090 a66d 00a0 oril #-1502805856,%d0 + 3100: a6ed 00b0 a66d macw %a5l,%a3u,%a5@\(-22931\)&,%a3,%acc3 + 3106: 00a0 a6ed 00b0 oril #-1494417232,%d0 + 310c: a46d 00a0 a4ed macw %a5l,%a2u,%a5@\(-23315\)&,%a2,%acc1 + 3112: 00b0 ae6d 00a0 oril #-1368588128,%d0 + 3118: aeed 00b0 a65f macw %a5l,%spu,%a5@\(-22945\)&,%sp,%acc3 + 311e: 0280 a6df 0290 andil #-1495334256,%d0 + 3124: a65f 0280 macw %spu,%a3u,>>,%sp@\+,%a3,%acc1 + 3128: a6df 0290 macw %spu,%a3u,>>,%sp@\+,%a3,%acc3 + 312c: a45f 0280 macw %spu,%a2u,,%sp@\+,%a2,%acc1 + 3130: a4df 0290 macw %spu,%a2u,,%sp@\+,%a2,%acc3 + 3134: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3138: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 313c: a65f 02a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 3140: a6df 02b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 3144: a65f 02a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 3148: a6df 02b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 314c: a45f 02a0 macw %spu,%a2u,,%sp@\+&,%a2,%acc1 + 3150: a4df 02b0 macw %spu,%a2u,,%sp@\+&,%a2,%acc3 + 3154: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3158: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 315c: a65f 0280 macw %spu,%a3u,>>,%sp@\+,%a3,%acc1 + 3160: a6df 0290 macw %spu,%a3u,>>,%sp@\+,%a3,%acc3 + 3164: a65f 0280 macw %spu,%a3u,>>,%sp@\+,%a3,%acc1 + 3168: a6df 0290 macw %spu,%a3u,>>,%sp@\+,%a3,%acc3 + 316c: a45f 0280 macw %spu,%a2u,,%sp@\+,%a2,%acc1 + 3170: a4df 0290 macw %spu,%a2u,,%sp@\+,%a2,%acc3 + 3174: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3178: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 317c: a65f 02a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 3180: a6df 02b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 3184: a65f 02a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 3188: a6df 02b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 318c: a45f 02a0 macw %spu,%a2u,,%sp@\+&,%a2,%acc1 + 3190: a4df 02b0 macw %spu,%a2u,,%sp@\+&,%a2,%acc3 + 3194: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3198: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 319c: a66f 0280 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 31a2: a6ef 0290 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 31a8: a66f 0280 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 31ae: a6ef 0290 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 31b4: a46f 0280 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc1 + 31ba: a4ef 0290 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc3 + 31c0: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 31c6: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 31cc: a66f 02a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 31d2: a6ef 02b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 31d8: a66f 02a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 31de: a6ef 02b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 31e4: a46f 02a0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc1 + 31ea: a4ef 02b0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc3 + 31f0: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 31f6: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 31fc: a66d 0280 a6ed macw %a5l,%a3u,>>,%a5@\(-22803\),%a3,%acc1 + 3202: 0290 a66d 0280 andil #-1502805376,%d0 + 3208: a6ed 0290 a46d macw %a5l,%a3u,>>,%a5@\(-23443\),%a3,%acc3 + 320e: 0280 a4ed 0290 andil #-1527971184,%d0 + 3214: ae6d 0280 aeed macw %a5l,%spu,>>,%a5@\(-20755\),%sp,%acc1 + 321a: 0290 a66d 02a0 andil #-1502805344,%d0 + 3220: a6ed 02b0 a66d macw %a5l,%a3u,>>,%a5@\(-22931\)&,%a3,%acc3 + 3226: 02a0 a6ed 02b0 andil #-1494416720,%d0 + 322c: a46d 02a0 a4ed macw %a5l,%a2u,,%a5@\(-23315\)&,%a2,%acc1 + 3232: 02b0 ae6d 02a0 andil #-1368587616,%d0 + 3238: aeed 02b0 a65f macw %a5l,%spu,>>,%a5@\(-22945\)&,%sp,%acc3 + 323e: 0680 a6df 0690 addil #-1495333232,%d0 + 3244: a65f 0680 macw %spu,%a3u,>>,%sp@\+,%a3,%acc1 + 3248: a6df 0690 macw %spu,%a3u,>>,%sp@\+,%a3,%acc3 + 324c: a45f 0680 macw %spu,%a2u,,%sp@\+,%a2,%acc1 + 3250: a4df 0690 macw %spu,%a2u,,%sp@\+,%a2,%acc3 + 3254: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3258: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 325c: a65f 06a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 3260: a6df 06b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 3264: a65f 06a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 3268: a6df 06b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 326c: a45f 06a0 macw %spu,%a2u,,%sp@\+&,%a2,%acc1 + 3270: a4df 06b0 macw %spu,%a2u,,%sp@\+&,%a2,%acc3 + 3274: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3278: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 327c: a65f 0680 macw %spu,%a3u,>>,%sp@\+,%a3,%acc1 + 3280: a6df 0690 macw %spu,%a3u,>>,%sp@\+,%a3,%acc3 + 3284: a65f 0680 macw %spu,%a3u,>>,%sp@\+,%a3,%acc1 + 3288: a6df 0690 macw %spu,%a3u,>>,%sp@\+,%a3,%acc3 + 328c: a45f 0680 macw %spu,%a2u,,%sp@\+,%a2,%acc1 + 3290: a4df 0690 macw %spu,%a2u,,%sp@\+,%a2,%acc3 + 3294: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3298: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 329c: a65f 06a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 32a0: a6df 06b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 32a4: a65f 06a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 32a8: a6df 06b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 32ac: a45f 06a0 macw %spu,%a2u,,%sp@\+&,%a2,%acc1 + 32b0: a4df 06b0 macw %spu,%a2u,,%sp@\+&,%a2,%acc3 + 32b4: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 32b8: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 32bc: a66f 0680 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 32c2: a6ef 0690 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 32c8: a66f 0680 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 32ce: a6ef 0690 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 32d4: a46f 0680 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc1 + 32da: a4ef 0690 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc3 + 32e0: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 32e6: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 32ec: a66f 06a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 32f2: a6ef 06b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 32f8: a66f 06a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 32fe: a6ef 06b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 3304: a46f 06a0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc1 + 330a: a4ef 06b0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc3 + 3310: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3316: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 331c: a66d 0680 a6ed macw %a5l,%a3u,>>,%a5@\(-22803\),%a3,%acc1 + 3322: 0690 a66d 0680 addil #-1502804352,%d0 + 3328: a6ed 0690 a46d macw %a5l,%a3u,>>,%a5@\(-23443\),%a3,%acc3 + 332e: 0680 a4ed 0690 addil #-1527970160,%d0 + 3334: ae6d 0680 aeed macw %a5l,%spu,>>,%a5@\(-20755\),%sp,%acc1 + 333a: 0690 a66d 06a0 addil #-1502804320,%d0 + 3340: a6ed 06b0 a66d macw %a5l,%a3u,>>,%a5@\(-22931\)&,%a3,%acc3 + 3346: 06a0 a6ed 06b0 addil #-1494415696,%d0 + 334c: a46d 06a0 a4ed macw %a5l,%a2u,,%a5@\(-23315\)&,%a2,%acc1 + 3352: 06b0 ae6d 06a0 addil #-1368586592,%d0 + 3358: aeed 06b0 a65f macw %a5l,%spu,>>,%a5@\(-22945\)&,%sp,%acc3 + 335e: 0280 a6df 0290 andil #-1495334256,%d0 + 3364: a65f 0280 macw %spu,%a3u,>>,%sp@\+,%a3,%acc1 + 3368: a6df 0290 macw %spu,%a3u,>>,%sp@\+,%a3,%acc3 + 336c: a45f 0280 macw %spu,%a2u,,%sp@\+,%a2,%acc1 + 3370: a4df 0290 macw %spu,%a2u,,%sp@\+,%a2,%acc3 + 3374: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3378: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 337c: a65f 02a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 3380: a6df 02b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 3384: a65f 02a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 3388: a6df 02b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 338c: a45f 02a0 macw %spu,%a2u,,%sp@\+&,%a2,%acc1 + 3390: a4df 02b0 macw %spu,%a2u,,%sp@\+&,%a2,%acc3 + 3394: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3398: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 339c: a65f 0280 macw %spu,%a3u,>>,%sp@\+,%a3,%acc1 + 33a0: a6df 0290 macw %spu,%a3u,>>,%sp@\+,%a3,%acc3 + 33a4: a65f 0280 macw %spu,%a3u,>>,%sp@\+,%a3,%acc1 + 33a8: a6df 0290 macw %spu,%a3u,>>,%sp@\+,%a3,%acc3 + 33ac: a45f 0280 macw %spu,%a2u,,%sp@\+,%a2,%acc1 + 33b0: a4df 0290 macw %spu,%a2u,,%sp@\+,%a2,%acc3 + 33b4: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 33b8: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 33bc: a65f 02a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 33c0: a6df 02b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 33c4: a65f 02a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 33c8: a6df 02b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 33cc: a45f 02a0 macw %spu,%a2u,,%sp@\+&,%a2,%acc1 + 33d0: a4df 02b0 macw %spu,%a2u,,%sp@\+&,%a2,%acc3 + 33d4: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 33d8: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 33dc: a66f 0280 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 33e2: a6ef 0290 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 33e8: a66f 0280 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 33ee: a6ef 0290 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 33f4: a46f 0280 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc1 + 33fa: a4ef 0290 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc3 + 3400: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 3406: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 340c: a66f 02a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 3412: a6ef 02b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 3418: a66f 02a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 341e: a6ef 02b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 3424: a46f 02a0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc1 + 342a: a4ef 02b0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc3 + 3430: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3436: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 343c: a66d 0280 a6ed macw %a5l,%a3u,>>,%a5@\(-22803\),%a3,%acc1 + 3442: 0290 a66d 0280 andil #-1502805376,%d0 + 3448: a6ed 0290 a46d macw %a5l,%a3u,>>,%a5@\(-23443\),%a3,%acc3 + 344e: 0280 a4ed 0290 andil #-1527971184,%d0 + 3454: ae6d 0280 aeed macw %a5l,%spu,>>,%a5@\(-20755\),%sp,%acc1 + 345a: 0290 a66d 02a0 andil #-1502805344,%d0 + 3460: a6ed 02b0 a66d macw %a5l,%a3u,>>,%a5@\(-22931\)&,%a3,%acc3 + 3466: 02a0 a6ed 02b0 andil #-1494416720,%d0 + 346c: a46d 02a0 a4ed macw %a5l,%a2u,,%a5@\(-23315\)&,%a2,%acc1 + 3472: 02b0 ae6d 02a0 andil #-1368587616,%d0 + 3478: aeed 02b0 a65f macw %a5l,%spu,>>,%a5@\(-22945\)&,%sp,%acc3 + 347e: 0680 a6df 0690 addil #-1495333232,%d0 + 3484: a65f 0680 macw %spu,%a3u,>>,%sp@\+,%a3,%acc1 + 3488: a6df 0690 macw %spu,%a3u,>>,%sp@\+,%a3,%acc3 + 348c: a45f 0680 macw %spu,%a2u,,%sp@\+,%a2,%acc1 + 3490: a4df 0690 macw %spu,%a2u,,%sp@\+,%a2,%acc3 + 3494: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3498: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 349c: a65f 06a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 34a0: a6df 06b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 34a4: a65f 06a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 34a8: a6df 06b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 34ac: a45f 06a0 macw %spu,%a2u,,%sp@\+&,%a2,%acc1 + 34b0: a4df 06b0 macw %spu,%a2u,,%sp@\+&,%a2,%acc3 + 34b4: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 34b8: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 34bc: a65f 0680 macw %spu,%a3u,>>,%sp@\+,%a3,%acc1 + 34c0: a6df 0690 macw %spu,%a3u,>>,%sp@\+,%a3,%acc3 + 34c4: a65f 0680 macw %spu,%a3u,>>,%sp@\+,%a3,%acc1 + 34c8: a6df 0690 macw %spu,%a3u,>>,%sp@\+,%a3,%acc3 + 34cc: a45f 0680 macw %spu,%a2u,,%sp@\+,%a2,%acc1 + 34d0: a4df 0690 macw %spu,%a2u,,%sp@\+,%a2,%acc3 + 34d4: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 34d8: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 34dc: a65f 06a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 34e0: a6df 06b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 34e4: a65f 06a0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc1 + 34e8: a6df 06b0 macw %spu,%a3u,>>,%sp@\+&,%a3,%acc3 + 34ec: a45f 06a0 macw %spu,%a2u,,%sp@\+&,%a2,%acc1 + 34f0: a4df 06b0 macw %spu,%a2u,,%sp@\+&,%a2,%acc3 + 34f4: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 34f8: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 34fc: a66f 0680 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 3502: a6ef 0690 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 3508: a66f 0680 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc1 + 350e: a6ef 0690 000a macw %spl,%a3u,>>,%sp@\(10\),%a3,%acc3 + 3514: a46f 0680 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc1 + 351a: a4ef 0690 000a macw %spl,%a2u,,%sp@\(10\),%a2,%acc3 + 3520: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 3526: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 352c: a66f 06a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 3532: a6ef 06b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 3538: a66f 06a0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc1 + 353e: a6ef 06b0 000a macw %spl,%a3u,>>,%sp@\(10\)&,%a3,%acc3 + 3544: a46f 06a0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc1 + 354a: a4ef 06b0 000a macw %spl,%a2u,,%sp@\(10\)&,%a2,%acc3 + 3550: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3556: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 355c: a66d 0680 a6ed macw %a5l,%a3u,>>,%a5@\(-22803\),%a3,%acc1 + 3562: 0690 a66d 0680 addil #-1502804352,%d0 + 3568: a6ed 0690 a46d macw %a5l,%a3u,>>,%a5@\(-23443\),%a3,%acc3 + 356e: 0680 a4ed 0690 addil #-1527970160,%d0 + 3574: ae6d 0680 aeed macw %a5l,%spu,>>,%a5@\(-20755\),%sp,%acc1 + 357a: 0690 a66d 06a0 addil #-1502804320,%d0 + 3580: a6ed 06b0 a66d macw %a5l,%a3u,>>,%a5@\(-22931\)&,%a3,%acc3 + 3586: 06a0 a6ed 06b0 addil #-1494415696,%d0 + 358c: a46d 06a0 a4ed macw %a5l,%a2u,,%a5@\(-23315\)&,%a2,%acc1 + 3592: 06b0 ae6d 06a0 addil #-1368586592,%d0 + 3598: aeed 06b0 a61f macw %a5l,%spu,>>,%a5@\(-23009\)&,%sp,%acc3 + 359e: 0000 00 + 35a0: a69f 0010 macw %spu,%d3l,%sp@\+,%d3,%acc3 + 35a4: a65f 0000 macw %spu,%a3l,%sp@\+,%a3,%acc1 + 35a8: a6df 0010 macw %spu,%a3l,%sp@\+,%a3,%acc3 + 35ac: a61f 0000 macw %spu,%d3l,%sp@\+,%d3,%acc1 + 35b0: a69f 0010 macw %spu,%d3l,%sp@\+,%d3,%acc3 + 35b4: ae5f 0000 macw %spu,%spl,%sp@\+,%sp,%acc1 + 35b8: aedf 0010 macw %spu,%spl,%sp@\+,%sp,%acc3 + 35bc: a61f 0020 macw %spu,%d3l,%sp@\+&,%d3,%acc1 + 35c0: a69f 0030 macw %spu,%d3l,%sp@\+&,%d3,%acc3 + 35c4: a65f 0020 macw %spu,%a3l,%sp@\+&,%a3,%acc1 + 35c8: a6df 0030 macw %spu,%a3l,%sp@\+&,%a3,%acc3 + 35cc: a61f 0020 macw %spu,%d3l,%sp@\+&,%d3,%acc1 + 35d0: a69f 0030 macw %spu,%d3l,%sp@\+&,%d3,%acc3 + 35d4: ae5f 0020 macw %spu,%spl,%sp@\+&,%sp,%acc1 + 35d8: aedf 0030 macw %spu,%spl,%sp@\+&,%sp,%acc3 + 35dc: a61f 0000 macw %spu,%d3l,%sp@\+,%d3,%acc1 + 35e0: a69f 0010 macw %spu,%d3l,%sp@\+,%d3,%acc3 + 35e4: a65f 0000 macw %spu,%a3l,%sp@\+,%a3,%acc1 + 35e8: a6df 0010 macw %spu,%a3l,%sp@\+,%a3,%acc3 + 35ec: a61f 0000 macw %spu,%d3l,%sp@\+,%d3,%acc1 + 35f0: a69f 0010 macw %spu,%d3l,%sp@\+,%d3,%acc3 + 35f4: ae5f 0000 macw %spu,%spl,%sp@\+,%sp,%acc1 + 35f8: aedf 0010 macw %spu,%spl,%sp@\+,%sp,%acc3 + 35fc: a61f 0020 macw %spu,%d3l,%sp@\+&,%d3,%acc1 + 3600: a69f 0030 macw %spu,%d3l,%sp@\+&,%d3,%acc3 + 3604: a65f 0020 macw %spu,%a3l,%sp@\+&,%a3,%acc1 + 3608: a6df 0030 macw %spu,%a3l,%sp@\+&,%a3,%acc3 + 360c: a61f 0020 macw %spu,%d3l,%sp@\+&,%d3,%acc1 + 3610: a69f 0030 macw %spu,%d3l,%sp@\+&,%d3,%acc3 + 3614: ae5f 0020 macw %spu,%spl,%sp@\+&,%sp,%acc1 + 3618: aedf 0030 macw %spu,%spl,%sp@\+&,%sp,%acc3 + 361c: a62f 0000 000a macw %spl,%d3l,%sp@\(10\),%d3,%acc1 + 3622: a6af 0010 000a macw %spl,%d3l,%sp@\(10\),%d3,%acc3 + 3628: a66f 0000 000a macw %spl,%a3l,%sp@\(10\),%a3,%acc1 + 362e: a6ef 0010 000a macw %spl,%a3l,%sp@\(10\),%a3,%acc3 + 3634: a62f 0000 000a macw %spl,%d3l,%sp@\(10\),%d3,%acc1 + 363a: a6af 0010 000a macw %spl,%d3l,%sp@\(10\),%d3,%acc3 + 3640: ae6f 0000 000a macw %spl,%spl,%sp@\(10\),%sp,%acc1 + 3646: aeef 0010 000a macw %spl,%spl,%sp@\(10\),%sp,%acc3 + 364c: a62f 0020 000a macw %spl,%d3l,%sp@\(10\)&,%d3,%acc1 + 3652: a6af 0030 000a macw %spl,%d3l,%sp@\(10\)&,%d3,%acc3 + 3658: a66f 0020 000a macw %spl,%a3l,%sp@\(10\)&,%a3,%acc1 + 365e: a6ef 0030 000a macw %spl,%a3l,%sp@\(10\)&,%a3,%acc3 + 3664: a62f 0020 000a macw %spl,%d3l,%sp@\(10\)&,%d3,%acc1 + 366a: a6af 0030 000a macw %spl,%d3l,%sp@\(10\)&,%d3,%acc3 + 3670: ae6f 0020 000a macw %spl,%spl,%sp@\(10\)&,%sp,%acc1 + 3676: aeef 0030 000a macw %spl,%spl,%sp@\(10\)&,%sp,%acc3 + 367c: a62d 0000 a6ad macw %a5l,%d3l,%a5@\(-22867\),%d3,%acc1 + 3682: 0010 020 + 3684: a66d 0000 a6ed macw %a5l,%a3l,%a5@\(-22803\),%a3,%acc1 + 368a: 0010 020 + 368c: a62d 0000 a6ad macw %a5l,%d3l,%a5@\(-22867\),%d3,%acc1 + 3692: 0010 020 + 3694: ae6d 0000 aeed macw %a5l,%spl,%a5@\(-20755\),%sp,%acc1 + 369a: 0010 020 + 369c: a62d 0020 a6ad macw %a5l,%d3l,%a5@\(-22867\)&,%d3,%acc1 + 36a2: 0030 060 + 36a4: a66d 0020 a6ed macw %a5l,%a3l,%a5@\(-22803\)&,%a3,%acc1 + 36aa: 0030 060 + 36ac: a62d 0020 a6ad macw %a5l,%d3l,%a5@\(-22867\)&,%d3,%acc1 + 36b2: 0030 060 + 36b4: ae6d 0020 aeed macw %a5l,%spl,%a5@\(-20755\)&,%sp,%acc1 + 36ba: 0030 060 + 36bc: a61f 0200 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 36c0: a69f 0210 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 36c4: a65f 0200 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 36c8: a6df 0210 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 36cc: a61f 0200 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 36d0: a69f 0210 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 36d4: ae5f 0200 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 36d8: aedf 0210 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 36dc: a61f 0220 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 36e0: a69f 0230 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 36e4: a65f 0220 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 36e8: a6df 0230 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 36ec: a61f 0220 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 36f0: a69f 0230 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 36f4: ae5f 0220 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 36f8: aedf 0230 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 36fc: a61f 0200 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 3700: a69f 0210 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 3704: a65f 0200 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 3708: a6df 0210 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 370c: a61f 0200 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 3710: a69f 0210 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 3714: ae5f 0200 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 3718: aedf 0210 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 371c: a61f 0220 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 3720: a69f 0230 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 3724: a65f 0220 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 3728: a6df 0230 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 372c: a61f 0220 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 3730: a69f 0230 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 3734: ae5f 0220 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 3738: aedf 0230 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 373c: a62f 0200 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 3742: a6af 0210 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 3748: a66f 0200 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + 374e: a6ef 0210 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + 3754: a62f 0200 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 375a: a6af 0210 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 3760: ae6f 0200 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + 3766: aeef 0210 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + 376c: a62f 0220 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 3772: a6af 0230 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 3778: a66f 0220 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + 377e: a6ef 0230 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + 3784: a62f 0220 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 378a: a6af 0230 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 3790: ae6f 0220 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + 3796: aeef 0230 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + 379c: a62d 0200 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\),%d3,%acc1 + 37a2: 0210 01020 + 37a4: a66d 0200 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\),%a3,%acc1 + 37aa: 0210 01020 + 37ac: a62d 0200 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\),%d3,%acc1 + 37b2: 0210 01020 + 37b4: ae6d 0200 aeed macw %a5l,%spl,>>,%a5@\(-20755\),%sp,%acc1 + 37ba: 0210 01020 + 37bc: a62d 0220 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\)&,%d3,%acc1 + 37c2: 0230 01060 + 37c4: a66d 0220 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\)&,%a3,%acc1 + 37ca: 0230 01060 + 37cc: a62d 0220 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\)&,%d3,%acc1 + 37d2: 0230 01060 + 37d4: ae6d 0220 aeed macw %a5l,%spl,>>,%a5@\(-20755\)&,%sp,%acc1 + 37da: 0230 01060 + 37dc: a61f 0600 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 37e0: a69f 0610 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 37e4: a65f 0600 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 37e8: a6df 0610 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 37ec: a61f 0600 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 37f0: a69f 0610 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 37f4: ae5f 0600 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 37f8: aedf 0610 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 37fc: a61f 0620 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 3800: a69f 0630 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 3804: a65f 0620 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 3808: a6df 0630 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 380c: a61f 0620 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 3810: a69f 0630 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 3814: ae5f 0620 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 3818: aedf 0630 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 381c: a61f 0600 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 3820: a69f 0610 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 3824: a65f 0600 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 3828: a6df 0610 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 382c: a61f 0600 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 3830: a69f 0610 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 3834: ae5f 0600 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 3838: aedf 0610 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 383c: a61f 0620 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 3840: a69f 0630 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 3844: a65f 0620 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 3848: a6df 0630 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 384c: a61f 0620 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 3850: a69f 0630 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 3854: ae5f 0620 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 3858: aedf 0630 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 385c: a62f 0600 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 3862: a6af 0610 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 3868: a66f 0600 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + 386e: a6ef 0610 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + 3874: a62f 0600 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 387a: a6af 0610 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 3880: ae6f 0600 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + 3886: aeef 0610 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + 388c: a62f 0620 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 3892: a6af 0630 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 3898: a66f 0620 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + 389e: a6ef 0630 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + 38a4: a62f 0620 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 38aa: a6af 0630 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 38b0: ae6f 0620 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + 38b6: aeef 0630 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + 38bc: a62d 0600 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\),%d3,%acc1 + 38c2: 0610 03020 + 38c4: a66d 0600 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\),%a3,%acc1 + 38ca: 0610 03020 + 38cc: a62d 0600 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\),%d3,%acc1 + 38d2: 0610 03020 + 38d4: ae6d 0600 aeed macw %a5l,%spl,>>,%a5@\(-20755\),%sp,%acc1 + 38da: 0610 03020 + 38dc: a62d 0620 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\)&,%d3,%acc1 + 38e2: 0630 03060 + 38e4: a66d 0620 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\)&,%a3,%acc1 + 38ea: 0630 03060 + 38ec: a62d 0620 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\)&,%d3,%acc1 + 38f2: 0630 03060 + 38f4: ae6d 0620 aeed macw %a5l,%spl,>>,%a5@\(-20755\)&,%sp,%acc1 + 38fa: 0630 03060 + 38fc: a61f 0200 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 3900: a69f 0210 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 3904: a65f 0200 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 3908: a6df 0210 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 390c: a61f 0200 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 3910: a69f 0210 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 3914: ae5f 0200 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 3918: aedf 0210 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 391c: a61f 0220 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 3920: a69f 0230 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 3924: a65f 0220 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 3928: a6df 0230 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 392c: a61f 0220 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 3930: a69f 0230 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 3934: ae5f 0220 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 3938: aedf 0230 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 393c: a61f 0200 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 3940: a69f 0210 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 3944: a65f 0200 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 3948: a6df 0210 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 394c: a61f 0200 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 3950: a69f 0210 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 3954: ae5f 0200 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 3958: aedf 0210 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 395c: a61f 0220 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 3960: a69f 0230 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 3964: a65f 0220 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 3968: a6df 0230 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 396c: a61f 0220 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 3970: a69f 0230 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 3974: ae5f 0220 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 3978: aedf 0230 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 397c: a62f 0200 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 3982: a6af 0210 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 3988: a66f 0200 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + 398e: a6ef 0210 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + 3994: a62f 0200 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 399a: a6af 0210 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 39a0: ae6f 0200 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + 39a6: aeef 0210 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + 39ac: a62f 0220 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 39b2: a6af 0230 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 39b8: a66f 0220 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + 39be: a6ef 0230 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + 39c4: a62f 0220 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 39ca: a6af 0230 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 39d0: ae6f 0220 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + 39d6: aeef 0230 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + 39dc: a62d 0200 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\),%d3,%acc1 + 39e2: 0210 01020 + 39e4: a66d 0200 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\),%a3,%acc1 + 39ea: 0210 01020 + 39ec: a62d 0200 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\),%d3,%acc1 + 39f2: 0210 01020 + 39f4: ae6d 0200 aeed macw %a5l,%spl,>>,%a5@\(-20755\),%sp,%acc1 + 39fa: 0210 01020 + 39fc: a62d 0220 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\)&,%d3,%acc1 + 3a02: 0230 01060 + 3a04: a66d 0220 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\)&,%a3,%acc1 + 3a0a: 0230 01060 + 3a0c: a62d 0220 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\)&,%d3,%acc1 + 3a12: 0230 01060 + 3a14: ae6d 0220 aeed macw %a5l,%spl,>>,%a5@\(-20755\)&,%sp,%acc1 + 3a1a: 0230 01060 + 3a1c: a61f 0600 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 3a20: a69f 0610 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 3a24: a65f 0600 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 3a28: a6df 0610 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 3a2c: a61f 0600 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 3a30: a69f 0610 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 3a34: ae5f 0600 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 3a38: aedf 0610 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 3a3c: a61f 0620 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 3a40: a69f 0630 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 3a44: a65f 0620 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 3a48: a6df 0630 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 3a4c: a61f 0620 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 3a50: a69f 0630 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 3a54: ae5f 0620 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 3a58: aedf 0630 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 3a5c: a61f 0600 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 3a60: a69f 0610 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 3a64: a65f 0600 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 3a68: a6df 0610 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 3a6c: a61f 0600 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 3a70: a69f 0610 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 3a74: ae5f 0600 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 3a78: aedf 0610 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 3a7c: a61f 0620 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 3a80: a69f 0630 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 3a84: a65f 0620 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 3a88: a6df 0630 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 3a8c: a61f 0620 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 3a90: a69f 0630 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 3a94: ae5f 0620 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 3a98: aedf 0630 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 3a9c: a62f 0600 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 3aa2: a6af 0610 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 3aa8: a66f 0600 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + 3aae: a6ef 0610 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + 3ab4: a62f 0600 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 3aba: a6af 0610 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 3ac0: ae6f 0600 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + 3ac6: aeef 0610 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + 3acc: a62f 0620 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 3ad2: a6af 0630 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 3ad8: a66f 0620 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + 3ade: a6ef 0630 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + 3ae4: a62f 0620 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 3aea: a6af 0630 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 3af0: ae6f 0620 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + 3af6: aeef 0630 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + 3afc: a62d 0600 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\),%d3,%acc1 + 3b02: 0610 03020 + 3b04: a66d 0600 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\),%a3,%acc1 + 3b0a: 0610 03020 + 3b0c: a62d 0600 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\),%d3,%acc1 + 3b12: 0610 03020 + 3b14: ae6d 0600 aeed macw %a5l,%spl,>>,%a5@\(-20755\),%sp,%acc1 + 3b1a: 0610 03020 + 3b1c: a62d 0620 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\)&,%d3,%acc1 + 3b22: 0630 03060 + 3b24: a66d 0620 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\)&,%a3,%acc1 + 3b2a: 0630 03060 + 3b2c: a62d 0620 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\)&,%d3,%acc1 + 3b32: 0630 03060 + 3b34: ae6d 0620 aeed macw %a5l,%spl,>>,%a5@\(-20755\)&,%sp,%acc1 + 3b3a: 0630 03060 + 3b3c: ae5f 0080 macw %spu,%spu,%sp@\+,%sp,%acc1 + 3b40: aedf 0090 macw %spu,%spu,%sp@\+,%sp,%acc3 + 3b44: ae5f 0080 macw %spu,%spu,%sp@\+,%sp,%acc1 + 3b48: aedf 0090 macw %spu,%spu,%sp@\+,%sp,%acc3 + 3b4c: ae5f 0080 macw %spu,%spu,%sp@\+,%sp,%acc1 + 3b50: aedf 0090 macw %spu,%spu,%sp@\+,%sp,%acc3 + 3b54: ae5f 0080 macw %spu,%spu,%sp@\+,%sp,%acc1 + 3b58: aedf 0090 macw %spu,%spu,%sp@\+,%sp,%acc3 + 3b5c: ae5f 00a0 macw %spu,%spu,%sp@\+&,%sp,%acc1 + 3b60: aedf 00b0 macw %spu,%spu,%sp@\+&,%sp,%acc3 + 3b64: ae5f 00a0 macw %spu,%spu,%sp@\+&,%sp,%acc1 + 3b68: aedf 00b0 macw %spu,%spu,%sp@\+&,%sp,%acc3 + 3b6c: ae5f 00a0 macw %spu,%spu,%sp@\+&,%sp,%acc1 + 3b70: aedf 00b0 macw %spu,%spu,%sp@\+&,%sp,%acc3 + 3b74: ae5f 00a0 macw %spu,%spu,%sp@\+&,%sp,%acc1 + 3b78: aedf 00b0 macw %spu,%spu,%sp@\+&,%sp,%acc3 + 3b7c: ae5f 0080 macw %spu,%spu,%sp@\+,%sp,%acc1 + 3b80: aedf 0090 macw %spu,%spu,%sp@\+,%sp,%acc3 + 3b84: ae5f 0080 macw %spu,%spu,%sp@\+,%sp,%acc1 + 3b88: aedf 0090 macw %spu,%spu,%sp@\+,%sp,%acc3 + 3b8c: ae5f 0080 macw %spu,%spu,%sp@\+,%sp,%acc1 + 3b90: aedf 0090 macw %spu,%spu,%sp@\+,%sp,%acc3 + 3b94: ae5f 0080 macw %spu,%spu,%sp@\+,%sp,%acc1 + 3b98: aedf 0090 macw %spu,%spu,%sp@\+,%sp,%acc3 + 3b9c: ae5f 00a0 macw %spu,%spu,%sp@\+&,%sp,%acc1 + 3ba0: aedf 00b0 macw %spu,%spu,%sp@\+&,%sp,%acc3 + 3ba4: ae5f 00a0 macw %spu,%spu,%sp@\+&,%sp,%acc1 + 3ba8: aedf 00b0 macw %spu,%spu,%sp@\+&,%sp,%acc3 + 3bac: ae5f 00a0 macw %spu,%spu,%sp@\+&,%sp,%acc1 + 3bb0: aedf 00b0 macw %spu,%spu,%sp@\+&,%sp,%acc3 + 3bb4: ae5f 00a0 macw %spu,%spu,%sp@\+&,%sp,%acc1 + 3bb8: aedf 00b0 macw %spu,%spu,%sp@\+&,%sp,%acc3 + 3bbc: ae6f 0080 000a macw %spl,%spu,%sp@\(10\),%sp,%acc1 + 3bc2: aeef 0090 000a macw %spl,%spu,%sp@\(10\),%sp,%acc3 + 3bc8: ae6f 0080 000a macw %spl,%spu,%sp@\(10\),%sp,%acc1 + 3bce: aeef 0090 000a macw %spl,%spu,%sp@\(10\),%sp,%acc3 + 3bd4: ae6f 0080 000a macw %spl,%spu,%sp@\(10\),%sp,%acc1 + 3bda: aeef 0090 000a macw %spl,%spu,%sp@\(10\),%sp,%acc3 + 3be0: ae6f 0080 000a macw %spl,%spu,%sp@\(10\),%sp,%acc1 + 3be6: aeef 0090 000a macw %spl,%spu,%sp@\(10\),%sp,%acc3 + 3bec: ae6f 00a0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc1 + 3bf2: aeef 00b0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc3 + 3bf8: ae6f 00a0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc1 + 3bfe: aeef 00b0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc3 + 3c04: ae6f 00a0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc1 + 3c0a: aeef 00b0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc3 + 3c10: ae6f 00a0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc1 + 3c16: aeef 00b0 000a macw %spl,%spu,%sp@\(10\)&,%sp,%acc3 + 3c1c: ae6d 0080 aeed macw %a5l,%spu,%a5@\(-20755\),%sp,%acc1 + 3c22: 0090 ae6d 0080 oril #-1368588160,%d0 + 3c28: aeed 0090 ae6d macw %a5l,%spu,%a5@\(-20883\),%sp,%acc3 + 3c2e: 0080 aeed 0090 oril #-1360199536,%d0 + 3c34: ae6d 0080 aeed macw %a5l,%spu,%a5@\(-20755\),%sp,%acc1 + 3c3a: 0090 ae6d 00a0 oril #-1368588128,%d0 + 3c40: aeed 00b0 ae6d macw %a5l,%spu,%a5@\(-20883\)&,%sp,%acc3 + 3c46: 00a0 aeed 00b0 oril #-1360199504,%d0 + 3c4c: ae6d 00a0 aeed macw %a5l,%spu,%a5@\(-20755\)&,%sp,%acc1 + 3c52: 00b0 ae6d 00a0 oril #-1368588128,%d0 + 3c58: aeed 00b0 ae5f macw %a5l,%spu,%a5@\(-20897\)&,%sp,%acc3 + 3c5e: 0280 aedf 0290 andil #-1361116528,%d0 + 3c64: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3c68: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3c6c: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3c70: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3c74: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3c78: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3c7c: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3c80: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3c84: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3c88: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3c8c: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3c90: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3c94: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3c98: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3c9c: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3ca0: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3ca4: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3ca8: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3cac: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3cb0: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3cb4: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3cb8: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3cbc: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3cc0: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3cc4: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3cc8: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3ccc: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3cd0: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3cd4: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3cd8: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3cdc: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 3ce2: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 3ce8: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 3cee: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 3cf4: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 3cfa: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 3d00: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 3d06: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 3d0c: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3d12: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 3d18: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3d1e: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 3d24: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3d2a: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 3d30: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3d36: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 3d3c: ae6d 0280 aeed macw %a5l,%spu,>>,%a5@\(-20755\),%sp,%acc1 + 3d42: 0290 ae6d 0280 andil #-1368587648,%d0 + 3d48: aeed 0290 ae6d macw %a5l,%spu,>>,%a5@\(-20883\),%sp,%acc3 + 3d4e: 0280 aeed 0290 andil #-1360199024,%d0 + 3d54: ae6d 0280 aeed macw %a5l,%spu,>>,%a5@\(-20755\),%sp,%acc1 + 3d5a: 0290 ae6d 02a0 andil #-1368587616,%d0 + 3d60: aeed 02b0 ae6d macw %a5l,%spu,>>,%a5@\(-20883\)&,%sp,%acc3 + 3d66: 02a0 aeed 02b0 andil #-1360198992,%d0 + 3d6c: ae6d 02a0 aeed macw %a5l,%spu,>>,%a5@\(-20755\)&,%sp,%acc1 + 3d72: 02b0 ae6d 02a0 andil #-1368587616,%d0 + 3d78: aeed 02b0 ae5f macw %a5l,%spu,>>,%a5@\(-20897\)&,%sp,%acc3 + 3d7e: 0680 aedf 0690 addil #-1361115504,%d0 + 3d84: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3d88: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3d8c: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3d90: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3d94: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3d98: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3d9c: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3da0: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3da4: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3da8: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3dac: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3db0: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3db4: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3db8: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3dbc: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3dc0: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3dc4: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3dc8: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3dcc: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3dd0: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3dd4: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3dd8: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3ddc: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3de0: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3de4: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3de8: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3dec: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3df0: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3df4: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3df8: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3dfc: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 3e02: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 3e08: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 3e0e: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 3e14: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 3e1a: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 3e20: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 3e26: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 3e2c: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3e32: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 3e38: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3e3e: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 3e44: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3e4a: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 3e50: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3e56: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 3e5c: ae6d 0680 aeed macw %a5l,%spu,>>,%a5@\(-20755\),%sp,%acc1 + 3e62: 0690 ae6d 0680 addil #-1368586624,%d0 + 3e68: aeed 0690 ae6d macw %a5l,%spu,>>,%a5@\(-20883\),%sp,%acc3 + 3e6e: 0680 aeed 0690 addil #-1360198000,%d0 + 3e74: ae6d 0680 aeed macw %a5l,%spu,>>,%a5@\(-20755\),%sp,%acc1 + 3e7a: 0690 ae6d 06a0 addil #-1368586592,%d0 + 3e80: aeed 06b0 ae6d macw %a5l,%spu,>>,%a5@\(-20883\)&,%sp,%acc3 + 3e86: 06a0 aeed 06b0 addil #-1360197968,%d0 + 3e8c: ae6d 06a0 aeed macw %a5l,%spu,>>,%a5@\(-20755\)&,%sp,%acc1 + 3e92: 06b0 ae6d 06a0 addil #-1368586592,%d0 + 3e98: aeed 06b0 ae5f macw %a5l,%spu,>>,%a5@\(-20897\)&,%sp,%acc3 + 3e9e: 0280 aedf 0290 andil #-1361116528,%d0 + 3ea4: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3ea8: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3eac: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3eb0: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3eb4: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3eb8: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3ebc: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3ec0: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3ec4: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3ec8: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3ecc: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3ed0: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3ed4: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3ed8: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3edc: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3ee0: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3ee4: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3ee8: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3eec: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3ef0: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3ef4: ae5f 0280 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3ef8: aedf 0290 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3efc: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3f00: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3f04: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3f08: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3f0c: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3f10: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3f14: ae5f 02a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3f18: aedf 02b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3f1c: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 3f22: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 3f28: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 3f2e: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 3f34: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 3f3a: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 3f40: ae6f 0280 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 3f46: aeef 0290 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 3f4c: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3f52: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 3f58: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3f5e: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 3f64: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3f6a: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 3f70: ae6f 02a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 3f76: aeef 02b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 3f7c: ae6d 0280 aeed macw %a5l,%spu,>>,%a5@\(-20755\),%sp,%acc1 + 3f82: 0290 ae6d 0280 andil #-1368587648,%d0 + 3f88: aeed 0290 ae6d macw %a5l,%spu,>>,%a5@\(-20883\),%sp,%acc3 + 3f8e: 0280 aeed 0290 andil #-1360199024,%d0 + 3f94: ae6d 0280 aeed macw %a5l,%spu,>>,%a5@\(-20755\),%sp,%acc1 + 3f9a: 0290 ae6d 02a0 andil #-1368587616,%d0 + 3fa0: aeed 02b0 ae6d macw %a5l,%spu,>>,%a5@\(-20883\)&,%sp,%acc3 + 3fa6: 02a0 aeed 02b0 andil #-1360198992,%d0 + 3fac: ae6d 02a0 aeed macw %a5l,%spu,>>,%a5@\(-20755\)&,%sp,%acc1 + 3fb2: 02b0 ae6d 02a0 andil #-1368587616,%d0 + 3fb8: aeed 02b0 ae5f macw %a5l,%spu,>>,%a5@\(-20897\)&,%sp,%acc3 + 3fbe: 0680 aedf 0690 addil #-1361115504,%d0 + 3fc4: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3fc8: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3fcc: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3fd0: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3fd4: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 3fd8: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 3fdc: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3fe0: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3fe4: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3fe8: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3fec: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3ff0: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3ff4: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 3ff8: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 3ffc: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 4000: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 4004: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 4008: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 400c: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 4010: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 4014: ae5f 0680 macw %spu,%spu,>>,%sp@\+,%sp,%acc1 + 4018: aedf 0690 macw %spu,%spu,>>,%sp@\+,%sp,%acc3 + 401c: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 4020: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 4024: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 4028: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 402c: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 4030: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 4034: ae5f 06a0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc1 + 4038: aedf 06b0 macw %spu,%spu,>>,%sp@\+&,%sp,%acc3 + 403c: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 4042: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 4048: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 404e: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 4054: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 405a: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 4060: ae6f 0680 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc1 + 4066: aeef 0690 000a macw %spl,%spu,>>,%sp@\(10\),%sp,%acc3 + 406c: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 4072: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 4078: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 407e: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 4084: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 408a: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 4090: ae6f 06a0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc1 + 4096: aeef 06b0 000a macw %spl,%spu,>>,%sp@\(10\)&,%sp,%acc3 + 409c: ae6d 0680 aeed macw %a5l,%spu,>>,%a5@\(-20755\),%sp,%acc1 + 40a2: 0690 ae6d 0680 addil #-1368586624,%d0 + 40a8: aeed 0690 ae6d macw %a5l,%spu,>>,%a5@\(-20883\),%sp,%acc3 + 40ae: 0680 aeed 0690 addil #-1360198000,%d0 + 40b4: ae6d 0680 aeed macw %a5l,%spu,>>,%a5@\(-20755\),%sp,%acc1 + 40ba: 0690 ae6d 06a0 addil #-1368586592,%d0 + 40c0: aeed 06b0 ae6d macw %a5l,%spu,>>,%a5@\(-20883\)&,%sp,%acc3 + 40c6: 06a0 aeed 06b0 addil #-1360197968,%d0 + 40cc: ae6d 06a0 aeed macw %a5l,%spu,>>,%a5@\(-20755\)&,%sp,%acc1 + 40d2: 06b0 ae6d 06a0 addil #-1368586592,%d0 + 40d8: aeed 06b0 a21f macw %a5l,%spu,>>,%a5@\(-24033\)&,%sp,%acc3 + 40de: 0000 00 + 40e0: a29f 0010 macw %spu,%d1l,%sp@\+,%d1,%acc3 + 40e4: a65f 0000 macw %spu,%a3l,%sp@\+,%a3,%acc1 + 40e8: a6df 0010 macw %spu,%a3l,%sp@\+,%a3,%acc3 + 40ec: a61f 0000 macw %spu,%d3l,%sp@\+,%d3,%acc1 + 40f0: a69f 0010 macw %spu,%d3l,%sp@\+,%d3,%acc3 + 40f4: ae5f 0000 macw %spu,%spl,%sp@\+,%sp,%acc1 + 40f8: aedf 0010 macw %spu,%spl,%sp@\+,%sp,%acc3 + 40fc: a21f 0020 macw %spu,%d1l,%sp@\+&,%d1,%acc1 + 4100: a29f 0030 macw %spu,%d1l,%sp@\+&,%d1,%acc3 + 4104: a65f 0020 macw %spu,%a3l,%sp@\+&,%a3,%acc1 + 4108: a6df 0030 macw %spu,%a3l,%sp@\+&,%a3,%acc3 + 410c: a61f 0020 macw %spu,%d3l,%sp@\+&,%d3,%acc1 + 4110: a69f 0030 macw %spu,%d3l,%sp@\+&,%d3,%acc3 + 4114: ae5f 0020 macw %spu,%spl,%sp@\+&,%sp,%acc1 + 4118: aedf 0030 macw %spu,%spl,%sp@\+&,%sp,%acc3 + 411c: a21f 0000 macw %spu,%d1l,%sp@\+,%d1,%acc1 + 4120: a29f 0010 macw %spu,%d1l,%sp@\+,%d1,%acc3 + 4124: a65f 0000 macw %spu,%a3l,%sp@\+,%a3,%acc1 + 4128: a6df 0010 macw %spu,%a3l,%sp@\+,%a3,%acc3 + 412c: a61f 0000 macw %spu,%d3l,%sp@\+,%d3,%acc1 + 4130: a69f 0010 macw %spu,%d3l,%sp@\+,%d3,%acc3 + 4134: ae5f 0000 macw %spu,%spl,%sp@\+,%sp,%acc1 + 4138: aedf 0010 macw %spu,%spl,%sp@\+,%sp,%acc3 + 413c: a21f 0020 macw %spu,%d1l,%sp@\+&,%d1,%acc1 + 4140: a29f 0030 macw %spu,%d1l,%sp@\+&,%d1,%acc3 + 4144: a65f 0020 macw %spu,%a3l,%sp@\+&,%a3,%acc1 + 4148: a6df 0030 macw %spu,%a3l,%sp@\+&,%a3,%acc3 + 414c: a61f 0020 macw %spu,%d3l,%sp@\+&,%d3,%acc1 + 4150: a69f 0030 macw %spu,%d3l,%sp@\+&,%d3,%acc3 + 4154: ae5f 0020 macw %spu,%spl,%sp@\+&,%sp,%acc1 + 4158: aedf 0030 macw %spu,%spl,%sp@\+&,%sp,%acc3 + 415c: a22f 0000 000a macw %spl,%d1l,%sp@\(10\),%d1,%acc1 + 4162: a2af 0010 000a macw %spl,%d1l,%sp@\(10\),%d1,%acc3 + 4168: a66f 0000 000a macw %spl,%a3l,%sp@\(10\),%a3,%acc1 + 416e: a6ef 0010 000a macw %spl,%a3l,%sp@\(10\),%a3,%acc3 + 4174: a62f 0000 000a macw %spl,%d3l,%sp@\(10\),%d3,%acc1 + 417a: a6af 0010 000a macw %spl,%d3l,%sp@\(10\),%d3,%acc3 + 4180: ae6f 0000 000a macw %spl,%spl,%sp@\(10\),%sp,%acc1 + 4186: aeef 0010 000a macw %spl,%spl,%sp@\(10\),%sp,%acc3 + 418c: a22f 0020 000a macw %spl,%d1l,%sp@\(10\)&,%d1,%acc1 + 4192: a2af 0030 000a macw %spl,%d1l,%sp@\(10\)&,%d1,%acc3 + 4198: a66f 0020 000a macw %spl,%a3l,%sp@\(10\)&,%a3,%acc1 + 419e: a6ef 0030 000a macw %spl,%a3l,%sp@\(10\)&,%a3,%acc3 + 41a4: a62f 0020 000a macw %spl,%d3l,%sp@\(10\)&,%d3,%acc1 + 41aa: a6af 0030 000a macw %spl,%d3l,%sp@\(10\)&,%d3,%acc3 + 41b0: ae6f 0020 000a macw %spl,%spl,%sp@\(10\)&,%sp,%acc1 + 41b6: aeef 0030 000a macw %spl,%spl,%sp@\(10\)&,%sp,%acc3 + 41bc: a22d 0000 a2ad macw %a5l,%d1l,%a5@\(-23891\),%d1,%acc1 + 41c2: 0010 020 + 41c4: a66d 0000 a6ed macw %a5l,%a3l,%a5@\(-22803\),%a3,%acc1 + 41ca: 0010 020 + 41cc: a62d 0000 a6ad macw %a5l,%d3l,%a5@\(-22867\),%d3,%acc1 + 41d2: 0010 020 + 41d4: ae6d 0000 aeed macw %a5l,%spl,%a5@\(-20755\),%sp,%acc1 + 41da: 0010 020 + 41dc: a22d 0020 a2ad macw %a5l,%d1l,%a5@\(-23891\)&,%d1,%acc1 + 41e2: 0030 060 + 41e4: a66d 0020 a6ed macw %a5l,%a3l,%a5@\(-22803\)&,%a3,%acc1 + 41ea: 0030 060 + 41ec: a62d 0020 a6ad macw %a5l,%d3l,%a5@\(-22867\)&,%d3,%acc1 + 41f2: 0030 060 + 41f4: ae6d 0020 aeed macw %a5l,%spl,%a5@\(-20755\)&,%sp,%acc1 + 41fa: 0030 060 + 41fc: a21f 0200 macw %spu,%d1l,<<,%sp@\+,%d1,%acc1 + 4200: a29f 0210 macw %spu,%d1l,<<,%sp@\+,%d1,%acc3 + 4204: a65f 0200 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 4208: a6df 0210 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 420c: a61f 0200 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 4210: a69f 0210 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 4214: ae5f 0200 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 4218: aedf 0210 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 421c: a21f 0220 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc1 + 4220: a29f 0230 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc3 + 4224: a65f 0220 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 4228: a6df 0230 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 422c: a61f 0220 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 4230: a69f 0230 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 4234: ae5f 0220 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 4238: aedf 0230 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 423c: a21f 0200 macw %spu,%d1l,<<,%sp@\+,%d1,%acc1 + 4240: a29f 0210 macw %spu,%d1l,<<,%sp@\+,%d1,%acc3 + 4244: a65f 0200 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 4248: a6df 0210 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 424c: a61f 0200 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 4250: a69f 0210 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 4254: ae5f 0200 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 4258: aedf 0210 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 425c: a21f 0220 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc1 + 4260: a29f 0230 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc3 + 4264: a65f 0220 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 4268: a6df 0230 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 426c: a61f 0220 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 4270: a69f 0230 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 4274: ae5f 0220 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 4278: aedf 0230 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 427c: a22f 0200 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc1 + 4282: a2af 0210 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc3 + 4288: a66f 0200 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + 428e: a6ef 0210 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + 4294: a62f 0200 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 429a: a6af 0210 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 42a0: ae6f 0200 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + 42a6: aeef 0210 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + 42ac: a22f 0220 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc1 + 42b2: a2af 0230 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc3 + 42b8: a66f 0220 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + 42be: a6ef 0230 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + 42c4: a62f 0220 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 42ca: a6af 0230 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 42d0: ae6f 0220 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + 42d6: aeef 0230 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + 42dc: a22d 0200 a2ad macw %a5l,%d1l,<<,%a5@\(-23891\),%d1,%acc1 + 42e2: 0210 01020 + 42e4: a66d 0200 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\),%a3,%acc1 + 42ea: 0210 01020 + 42ec: a62d 0200 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\),%d3,%acc1 + 42f2: 0210 01020 + 42f4: ae6d 0200 aeed macw %a5l,%spl,>>,%a5@\(-20755\),%sp,%acc1 + 42fa: 0210 01020 + 42fc: a22d 0220 a2ad macw %a5l,%d1l,<<,%a5@\(-23891\)&,%d1,%acc1 + 4302: 0230 01060 + 4304: a66d 0220 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\)&,%a3,%acc1 + 430a: 0230 01060 + 430c: a62d 0220 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\)&,%d3,%acc1 + 4312: 0230 01060 + 4314: ae6d 0220 aeed macw %a5l,%spl,>>,%a5@\(-20755\)&,%sp,%acc1 + 431a: 0230 01060 + 431c: a21f 0600 macw %spu,%d1l,<<,%sp@\+,%d1,%acc1 + 4320: a29f 0610 macw %spu,%d1l,<<,%sp@\+,%d1,%acc3 + 4324: a65f 0600 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 4328: a6df 0610 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 432c: a61f 0600 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 4330: a69f 0610 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 4334: ae5f 0600 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 4338: aedf 0610 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 433c: a21f 0620 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc1 + 4340: a29f 0630 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc3 + 4344: a65f 0620 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 4348: a6df 0630 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 434c: a61f 0620 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 4350: a69f 0630 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 4354: ae5f 0620 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 4358: aedf 0630 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 435c: a21f 0600 macw %spu,%d1l,<<,%sp@\+,%d1,%acc1 + 4360: a29f 0610 macw %spu,%d1l,<<,%sp@\+,%d1,%acc3 + 4364: a65f 0600 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 4368: a6df 0610 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 436c: a61f 0600 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 4370: a69f 0610 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 4374: ae5f 0600 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 4378: aedf 0610 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 437c: a21f 0620 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc1 + 4380: a29f 0630 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc3 + 4384: a65f 0620 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 4388: a6df 0630 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 438c: a61f 0620 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 4390: a69f 0630 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 4394: ae5f 0620 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 4398: aedf 0630 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 439c: a22f 0600 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc1 + 43a2: a2af 0610 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc3 + 43a8: a66f 0600 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + 43ae: a6ef 0610 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + 43b4: a62f 0600 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 43ba: a6af 0610 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 43c0: ae6f 0600 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + 43c6: aeef 0610 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + 43cc: a22f 0620 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc1 + 43d2: a2af 0630 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc3 + 43d8: a66f 0620 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + 43de: a6ef 0630 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + 43e4: a62f 0620 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 43ea: a6af 0630 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 43f0: ae6f 0620 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + 43f6: aeef 0630 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + 43fc: a22d 0600 a2ad macw %a5l,%d1l,<<,%a5@\(-23891\),%d1,%acc1 + 4402: 0610 03020 + 4404: a66d 0600 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\),%a3,%acc1 + 440a: 0610 03020 + 440c: a62d 0600 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\),%d3,%acc1 + 4412: 0610 03020 + 4414: ae6d 0600 aeed macw %a5l,%spl,>>,%a5@\(-20755\),%sp,%acc1 + 441a: 0610 03020 + 441c: a22d 0620 a2ad macw %a5l,%d1l,<<,%a5@\(-23891\)&,%d1,%acc1 + 4422: 0630 03060 + 4424: a66d 0620 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\)&,%a3,%acc1 + 442a: 0630 03060 + 442c: a62d 0620 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\)&,%d3,%acc1 + 4432: 0630 03060 + 4434: ae6d 0620 aeed macw %a5l,%spl,>>,%a5@\(-20755\)&,%sp,%acc1 + 443a: 0630 03060 + 443c: a21f 0200 macw %spu,%d1l,<<,%sp@\+,%d1,%acc1 + 4440: a29f 0210 macw %spu,%d1l,<<,%sp@\+,%d1,%acc3 + 4444: a65f 0200 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 4448: a6df 0210 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 444c: a61f 0200 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 4450: a69f 0210 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 4454: ae5f 0200 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 4458: aedf 0210 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 445c: a21f 0220 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc1 + 4460: a29f 0230 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc3 + 4464: a65f 0220 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 4468: a6df 0230 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 446c: a61f 0220 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 4470: a69f 0230 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 4474: ae5f 0220 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 4478: aedf 0230 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 447c: a21f 0200 macw %spu,%d1l,<<,%sp@\+,%d1,%acc1 + 4480: a29f 0210 macw %spu,%d1l,<<,%sp@\+,%d1,%acc3 + 4484: a65f 0200 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 4488: a6df 0210 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 448c: a61f 0200 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 4490: a69f 0210 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 4494: ae5f 0200 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 4498: aedf 0210 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 449c: a21f 0220 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc1 + 44a0: a29f 0230 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc3 + 44a4: a65f 0220 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 44a8: a6df 0230 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 44ac: a61f 0220 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 44b0: a69f 0230 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 44b4: ae5f 0220 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 44b8: aedf 0230 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 44bc: a22f 0200 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc1 + 44c2: a2af 0210 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc3 + 44c8: a66f 0200 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + 44ce: a6ef 0210 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + 44d4: a62f 0200 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 44da: a6af 0210 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 44e0: ae6f 0200 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + 44e6: aeef 0210 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + 44ec: a22f 0220 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc1 + 44f2: a2af 0230 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc3 + 44f8: a66f 0220 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + 44fe: a6ef 0230 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + 4504: a62f 0220 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 450a: a6af 0230 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 4510: ae6f 0220 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + 4516: aeef 0230 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + 451c: a22d 0200 a2ad macw %a5l,%d1l,<<,%a5@\(-23891\),%d1,%acc1 + 4522: 0210 01020 + 4524: a66d 0200 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\),%a3,%acc1 + 452a: 0210 01020 + 452c: a62d 0200 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\),%d3,%acc1 + 4532: 0210 01020 + 4534: ae6d 0200 aeed macw %a5l,%spl,>>,%a5@\(-20755\),%sp,%acc1 + 453a: 0210 01020 + 453c: a22d 0220 a2ad macw %a5l,%d1l,<<,%a5@\(-23891\)&,%d1,%acc1 + 4542: 0230 01060 + 4544: a66d 0220 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\)&,%a3,%acc1 + 454a: 0230 01060 + 454c: a62d 0220 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\)&,%d3,%acc1 + 4552: 0230 01060 + 4554: ae6d 0220 aeed macw %a5l,%spl,>>,%a5@\(-20755\)&,%sp,%acc1 + 455a: 0230 01060 + 455c: a21f 0600 macw %spu,%d1l,<<,%sp@\+,%d1,%acc1 + 4560: a29f 0610 macw %spu,%d1l,<<,%sp@\+,%d1,%acc3 + 4564: a65f 0600 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 4568: a6df 0610 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 456c: a61f 0600 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 4570: a69f 0610 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 4574: ae5f 0600 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 4578: aedf 0610 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 457c: a21f 0620 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc1 + 4580: a29f 0630 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc3 + 4584: a65f 0620 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 4588: a6df 0630 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 458c: a61f 0620 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 4590: a69f 0630 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 4594: ae5f 0620 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 4598: aedf 0630 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 459c: a21f 0600 macw %spu,%d1l,<<,%sp@\+,%d1,%acc1 + 45a0: a29f 0610 macw %spu,%d1l,<<,%sp@\+,%d1,%acc3 + 45a4: a65f 0600 macw %spu,%a3l,>>,%sp@\+,%a3,%acc1 + 45a8: a6df 0610 macw %spu,%a3l,>>,%sp@\+,%a3,%acc3 + 45ac: a61f 0600 macw %spu,%d3l,>>,%sp@\+,%d3,%acc1 + 45b0: a69f 0610 macw %spu,%d3l,>>,%sp@\+,%d3,%acc3 + 45b4: ae5f 0600 macw %spu,%spl,>>,%sp@\+,%sp,%acc1 + 45b8: aedf 0610 macw %spu,%spl,>>,%sp@\+,%sp,%acc3 + 45bc: a21f 0620 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc1 + 45c0: a29f 0630 macw %spu,%d1l,<<,%sp@\+&,%d1,%acc3 + 45c4: a65f 0620 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc1 + 45c8: a6df 0630 macw %spu,%a3l,>>,%sp@\+&,%a3,%acc3 + 45cc: a61f 0620 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc1 + 45d0: a69f 0630 macw %spu,%d3l,>>,%sp@\+&,%d3,%acc3 + 45d4: ae5f 0620 macw %spu,%spl,>>,%sp@\+&,%sp,%acc1 + 45d8: aedf 0630 macw %spu,%spl,>>,%sp@\+&,%sp,%acc3 + 45dc: a22f 0600 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc1 + 45e2: a2af 0610 000a macw %spl,%d1l,<<,%sp@\(10\),%d1,%acc3 + 45e8: a66f 0600 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc1 + 45ee: a6ef 0610 000a macw %spl,%a3l,>>,%sp@\(10\),%a3,%acc3 + 45f4: a62f 0600 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc1 + 45fa: a6af 0610 000a macw %spl,%d3l,>>,%sp@\(10\),%d3,%acc3 + 4600: ae6f 0600 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc1 + 4606: aeef 0610 000a macw %spl,%spl,>>,%sp@\(10\),%sp,%acc3 + 460c: a22f 0620 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc1 + 4612: a2af 0630 000a macw %spl,%d1l,<<,%sp@\(10\)&,%d1,%acc3 + 4618: a66f 0620 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc1 + 461e: a6ef 0630 000a macw %spl,%a3l,>>,%sp@\(10\)&,%a3,%acc3 + 4624: a62f 0620 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc1 + 462a: a6af 0630 000a macw %spl,%d3l,>>,%sp@\(10\)&,%d3,%acc3 + 4630: ae6f 0620 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc1 + 4636: aeef 0630 000a macw %spl,%spl,>>,%sp@\(10\)&,%sp,%acc3 + 463c: a22d 0600 a2ad macw %a5l,%d1l,<<,%a5@\(-23891\),%d1,%acc1 + 4642: 0610 03020 + 4644: a66d 0600 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\),%a3,%acc1 + 464a: 0610 03020 + 464c: a62d 0600 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\),%d3,%acc1 + 4652: 0610 03020 + 4654: ae6d 0600 aeed macw %a5l,%spl,>>,%a5@\(-20755\),%sp,%acc1 + 465a: 0610 03020 + 465c: a22d 0620 a2ad macw %a5l,%d1l,<<,%a5@\(-23891\)&,%d1,%acc1 + 4662: 0630 03060 + 4664: a66d 0620 a6ed macw %a5l,%a3l,>>,%a5@\(-22803\)&,%a3,%acc1 + 466a: 0630 03060 + 466c: a62d 0620 a6ad macw %a5l,%d3l,>>,%a5@\(-22867\)&,%d3,%acc1 + 4672: 0630 03060 + 4674: ae6d 0620 aeed macw %a5l,%spl,>>,%a5@\(-20755\)&,%sp,%acc1 + 467a: 0630 03060 + 467c: a657 00c0 macw %d7u,%a3u,%sp@,%a3,%acc1 + 4680: a6d7 00d0 macw %d7u,%a3u,%sp@,%a3,%acc3 + 4684: a657 00c0 macw %d7u,%a3u,%sp@,%a3,%acc1 + 4688: a6d7 00d0 macw %d7u,%a3u,%sp@,%a3,%acc3 + 468c: a457 00c0 macw %d7u,%a2u,%sp@,%a2,%acc1 + 4690: a4d7 00d0 macw %d7u,%a2u,%sp@,%a2,%acc3 + 4694: ae57 00c0 macw %d7u,%spu,%sp@,%sp,%acc1 + 4698: aed7 00d0 macw %d7u,%spu,%sp@,%sp,%acc3 + 469c: a657 00e0 macw %d7u,%a3u,%sp@&,%a3,%acc1 + 46a0: a6d7 00f0 macw %d7u,%a3u,%sp@&,%a3,%acc3 + 46a4: a657 00e0 macw %d7u,%a3u,%sp@&,%a3,%acc1 + 46a8: a6d7 00f0 macw %d7u,%a3u,%sp@&,%a3,%acc3 + 46ac: a457 00e0 macw %d7u,%a2u,%sp@&,%a2,%acc1 + 46b0: a4d7 00f0 macw %d7u,%a2u,%sp@&,%a2,%acc3 + 46b4: ae57 00e0 macw %d7u,%spu,%sp@&,%sp,%acc1 + 46b8: aed7 00f0 macw %d7u,%spu,%sp@&,%sp,%acc3 + 46bc: a65e 00c0 macw %fpu,%a3u,%fp@\+,%a3,%acc1 + 46c0: a6de 00d0 macw %fpu,%a3u,%fp@\+,%a3,%acc3 + 46c4: a65e 00c0 macw %fpu,%a3u,%fp@\+,%a3,%acc1 + 46c8: a6de 00d0 macw %fpu,%a3u,%fp@\+,%a3,%acc3 + 46cc: a45e 00c0 macw %fpu,%a2u,%fp@\+,%a2,%acc1 + 46d0: a4de 00d0 macw %fpu,%a2u,%fp@\+,%a2,%acc3 + 46d4: ae5e 00c0 macw %fpu,%spu,%fp@\+,%sp,%acc1 + 46d8: aede 00d0 macw %fpu,%spu,%fp@\+,%sp,%acc3 + 46dc: a65e 00e0 macw %fpu,%a3u,%fp@\+&,%a3,%acc1 + 46e0: a6de 00f0 macw %fpu,%a3u,%fp@\+&,%a3,%acc3 + 46e4: a65e 00e0 macw %fpu,%a3u,%fp@\+&,%a3,%acc1 + 46e8: a6de 00f0 macw %fpu,%a3u,%fp@\+&,%a3,%acc3 + 46ec: a45e 00e0 macw %fpu,%a2u,%fp@\+&,%a2,%acc1 + 46f0: a4de 00f0 macw %fpu,%a2u,%fp@\+&,%a2,%acc3 + 46f4: ae5e 00e0 macw %fpu,%spu,%fp@\+&,%sp,%acc1 + 46f8: aede 00f0 macw %fpu,%spu,%fp@\+&,%sp,%acc3 + 46fc: a66e 00c0 000a macw %fpu,%a3u,%fp@\(10\),%a3,%acc1 + 4702: a6ee 00d0 000a macw %fpu,%a3u,%fp@\(10\),%a3,%acc3 + 4708: a66e 00c0 000a macw %fpu,%a3u,%fp@\(10\),%a3,%acc1 + 470e: a6ee 00d0 000a macw %fpu,%a3u,%fp@\(10\),%a3,%acc3 + 4714: a46e 00c0 000a macw %fpu,%a2u,%fp@\(10\),%a2,%acc1 + 471a: a4ee 00d0 000a macw %fpu,%a2u,%fp@\(10\),%a2,%acc3 + 4720: ae6e 00c0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc1 + 4726: aeee 00d0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc3 + 472c: a66e 00e0 000a macw %fpu,%a3u,%fp@\(10\)&,%a3,%acc1 + 4732: a6ee 00f0 000a macw %fpu,%a3u,%fp@\(10\)&,%a3,%acc3 + 4738: a66e 00e0 000a macw %fpu,%a3u,%fp@\(10\)&,%a3,%acc1 + 473e: a6ee 00f0 000a macw %fpu,%a3u,%fp@\(10\)&,%a3,%acc3 + 4744: a46e 00e0 000a macw %fpu,%a2u,%fp@\(10\)&,%a2,%acc1 + 474a: a4ee 00f0 000a macw %fpu,%a2u,%fp@\(10\)&,%a2,%acc3 + 4750: ae6e 00e0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc1 + 4756: aeee 00f0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc3 + 475c: a667 00c0 macw %d7u,%a3u,%sp@-,%a3,%acc1 + 4760: a6e7 00d0 macw %d7u,%a3u,%sp@-,%a3,%acc3 + 4764: a667 00c0 macw %d7u,%a3u,%sp@-,%a3,%acc1 + 4768: a6e7 00d0 macw %d7u,%a3u,%sp@-,%a3,%acc3 + 476c: a467 00c0 macw %d7u,%a2u,%sp@-,%a2,%acc1 + 4770: a4e7 00d0 macw %d7u,%a2u,%sp@-,%a2,%acc3 + 4774: ae67 00c0 macw %d7u,%spu,%sp@-,%sp,%acc1 + 4778: aee7 00d0 macw %d7u,%spu,%sp@-,%sp,%acc3 + 477c: a667 00e0 macw %d7u,%a3u,%sp@-&,%a3,%acc1 + 4780: a6e7 00f0 macw %d7u,%a3u,%sp@-&,%a3,%acc3 + 4784: a667 00e0 macw %d7u,%a3u,%sp@-&,%a3,%acc1 + 4788: a6e7 00f0 macw %d7u,%a3u,%sp@-&,%a3,%acc3 + 478c: a467 00e0 macw %d7u,%a2u,%sp@-&,%a2,%acc1 + 4790: a4e7 00f0 macw %d7u,%a2u,%sp@-&,%a2,%acc3 + 4794: ae67 00e0 macw %d7u,%spu,%sp@-&,%sp,%acc1 + 4798: aee7 00f0 macw %d7u,%spu,%sp@-&,%sp,%acc3 + 479c: a657 02c0 macw %d7u,%a3u,>>,%sp@,%a3,%acc1 + 47a0: a6d7 02d0 macw %d7u,%a3u,>>,%sp@,%a3,%acc3 + 47a4: a657 02c0 macw %d7u,%a3u,>>,%sp@,%a3,%acc1 + 47a8: a6d7 02d0 macw %d7u,%a3u,>>,%sp@,%a3,%acc3 + 47ac: a457 02c0 macw %d7u,%a2u,,%sp@,%a2,%acc1 + 47b0: a4d7 02d0 macw %d7u,%a2u,,%sp@,%a2,%acc3 + 47b4: ae57 02c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 47b8: aed7 02d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 47bc: a657 02e0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc1 + 47c0: a6d7 02f0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc3 + 47c4: a657 02e0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc1 + 47c8: a6d7 02f0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc3 + 47cc: a457 02e0 macw %d7u,%a2u,,%sp@&,%a2,%acc1 + 47d0: a4d7 02f0 macw %d7u,%a2u,,%sp@&,%a2,%acc3 + 47d4: ae57 02e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 47d8: aed7 02f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 47dc: a65e 02c0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc1 + 47e0: a6de 02d0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc3 + 47e4: a65e 02c0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc1 + 47e8: a6de 02d0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc3 + 47ec: a45e 02c0 macw %fpu,%a2u,,%fp@\+,%a2,%acc1 + 47f0: a4de 02d0 macw %fpu,%a2u,,%fp@\+,%a2,%acc3 + 47f4: ae5e 02c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 47f8: aede 02d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 47fc: a65e 02e0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc1 + 4800: a6de 02f0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc3 + 4804: a65e 02e0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc1 + 4808: a6de 02f0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc3 + 480c: a45e 02e0 macw %fpu,%a2u,,%fp@\+&,%a2,%acc1 + 4810: a4de 02f0 macw %fpu,%a2u,,%fp@\+&,%a2,%acc3 + 4814: ae5e 02e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 4818: aede 02f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 481c: a66e 02c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 4822: a6ee 02d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 4828: a66e 02c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 482e: a6ee 02d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 4834: a46e 02c0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc1 + 483a: a4ee 02d0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc3 + 4840: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 4846: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 484c: a66e 02e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 4852: a6ee 02f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 4858: a66e 02e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 485e: a6ee 02f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 4864: a46e 02e0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc1 + 486a: a4ee 02f0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc3 + 4870: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 4876: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 487c: a667 02c0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc1 + 4880: a6e7 02d0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc3 + 4884: a667 02c0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc1 + 4888: a6e7 02d0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc3 + 488c: a467 02c0 macw %d7u,%a2u,,%sp@-,%a2,%acc1 + 4890: a4e7 02d0 macw %d7u,%a2u,,%sp@-,%a2,%acc3 + 4894: ae67 02c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 4898: aee7 02d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 489c: a667 02e0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc1 + 48a0: a6e7 02f0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc3 + 48a4: a667 02e0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc1 + 48a8: a6e7 02f0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc3 + 48ac: a467 02e0 macw %d7u,%a2u,,%sp@-&,%a2,%acc1 + 48b0: a4e7 02f0 macw %d7u,%a2u,,%sp@-&,%a2,%acc3 + 48b4: ae67 02e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 48b8: aee7 02f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 48bc: a657 06c0 macw %d7u,%a3u,>>,%sp@,%a3,%acc1 + 48c0: a6d7 06d0 macw %d7u,%a3u,>>,%sp@,%a3,%acc3 + 48c4: a657 06c0 macw %d7u,%a3u,>>,%sp@,%a3,%acc1 + 48c8: a6d7 06d0 macw %d7u,%a3u,>>,%sp@,%a3,%acc3 + 48cc: a457 06c0 macw %d7u,%a2u,,%sp@,%a2,%acc1 + 48d0: a4d7 06d0 macw %d7u,%a2u,,%sp@,%a2,%acc3 + 48d4: ae57 06c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 48d8: aed7 06d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 48dc: a657 06e0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc1 + 48e0: a6d7 06f0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc3 + 48e4: a657 06e0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc1 + 48e8: a6d7 06f0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc3 + 48ec: a457 06e0 macw %d7u,%a2u,,%sp@&,%a2,%acc1 + 48f0: a4d7 06f0 macw %d7u,%a2u,,%sp@&,%a2,%acc3 + 48f4: ae57 06e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 48f8: aed7 06f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 48fc: a65e 06c0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc1 + 4900: a6de 06d0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc3 + 4904: a65e 06c0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc1 + 4908: a6de 06d0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc3 + 490c: a45e 06c0 macw %fpu,%a2u,,%fp@\+,%a2,%acc1 + 4910: a4de 06d0 macw %fpu,%a2u,,%fp@\+,%a2,%acc3 + 4914: ae5e 06c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 4918: aede 06d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 491c: a65e 06e0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc1 + 4920: a6de 06f0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc3 + 4924: a65e 06e0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc1 + 4928: a6de 06f0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc3 + 492c: a45e 06e0 macw %fpu,%a2u,,%fp@\+&,%a2,%acc1 + 4930: a4de 06f0 macw %fpu,%a2u,,%fp@\+&,%a2,%acc3 + 4934: ae5e 06e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 4938: aede 06f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 493c: a66e 06c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 4942: a6ee 06d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 4948: a66e 06c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 494e: a6ee 06d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 4954: a46e 06c0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc1 + 495a: a4ee 06d0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc3 + 4960: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 4966: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 496c: a66e 06e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 4972: a6ee 06f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 4978: a66e 06e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 497e: a6ee 06f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 4984: a46e 06e0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc1 + 498a: a4ee 06f0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc3 + 4990: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 4996: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 499c: a667 06c0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc1 + 49a0: a6e7 06d0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc3 + 49a4: a667 06c0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc1 + 49a8: a6e7 06d0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc3 + 49ac: a467 06c0 macw %d7u,%a2u,,%sp@-,%a2,%acc1 + 49b0: a4e7 06d0 macw %d7u,%a2u,,%sp@-,%a2,%acc3 + 49b4: ae67 06c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 49b8: aee7 06d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 49bc: a667 06e0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc1 + 49c0: a6e7 06f0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc3 + 49c4: a667 06e0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc1 + 49c8: a6e7 06f0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc3 + 49cc: a467 06e0 macw %d7u,%a2u,,%sp@-&,%a2,%acc1 + 49d0: a4e7 06f0 macw %d7u,%a2u,,%sp@-&,%a2,%acc3 + 49d4: ae67 06e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 49d8: aee7 06f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 49dc: a657 02c0 macw %d7u,%a3u,>>,%sp@,%a3,%acc1 + 49e0: a6d7 02d0 macw %d7u,%a3u,>>,%sp@,%a3,%acc3 + 49e4: a657 02c0 macw %d7u,%a3u,>>,%sp@,%a3,%acc1 + 49e8: a6d7 02d0 macw %d7u,%a3u,>>,%sp@,%a3,%acc3 + 49ec: a457 02c0 macw %d7u,%a2u,,%sp@,%a2,%acc1 + 49f0: a4d7 02d0 macw %d7u,%a2u,,%sp@,%a2,%acc3 + 49f4: ae57 02c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 49f8: aed7 02d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 49fc: a657 02e0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc1 + 4a00: a6d7 02f0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc3 + 4a04: a657 02e0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc1 + 4a08: a6d7 02f0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc3 + 4a0c: a457 02e0 macw %d7u,%a2u,,%sp@&,%a2,%acc1 + 4a10: a4d7 02f0 macw %d7u,%a2u,,%sp@&,%a2,%acc3 + 4a14: ae57 02e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 4a18: aed7 02f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 4a1c: a65e 02c0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc1 + 4a20: a6de 02d0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc3 + 4a24: a65e 02c0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc1 + 4a28: a6de 02d0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc3 + 4a2c: a45e 02c0 macw %fpu,%a2u,,%fp@\+,%a2,%acc1 + 4a30: a4de 02d0 macw %fpu,%a2u,,%fp@\+,%a2,%acc3 + 4a34: ae5e 02c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 4a38: aede 02d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 4a3c: a65e 02e0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc1 + 4a40: a6de 02f0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc3 + 4a44: a65e 02e0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc1 + 4a48: a6de 02f0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc3 + 4a4c: a45e 02e0 macw %fpu,%a2u,,%fp@\+&,%a2,%acc1 + 4a50: a4de 02f0 macw %fpu,%a2u,,%fp@\+&,%a2,%acc3 + 4a54: ae5e 02e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 4a58: aede 02f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 4a5c: a66e 02c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 4a62: a6ee 02d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 4a68: a66e 02c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 4a6e: a6ee 02d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 4a74: a46e 02c0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc1 + 4a7a: a4ee 02d0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc3 + 4a80: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 4a86: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 4a8c: a66e 02e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 4a92: a6ee 02f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 4a98: a66e 02e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 4a9e: a6ee 02f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 4aa4: a46e 02e0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc1 + 4aaa: a4ee 02f0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc3 + 4ab0: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 4ab6: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 4abc: a667 02c0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc1 + 4ac0: a6e7 02d0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc3 + 4ac4: a667 02c0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc1 + 4ac8: a6e7 02d0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc3 + 4acc: a467 02c0 macw %d7u,%a2u,,%sp@-,%a2,%acc1 + 4ad0: a4e7 02d0 macw %d7u,%a2u,,%sp@-,%a2,%acc3 + 4ad4: ae67 02c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 4ad8: aee7 02d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 4adc: a667 02e0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc1 + 4ae0: a6e7 02f0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc3 + 4ae4: a667 02e0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc1 + 4ae8: a6e7 02f0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc3 + 4aec: a467 02e0 macw %d7u,%a2u,,%sp@-&,%a2,%acc1 + 4af0: a4e7 02f0 macw %d7u,%a2u,,%sp@-&,%a2,%acc3 + 4af4: ae67 02e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 4af8: aee7 02f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 4afc: a657 06c0 macw %d7u,%a3u,>>,%sp@,%a3,%acc1 + 4b00: a6d7 06d0 macw %d7u,%a3u,>>,%sp@,%a3,%acc3 + 4b04: a657 06c0 macw %d7u,%a3u,>>,%sp@,%a3,%acc1 + 4b08: a6d7 06d0 macw %d7u,%a3u,>>,%sp@,%a3,%acc3 + 4b0c: a457 06c0 macw %d7u,%a2u,,%sp@,%a2,%acc1 + 4b10: a4d7 06d0 macw %d7u,%a2u,,%sp@,%a2,%acc3 + 4b14: ae57 06c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 4b18: aed7 06d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 4b1c: a657 06e0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc1 + 4b20: a6d7 06f0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc3 + 4b24: a657 06e0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc1 + 4b28: a6d7 06f0 macw %d7u,%a3u,>>,%sp@&,%a3,%acc3 + 4b2c: a457 06e0 macw %d7u,%a2u,,%sp@&,%a2,%acc1 + 4b30: a4d7 06f0 macw %d7u,%a2u,,%sp@&,%a2,%acc3 + 4b34: ae57 06e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 4b38: aed7 06f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 4b3c: a65e 06c0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc1 + 4b40: a6de 06d0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc3 + 4b44: a65e 06c0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc1 + 4b48: a6de 06d0 macw %fpu,%a3u,>>,%fp@\+,%a3,%acc3 + 4b4c: a45e 06c0 macw %fpu,%a2u,,%fp@\+,%a2,%acc1 + 4b50: a4de 06d0 macw %fpu,%a2u,,%fp@\+,%a2,%acc3 + 4b54: ae5e 06c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 4b58: aede 06d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 4b5c: a65e 06e0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc1 + 4b60: a6de 06f0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc3 + 4b64: a65e 06e0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc1 + 4b68: a6de 06f0 macw %fpu,%a3u,>>,%fp@\+&,%a3,%acc3 + 4b6c: a45e 06e0 macw %fpu,%a2u,,%fp@\+&,%a2,%acc1 + 4b70: a4de 06f0 macw %fpu,%a2u,,%fp@\+&,%a2,%acc3 + 4b74: ae5e 06e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 4b78: aede 06f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 4b7c: a66e 06c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 4b82: a6ee 06d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 4b88: a66e 06c0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc1 + 4b8e: a6ee 06d0 000a macw %fpu,%a3u,>>,%fp@\(10\),%a3,%acc3 + 4b94: a46e 06c0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc1 + 4b9a: a4ee 06d0 000a macw %fpu,%a2u,,%fp@\(10\),%a2,%acc3 + 4ba0: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 4ba6: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 4bac: a66e 06e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 4bb2: a6ee 06f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 4bb8: a66e 06e0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc1 + 4bbe: a6ee 06f0 000a macw %fpu,%a3u,>>,%fp@\(10\)&,%a3,%acc3 + 4bc4: a46e 06e0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc1 + 4bca: a4ee 06f0 000a macw %fpu,%a2u,,%fp@\(10\)&,%a2,%acc3 + 4bd0: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 4bd6: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 4bdc: a667 06c0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc1 + 4be0: a6e7 06d0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc3 + 4be4: a667 06c0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc1 + 4be8: a6e7 06d0 macw %d7u,%a3u,>>,%sp@-,%a3,%acc3 + 4bec: a467 06c0 macw %d7u,%a2u,,%sp@-,%a2,%acc1 + 4bf0: a4e7 06d0 macw %d7u,%a2u,,%sp@-,%a2,%acc3 + 4bf4: ae67 06c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 4bf8: aee7 06d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 4bfc: a667 06e0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc1 + 4c00: a6e7 06f0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc3 + 4c04: a667 06e0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc1 + 4c08: a6e7 06f0 macw %d7u,%a3u,>>,%sp@-&,%a3,%acc3 + 4c0c: a467 06e0 macw %d7u,%a2u,,%sp@-&,%a2,%acc1 + 4c10: a4e7 06f0 macw %d7u,%a2u,,%sp@-&,%a2,%acc3 + 4c14: ae67 06e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 4c18: aee7 06f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 4c1c: a617 0040 macw %d7u,%d3l,%sp@,%d3,%acc1 + 4c20: a697 0050 macw %d7u,%d3l,%sp@,%d3,%acc3 + 4c24: a657 0040 macw %d7u,%a3l,%sp@,%a3,%acc1 + 4c28: a6d7 0050 macw %d7u,%a3l,%sp@,%a3,%acc3 + 4c2c: a617 0040 macw %d7u,%d3l,%sp@,%d3,%acc1 + 4c30: a697 0050 macw %d7u,%d3l,%sp@,%d3,%acc3 + 4c34: ae57 0040 macw %d7u,%spl,%sp@,%sp,%acc1 + 4c38: aed7 0050 macw %d7u,%spl,%sp@,%sp,%acc3 + 4c3c: a617 0060 macw %d7u,%d3l,%sp@&,%d3,%acc1 + 4c40: a697 0070 macw %d7u,%d3l,%sp@&,%d3,%acc3 + 4c44: a657 0060 macw %d7u,%a3l,%sp@&,%a3,%acc1 + 4c48: a6d7 0070 macw %d7u,%a3l,%sp@&,%a3,%acc3 + 4c4c: a617 0060 macw %d7u,%d3l,%sp@&,%d3,%acc1 + 4c50: a697 0070 macw %d7u,%d3l,%sp@&,%d3,%acc3 + 4c54: ae57 0060 macw %d7u,%spl,%sp@&,%sp,%acc1 + 4c58: aed7 0070 macw %d7u,%spl,%sp@&,%sp,%acc3 + 4c5c: a61e 0040 macw %fpu,%d3l,%fp@\+,%d3,%acc1 + 4c60: a69e 0050 macw %fpu,%d3l,%fp@\+,%d3,%acc3 + 4c64: a65e 0040 macw %fpu,%a3l,%fp@\+,%a3,%acc1 + 4c68: a6de 0050 macw %fpu,%a3l,%fp@\+,%a3,%acc3 + 4c6c: a61e 0040 macw %fpu,%d3l,%fp@\+,%d3,%acc1 + 4c70: a69e 0050 macw %fpu,%d3l,%fp@\+,%d3,%acc3 + 4c74: ae5e 0040 macw %fpu,%spl,%fp@\+,%sp,%acc1 + 4c78: aede 0050 macw %fpu,%spl,%fp@\+,%sp,%acc3 + 4c7c: a61e 0060 macw %fpu,%d3l,%fp@\+&,%d3,%acc1 + 4c80: a69e 0070 macw %fpu,%d3l,%fp@\+&,%d3,%acc3 + 4c84: a65e 0060 macw %fpu,%a3l,%fp@\+&,%a3,%acc1 + 4c88: a6de 0070 macw %fpu,%a3l,%fp@\+&,%a3,%acc3 + 4c8c: a61e 0060 macw %fpu,%d3l,%fp@\+&,%d3,%acc1 + 4c90: a69e 0070 macw %fpu,%d3l,%fp@\+&,%d3,%acc3 + 4c94: ae5e 0060 macw %fpu,%spl,%fp@\+&,%sp,%acc1 + 4c98: aede 0070 macw %fpu,%spl,%fp@\+&,%sp,%acc3 + 4c9c: a62e 0040 000a macw %fpu,%d3l,%fp@\(10\),%d3,%acc1 + 4ca2: a6ae 0050 000a macw %fpu,%d3l,%fp@\(10\),%d3,%acc3 + 4ca8: a66e 0040 000a macw %fpu,%a3l,%fp@\(10\),%a3,%acc1 + 4cae: a6ee 0050 000a macw %fpu,%a3l,%fp@\(10\),%a3,%acc3 + 4cb4: a62e 0040 000a macw %fpu,%d3l,%fp@\(10\),%d3,%acc1 + 4cba: a6ae 0050 000a macw %fpu,%d3l,%fp@\(10\),%d3,%acc3 + 4cc0: ae6e 0040 000a macw %fpu,%spl,%fp@\(10\),%sp,%acc1 + 4cc6: aeee 0050 000a macw %fpu,%spl,%fp@\(10\),%sp,%acc3 + 4ccc: a62e 0060 000a macw %fpu,%d3l,%fp@\(10\)&,%d3,%acc1 + 4cd2: a6ae 0070 000a macw %fpu,%d3l,%fp@\(10\)&,%d3,%acc3 + 4cd8: a66e 0060 000a macw %fpu,%a3l,%fp@\(10\)&,%a3,%acc1 + 4cde: a6ee 0070 000a macw %fpu,%a3l,%fp@\(10\)&,%a3,%acc3 + 4ce4: a62e 0060 000a macw %fpu,%d3l,%fp@\(10\)&,%d3,%acc1 + 4cea: a6ae 0070 000a macw %fpu,%d3l,%fp@\(10\)&,%d3,%acc3 + 4cf0: ae6e 0060 000a macw %fpu,%spl,%fp@\(10\)&,%sp,%acc1 + 4cf6: aeee 0070 000a macw %fpu,%spl,%fp@\(10\)&,%sp,%acc3 + 4cfc: a627 0040 macw %d7u,%d3l,%sp@-,%d3,%acc1 + 4d00: a6a7 0050 macw %d7u,%d3l,%sp@-,%d3,%acc3 + 4d04: a667 0040 macw %d7u,%a3l,%sp@-,%a3,%acc1 + 4d08: a6e7 0050 macw %d7u,%a3l,%sp@-,%a3,%acc3 + 4d0c: a627 0040 macw %d7u,%d3l,%sp@-,%d3,%acc1 + 4d10: a6a7 0050 macw %d7u,%d3l,%sp@-,%d3,%acc3 + 4d14: ae67 0040 macw %d7u,%spl,%sp@-,%sp,%acc1 + 4d18: aee7 0050 macw %d7u,%spl,%sp@-,%sp,%acc3 + 4d1c: a627 0060 macw %d7u,%d3l,%sp@-&,%d3,%acc1 + 4d20: a6a7 0070 macw %d7u,%d3l,%sp@-&,%d3,%acc3 + 4d24: a667 0060 macw %d7u,%a3l,%sp@-&,%a3,%acc1 + 4d28: a6e7 0070 macw %d7u,%a3l,%sp@-&,%a3,%acc3 + 4d2c: a627 0060 macw %d7u,%d3l,%sp@-&,%d3,%acc1 + 4d30: a6a7 0070 macw %d7u,%d3l,%sp@-&,%d3,%acc3 + 4d34: ae67 0060 macw %d7u,%spl,%sp@-&,%sp,%acc1 + 4d38: aee7 0070 macw %d7u,%spl,%sp@-&,%sp,%acc3 + 4d3c: a617 0240 macw %d7u,%d3l,>>,%sp@,%d3,%acc1 + 4d40: a697 0250 macw %d7u,%d3l,>>,%sp@,%d3,%acc3 + 4d44: a657 0240 macw %d7u,%a3l,>>,%sp@,%a3,%acc1 + 4d48: a6d7 0250 macw %d7u,%a3l,>>,%sp@,%a3,%acc3 + 4d4c: a617 0240 macw %d7u,%d3l,>>,%sp@,%d3,%acc1 + 4d50: a697 0250 macw %d7u,%d3l,>>,%sp@,%d3,%acc3 + 4d54: ae57 0240 macw %d7u,%spl,>>,%sp@,%sp,%acc1 + 4d58: aed7 0250 macw %d7u,%spl,>>,%sp@,%sp,%acc3 + 4d5c: a617 0260 macw %d7u,%d3l,>>,%sp@&,%d3,%acc1 + 4d60: a697 0270 macw %d7u,%d3l,>>,%sp@&,%d3,%acc3 + 4d64: a657 0260 macw %d7u,%a3l,>>,%sp@&,%a3,%acc1 + 4d68: a6d7 0270 macw %d7u,%a3l,>>,%sp@&,%a3,%acc3 + 4d6c: a617 0260 macw %d7u,%d3l,>>,%sp@&,%d3,%acc1 + 4d70: a697 0270 macw %d7u,%d3l,>>,%sp@&,%d3,%acc3 + 4d74: ae57 0260 macw %d7u,%spl,>>,%sp@&,%sp,%acc1 + 4d78: aed7 0270 macw %d7u,%spl,>>,%sp@&,%sp,%acc3 + 4d7c: a61e 0240 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc1 + 4d80: a69e 0250 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc3 + 4d84: a65e 0240 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc1 + 4d88: a6de 0250 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc3 + 4d8c: a61e 0240 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc1 + 4d90: a69e 0250 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc3 + 4d94: ae5e 0240 macw %fpu,%spl,>>,%fp@\+,%sp,%acc1 + 4d98: aede 0250 macw %fpu,%spl,>>,%fp@\+,%sp,%acc3 + 4d9c: a61e 0260 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc1 + 4da0: a69e 0270 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc3 + 4da4: a65e 0260 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc1 + 4da8: a6de 0270 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc3 + 4dac: a61e 0260 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc1 + 4db0: a69e 0270 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc3 + 4db4: ae5e 0260 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc1 + 4db8: aede 0270 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc3 + 4dbc: a62e 0240 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 4dc2: a6ae 0250 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 4dc8: a66e 0240 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 4dce: a6ee 0250 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 4dd4: a62e 0240 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 4dda: a6ae 0250 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 4de0: ae6e 0240 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 4de6: aeee 0250 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 4dec: a62e 0260 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 4df2: a6ae 0270 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 4df8: a66e 0260 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 4dfe: a6ee 0270 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 4e04: a62e 0260 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 4e0a: a6ae 0270 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 4e10: ae6e 0260 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 4e16: aeee 0270 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 4e1c: a627 0240 macw %d7u,%d3l,>>,%sp@-,%d3,%acc1 + 4e20: a6a7 0250 macw %d7u,%d3l,>>,%sp@-,%d3,%acc3 + 4e24: a667 0240 macw %d7u,%a3l,>>,%sp@-,%a3,%acc1 + 4e28: a6e7 0250 macw %d7u,%a3l,>>,%sp@-,%a3,%acc3 + 4e2c: a627 0240 macw %d7u,%d3l,>>,%sp@-,%d3,%acc1 + 4e30: a6a7 0250 macw %d7u,%d3l,>>,%sp@-,%d3,%acc3 + 4e34: ae67 0240 macw %d7u,%spl,>>,%sp@-,%sp,%acc1 + 4e38: aee7 0250 macw %d7u,%spl,>>,%sp@-,%sp,%acc3 + 4e3c: a627 0260 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc1 + 4e40: a6a7 0270 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc3 + 4e44: a667 0260 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc1 + 4e48: a6e7 0270 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc3 + 4e4c: a627 0260 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc1 + 4e50: a6a7 0270 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc3 + 4e54: ae67 0260 macw %d7u,%spl,>>,%sp@-&,%sp,%acc1 + 4e58: aee7 0270 macw %d7u,%spl,>>,%sp@-&,%sp,%acc3 + 4e5c: a617 0640 macw %d7u,%d3l,>>,%sp@,%d3,%acc1 + 4e60: a697 0650 macw %d7u,%d3l,>>,%sp@,%d3,%acc3 + 4e64: a657 0640 macw %d7u,%a3l,>>,%sp@,%a3,%acc1 + 4e68: a6d7 0650 macw %d7u,%a3l,>>,%sp@,%a3,%acc3 + 4e6c: a617 0640 macw %d7u,%d3l,>>,%sp@,%d3,%acc1 + 4e70: a697 0650 macw %d7u,%d3l,>>,%sp@,%d3,%acc3 + 4e74: ae57 0640 macw %d7u,%spl,>>,%sp@,%sp,%acc1 + 4e78: aed7 0650 macw %d7u,%spl,>>,%sp@,%sp,%acc3 + 4e7c: a617 0660 macw %d7u,%d3l,>>,%sp@&,%d3,%acc1 + 4e80: a697 0670 macw %d7u,%d3l,>>,%sp@&,%d3,%acc3 + 4e84: a657 0660 macw %d7u,%a3l,>>,%sp@&,%a3,%acc1 + 4e88: a6d7 0670 macw %d7u,%a3l,>>,%sp@&,%a3,%acc3 + 4e8c: a617 0660 macw %d7u,%d3l,>>,%sp@&,%d3,%acc1 + 4e90: a697 0670 macw %d7u,%d3l,>>,%sp@&,%d3,%acc3 + 4e94: ae57 0660 macw %d7u,%spl,>>,%sp@&,%sp,%acc1 + 4e98: aed7 0670 macw %d7u,%spl,>>,%sp@&,%sp,%acc3 + 4e9c: a61e 0640 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc1 + 4ea0: a69e 0650 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc3 + 4ea4: a65e 0640 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc1 + 4ea8: a6de 0650 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc3 + 4eac: a61e 0640 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc1 + 4eb0: a69e 0650 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc3 + 4eb4: ae5e 0640 macw %fpu,%spl,>>,%fp@\+,%sp,%acc1 + 4eb8: aede 0650 macw %fpu,%spl,>>,%fp@\+,%sp,%acc3 + 4ebc: a61e 0660 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc1 + 4ec0: a69e 0670 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc3 + 4ec4: a65e 0660 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc1 + 4ec8: a6de 0670 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc3 + 4ecc: a61e 0660 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc1 + 4ed0: a69e 0670 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc3 + 4ed4: ae5e 0660 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc1 + 4ed8: aede 0670 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc3 + 4edc: a62e 0640 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 4ee2: a6ae 0650 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 4ee8: a66e 0640 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 4eee: a6ee 0650 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 4ef4: a62e 0640 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 4efa: a6ae 0650 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 4f00: ae6e 0640 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 4f06: aeee 0650 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 4f0c: a62e 0660 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 4f12: a6ae 0670 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 4f18: a66e 0660 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 4f1e: a6ee 0670 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 4f24: a62e 0660 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 4f2a: a6ae 0670 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 4f30: ae6e 0660 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 4f36: aeee 0670 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 4f3c: a627 0640 macw %d7u,%d3l,>>,%sp@-,%d3,%acc1 + 4f40: a6a7 0650 macw %d7u,%d3l,>>,%sp@-,%d3,%acc3 + 4f44: a667 0640 macw %d7u,%a3l,>>,%sp@-,%a3,%acc1 + 4f48: a6e7 0650 macw %d7u,%a3l,>>,%sp@-,%a3,%acc3 + 4f4c: a627 0640 macw %d7u,%d3l,>>,%sp@-,%d3,%acc1 + 4f50: a6a7 0650 macw %d7u,%d3l,>>,%sp@-,%d3,%acc3 + 4f54: ae67 0640 macw %d7u,%spl,>>,%sp@-,%sp,%acc1 + 4f58: aee7 0650 macw %d7u,%spl,>>,%sp@-,%sp,%acc3 + 4f5c: a627 0660 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc1 + 4f60: a6a7 0670 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc3 + 4f64: a667 0660 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc1 + 4f68: a6e7 0670 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc3 + 4f6c: a627 0660 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc1 + 4f70: a6a7 0670 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc3 + 4f74: ae67 0660 macw %d7u,%spl,>>,%sp@-&,%sp,%acc1 + 4f78: aee7 0670 macw %d7u,%spl,>>,%sp@-&,%sp,%acc3 + 4f7c: a617 0240 macw %d7u,%d3l,>>,%sp@,%d3,%acc1 + 4f80: a697 0250 macw %d7u,%d3l,>>,%sp@,%d3,%acc3 + 4f84: a657 0240 macw %d7u,%a3l,>>,%sp@,%a3,%acc1 + 4f88: a6d7 0250 macw %d7u,%a3l,>>,%sp@,%a3,%acc3 + 4f8c: a617 0240 macw %d7u,%d3l,>>,%sp@,%d3,%acc1 + 4f90: a697 0250 macw %d7u,%d3l,>>,%sp@,%d3,%acc3 + 4f94: ae57 0240 macw %d7u,%spl,>>,%sp@,%sp,%acc1 + 4f98: aed7 0250 macw %d7u,%spl,>>,%sp@,%sp,%acc3 + 4f9c: a617 0260 macw %d7u,%d3l,>>,%sp@&,%d3,%acc1 + 4fa0: a697 0270 macw %d7u,%d3l,>>,%sp@&,%d3,%acc3 + 4fa4: a657 0260 macw %d7u,%a3l,>>,%sp@&,%a3,%acc1 + 4fa8: a6d7 0270 macw %d7u,%a3l,>>,%sp@&,%a3,%acc3 + 4fac: a617 0260 macw %d7u,%d3l,>>,%sp@&,%d3,%acc1 + 4fb0: a697 0270 macw %d7u,%d3l,>>,%sp@&,%d3,%acc3 + 4fb4: ae57 0260 macw %d7u,%spl,>>,%sp@&,%sp,%acc1 + 4fb8: aed7 0270 macw %d7u,%spl,>>,%sp@&,%sp,%acc3 + 4fbc: a61e 0240 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc1 + 4fc0: a69e 0250 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc3 + 4fc4: a65e 0240 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc1 + 4fc8: a6de 0250 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc3 + 4fcc: a61e 0240 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc1 + 4fd0: a69e 0250 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc3 + 4fd4: ae5e 0240 macw %fpu,%spl,>>,%fp@\+,%sp,%acc1 + 4fd8: aede 0250 macw %fpu,%spl,>>,%fp@\+,%sp,%acc3 + 4fdc: a61e 0260 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc1 + 4fe0: a69e 0270 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc3 + 4fe4: a65e 0260 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc1 + 4fe8: a6de 0270 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc3 + 4fec: a61e 0260 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc1 + 4ff0: a69e 0270 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc3 + 4ff4: ae5e 0260 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc1 + 4ff8: aede 0270 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc3 + 4ffc: a62e 0240 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 5002: a6ae 0250 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 5008: a66e 0240 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 500e: a6ee 0250 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 5014: a62e 0240 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 501a: a6ae 0250 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 5020: ae6e 0240 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 5026: aeee 0250 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 502c: a62e 0260 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 5032: a6ae 0270 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 5038: a66e 0260 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 503e: a6ee 0270 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 5044: a62e 0260 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 504a: a6ae 0270 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 5050: ae6e 0260 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 5056: aeee 0270 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 505c: a627 0240 macw %d7u,%d3l,>>,%sp@-,%d3,%acc1 + 5060: a6a7 0250 macw %d7u,%d3l,>>,%sp@-,%d3,%acc3 + 5064: a667 0240 macw %d7u,%a3l,>>,%sp@-,%a3,%acc1 + 5068: a6e7 0250 macw %d7u,%a3l,>>,%sp@-,%a3,%acc3 + 506c: a627 0240 macw %d7u,%d3l,>>,%sp@-,%d3,%acc1 + 5070: a6a7 0250 macw %d7u,%d3l,>>,%sp@-,%d3,%acc3 + 5074: ae67 0240 macw %d7u,%spl,>>,%sp@-,%sp,%acc1 + 5078: aee7 0250 macw %d7u,%spl,>>,%sp@-,%sp,%acc3 + 507c: a627 0260 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc1 + 5080: a6a7 0270 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc3 + 5084: a667 0260 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc1 + 5088: a6e7 0270 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc3 + 508c: a627 0260 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc1 + 5090: a6a7 0270 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc3 + 5094: ae67 0260 macw %d7u,%spl,>>,%sp@-&,%sp,%acc1 + 5098: aee7 0270 macw %d7u,%spl,>>,%sp@-&,%sp,%acc3 + 509c: a617 0640 macw %d7u,%d3l,>>,%sp@,%d3,%acc1 + 50a0: a697 0650 macw %d7u,%d3l,>>,%sp@,%d3,%acc3 + 50a4: a657 0640 macw %d7u,%a3l,>>,%sp@,%a3,%acc1 + 50a8: a6d7 0650 macw %d7u,%a3l,>>,%sp@,%a3,%acc3 + 50ac: a617 0640 macw %d7u,%d3l,>>,%sp@,%d3,%acc1 + 50b0: a697 0650 macw %d7u,%d3l,>>,%sp@,%d3,%acc3 + 50b4: ae57 0640 macw %d7u,%spl,>>,%sp@,%sp,%acc1 + 50b8: aed7 0650 macw %d7u,%spl,>>,%sp@,%sp,%acc3 + 50bc: a617 0660 macw %d7u,%d3l,>>,%sp@&,%d3,%acc1 + 50c0: a697 0670 macw %d7u,%d3l,>>,%sp@&,%d3,%acc3 + 50c4: a657 0660 macw %d7u,%a3l,>>,%sp@&,%a3,%acc1 + 50c8: a6d7 0670 macw %d7u,%a3l,>>,%sp@&,%a3,%acc3 + 50cc: a617 0660 macw %d7u,%d3l,>>,%sp@&,%d3,%acc1 + 50d0: a697 0670 macw %d7u,%d3l,>>,%sp@&,%d3,%acc3 + 50d4: ae57 0660 macw %d7u,%spl,>>,%sp@&,%sp,%acc1 + 50d8: aed7 0670 macw %d7u,%spl,>>,%sp@&,%sp,%acc3 + 50dc: a61e 0640 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc1 + 50e0: a69e 0650 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc3 + 50e4: a65e 0640 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc1 + 50e8: a6de 0650 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc3 + 50ec: a61e 0640 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc1 + 50f0: a69e 0650 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc3 + 50f4: ae5e 0640 macw %fpu,%spl,>>,%fp@\+,%sp,%acc1 + 50f8: aede 0650 macw %fpu,%spl,>>,%fp@\+,%sp,%acc3 + 50fc: a61e 0660 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc1 + 5100: a69e 0670 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc3 + 5104: a65e 0660 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc1 + 5108: a6de 0670 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc3 + 510c: a61e 0660 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc1 + 5110: a69e 0670 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc3 + 5114: ae5e 0660 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc1 + 5118: aede 0670 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc3 + 511c: a62e 0640 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 5122: a6ae 0650 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 5128: a66e 0640 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 512e: a6ee 0650 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 5134: a62e 0640 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 513a: a6ae 0650 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 5140: ae6e 0640 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 5146: aeee 0650 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 514c: a62e 0660 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 5152: a6ae 0670 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 5158: a66e 0660 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 515e: a6ee 0670 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 5164: a62e 0660 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 516a: a6ae 0670 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 5170: ae6e 0660 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 5176: aeee 0670 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 517c: a627 0640 macw %d7u,%d3l,>>,%sp@-,%d3,%acc1 + 5180: a6a7 0650 macw %d7u,%d3l,>>,%sp@-,%d3,%acc3 + 5184: a667 0640 macw %d7u,%a3l,>>,%sp@-,%a3,%acc1 + 5188: a6e7 0650 macw %d7u,%a3l,>>,%sp@-,%a3,%acc3 + 518c: a627 0640 macw %d7u,%d3l,>>,%sp@-,%d3,%acc1 + 5190: a6a7 0650 macw %d7u,%d3l,>>,%sp@-,%d3,%acc3 + 5194: ae67 0640 macw %d7u,%spl,>>,%sp@-,%sp,%acc1 + 5198: aee7 0650 macw %d7u,%spl,>>,%sp@-,%sp,%acc3 + 519c: a627 0660 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc1 + 51a0: a6a7 0670 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc3 + 51a4: a667 0660 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc1 + 51a8: a6e7 0670 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc3 + 51ac: a627 0660 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc1 + 51b0: a6a7 0670 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc3 + 51b4: ae67 0660 macw %d7u,%spl,>>,%sp@-&,%sp,%acc1 + 51b8: aee7 0670 macw %d7u,%spl,>>,%sp@-&,%sp,%acc3 + 51bc: ae57 00c0 macw %d7u,%spu,%sp@,%sp,%acc1 + 51c0: aed7 00d0 macw %d7u,%spu,%sp@,%sp,%acc3 + 51c4: ae57 00c0 macw %d7u,%spu,%sp@,%sp,%acc1 + 51c8: aed7 00d0 macw %d7u,%spu,%sp@,%sp,%acc3 + 51cc: ae57 00c0 macw %d7u,%spu,%sp@,%sp,%acc1 + 51d0: aed7 00d0 macw %d7u,%spu,%sp@,%sp,%acc3 + 51d4: ae57 00c0 macw %d7u,%spu,%sp@,%sp,%acc1 + 51d8: aed7 00d0 macw %d7u,%spu,%sp@,%sp,%acc3 + 51dc: ae57 00e0 macw %d7u,%spu,%sp@&,%sp,%acc1 + 51e0: aed7 00f0 macw %d7u,%spu,%sp@&,%sp,%acc3 + 51e4: ae57 00e0 macw %d7u,%spu,%sp@&,%sp,%acc1 + 51e8: aed7 00f0 macw %d7u,%spu,%sp@&,%sp,%acc3 + 51ec: ae57 00e0 macw %d7u,%spu,%sp@&,%sp,%acc1 + 51f0: aed7 00f0 macw %d7u,%spu,%sp@&,%sp,%acc3 + 51f4: ae57 00e0 macw %d7u,%spu,%sp@&,%sp,%acc1 + 51f8: aed7 00f0 macw %d7u,%spu,%sp@&,%sp,%acc3 + 51fc: ae5e 00c0 macw %fpu,%spu,%fp@\+,%sp,%acc1 + 5200: aede 00d0 macw %fpu,%spu,%fp@\+,%sp,%acc3 + 5204: ae5e 00c0 macw %fpu,%spu,%fp@\+,%sp,%acc1 + 5208: aede 00d0 macw %fpu,%spu,%fp@\+,%sp,%acc3 + 520c: ae5e 00c0 macw %fpu,%spu,%fp@\+,%sp,%acc1 + 5210: aede 00d0 macw %fpu,%spu,%fp@\+,%sp,%acc3 + 5214: ae5e 00c0 macw %fpu,%spu,%fp@\+,%sp,%acc1 + 5218: aede 00d0 macw %fpu,%spu,%fp@\+,%sp,%acc3 + 521c: ae5e 00e0 macw %fpu,%spu,%fp@\+&,%sp,%acc1 + 5220: aede 00f0 macw %fpu,%spu,%fp@\+&,%sp,%acc3 + 5224: ae5e 00e0 macw %fpu,%spu,%fp@\+&,%sp,%acc1 + 5228: aede 00f0 macw %fpu,%spu,%fp@\+&,%sp,%acc3 + 522c: ae5e 00e0 macw %fpu,%spu,%fp@\+&,%sp,%acc1 + 5230: aede 00f0 macw %fpu,%spu,%fp@\+&,%sp,%acc3 + 5234: ae5e 00e0 macw %fpu,%spu,%fp@\+&,%sp,%acc1 + 5238: aede 00f0 macw %fpu,%spu,%fp@\+&,%sp,%acc3 + 523c: ae6e 00c0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc1 + 5242: aeee 00d0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc3 + 5248: ae6e 00c0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc1 + 524e: aeee 00d0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc3 + 5254: ae6e 00c0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc1 + 525a: aeee 00d0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc3 + 5260: ae6e 00c0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc1 + 5266: aeee 00d0 000a macw %fpu,%spu,%fp@\(10\),%sp,%acc3 + 526c: ae6e 00e0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc1 + 5272: aeee 00f0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc3 + 5278: ae6e 00e0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc1 + 527e: aeee 00f0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc3 + 5284: ae6e 00e0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc1 + 528a: aeee 00f0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc3 + 5290: ae6e 00e0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc1 + 5296: aeee 00f0 000a macw %fpu,%spu,%fp@\(10\)&,%sp,%acc3 + 529c: ae67 00c0 macw %d7u,%spu,%sp@-,%sp,%acc1 + 52a0: aee7 00d0 macw %d7u,%spu,%sp@-,%sp,%acc3 + 52a4: ae67 00c0 macw %d7u,%spu,%sp@-,%sp,%acc1 + 52a8: aee7 00d0 macw %d7u,%spu,%sp@-,%sp,%acc3 + 52ac: ae67 00c0 macw %d7u,%spu,%sp@-,%sp,%acc1 + 52b0: aee7 00d0 macw %d7u,%spu,%sp@-,%sp,%acc3 + 52b4: ae67 00c0 macw %d7u,%spu,%sp@-,%sp,%acc1 + 52b8: aee7 00d0 macw %d7u,%spu,%sp@-,%sp,%acc3 + 52bc: ae67 00e0 macw %d7u,%spu,%sp@-&,%sp,%acc1 + 52c0: aee7 00f0 macw %d7u,%spu,%sp@-&,%sp,%acc3 + 52c4: ae67 00e0 macw %d7u,%spu,%sp@-&,%sp,%acc1 + 52c8: aee7 00f0 macw %d7u,%spu,%sp@-&,%sp,%acc3 + 52cc: ae67 00e0 macw %d7u,%spu,%sp@-&,%sp,%acc1 + 52d0: aee7 00f0 macw %d7u,%spu,%sp@-&,%sp,%acc3 + 52d4: ae67 00e0 macw %d7u,%spu,%sp@-&,%sp,%acc1 + 52d8: aee7 00f0 macw %d7u,%spu,%sp@-&,%sp,%acc3 + 52dc: ae57 02c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 52e0: aed7 02d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 52e4: ae57 02c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 52e8: aed7 02d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 52ec: ae57 02c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 52f0: aed7 02d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 52f4: ae57 02c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 52f8: aed7 02d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 52fc: ae57 02e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5300: aed7 02f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 5304: ae57 02e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5308: aed7 02f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 530c: ae57 02e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5310: aed7 02f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 5314: ae57 02e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5318: aed7 02f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 531c: ae5e 02c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5320: aede 02d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 5324: ae5e 02c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5328: aede 02d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 532c: ae5e 02c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5330: aede 02d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 5334: ae5e 02c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5338: aede 02d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 533c: ae5e 02e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 5340: aede 02f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 5344: ae5e 02e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 5348: aede 02f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 534c: ae5e 02e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 5350: aede 02f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 5354: ae5e 02e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 5358: aede 02f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 535c: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 5362: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 5368: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 536e: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 5374: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 537a: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 5380: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 5386: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 538c: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 5392: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 5398: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 539e: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 53a4: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 53aa: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 53b0: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 53b6: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 53bc: ae67 02c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 53c0: aee7 02d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 53c4: ae67 02c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 53c8: aee7 02d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 53cc: ae67 02c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 53d0: aee7 02d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 53d4: ae67 02c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 53d8: aee7 02d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 53dc: ae67 02e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 53e0: aee7 02f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 53e4: ae67 02e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 53e8: aee7 02f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 53ec: ae67 02e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 53f0: aee7 02f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 53f4: ae67 02e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 53f8: aee7 02f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 53fc: ae57 06c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 5400: aed7 06d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 5404: ae57 06c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 5408: aed7 06d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 540c: ae57 06c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 5410: aed7 06d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 5414: ae57 06c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 5418: aed7 06d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 541c: ae57 06e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5420: aed7 06f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 5424: ae57 06e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5428: aed7 06f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 542c: ae57 06e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5430: aed7 06f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 5434: ae57 06e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5438: aed7 06f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 543c: ae5e 06c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5440: aede 06d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 5444: ae5e 06c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5448: aede 06d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 544c: ae5e 06c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5450: aede 06d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 5454: ae5e 06c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5458: aede 06d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 545c: ae5e 06e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 5460: aede 06f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 5464: ae5e 06e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 5468: aede 06f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 546c: ae5e 06e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 5470: aede 06f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 5474: ae5e 06e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 5478: aede 06f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 547c: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 5482: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 5488: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 548e: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 5494: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 549a: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 54a0: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 54a6: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 54ac: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 54b2: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 54b8: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 54be: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 54c4: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 54ca: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 54d0: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 54d6: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 54dc: ae67 06c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 54e0: aee7 06d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 54e4: ae67 06c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 54e8: aee7 06d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 54ec: ae67 06c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 54f0: aee7 06d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 54f4: ae67 06c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 54f8: aee7 06d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 54fc: ae67 06e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 5500: aee7 06f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 5504: ae67 06e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 5508: aee7 06f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 550c: ae67 06e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 5510: aee7 06f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 5514: ae67 06e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 5518: aee7 06f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 551c: ae57 02c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 5520: aed7 02d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 5524: ae57 02c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 5528: aed7 02d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 552c: ae57 02c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 5530: aed7 02d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 5534: ae57 02c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 5538: aed7 02d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 553c: ae57 02e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5540: aed7 02f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 5544: ae57 02e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5548: aed7 02f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 554c: ae57 02e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5550: aed7 02f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 5554: ae57 02e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5558: aed7 02f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 555c: ae5e 02c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5560: aede 02d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 5564: ae5e 02c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5568: aede 02d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 556c: ae5e 02c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5570: aede 02d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 5574: ae5e 02c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5578: aede 02d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 557c: ae5e 02e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 5580: aede 02f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 5584: ae5e 02e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 5588: aede 02f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 558c: ae5e 02e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 5590: aede 02f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 5594: ae5e 02e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 5598: aede 02f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 559c: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 55a2: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 55a8: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 55ae: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 55b4: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 55ba: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 55c0: ae6e 02c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 55c6: aeee 02d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 55cc: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 55d2: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 55d8: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 55de: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 55e4: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 55ea: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 55f0: ae6e 02e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 55f6: aeee 02f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 55fc: ae67 02c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 5600: aee7 02d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 5604: ae67 02c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 5608: aee7 02d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 560c: ae67 02c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 5610: aee7 02d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 5614: ae67 02c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 5618: aee7 02d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 561c: ae67 02e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 5620: aee7 02f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 5624: ae67 02e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 5628: aee7 02f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 562c: ae67 02e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 5630: aee7 02f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 5634: ae67 02e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 5638: aee7 02f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 563c: ae57 06c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 5640: aed7 06d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 5644: ae57 06c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 5648: aed7 06d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 564c: ae57 06c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 5650: aed7 06d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 5654: ae57 06c0 macw %d7u,%spu,>>,%sp@,%sp,%acc1 + 5658: aed7 06d0 macw %d7u,%spu,>>,%sp@,%sp,%acc3 + 565c: ae57 06e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5660: aed7 06f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 5664: ae57 06e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5668: aed7 06f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 566c: ae57 06e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5670: aed7 06f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 5674: ae57 06e0 macw %d7u,%spu,>>,%sp@&,%sp,%acc1 + 5678: aed7 06f0 macw %d7u,%spu,>>,%sp@&,%sp,%acc3 + 567c: ae5e 06c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5680: aede 06d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 5684: ae5e 06c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5688: aede 06d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 568c: ae5e 06c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5690: aede 06d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 5694: ae5e 06c0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc1 + 5698: aede 06d0 macw %fpu,%spu,>>,%fp@\+,%sp,%acc3 + 569c: ae5e 06e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 56a0: aede 06f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 56a4: ae5e 06e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 56a8: aede 06f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 56ac: ae5e 06e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 56b0: aede 06f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 56b4: ae5e 06e0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc1 + 56b8: aede 06f0 macw %fpu,%spu,>>,%fp@\+&,%sp,%acc3 + 56bc: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 56c2: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 56c8: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 56ce: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 56d4: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 56da: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 56e0: ae6e 06c0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc1 + 56e6: aeee 06d0 000a macw %fpu,%spu,>>,%fp@\(10\),%sp,%acc3 + 56ec: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 56f2: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 56f8: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 56fe: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 5704: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 570a: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 5710: ae6e 06e0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc1 + 5716: aeee 06f0 000a macw %fpu,%spu,>>,%fp@\(10\)&,%sp,%acc3 + 571c: ae67 06c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 5720: aee7 06d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 5724: ae67 06c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 5728: aee7 06d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 572c: ae67 06c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 5730: aee7 06d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 5734: ae67 06c0 macw %d7u,%spu,>>,%sp@-,%sp,%acc1 + 5738: aee7 06d0 macw %d7u,%spu,>>,%sp@-,%sp,%acc3 + 573c: ae67 06e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 5740: aee7 06f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 5744: ae67 06e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 5748: aee7 06f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 574c: ae67 06e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 5750: aee7 06f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 5754: ae67 06e0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc1 + 5758: aee7 06f0 macw %d7u,%spu,>>,%sp@-&,%sp,%acc3 + 575c: a217 0040 macw %d7u,%d1l,%sp@,%d1,%acc1 + 5760: a297 0050 macw %d7u,%d1l,%sp@,%d1,%acc3 + 5764: a657 0040 macw %d7u,%a3l,%sp@,%a3,%acc1 + 5768: a6d7 0050 macw %d7u,%a3l,%sp@,%a3,%acc3 + 576c: a617 0040 macw %d7u,%d3l,%sp@,%d3,%acc1 + 5770: a697 0050 macw %d7u,%d3l,%sp@,%d3,%acc3 + 5774: ae57 0040 macw %d7u,%spl,%sp@,%sp,%acc1 + 5778: aed7 0050 macw %d7u,%spl,%sp@,%sp,%acc3 + 577c: a217 0060 macw %d7u,%d1l,%sp@&,%d1,%acc1 + 5780: a297 0070 macw %d7u,%d1l,%sp@&,%d1,%acc3 + 5784: a657 0060 macw %d7u,%a3l,%sp@&,%a3,%acc1 + 5788: a6d7 0070 macw %d7u,%a3l,%sp@&,%a3,%acc3 + 578c: a617 0060 macw %d7u,%d3l,%sp@&,%d3,%acc1 + 5790: a697 0070 macw %d7u,%d3l,%sp@&,%d3,%acc3 + 5794: ae57 0060 macw %d7u,%spl,%sp@&,%sp,%acc1 + 5798: aed7 0070 macw %d7u,%spl,%sp@&,%sp,%acc3 + 579c: a21e 0040 macw %fpu,%d1l,%fp@\+,%d1,%acc1 + 57a0: a29e 0050 macw %fpu,%d1l,%fp@\+,%d1,%acc3 + 57a4: a65e 0040 macw %fpu,%a3l,%fp@\+,%a3,%acc1 + 57a8: a6de 0050 macw %fpu,%a3l,%fp@\+,%a3,%acc3 + 57ac: a61e 0040 macw %fpu,%d3l,%fp@\+,%d3,%acc1 + 57b0: a69e 0050 macw %fpu,%d3l,%fp@\+,%d3,%acc3 + 57b4: ae5e 0040 macw %fpu,%spl,%fp@\+,%sp,%acc1 + 57b8: aede 0050 macw %fpu,%spl,%fp@\+,%sp,%acc3 + 57bc: a21e 0060 macw %fpu,%d1l,%fp@\+&,%d1,%acc1 + 57c0: a29e 0070 macw %fpu,%d1l,%fp@\+&,%d1,%acc3 + 57c4: a65e 0060 macw %fpu,%a3l,%fp@\+&,%a3,%acc1 + 57c8: a6de 0070 macw %fpu,%a3l,%fp@\+&,%a3,%acc3 + 57cc: a61e 0060 macw %fpu,%d3l,%fp@\+&,%d3,%acc1 + 57d0: a69e 0070 macw %fpu,%d3l,%fp@\+&,%d3,%acc3 + 57d4: ae5e 0060 macw %fpu,%spl,%fp@\+&,%sp,%acc1 + 57d8: aede 0070 macw %fpu,%spl,%fp@\+&,%sp,%acc3 + 57dc: a22e 0040 000a macw %fpu,%d1l,%fp@\(10\),%d1,%acc1 + 57e2: a2ae 0050 000a macw %fpu,%d1l,%fp@\(10\),%d1,%acc3 + 57e8: a66e 0040 000a macw %fpu,%a3l,%fp@\(10\),%a3,%acc1 + 57ee: a6ee 0050 000a macw %fpu,%a3l,%fp@\(10\),%a3,%acc3 + 57f4: a62e 0040 000a macw %fpu,%d3l,%fp@\(10\),%d3,%acc1 + 57fa: a6ae 0050 000a macw %fpu,%d3l,%fp@\(10\),%d3,%acc3 + 5800: ae6e 0040 000a macw %fpu,%spl,%fp@\(10\),%sp,%acc1 + 5806: aeee 0050 000a macw %fpu,%spl,%fp@\(10\),%sp,%acc3 + 580c: a22e 0060 000a macw %fpu,%d1l,%fp@\(10\)&,%d1,%acc1 + 5812: a2ae 0070 000a macw %fpu,%d1l,%fp@\(10\)&,%d1,%acc3 + 5818: a66e 0060 000a macw %fpu,%a3l,%fp@\(10\)&,%a3,%acc1 + 581e: a6ee 0070 000a macw %fpu,%a3l,%fp@\(10\)&,%a3,%acc3 + 5824: a62e 0060 000a macw %fpu,%d3l,%fp@\(10\)&,%d3,%acc1 + 582a: a6ae 0070 000a macw %fpu,%d3l,%fp@\(10\)&,%d3,%acc3 + 5830: ae6e 0060 000a macw %fpu,%spl,%fp@\(10\)&,%sp,%acc1 + 5836: aeee 0070 000a macw %fpu,%spl,%fp@\(10\)&,%sp,%acc3 + 583c: a227 0040 macw %d7u,%d1l,%sp@-,%d1,%acc1 + 5840: a2a7 0050 macw %d7u,%d1l,%sp@-,%d1,%acc3 + 5844: a667 0040 macw %d7u,%a3l,%sp@-,%a3,%acc1 + 5848: a6e7 0050 macw %d7u,%a3l,%sp@-,%a3,%acc3 + 584c: a627 0040 macw %d7u,%d3l,%sp@-,%d3,%acc1 + 5850: a6a7 0050 macw %d7u,%d3l,%sp@-,%d3,%acc3 + 5854: ae67 0040 macw %d7u,%spl,%sp@-,%sp,%acc1 + 5858: aee7 0050 macw %d7u,%spl,%sp@-,%sp,%acc3 + 585c: a227 0060 macw %d7u,%d1l,%sp@-&,%d1,%acc1 + 5860: a2a7 0070 macw %d7u,%d1l,%sp@-&,%d1,%acc3 + 5864: a667 0060 macw %d7u,%a3l,%sp@-&,%a3,%acc1 + 5868: a6e7 0070 macw %d7u,%a3l,%sp@-&,%a3,%acc3 + 586c: a627 0060 macw %d7u,%d3l,%sp@-&,%d3,%acc1 + 5870: a6a7 0070 macw %d7u,%d3l,%sp@-&,%d3,%acc3 + 5874: ae67 0060 macw %d7u,%spl,%sp@-&,%sp,%acc1 + 5878: aee7 0070 macw %d7u,%spl,%sp@-&,%sp,%acc3 + 587c: a217 0240 macw %d7u,%d1l,<<,%sp@,%d1,%acc1 + 5880: a297 0250 macw %d7u,%d1l,<<,%sp@,%d1,%acc3 + 5884: a657 0240 macw %d7u,%a3l,>>,%sp@,%a3,%acc1 + 5888: a6d7 0250 macw %d7u,%a3l,>>,%sp@,%a3,%acc3 + 588c: a617 0240 macw %d7u,%d3l,>>,%sp@,%d3,%acc1 + 5890: a697 0250 macw %d7u,%d3l,>>,%sp@,%d3,%acc3 + 5894: ae57 0240 macw %d7u,%spl,>>,%sp@,%sp,%acc1 + 5898: aed7 0250 macw %d7u,%spl,>>,%sp@,%sp,%acc3 + 589c: a217 0260 macw %d7u,%d1l,<<,%sp@&,%d1,%acc1 + 58a0: a297 0270 macw %d7u,%d1l,<<,%sp@&,%d1,%acc3 + 58a4: a657 0260 macw %d7u,%a3l,>>,%sp@&,%a3,%acc1 + 58a8: a6d7 0270 macw %d7u,%a3l,>>,%sp@&,%a3,%acc3 + 58ac: a617 0260 macw %d7u,%d3l,>>,%sp@&,%d3,%acc1 + 58b0: a697 0270 macw %d7u,%d3l,>>,%sp@&,%d3,%acc3 + 58b4: ae57 0260 macw %d7u,%spl,>>,%sp@&,%sp,%acc1 + 58b8: aed7 0270 macw %d7u,%spl,>>,%sp@&,%sp,%acc3 + 58bc: a21e 0240 macw %fpu,%d1l,<<,%fp@\+,%d1,%acc1 + 58c0: a29e 0250 macw %fpu,%d1l,<<,%fp@\+,%d1,%acc3 + 58c4: a65e 0240 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc1 + 58c8: a6de 0250 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc3 + 58cc: a61e 0240 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc1 + 58d0: a69e 0250 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc3 + 58d4: ae5e 0240 macw %fpu,%spl,>>,%fp@\+,%sp,%acc1 + 58d8: aede 0250 macw %fpu,%spl,>>,%fp@\+,%sp,%acc3 + 58dc: a21e 0260 macw %fpu,%d1l,<<,%fp@\+&,%d1,%acc1 + 58e0: a29e 0270 macw %fpu,%d1l,<<,%fp@\+&,%d1,%acc3 + 58e4: a65e 0260 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc1 + 58e8: a6de 0270 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc3 + 58ec: a61e 0260 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc1 + 58f0: a69e 0270 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc3 + 58f4: ae5e 0260 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc1 + 58f8: aede 0270 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc3 + 58fc: a22e 0240 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc1 + 5902: a2ae 0250 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc3 + 5908: a66e 0240 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 590e: a6ee 0250 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 5914: a62e 0240 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 591a: a6ae 0250 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 5920: ae6e 0240 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 5926: aeee 0250 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 592c: a22e 0260 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc1 + 5932: a2ae 0270 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc3 + 5938: a66e 0260 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 593e: a6ee 0270 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 5944: a62e 0260 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 594a: a6ae 0270 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 5950: ae6e 0260 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 5956: aeee 0270 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 595c: a227 0240 macw %d7u,%d1l,<<,%sp@-,%d1,%acc1 + 5960: a2a7 0250 macw %d7u,%d1l,<<,%sp@-,%d1,%acc3 + 5964: a667 0240 macw %d7u,%a3l,>>,%sp@-,%a3,%acc1 + 5968: a6e7 0250 macw %d7u,%a3l,>>,%sp@-,%a3,%acc3 + 596c: a627 0240 macw %d7u,%d3l,>>,%sp@-,%d3,%acc1 + 5970: a6a7 0250 macw %d7u,%d3l,>>,%sp@-,%d3,%acc3 + 5974: ae67 0240 macw %d7u,%spl,>>,%sp@-,%sp,%acc1 + 5978: aee7 0250 macw %d7u,%spl,>>,%sp@-,%sp,%acc3 + 597c: a227 0260 macw %d7u,%d1l,<<,%sp@-&,%d1,%acc1 + 5980: a2a7 0270 macw %d7u,%d1l,<<,%sp@-&,%d1,%acc3 + 5984: a667 0260 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc1 + 5988: a6e7 0270 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc3 + 598c: a627 0260 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc1 + 5990: a6a7 0270 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc3 + 5994: ae67 0260 macw %d7u,%spl,>>,%sp@-&,%sp,%acc1 + 5998: aee7 0270 macw %d7u,%spl,>>,%sp@-&,%sp,%acc3 + 599c: a217 0640 macw %d7u,%d1l,<<,%sp@,%d1,%acc1 + 59a0: a297 0650 macw %d7u,%d1l,<<,%sp@,%d1,%acc3 + 59a4: a657 0640 macw %d7u,%a3l,>>,%sp@,%a3,%acc1 + 59a8: a6d7 0650 macw %d7u,%a3l,>>,%sp@,%a3,%acc3 + 59ac: a617 0640 macw %d7u,%d3l,>>,%sp@,%d3,%acc1 + 59b0: a697 0650 macw %d7u,%d3l,>>,%sp@,%d3,%acc3 + 59b4: ae57 0640 macw %d7u,%spl,>>,%sp@,%sp,%acc1 + 59b8: aed7 0650 macw %d7u,%spl,>>,%sp@,%sp,%acc3 + 59bc: a217 0660 macw %d7u,%d1l,<<,%sp@&,%d1,%acc1 + 59c0: a297 0670 macw %d7u,%d1l,<<,%sp@&,%d1,%acc3 + 59c4: a657 0660 macw %d7u,%a3l,>>,%sp@&,%a3,%acc1 + 59c8: a6d7 0670 macw %d7u,%a3l,>>,%sp@&,%a3,%acc3 + 59cc: a617 0660 macw %d7u,%d3l,>>,%sp@&,%d3,%acc1 + 59d0: a697 0670 macw %d7u,%d3l,>>,%sp@&,%d3,%acc3 + 59d4: ae57 0660 macw %d7u,%spl,>>,%sp@&,%sp,%acc1 + 59d8: aed7 0670 macw %d7u,%spl,>>,%sp@&,%sp,%acc3 + 59dc: a21e 0640 macw %fpu,%d1l,<<,%fp@\+,%d1,%acc1 + 59e0: a29e 0650 macw %fpu,%d1l,<<,%fp@\+,%d1,%acc3 + 59e4: a65e 0640 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc1 + 59e8: a6de 0650 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc3 + 59ec: a61e 0640 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc1 + 59f0: a69e 0650 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc3 + 59f4: ae5e 0640 macw %fpu,%spl,>>,%fp@\+,%sp,%acc1 + 59f8: aede 0650 macw %fpu,%spl,>>,%fp@\+,%sp,%acc3 + 59fc: a21e 0660 macw %fpu,%d1l,<<,%fp@\+&,%d1,%acc1 + 5a00: a29e 0670 macw %fpu,%d1l,<<,%fp@\+&,%d1,%acc3 + 5a04: a65e 0660 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc1 + 5a08: a6de 0670 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc3 + 5a0c: a61e 0660 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc1 + 5a10: a69e 0670 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc3 + 5a14: ae5e 0660 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc1 + 5a18: aede 0670 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc3 + 5a1c: a22e 0640 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc1 + 5a22: a2ae 0650 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc3 + 5a28: a66e 0640 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 5a2e: a6ee 0650 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 5a34: a62e 0640 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 5a3a: a6ae 0650 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 5a40: ae6e 0640 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 5a46: aeee 0650 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 5a4c: a22e 0660 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc1 + 5a52: a2ae 0670 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc3 + 5a58: a66e 0660 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 5a5e: a6ee 0670 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 5a64: a62e 0660 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 5a6a: a6ae 0670 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 5a70: ae6e 0660 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 5a76: aeee 0670 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 5a7c: a227 0640 macw %d7u,%d1l,<<,%sp@-,%d1,%acc1 + 5a80: a2a7 0650 macw %d7u,%d1l,<<,%sp@-,%d1,%acc3 + 5a84: a667 0640 macw %d7u,%a3l,>>,%sp@-,%a3,%acc1 + 5a88: a6e7 0650 macw %d7u,%a3l,>>,%sp@-,%a3,%acc3 + 5a8c: a627 0640 macw %d7u,%d3l,>>,%sp@-,%d3,%acc1 + 5a90: a6a7 0650 macw %d7u,%d3l,>>,%sp@-,%d3,%acc3 + 5a94: ae67 0640 macw %d7u,%spl,>>,%sp@-,%sp,%acc1 + 5a98: aee7 0650 macw %d7u,%spl,>>,%sp@-,%sp,%acc3 + 5a9c: a227 0660 macw %d7u,%d1l,<<,%sp@-&,%d1,%acc1 + 5aa0: a2a7 0670 macw %d7u,%d1l,<<,%sp@-&,%d1,%acc3 + 5aa4: a667 0660 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc1 + 5aa8: a6e7 0670 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc3 + 5aac: a627 0660 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc1 + 5ab0: a6a7 0670 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc3 + 5ab4: ae67 0660 macw %d7u,%spl,>>,%sp@-&,%sp,%acc1 + 5ab8: aee7 0670 macw %d7u,%spl,>>,%sp@-&,%sp,%acc3 + 5abc: a217 0240 macw %d7u,%d1l,<<,%sp@,%d1,%acc1 + 5ac0: a297 0250 macw %d7u,%d1l,<<,%sp@,%d1,%acc3 + 5ac4: a657 0240 macw %d7u,%a3l,>>,%sp@,%a3,%acc1 + 5ac8: a6d7 0250 macw %d7u,%a3l,>>,%sp@,%a3,%acc3 + 5acc: a617 0240 macw %d7u,%d3l,>>,%sp@,%d3,%acc1 + 5ad0: a697 0250 macw %d7u,%d3l,>>,%sp@,%d3,%acc3 + 5ad4: ae57 0240 macw %d7u,%spl,>>,%sp@,%sp,%acc1 + 5ad8: aed7 0250 macw %d7u,%spl,>>,%sp@,%sp,%acc3 + 5adc: a217 0260 macw %d7u,%d1l,<<,%sp@&,%d1,%acc1 + 5ae0: a297 0270 macw %d7u,%d1l,<<,%sp@&,%d1,%acc3 + 5ae4: a657 0260 macw %d7u,%a3l,>>,%sp@&,%a3,%acc1 + 5ae8: a6d7 0270 macw %d7u,%a3l,>>,%sp@&,%a3,%acc3 + 5aec: a617 0260 macw %d7u,%d3l,>>,%sp@&,%d3,%acc1 + 5af0: a697 0270 macw %d7u,%d3l,>>,%sp@&,%d3,%acc3 + 5af4: ae57 0260 macw %d7u,%spl,>>,%sp@&,%sp,%acc1 + 5af8: aed7 0270 macw %d7u,%spl,>>,%sp@&,%sp,%acc3 + 5afc: a21e 0240 macw %fpu,%d1l,<<,%fp@\+,%d1,%acc1 + 5b00: a29e 0250 macw %fpu,%d1l,<<,%fp@\+,%d1,%acc3 + 5b04: a65e 0240 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc1 + 5b08: a6de 0250 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc3 + 5b0c: a61e 0240 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc1 + 5b10: a69e 0250 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc3 + 5b14: ae5e 0240 macw %fpu,%spl,>>,%fp@\+,%sp,%acc1 + 5b18: aede 0250 macw %fpu,%spl,>>,%fp@\+,%sp,%acc3 + 5b1c: a21e 0260 macw %fpu,%d1l,<<,%fp@\+&,%d1,%acc1 + 5b20: a29e 0270 macw %fpu,%d1l,<<,%fp@\+&,%d1,%acc3 + 5b24: a65e 0260 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc1 + 5b28: a6de 0270 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc3 + 5b2c: a61e 0260 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc1 + 5b30: a69e 0270 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc3 + 5b34: ae5e 0260 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc1 + 5b38: aede 0270 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc3 + 5b3c: a22e 0240 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc1 + 5b42: a2ae 0250 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc3 + 5b48: a66e 0240 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 5b4e: a6ee 0250 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 5b54: a62e 0240 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 5b5a: a6ae 0250 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 5b60: ae6e 0240 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 5b66: aeee 0250 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 5b6c: a22e 0260 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc1 + 5b72: a2ae 0270 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc3 + 5b78: a66e 0260 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 5b7e: a6ee 0270 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 5b84: a62e 0260 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 5b8a: a6ae 0270 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 5b90: ae6e 0260 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 5b96: aeee 0270 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 5b9c: a227 0240 macw %d7u,%d1l,<<,%sp@-,%d1,%acc1 + 5ba0: a2a7 0250 macw %d7u,%d1l,<<,%sp@-,%d1,%acc3 + 5ba4: a667 0240 macw %d7u,%a3l,>>,%sp@-,%a3,%acc1 + 5ba8: a6e7 0250 macw %d7u,%a3l,>>,%sp@-,%a3,%acc3 + 5bac: a627 0240 macw %d7u,%d3l,>>,%sp@-,%d3,%acc1 + 5bb0: a6a7 0250 macw %d7u,%d3l,>>,%sp@-,%d3,%acc3 + 5bb4: ae67 0240 macw %d7u,%spl,>>,%sp@-,%sp,%acc1 + 5bb8: aee7 0250 macw %d7u,%spl,>>,%sp@-,%sp,%acc3 + 5bbc: a227 0260 macw %d7u,%d1l,<<,%sp@-&,%d1,%acc1 + 5bc0: a2a7 0270 macw %d7u,%d1l,<<,%sp@-&,%d1,%acc3 + 5bc4: a667 0260 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc1 + 5bc8: a6e7 0270 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc3 + 5bcc: a627 0260 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc1 + 5bd0: a6a7 0270 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc3 + 5bd4: ae67 0260 macw %d7u,%spl,>>,%sp@-&,%sp,%acc1 + 5bd8: aee7 0270 macw %d7u,%spl,>>,%sp@-&,%sp,%acc3 + 5bdc: a217 0640 macw %d7u,%d1l,<<,%sp@,%d1,%acc1 + 5be0: a297 0650 macw %d7u,%d1l,<<,%sp@,%d1,%acc3 + 5be4: a657 0640 macw %d7u,%a3l,>>,%sp@,%a3,%acc1 + 5be8: a6d7 0650 macw %d7u,%a3l,>>,%sp@,%a3,%acc3 + 5bec: a617 0640 macw %d7u,%d3l,>>,%sp@,%d3,%acc1 + 5bf0: a697 0650 macw %d7u,%d3l,>>,%sp@,%d3,%acc3 + 5bf4: ae57 0640 macw %d7u,%spl,>>,%sp@,%sp,%acc1 + 5bf8: aed7 0650 macw %d7u,%spl,>>,%sp@,%sp,%acc3 + 5bfc: a217 0660 macw %d7u,%d1l,<<,%sp@&,%d1,%acc1 + 5c00: a297 0670 macw %d7u,%d1l,<<,%sp@&,%d1,%acc3 + 5c04: a657 0660 macw %d7u,%a3l,>>,%sp@&,%a3,%acc1 + 5c08: a6d7 0670 macw %d7u,%a3l,>>,%sp@&,%a3,%acc3 + 5c0c: a617 0660 macw %d7u,%d3l,>>,%sp@&,%d3,%acc1 + 5c10: a697 0670 macw %d7u,%d3l,>>,%sp@&,%d3,%acc3 + 5c14: ae57 0660 macw %d7u,%spl,>>,%sp@&,%sp,%acc1 + 5c18: aed7 0670 macw %d7u,%spl,>>,%sp@&,%sp,%acc3 + 5c1c: a21e 0640 macw %fpu,%d1l,<<,%fp@\+,%d1,%acc1 + 5c20: a29e 0650 macw %fpu,%d1l,<<,%fp@\+,%d1,%acc3 + 5c24: a65e 0640 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc1 + 5c28: a6de 0650 macw %fpu,%a3l,>>,%fp@\+,%a3,%acc3 + 5c2c: a61e 0640 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc1 + 5c30: a69e 0650 macw %fpu,%d3l,>>,%fp@\+,%d3,%acc3 + 5c34: ae5e 0640 macw %fpu,%spl,>>,%fp@\+,%sp,%acc1 + 5c38: aede 0650 macw %fpu,%spl,>>,%fp@\+,%sp,%acc3 + 5c3c: a21e 0660 macw %fpu,%d1l,<<,%fp@\+&,%d1,%acc1 + 5c40: a29e 0670 macw %fpu,%d1l,<<,%fp@\+&,%d1,%acc3 + 5c44: a65e 0660 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc1 + 5c48: a6de 0670 macw %fpu,%a3l,>>,%fp@\+&,%a3,%acc3 + 5c4c: a61e 0660 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc1 + 5c50: a69e 0670 macw %fpu,%d3l,>>,%fp@\+&,%d3,%acc3 + 5c54: ae5e 0660 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc1 + 5c58: aede 0670 macw %fpu,%spl,>>,%fp@\+&,%sp,%acc3 + 5c5c: a22e 0640 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc1 + 5c62: a2ae 0650 000a macw %fpu,%d1l,<<,%fp@\(10\),%d1,%acc3 + 5c68: a66e 0640 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc1 + 5c6e: a6ee 0650 000a macw %fpu,%a3l,>>,%fp@\(10\),%a3,%acc3 + 5c74: a62e 0640 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc1 + 5c7a: a6ae 0650 000a macw %fpu,%d3l,>>,%fp@\(10\),%d3,%acc3 + 5c80: ae6e 0640 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc1 + 5c86: aeee 0650 000a macw %fpu,%spl,>>,%fp@\(10\),%sp,%acc3 + 5c8c: a22e 0660 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc1 + 5c92: a2ae 0670 000a macw %fpu,%d1l,<<,%fp@\(10\)&,%d1,%acc3 + 5c98: a66e 0660 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc1 + 5c9e: a6ee 0670 000a macw %fpu,%a3l,>>,%fp@\(10\)&,%a3,%acc3 + 5ca4: a62e 0660 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc1 + 5caa: a6ae 0670 000a macw %fpu,%d3l,>>,%fp@\(10\)&,%d3,%acc3 + 5cb0: ae6e 0660 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc1 + 5cb6: aeee 0670 000a macw %fpu,%spl,>>,%fp@\(10\)&,%sp,%acc3 + 5cbc: a227 0640 macw %d7u,%d1l,<<,%sp@-,%d1,%acc1 + 5cc0: a2a7 0650 macw %d7u,%d1l,<<,%sp@-,%d1,%acc3 + 5cc4: a667 0640 macw %d7u,%a3l,>>,%sp@-,%a3,%acc1 + 5cc8: a6e7 0650 macw %d7u,%a3l,>>,%sp@-,%a3,%acc3 + 5ccc: a627 0640 macw %d7u,%d3l,>>,%sp@-,%d3,%acc1 + 5cd0: a6a7 0650 macw %d7u,%d3l,>>,%sp@-,%d3,%acc3 + 5cd4: ae67 0640 macw %d7u,%spl,>>,%sp@-,%sp,%acc1 + 5cd8: aee7 0650 macw %d7u,%spl,>>,%sp@-,%sp,%acc3 + 5cdc: a227 0660 macw %d7u,%d1l,<<,%sp@-&,%d1,%acc1 + 5ce0: a2a7 0670 macw %d7u,%d1l,<<,%sp@-&,%d1,%acc3 + 5ce4: a667 0660 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc1 + 5ce8: a6e7 0670 macw %d7u,%a3l,>>,%sp@-&,%a3,%acc3 + 5cec: a627 0660 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc1 + 5cf0: a6a7 0670 macw %d7u,%d3l,>>,%sp@-&,%d3,%acc3 + 5cf4: ae67 0660 macw %d7u,%spl,>>,%sp@-&,%sp,%acc1 + 5cf8: aee7 0670 macw %d7u,%spl,>>,%sp@-&,%sp,%acc3 + 5cfc: a6c9 0800 macl %a1,%a3,%acc0 + 5d00: a649 0810 macl %a1,%a3,%acc2 + 5d04: a6c9 0a00 macl %a1,%a3,>>,%acc0 + 5d08: a649 0a10 macl %a1,%a3,>>,%acc2 + 5d0c: a6c9 0e00 macl %a1,%a3,>>,%acc0 + 5d10: a649 0e10 macl %a1,%a3,>>,%acc2 + 5d14: a6c9 0a00 macl %a1,%a3,>>,%acc0 + 5d18: a649 0a10 macl %a1,%a3,>>,%acc2 + 5d1c: a6c9 0e00 macl %a1,%a3,>>,%acc0 + 5d20: a649 0e10 macl %a1,%a3,>>,%acc2 + 5d24: a889 0800 macl %a1,%d4,%acc0 + 5d28: a809 0810 macl %a1,%d4,%acc2 + 5d2c: a889 0a00 macl %a1,%d4,,%acc0 + 5d30: a809 0a10 macl %a1,%d4,,%acc2 + 5d34: a889 0e00 macl %a1,%d4,,%acc0 + 5d38: a809 0e10 macl %a1,%d4,,%acc2 + 5d3c: a889 0a00 macl %a1,%d4,,%acc0 + 5d40: a809 0a10 macl %a1,%d4,,%acc2 + 5d44: a889 0e00 macl %a1,%d4,,%acc0 + 5d48: a809 0e10 macl %a1,%d4,,%acc2 + 5d4c: a6c6 0800 macl %d6,%a3,%acc0 + 5d50: a646 0810 macl %d6,%a3,%acc2 + 5d54: a6c6 0a00 macl %d6,%a3,>>,%acc0 + 5d58: a646 0a10 macl %d6,%a3,>>,%acc2 + 5d5c: a6c6 0e00 macl %d6,%a3,>>,%acc0 + 5d60: a646 0e10 macl %d6,%a3,>>,%acc2 + 5d64: a6c6 0a00 macl %d6,%a3,>>,%acc0 + 5d68: a646 0a10 macl %d6,%a3,>>,%acc2 + 5d6c: a6c6 0e00 macl %d6,%a3,>>,%acc0 + 5d70: a646 0e10 macl %d6,%a3,>>,%acc2 + 5d74: a886 0800 macl %d6,%d4,%acc0 + 5d78: a806 0810 macl %d6,%d4,%acc2 + 5d7c: a886 0a00 macl %d6,%d4,,%acc0 + 5d80: a806 0a10 macl %d6,%d4,,%acc2 + 5d84: a886 0e00 macl %d6,%d4,,%acc0 + 5d88: a806 0e10 macl %d6,%d4,,%acc2 + 5d8c: a886 0a00 macl %d6,%d4,,%acc0 + 5d90: a806 0a10 macl %d6,%d4,,%acc2 + 5d94: a886 0e00 macl %d6,%d4,,%acc0 + 5d98: a806 0e10 macl %d6,%d4,,%acc2 + 5d9c: a213 b809 macl %a1,%a3,%a3@,%d1,%acc0 + 5da0: a293 b819 macl %a1,%a3,%a3@,%d1,%acc2 + 5da4: a653 b809 macl %a1,%a3,%a3@,%a3,%acc0 + 5da8: a6d3 b819 macl %a1,%a3,%a3@,%a3,%acc2 + 5dac: a413 b809 macl %a1,%a3,%a3@,%d2,%acc0 + 5db0: a493 b819 macl %a1,%a3,%a3@,%d2,%acc2 + 5db4: ae53 b809 macl %a1,%a3,%a3@,%sp,%acc0 + 5db8: aed3 b819 macl %a1,%a3,%a3@,%sp,%acc2 + 5dbc: a213 b829 macl %a1,%a3,%a3@&,%d1,%acc0 + 5dc0: a293 b839 macl %a1,%a3,%a3@&,%d1,%acc2 + 5dc4: a653 b829 macl %a1,%a3,%a3@&,%a3,%acc0 + 5dc8: a6d3 b839 macl %a1,%a3,%a3@&,%a3,%acc2 + 5dcc: a413 b829 macl %a1,%a3,%a3@&,%d2,%acc0 + 5dd0: a493 b839 macl %a1,%a3,%a3@&,%d2,%acc2 + 5dd4: ae53 b829 macl %a1,%a3,%a3@&,%sp,%acc0 + 5dd8: aed3 b839 macl %a1,%a3,%a3@&,%sp,%acc2 + 5ddc: a21a b809 macl %a1,%a3,%a2@\+,%d1,%acc0 + 5de0: a29a b819 macl %a1,%a3,%a2@\+,%d1,%acc2 + 5de4: a65a b809 macl %a1,%a3,%a2@\+,%a3,%acc0 + 5de8: a6da b819 macl %a1,%a3,%a2@\+,%a3,%acc2 + 5dec: a41a b809 macl %a1,%a3,%a2@\+,%d2,%acc0 + 5df0: a49a b819 macl %a1,%a3,%a2@\+,%d2,%acc2 + 5df4: ae5a b809 macl %a1,%a3,%a2@\+,%sp,%acc0 + 5df8: aeda b819 macl %a1,%a3,%a2@\+,%sp,%acc2 + 5dfc: a21a b829 macl %a1,%a3,%a2@\+&,%d1,%acc0 + 5e00: a29a b839 macl %a1,%a3,%a2@\+&,%d1,%acc2 + 5e04: a65a b829 macl %a1,%a3,%a2@\+&,%a3,%acc0 + 5e08: a6da b839 macl %a1,%a3,%a2@\+&,%a3,%acc2 + 5e0c: a41a b829 macl %a1,%a3,%a2@\+&,%d2,%acc0 + 5e10: a49a b839 macl %a1,%a3,%a2@\+&,%d2,%acc2 + 5e14: ae5a b829 macl %a1,%a3,%a2@\+&,%sp,%acc0 + 5e18: aeda b839 macl %a1,%a3,%a2@\+&,%sp,%acc2 + 5e1c: a22e b809 000a macl %a1,%a3,%fp@\(10\),%d1,%acc0 + 5e22: a2ae b819 000a macl %a1,%a3,%fp@\(10\),%d1,%acc2 + 5e28: a66e b809 000a macl %a1,%a3,%fp@\(10\),%a3,%acc0 + 5e2e: a6ee b819 000a macl %a1,%a3,%fp@\(10\),%a3,%acc2 + 5e34: a42e b809 000a macl %a1,%a3,%fp@\(10\),%d2,%acc0 + 5e3a: a4ae b819 000a macl %a1,%a3,%fp@\(10\),%d2,%acc2 + 5e40: ae6e b809 000a macl %a1,%a3,%fp@\(10\),%sp,%acc0 + 5e46: aeee b819 000a macl %a1,%a3,%fp@\(10\),%sp,%acc2 + 5e4c: a22e b829 000a macl %a1,%a3,%fp@\(10\)&,%d1,%acc0 + 5e52: a2ae b839 000a macl %a1,%a3,%fp@\(10\)&,%d1,%acc2 + 5e58: a66e b829 000a macl %a1,%a3,%fp@\(10\)&,%a3,%acc0 + 5e5e: a6ee b839 000a macl %a1,%a3,%fp@\(10\)&,%a3,%acc2 + 5e64: a42e b829 000a macl %a1,%a3,%fp@\(10\)&,%d2,%acc0 + 5e6a: a4ae b839 000a macl %a1,%a3,%fp@\(10\)&,%d2,%acc2 + 5e70: ae6e b829 000a macl %a1,%a3,%fp@\(10\)&,%sp,%acc0 + 5e76: aeee b839 000a macl %a1,%a3,%fp@\(10\)&,%sp,%acc2 + 5e7c: a221 b809 macl %a1,%a3,%a1@-,%d1,%acc0 + 5e80: a2a1 b819 macl %a1,%a3,%a1@-,%d1,%acc2 + 5e84: a661 b809 macl %a1,%a3,%a1@-,%a3,%acc0 + 5e88: a6e1 b819 macl %a1,%a3,%a1@-,%a3,%acc2 + 5e8c: a421 b809 macl %a1,%a3,%a1@-,%d2,%acc0 + 5e90: a4a1 b819 macl %a1,%a3,%a1@-,%d2,%acc2 + 5e94: ae61 b809 macl %a1,%a3,%a1@-,%sp,%acc0 + 5e98: aee1 b819 macl %a1,%a3,%a1@-,%sp,%acc2 + 5e9c: a221 b829 macl %a1,%a3,%a1@-&,%d1,%acc0 + 5ea0: a2a1 b839 macl %a1,%a3,%a1@-&,%d1,%acc2 + 5ea4: a661 b829 macl %a1,%a3,%a1@-&,%a3,%acc0 + 5ea8: a6e1 b839 macl %a1,%a3,%a1@-&,%a3,%acc2 + 5eac: a421 b829 macl %a1,%a3,%a1@-&,%d2,%acc0 + 5eb0: a4a1 b839 macl %a1,%a3,%a1@-&,%d2,%acc2 + 5eb4: ae61 b829 macl %a1,%a3,%a1@-&,%sp,%acc0 + 5eb8: aee1 b839 macl %a1,%a3,%a1@-&,%sp,%acc2 + 5ebc: a213 ba09 macl %a1,%a3,<<,%a3@,%d1,%acc0 + 5ec0: a293 ba19 macl %a1,%a3,<<,%a3@,%d1,%acc2 + 5ec4: a653 ba09 macl %a1,%a3,>>,%a3@,%a3,%acc0 + 5ec8: a6d3 ba19 macl %a1,%a3,>>,%a3@,%a3,%acc2 + 5ecc: a413 ba09 macl %a1,%a3,,%a3@,%d2,%acc0 + 5ed0: a493 ba19 macl %a1,%a3,,%a3@,%d2,%acc2 + 5ed4: ae53 ba09 macl %a1,%a3,>>,%a3@,%sp,%acc0 + 5ed8: aed3 ba19 macl %a1,%a3,>>,%a3@,%sp,%acc2 + 5edc: a213 ba29 macl %a1,%a3,<<,%a3@&,%d1,%acc0 + 5ee0: a293 ba39 macl %a1,%a3,<<,%a3@&,%d1,%acc2 + 5ee4: a653 ba29 macl %a1,%a3,>>,%a3@&,%a3,%acc0 + 5ee8: a6d3 ba39 macl %a1,%a3,>>,%a3@&,%a3,%acc2 + 5eec: a413 ba29 macl %a1,%a3,,%a3@&,%d2,%acc0 + 5ef0: a493 ba39 macl %a1,%a3,,%a3@&,%d2,%acc2 + 5ef4: ae53 ba29 macl %a1,%a3,>>,%a3@&,%sp,%acc0 + 5ef8: aed3 ba39 macl %a1,%a3,>>,%a3@&,%sp,%acc2 + 5efc: a21a ba09 macl %a1,%a3,<<,%a2@\+,%d1,%acc0 + 5f00: a29a ba19 macl %a1,%a3,<<,%a2@\+,%d1,%acc2 + 5f04: a65a ba09 macl %a1,%a3,>>,%a2@\+,%a3,%acc0 + 5f08: a6da ba19 macl %a1,%a3,>>,%a2@\+,%a3,%acc2 + 5f0c: a41a ba09 macl %a1,%a3,,%a2@\+,%d2,%acc0 + 5f10: a49a ba19 macl %a1,%a3,,%a2@\+,%d2,%acc2 + 5f14: ae5a ba09 macl %a1,%a3,>>,%a2@\+,%sp,%acc0 + 5f18: aeda ba19 macl %a1,%a3,>>,%a2@\+,%sp,%acc2 + 5f1c: a21a ba29 macl %a1,%a3,<<,%a2@\+&,%d1,%acc0 + 5f20: a29a ba39 macl %a1,%a3,<<,%a2@\+&,%d1,%acc2 + 5f24: a65a ba29 macl %a1,%a3,>>,%a2@\+&,%a3,%acc0 + 5f28: a6da ba39 macl %a1,%a3,>>,%a2@\+&,%a3,%acc2 + 5f2c: a41a ba29 macl %a1,%a3,,%a2@\+&,%d2,%acc0 + 5f30: a49a ba39 macl %a1,%a3,,%a2@\+&,%d2,%acc2 + 5f34: ae5a ba29 macl %a1,%a3,>>,%a2@\+&,%sp,%acc0 + 5f38: aeda ba39 macl %a1,%a3,>>,%a2@\+&,%sp,%acc2 + 5f3c: a22e ba09 000a macl %a1,%a3,<<,%fp@\(10\),%d1,%acc0 + 5f42: a2ae ba19 000a macl %a1,%a3,<<,%fp@\(10\),%d1,%acc2 + 5f48: a66e ba09 000a macl %a1,%a3,>>,%fp@\(10\),%a3,%acc0 + 5f4e: a6ee ba19 000a macl %a1,%a3,>>,%fp@\(10\),%a3,%acc2 + 5f54: a42e ba09 000a macl %a1,%a3,,%fp@\(10\),%d2,%acc0 + 5f5a: a4ae ba19 000a macl %a1,%a3,,%fp@\(10\),%d2,%acc2 + 5f60: ae6e ba09 000a macl %a1,%a3,>>,%fp@\(10\),%sp,%acc0 + 5f66: aeee ba19 000a macl %a1,%a3,>>,%fp@\(10\),%sp,%acc2 + 5f6c: a22e ba29 000a macl %a1,%a3,<<,%fp@\(10\)&,%d1,%acc0 + 5f72: a2ae ba39 000a macl %a1,%a3,<<,%fp@\(10\)&,%d1,%acc2 + 5f78: a66e ba29 000a macl %a1,%a3,>>,%fp@\(10\)&,%a3,%acc0 + 5f7e: a6ee ba39 000a macl %a1,%a3,>>,%fp@\(10\)&,%a3,%acc2 + 5f84: a42e ba29 000a macl %a1,%a3,,%fp@\(10\)&,%d2,%acc0 + 5f8a: a4ae ba39 000a macl %a1,%a3,,%fp@\(10\)&,%d2,%acc2 + 5f90: ae6e ba29 000a macl %a1,%a3,>>,%fp@\(10\)&,%sp,%acc0 + 5f96: aeee ba39 000a macl %a1,%a3,>>,%fp@\(10\)&,%sp,%acc2 + 5f9c: a221 ba09 macl %a1,%a3,<<,%a1@-,%d1,%acc0 + 5fa0: a2a1 ba19 macl %a1,%a3,<<,%a1@-,%d1,%acc2 + 5fa4: a661 ba09 macl %a1,%a3,>>,%a1@-,%a3,%acc0 + 5fa8: a6e1 ba19 macl %a1,%a3,>>,%a1@-,%a3,%acc2 + 5fac: a421 ba09 macl %a1,%a3,,%a1@-,%d2,%acc0 + 5fb0: a4a1 ba19 macl %a1,%a3,,%a1@-,%d2,%acc2 + 5fb4: ae61 ba09 macl %a1,%a3,>>,%a1@-,%sp,%acc0 + 5fb8: aee1 ba19 macl %a1,%a3,>>,%a1@-,%sp,%acc2 + 5fbc: a221 ba29 macl %a1,%a3,<<,%a1@-&,%d1,%acc0 + 5fc0: a2a1 ba39 macl %a1,%a3,<<,%a1@-&,%d1,%acc2 + 5fc4: a661 ba29 macl %a1,%a3,>>,%a1@-&,%a3,%acc0 + 5fc8: a6e1 ba39 macl %a1,%a3,>>,%a1@-&,%a3,%acc2 + 5fcc: a421 ba29 macl %a1,%a3,,%a1@-&,%d2,%acc0 + 5fd0: a4a1 ba39 macl %a1,%a3,,%a1@-&,%d2,%acc2 + 5fd4: ae61 ba29 macl %a1,%a3,>>,%a1@-&,%sp,%acc0 + 5fd8: aee1 ba39 macl %a1,%a3,>>,%a1@-&,%sp,%acc2 + 5fdc: a213 be09 macl %a1,%a3,<<,%a3@,%d1,%acc0 + 5fe0: a293 be19 macl %a1,%a3,<<,%a3@,%d1,%acc2 + 5fe4: a653 be09 macl %a1,%a3,>>,%a3@,%a3,%acc0 + 5fe8: a6d3 be19 macl %a1,%a3,>>,%a3@,%a3,%acc2 + 5fec: a413 be09 macl %a1,%a3,,%a3@,%d2,%acc0 + 5ff0: a493 be19 macl %a1,%a3,,%a3@,%d2,%acc2 + 5ff4: ae53 be09 macl %a1,%a3,>>,%a3@,%sp,%acc0 + 5ff8: aed3 be19 macl %a1,%a3,>>,%a3@,%sp,%acc2 + 5ffc: a213 be29 macl %a1,%a3,<<,%a3@&,%d1,%acc0 + 6000: a293 be39 macl %a1,%a3,<<,%a3@&,%d1,%acc2 + 6004: a653 be29 macl %a1,%a3,>>,%a3@&,%a3,%acc0 + 6008: a6d3 be39 macl %a1,%a3,>>,%a3@&,%a3,%acc2 + 600c: a413 be29 macl %a1,%a3,,%a3@&,%d2,%acc0 + 6010: a493 be39 macl %a1,%a3,,%a3@&,%d2,%acc2 + 6014: ae53 be29 macl %a1,%a3,>>,%a3@&,%sp,%acc0 + 6018: aed3 be39 macl %a1,%a3,>>,%a3@&,%sp,%acc2 + 601c: a21a be09 macl %a1,%a3,<<,%a2@\+,%d1,%acc0 + 6020: a29a be19 macl %a1,%a3,<<,%a2@\+,%d1,%acc2 + 6024: a65a be09 macl %a1,%a3,>>,%a2@\+,%a3,%acc0 + 6028: a6da be19 macl %a1,%a3,>>,%a2@\+,%a3,%acc2 + 602c: a41a be09 macl %a1,%a3,,%a2@\+,%d2,%acc0 + 6030: a49a be19 macl %a1,%a3,,%a2@\+,%d2,%acc2 + 6034: ae5a be09 macl %a1,%a3,>>,%a2@\+,%sp,%acc0 + 6038: aeda be19 macl %a1,%a3,>>,%a2@\+,%sp,%acc2 + 603c: a21a be29 macl %a1,%a3,<<,%a2@\+&,%d1,%acc0 + 6040: a29a be39 macl %a1,%a3,<<,%a2@\+&,%d1,%acc2 + 6044: a65a be29 macl %a1,%a3,>>,%a2@\+&,%a3,%acc0 + 6048: a6da be39 macl %a1,%a3,>>,%a2@\+&,%a3,%acc2 + 604c: a41a be29 macl %a1,%a3,,%a2@\+&,%d2,%acc0 + 6050: a49a be39 macl %a1,%a3,,%a2@\+&,%d2,%acc2 + 6054: ae5a be29 macl %a1,%a3,>>,%a2@\+&,%sp,%acc0 + 6058: aeda be39 macl %a1,%a3,>>,%a2@\+&,%sp,%acc2 + 605c: a22e be09 000a macl %a1,%a3,<<,%fp@\(10\),%d1,%acc0 + 6062: a2ae be19 000a macl %a1,%a3,<<,%fp@\(10\),%d1,%acc2 + 6068: a66e be09 000a macl %a1,%a3,>>,%fp@\(10\),%a3,%acc0 + 606e: a6ee be19 000a macl %a1,%a3,>>,%fp@\(10\),%a3,%acc2 + 6074: a42e be09 000a macl %a1,%a3,,%fp@\(10\),%d2,%acc0 + 607a: a4ae be19 000a macl %a1,%a3,,%fp@\(10\),%d2,%acc2 + 6080: ae6e be09 000a macl %a1,%a3,>>,%fp@\(10\),%sp,%acc0 + 6086: aeee be19 000a macl %a1,%a3,>>,%fp@\(10\),%sp,%acc2 + 608c: a22e be29 000a macl %a1,%a3,<<,%fp@\(10\)&,%d1,%acc0 + 6092: a2ae be39 000a macl %a1,%a3,<<,%fp@\(10\)&,%d1,%acc2 + 6098: a66e be29 000a macl %a1,%a3,>>,%fp@\(10\)&,%a3,%acc0 + 609e: a6ee be39 000a macl %a1,%a3,>>,%fp@\(10\)&,%a3,%acc2 + 60a4: a42e be29 000a macl %a1,%a3,,%fp@\(10\)&,%d2,%acc0 + 60aa: a4ae be39 000a macl %a1,%a3,,%fp@\(10\)&,%d2,%acc2 + 60b0: ae6e be29 000a macl %a1,%a3,>>,%fp@\(10\)&,%sp,%acc0 + 60b6: aeee be39 000a macl %a1,%a3,>>,%fp@\(10\)&,%sp,%acc2 + 60bc: a221 be09 macl %a1,%a3,<<,%a1@-,%d1,%acc0 + 60c0: a2a1 be19 macl %a1,%a3,<<,%a1@-,%d1,%acc2 + 60c4: a661 be09 macl %a1,%a3,>>,%a1@-,%a3,%acc0 + 60c8: a6e1 be19 macl %a1,%a3,>>,%a1@-,%a3,%acc2 + 60cc: a421 be09 macl %a1,%a3,,%a1@-,%d2,%acc0 + 60d0: a4a1 be19 macl %a1,%a3,,%a1@-,%d2,%acc2 + 60d4: ae61 be09 macl %a1,%a3,>>,%a1@-,%sp,%acc0 + 60d8: aee1 be19 macl %a1,%a3,>>,%a1@-,%sp,%acc2 + 60dc: a221 be29 macl %a1,%a3,<<,%a1@-&,%d1,%acc0 + 60e0: a2a1 be39 macl %a1,%a3,<<,%a1@-&,%d1,%acc2 + 60e4: a661 be29 macl %a1,%a3,>>,%a1@-&,%a3,%acc0 + 60e8: a6e1 be39 macl %a1,%a3,>>,%a1@-&,%a3,%acc2 + 60ec: a421 be29 macl %a1,%a3,,%a1@-&,%d2,%acc0 + 60f0: a4a1 be39 macl %a1,%a3,,%a1@-&,%d2,%acc2 + 60f4: ae61 be29 macl %a1,%a3,>>,%a1@-&,%sp,%acc0 + 60f8: aee1 be39 macl %a1,%a3,>>,%a1@-&,%sp,%acc2 + 60fc: a213 ba09 macl %a1,%a3,<<,%a3@,%d1,%acc0 + 6100: a293 ba19 macl %a1,%a3,<<,%a3@,%d1,%acc2 + 6104: a653 ba09 macl %a1,%a3,>>,%a3@,%a3,%acc0 + 6108: a6d3 ba19 macl %a1,%a3,>>,%a3@,%a3,%acc2 + 610c: a413 ba09 macl %a1,%a3,,%a3@,%d2,%acc0 + 6110: a493 ba19 macl %a1,%a3,,%a3@,%d2,%acc2 + 6114: ae53 ba09 macl %a1,%a3,>>,%a3@,%sp,%acc0 + 6118: aed3 ba19 macl %a1,%a3,>>,%a3@,%sp,%acc2 + 611c: a213 ba29 macl %a1,%a3,<<,%a3@&,%d1,%acc0 + 6120: a293 ba39 macl %a1,%a3,<<,%a3@&,%d1,%acc2 + 6124: a653 ba29 macl %a1,%a3,>>,%a3@&,%a3,%acc0 + 6128: a6d3 ba39 macl %a1,%a3,>>,%a3@&,%a3,%acc2 + 612c: a413 ba29 macl %a1,%a3,,%a3@&,%d2,%acc0 + 6130: a493 ba39 macl %a1,%a3,,%a3@&,%d2,%acc2 + 6134: ae53 ba29 macl %a1,%a3,>>,%a3@&,%sp,%acc0 + 6138: aed3 ba39 macl %a1,%a3,>>,%a3@&,%sp,%acc2 + 613c: a21a ba09 macl %a1,%a3,<<,%a2@\+,%d1,%acc0 + 6140: a29a ba19 macl %a1,%a3,<<,%a2@\+,%d1,%acc2 + 6144: a65a ba09 macl %a1,%a3,>>,%a2@\+,%a3,%acc0 + 6148: a6da ba19 macl %a1,%a3,>>,%a2@\+,%a3,%acc2 + 614c: a41a ba09 macl %a1,%a3,,%a2@\+,%d2,%acc0 + 6150: a49a ba19 macl %a1,%a3,,%a2@\+,%d2,%acc2 + 6154: ae5a ba09 macl %a1,%a3,>>,%a2@\+,%sp,%acc0 + 6158: aeda ba19 macl %a1,%a3,>>,%a2@\+,%sp,%acc2 + 615c: a21a ba29 macl %a1,%a3,<<,%a2@\+&,%d1,%acc0 + 6160: a29a ba39 macl %a1,%a3,<<,%a2@\+&,%d1,%acc2 + 6164: a65a ba29 macl %a1,%a3,>>,%a2@\+&,%a3,%acc0 + 6168: a6da ba39 macl %a1,%a3,>>,%a2@\+&,%a3,%acc2 + 616c: a41a ba29 macl %a1,%a3,,%a2@\+&,%d2,%acc0 + 6170: a49a ba39 macl %a1,%a3,,%a2@\+&,%d2,%acc2 + 6174: ae5a ba29 macl %a1,%a3,>>,%a2@\+&,%sp,%acc0 + 6178: aeda ba39 macl %a1,%a3,>>,%a2@\+&,%sp,%acc2 + 617c: a22e ba09 000a macl %a1,%a3,<<,%fp@\(10\),%d1,%acc0 + 6182: a2ae ba19 000a macl %a1,%a3,<<,%fp@\(10\),%d1,%acc2 + 6188: a66e ba09 000a macl %a1,%a3,>>,%fp@\(10\),%a3,%acc0 + 618e: a6ee ba19 000a macl %a1,%a3,>>,%fp@\(10\),%a3,%acc2 + 6194: a42e ba09 000a macl %a1,%a3,,%fp@\(10\),%d2,%acc0 + 619a: a4ae ba19 000a macl %a1,%a3,,%fp@\(10\),%d2,%acc2 + 61a0: ae6e ba09 000a macl %a1,%a3,>>,%fp@\(10\),%sp,%acc0 + 61a6: aeee ba19 000a macl %a1,%a3,>>,%fp@\(10\),%sp,%acc2 + 61ac: a22e ba29 000a macl %a1,%a3,<<,%fp@\(10\)&,%d1,%acc0 + 61b2: a2ae ba39 000a macl %a1,%a3,<<,%fp@\(10\)&,%d1,%acc2 + 61b8: a66e ba29 000a macl %a1,%a3,>>,%fp@\(10\)&,%a3,%acc0 + 61be: a6ee ba39 000a macl %a1,%a3,>>,%fp@\(10\)&,%a3,%acc2 + 61c4: a42e ba29 000a macl %a1,%a3,,%fp@\(10\)&,%d2,%acc0 + 61ca: a4ae ba39 000a macl %a1,%a3,,%fp@\(10\)&,%d2,%acc2 + 61d0: ae6e ba29 000a macl %a1,%a3,>>,%fp@\(10\)&,%sp,%acc0 + 61d6: aeee ba39 000a macl %a1,%a3,>>,%fp@\(10\)&,%sp,%acc2 + 61dc: a221 ba09 macl %a1,%a3,<<,%a1@-,%d1,%acc0 + 61e0: a2a1 ba19 macl %a1,%a3,<<,%a1@-,%d1,%acc2 + 61e4: a661 ba09 macl %a1,%a3,>>,%a1@-,%a3,%acc0 + 61e8: a6e1 ba19 macl %a1,%a3,>>,%a1@-,%a3,%acc2 + 61ec: a421 ba09 macl %a1,%a3,,%a1@-,%d2,%acc0 + 61f0: a4a1 ba19 macl %a1,%a3,,%a1@-,%d2,%acc2 + 61f4: ae61 ba09 macl %a1,%a3,>>,%a1@-,%sp,%acc0 + 61f8: aee1 ba19 macl %a1,%a3,>>,%a1@-,%sp,%acc2 + 61fc: a221 ba29 macl %a1,%a3,<<,%a1@-&,%d1,%acc0 + 6200: a2a1 ba39 macl %a1,%a3,<<,%a1@-&,%d1,%acc2 + 6204: a661 ba29 macl %a1,%a3,>>,%a1@-&,%a3,%acc0 + 6208: a6e1 ba39 macl %a1,%a3,>>,%a1@-&,%a3,%acc2 + 620c: a421 ba29 macl %a1,%a3,,%a1@-&,%d2,%acc0 + 6210: a4a1 ba39 macl %a1,%a3,,%a1@-&,%d2,%acc2 + 6214: ae61 ba29 macl %a1,%a3,>>,%a1@-&,%sp,%acc0 + 6218: aee1 ba39 macl %a1,%a3,>>,%a1@-&,%sp,%acc2 + 621c: a213 be09 macl %a1,%a3,<<,%a3@,%d1,%acc0 + 6220: a293 be19 macl %a1,%a3,<<,%a3@,%d1,%acc2 + 6224: a653 be09 macl %a1,%a3,>>,%a3@,%a3,%acc0 + 6228: a6d3 be19 macl %a1,%a3,>>,%a3@,%a3,%acc2 + 622c: a413 be09 macl %a1,%a3,,%a3@,%d2,%acc0 + 6230: a493 be19 macl %a1,%a3,,%a3@,%d2,%acc2 + 6234: ae53 be09 macl %a1,%a3,>>,%a3@,%sp,%acc0 + 6238: aed3 be19 macl %a1,%a3,>>,%a3@,%sp,%acc2 + 623c: a213 be29 macl %a1,%a3,<<,%a3@&,%d1,%acc0 + 6240: a293 be39 macl %a1,%a3,<<,%a3@&,%d1,%acc2 + 6244: a653 be29 macl %a1,%a3,>>,%a3@&,%a3,%acc0 + 6248: a6d3 be39 macl %a1,%a3,>>,%a3@&,%a3,%acc2 + 624c: a413 be29 macl %a1,%a3,,%a3@&,%d2,%acc0 + 6250: a493 be39 macl %a1,%a3,,%a3@&,%d2,%acc2 + 6254: ae53 be29 macl %a1,%a3,>>,%a3@&,%sp,%acc0 + 6258: aed3 be39 macl %a1,%a3,>>,%a3@&,%sp,%acc2 + 625c: a21a be09 macl %a1,%a3,<<,%a2@\+,%d1,%acc0 + 6260: a29a be19 macl %a1,%a3,<<,%a2@\+,%d1,%acc2 + 6264: a65a be09 macl %a1,%a3,>>,%a2@\+,%a3,%acc0 + 6268: a6da be19 macl %a1,%a3,>>,%a2@\+,%a3,%acc2 + 626c: a41a be09 macl %a1,%a3,,%a2@\+,%d2,%acc0 + 6270: a49a be19 macl %a1,%a3,,%a2@\+,%d2,%acc2 + 6274: ae5a be09 macl %a1,%a3,>>,%a2@\+,%sp,%acc0 + 6278: aeda be19 macl %a1,%a3,>>,%a2@\+,%sp,%acc2 + 627c: a21a be29 macl %a1,%a3,<<,%a2@\+&,%d1,%acc0 + 6280: a29a be39 macl %a1,%a3,<<,%a2@\+&,%d1,%acc2 + 6284: a65a be29 macl %a1,%a3,>>,%a2@\+&,%a3,%acc0 + 6288: a6da be39 macl %a1,%a3,>>,%a2@\+&,%a3,%acc2 + 628c: a41a be29 macl %a1,%a3,,%a2@\+&,%d2,%acc0 + 6290: a49a be39 macl %a1,%a3,,%a2@\+&,%d2,%acc2 + 6294: ae5a be29 macl %a1,%a3,>>,%a2@\+&,%sp,%acc0 + 6298: aeda be39 macl %a1,%a3,>>,%a2@\+&,%sp,%acc2 + 629c: a22e be09 000a macl %a1,%a3,<<,%fp@\(10\),%d1,%acc0 + 62a2: a2ae be19 000a macl %a1,%a3,<<,%fp@\(10\),%d1,%acc2 + 62a8: a66e be09 000a macl %a1,%a3,>>,%fp@\(10\),%a3,%acc0 + 62ae: a6ee be19 000a macl %a1,%a3,>>,%fp@\(10\),%a3,%acc2 + 62b4: a42e be09 000a macl %a1,%a3,,%fp@\(10\),%d2,%acc0 + 62ba: a4ae be19 000a macl %a1,%a3,,%fp@\(10\),%d2,%acc2 + 62c0: ae6e be09 000a macl %a1,%a3,>>,%fp@\(10\),%sp,%acc0 + 62c6: aeee be19 000a macl %a1,%a3,>>,%fp@\(10\),%sp,%acc2 + 62cc: a22e be29 000a macl %a1,%a3,<<,%fp@\(10\)&,%d1,%acc0 + 62d2: a2ae be39 000a macl %a1,%a3,<<,%fp@\(10\)&,%d1,%acc2 + 62d8: a66e be29 000a macl %a1,%a3,>>,%fp@\(10\)&,%a3,%acc0 + 62de: a6ee be39 000a macl %a1,%a3,>>,%fp@\(10\)&,%a3,%acc2 + 62e4: a42e be29 000a macl %a1,%a3,,%fp@\(10\)&,%d2,%acc0 + 62ea: a4ae be39 000a macl %a1,%a3,,%fp@\(10\)&,%d2,%acc2 + 62f0: ae6e be29 000a macl %a1,%a3,>>,%fp@\(10\)&,%sp,%acc0 + 62f6: aeee be39 000a macl %a1,%a3,>>,%fp@\(10\)&,%sp,%acc2 + 62fc: a221 be09 macl %a1,%a3,<<,%a1@-,%d1,%acc0 + 6300: a2a1 be19 macl %a1,%a3,<<,%a1@-,%d1,%acc2 + 6304: a661 be09 macl %a1,%a3,>>,%a1@-,%a3,%acc0 + 6308: a6e1 be19 macl %a1,%a3,>>,%a1@-,%a3,%acc2 + 630c: a421 be09 macl %a1,%a3,,%a1@-,%d2,%acc0 + 6310: a4a1 be19 macl %a1,%a3,,%a1@-,%d2,%acc2 + 6314: ae61 be09 macl %a1,%a3,>>,%a1@-,%sp,%acc0 + 6318: aee1 be19 macl %a1,%a3,>>,%a1@-,%sp,%acc2 + 631c: a221 be29 macl %a1,%a3,<<,%a1@-&,%d1,%acc0 + 6320: a2a1 be39 macl %a1,%a3,<<,%a1@-&,%d1,%acc2 + 6324: a661 be29 macl %a1,%a3,>>,%a1@-&,%a3,%acc0 + 6328: a6e1 be39 macl %a1,%a3,>>,%a1@-&,%a3,%acc2 + 632c: a421 be29 macl %a1,%a3,,%a1@-&,%d2,%acc0 + 6330: a4a1 be39 macl %a1,%a3,,%a1@-&,%d2,%acc2 + 6334: ae61 be29 macl %a1,%a3,>>,%a1@-&,%sp,%acc0 + 6338: aee1 be39 macl %a1,%a3,>>,%a1@-&,%sp,%acc2 + 633c: a213 4809 macl %a1,%d4,%a3@,%d1,%acc1 + 6340: a293 4819 macl %a1,%d4,%a3@,%d1,%acc3 + 6344: a653 4809 macl %a1,%d4,%a3@,%a3,%acc1 + 6348: a6d3 4819 macl %a1,%d4,%a3@,%a3,%acc3 + 634c: a413 4809 macl %a1,%d4,%a3@,%d2,%acc1 + 6350: a493 4819 macl %a1,%d4,%a3@,%d2,%acc3 + 6354: ae53 4809 macl %a1,%d4,%a3@,%sp,%acc1 + 6358: aed3 4819 macl %a1,%d4,%a3@,%sp,%acc3 + 635c: a213 4829 macl %a1,%d4,%a3@&,%d1,%acc1 + 6360: a293 4839 macl %a1,%d4,%a3@&,%d1,%acc3 + 6364: a653 4829 macl %a1,%d4,%a3@&,%a3,%acc1 + 6368: a6d3 4839 macl %a1,%d4,%a3@&,%a3,%acc3 + 636c: a413 4829 macl %a1,%d4,%a3@&,%d2,%acc1 + 6370: a493 4839 macl %a1,%d4,%a3@&,%d2,%acc3 + 6374: ae53 4829 macl %a1,%d4,%a3@&,%sp,%acc1 + 6378: aed3 4839 macl %a1,%d4,%a3@&,%sp,%acc3 + 637c: a21a 4809 macl %a1,%d4,%a2@\+,%d1,%acc1 + 6380: a29a 4819 macl %a1,%d4,%a2@\+,%d1,%acc3 + 6384: a65a 4809 macl %a1,%d4,%a2@\+,%a3,%acc1 + 6388: a6da 4819 macl %a1,%d4,%a2@\+,%a3,%acc3 + 638c: a41a 4809 macl %a1,%d4,%a2@\+,%d2,%acc1 + 6390: a49a 4819 macl %a1,%d4,%a2@\+,%d2,%acc3 + 6394: ae5a 4809 macl %a1,%d4,%a2@\+,%sp,%acc1 + 6398: aeda 4819 macl %a1,%d4,%a2@\+,%sp,%acc3 + 639c: a21a 4829 macl %a1,%d4,%a2@\+&,%d1,%acc1 + 63a0: a29a 4839 macl %a1,%d4,%a2@\+&,%d1,%acc3 + 63a4: a65a 4829 macl %a1,%d4,%a2@\+&,%a3,%acc1 + 63a8: a6da 4839 macl %a1,%d4,%a2@\+&,%a3,%acc3 + 63ac: a41a 4829 macl %a1,%d4,%a2@\+&,%d2,%acc1 + 63b0: a49a 4839 macl %a1,%d4,%a2@\+&,%d2,%acc3 + 63b4: ae5a 4829 macl %a1,%d4,%a2@\+&,%sp,%acc1 + 63b8: aeda 4839 macl %a1,%d4,%a2@\+&,%sp,%acc3 + 63bc: a22e 4809 000a macl %a1,%d4,%fp@\(10\),%d1,%acc1 + 63c2: a2ae 4819 000a macl %a1,%d4,%fp@\(10\),%d1,%acc3 + 63c8: a66e 4809 000a macl %a1,%d4,%fp@\(10\),%a3,%acc1 + 63ce: a6ee 4819 000a macl %a1,%d4,%fp@\(10\),%a3,%acc3 + 63d4: a42e 4809 000a macl %a1,%d4,%fp@\(10\),%d2,%acc1 + 63da: a4ae 4819 000a macl %a1,%d4,%fp@\(10\),%d2,%acc3 + 63e0: ae6e 4809 000a macl %a1,%d4,%fp@\(10\),%sp,%acc1 + 63e6: aeee 4819 000a macl %a1,%d4,%fp@\(10\),%sp,%acc3 + 63ec: a22e 4829 000a macl %a1,%d4,%fp@\(10\)&,%d1,%acc1 + 63f2: a2ae 4839 000a macl %a1,%d4,%fp@\(10\)&,%d1,%acc3 + 63f8: a66e 4829 000a macl %a1,%d4,%fp@\(10\)&,%a3,%acc1 + 63fe: a6ee 4839 000a macl %a1,%d4,%fp@\(10\)&,%a3,%acc3 + 6404: a42e 4829 000a macl %a1,%d4,%fp@\(10\)&,%d2,%acc1 + 640a: a4ae 4839 000a macl %a1,%d4,%fp@\(10\)&,%d2,%acc3 + 6410: ae6e 4829 000a macl %a1,%d4,%fp@\(10\)&,%sp,%acc1 + 6416: aeee 4839 000a macl %a1,%d4,%fp@\(10\)&,%sp,%acc3 + 641c: a221 4809 macl %a1,%d4,%a1@-,%d1,%acc1 + 6420: a2a1 4819 macl %a1,%d4,%a1@-,%d1,%acc3 + 6424: a661 4809 macl %a1,%d4,%a1@-,%a3,%acc1 + 6428: a6e1 4819 macl %a1,%d4,%a1@-,%a3,%acc3 + 642c: a421 4809 macl %a1,%d4,%a1@-,%d2,%acc1 + 6430: a4a1 4819 macl %a1,%d4,%a1@-,%d2,%acc3 + 6434: ae61 4809 macl %a1,%d4,%a1@-,%sp,%acc1 + 6438: aee1 4819 macl %a1,%d4,%a1@-,%sp,%acc3 + 643c: a221 4829 macl %a1,%d4,%a1@-&,%d1,%acc1 + 6440: a2a1 4839 macl %a1,%d4,%a1@-&,%d1,%acc3 + 6444: a661 4829 macl %a1,%d4,%a1@-&,%a3,%acc1 + 6448: a6e1 4839 macl %a1,%d4,%a1@-&,%a3,%acc3 + 644c: a421 4829 macl %a1,%d4,%a1@-&,%d2,%acc1 + 6450: a4a1 4839 macl %a1,%d4,%a1@-&,%d2,%acc3 + 6454: ae61 4829 macl %a1,%d4,%a1@-&,%sp,%acc1 + 6458: aee1 4839 macl %a1,%d4,%a1@-&,%sp,%acc3 + 645c: a213 4a09 macl %a1,%d4,<<,%a3@,%d1,%acc1 + 6460: a293 4a19 macl %a1,%d4,<<,%a3@,%d1,%acc3 + 6464: a653 4a09 macl %a1,%d4,>>,%a3@,%a3,%acc1 + 6468: a6d3 4a19 macl %a1,%d4,>>,%a3@,%a3,%acc3 + 646c: a413 4a09 macl %a1,%d4,,%a3@,%d2,%acc1 + 6470: a493 4a19 macl %a1,%d4,,%a3@,%d2,%acc3 + 6474: ae53 4a09 macl %a1,%d4,>>,%a3@,%sp,%acc1 + 6478: aed3 4a19 macl %a1,%d4,>>,%a3@,%sp,%acc3 + 647c: a213 4a29 macl %a1,%d4,<<,%a3@&,%d1,%acc1 + 6480: a293 4a39 macl %a1,%d4,<<,%a3@&,%d1,%acc3 + 6484: a653 4a29 macl %a1,%d4,>>,%a3@&,%a3,%acc1 + 6488: a6d3 4a39 macl %a1,%d4,>>,%a3@&,%a3,%acc3 + 648c: a413 4a29 macl %a1,%d4,,%a3@&,%d2,%acc1 + 6490: a493 4a39 macl %a1,%d4,,%a3@&,%d2,%acc3 + 6494: ae53 4a29 macl %a1,%d4,>>,%a3@&,%sp,%acc1 + 6498: aed3 4a39 macl %a1,%d4,>>,%a3@&,%sp,%acc3 + 649c: a21a 4a09 macl %a1,%d4,<<,%a2@\+,%d1,%acc1 + 64a0: a29a 4a19 macl %a1,%d4,<<,%a2@\+,%d1,%acc3 + 64a4: a65a 4a09 macl %a1,%d4,>>,%a2@\+,%a3,%acc1 + 64a8: a6da 4a19 macl %a1,%d4,>>,%a2@\+,%a3,%acc3 + 64ac: a41a 4a09 macl %a1,%d4,,%a2@\+,%d2,%acc1 + 64b0: a49a 4a19 macl %a1,%d4,,%a2@\+,%d2,%acc3 + 64b4: ae5a 4a09 macl %a1,%d4,>>,%a2@\+,%sp,%acc1 + 64b8: aeda 4a19 macl %a1,%d4,>>,%a2@\+,%sp,%acc3 + 64bc: a21a 4a29 macl %a1,%d4,<<,%a2@\+&,%d1,%acc1 + 64c0: a29a 4a39 macl %a1,%d4,<<,%a2@\+&,%d1,%acc3 + 64c4: a65a 4a29 macl %a1,%d4,>>,%a2@\+&,%a3,%acc1 + 64c8: a6da 4a39 macl %a1,%d4,>>,%a2@\+&,%a3,%acc3 + 64cc: a41a 4a29 macl %a1,%d4,,%a2@\+&,%d2,%acc1 + 64d0: a49a 4a39 macl %a1,%d4,,%a2@\+&,%d2,%acc3 + 64d4: ae5a 4a29 macl %a1,%d4,>>,%a2@\+&,%sp,%acc1 + 64d8: aeda 4a39 macl %a1,%d4,>>,%a2@\+&,%sp,%acc3 + 64dc: a22e 4a09 000a macl %a1,%d4,<<,%fp@\(10\),%d1,%acc1 + 64e2: a2ae 4a19 000a macl %a1,%d4,<<,%fp@\(10\),%d1,%acc3 + 64e8: a66e 4a09 000a macl %a1,%d4,>>,%fp@\(10\),%a3,%acc1 + 64ee: a6ee 4a19 000a macl %a1,%d4,>>,%fp@\(10\),%a3,%acc3 + 64f4: a42e 4a09 000a macl %a1,%d4,,%fp@\(10\),%d2,%acc1 + 64fa: a4ae 4a19 000a macl %a1,%d4,,%fp@\(10\),%d2,%acc3 + 6500: ae6e 4a09 000a macl %a1,%d4,>>,%fp@\(10\),%sp,%acc1 + 6506: aeee 4a19 000a macl %a1,%d4,>>,%fp@\(10\),%sp,%acc3 + 650c: a22e 4a29 000a macl %a1,%d4,<<,%fp@\(10\)&,%d1,%acc1 + 6512: a2ae 4a39 000a macl %a1,%d4,<<,%fp@\(10\)&,%d1,%acc3 + 6518: a66e 4a29 000a macl %a1,%d4,>>,%fp@\(10\)&,%a3,%acc1 + 651e: a6ee 4a39 000a macl %a1,%d4,>>,%fp@\(10\)&,%a3,%acc3 + 6524: a42e 4a29 000a macl %a1,%d4,,%fp@\(10\)&,%d2,%acc1 + 652a: a4ae 4a39 000a macl %a1,%d4,,%fp@\(10\)&,%d2,%acc3 + 6530: ae6e 4a29 000a macl %a1,%d4,>>,%fp@\(10\)&,%sp,%acc1 + 6536: aeee 4a39 000a macl %a1,%d4,>>,%fp@\(10\)&,%sp,%acc3 + 653c: a221 4a09 macl %a1,%d4,<<,%a1@-,%d1,%acc1 + 6540: a2a1 4a19 macl %a1,%d4,<<,%a1@-,%d1,%acc3 + 6544: a661 4a09 macl %a1,%d4,>>,%a1@-,%a3,%acc1 + 6548: a6e1 4a19 macl %a1,%d4,>>,%a1@-,%a3,%acc3 + 654c: a421 4a09 macl %a1,%d4,,%a1@-,%d2,%acc1 + 6550: a4a1 4a19 macl %a1,%d4,,%a1@-,%d2,%acc3 + 6554: ae61 4a09 macl %a1,%d4,>>,%a1@-,%sp,%acc1 + 6558: aee1 4a19 macl %a1,%d4,>>,%a1@-,%sp,%acc3 + 655c: a221 4a29 macl %a1,%d4,<<,%a1@-&,%d1,%acc1 + 6560: a2a1 4a39 macl %a1,%d4,<<,%a1@-&,%d1,%acc3 + 6564: a661 4a29 macl %a1,%d4,>>,%a1@-&,%a3,%acc1 + 6568: a6e1 4a39 macl %a1,%d4,>>,%a1@-&,%a3,%acc3 + 656c: a421 4a29 macl %a1,%d4,,%a1@-&,%d2,%acc1 + 6570: a4a1 4a39 macl %a1,%d4,,%a1@-&,%d2,%acc3 + 6574: ae61 4a29 macl %a1,%d4,>>,%a1@-&,%sp,%acc1 + 6578: aee1 4a39 macl %a1,%d4,>>,%a1@-&,%sp,%acc3 + 657c: a213 4e09 macl %a1,%d4,<<,%a3@,%d1,%acc1 + 6580: a293 4e19 macl %a1,%d4,<<,%a3@,%d1,%acc3 + 6584: a653 4e09 macl %a1,%d4,>>,%a3@,%a3,%acc1 + 6588: a6d3 4e19 macl %a1,%d4,>>,%a3@,%a3,%acc3 + 658c: a413 4e09 macl %a1,%d4,,%a3@,%d2,%acc1 + 6590: a493 4e19 macl %a1,%d4,,%a3@,%d2,%acc3 + 6594: ae53 4e09 macl %a1,%d4,>>,%a3@,%sp,%acc1 + 6598: aed3 4e19 macl %a1,%d4,>>,%a3@,%sp,%acc3 + 659c: a213 4e29 macl %a1,%d4,<<,%a3@&,%d1,%acc1 + 65a0: a293 4e39 macl %a1,%d4,<<,%a3@&,%d1,%acc3 + 65a4: a653 4e29 macl %a1,%d4,>>,%a3@&,%a3,%acc1 + 65a8: a6d3 4e39 macl %a1,%d4,>>,%a3@&,%a3,%acc3 + 65ac: a413 4e29 macl %a1,%d4,,%a3@&,%d2,%acc1 + 65b0: a493 4e39 macl %a1,%d4,,%a3@&,%d2,%acc3 + 65b4: ae53 4e29 macl %a1,%d4,>>,%a3@&,%sp,%acc1 + 65b8: aed3 4e39 macl %a1,%d4,>>,%a3@&,%sp,%acc3 + 65bc: a21a 4e09 macl %a1,%d4,<<,%a2@\+,%d1,%acc1 + 65c0: a29a 4e19 macl %a1,%d4,<<,%a2@\+,%d1,%acc3 + 65c4: a65a 4e09 macl %a1,%d4,>>,%a2@\+,%a3,%acc1 + 65c8: a6da 4e19 macl %a1,%d4,>>,%a2@\+,%a3,%acc3 + 65cc: a41a 4e09 macl %a1,%d4,,%a2@\+,%d2,%acc1 + 65d0: a49a 4e19 macl %a1,%d4,,%a2@\+,%d2,%acc3 + 65d4: ae5a 4e09 macl %a1,%d4,>>,%a2@\+,%sp,%acc1 + 65d8: aeda 4e19 macl %a1,%d4,>>,%a2@\+,%sp,%acc3 + 65dc: a21a 4e29 macl %a1,%d4,<<,%a2@\+&,%d1,%acc1 + 65e0: a29a 4e39 macl %a1,%d4,<<,%a2@\+&,%d1,%acc3 + 65e4: a65a 4e29 macl %a1,%d4,>>,%a2@\+&,%a3,%acc1 + 65e8: a6da 4e39 macl %a1,%d4,>>,%a2@\+&,%a3,%acc3 + 65ec: a41a 4e29 macl %a1,%d4,,%a2@\+&,%d2,%acc1 + 65f0: a49a 4e39 macl %a1,%d4,,%a2@\+&,%d2,%acc3 + 65f4: ae5a 4e29 macl %a1,%d4,>>,%a2@\+&,%sp,%acc1 + 65f8: aeda 4e39 macl %a1,%d4,>>,%a2@\+&,%sp,%acc3 + 65fc: a22e 4e09 000a macl %a1,%d4,<<,%fp@\(10\),%d1,%acc1 + 6602: a2ae 4e19 000a macl %a1,%d4,<<,%fp@\(10\),%d1,%acc3 + 6608: a66e 4e09 000a macl %a1,%d4,>>,%fp@\(10\),%a3,%acc1 + 660e: a6ee 4e19 000a macl %a1,%d4,>>,%fp@\(10\),%a3,%acc3 + 6614: a42e 4e09 000a macl %a1,%d4,,%fp@\(10\),%d2,%acc1 + 661a: a4ae 4e19 000a macl %a1,%d4,,%fp@\(10\),%d2,%acc3 + 6620: ae6e 4e09 000a macl %a1,%d4,>>,%fp@\(10\),%sp,%acc1 + 6626: aeee 4e19 000a macl %a1,%d4,>>,%fp@\(10\),%sp,%acc3 + 662c: a22e 4e29 000a macl %a1,%d4,<<,%fp@\(10\)&,%d1,%acc1 + 6632: a2ae 4e39 000a macl %a1,%d4,<<,%fp@\(10\)&,%d1,%acc3 + 6638: a66e 4e29 000a macl %a1,%d4,>>,%fp@\(10\)&,%a3,%acc1 + 663e: a6ee 4e39 000a macl %a1,%d4,>>,%fp@\(10\)&,%a3,%acc3 + 6644: a42e 4e29 000a macl %a1,%d4,,%fp@\(10\)&,%d2,%acc1 + 664a: a4ae 4e39 000a macl %a1,%d4,,%fp@\(10\)&,%d2,%acc3 + 6650: ae6e 4e29 000a macl %a1,%d4,>>,%fp@\(10\)&,%sp,%acc1 + 6656: aeee 4e39 000a macl %a1,%d4,>>,%fp@\(10\)&,%sp,%acc3 + 665c: a221 4e09 macl %a1,%d4,<<,%a1@-,%d1,%acc1 + 6660: a2a1 4e19 macl %a1,%d4,<<,%a1@-,%d1,%acc3 + 6664: a661 4e09 macl %a1,%d4,>>,%a1@-,%a3,%acc1 + 6668: a6e1 4e19 macl %a1,%d4,>>,%a1@-,%a3,%acc3 + 666c: a421 4e09 macl %a1,%d4,,%a1@-,%d2,%acc1 + 6670: a4a1 4e19 macl %a1,%d4,,%a1@-,%d2,%acc3 + 6674: ae61 4e09 macl %a1,%d4,>>,%a1@-,%sp,%acc1 + 6678: aee1 4e19 macl %a1,%d4,>>,%a1@-,%sp,%acc3 + 667c: a221 4e29 macl %a1,%d4,<<,%a1@-&,%d1,%acc1 + 6680: a2a1 4e39 macl %a1,%d4,<<,%a1@-&,%d1,%acc3 + 6684: a661 4e29 macl %a1,%d4,>>,%a1@-&,%a3,%acc1 + 6688: a6e1 4e39 macl %a1,%d4,>>,%a1@-&,%a3,%acc3 + 668c: a421 4e29 macl %a1,%d4,,%a1@-&,%d2,%acc1 + 6690: a4a1 4e39 macl %a1,%d4,,%a1@-&,%d2,%acc3 + 6694: ae61 4e29 macl %a1,%d4,>>,%a1@-&,%sp,%acc1 + 6698: aee1 4e39 macl %a1,%d4,>>,%a1@-&,%sp,%acc3 + 669c: a213 4a09 macl %a1,%d4,<<,%a3@,%d1,%acc1 + 66a0: a293 4a19 macl %a1,%d4,<<,%a3@,%d1,%acc3 + 66a4: a653 4a09 macl %a1,%d4,>>,%a3@,%a3,%acc1 + 66a8: a6d3 4a19 macl %a1,%d4,>>,%a3@,%a3,%acc3 + 66ac: a413 4a09 macl %a1,%d4,,%a3@,%d2,%acc1 + 66b0: a493 4a19 macl %a1,%d4,,%a3@,%d2,%acc3 + 66b4: ae53 4a09 macl %a1,%d4,>>,%a3@,%sp,%acc1 + 66b8: aed3 4a19 macl %a1,%d4,>>,%a3@,%sp,%acc3 + 66bc: a213 4a29 macl %a1,%d4,<<,%a3@&,%d1,%acc1 + 66c0: a293 4a39 macl %a1,%d4,<<,%a3@&,%d1,%acc3 + 66c4: a653 4a29 macl %a1,%d4,>>,%a3@&,%a3,%acc1 + 66c8: a6d3 4a39 macl %a1,%d4,>>,%a3@&,%a3,%acc3 + 66cc: a413 4a29 macl %a1,%d4,,%a3@&,%d2,%acc1 + 66d0: a493 4a39 macl %a1,%d4,,%a3@&,%d2,%acc3 + 66d4: ae53 4a29 macl %a1,%d4,>>,%a3@&,%sp,%acc1 + 66d8: aed3 4a39 macl %a1,%d4,>>,%a3@&,%sp,%acc3 + 66dc: a21a 4a09 macl %a1,%d4,<<,%a2@\+,%d1,%acc1 + 66e0: a29a 4a19 macl %a1,%d4,<<,%a2@\+,%d1,%acc3 + 66e4: a65a 4a09 macl %a1,%d4,>>,%a2@\+,%a3,%acc1 + 66e8: a6da 4a19 macl %a1,%d4,>>,%a2@\+,%a3,%acc3 + 66ec: a41a 4a09 macl %a1,%d4,,%a2@\+,%d2,%acc1 + 66f0: a49a 4a19 macl %a1,%d4,,%a2@\+,%d2,%acc3 + 66f4: ae5a 4a09 macl %a1,%d4,>>,%a2@\+,%sp,%acc1 + 66f8: aeda 4a19 macl %a1,%d4,>>,%a2@\+,%sp,%acc3 + 66fc: a21a 4a29 macl %a1,%d4,<<,%a2@\+&,%d1,%acc1 + 6700: a29a 4a39 macl %a1,%d4,<<,%a2@\+&,%d1,%acc3 + 6704: a65a 4a29 macl %a1,%d4,>>,%a2@\+&,%a3,%acc1 + 6708: a6da 4a39 macl %a1,%d4,>>,%a2@\+&,%a3,%acc3 + 670c: a41a 4a29 macl %a1,%d4,,%a2@\+&,%d2,%acc1 + 6710: a49a 4a39 macl %a1,%d4,,%a2@\+&,%d2,%acc3 + 6714: ae5a 4a29 macl %a1,%d4,>>,%a2@\+&,%sp,%acc1 + 6718: aeda 4a39 macl %a1,%d4,>>,%a2@\+&,%sp,%acc3 + 671c: a22e 4a09 000a macl %a1,%d4,<<,%fp@\(10\),%d1,%acc1 + 6722: a2ae 4a19 000a macl %a1,%d4,<<,%fp@\(10\),%d1,%acc3 + 6728: a66e 4a09 000a macl %a1,%d4,>>,%fp@\(10\),%a3,%acc1 + 672e: a6ee 4a19 000a macl %a1,%d4,>>,%fp@\(10\),%a3,%acc3 + 6734: a42e 4a09 000a macl %a1,%d4,,%fp@\(10\),%d2,%acc1 + 673a: a4ae 4a19 000a macl %a1,%d4,,%fp@\(10\),%d2,%acc3 + 6740: ae6e 4a09 000a macl %a1,%d4,>>,%fp@\(10\),%sp,%acc1 + 6746: aeee 4a19 000a macl %a1,%d4,>>,%fp@\(10\),%sp,%acc3 + 674c: a22e 4a29 000a macl %a1,%d4,<<,%fp@\(10\)&,%d1,%acc1 + 6752: a2ae 4a39 000a macl %a1,%d4,<<,%fp@\(10\)&,%d1,%acc3 + 6758: a66e 4a29 000a macl %a1,%d4,>>,%fp@\(10\)&,%a3,%acc1 + 675e: a6ee 4a39 000a macl %a1,%d4,>>,%fp@\(10\)&,%a3,%acc3 + 6764: a42e 4a29 000a macl %a1,%d4,,%fp@\(10\)&,%d2,%acc1 + 676a: a4ae 4a39 000a macl %a1,%d4,,%fp@\(10\)&,%d2,%acc3 + 6770: ae6e 4a29 000a macl %a1,%d4,>>,%fp@\(10\)&,%sp,%acc1 + 6776: aeee 4a39 000a macl %a1,%d4,>>,%fp@\(10\)&,%sp,%acc3 + 677c: a221 4a09 macl %a1,%d4,<<,%a1@-,%d1,%acc1 + 6780: a2a1 4a19 macl %a1,%d4,<<,%a1@-,%d1,%acc3 + 6784: a661 4a09 macl %a1,%d4,>>,%a1@-,%a3,%acc1 + 6788: a6e1 4a19 macl %a1,%d4,>>,%a1@-,%a3,%acc3 + 678c: a421 4a09 macl %a1,%d4,,%a1@-,%d2,%acc1 + 6790: a4a1 4a19 macl %a1,%d4,,%a1@-,%d2,%acc3 + 6794: ae61 4a09 macl %a1,%d4,>>,%a1@-,%sp,%acc1 + 6798: aee1 4a19 macl %a1,%d4,>>,%a1@-,%sp,%acc3 + 679c: a221 4a29 macl %a1,%d4,<<,%a1@-&,%d1,%acc1 + 67a0: a2a1 4a39 macl %a1,%d4,<<,%a1@-&,%d1,%acc3 + 67a4: a661 4a29 macl %a1,%d4,>>,%a1@-&,%a3,%acc1 + 67a8: a6e1 4a39 macl %a1,%d4,>>,%a1@-&,%a3,%acc3 + 67ac: a421 4a29 macl %a1,%d4,,%a1@-&,%d2,%acc1 + 67b0: a4a1 4a39 macl %a1,%d4,,%a1@-&,%d2,%acc3 + 67b4: ae61 4a29 macl %a1,%d4,>>,%a1@-&,%sp,%acc1 + 67b8: aee1 4a39 macl %a1,%d4,>>,%a1@-&,%sp,%acc3 + 67bc: a213 4e09 macl %a1,%d4,<<,%a3@,%d1,%acc1 + 67c0: a293 4e19 macl %a1,%d4,<<,%a3@,%d1,%acc3 + 67c4: a653 4e09 macl %a1,%d4,>>,%a3@,%a3,%acc1 + 67c8: a6d3 4e19 macl %a1,%d4,>>,%a3@,%a3,%acc3 + 67cc: a413 4e09 macl %a1,%d4,,%a3@,%d2,%acc1 + 67d0: a493 4e19 macl %a1,%d4,,%a3@,%d2,%acc3 + 67d4: ae53 4e09 macl %a1,%d4,>>,%a3@,%sp,%acc1 + 67d8: aed3 4e19 macl %a1,%d4,>>,%a3@,%sp,%acc3 + 67dc: a213 4e29 macl %a1,%d4,<<,%a3@&,%d1,%acc1 + 67e0: a293 4e39 macl %a1,%d4,<<,%a3@&,%d1,%acc3 + 67e4: a653 4e29 macl %a1,%d4,>>,%a3@&,%a3,%acc1 + 67e8: a6d3 4e39 macl %a1,%d4,>>,%a3@&,%a3,%acc3 + 67ec: a413 4e29 macl %a1,%d4,,%a3@&,%d2,%acc1 + 67f0: a493 4e39 macl %a1,%d4,,%a3@&,%d2,%acc3 + 67f4: ae53 4e29 macl %a1,%d4,>>,%a3@&,%sp,%acc1 + 67f8: aed3 4e39 macl %a1,%d4,>>,%a3@&,%sp,%acc3 + 67fc: a21a 4e09 macl %a1,%d4,<<,%a2@\+,%d1,%acc1 + 6800: a29a 4e19 macl %a1,%d4,<<,%a2@\+,%d1,%acc3 + 6804: a65a 4e09 macl %a1,%d4,>>,%a2@\+,%a3,%acc1 + 6808: a6da 4e19 macl %a1,%d4,>>,%a2@\+,%a3,%acc3 + 680c: a41a 4e09 macl %a1,%d4,,%a2@\+,%d2,%acc1 + 6810: a49a 4e19 macl %a1,%d4,,%a2@\+,%d2,%acc3 + 6814: ae5a 4e09 macl %a1,%d4,>>,%a2@\+,%sp,%acc1 + 6818: aeda 4e19 macl %a1,%d4,>>,%a2@\+,%sp,%acc3 + 681c: a21a 4e29 macl %a1,%d4,<<,%a2@\+&,%d1,%acc1 + 6820: a29a 4e39 macl %a1,%d4,<<,%a2@\+&,%d1,%acc3 + 6824: a65a 4e29 macl %a1,%d4,>>,%a2@\+&,%a3,%acc1 + 6828: a6da 4e39 macl %a1,%d4,>>,%a2@\+&,%a3,%acc3 + 682c: a41a 4e29 macl %a1,%d4,,%a2@\+&,%d2,%acc1 + 6830: a49a 4e39 macl %a1,%d4,,%a2@\+&,%d2,%acc3 + 6834: ae5a 4e29 macl %a1,%d4,>>,%a2@\+&,%sp,%acc1 + 6838: aeda 4e39 macl %a1,%d4,>>,%a2@\+&,%sp,%acc3 + 683c: a22e 4e09 000a macl %a1,%d4,<<,%fp@\(10\),%d1,%acc1 + 6842: a2ae 4e19 000a macl %a1,%d4,<<,%fp@\(10\),%d1,%acc3 + 6848: a66e 4e09 000a macl %a1,%d4,>>,%fp@\(10\),%a3,%acc1 + 684e: a6ee 4e19 000a macl %a1,%d4,>>,%fp@\(10\),%a3,%acc3 + 6854: a42e 4e09 000a macl %a1,%d4,,%fp@\(10\),%d2,%acc1 + 685a: a4ae 4e19 000a macl %a1,%d4,,%fp@\(10\),%d2,%acc3 + 6860: ae6e 4e09 000a macl %a1,%d4,>>,%fp@\(10\),%sp,%acc1 + 6866: aeee 4e19 000a macl %a1,%d4,>>,%fp@\(10\),%sp,%acc3 + 686c: a22e 4e29 000a macl %a1,%d4,<<,%fp@\(10\)&,%d1,%acc1 + 6872: a2ae 4e39 000a macl %a1,%d4,<<,%fp@\(10\)&,%d1,%acc3 + 6878: a66e 4e29 000a macl %a1,%d4,>>,%fp@\(10\)&,%a3,%acc1 + 687e: a6ee 4e39 000a macl %a1,%d4,>>,%fp@\(10\)&,%a3,%acc3 + 6884: a42e 4e29 000a macl %a1,%d4,,%fp@\(10\)&,%d2,%acc1 + 688a: a4ae 4e39 000a macl %a1,%d4,,%fp@\(10\)&,%d2,%acc3 + 6890: ae6e 4e29 000a macl %a1,%d4,>>,%fp@\(10\)&,%sp,%acc1 + 6896: aeee 4e39 000a macl %a1,%d4,>>,%fp@\(10\)&,%sp,%acc3 + 689c: a221 4e09 macl %a1,%d4,<<,%a1@-,%d1,%acc1 + 68a0: a2a1 4e19 macl %a1,%d4,<<,%a1@-,%d1,%acc3 + 68a4: a661 4e09 macl %a1,%d4,>>,%a1@-,%a3,%acc1 + 68a8: a6e1 4e19 macl %a1,%d4,>>,%a1@-,%a3,%acc3 + 68ac: a421 4e09 macl %a1,%d4,,%a1@-,%d2,%acc1 + 68b0: a4a1 4e19 macl %a1,%d4,,%a1@-,%d2,%acc3 + 68b4: ae61 4e09 macl %a1,%d4,>>,%a1@-,%sp,%acc1 + 68b8: aee1 4e19 macl %a1,%d4,>>,%a1@-,%sp,%acc3 + 68bc: a221 4e29 macl %a1,%d4,<<,%a1@-&,%d1,%acc1 + 68c0: a2a1 4e39 macl %a1,%d4,<<,%a1@-&,%d1,%acc3 + 68c4: a661 4e29 macl %a1,%d4,>>,%a1@-&,%a3,%acc1 + 68c8: a6e1 4e39 macl %a1,%d4,>>,%a1@-&,%a3,%acc3 + 68cc: a421 4e29 macl %a1,%d4,,%a1@-&,%d2,%acc1 + 68d0: a4a1 4e39 macl %a1,%d4,,%a1@-&,%d2,%acc3 + 68d4: ae61 4e29 macl %a1,%d4,>>,%a1@-&,%sp,%acc1 + 68d8: aee1 4e39 macl %a1,%d4,>>,%a1@-&,%sp,%acc3 + 68dc: a213 b806 macl %d6,%a3,%a3@,%d1,%acc0 + 68e0: a293 b816 macl %d6,%a3,%a3@,%d1,%acc2 + 68e4: a653 b806 macl %d6,%a3,%a3@,%a3,%acc0 + 68e8: a6d3 b816 macl %d6,%a3,%a3@,%a3,%acc2 + 68ec: a413 b806 macl %d6,%a3,%a3@,%d2,%acc0 + 68f0: a493 b816 macl %d6,%a3,%a3@,%d2,%acc2 + 68f4: ae53 b806 macl %d6,%a3,%a3@,%sp,%acc0 + 68f8: aed3 b816 macl %d6,%a3,%a3@,%sp,%acc2 + 68fc: a213 b826 macl %d6,%a3,%a3@&,%d1,%acc0 + 6900: a293 b836 macl %d6,%a3,%a3@&,%d1,%acc2 + 6904: a653 b826 macl %d6,%a3,%a3@&,%a3,%acc0 + 6908: a6d3 b836 macl %d6,%a3,%a3@&,%a3,%acc2 + 690c: a413 b826 macl %d6,%a3,%a3@&,%d2,%acc0 + 6910: a493 b836 macl %d6,%a3,%a3@&,%d2,%acc2 + 6914: ae53 b826 macl %d6,%a3,%a3@&,%sp,%acc0 + 6918: aed3 b836 macl %d6,%a3,%a3@&,%sp,%acc2 + 691c: a21a b806 macl %d6,%a3,%a2@\+,%d1,%acc0 + 6920: a29a b816 macl %d6,%a3,%a2@\+,%d1,%acc2 + 6924: a65a b806 macl %d6,%a3,%a2@\+,%a3,%acc0 + 6928: a6da b816 macl %d6,%a3,%a2@\+,%a3,%acc2 + 692c: a41a b806 macl %d6,%a3,%a2@\+,%d2,%acc0 + 6930: a49a b816 macl %d6,%a3,%a2@\+,%d2,%acc2 + 6934: ae5a b806 macl %d6,%a3,%a2@\+,%sp,%acc0 + 6938: aeda b816 macl %d6,%a3,%a2@\+,%sp,%acc2 + 693c: a21a b826 macl %d6,%a3,%a2@\+&,%d1,%acc0 + 6940: a29a b836 macl %d6,%a3,%a2@\+&,%d1,%acc2 + 6944: a65a b826 macl %d6,%a3,%a2@\+&,%a3,%acc0 + 6948: a6da b836 macl %d6,%a3,%a2@\+&,%a3,%acc2 + 694c: a41a b826 macl %d6,%a3,%a2@\+&,%d2,%acc0 + 6950: a49a b836 macl %d6,%a3,%a2@\+&,%d2,%acc2 + 6954: ae5a b826 macl %d6,%a3,%a2@\+&,%sp,%acc0 + 6958: aeda b836 macl %d6,%a3,%a2@\+&,%sp,%acc2 + 695c: a22e b806 000a macl %d6,%a3,%fp@\(10\),%d1,%acc0 + 6962: a2ae b816 000a macl %d6,%a3,%fp@\(10\),%d1,%acc2 + 6968: a66e b806 000a macl %d6,%a3,%fp@\(10\),%a3,%acc0 + 696e: a6ee b816 000a macl %d6,%a3,%fp@\(10\),%a3,%acc2 + 6974: a42e b806 000a macl %d6,%a3,%fp@\(10\),%d2,%acc0 + 697a: a4ae b816 000a macl %d6,%a3,%fp@\(10\),%d2,%acc2 + 6980: ae6e b806 000a macl %d6,%a3,%fp@\(10\),%sp,%acc0 + 6986: aeee b816 000a macl %d6,%a3,%fp@\(10\),%sp,%acc2 + 698c: a22e b826 000a macl %d6,%a3,%fp@\(10\)&,%d1,%acc0 + 6992: a2ae b836 000a macl %d6,%a3,%fp@\(10\)&,%d1,%acc2 + 6998: a66e b826 000a macl %d6,%a3,%fp@\(10\)&,%a3,%acc0 + 699e: a6ee b836 000a macl %d6,%a3,%fp@\(10\)&,%a3,%acc2 + 69a4: a42e b826 000a macl %d6,%a3,%fp@\(10\)&,%d2,%acc0 + 69aa: a4ae b836 000a macl %d6,%a3,%fp@\(10\)&,%d2,%acc2 + 69b0: ae6e b826 000a macl %d6,%a3,%fp@\(10\)&,%sp,%acc0 + 69b6: aeee b836 000a macl %d6,%a3,%fp@\(10\)&,%sp,%acc2 + 69bc: a221 b806 macl %d6,%a3,%a1@-,%d1,%acc0 + 69c0: a2a1 b816 macl %d6,%a3,%a1@-,%d1,%acc2 + 69c4: a661 b806 macl %d6,%a3,%a1@-,%a3,%acc0 + 69c8: a6e1 b816 macl %d6,%a3,%a1@-,%a3,%acc2 + 69cc: a421 b806 macl %d6,%a3,%a1@-,%d2,%acc0 + 69d0: a4a1 b816 macl %d6,%a3,%a1@-,%d2,%acc2 + 69d4: ae61 b806 macl %d6,%a3,%a1@-,%sp,%acc0 + 69d8: aee1 b816 macl %d6,%a3,%a1@-,%sp,%acc2 + 69dc: a221 b826 macl %d6,%a3,%a1@-&,%d1,%acc0 + 69e0: a2a1 b836 macl %d6,%a3,%a1@-&,%d1,%acc2 + 69e4: a661 b826 macl %d6,%a3,%a1@-&,%a3,%acc0 + 69e8: a6e1 b836 macl %d6,%a3,%a1@-&,%a3,%acc2 + 69ec: a421 b826 macl %d6,%a3,%a1@-&,%d2,%acc0 + 69f0: a4a1 b836 macl %d6,%a3,%a1@-&,%d2,%acc2 + 69f4: ae61 b826 macl %d6,%a3,%a1@-&,%sp,%acc0 + 69f8: aee1 b836 macl %d6,%a3,%a1@-&,%sp,%acc2 + 69fc: a213 ba06 macl %d6,%a3,<<,%a3@,%d1,%acc0 + 6a00: a293 ba16 macl %d6,%a3,<<,%a3@,%d1,%acc2 + 6a04: a653 ba06 macl %d6,%a3,>>,%a3@,%a3,%acc0 + 6a08: a6d3 ba16 macl %d6,%a3,>>,%a3@,%a3,%acc2 + 6a0c: a413 ba06 macl %d6,%a3,,%a3@,%d2,%acc0 + 6a10: a493 ba16 macl %d6,%a3,,%a3@,%d2,%acc2 + 6a14: ae53 ba06 macl %d6,%a3,>>,%a3@,%sp,%acc0 + 6a18: aed3 ba16 macl %d6,%a3,>>,%a3@,%sp,%acc2 + 6a1c: a213 ba26 macl %d6,%a3,<<,%a3@&,%d1,%acc0 + 6a20: a293 ba36 macl %d6,%a3,<<,%a3@&,%d1,%acc2 + 6a24: a653 ba26 macl %d6,%a3,>>,%a3@&,%a3,%acc0 + 6a28: a6d3 ba36 macl %d6,%a3,>>,%a3@&,%a3,%acc2 + 6a2c: a413 ba26 macl %d6,%a3,,%a3@&,%d2,%acc0 + 6a30: a493 ba36 macl %d6,%a3,,%a3@&,%d2,%acc2 + 6a34: ae53 ba26 macl %d6,%a3,>>,%a3@&,%sp,%acc0 + 6a38: aed3 ba36 macl %d6,%a3,>>,%a3@&,%sp,%acc2 + 6a3c: a21a ba06 macl %d6,%a3,<<,%a2@\+,%d1,%acc0 + 6a40: a29a ba16 macl %d6,%a3,<<,%a2@\+,%d1,%acc2 + 6a44: a65a ba06 macl %d6,%a3,>>,%a2@\+,%a3,%acc0 + 6a48: a6da ba16 macl %d6,%a3,>>,%a2@\+,%a3,%acc2 + 6a4c: a41a ba06 macl %d6,%a3,,%a2@\+,%d2,%acc0 + 6a50: a49a ba16 macl %d6,%a3,,%a2@\+,%d2,%acc2 + 6a54: ae5a ba06 macl %d6,%a3,>>,%a2@\+,%sp,%acc0 + 6a58: aeda ba16 macl %d6,%a3,>>,%a2@\+,%sp,%acc2 + 6a5c: a21a ba26 macl %d6,%a3,<<,%a2@\+&,%d1,%acc0 + 6a60: a29a ba36 macl %d6,%a3,<<,%a2@\+&,%d1,%acc2 + 6a64: a65a ba26 macl %d6,%a3,>>,%a2@\+&,%a3,%acc0 + 6a68: a6da ba36 macl %d6,%a3,>>,%a2@\+&,%a3,%acc2 + 6a6c: a41a ba26 macl %d6,%a3,,%a2@\+&,%d2,%acc0 + 6a70: a49a ba36 macl %d6,%a3,,%a2@\+&,%d2,%acc2 + 6a74: ae5a ba26 macl %d6,%a3,>>,%a2@\+&,%sp,%acc0 + 6a78: aeda ba36 macl %d6,%a3,>>,%a2@\+&,%sp,%acc2 + 6a7c: a22e ba06 000a macl %d6,%a3,<<,%fp@\(10\),%d1,%acc0 + 6a82: a2ae ba16 000a macl %d6,%a3,<<,%fp@\(10\),%d1,%acc2 + 6a88: a66e ba06 000a macl %d6,%a3,>>,%fp@\(10\),%a3,%acc0 + 6a8e: a6ee ba16 000a macl %d6,%a3,>>,%fp@\(10\),%a3,%acc2 + 6a94: a42e ba06 000a macl %d6,%a3,,%fp@\(10\),%d2,%acc0 + 6a9a: a4ae ba16 000a macl %d6,%a3,,%fp@\(10\),%d2,%acc2 + 6aa0: ae6e ba06 000a macl %d6,%a3,>>,%fp@\(10\),%sp,%acc0 + 6aa6: aeee ba16 000a macl %d6,%a3,>>,%fp@\(10\),%sp,%acc2 + 6aac: a22e ba26 000a macl %d6,%a3,<<,%fp@\(10\)&,%d1,%acc0 + 6ab2: a2ae ba36 000a macl %d6,%a3,<<,%fp@\(10\)&,%d1,%acc2 + 6ab8: a66e ba26 000a macl %d6,%a3,>>,%fp@\(10\)&,%a3,%acc0 + 6abe: a6ee ba36 000a macl %d6,%a3,>>,%fp@\(10\)&,%a3,%acc2 + 6ac4: a42e ba26 000a macl %d6,%a3,,%fp@\(10\)&,%d2,%acc0 + 6aca: a4ae ba36 000a macl %d6,%a3,,%fp@\(10\)&,%d2,%acc2 + 6ad0: ae6e ba26 000a macl %d6,%a3,>>,%fp@\(10\)&,%sp,%acc0 + 6ad6: aeee ba36 000a macl %d6,%a3,>>,%fp@\(10\)&,%sp,%acc2 + 6adc: a221 ba06 macl %d6,%a3,<<,%a1@-,%d1,%acc0 + 6ae0: a2a1 ba16 macl %d6,%a3,<<,%a1@-,%d1,%acc2 + 6ae4: a661 ba06 macl %d6,%a3,>>,%a1@-,%a3,%acc0 + 6ae8: a6e1 ba16 macl %d6,%a3,>>,%a1@-,%a3,%acc2 + 6aec: a421 ba06 macl %d6,%a3,,%a1@-,%d2,%acc0 + 6af0: a4a1 ba16 macl %d6,%a3,,%a1@-,%d2,%acc2 + 6af4: ae61 ba06 macl %d6,%a3,>>,%a1@-,%sp,%acc0 + 6af8: aee1 ba16 macl %d6,%a3,>>,%a1@-,%sp,%acc2 + 6afc: a221 ba26 macl %d6,%a3,<<,%a1@-&,%d1,%acc0 + 6b00: a2a1 ba36 macl %d6,%a3,<<,%a1@-&,%d1,%acc2 + 6b04: a661 ba26 macl %d6,%a3,>>,%a1@-&,%a3,%acc0 + 6b08: a6e1 ba36 macl %d6,%a3,>>,%a1@-&,%a3,%acc2 + 6b0c: a421 ba26 macl %d6,%a3,,%a1@-&,%d2,%acc0 + 6b10: a4a1 ba36 macl %d6,%a3,,%a1@-&,%d2,%acc2 + 6b14: ae61 ba26 macl %d6,%a3,>>,%a1@-&,%sp,%acc0 + 6b18: aee1 ba36 macl %d6,%a3,>>,%a1@-&,%sp,%acc2 + 6b1c: a213 be06 macl %d6,%a3,<<,%a3@,%d1,%acc0 + 6b20: a293 be16 macl %d6,%a3,<<,%a3@,%d1,%acc2 + 6b24: a653 be06 macl %d6,%a3,>>,%a3@,%a3,%acc0 + 6b28: a6d3 be16 macl %d6,%a3,>>,%a3@,%a3,%acc2 + 6b2c: a413 be06 macl %d6,%a3,,%a3@,%d2,%acc0 + 6b30: a493 be16 macl %d6,%a3,,%a3@,%d2,%acc2 + 6b34: ae53 be06 macl %d6,%a3,>>,%a3@,%sp,%acc0 + 6b38: aed3 be16 macl %d6,%a3,>>,%a3@,%sp,%acc2 + 6b3c: a213 be26 macl %d6,%a3,<<,%a3@&,%d1,%acc0 + 6b40: a293 be36 macl %d6,%a3,<<,%a3@&,%d1,%acc2 + 6b44: a653 be26 macl %d6,%a3,>>,%a3@&,%a3,%acc0 + 6b48: a6d3 be36 macl %d6,%a3,>>,%a3@&,%a3,%acc2 + 6b4c: a413 be26 macl %d6,%a3,,%a3@&,%d2,%acc0 + 6b50: a493 be36 macl %d6,%a3,,%a3@&,%d2,%acc2 + 6b54: ae53 be26 macl %d6,%a3,>>,%a3@&,%sp,%acc0 + 6b58: aed3 be36 macl %d6,%a3,>>,%a3@&,%sp,%acc2 + 6b5c: a21a be06 macl %d6,%a3,<<,%a2@\+,%d1,%acc0 + 6b60: a29a be16 macl %d6,%a3,<<,%a2@\+,%d1,%acc2 + 6b64: a65a be06 macl %d6,%a3,>>,%a2@\+,%a3,%acc0 + 6b68: a6da be16 macl %d6,%a3,>>,%a2@\+,%a3,%acc2 + 6b6c: a41a be06 macl %d6,%a3,,%a2@\+,%d2,%acc0 + 6b70: a49a be16 macl %d6,%a3,,%a2@\+,%d2,%acc2 + 6b74: ae5a be06 macl %d6,%a3,>>,%a2@\+,%sp,%acc0 + 6b78: aeda be16 macl %d6,%a3,>>,%a2@\+,%sp,%acc2 + 6b7c: a21a be26 macl %d6,%a3,<<,%a2@\+&,%d1,%acc0 + 6b80: a29a be36 macl %d6,%a3,<<,%a2@\+&,%d1,%acc2 + 6b84: a65a be26 macl %d6,%a3,>>,%a2@\+&,%a3,%acc0 + 6b88: a6da be36 macl %d6,%a3,>>,%a2@\+&,%a3,%acc2 + 6b8c: a41a be26 macl %d6,%a3,,%a2@\+&,%d2,%acc0 + 6b90: a49a be36 macl %d6,%a3,,%a2@\+&,%d2,%acc2 + 6b94: ae5a be26 macl %d6,%a3,>>,%a2@\+&,%sp,%acc0 + 6b98: aeda be36 macl %d6,%a3,>>,%a2@\+&,%sp,%acc2 + 6b9c: a22e be06 000a macl %d6,%a3,<<,%fp@\(10\),%d1,%acc0 + 6ba2: a2ae be16 000a macl %d6,%a3,<<,%fp@\(10\),%d1,%acc2 + 6ba8: a66e be06 000a macl %d6,%a3,>>,%fp@\(10\),%a3,%acc0 + 6bae: a6ee be16 000a macl %d6,%a3,>>,%fp@\(10\),%a3,%acc2 + 6bb4: a42e be06 000a macl %d6,%a3,,%fp@\(10\),%d2,%acc0 + 6bba: a4ae be16 000a macl %d6,%a3,,%fp@\(10\),%d2,%acc2 + 6bc0: ae6e be06 000a macl %d6,%a3,>>,%fp@\(10\),%sp,%acc0 + 6bc6: aeee be16 000a macl %d6,%a3,>>,%fp@\(10\),%sp,%acc2 + 6bcc: a22e be26 000a macl %d6,%a3,<<,%fp@\(10\)&,%d1,%acc0 + 6bd2: a2ae be36 000a macl %d6,%a3,<<,%fp@\(10\)&,%d1,%acc2 + 6bd8: a66e be26 000a macl %d6,%a3,>>,%fp@\(10\)&,%a3,%acc0 + 6bde: a6ee be36 000a macl %d6,%a3,>>,%fp@\(10\)&,%a3,%acc2 + 6be4: a42e be26 000a macl %d6,%a3,,%fp@\(10\)&,%d2,%acc0 + 6bea: a4ae be36 000a macl %d6,%a3,,%fp@\(10\)&,%d2,%acc2 + 6bf0: ae6e be26 000a macl %d6,%a3,>>,%fp@\(10\)&,%sp,%acc0 + 6bf6: aeee be36 000a macl %d6,%a3,>>,%fp@\(10\)&,%sp,%acc2 + 6bfc: a221 be06 macl %d6,%a3,<<,%a1@-,%d1,%acc0 + 6c00: a2a1 be16 macl %d6,%a3,<<,%a1@-,%d1,%acc2 + 6c04: a661 be06 macl %d6,%a3,>>,%a1@-,%a3,%acc0 + 6c08: a6e1 be16 macl %d6,%a3,>>,%a1@-,%a3,%acc2 + 6c0c: a421 be06 macl %d6,%a3,,%a1@-,%d2,%acc0 + 6c10: a4a1 be16 macl %d6,%a3,,%a1@-,%d2,%acc2 + 6c14: ae61 be06 macl %d6,%a3,>>,%a1@-,%sp,%acc0 + 6c18: aee1 be16 macl %d6,%a3,>>,%a1@-,%sp,%acc2 + 6c1c: a221 be26 macl %d6,%a3,<<,%a1@-&,%d1,%acc0 + 6c20: a2a1 be36 macl %d6,%a3,<<,%a1@-&,%d1,%acc2 + 6c24: a661 be26 macl %d6,%a3,>>,%a1@-&,%a3,%acc0 + 6c28: a6e1 be36 macl %d6,%a3,>>,%a1@-&,%a3,%acc2 + 6c2c: a421 be26 macl %d6,%a3,,%a1@-&,%d2,%acc0 + 6c30: a4a1 be36 macl %d6,%a3,,%a1@-&,%d2,%acc2 + 6c34: ae61 be26 macl %d6,%a3,>>,%a1@-&,%sp,%acc0 + 6c38: aee1 be36 macl %d6,%a3,>>,%a1@-&,%sp,%acc2 + 6c3c: a213 ba06 macl %d6,%a3,<<,%a3@,%d1,%acc0 + 6c40: a293 ba16 macl %d6,%a3,<<,%a3@,%d1,%acc2 + 6c44: a653 ba06 macl %d6,%a3,>>,%a3@,%a3,%acc0 + 6c48: a6d3 ba16 macl %d6,%a3,>>,%a3@,%a3,%acc2 + 6c4c: a413 ba06 macl %d6,%a3,,%a3@,%d2,%acc0 + 6c50: a493 ba16 macl %d6,%a3,,%a3@,%d2,%acc2 + 6c54: ae53 ba06 macl %d6,%a3,>>,%a3@,%sp,%acc0 + 6c58: aed3 ba16 macl %d6,%a3,>>,%a3@,%sp,%acc2 + 6c5c: a213 ba26 macl %d6,%a3,<<,%a3@&,%d1,%acc0 + 6c60: a293 ba36 macl %d6,%a3,<<,%a3@&,%d1,%acc2 + 6c64: a653 ba26 macl %d6,%a3,>>,%a3@&,%a3,%acc0 + 6c68: a6d3 ba36 macl %d6,%a3,>>,%a3@&,%a3,%acc2 + 6c6c: a413 ba26 macl %d6,%a3,,%a3@&,%d2,%acc0 + 6c70: a493 ba36 macl %d6,%a3,,%a3@&,%d2,%acc2 + 6c74: ae53 ba26 macl %d6,%a3,>>,%a3@&,%sp,%acc0 + 6c78: aed3 ba36 macl %d6,%a3,>>,%a3@&,%sp,%acc2 + 6c7c: a21a ba06 macl %d6,%a3,<<,%a2@\+,%d1,%acc0 + 6c80: a29a ba16 macl %d6,%a3,<<,%a2@\+,%d1,%acc2 + 6c84: a65a ba06 macl %d6,%a3,>>,%a2@\+,%a3,%acc0 + 6c88: a6da ba16 macl %d6,%a3,>>,%a2@\+,%a3,%acc2 + 6c8c: a41a ba06 macl %d6,%a3,,%a2@\+,%d2,%acc0 + 6c90: a49a ba16 macl %d6,%a3,,%a2@\+,%d2,%acc2 + 6c94: ae5a ba06 macl %d6,%a3,>>,%a2@\+,%sp,%acc0 + 6c98: aeda ba16 macl %d6,%a3,>>,%a2@\+,%sp,%acc2 + 6c9c: a21a ba26 macl %d6,%a3,<<,%a2@\+&,%d1,%acc0 + 6ca0: a29a ba36 macl %d6,%a3,<<,%a2@\+&,%d1,%acc2 + 6ca4: a65a ba26 macl %d6,%a3,>>,%a2@\+&,%a3,%acc0 + 6ca8: a6da ba36 macl %d6,%a3,>>,%a2@\+&,%a3,%acc2 + 6cac: a41a ba26 macl %d6,%a3,,%a2@\+&,%d2,%acc0 + 6cb0: a49a ba36 macl %d6,%a3,,%a2@\+&,%d2,%acc2 + 6cb4: ae5a ba26 macl %d6,%a3,>>,%a2@\+&,%sp,%acc0 + 6cb8: aeda ba36 macl %d6,%a3,>>,%a2@\+&,%sp,%acc2 + 6cbc: a22e ba06 000a macl %d6,%a3,<<,%fp@\(10\),%d1,%acc0 + 6cc2: a2ae ba16 000a macl %d6,%a3,<<,%fp@\(10\),%d1,%acc2 + 6cc8: a66e ba06 000a macl %d6,%a3,>>,%fp@\(10\),%a3,%acc0 + 6cce: a6ee ba16 000a macl %d6,%a3,>>,%fp@\(10\),%a3,%acc2 + 6cd4: a42e ba06 000a macl %d6,%a3,,%fp@\(10\),%d2,%acc0 + 6cda: a4ae ba16 000a macl %d6,%a3,,%fp@\(10\),%d2,%acc2 + 6ce0: ae6e ba06 000a macl %d6,%a3,>>,%fp@\(10\),%sp,%acc0 + 6ce6: aeee ba16 000a macl %d6,%a3,>>,%fp@\(10\),%sp,%acc2 + 6cec: a22e ba26 000a macl %d6,%a3,<<,%fp@\(10\)&,%d1,%acc0 + 6cf2: a2ae ba36 000a macl %d6,%a3,<<,%fp@\(10\)&,%d1,%acc2 + 6cf8: a66e ba26 000a macl %d6,%a3,>>,%fp@\(10\)&,%a3,%acc0 + 6cfe: a6ee ba36 000a macl %d6,%a3,>>,%fp@\(10\)&,%a3,%acc2 + 6d04: a42e ba26 000a macl %d6,%a3,,%fp@\(10\)&,%d2,%acc0 + 6d0a: a4ae ba36 000a macl %d6,%a3,,%fp@\(10\)&,%d2,%acc2 + 6d10: ae6e ba26 000a macl %d6,%a3,>>,%fp@\(10\)&,%sp,%acc0 + 6d16: aeee ba36 000a macl %d6,%a3,>>,%fp@\(10\)&,%sp,%acc2 + 6d1c: a221 ba06 macl %d6,%a3,<<,%a1@-,%d1,%acc0 + 6d20: a2a1 ba16 macl %d6,%a3,<<,%a1@-,%d1,%acc2 + 6d24: a661 ba06 macl %d6,%a3,>>,%a1@-,%a3,%acc0 + 6d28: a6e1 ba16 macl %d6,%a3,>>,%a1@-,%a3,%acc2 + 6d2c: a421 ba06 macl %d6,%a3,,%a1@-,%d2,%acc0 + 6d30: a4a1 ba16 macl %d6,%a3,,%a1@-,%d2,%acc2 + 6d34: ae61 ba06 macl %d6,%a3,>>,%a1@-,%sp,%acc0 + 6d38: aee1 ba16 macl %d6,%a3,>>,%a1@-,%sp,%acc2 + 6d3c: a221 ba26 macl %d6,%a3,<<,%a1@-&,%d1,%acc0 + 6d40: a2a1 ba36 macl %d6,%a3,<<,%a1@-&,%d1,%acc2 + 6d44: a661 ba26 macl %d6,%a3,>>,%a1@-&,%a3,%acc0 + 6d48: a6e1 ba36 macl %d6,%a3,>>,%a1@-&,%a3,%acc2 + 6d4c: a421 ba26 macl %d6,%a3,,%a1@-&,%d2,%acc0 + 6d50: a4a1 ba36 macl %d6,%a3,,%a1@-&,%d2,%acc2 + 6d54: ae61 ba26 macl %d6,%a3,>>,%a1@-&,%sp,%acc0 + 6d58: aee1 ba36 macl %d6,%a3,>>,%a1@-&,%sp,%acc2 + 6d5c: a213 be06 macl %d6,%a3,<<,%a3@,%d1,%acc0 + 6d60: a293 be16 macl %d6,%a3,<<,%a3@,%d1,%acc2 + 6d64: a653 be06 macl %d6,%a3,>>,%a3@,%a3,%acc0 + 6d68: a6d3 be16 macl %d6,%a3,>>,%a3@,%a3,%acc2 + 6d6c: a413 be06 macl %d6,%a3,,%a3@,%d2,%acc0 + 6d70: a493 be16 macl %d6,%a3,,%a3@,%d2,%acc2 + 6d74: ae53 be06 macl %d6,%a3,>>,%a3@,%sp,%acc0 + 6d78: aed3 be16 macl %d6,%a3,>>,%a3@,%sp,%acc2 + 6d7c: a213 be26 macl %d6,%a3,<<,%a3@&,%d1,%acc0 + 6d80: a293 be36 macl %d6,%a3,<<,%a3@&,%d1,%acc2 + 6d84: a653 be26 macl %d6,%a3,>>,%a3@&,%a3,%acc0 + 6d88: a6d3 be36 macl %d6,%a3,>>,%a3@&,%a3,%acc2 + 6d8c: a413 be26 macl %d6,%a3,,%a3@&,%d2,%acc0 + 6d90: a493 be36 macl %d6,%a3,,%a3@&,%d2,%acc2 + 6d94: ae53 be26 macl %d6,%a3,>>,%a3@&,%sp,%acc0 + 6d98: aed3 be36 macl %d6,%a3,>>,%a3@&,%sp,%acc2 + 6d9c: a21a be06 macl %d6,%a3,<<,%a2@\+,%d1,%acc0 + 6da0: a29a be16 macl %d6,%a3,<<,%a2@\+,%d1,%acc2 + 6da4: a65a be06 macl %d6,%a3,>>,%a2@\+,%a3,%acc0 + 6da8: a6da be16 macl %d6,%a3,>>,%a2@\+,%a3,%acc2 + 6dac: a41a be06 macl %d6,%a3,,%a2@\+,%d2,%acc0 + 6db0: a49a be16 macl %d6,%a3,,%a2@\+,%d2,%acc2 + 6db4: ae5a be06 macl %d6,%a3,>>,%a2@\+,%sp,%acc0 + 6db8: aeda be16 macl %d6,%a3,>>,%a2@\+,%sp,%acc2 + 6dbc: a21a be26 macl %d6,%a3,<<,%a2@\+&,%d1,%acc0 + 6dc0: a29a be36 macl %d6,%a3,<<,%a2@\+&,%d1,%acc2 + 6dc4: a65a be26 macl %d6,%a3,>>,%a2@\+&,%a3,%acc0 + 6dc8: a6da be36 macl %d6,%a3,>>,%a2@\+&,%a3,%acc2 + 6dcc: a41a be26 macl %d6,%a3,,%a2@\+&,%d2,%acc0 + 6dd0: a49a be36 macl %d6,%a3,,%a2@\+&,%d2,%acc2 + 6dd4: ae5a be26 macl %d6,%a3,>>,%a2@\+&,%sp,%acc0 + 6dd8: aeda be36 macl %d6,%a3,>>,%a2@\+&,%sp,%acc2 + 6ddc: a22e be06 000a macl %d6,%a3,<<,%fp@\(10\),%d1,%acc0 + 6de2: a2ae be16 000a macl %d6,%a3,<<,%fp@\(10\),%d1,%acc2 + 6de8: a66e be06 000a macl %d6,%a3,>>,%fp@\(10\),%a3,%acc0 + 6dee: a6ee be16 000a macl %d6,%a3,>>,%fp@\(10\),%a3,%acc2 + 6df4: a42e be06 000a macl %d6,%a3,,%fp@\(10\),%d2,%acc0 + 6dfa: a4ae be16 000a macl %d6,%a3,,%fp@\(10\),%d2,%acc2 + 6e00: ae6e be06 000a macl %d6,%a3,>>,%fp@\(10\),%sp,%acc0 + 6e06: aeee be16 000a macl %d6,%a3,>>,%fp@\(10\),%sp,%acc2 + 6e0c: a22e be26 000a macl %d6,%a3,<<,%fp@\(10\)&,%d1,%acc0 + 6e12: a2ae be36 000a macl %d6,%a3,<<,%fp@\(10\)&,%d1,%acc2 + 6e18: a66e be26 000a macl %d6,%a3,>>,%fp@\(10\)&,%a3,%acc0 + 6e1e: a6ee be36 000a macl %d6,%a3,>>,%fp@\(10\)&,%a3,%acc2 + 6e24: a42e be26 000a macl %d6,%a3,,%fp@\(10\)&,%d2,%acc0 + 6e2a: a4ae be36 000a macl %d6,%a3,,%fp@\(10\)&,%d2,%acc2 + 6e30: ae6e be26 000a macl %d6,%a3,>>,%fp@\(10\)&,%sp,%acc0 + 6e36: aeee be36 000a macl %d6,%a3,>>,%fp@\(10\)&,%sp,%acc2 + 6e3c: a221 be06 macl %d6,%a3,<<,%a1@-,%d1,%acc0 + 6e40: a2a1 be16 macl %d6,%a3,<<,%a1@-,%d1,%acc2 + 6e44: a661 be06 macl %d6,%a3,>>,%a1@-,%a3,%acc0 + 6e48: a6e1 be16 macl %d6,%a3,>>,%a1@-,%a3,%acc2 + 6e4c: a421 be06 macl %d6,%a3,,%a1@-,%d2,%acc0 + 6e50: a4a1 be16 macl %d6,%a3,,%a1@-,%d2,%acc2 + 6e54: ae61 be06 macl %d6,%a3,>>,%a1@-,%sp,%acc0 + 6e58: aee1 be16 macl %d6,%a3,>>,%a1@-,%sp,%acc2 + 6e5c: a221 be26 macl %d6,%a3,<<,%a1@-&,%d1,%acc0 + 6e60: a2a1 be36 macl %d6,%a3,<<,%a1@-&,%d1,%acc2 + 6e64: a661 be26 macl %d6,%a3,>>,%a1@-&,%a3,%acc0 + 6e68: a6e1 be36 macl %d6,%a3,>>,%a1@-&,%a3,%acc2 + 6e6c: a421 be26 macl %d6,%a3,,%a1@-&,%d2,%acc0 + 6e70: a4a1 be36 macl %d6,%a3,,%a1@-&,%d2,%acc2 + 6e74: ae61 be26 macl %d6,%a3,>>,%a1@-&,%sp,%acc0 + 6e78: aee1 be36 macl %d6,%a3,>>,%a1@-&,%sp,%acc2 + 6e7c: a213 4806 macl %d6,%d4,%a3@,%d1,%acc1 + 6e80: a293 4816 macl %d6,%d4,%a3@,%d1,%acc3 + 6e84: a653 4806 macl %d6,%d4,%a3@,%a3,%acc1 + 6e88: a6d3 4816 macl %d6,%d4,%a3@,%a3,%acc3 + 6e8c: a413 4806 macl %d6,%d4,%a3@,%d2,%acc1 + 6e90: a493 4816 macl %d6,%d4,%a3@,%d2,%acc3 + 6e94: ae53 4806 macl %d6,%d4,%a3@,%sp,%acc1 + 6e98: aed3 4816 macl %d6,%d4,%a3@,%sp,%acc3 + 6e9c: a213 4826 macl %d6,%d4,%a3@&,%d1,%acc1 + 6ea0: a293 4836 macl %d6,%d4,%a3@&,%d1,%acc3 + 6ea4: a653 4826 macl %d6,%d4,%a3@&,%a3,%acc1 + 6ea8: a6d3 4836 macl %d6,%d4,%a3@&,%a3,%acc3 + 6eac: a413 4826 macl %d6,%d4,%a3@&,%d2,%acc1 + 6eb0: a493 4836 macl %d6,%d4,%a3@&,%d2,%acc3 + 6eb4: ae53 4826 macl %d6,%d4,%a3@&,%sp,%acc1 + 6eb8: aed3 4836 macl %d6,%d4,%a3@&,%sp,%acc3 + 6ebc: a21a 4806 macl %d6,%d4,%a2@\+,%d1,%acc1 + 6ec0: a29a 4816 macl %d6,%d4,%a2@\+,%d1,%acc3 + 6ec4: a65a 4806 macl %d6,%d4,%a2@\+,%a3,%acc1 + 6ec8: a6da 4816 macl %d6,%d4,%a2@\+,%a3,%acc3 + 6ecc: a41a 4806 macl %d6,%d4,%a2@\+,%d2,%acc1 + 6ed0: a49a 4816 macl %d6,%d4,%a2@\+,%d2,%acc3 + 6ed4: ae5a 4806 macl %d6,%d4,%a2@\+,%sp,%acc1 + 6ed8: aeda 4816 macl %d6,%d4,%a2@\+,%sp,%acc3 + 6edc: a21a 4826 macl %d6,%d4,%a2@\+&,%d1,%acc1 + 6ee0: a29a 4836 macl %d6,%d4,%a2@\+&,%d1,%acc3 + 6ee4: a65a 4826 macl %d6,%d4,%a2@\+&,%a3,%acc1 + 6ee8: a6da 4836 macl %d6,%d4,%a2@\+&,%a3,%acc3 + 6eec: a41a 4826 macl %d6,%d4,%a2@\+&,%d2,%acc1 + 6ef0: a49a 4836 macl %d6,%d4,%a2@\+&,%d2,%acc3 + 6ef4: ae5a 4826 macl %d6,%d4,%a2@\+&,%sp,%acc1 + 6ef8: aeda 4836 macl %d6,%d4,%a2@\+&,%sp,%acc3 + 6efc: a22e 4806 000a macl %d6,%d4,%fp@\(10\),%d1,%acc1 + 6f02: a2ae 4816 000a macl %d6,%d4,%fp@\(10\),%d1,%acc3 + 6f08: a66e 4806 000a macl %d6,%d4,%fp@\(10\),%a3,%acc1 + 6f0e: a6ee 4816 000a macl %d6,%d4,%fp@\(10\),%a3,%acc3 + 6f14: a42e 4806 000a macl %d6,%d4,%fp@\(10\),%d2,%acc1 + 6f1a: a4ae 4816 000a macl %d6,%d4,%fp@\(10\),%d2,%acc3 + 6f20: ae6e 4806 000a macl %d6,%d4,%fp@\(10\),%sp,%acc1 + 6f26: aeee 4816 000a macl %d6,%d4,%fp@\(10\),%sp,%acc3 + 6f2c: a22e 4826 000a macl %d6,%d4,%fp@\(10\)&,%d1,%acc1 + 6f32: a2ae 4836 000a macl %d6,%d4,%fp@\(10\)&,%d1,%acc3 + 6f38: a66e 4826 000a macl %d6,%d4,%fp@\(10\)&,%a3,%acc1 + 6f3e: a6ee 4836 000a macl %d6,%d4,%fp@\(10\)&,%a3,%acc3 + 6f44: a42e 4826 000a macl %d6,%d4,%fp@\(10\)&,%d2,%acc1 + 6f4a: a4ae 4836 000a macl %d6,%d4,%fp@\(10\)&,%d2,%acc3 + 6f50: ae6e 4826 000a macl %d6,%d4,%fp@\(10\)&,%sp,%acc1 + 6f56: aeee 4836 000a macl %d6,%d4,%fp@\(10\)&,%sp,%acc3 + 6f5c: a221 4806 macl %d6,%d4,%a1@-,%d1,%acc1 + 6f60: a2a1 4816 macl %d6,%d4,%a1@-,%d1,%acc3 + 6f64: a661 4806 macl %d6,%d4,%a1@-,%a3,%acc1 + 6f68: a6e1 4816 macl %d6,%d4,%a1@-,%a3,%acc3 + 6f6c: a421 4806 macl %d6,%d4,%a1@-,%d2,%acc1 + 6f70: a4a1 4816 macl %d6,%d4,%a1@-,%d2,%acc3 + 6f74: ae61 4806 macl %d6,%d4,%a1@-,%sp,%acc1 + 6f78: aee1 4816 macl %d6,%d4,%a1@-,%sp,%acc3 + 6f7c: a221 4826 macl %d6,%d4,%a1@-&,%d1,%acc1 + 6f80: a2a1 4836 macl %d6,%d4,%a1@-&,%d1,%acc3 + 6f84: a661 4826 macl %d6,%d4,%a1@-&,%a3,%acc1 + 6f88: a6e1 4836 macl %d6,%d4,%a1@-&,%a3,%acc3 + 6f8c: a421 4826 macl %d6,%d4,%a1@-&,%d2,%acc1 + 6f90: a4a1 4836 macl %d6,%d4,%a1@-&,%d2,%acc3 + 6f94: ae61 4826 macl %d6,%d4,%a1@-&,%sp,%acc1 + 6f98: aee1 4836 macl %d6,%d4,%a1@-&,%sp,%acc3 + 6f9c: a213 4a06 macl %d6,%d4,<<,%a3@,%d1,%acc1 + 6fa0: a293 4a16 macl %d6,%d4,<<,%a3@,%d1,%acc3 + 6fa4: a653 4a06 macl %d6,%d4,>>,%a3@,%a3,%acc1 + 6fa8: a6d3 4a16 macl %d6,%d4,>>,%a3@,%a3,%acc3 + 6fac: a413 4a06 macl %d6,%d4,,%a3@,%d2,%acc1 + 6fb0: a493 4a16 macl %d6,%d4,,%a3@,%d2,%acc3 + 6fb4: ae53 4a06 macl %d6,%d4,>>,%a3@,%sp,%acc1 + 6fb8: aed3 4a16 macl %d6,%d4,>>,%a3@,%sp,%acc3 + 6fbc: a213 4a26 macl %d6,%d4,<<,%a3@&,%d1,%acc1 + 6fc0: a293 4a36 macl %d6,%d4,<<,%a3@&,%d1,%acc3 + 6fc4: a653 4a26 macl %d6,%d4,>>,%a3@&,%a3,%acc1 + 6fc8: a6d3 4a36 macl %d6,%d4,>>,%a3@&,%a3,%acc3 + 6fcc: a413 4a26 macl %d6,%d4,,%a3@&,%d2,%acc1 + 6fd0: a493 4a36 macl %d6,%d4,,%a3@&,%d2,%acc3 + 6fd4: ae53 4a26 macl %d6,%d4,>>,%a3@&,%sp,%acc1 + 6fd8: aed3 4a36 macl %d6,%d4,>>,%a3@&,%sp,%acc3 + 6fdc: a21a 4a06 macl %d6,%d4,<<,%a2@\+,%d1,%acc1 + 6fe0: a29a 4a16 macl %d6,%d4,<<,%a2@\+,%d1,%acc3 + 6fe4: a65a 4a06 macl %d6,%d4,>>,%a2@\+,%a3,%acc1 + 6fe8: a6da 4a16 macl %d6,%d4,>>,%a2@\+,%a3,%acc3 + 6fec: a41a 4a06 macl %d6,%d4,,%a2@\+,%d2,%acc1 + 6ff0: a49a 4a16 macl %d6,%d4,,%a2@\+,%d2,%acc3 + 6ff4: ae5a 4a06 macl %d6,%d4,>>,%a2@\+,%sp,%acc1 + 6ff8: aeda 4a16 macl %d6,%d4,>>,%a2@\+,%sp,%acc3 + 6ffc: a21a 4a26 macl %d6,%d4,<<,%a2@\+&,%d1,%acc1 + 7000: a29a 4a36 macl %d6,%d4,<<,%a2@\+&,%d1,%acc3 + 7004: a65a 4a26 macl %d6,%d4,>>,%a2@\+&,%a3,%acc1 + 7008: a6da 4a36 macl %d6,%d4,>>,%a2@\+&,%a3,%acc3 + 700c: a41a 4a26 macl %d6,%d4,,%a2@\+&,%d2,%acc1 + 7010: a49a 4a36 macl %d6,%d4,,%a2@\+&,%d2,%acc3 + 7014: ae5a 4a26 macl %d6,%d4,>>,%a2@\+&,%sp,%acc1 + 7018: aeda 4a36 macl %d6,%d4,>>,%a2@\+&,%sp,%acc3 + 701c: a22e 4a06 000a macl %d6,%d4,<<,%fp@\(10\),%d1,%acc1 + 7022: a2ae 4a16 000a macl %d6,%d4,<<,%fp@\(10\),%d1,%acc3 + 7028: a66e 4a06 000a macl %d6,%d4,>>,%fp@\(10\),%a3,%acc1 + 702e: a6ee 4a16 000a macl %d6,%d4,>>,%fp@\(10\),%a3,%acc3 + 7034: a42e 4a06 000a macl %d6,%d4,,%fp@\(10\),%d2,%acc1 + 703a: a4ae 4a16 000a macl %d6,%d4,,%fp@\(10\),%d2,%acc3 + 7040: ae6e 4a06 000a macl %d6,%d4,>>,%fp@\(10\),%sp,%acc1 + 7046: aeee 4a16 000a macl %d6,%d4,>>,%fp@\(10\),%sp,%acc3 + 704c: a22e 4a26 000a macl %d6,%d4,<<,%fp@\(10\)&,%d1,%acc1 + 7052: a2ae 4a36 000a macl %d6,%d4,<<,%fp@\(10\)&,%d1,%acc3 + 7058: a66e 4a26 000a macl %d6,%d4,>>,%fp@\(10\)&,%a3,%acc1 + 705e: a6ee 4a36 000a macl %d6,%d4,>>,%fp@\(10\)&,%a3,%acc3 + 7064: a42e 4a26 000a macl %d6,%d4,,%fp@\(10\)&,%d2,%acc1 + 706a: a4ae 4a36 000a macl %d6,%d4,,%fp@\(10\)&,%d2,%acc3 + 7070: ae6e 4a26 000a macl %d6,%d4,>>,%fp@\(10\)&,%sp,%acc1 + 7076: aeee 4a36 000a macl %d6,%d4,>>,%fp@\(10\)&,%sp,%acc3 + 707c: a221 4a06 macl %d6,%d4,<<,%a1@-,%d1,%acc1 + 7080: a2a1 4a16 macl %d6,%d4,<<,%a1@-,%d1,%acc3 + 7084: a661 4a06 macl %d6,%d4,>>,%a1@-,%a3,%acc1 + 7088: a6e1 4a16 macl %d6,%d4,>>,%a1@-,%a3,%acc3 + 708c: a421 4a06 macl %d6,%d4,,%a1@-,%d2,%acc1 + 7090: a4a1 4a16 macl %d6,%d4,,%a1@-,%d2,%acc3 + 7094: ae61 4a06 macl %d6,%d4,>>,%a1@-,%sp,%acc1 + 7098: aee1 4a16 macl %d6,%d4,>>,%a1@-,%sp,%acc3 + 709c: a221 4a26 macl %d6,%d4,<<,%a1@-&,%d1,%acc1 + 70a0: a2a1 4a36 macl %d6,%d4,<<,%a1@-&,%d1,%acc3 + 70a4: a661 4a26 macl %d6,%d4,>>,%a1@-&,%a3,%acc1 + 70a8: a6e1 4a36 macl %d6,%d4,>>,%a1@-&,%a3,%acc3 + 70ac: a421 4a26 macl %d6,%d4,,%a1@-&,%d2,%acc1 + 70b0: a4a1 4a36 macl %d6,%d4,,%a1@-&,%d2,%acc3 + 70b4: ae61 4a26 macl %d6,%d4,>>,%a1@-&,%sp,%acc1 + 70b8: aee1 4a36 macl %d6,%d4,>>,%a1@-&,%sp,%acc3 + 70bc: a213 4e06 macl %d6,%d4,<<,%a3@,%d1,%acc1 + 70c0: a293 4e16 macl %d6,%d4,<<,%a3@,%d1,%acc3 + 70c4: a653 4e06 macl %d6,%d4,>>,%a3@,%a3,%acc1 + 70c8: a6d3 4e16 macl %d6,%d4,>>,%a3@,%a3,%acc3 + 70cc: a413 4e06 macl %d6,%d4,,%a3@,%d2,%acc1 + 70d0: a493 4e16 macl %d6,%d4,,%a3@,%d2,%acc3 + 70d4: ae53 4e06 macl %d6,%d4,>>,%a3@,%sp,%acc1 + 70d8: aed3 4e16 macl %d6,%d4,>>,%a3@,%sp,%acc3 + 70dc: a213 4e26 macl %d6,%d4,<<,%a3@&,%d1,%acc1 + 70e0: a293 4e36 macl %d6,%d4,<<,%a3@&,%d1,%acc3 + 70e4: a653 4e26 macl %d6,%d4,>>,%a3@&,%a3,%acc1 + 70e8: a6d3 4e36 macl %d6,%d4,>>,%a3@&,%a3,%acc3 + 70ec: a413 4e26 macl %d6,%d4,,%a3@&,%d2,%acc1 + 70f0: a493 4e36 macl %d6,%d4,,%a3@&,%d2,%acc3 + 70f4: ae53 4e26 macl %d6,%d4,>>,%a3@&,%sp,%acc1 + 70f8: aed3 4e36 macl %d6,%d4,>>,%a3@&,%sp,%acc3 + 70fc: a21a 4e06 macl %d6,%d4,<<,%a2@\+,%d1,%acc1 + 7100: a29a 4e16 macl %d6,%d4,<<,%a2@\+,%d1,%acc3 + 7104: a65a 4e06 macl %d6,%d4,>>,%a2@\+,%a3,%acc1 + 7108: a6da 4e16 macl %d6,%d4,>>,%a2@\+,%a3,%acc3 + 710c: a41a 4e06 macl %d6,%d4,,%a2@\+,%d2,%acc1 + 7110: a49a 4e16 macl %d6,%d4,,%a2@\+,%d2,%acc3 + 7114: ae5a 4e06 macl %d6,%d4,>>,%a2@\+,%sp,%acc1 + 7118: aeda 4e16 macl %d6,%d4,>>,%a2@\+,%sp,%acc3 + 711c: a21a 4e26 macl %d6,%d4,<<,%a2@\+&,%d1,%acc1 + 7120: a29a 4e36 macl %d6,%d4,<<,%a2@\+&,%d1,%acc3 + 7124: a65a 4e26 macl %d6,%d4,>>,%a2@\+&,%a3,%acc1 + 7128: a6da 4e36 macl %d6,%d4,>>,%a2@\+&,%a3,%acc3 + 712c: a41a 4e26 macl %d6,%d4,,%a2@\+&,%d2,%acc1 + 7130: a49a 4e36 macl %d6,%d4,,%a2@\+&,%d2,%acc3 + 7134: ae5a 4e26 macl %d6,%d4,>>,%a2@\+&,%sp,%acc1 + 7138: aeda 4e36 macl %d6,%d4,>>,%a2@\+&,%sp,%acc3 + 713c: a22e 4e06 000a macl %d6,%d4,<<,%fp@\(10\),%d1,%acc1 + 7142: a2ae 4e16 000a macl %d6,%d4,<<,%fp@\(10\),%d1,%acc3 + 7148: a66e 4e06 000a macl %d6,%d4,>>,%fp@\(10\),%a3,%acc1 + 714e: a6ee 4e16 000a macl %d6,%d4,>>,%fp@\(10\),%a3,%acc3 + 7154: a42e 4e06 000a macl %d6,%d4,,%fp@\(10\),%d2,%acc1 + 715a: a4ae 4e16 000a macl %d6,%d4,,%fp@\(10\),%d2,%acc3 + 7160: ae6e 4e06 000a macl %d6,%d4,>>,%fp@\(10\),%sp,%acc1 + 7166: aeee 4e16 000a macl %d6,%d4,>>,%fp@\(10\),%sp,%acc3 + 716c: a22e 4e26 000a macl %d6,%d4,<<,%fp@\(10\)&,%d1,%acc1 + 7172: a2ae 4e36 000a macl %d6,%d4,<<,%fp@\(10\)&,%d1,%acc3 + 7178: a66e 4e26 000a macl %d6,%d4,>>,%fp@\(10\)&,%a3,%acc1 + 717e: a6ee 4e36 000a macl %d6,%d4,>>,%fp@\(10\)&,%a3,%acc3 + 7184: a42e 4e26 000a macl %d6,%d4,,%fp@\(10\)&,%d2,%acc1 + 718a: a4ae 4e36 000a macl %d6,%d4,,%fp@\(10\)&,%d2,%acc3 + 7190: ae6e 4e26 000a macl %d6,%d4,>>,%fp@\(10\)&,%sp,%acc1 + 7196: aeee 4e36 000a macl %d6,%d4,>>,%fp@\(10\)&,%sp,%acc3 + 719c: a221 4e06 macl %d6,%d4,<<,%a1@-,%d1,%acc1 + 71a0: a2a1 4e16 macl %d6,%d4,<<,%a1@-,%d1,%acc3 + 71a4: a661 4e06 macl %d6,%d4,>>,%a1@-,%a3,%acc1 + 71a8: a6e1 4e16 macl %d6,%d4,>>,%a1@-,%a3,%acc3 + 71ac: a421 4e06 macl %d6,%d4,,%a1@-,%d2,%acc1 + 71b0: a4a1 4e16 macl %d6,%d4,,%a1@-,%d2,%acc3 + 71b4: ae61 4e06 macl %d6,%d4,>>,%a1@-,%sp,%acc1 + 71b8: aee1 4e16 macl %d6,%d4,>>,%a1@-,%sp,%acc3 + 71bc: a221 4e26 macl %d6,%d4,<<,%a1@-&,%d1,%acc1 + 71c0: a2a1 4e36 macl %d6,%d4,<<,%a1@-&,%d1,%acc3 + 71c4: a661 4e26 macl %d6,%d4,>>,%a1@-&,%a3,%acc1 + 71c8: a6e1 4e36 macl %d6,%d4,>>,%a1@-&,%a3,%acc3 + 71cc: a421 4e26 macl %d6,%d4,,%a1@-&,%d2,%acc1 + 71d0: a4a1 4e36 macl %d6,%d4,,%a1@-&,%d2,%acc3 + 71d4: ae61 4e26 macl %d6,%d4,>>,%a1@-&,%sp,%acc1 + 71d8: aee1 4e36 macl %d6,%d4,>>,%a1@-&,%sp,%acc3 + 71dc: a213 4a06 macl %d6,%d4,<<,%a3@,%d1,%acc1 + 71e0: a293 4a16 macl %d6,%d4,<<,%a3@,%d1,%acc3 + 71e4: a653 4a06 macl %d6,%d4,>>,%a3@,%a3,%acc1 + 71e8: a6d3 4a16 macl %d6,%d4,>>,%a3@,%a3,%acc3 + 71ec: a413 4a06 macl %d6,%d4,,%a3@,%d2,%acc1 + 71f0: a493 4a16 macl %d6,%d4,,%a3@,%d2,%acc3 + 71f4: ae53 4a06 macl %d6,%d4,>>,%a3@,%sp,%acc1 + 71f8: aed3 4a16 macl %d6,%d4,>>,%a3@,%sp,%acc3 + 71fc: a213 4a26 macl %d6,%d4,<<,%a3@&,%d1,%acc1 + 7200: a293 4a36 macl %d6,%d4,<<,%a3@&,%d1,%acc3 + 7204: a653 4a26 macl %d6,%d4,>>,%a3@&,%a3,%acc1 + 7208: a6d3 4a36 macl %d6,%d4,>>,%a3@&,%a3,%acc3 + 720c: a413 4a26 macl %d6,%d4,,%a3@&,%d2,%acc1 + 7210: a493 4a36 macl %d6,%d4,,%a3@&,%d2,%acc3 + 7214: ae53 4a26 macl %d6,%d4,>>,%a3@&,%sp,%acc1 + 7218: aed3 4a36 macl %d6,%d4,>>,%a3@&,%sp,%acc3 + 721c: a21a 4a06 macl %d6,%d4,<<,%a2@\+,%d1,%acc1 + 7220: a29a 4a16 macl %d6,%d4,<<,%a2@\+,%d1,%acc3 + 7224: a65a 4a06 macl %d6,%d4,>>,%a2@\+,%a3,%acc1 + 7228: a6da 4a16 macl %d6,%d4,>>,%a2@\+,%a3,%acc3 + 722c: a41a 4a06 macl %d6,%d4,,%a2@\+,%d2,%acc1 + 7230: a49a 4a16 macl %d6,%d4,,%a2@\+,%d2,%acc3 + 7234: ae5a 4a06 macl %d6,%d4,>>,%a2@\+,%sp,%acc1 + 7238: aeda 4a16 macl %d6,%d4,>>,%a2@\+,%sp,%acc3 + 723c: a21a 4a26 macl %d6,%d4,<<,%a2@\+&,%d1,%acc1 + 7240: a29a 4a36 macl %d6,%d4,<<,%a2@\+&,%d1,%acc3 + 7244: a65a 4a26 macl %d6,%d4,>>,%a2@\+&,%a3,%acc1 + 7248: a6da 4a36 macl %d6,%d4,>>,%a2@\+&,%a3,%acc3 + 724c: a41a 4a26 macl %d6,%d4,,%a2@\+&,%d2,%acc1 + 7250: a49a 4a36 macl %d6,%d4,,%a2@\+&,%d2,%acc3 + 7254: ae5a 4a26 macl %d6,%d4,>>,%a2@\+&,%sp,%acc1 + 7258: aeda 4a36 macl %d6,%d4,>>,%a2@\+&,%sp,%acc3 + 725c: a22e 4a06 000a macl %d6,%d4,<<,%fp@\(10\),%d1,%acc1 + 7262: a2ae 4a16 000a macl %d6,%d4,<<,%fp@\(10\),%d1,%acc3 + 7268: a66e 4a06 000a macl %d6,%d4,>>,%fp@\(10\),%a3,%acc1 + 726e: a6ee 4a16 000a macl %d6,%d4,>>,%fp@\(10\),%a3,%acc3 + 7274: a42e 4a06 000a macl %d6,%d4,,%fp@\(10\),%d2,%acc1 + 727a: a4ae 4a16 000a macl %d6,%d4,,%fp@\(10\),%d2,%acc3 + 7280: ae6e 4a06 000a macl %d6,%d4,>>,%fp@\(10\),%sp,%acc1 + 7286: aeee 4a16 000a macl %d6,%d4,>>,%fp@\(10\),%sp,%acc3 + 728c: a22e 4a26 000a macl %d6,%d4,<<,%fp@\(10\)&,%d1,%acc1 + 7292: a2ae 4a36 000a macl %d6,%d4,<<,%fp@\(10\)&,%d1,%acc3 + 7298: a66e 4a26 000a macl %d6,%d4,>>,%fp@\(10\)&,%a3,%acc1 + 729e: a6ee 4a36 000a macl %d6,%d4,>>,%fp@\(10\)&,%a3,%acc3 + 72a4: a42e 4a26 000a macl %d6,%d4,,%fp@\(10\)&,%d2,%acc1 + 72aa: a4ae 4a36 000a macl %d6,%d4,,%fp@\(10\)&,%d2,%acc3 + 72b0: ae6e 4a26 000a macl %d6,%d4,>>,%fp@\(10\)&,%sp,%acc1 + 72b6: aeee 4a36 000a macl %d6,%d4,>>,%fp@\(10\)&,%sp,%acc3 + 72bc: a221 4a06 macl %d6,%d4,<<,%a1@-,%d1,%acc1 + 72c0: a2a1 4a16 macl %d6,%d4,<<,%a1@-,%d1,%acc3 + 72c4: a661 4a06 macl %d6,%d4,>>,%a1@-,%a3,%acc1 + 72c8: a6e1 4a16 macl %d6,%d4,>>,%a1@-,%a3,%acc3 + 72cc: a421 4a06 macl %d6,%d4,,%a1@-,%d2,%acc1 + 72d0: a4a1 4a16 macl %d6,%d4,,%a1@-,%d2,%acc3 + 72d4: ae61 4a06 macl %d6,%d4,>>,%a1@-,%sp,%acc1 + 72d8: aee1 4a16 macl %d6,%d4,>>,%a1@-,%sp,%acc3 + 72dc: a221 4a26 macl %d6,%d4,<<,%a1@-&,%d1,%acc1 + 72e0: a2a1 4a36 macl %d6,%d4,<<,%a1@-&,%d1,%acc3 + 72e4: a661 4a26 macl %d6,%d4,>>,%a1@-&,%a3,%acc1 + 72e8: a6e1 4a36 macl %d6,%d4,>>,%a1@-&,%a3,%acc3 + 72ec: a421 4a26 macl %d6,%d4,,%a1@-&,%d2,%acc1 + 72f0: a4a1 4a36 macl %d6,%d4,,%a1@-&,%d2,%acc3 + 72f4: ae61 4a26 macl %d6,%d4,>>,%a1@-&,%sp,%acc1 + 72f8: aee1 4a36 macl %d6,%d4,>>,%a1@-&,%sp,%acc3 + 72fc: a213 4e06 macl %d6,%d4,<<,%a3@,%d1,%acc1 + 7300: a293 4e16 macl %d6,%d4,<<,%a3@,%d1,%acc3 + 7304: a653 4e06 macl %d6,%d4,>>,%a3@,%a3,%acc1 + 7308: a6d3 4e16 macl %d6,%d4,>>,%a3@,%a3,%acc3 + 730c: a413 4e06 macl %d6,%d4,,%a3@,%d2,%acc1 + 7310: a493 4e16 macl %d6,%d4,,%a3@,%d2,%acc3 + 7314: ae53 4e06 macl %d6,%d4,>>,%a3@,%sp,%acc1 + 7318: aed3 4e16 macl %d6,%d4,>>,%a3@,%sp,%acc3 + 731c: a213 4e26 macl %d6,%d4,<<,%a3@&,%d1,%acc1 + 7320: a293 4e36 macl %d6,%d4,<<,%a3@&,%d1,%acc3 + 7324: a653 4e26 macl %d6,%d4,>>,%a3@&,%a3,%acc1 + 7328: a6d3 4e36 macl %d6,%d4,>>,%a3@&,%a3,%acc3 + 732c: a413 4e26 macl %d6,%d4,,%a3@&,%d2,%acc1 + 7330: a493 4e36 macl %d6,%d4,,%a3@&,%d2,%acc3 + 7334: ae53 4e26 macl %d6,%d4,>>,%a3@&,%sp,%acc1 + 7338: aed3 4e36 macl %d6,%d4,>>,%a3@&,%sp,%acc3 + 733c: a21a 4e06 macl %d6,%d4,<<,%a2@\+,%d1,%acc1 + 7340: a29a 4e16 macl %d6,%d4,<<,%a2@\+,%d1,%acc3 + 7344: a65a 4e06 macl %d6,%d4,>>,%a2@\+,%a3,%acc1 + 7348: a6da 4e16 macl %d6,%d4,>>,%a2@\+,%a3,%acc3 + 734c: a41a 4e06 macl %d6,%d4,,%a2@\+,%d2,%acc1 + 7350: a49a 4e16 macl %d6,%d4,,%a2@\+,%d2,%acc3 + 7354: ae5a 4e06 macl %d6,%d4,>>,%a2@\+,%sp,%acc1 + 7358: aeda 4e16 macl %d6,%d4,>>,%a2@\+,%sp,%acc3 + 735c: a21a 4e26 macl %d6,%d4,<<,%a2@\+&,%d1,%acc1 + 7360: a29a 4e36 macl %d6,%d4,<<,%a2@\+&,%d1,%acc3 + 7364: a65a 4e26 macl %d6,%d4,>>,%a2@\+&,%a3,%acc1 + 7368: a6da 4e36 macl %d6,%d4,>>,%a2@\+&,%a3,%acc3 + 736c: a41a 4e26 macl %d6,%d4,,%a2@\+&,%d2,%acc1 + 7370: a49a 4e36 macl %d6,%d4,,%a2@\+&,%d2,%acc3 + 7374: ae5a 4e26 macl %d6,%d4,>>,%a2@\+&,%sp,%acc1 + 7378: aeda 4e36 macl %d6,%d4,>>,%a2@\+&,%sp,%acc3 + 737c: a22e 4e06 000a macl %d6,%d4,<<,%fp@\(10\),%d1,%acc1 + 7382: a2ae 4e16 000a macl %d6,%d4,<<,%fp@\(10\),%d1,%acc3 + 7388: a66e 4e06 000a macl %d6,%d4,>>,%fp@\(10\),%a3,%acc1 + 738e: a6ee 4e16 000a macl %d6,%d4,>>,%fp@\(10\),%a3,%acc3 + 7394: a42e 4e06 000a macl %d6,%d4,,%fp@\(10\),%d2,%acc1 + 739a: a4ae 4e16 000a macl %d6,%d4,,%fp@\(10\),%d2,%acc3 + 73a0: ae6e 4e06 000a macl %d6,%d4,>>,%fp@\(10\),%sp,%acc1 + 73a6: aeee 4e16 000a macl %d6,%d4,>>,%fp@\(10\),%sp,%acc3 + 73ac: a22e 4e26 000a macl %d6,%d4,<<,%fp@\(10\)&,%d1,%acc1 + 73b2: a2ae 4e36 000a macl %d6,%d4,<<,%fp@\(10\)&,%d1,%acc3 + 73b8: a66e 4e26 000a macl %d6,%d4,>>,%fp@\(10\)&,%a3,%acc1 + 73be: a6ee 4e36 000a macl %d6,%d4,>>,%fp@\(10\)&,%a3,%acc3 + 73c4: a42e 4e26 000a macl %d6,%d4,,%fp@\(10\)&,%d2,%acc1 + 73ca: a4ae 4e36 000a macl %d6,%d4,,%fp@\(10\)&,%d2,%acc3 + 73d0: ae6e 4e26 000a macl %d6,%d4,>>,%fp@\(10\)&,%sp,%acc1 + 73d6: aeee 4e36 000a macl %d6,%d4,>>,%fp@\(10\)&,%sp,%acc3 + 73dc: a221 4e06 macl %d6,%d4,<<,%a1@-,%d1,%acc1 + 73e0: a2a1 4e16 macl %d6,%d4,<<,%a1@-,%d1,%acc3 + 73e4: a661 4e06 macl %d6,%d4,>>,%a1@-,%a3,%acc1 + 73e8: a6e1 4e16 macl %d6,%d4,>>,%a1@-,%a3,%acc3 + 73ec: a421 4e06 macl %d6,%d4,,%a1@-,%d2,%acc1 + 73f0: a4a1 4e16 macl %d6,%d4,,%a1@-,%d2,%acc3 + 73f4: ae61 4e06 macl %d6,%d4,>>,%a1@-,%sp,%acc1 + 73f8: aee1 4e16 macl %d6,%d4,>>,%a1@-,%sp,%acc3 + 73fc: a221 4e26 macl %d6,%d4,<<,%a1@-&,%d1,%acc1 + 7400: a2a1 4e36 macl %d6,%d4,<<,%a1@-&,%d1,%acc3 + 7404: a661 4e26 macl %d6,%d4,>>,%a1@-&,%a3,%acc1 + 7408: a6e1 4e36 macl %d6,%d4,>>,%a1@-&,%a3,%acc3 + 740c: a421 4e26 macl %d6,%d4,,%a1@-&,%d2,%acc1 + 7410: a4a1 4e36 macl %d6,%d4,,%a1@-&,%d2,%acc3 + 7414: ae61 4e26 macl %d6,%d4,>>,%a1@-&,%sp,%acc1 + 7418: aee1 4e36 macl %d6,%d4,>>,%a1@-&,%sp,%acc3 diff --git a/gas/testsuite/gas/m68k/mcf-emac.s b/gas/testsuite/gas/m68k/mcf-emac.s new file mode 100644 index 00000000000..348191f6526 --- /dev/null +++ b/gas/testsuite/gas/m68k/mcf-emac.s @@ -0,0 +1,6660 @@ + .text + mac.w %d1l,%a1u,<<,%acc0 | + mac.w %d1l,%a5u,<<,(%a0),%a1,%acc0 + mac.w %d5l,%a3u,<<,(%a0)&,%d2,%acc0 + + move.l #12345678,%acc0 + move.l %d1,%acc1 + move.l #12345678,%acc1 + move.l #12345678,%acc2 + move.l %a1,%acc1 + move.l #12345678,%acc3 + + mac.w %d3u,%a4l,>>,%acc1 + mac.w %d5u,%a6l,%acc1 + + mac.l %d2,%d3,%acc0 + mac.l %d2,%d3,%acc1 + mac.l %d2,%d3,%acc2 + mac.l %d2,%d3,%acc3 + + movclr.l %acc0,%d1 + movclr.l %acc1,%a2 + movclr.l %acc2,%d3 + movclr.l %acc3,%a5 + + move.l %acc1,%d1 + move.l %acc3,%a3 + move.l %acc0,%d5 + move.l %acc1,%a7 + + move.l %acc0,%acc0 + move.l %acc0,%acc1 + move.l %acc0,%acc2 + move.l %acc0,%acc3 + move.l %acc1,%acc0 + move.l %acc1,%acc1 + move.l %acc1,%acc2 + move.l %acc1,%acc3 + move.l %acc2,%acc0 + move.l %acc2,%acc1 + move.l %acc2,%acc2 + move.l %acc2,%acc3 + move.l %acc3,%acc0 + move.l %acc3,%acc1 + move.l %acc3,%acc2 + move.l %acc3,%acc3 + + move.l %accext01,%a0 + move.l %accext23,%a7 + + move.l %acc0,%d0 + move.l %acc1,%a1 + move.l %acc2,%d2 + move.l %acc3,%a3 + + | Automated mac insns for testing + + mac.w %a1l,%a2u,%acc1 + mac.w %a1l,%a2u,%acc2 + mac.w %a1l,%a2u,<<,%acc1 + mac.w %a1l,%a2u,<<,%acc2 + mac.w %a1l,%a2u,>>,%acc1 + mac.w %a1l,%a2u,>>,%acc2 + mac.w %a1l,%a2u,#1,%acc1 + mac.w %a1l,%a2u,#1,%acc2 + mac.w %a1l,%a2u,#-1,%acc1 + mac.w %a1l,%a2u,#-1,%acc2 + mac.w %a1l,%d3l,%acc1 + mac.w %a1l,%d3l,%acc2 + mac.w %a1l,%d3l,<<,%acc1 + mac.w %a1l,%d3l,<<,%acc2 + mac.w %a1l,%d3l,>>,%acc1 + mac.w %a1l,%d3l,>>,%acc2 + mac.w %a1l,%d3l,#1,%acc1 + mac.w %a1l,%d3l,#1,%acc2 + mac.w %a1l,%d3l,#-1,%acc1 + mac.w %a1l,%d3l,#-1,%acc2 + mac.w %a1l,%a7u,%acc1 + mac.w %a1l,%a7u,%acc2 + mac.w %a1l,%a7u,<<,%acc1 + mac.w %a1l,%a7u,<<,%acc2 + mac.w %a1l,%a7u,>>,%acc1 + mac.w %a1l,%a7u,>>,%acc2 + mac.w %a1l,%a7u,#1,%acc1 + mac.w %a1l,%a7u,#1,%acc2 + mac.w %a1l,%a7u,#-1,%acc1 + mac.w %a1l,%a7u,#-1,%acc2 + mac.w %a1l,%d1l,%acc1 + mac.w %a1l,%d1l,%acc2 + mac.w %a1l,%d1l,<<,%acc1 + mac.w %a1l,%d1l,<<,%acc2 + mac.w %a1l,%d1l,>>,%acc1 + mac.w %a1l,%d1l,>>,%acc2 + mac.w %a1l,%d1l,#1,%acc1 + mac.w %a1l,%d1l,#1,%acc2 + mac.w %a1l,%d1l,#-1,%acc1 + mac.w %a1l,%d1l,#-1,%acc2 + mac.w %d2u,%a2u,%acc1 + mac.w %d2u,%a2u,%acc2 + mac.w %d2u,%a2u,<<,%acc1 + mac.w %d2u,%a2u,<<,%acc2 + mac.w %d2u,%a2u,>>,%acc1 + mac.w %d2u,%a2u,>>,%acc2 + mac.w %d2u,%a2u,#1,%acc1 + mac.w %d2u,%a2u,#1,%acc2 + mac.w %d2u,%a2u,#-1,%acc1 + mac.w %d2u,%a2u,#-1,%acc2 + mac.w %d2u,%d3l,%acc1 + mac.w %d2u,%d3l,%acc2 + mac.w %d2u,%d3l,<<,%acc1 + mac.w %d2u,%d3l,<<,%acc2 + mac.w %d2u,%d3l,>>,%acc1 + mac.w %d2u,%d3l,>>,%acc2 + mac.w %d2u,%d3l,#1,%acc1 + mac.w %d2u,%d3l,#1,%acc2 + mac.w %d2u,%d3l,#-1,%acc1 + mac.w %d2u,%d3l,#-1,%acc2 + mac.w %d2u,%a7u,%acc1 + mac.w %d2u,%a7u,%acc2 + mac.w %d2u,%a7u,<<,%acc1 + mac.w %d2u,%a7u,<<,%acc2 + mac.w %d2u,%a7u,>>,%acc1 + mac.w %d2u,%a7u,>>,%acc2 + mac.w %d2u,%a7u,#1,%acc1 + mac.w %d2u,%a7u,#1,%acc2 + mac.w %d2u,%a7u,#-1,%acc1 + mac.w %d2u,%a7u,#-1,%acc2 + mac.w %d2u,%d1l,%acc1 + mac.w %d2u,%d1l,%acc2 + mac.w %d2u,%d1l,<<,%acc1 + mac.w %d2u,%d1l,<<,%acc2 + mac.w %d2u,%d1l,>>,%acc1 + mac.w %d2u,%d1l,>>,%acc2 + mac.w %d2u,%d1l,#1,%acc1 + mac.w %d2u,%d1l,#1,%acc2 + mac.w %d2u,%d1l,#-1,%acc1 + mac.w %d2u,%d1l,#-1,%acc2 + mac.w %a5l,%a2u,%acc1 + mac.w %a5l,%a2u,%acc2 + mac.w %a5l,%a2u,<<,%acc1 + mac.w %a5l,%a2u,<<,%acc2 + mac.w %a5l,%a2u,>>,%acc1 + mac.w %a5l,%a2u,>>,%acc2 + mac.w %a5l,%a2u,#1,%acc1 + mac.w %a5l,%a2u,#1,%acc2 + mac.w %a5l,%a2u,#-1,%acc1 + mac.w %a5l,%a2u,#-1,%acc2 + mac.w %a5l,%d3l,%acc1 + mac.w %a5l,%d3l,%acc2 + mac.w %a5l,%d3l,<<,%acc1 + mac.w %a5l,%d3l,<<,%acc2 + mac.w %a5l,%d3l,>>,%acc1 + mac.w %a5l,%d3l,>>,%acc2 + mac.w %a5l,%d3l,#1,%acc1 + mac.w %a5l,%d3l,#1,%acc2 + mac.w %a5l,%d3l,#-1,%acc1 + mac.w %a5l,%d3l,#-1,%acc2 + mac.w %a5l,%a7u,%acc1 + mac.w %a5l,%a7u,%acc2 + mac.w %a5l,%a7u,<<,%acc1 + mac.w %a5l,%a7u,<<,%acc2 + mac.w %a5l,%a7u,>>,%acc1 + mac.w %a5l,%a7u,>>,%acc2 + mac.w %a5l,%a7u,#1,%acc1 + mac.w %a5l,%a7u,#1,%acc2 + mac.w %a5l,%a7u,#-1,%acc1 + mac.w %a5l,%a7u,#-1,%acc2 + mac.w %a5l,%d1l,%acc1 + mac.w %a5l,%d1l,%acc2 + mac.w %a5l,%d1l,<<,%acc1 + mac.w %a5l,%d1l,<<,%acc2 + mac.w %a5l,%d1l,>>,%acc1 + mac.w %a5l,%d1l,>>,%acc2 + mac.w %a5l,%d1l,#1,%acc1 + mac.w %a5l,%d1l,#1,%acc2 + mac.w %a5l,%d1l,#-1,%acc1 + mac.w %a5l,%d1l,#-1,%acc2 + mac.w %d6u,%a2u,%acc1 + mac.w %d6u,%a2u,%acc2 + mac.w %d6u,%a2u,<<,%acc1 + mac.w %d6u,%a2u,<<,%acc2 + mac.w %d6u,%a2u,>>,%acc1 + mac.w %d6u,%a2u,>>,%acc2 + mac.w %d6u,%a2u,#1,%acc1 + mac.w %d6u,%a2u,#1,%acc2 + mac.w %d6u,%a2u,#-1,%acc1 + mac.w %d6u,%a2u,#-1,%acc2 + mac.w %d6u,%d3l,%acc1 + mac.w %d6u,%d3l,%acc2 + mac.w %d6u,%d3l,<<,%acc1 + mac.w %d6u,%d3l,<<,%acc2 + mac.w %d6u,%d3l,>>,%acc1 + mac.w %d6u,%d3l,>>,%acc2 + mac.w %d6u,%d3l,#1,%acc1 + mac.w %d6u,%d3l,#1,%acc2 + mac.w %d6u,%d3l,#-1,%acc1 + mac.w %d6u,%d3l,#-1,%acc2 + mac.w %d6u,%a7u,%acc1 + mac.w %d6u,%a7u,%acc2 + mac.w %d6u,%a7u,<<,%acc1 + mac.w %d6u,%a7u,<<,%acc2 + mac.w %d6u,%a7u,>>,%acc1 + mac.w %d6u,%a7u,>>,%acc2 + mac.w %d6u,%a7u,#1,%acc1 + mac.w %d6u,%a7u,#1,%acc2 + mac.w %d6u,%a7u,#-1,%acc1 + mac.w %d6u,%a7u,#-1,%acc2 + mac.w %d6u,%d1l,%acc1 + mac.w %d6u,%d1l,%acc2 + mac.w %d6u,%d1l,<<,%acc1 + mac.w %d6u,%d1l,<<,%acc2 + mac.w %d6u,%d1l,>>,%acc1 + mac.w %d6u,%d1l,>>,%acc2 + mac.w %d6u,%d1l,#1,%acc1 + mac.w %d6u,%d1l,#1,%acc2 + mac.w %d6u,%d1l,#-1,%acc1 + mac.w %d6u,%d1l,#-1,%acc2 + + mac.w %a1l,%a2u,(%a3),%d1,%acc1 + mac.w %a1l,%a2u,(%a3),%d1,%acc2 + mac.w %a1l,%a2u,(%a3),%a3,%acc1 + mac.w %a1l,%a2u,(%a3),%a3,%acc2 + mac.w %a1l,%a2u,(%a3),%d2,%acc1 + mac.w %a1l,%a2u,(%a3),%d2,%acc2 + mac.w %a1l,%a2u,(%a3),%a7,%acc1 + mac.w %a1l,%a2u,(%a3),%a7,%acc2 + mac.w %a1l,%a2u,(%a3)&,%d1,%acc1 + mac.w %a1l,%a2u,(%a3)&,%d1,%acc2 + mac.w %a1l,%a2u,(%a3)&,%a3,%acc1 + mac.w %a1l,%a2u,(%a3)&,%a3,%acc2 + mac.w %a1l,%a2u,(%a3)&,%d2,%acc1 + mac.w %a1l,%a2u,(%a3)&,%d2,%acc2 + mac.w %a1l,%a2u,(%a3)&,%a7,%acc1 + mac.w %a1l,%a2u,(%a3)&,%a7,%acc2 + mac.w %a1l,%a2u,(%a2)+,%d1,%acc1 + mac.w %a1l,%a2u,(%a2)+,%d1,%acc2 + mac.w %a1l,%a2u,(%a2)+,%a3,%acc1 + mac.w %a1l,%a2u,(%a2)+,%a3,%acc2 + mac.w %a1l,%a2u,(%a2)+,%d2,%acc1 + mac.w %a1l,%a2u,(%a2)+,%d2,%acc2 + mac.w %a1l,%a2u,(%a2)+,%a7,%acc1 + mac.w %a1l,%a2u,(%a2)+,%a7,%acc2 + mac.w %a1l,%a2u,(%a2)+&,%d1,%acc1 + mac.w %a1l,%a2u,(%a2)+&,%d1,%acc2 + mac.w %a1l,%a2u,(%a2)+&,%a3,%acc1 + mac.w %a1l,%a2u,(%a2)+&,%a3,%acc2 + mac.w %a1l,%a2u,(%a2)+&,%d2,%acc1 + mac.w %a1l,%a2u,(%a2)+&,%d2,%acc2 + mac.w %a1l,%a2u,(%a2)+&,%a7,%acc1 + mac.w %a1l,%a2u,(%a2)+&,%a7,%acc2 + mac.w %a1l,%a2u,10(%a6),%d1,%acc1 + mac.w %a1l,%a2u,10(%a6),%d1,%acc2 + mac.w %a1l,%a2u,10(%a6),%a3,%acc1 + mac.w %a1l,%a2u,10(%a6),%a3,%acc2 + mac.w %a1l,%a2u,10(%a6),%d2,%acc1 + mac.w %a1l,%a2u,10(%a6),%d2,%acc2 + mac.w %a1l,%a2u,10(%a6),%a7,%acc1 + mac.w %a1l,%a2u,10(%a6),%a7,%acc2 + mac.w %a1l,%a2u,10(%a6)&,%d1,%acc1 + mac.w %a1l,%a2u,10(%a6)&,%d1,%acc2 + mac.w %a1l,%a2u,10(%a6)&,%a3,%acc1 + mac.w %a1l,%a2u,10(%a6)&,%a3,%acc2 + mac.w %a1l,%a2u,10(%a6)&,%d2,%acc1 + mac.w %a1l,%a2u,10(%a6)&,%d2,%acc2 + mac.w %a1l,%a2u,10(%a6)&,%a7,%acc1 + mac.w %a1l,%a2u,10(%a6)&,%a7,%acc2 + mac.w %a1l,%a2u,-(%a1),%d1,%acc1 + mac.w %a1l,%a2u,-(%a1),%d1,%acc2 + mac.w %a1l,%a2u,-(%a1),%a3,%acc1 + mac.w %a1l,%a2u,-(%a1),%a3,%acc2 + mac.w %a1l,%a2u,-(%a1),%d2,%acc1 + mac.w %a1l,%a2u,-(%a1),%d2,%acc2 + mac.w %a1l,%a2u,-(%a1),%a7,%acc1 + mac.w %a1l,%a2u,-(%a1),%a7,%acc2 + mac.w %a1l,%a2u,-(%a1)&,%d1,%acc1 + mac.w %a1l,%a2u,-(%a1)&,%d1,%acc2 + mac.w %a1l,%a2u,-(%a1)&,%a3,%acc1 + mac.w %a1l,%a2u,-(%a1)&,%a3,%acc2 + mac.w %a1l,%a2u,-(%a1)&,%d2,%acc1 + mac.w %a1l,%a2u,-(%a1)&,%d2,%acc2 + mac.w %a1l,%a2u,-(%a1)&,%a7,%acc1 + mac.w %a1l,%a2u,-(%a1)&,%a7,%acc2 + mac.w %a1l,%a2u,<<,(%a3),%d1,%acc1 + mac.w %a1l,%a2u,<<,(%a3),%d1,%acc2 + mac.w %a1l,%a2u,<<,(%a3),%a3,%acc1 + mac.w %a1l,%a2u,<<,(%a3),%a3,%acc2 + mac.w %a1l,%a2u,<<,(%a3),%d2,%acc1 + mac.w %a1l,%a2u,<<,(%a3),%d2,%acc2 + mac.w %a1l,%a2u,<<,(%a3),%a7,%acc1 + mac.w %a1l,%a2u,<<,(%a3),%a7,%acc2 + mac.w %a1l,%a2u,<<,(%a3)&,%d1,%acc1 + mac.w %a1l,%a2u,<<,(%a3)&,%d1,%acc2 + mac.w %a1l,%a2u,<<,(%a3)&,%a3,%acc1 + mac.w %a1l,%a2u,<<,(%a3)&,%a3,%acc2 + mac.w %a1l,%a2u,<<,(%a3)&,%d2,%acc1 + mac.w %a1l,%a2u,<<,(%a3)&,%d2,%acc2 + mac.w %a1l,%a2u,<<,(%a3)&,%a7,%acc1 + mac.w %a1l,%a2u,<<,(%a3)&,%a7,%acc2 + mac.w %a1l,%a2u,<<,(%a2)+,%d1,%acc1 + mac.w %a1l,%a2u,<<,(%a2)+,%d1,%acc2 + mac.w %a1l,%a2u,<<,(%a2)+,%a3,%acc1 + mac.w %a1l,%a2u,<<,(%a2)+,%a3,%acc2 + mac.w %a1l,%a2u,<<,(%a2)+,%d2,%acc1 + mac.w %a1l,%a2u,<<,(%a2)+,%d2,%acc2 + mac.w %a1l,%a2u,<<,(%a2)+,%a7,%acc1 + mac.w %a1l,%a2u,<<,(%a2)+,%a7,%acc2 + mac.w %a1l,%a2u,<<,(%a2)+&,%d1,%acc1 + mac.w %a1l,%a2u,<<,(%a2)+&,%d1,%acc2 + mac.w %a1l,%a2u,<<,(%a2)+&,%a3,%acc1 + mac.w %a1l,%a2u,<<,(%a2)+&,%a3,%acc2 + mac.w %a1l,%a2u,<<,(%a2)+&,%d2,%acc1 + mac.w %a1l,%a2u,<<,(%a2)+&,%d2,%acc2 + mac.w %a1l,%a2u,<<,(%a2)+&,%a7,%acc1 + mac.w %a1l,%a2u,<<,(%a2)+&,%a7,%acc2 + mac.w %a1l,%a2u,<<,10(%a6),%d1,%acc1 + mac.w %a1l,%a2u,<<,10(%a6),%d1,%acc2 + mac.w %a1l,%a2u,<<,10(%a6),%a3,%acc1 + mac.w %a1l,%a2u,<<,10(%a6),%a3,%acc2 + mac.w %a1l,%a2u,<<,10(%a6),%d2,%acc1 + mac.w %a1l,%a2u,<<,10(%a6),%d2,%acc2 + mac.w %a1l,%a2u,<<,10(%a6),%a7,%acc1 + mac.w %a1l,%a2u,<<,10(%a6),%a7,%acc2 + mac.w %a1l,%a2u,<<,10(%a6)&,%d1,%acc1 + mac.w %a1l,%a2u,<<,10(%a6)&,%d1,%acc2 + mac.w %a1l,%a2u,<<,10(%a6)&,%a3,%acc1 + mac.w %a1l,%a2u,<<,10(%a6)&,%a3,%acc2 + mac.w %a1l,%a2u,<<,10(%a6)&,%d2,%acc1 + mac.w %a1l,%a2u,<<,10(%a6)&,%d2,%acc2 + mac.w %a1l,%a2u,<<,10(%a6)&,%a7,%acc1 + mac.w %a1l,%a2u,<<,10(%a6)&,%a7,%acc2 + mac.w %a1l,%a2u,<<,-(%a1),%d1,%acc1 + mac.w %a1l,%a2u,<<,-(%a1),%d1,%acc2 + mac.w %a1l,%a2u,<<,-(%a1),%a3,%acc1 + mac.w %a1l,%a2u,<<,-(%a1),%a3,%acc2 + mac.w %a1l,%a2u,<<,-(%a1),%d2,%acc1 + mac.w %a1l,%a2u,<<,-(%a1),%d2,%acc2 + mac.w %a1l,%a2u,<<,-(%a1),%a7,%acc1 + mac.w %a1l,%a2u,<<,-(%a1),%a7,%acc2 + mac.w %a1l,%a2u,<<,-(%a1)&,%d1,%acc1 + mac.w %a1l,%a2u,<<,-(%a1)&,%d1,%acc2 + mac.w %a1l,%a2u,<<,-(%a1)&,%a3,%acc1 + mac.w %a1l,%a2u,<<,-(%a1)&,%a3,%acc2 + mac.w %a1l,%a2u,<<,-(%a1)&,%d2,%acc1 + mac.w %a1l,%a2u,<<,-(%a1)&,%d2,%acc2 + mac.w %a1l,%a2u,<<,-(%a1)&,%a7,%acc1 + mac.w %a1l,%a2u,<<,-(%a1)&,%a7,%acc2 + mac.w %a1l,%a2u,>>,(%a3),%d1,%acc1 + mac.w %a1l,%a2u,>>,(%a3),%d1,%acc2 + mac.w %a1l,%a2u,>>,(%a3),%a3,%acc1 + mac.w %a1l,%a2u,>>,(%a3),%a3,%acc2 + mac.w %a1l,%a2u,>>,(%a3),%d2,%acc1 + mac.w %a1l,%a2u,>>,(%a3),%d2,%acc2 + mac.w %a1l,%a2u,>>,(%a3),%a7,%acc1 + mac.w %a1l,%a2u,>>,(%a3),%a7,%acc2 + mac.w %a1l,%a2u,>>,(%a3)&,%d1,%acc1 + mac.w %a1l,%a2u,>>,(%a3)&,%d1,%acc2 + mac.w %a1l,%a2u,>>,(%a3)&,%a3,%acc1 + mac.w %a1l,%a2u,>>,(%a3)&,%a3,%acc2 + mac.w %a1l,%a2u,>>,(%a3)&,%d2,%acc1 + mac.w %a1l,%a2u,>>,(%a3)&,%d2,%acc2 + mac.w %a1l,%a2u,>>,(%a3)&,%a7,%acc1 + mac.w %a1l,%a2u,>>,(%a3)&,%a7,%acc2 + mac.w %a1l,%a2u,>>,(%a2)+,%d1,%acc1 + mac.w %a1l,%a2u,>>,(%a2)+,%d1,%acc2 + mac.w %a1l,%a2u,>>,(%a2)+,%a3,%acc1 + mac.w %a1l,%a2u,>>,(%a2)+,%a3,%acc2 + mac.w %a1l,%a2u,>>,(%a2)+,%d2,%acc1 + mac.w %a1l,%a2u,>>,(%a2)+,%d2,%acc2 + mac.w %a1l,%a2u,>>,(%a2)+,%a7,%acc1 + mac.w %a1l,%a2u,>>,(%a2)+,%a7,%acc2 + mac.w %a1l,%a2u,>>,(%a2)+&,%d1,%acc1 + mac.w %a1l,%a2u,>>,(%a2)+&,%d1,%acc2 + mac.w %a1l,%a2u,>>,(%a2)+&,%a3,%acc1 + mac.w %a1l,%a2u,>>,(%a2)+&,%a3,%acc2 + mac.w %a1l,%a2u,>>,(%a2)+&,%d2,%acc1 + mac.w %a1l,%a2u,>>,(%a2)+&,%d2,%acc2 + mac.w %a1l,%a2u,>>,(%a2)+&,%a7,%acc1 + mac.w %a1l,%a2u,>>,(%a2)+&,%a7,%acc2 + mac.w %a1l,%a2u,>>,10(%a6),%d1,%acc1 + mac.w %a1l,%a2u,>>,10(%a6),%d1,%acc2 + mac.w %a1l,%a2u,>>,10(%a6),%a3,%acc1 + mac.w %a1l,%a2u,>>,10(%a6),%a3,%acc2 + mac.w %a1l,%a2u,>>,10(%a6),%d2,%acc1 + mac.w %a1l,%a2u,>>,10(%a6),%d2,%acc2 + mac.w %a1l,%a2u,>>,10(%a6),%a7,%acc1 + mac.w %a1l,%a2u,>>,10(%a6),%a7,%acc2 + mac.w %a1l,%a2u,>>,10(%a6)&,%d1,%acc1 + mac.w %a1l,%a2u,>>,10(%a6)&,%d1,%acc2 + mac.w %a1l,%a2u,>>,10(%a6)&,%a3,%acc1 + mac.w %a1l,%a2u,>>,10(%a6)&,%a3,%acc2 + mac.w %a1l,%a2u,>>,10(%a6)&,%d2,%acc1 + mac.w %a1l,%a2u,>>,10(%a6)&,%d2,%acc2 + mac.w %a1l,%a2u,>>,10(%a6)&,%a7,%acc1 + mac.w %a1l,%a2u,>>,10(%a6)&,%a7,%acc2 + mac.w %a1l,%a2u,>>,-(%a1),%d1,%acc1 + mac.w %a1l,%a2u,>>,-(%a1),%d1,%acc2 + mac.w %a1l,%a2u,>>,-(%a1),%a3,%acc1 + mac.w %a1l,%a2u,>>,-(%a1),%a3,%acc2 + mac.w %a1l,%a2u,>>,-(%a1),%d2,%acc1 + mac.w %a1l,%a2u,>>,-(%a1),%d2,%acc2 + mac.w %a1l,%a2u,>>,-(%a1),%a7,%acc1 + mac.w %a1l,%a2u,>>,-(%a1),%a7,%acc2 + mac.w %a1l,%a2u,>>,-(%a1)&,%d1,%acc1 + mac.w %a1l,%a2u,>>,-(%a1)&,%d1,%acc2 + mac.w %a1l,%a2u,>>,-(%a1)&,%a3,%acc1 + mac.w %a1l,%a2u,>>,-(%a1)&,%a3,%acc2 + mac.w %a1l,%a2u,>>,-(%a1)&,%d2,%acc1 + mac.w %a1l,%a2u,>>,-(%a1)&,%d2,%acc2 + mac.w %a1l,%a2u,>>,-(%a1)&,%a7,%acc1 + mac.w %a1l,%a2u,>>,-(%a1)&,%a7,%acc2 + mac.w %a1l,%a2u,#1,(%a3),%d1,%acc1 + mac.w %a1l,%a2u,#1,(%a3),%d1,%acc2 + mac.w %a1l,%a2u,#1,(%a3),%a3,%acc1 + mac.w %a1l,%a2u,#1,(%a3),%a3,%acc2 + mac.w %a1l,%a2u,#1,(%a3),%d2,%acc1 + mac.w %a1l,%a2u,#1,(%a3),%d2,%acc2 + mac.w %a1l,%a2u,#1,(%a3),%a7,%acc1 + mac.w %a1l,%a2u,#1,(%a3),%a7,%acc2 + mac.w %a1l,%a2u,#1,(%a3)&,%d1,%acc1 + mac.w %a1l,%a2u,#1,(%a3)&,%d1,%acc2 + mac.w %a1l,%a2u,#1,(%a3)&,%a3,%acc1 + mac.w %a1l,%a2u,#1,(%a3)&,%a3,%acc2 + mac.w %a1l,%a2u,#1,(%a3)&,%d2,%acc1 + mac.w %a1l,%a2u,#1,(%a3)&,%d2,%acc2 + mac.w %a1l,%a2u,#1,(%a3)&,%a7,%acc1 + mac.w %a1l,%a2u,#1,(%a3)&,%a7,%acc2 + mac.w %a1l,%a2u,#1,(%a2)+,%d1,%acc1 + mac.w %a1l,%a2u,#1,(%a2)+,%d1,%acc2 + mac.w %a1l,%a2u,#1,(%a2)+,%a3,%acc1 + mac.w %a1l,%a2u,#1,(%a2)+,%a3,%acc2 + mac.w %a1l,%a2u,#1,(%a2)+,%d2,%acc1 + mac.w %a1l,%a2u,#1,(%a2)+,%d2,%acc2 + mac.w %a1l,%a2u,#1,(%a2)+,%a7,%acc1 + mac.w %a1l,%a2u,#1,(%a2)+,%a7,%acc2 + mac.w %a1l,%a2u,#1,(%a2)+&,%d1,%acc1 + mac.w %a1l,%a2u,#1,(%a2)+&,%d1,%acc2 + mac.w %a1l,%a2u,#1,(%a2)+&,%a3,%acc1 + mac.w %a1l,%a2u,#1,(%a2)+&,%a3,%acc2 + mac.w %a1l,%a2u,#1,(%a2)+&,%d2,%acc1 + mac.w %a1l,%a2u,#1,(%a2)+&,%d2,%acc2 + mac.w %a1l,%a2u,#1,(%a2)+&,%a7,%acc1 + mac.w %a1l,%a2u,#1,(%a2)+&,%a7,%acc2 + mac.w %a1l,%a2u,#1,10(%a6),%d1,%acc1 + mac.w %a1l,%a2u,#1,10(%a6),%d1,%acc2 + mac.w %a1l,%a2u,#1,10(%a6),%a3,%acc1 + mac.w %a1l,%a2u,#1,10(%a6),%a3,%acc2 + mac.w %a1l,%a2u,#1,10(%a6),%d2,%acc1 + mac.w %a1l,%a2u,#1,10(%a6),%d2,%acc2 + mac.w %a1l,%a2u,#1,10(%a6),%a7,%acc1 + mac.w %a1l,%a2u,#1,10(%a6),%a7,%acc2 + mac.w %a1l,%a2u,#1,10(%a6)&,%d1,%acc1 + mac.w %a1l,%a2u,#1,10(%a6)&,%d1,%acc2 + mac.w %a1l,%a2u,#1,10(%a6)&,%a3,%acc1 + mac.w %a1l,%a2u,#1,10(%a6)&,%a3,%acc2 + mac.w %a1l,%a2u,#1,10(%a6)&,%d2,%acc1 + mac.w %a1l,%a2u,#1,10(%a6)&,%d2,%acc2 + mac.w %a1l,%a2u,#1,10(%a6)&,%a7,%acc1 + mac.w %a1l,%a2u,#1,10(%a6)&,%a7,%acc2 + mac.w %a1l,%a2u,#1,-(%a1),%d1,%acc1 + mac.w %a1l,%a2u,#1,-(%a1),%d1,%acc2 + mac.w %a1l,%a2u,#1,-(%a1),%a3,%acc1 + mac.w %a1l,%a2u,#1,-(%a1),%a3,%acc2 + mac.w %a1l,%a2u,#1,-(%a1),%d2,%acc1 + mac.w %a1l,%a2u,#1,-(%a1),%d2,%acc2 + mac.w %a1l,%a2u,#1,-(%a1),%a7,%acc1 + mac.w %a1l,%a2u,#1,-(%a1),%a7,%acc2 + mac.w %a1l,%a2u,#1,-(%a1)&,%d1,%acc1 + mac.w %a1l,%a2u,#1,-(%a1)&,%d1,%acc2 + mac.w %a1l,%a2u,#1,-(%a1)&,%a3,%acc1 + mac.w %a1l,%a2u,#1,-(%a1)&,%a3,%acc2 + mac.w %a1l,%a2u,#1,-(%a1)&,%d2,%acc1 + mac.w %a1l,%a2u,#1,-(%a1)&,%d2,%acc2 + mac.w %a1l,%a2u,#1,-(%a1)&,%a7,%acc1 + mac.w %a1l,%a2u,#1,-(%a1)&,%a7,%acc2 + mac.w %a1l,%a2u,#-1,(%a3),%d1,%acc1 + mac.w %a1l,%a2u,#-1,(%a3),%d1,%acc2 + mac.w %a1l,%a2u,#-1,(%a3),%a3,%acc1 + mac.w %a1l,%a2u,#-1,(%a3),%a3,%acc2 + mac.w %a1l,%a2u,#-1,(%a3),%d2,%acc1 + mac.w %a1l,%a2u,#-1,(%a3),%d2,%acc2 + mac.w %a1l,%a2u,#-1,(%a3),%a7,%acc1 + mac.w %a1l,%a2u,#-1,(%a3),%a7,%acc2 + mac.w %a1l,%a2u,#-1,(%a3)&,%d1,%acc1 + mac.w %a1l,%a2u,#-1,(%a3)&,%d1,%acc2 + mac.w %a1l,%a2u,#-1,(%a3)&,%a3,%acc1 + mac.w %a1l,%a2u,#-1,(%a3)&,%a3,%acc2 + mac.w %a1l,%a2u,#-1,(%a3)&,%d2,%acc1 + mac.w %a1l,%a2u,#-1,(%a3)&,%d2,%acc2 + mac.w %a1l,%a2u,#-1,(%a3)&,%a7,%acc1 + mac.w %a1l,%a2u,#-1,(%a3)&,%a7,%acc2 + mac.w %a1l,%a2u,#-1,(%a2)+,%d1,%acc1 + mac.w %a1l,%a2u,#-1,(%a2)+,%d1,%acc2 + mac.w %a1l,%a2u,#-1,(%a2)+,%a3,%acc1 + mac.w %a1l,%a2u,#-1,(%a2)+,%a3,%acc2 + mac.w %a1l,%a2u,#-1,(%a2)+,%d2,%acc1 + mac.w %a1l,%a2u,#-1,(%a2)+,%d2,%acc2 + mac.w %a1l,%a2u,#-1,(%a2)+,%a7,%acc1 + mac.w %a1l,%a2u,#-1,(%a2)+,%a7,%acc2 + mac.w %a1l,%a2u,#-1,(%a2)+&,%d1,%acc1 + mac.w %a1l,%a2u,#-1,(%a2)+&,%d1,%acc2 + mac.w %a1l,%a2u,#-1,(%a2)+&,%a3,%acc1 + mac.w %a1l,%a2u,#-1,(%a2)+&,%a3,%acc2 + mac.w %a1l,%a2u,#-1,(%a2)+&,%d2,%acc1 + mac.w %a1l,%a2u,#-1,(%a2)+&,%d2,%acc2 + mac.w %a1l,%a2u,#-1,(%a2)+&,%a7,%acc1 + mac.w %a1l,%a2u,#-1,(%a2)+&,%a7,%acc2 + mac.w %a1l,%a2u,#-1,10(%a6),%d1,%acc1 + mac.w %a1l,%a2u,#-1,10(%a6),%d1,%acc2 + mac.w %a1l,%a2u,#-1,10(%a6),%a3,%acc1 + mac.w %a1l,%a2u,#-1,10(%a6),%a3,%acc2 + mac.w %a1l,%a2u,#-1,10(%a6),%d2,%acc1 + mac.w %a1l,%a2u,#-1,10(%a6),%d2,%acc2 + mac.w %a1l,%a2u,#-1,10(%a6),%a7,%acc1 + mac.w %a1l,%a2u,#-1,10(%a6),%a7,%acc2 + mac.w %a1l,%a2u,#-1,10(%a6)&,%d1,%acc1 + mac.w %a1l,%a2u,#-1,10(%a6)&,%d1,%acc2 + mac.w %a1l,%a2u,#-1,10(%a6)&,%a3,%acc1 + mac.w %a1l,%a2u,#-1,10(%a6)&,%a3,%acc2 + mac.w %a1l,%a2u,#-1,10(%a6)&,%d2,%acc1 + mac.w %a1l,%a2u,#-1,10(%a6)&,%d2,%acc2 + mac.w %a1l,%a2u,#-1,10(%a6)&,%a7,%acc1 + mac.w %a1l,%a2u,#-1,10(%a6)&,%a7,%acc2 + mac.w %a1l,%a2u,#-1,-(%a1),%d1,%acc1 + mac.w %a1l,%a2u,#-1,-(%a1),%d1,%acc2 + mac.w %a1l,%a2u,#-1,-(%a1),%a3,%acc1 + mac.w %a1l,%a2u,#-1,-(%a1),%a3,%acc2 + mac.w %a1l,%a2u,#-1,-(%a1),%d2,%acc1 + mac.w %a1l,%a2u,#-1,-(%a1),%d2,%acc2 + mac.w %a1l,%a2u,#-1,-(%a1),%a7,%acc1 + mac.w %a1l,%a2u,#-1,-(%a1),%a7,%acc2 + mac.w %a1l,%a2u,#-1,-(%a1)&,%d1,%acc1 + mac.w %a1l,%a2u,#-1,-(%a1)&,%d1,%acc2 + mac.w %a1l,%a2u,#-1,-(%a1)&,%a3,%acc1 + mac.w %a1l,%a2u,#-1,-(%a1)&,%a3,%acc2 + mac.w %a1l,%a2u,#-1,-(%a1)&,%d2,%acc1 + mac.w %a1l,%a2u,#-1,-(%a1)&,%d2,%acc2 + mac.w %a1l,%a2u,#-1,-(%a1)&,%a7,%acc1 + mac.w %a1l,%a2u,#-1,-(%a1)&,%a7,%acc2 + mac.w %a1l,%d3l,(%a3),%d1,%acc1 + mac.w %a1l,%d3l,(%a3),%d1,%acc2 + mac.w %a1l,%d3l,(%a3),%a3,%acc1 + mac.w %a1l,%d3l,(%a3),%a3,%acc2 + mac.w %a1l,%d3l,(%a3),%d2,%acc1 + mac.w %a1l,%d3l,(%a3),%d2,%acc2 + mac.w %a1l,%d3l,(%a3),%a7,%acc1 + mac.w %a1l,%d3l,(%a3),%a7,%acc2 + mac.w %a1l,%d3l,(%a3)&,%d1,%acc1 + mac.w %a1l,%d3l,(%a3)&,%d1,%acc2 + mac.w %a1l,%d3l,(%a3)&,%a3,%acc1 + mac.w %a1l,%d3l,(%a3)&,%a3,%acc2 + mac.w %a1l,%d3l,(%a3)&,%d2,%acc1 + mac.w %a1l,%d3l,(%a3)&,%d2,%acc2 + mac.w %a1l,%d3l,(%a3)&,%a7,%acc1 + mac.w %a1l,%d3l,(%a3)&,%a7,%acc2 + mac.w %a1l,%d3l,(%a2)+,%d1,%acc1 + mac.w %a1l,%d3l,(%a2)+,%d1,%acc2 + mac.w %a1l,%d3l,(%a2)+,%a3,%acc1 + mac.w %a1l,%d3l,(%a2)+,%a3,%acc2 + mac.w %a1l,%d3l,(%a2)+,%d2,%acc1 + mac.w %a1l,%d3l,(%a2)+,%d2,%acc2 + mac.w %a1l,%d3l,(%a2)+,%a7,%acc1 + mac.w %a1l,%d3l,(%a2)+,%a7,%acc2 + mac.w %a1l,%d3l,(%a2)+&,%d1,%acc1 + mac.w %a1l,%d3l,(%a2)+&,%d1,%acc2 + mac.w %a1l,%d3l,(%a2)+&,%a3,%acc1 + mac.w %a1l,%d3l,(%a2)+&,%a3,%acc2 + mac.w %a1l,%d3l,(%a2)+&,%d2,%acc1 + mac.w %a1l,%d3l,(%a2)+&,%d2,%acc2 + mac.w %a1l,%d3l,(%a2)+&,%a7,%acc1 + mac.w %a1l,%d3l,(%a2)+&,%a7,%acc2 + mac.w %a1l,%d3l,10(%a6),%d1,%acc1 + mac.w %a1l,%d3l,10(%a6),%d1,%acc2 + mac.w %a1l,%d3l,10(%a6),%a3,%acc1 + mac.w %a1l,%d3l,10(%a6),%a3,%acc2 + mac.w %a1l,%d3l,10(%a6),%d2,%acc1 + mac.w %a1l,%d3l,10(%a6),%d2,%acc2 + mac.w %a1l,%d3l,10(%a6),%a7,%acc1 + mac.w %a1l,%d3l,10(%a6),%a7,%acc2 + mac.w %a1l,%d3l,10(%a6)&,%d1,%acc1 + mac.w %a1l,%d3l,10(%a6)&,%d1,%acc2 + mac.w %a1l,%d3l,10(%a6)&,%a3,%acc1 + mac.w %a1l,%d3l,10(%a6)&,%a3,%acc2 + mac.w %a1l,%d3l,10(%a6)&,%d2,%acc1 + mac.w %a1l,%d3l,10(%a6)&,%d2,%acc2 + mac.w %a1l,%d3l,10(%a6)&,%a7,%acc1 + mac.w %a1l,%d3l,10(%a6)&,%a7,%acc2 + mac.w %a1l,%d3l,-(%a1),%d1,%acc1 + mac.w %a1l,%d3l,-(%a1),%d1,%acc2 + mac.w %a1l,%d3l,-(%a1),%a3,%acc1 + mac.w %a1l,%d3l,-(%a1),%a3,%acc2 + mac.w %a1l,%d3l,-(%a1),%d2,%acc1 + mac.w %a1l,%d3l,-(%a1),%d2,%acc2 + mac.w %a1l,%d3l,-(%a1),%a7,%acc1 + mac.w %a1l,%d3l,-(%a1),%a7,%acc2 + mac.w %a1l,%d3l,-(%a1)&,%d1,%acc1 + mac.w %a1l,%d3l,-(%a1)&,%d1,%acc2 + mac.w %a1l,%d3l,-(%a1)&,%a3,%acc1 + mac.w %a1l,%d3l,-(%a1)&,%a3,%acc2 + mac.w %a1l,%d3l,-(%a1)&,%d2,%acc1 + mac.w %a1l,%d3l,-(%a1)&,%d2,%acc2 + mac.w %a1l,%d3l,-(%a1)&,%a7,%acc1 + mac.w %a1l,%d3l,-(%a1)&,%a7,%acc2 + mac.w %a1l,%d3l,<<,(%a3),%d1,%acc1 + mac.w %a1l,%d3l,<<,(%a3),%d1,%acc2 + mac.w %a1l,%d3l,<<,(%a3),%a3,%acc1 + mac.w %a1l,%d3l,<<,(%a3),%a3,%acc2 + mac.w %a1l,%d3l,<<,(%a3),%d2,%acc1 + mac.w %a1l,%d3l,<<,(%a3),%d2,%acc2 + mac.w %a1l,%d3l,<<,(%a3),%a7,%acc1 + mac.w %a1l,%d3l,<<,(%a3),%a7,%acc2 + mac.w %a1l,%d3l,<<,(%a3)&,%d1,%acc1 + mac.w %a1l,%d3l,<<,(%a3)&,%d1,%acc2 + mac.w %a1l,%d3l,<<,(%a3)&,%a3,%acc1 + mac.w %a1l,%d3l,<<,(%a3)&,%a3,%acc2 + mac.w %a1l,%d3l,<<,(%a3)&,%d2,%acc1 + mac.w %a1l,%d3l,<<,(%a3)&,%d2,%acc2 + mac.w %a1l,%d3l,<<,(%a3)&,%a7,%acc1 + mac.w %a1l,%d3l,<<,(%a3)&,%a7,%acc2 + mac.w %a1l,%d3l,<<,(%a2)+,%d1,%acc1 + mac.w %a1l,%d3l,<<,(%a2)+,%d1,%acc2 + mac.w %a1l,%d3l,<<,(%a2)+,%a3,%acc1 + mac.w %a1l,%d3l,<<,(%a2)+,%a3,%acc2 + mac.w %a1l,%d3l,<<,(%a2)+,%d2,%acc1 + mac.w %a1l,%d3l,<<,(%a2)+,%d2,%acc2 + mac.w %a1l,%d3l,<<,(%a2)+,%a7,%acc1 + mac.w %a1l,%d3l,<<,(%a2)+,%a7,%acc2 + mac.w %a1l,%d3l,<<,(%a2)+&,%d1,%acc1 + mac.w %a1l,%d3l,<<,(%a2)+&,%d1,%acc2 + mac.w %a1l,%d3l,<<,(%a2)+&,%a3,%acc1 + mac.w %a1l,%d3l,<<,(%a2)+&,%a3,%acc2 + mac.w %a1l,%d3l,<<,(%a2)+&,%d2,%acc1 + mac.w %a1l,%d3l,<<,(%a2)+&,%d2,%acc2 + mac.w %a1l,%d3l,<<,(%a2)+&,%a7,%acc1 + mac.w %a1l,%d3l,<<,(%a2)+&,%a7,%acc2 + mac.w %a1l,%d3l,<<,10(%a6),%d1,%acc1 + mac.w %a1l,%d3l,<<,10(%a6),%d1,%acc2 + mac.w %a1l,%d3l,<<,10(%a6),%a3,%acc1 + mac.w %a1l,%d3l,<<,10(%a6),%a3,%acc2 + mac.w %a1l,%d3l,<<,10(%a6),%d2,%acc1 + mac.w %a1l,%d3l,<<,10(%a6),%d2,%acc2 + mac.w %a1l,%d3l,<<,10(%a6),%a7,%acc1 + mac.w %a1l,%d3l,<<,10(%a6),%a7,%acc2 + mac.w %a1l,%d3l,<<,10(%a6)&,%d1,%acc1 + mac.w %a1l,%d3l,<<,10(%a6)&,%d1,%acc2 + mac.w %a1l,%d3l,<<,10(%a6)&,%a3,%acc1 + mac.w %a1l,%d3l,<<,10(%a6)&,%a3,%acc2 + mac.w %a1l,%d3l,<<,10(%a6)&,%d2,%acc1 + mac.w %a1l,%d3l,<<,10(%a6)&,%d2,%acc2 + mac.w %a1l,%d3l,<<,10(%a6)&,%a7,%acc1 + mac.w %a1l,%d3l,<<,10(%a6)&,%a7,%acc2 + mac.w %a1l,%d3l,<<,-(%a1),%d1,%acc1 + mac.w %a1l,%d3l,<<,-(%a1),%d1,%acc2 + mac.w %a1l,%d3l,<<,-(%a1),%a3,%acc1 + mac.w %a1l,%d3l,<<,-(%a1),%a3,%acc2 + mac.w %a1l,%d3l,<<,-(%a1),%d2,%acc1 + mac.w %a1l,%d3l,<<,-(%a1),%d2,%acc2 + mac.w %a1l,%d3l,<<,-(%a1),%a7,%acc1 + mac.w %a1l,%d3l,<<,-(%a1),%a7,%acc2 + mac.w %a1l,%d3l,<<,-(%a1)&,%d1,%acc1 + mac.w %a1l,%d3l,<<,-(%a1)&,%d1,%acc2 + mac.w %a1l,%d3l,<<,-(%a1)&,%a3,%acc1 + mac.w %a1l,%d3l,<<,-(%a1)&,%a3,%acc2 + mac.w %a1l,%d3l,<<,-(%a1)&,%d2,%acc1 + mac.w %a1l,%d3l,<<,-(%a1)&,%d2,%acc2 + mac.w %a1l,%d3l,<<,-(%a1)&,%a7,%acc1 + mac.w %a1l,%d3l,<<,-(%a1)&,%a7,%acc2 + mac.w %a1l,%d3l,>>,(%a3),%d1,%acc1 + mac.w %a1l,%d3l,>>,(%a3),%d1,%acc2 + mac.w %a1l,%d3l,>>,(%a3),%a3,%acc1 + mac.w %a1l,%d3l,>>,(%a3),%a3,%acc2 + mac.w %a1l,%d3l,>>,(%a3),%d2,%acc1 + mac.w %a1l,%d3l,>>,(%a3),%d2,%acc2 + mac.w %a1l,%d3l,>>,(%a3),%a7,%acc1 + mac.w %a1l,%d3l,>>,(%a3),%a7,%acc2 + mac.w %a1l,%d3l,>>,(%a3)&,%d1,%acc1 + mac.w %a1l,%d3l,>>,(%a3)&,%d1,%acc2 + mac.w %a1l,%d3l,>>,(%a3)&,%a3,%acc1 + mac.w %a1l,%d3l,>>,(%a3)&,%a3,%acc2 + mac.w %a1l,%d3l,>>,(%a3)&,%d2,%acc1 + mac.w %a1l,%d3l,>>,(%a3)&,%d2,%acc2 + mac.w %a1l,%d3l,>>,(%a3)&,%a7,%acc1 + mac.w %a1l,%d3l,>>,(%a3)&,%a7,%acc2 + mac.w %a1l,%d3l,>>,(%a2)+,%d1,%acc1 + mac.w %a1l,%d3l,>>,(%a2)+,%d1,%acc2 + mac.w %a1l,%d3l,>>,(%a2)+,%a3,%acc1 + mac.w %a1l,%d3l,>>,(%a2)+,%a3,%acc2 + mac.w %a1l,%d3l,>>,(%a2)+,%d2,%acc1 + mac.w %a1l,%d3l,>>,(%a2)+,%d2,%acc2 + mac.w %a1l,%d3l,>>,(%a2)+,%a7,%acc1 + mac.w %a1l,%d3l,>>,(%a2)+,%a7,%acc2 + mac.w %a1l,%d3l,>>,(%a2)+&,%d1,%acc1 + mac.w %a1l,%d3l,>>,(%a2)+&,%d1,%acc2 + mac.w %a1l,%d3l,>>,(%a2)+&,%a3,%acc1 + mac.w %a1l,%d3l,>>,(%a2)+&,%a3,%acc2 + mac.w %a1l,%d3l,>>,(%a2)+&,%d2,%acc1 + mac.w %a1l,%d3l,>>,(%a2)+&,%d2,%acc2 + mac.w %a1l,%d3l,>>,(%a2)+&,%a7,%acc1 + mac.w %a1l,%d3l,>>,(%a2)+&,%a7,%acc2 + mac.w %a1l,%d3l,>>,10(%a6),%d1,%acc1 + mac.w %a1l,%d3l,>>,10(%a6),%d1,%acc2 + mac.w %a1l,%d3l,>>,10(%a6),%a3,%acc1 + mac.w %a1l,%d3l,>>,10(%a6),%a3,%acc2 + mac.w %a1l,%d3l,>>,10(%a6),%d2,%acc1 + mac.w %a1l,%d3l,>>,10(%a6),%d2,%acc2 + mac.w %a1l,%d3l,>>,10(%a6),%a7,%acc1 + mac.w %a1l,%d3l,>>,10(%a6),%a7,%acc2 + mac.w %a1l,%d3l,>>,10(%a6)&,%d1,%acc1 + mac.w %a1l,%d3l,>>,10(%a6)&,%d1,%acc2 + mac.w %a1l,%d3l,>>,10(%a6)&,%a3,%acc1 + mac.w %a1l,%d3l,>>,10(%a6)&,%a3,%acc2 + mac.w %a1l,%d3l,>>,10(%a6)&,%d2,%acc1 + mac.w %a1l,%d3l,>>,10(%a6)&,%d2,%acc2 + mac.w %a1l,%d3l,>>,10(%a6)&,%a7,%acc1 + mac.w %a1l,%d3l,>>,10(%a6)&,%a7,%acc2 + mac.w %a1l,%d3l,>>,-(%a1),%d1,%acc1 + mac.w %a1l,%d3l,>>,-(%a1),%d1,%acc2 + mac.w %a1l,%d3l,>>,-(%a1),%a3,%acc1 + mac.w %a1l,%d3l,>>,-(%a1),%a3,%acc2 + mac.w %a1l,%d3l,>>,-(%a1),%d2,%acc1 + mac.w %a1l,%d3l,>>,-(%a1),%d2,%acc2 + mac.w %a1l,%d3l,>>,-(%a1),%a7,%acc1 + mac.w %a1l,%d3l,>>,-(%a1),%a7,%acc2 + mac.w %a1l,%d3l,>>,-(%a1)&,%d1,%acc1 + mac.w %a1l,%d3l,>>,-(%a1)&,%d1,%acc2 + mac.w %a1l,%d3l,>>,-(%a1)&,%a3,%acc1 + mac.w %a1l,%d3l,>>,-(%a1)&,%a3,%acc2 + mac.w %a1l,%d3l,>>,-(%a1)&,%d2,%acc1 + mac.w %a1l,%d3l,>>,-(%a1)&,%d2,%acc2 + mac.w %a1l,%d3l,>>,-(%a1)&,%a7,%acc1 + mac.w %a1l,%d3l,>>,-(%a1)&,%a7,%acc2 + mac.w %a1l,%d3l,#1,(%a3),%d1,%acc1 + mac.w %a1l,%d3l,#1,(%a3),%d1,%acc2 + mac.w %a1l,%d3l,#1,(%a3),%a3,%acc1 + mac.w %a1l,%d3l,#1,(%a3),%a3,%acc2 + mac.w %a1l,%d3l,#1,(%a3),%d2,%acc1 + mac.w %a1l,%d3l,#1,(%a3),%d2,%acc2 + mac.w %a1l,%d3l,#1,(%a3),%a7,%acc1 + mac.w %a1l,%d3l,#1,(%a3),%a7,%acc2 + mac.w %a1l,%d3l,#1,(%a3)&,%d1,%acc1 + mac.w %a1l,%d3l,#1,(%a3)&,%d1,%acc2 + mac.w %a1l,%d3l,#1,(%a3)&,%a3,%acc1 + mac.w %a1l,%d3l,#1,(%a3)&,%a3,%acc2 + mac.w %a1l,%d3l,#1,(%a3)&,%d2,%acc1 + mac.w %a1l,%d3l,#1,(%a3)&,%d2,%acc2 + mac.w %a1l,%d3l,#1,(%a3)&,%a7,%acc1 + mac.w %a1l,%d3l,#1,(%a3)&,%a7,%acc2 + mac.w %a1l,%d3l,#1,(%a2)+,%d1,%acc1 + mac.w %a1l,%d3l,#1,(%a2)+,%d1,%acc2 + mac.w %a1l,%d3l,#1,(%a2)+,%a3,%acc1 + mac.w %a1l,%d3l,#1,(%a2)+,%a3,%acc2 + mac.w %a1l,%d3l,#1,(%a2)+,%d2,%acc1 + mac.w %a1l,%d3l,#1,(%a2)+,%d2,%acc2 + mac.w %a1l,%d3l,#1,(%a2)+,%a7,%acc1 + mac.w %a1l,%d3l,#1,(%a2)+,%a7,%acc2 + mac.w %a1l,%d3l,#1,(%a2)+&,%d1,%acc1 + mac.w %a1l,%d3l,#1,(%a2)+&,%d1,%acc2 + mac.w %a1l,%d3l,#1,(%a2)+&,%a3,%acc1 + mac.w %a1l,%d3l,#1,(%a2)+&,%a3,%acc2 + mac.w %a1l,%d3l,#1,(%a2)+&,%d2,%acc1 + mac.w %a1l,%d3l,#1,(%a2)+&,%d2,%acc2 + mac.w %a1l,%d3l,#1,(%a2)+&,%a7,%acc1 + mac.w %a1l,%d3l,#1,(%a2)+&,%a7,%acc2 + mac.w %a1l,%d3l,#1,10(%a6),%d1,%acc1 + mac.w %a1l,%d3l,#1,10(%a6),%d1,%acc2 + mac.w %a1l,%d3l,#1,10(%a6),%a3,%acc1 + mac.w %a1l,%d3l,#1,10(%a6),%a3,%acc2 + mac.w %a1l,%d3l,#1,10(%a6),%d2,%acc1 + mac.w %a1l,%d3l,#1,10(%a6),%d2,%acc2 + mac.w %a1l,%d3l,#1,10(%a6),%a7,%acc1 + mac.w %a1l,%d3l,#1,10(%a6),%a7,%acc2 + mac.w %a1l,%d3l,#1,10(%a6)&,%d1,%acc1 + mac.w %a1l,%d3l,#1,10(%a6)&,%d1,%acc2 + mac.w %a1l,%d3l,#1,10(%a6)&,%a3,%acc1 + mac.w %a1l,%d3l,#1,10(%a6)&,%a3,%acc2 + mac.w %a1l,%d3l,#1,10(%a6)&,%d2,%acc1 + mac.w %a1l,%d3l,#1,10(%a6)&,%d2,%acc2 + mac.w %a1l,%d3l,#1,10(%a6)&,%a7,%acc1 + mac.w %a1l,%d3l,#1,10(%a6)&,%a7,%acc2 + mac.w %a1l,%d3l,#1,-(%a1),%d1,%acc1 + mac.w %a1l,%d3l,#1,-(%a1),%d1,%acc2 + mac.w %a1l,%d3l,#1,-(%a1),%a3,%acc1 + mac.w %a1l,%d3l,#1,-(%a1),%a3,%acc2 + mac.w %a1l,%d3l,#1,-(%a1),%d2,%acc1 + mac.w %a1l,%d3l,#1,-(%a1),%d2,%acc2 + mac.w %a1l,%d3l,#1,-(%a1),%a7,%acc1 + mac.w %a1l,%d3l,#1,-(%a1),%a7,%acc2 + mac.w %a1l,%d3l,#1,-(%a1)&,%d1,%acc1 + mac.w %a1l,%d3l,#1,-(%a1)&,%d1,%acc2 + mac.w %a1l,%d3l,#1,-(%a1)&,%a3,%acc1 + mac.w %a1l,%d3l,#1,-(%a1)&,%a3,%acc2 + mac.w %a1l,%d3l,#1,-(%a1)&,%d2,%acc1 + mac.w %a1l,%d3l,#1,-(%a1)&,%d2,%acc2 + mac.w %a1l,%d3l,#1,-(%a1)&,%a7,%acc1 + mac.w %a1l,%d3l,#1,-(%a1)&,%a7,%acc2 + mac.w %a1l,%d3l,#-1,(%a3),%d1,%acc1 + mac.w %a1l,%d3l,#-1,(%a3),%d1,%acc2 + mac.w %a1l,%d3l,#-1,(%a3),%a3,%acc1 + mac.w %a1l,%d3l,#-1,(%a3),%a3,%acc2 + mac.w %a1l,%d3l,#-1,(%a3),%d2,%acc1 + mac.w %a1l,%d3l,#-1,(%a3),%d2,%acc2 + mac.w %a1l,%d3l,#-1,(%a3),%a7,%acc1 + mac.w %a1l,%d3l,#-1,(%a3),%a7,%acc2 + mac.w %a1l,%d3l,#-1,(%a3)&,%d1,%acc1 + mac.w %a1l,%d3l,#-1,(%a3)&,%d1,%acc2 + mac.w %a1l,%d3l,#-1,(%a3)&,%a3,%acc1 + mac.w %a1l,%d3l,#-1,(%a3)&,%a3,%acc2 + mac.w %a1l,%d3l,#-1,(%a3)&,%d2,%acc1 + mac.w %a1l,%d3l,#-1,(%a3)&,%d2,%acc2 + mac.w %a1l,%d3l,#-1,(%a3)&,%a7,%acc1 + mac.w %a1l,%d3l,#-1,(%a3)&,%a7,%acc2 + mac.w %a1l,%d3l,#-1,(%a2)+,%d1,%acc1 + mac.w %a1l,%d3l,#-1,(%a2)+,%d1,%acc2 + mac.w %a1l,%d3l,#-1,(%a2)+,%a3,%acc1 + mac.w %a1l,%d3l,#-1,(%a2)+,%a3,%acc2 + mac.w %a1l,%d3l,#-1,(%a2)+,%d2,%acc1 + mac.w %a1l,%d3l,#-1,(%a2)+,%d2,%acc2 + mac.w %a1l,%d3l,#-1,(%a2)+,%a7,%acc1 + mac.w %a1l,%d3l,#-1,(%a2)+,%a7,%acc2 + mac.w %a1l,%d3l,#-1,(%a2)+&,%d1,%acc1 + mac.w %a1l,%d3l,#-1,(%a2)+&,%d1,%acc2 + mac.w %a1l,%d3l,#-1,(%a2)+&,%a3,%acc1 + mac.w %a1l,%d3l,#-1,(%a2)+&,%a3,%acc2 + mac.w %a1l,%d3l,#-1,(%a2)+&,%d2,%acc1 + mac.w %a1l,%d3l,#-1,(%a2)+&,%d2,%acc2 + mac.w %a1l,%d3l,#-1,(%a2)+&,%a7,%acc1 + mac.w %a1l,%d3l,#-1,(%a2)+&,%a7,%acc2 + mac.w %a1l,%d3l,#-1,10(%a6),%d1,%acc1 + mac.w %a1l,%d3l,#-1,10(%a6),%d1,%acc2 + mac.w %a1l,%d3l,#-1,10(%a6),%a3,%acc1 + mac.w %a1l,%d3l,#-1,10(%a6),%a3,%acc2 + mac.w %a1l,%d3l,#-1,10(%a6),%d2,%acc1 + mac.w %a1l,%d3l,#-1,10(%a6),%d2,%acc2 + mac.w %a1l,%d3l,#-1,10(%a6),%a7,%acc1 + mac.w %a1l,%d3l,#-1,10(%a6),%a7,%acc2 + mac.w %a1l,%d3l,#-1,10(%a6)&,%d1,%acc1 + mac.w %a1l,%d3l,#-1,10(%a6)&,%d1,%acc2 + mac.w %a1l,%d3l,#-1,10(%a6)&,%a3,%acc1 + mac.w %a1l,%d3l,#-1,10(%a6)&,%a3,%acc2 + mac.w %a1l,%d3l,#-1,10(%a6)&,%d2,%acc1 + mac.w %a1l,%d3l,#-1,10(%a6)&,%d2,%acc2 + mac.w %a1l,%d3l,#-1,10(%a6)&,%a7,%acc1 + mac.w %a1l,%d3l,#-1,10(%a6)&,%a7,%acc2 + mac.w %a1l,%d3l,#-1,-(%a1),%d1,%acc1 + mac.w %a1l,%d3l,#-1,-(%a1),%d1,%acc2 + mac.w %a1l,%d3l,#-1,-(%a1),%a3,%acc1 + mac.w %a1l,%d3l,#-1,-(%a1),%a3,%acc2 + mac.w %a1l,%d3l,#-1,-(%a1),%d2,%acc1 + mac.w %a1l,%d3l,#-1,-(%a1),%d2,%acc2 + mac.w %a1l,%d3l,#-1,-(%a1),%a7,%acc1 + mac.w %a1l,%d3l,#-1,-(%a1),%a7,%acc2 + mac.w %a1l,%d3l,#-1,-(%a1)&,%d1,%acc1 + mac.w %a1l,%d3l,#-1,-(%a1)&,%d1,%acc2 + mac.w %a1l,%d3l,#-1,-(%a1)&,%a3,%acc1 + mac.w %a1l,%d3l,#-1,-(%a1)&,%a3,%acc2 + mac.w %a1l,%d3l,#-1,-(%a1)&,%d2,%acc1 + mac.w %a1l,%d3l,#-1,-(%a1)&,%d2,%acc2 + mac.w %a1l,%d3l,#-1,-(%a1)&,%a7,%acc1 + mac.w %a1l,%d3l,#-1,-(%a1)&,%a7,%acc2 + mac.w %a1l,%a7u,(%a3),%d1,%acc1 + mac.w %a1l,%a7u,(%a3),%d1,%acc2 + mac.w %a1l,%a7u,(%a3),%a3,%acc1 + mac.w %a1l,%a7u,(%a3),%a3,%acc2 + mac.w %a1l,%a7u,(%a3),%d2,%acc1 + mac.w %a1l,%a7u,(%a3),%d2,%acc2 + mac.w %a1l,%a7u,(%a3),%a7,%acc1 + mac.w %a1l,%a7u,(%a3),%a7,%acc2 + mac.w %a1l,%a7u,(%a3)&,%d1,%acc1 + mac.w %a1l,%a7u,(%a3)&,%d1,%acc2 + mac.w %a1l,%a7u,(%a3)&,%a3,%acc1 + mac.w %a1l,%a7u,(%a3)&,%a3,%acc2 + mac.w %a1l,%a7u,(%a3)&,%d2,%acc1 + mac.w %a1l,%a7u,(%a3)&,%d2,%acc2 + mac.w %a1l,%a7u,(%a3)&,%a7,%acc1 + mac.w %a1l,%a7u,(%a3)&,%a7,%acc2 + mac.w %a1l,%a7u,(%a2)+,%d1,%acc1 + mac.w %a1l,%a7u,(%a2)+,%d1,%acc2 + mac.w %a1l,%a7u,(%a2)+,%a3,%acc1 + mac.w %a1l,%a7u,(%a2)+,%a3,%acc2 + mac.w %a1l,%a7u,(%a2)+,%d2,%acc1 + mac.w %a1l,%a7u,(%a2)+,%d2,%acc2 + mac.w %a1l,%a7u,(%a2)+,%a7,%acc1 + mac.w %a1l,%a7u,(%a2)+,%a7,%acc2 + mac.w %a1l,%a7u,(%a2)+&,%d1,%acc1 + mac.w %a1l,%a7u,(%a2)+&,%d1,%acc2 + mac.w %a1l,%a7u,(%a2)+&,%a3,%acc1 + mac.w %a1l,%a7u,(%a2)+&,%a3,%acc2 + mac.w %a1l,%a7u,(%a2)+&,%d2,%acc1 + mac.w %a1l,%a7u,(%a2)+&,%d2,%acc2 + mac.w %a1l,%a7u,(%a2)+&,%a7,%acc1 + mac.w %a1l,%a7u,(%a2)+&,%a7,%acc2 + mac.w %a1l,%a7u,10(%a6),%d1,%acc1 + mac.w %a1l,%a7u,10(%a6),%d1,%acc2 + mac.w %a1l,%a7u,10(%a6),%a3,%acc1 + mac.w %a1l,%a7u,10(%a6),%a3,%acc2 + mac.w %a1l,%a7u,10(%a6),%d2,%acc1 + mac.w %a1l,%a7u,10(%a6),%d2,%acc2 + mac.w %a1l,%a7u,10(%a6),%a7,%acc1 + mac.w %a1l,%a7u,10(%a6),%a7,%acc2 + mac.w %a1l,%a7u,10(%a6)&,%d1,%acc1 + mac.w %a1l,%a7u,10(%a6)&,%d1,%acc2 + mac.w %a1l,%a7u,10(%a6)&,%a3,%acc1 + mac.w %a1l,%a7u,10(%a6)&,%a3,%acc2 + mac.w %a1l,%a7u,10(%a6)&,%d2,%acc1 + mac.w %a1l,%a7u,10(%a6)&,%d2,%acc2 + mac.w %a1l,%a7u,10(%a6)&,%a7,%acc1 + mac.w %a1l,%a7u,10(%a6)&,%a7,%acc2 + mac.w %a1l,%a7u,-(%a1),%d1,%acc1 + mac.w %a1l,%a7u,-(%a1),%d1,%acc2 + mac.w %a1l,%a7u,-(%a1),%a3,%acc1 + mac.w %a1l,%a7u,-(%a1),%a3,%acc2 + mac.w %a1l,%a7u,-(%a1),%d2,%acc1 + mac.w %a1l,%a7u,-(%a1),%d2,%acc2 + mac.w %a1l,%a7u,-(%a1),%a7,%acc1 + mac.w %a1l,%a7u,-(%a1),%a7,%acc2 + mac.w %a1l,%a7u,-(%a1)&,%d1,%acc1 + mac.w %a1l,%a7u,-(%a1)&,%d1,%acc2 + mac.w %a1l,%a7u,-(%a1)&,%a3,%acc1 + mac.w %a1l,%a7u,-(%a1)&,%a3,%acc2 + mac.w %a1l,%a7u,-(%a1)&,%d2,%acc1 + mac.w %a1l,%a7u,-(%a1)&,%d2,%acc2 + mac.w %a1l,%a7u,-(%a1)&,%a7,%acc1 + mac.w %a1l,%a7u,-(%a1)&,%a7,%acc2 + mac.w %a1l,%a7u,<<,(%a3),%d1,%acc1 + mac.w %a1l,%a7u,<<,(%a3),%d1,%acc2 + mac.w %a1l,%a7u,<<,(%a3),%a3,%acc1 + mac.w %a1l,%a7u,<<,(%a3),%a3,%acc2 + mac.w %a1l,%a7u,<<,(%a3),%d2,%acc1 + mac.w %a1l,%a7u,<<,(%a3),%d2,%acc2 + mac.w %a1l,%a7u,<<,(%a3),%a7,%acc1 + mac.w %a1l,%a7u,<<,(%a3),%a7,%acc2 + mac.w %a1l,%a7u,<<,(%a3)&,%d1,%acc1 + mac.w %a1l,%a7u,<<,(%a3)&,%d1,%acc2 + mac.w %a1l,%a7u,<<,(%a3)&,%a3,%acc1 + mac.w %a1l,%a7u,<<,(%a3)&,%a3,%acc2 + mac.w %a1l,%a7u,<<,(%a3)&,%d2,%acc1 + mac.w %a1l,%a7u,<<,(%a3)&,%d2,%acc2 + mac.w %a1l,%a7u,<<,(%a3)&,%a7,%acc1 + mac.w %a1l,%a7u,<<,(%a3)&,%a7,%acc2 + mac.w %a1l,%a7u,<<,(%a2)+,%d1,%acc1 + mac.w %a1l,%a7u,<<,(%a2)+,%d1,%acc2 + mac.w %a1l,%a7u,<<,(%a2)+,%a3,%acc1 + mac.w %a1l,%a7u,<<,(%a2)+,%a3,%acc2 + mac.w %a1l,%a7u,<<,(%a2)+,%d2,%acc1 + mac.w %a1l,%a7u,<<,(%a2)+,%d2,%acc2 + mac.w %a1l,%a7u,<<,(%a2)+,%a7,%acc1 + mac.w %a1l,%a7u,<<,(%a2)+,%a7,%acc2 + mac.w %a1l,%a7u,<<,(%a2)+&,%d1,%acc1 + mac.w %a1l,%a7u,<<,(%a2)+&,%d1,%acc2 + mac.w %a1l,%a7u,<<,(%a2)+&,%a3,%acc1 + mac.w %a1l,%a7u,<<,(%a2)+&,%a3,%acc2 + mac.w %a1l,%a7u,<<,(%a2)+&,%d2,%acc1 + mac.w %a1l,%a7u,<<,(%a2)+&,%d2,%acc2 + mac.w %a1l,%a7u,<<,(%a2)+&,%a7,%acc1 + mac.w %a1l,%a7u,<<,(%a2)+&,%a7,%acc2 + mac.w %a1l,%a7u,<<,10(%a6),%d1,%acc1 + mac.w %a1l,%a7u,<<,10(%a6),%d1,%acc2 + mac.w %a1l,%a7u,<<,10(%a6),%a3,%acc1 + mac.w %a1l,%a7u,<<,10(%a6),%a3,%acc2 + mac.w %a1l,%a7u,<<,10(%a6),%d2,%acc1 + mac.w %a1l,%a7u,<<,10(%a6),%d2,%acc2 + mac.w %a1l,%a7u,<<,10(%a6),%a7,%acc1 + mac.w %a1l,%a7u,<<,10(%a6),%a7,%acc2 + mac.w %a1l,%a7u,<<,10(%a6)&,%d1,%acc1 + mac.w %a1l,%a7u,<<,10(%a6)&,%d1,%acc2 + mac.w %a1l,%a7u,<<,10(%a6)&,%a3,%acc1 + mac.w %a1l,%a7u,<<,10(%a6)&,%a3,%acc2 + mac.w %a1l,%a7u,<<,10(%a6)&,%d2,%acc1 + mac.w %a1l,%a7u,<<,10(%a6)&,%d2,%acc2 + mac.w %a1l,%a7u,<<,10(%a6)&,%a7,%acc1 + mac.w %a1l,%a7u,<<,10(%a6)&,%a7,%acc2 + mac.w %a1l,%a7u,<<,-(%a1),%d1,%acc1 + mac.w %a1l,%a7u,<<,-(%a1),%d1,%acc2 + mac.w %a1l,%a7u,<<,-(%a1),%a3,%acc1 + mac.w %a1l,%a7u,<<,-(%a1),%a3,%acc2 + mac.w %a1l,%a7u,<<,-(%a1),%d2,%acc1 + mac.w %a1l,%a7u,<<,-(%a1),%d2,%acc2 + mac.w %a1l,%a7u,<<,-(%a1),%a7,%acc1 + mac.w %a1l,%a7u,<<,-(%a1),%a7,%acc2 + mac.w %a1l,%a7u,<<,-(%a1)&,%d1,%acc1 + mac.w %a1l,%a7u,<<,-(%a1)&,%d1,%acc2 + mac.w %a1l,%a7u,<<,-(%a1)&,%a3,%acc1 + mac.w %a1l,%a7u,<<,-(%a1)&,%a3,%acc2 + mac.w %a1l,%a7u,<<,-(%a1)&,%d2,%acc1 + mac.w %a1l,%a7u,<<,-(%a1)&,%d2,%acc2 + mac.w %a1l,%a7u,<<,-(%a1)&,%a7,%acc1 + mac.w %a1l,%a7u,<<,-(%a1)&,%a7,%acc2 + mac.w %a1l,%a7u,>>,(%a3),%d1,%acc1 + mac.w %a1l,%a7u,>>,(%a3),%d1,%acc2 + mac.w %a1l,%a7u,>>,(%a3),%a3,%acc1 + mac.w %a1l,%a7u,>>,(%a3),%a3,%acc2 + mac.w %a1l,%a7u,>>,(%a3),%d2,%acc1 + mac.w %a1l,%a7u,>>,(%a3),%d2,%acc2 + mac.w %a1l,%a7u,>>,(%a3),%a7,%acc1 + mac.w %a1l,%a7u,>>,(%a3),%a7,%acc2 + mac.w %a1l,%a7u,>>,(%a3)&,%d1,%acc1 + mac.w %a1l,%a7u,>>,(%a3)&,%d1,%acc2 + mac.w %a1l,%a7u,>>,(%a3)&,%a3,%acc1 + mac.w %a1l,%a7u,>>,(%a3)&,%a3,%acc2 + mac.w %a1l,%a7u,>>,(%a3)&,%d2,%acc1 + mac.w %a1l,%a7u,>>,(%a3)&,%d2,%acc2 + mac.w %a1l,%a7u,>>,(%a3)&,%a7,%acc1 + mac.w %a1l,%a7u,>>,(%a3)&,%a7,%acc2 + mac.w %a1l,%a7u,>>,(%a2)+,%d1,%acc1 + mac.w %a1l,%a7u,>>,(%a2)+,%d1,%acc2 + mac.w %a1l,%a7u,>>,(%a2)+,%a3,%acc1 + mac.w %a1l,%a7u,>>,(%a2)+,%a3,%acc2 + mac.w %a1l,%a7u,>>,(%a2)+,%d2,%acc1 + mac.w %a1l,%a7u,>>,(%a2)+,%d2,%acc2 + mac.w %a1l,%a7u,>>,(%a2)+,%a7,%acc1 + mac.w %a1l,%a7u,>>,(%a2)+,%a7,%acc2 + mac.w %a1l,%a7u,>>,(%a2)+&,%d1,%acc1 + mac.w %a1l,%a7u,>>,(%a2)+&,%d1,%acc2 + mac.w %a1l,%a7u,>>,(%a2)+&,%a3,%acc1 + mac.w %a1l,%a7u,>>,(%a2)+&,%a3,%acc2 + mac.w %a1l,%a7u,>>,(%a2)+&,%d2,%acc1 + mac.w %a1l,%a7u,>>,(%a2)+&,%d2,%acc2 + mac.w %a1l,%a7u,>>,(%a2)+&,%a7,%acc1 + mac.w %a1l,%a7u,>>,(%a2)+&,%a7,%acc2 + mac.w %a1l,%a7u,>>,10(%a6),%d1,%acc1 + mac.w %a1l,%a7u,>>,10(%a6),%d1,%acc2 + mac.w %a1l,%a7u,>>,10(%a6),%a3,%acc1 + mac.w %a1l,%a7u,>>,10(%a6),%a3,%acc2 + mac.w %a1l,%a7u,>>,10(%a6),%d2,%acc1 + mac.w %a1l,%a7u,>>,10(%a6),%d2,%acc2 + mac.w %a1l,%a7u,>>,10(%a6),%a7,%acc1 + mac.w %a1l,%a7u,>>,10(%a6),%a7,%acc2 + mac.w %a1l,%a7u,>>,10(%a6)&,%d1,%acc1 + mac.w %a1l,%a7u,>>,10(%a6)&,%d1,%acc2 + mac.w %a1l,%a7u,>>,10(%a6)&,%a3,%acc1 + mac.w %a1l,%a7u,>>,10(%a6)&,%a3,%acc2 + mac.w %a1l,%a7u,>>,10(%a6)&,%d2,%acc1 + mac.w %a1l,%a7u,>>,10(%a6)&,%d2,%acc2 + mac.w %a1l,%a7u,>>,10(%a6)&,%a7,%acc1 + mac.w %a1l,%a7u,>>,10(%a6)&,%a7,%acc2 + mac.w %a1l,%a7u,>>,-(%a1),%d1,%acc1 + mac.w %a1l,%a7u,>>,-(%a1),%d1,%acc2 + mac.w %a1l,%a7u,>>,-(%a1),%a3,%acc1 + mac.w %a1l,%a7u,>>,-(%a1),%a3,%acc2 + mac.w %a1l,%a7u,>>,-(%a1),%d2,%acc1 + mac.w %a1l,%a7u,>>,-(%a1),%d2,%acc2 + mac.w %a1l,%a7u,>>,-(%a1),%a7,%acc1 + mac.w %a1l,%a7u,>>,-(%a1),%a7,%acc2 + mac.w %a1l,%a7u,>>,-(%a1)&,%d1,%acc1 + mac.w %a1l,%a7u,>>,-(%a1)&,%d1,%acc2 + mac.w %a1l,%a7u,>>,-(%a1)&,%a3,%acc1 + mac.w %a1l,%a7u,>>,-(%a1)&,%a3,%acc2 + mac.w %a1l,%a7u,>>,-(%a1)&,%d2,%acc1 + mac.w %a1l,%a7u,>>,-(%a1)&,%d2,%acc2 + mac.w %a1l,%a7u,>>,-(%a1)&,%a7,%acc1 + mac.w %a1l,%a7u,>>,-(%a1)&,%a7,%acc2 + mac.w %a1l,%a7u,#1,(%a3),%d1,%acc1 + mac.w %a1l,%a7u,#1,(%a3),%d1,%acc2 + mac.w %a1l,%a7u,#1,(%a3),%a3,%acc1 + mac.w %a1l,%a7u,#1,(%a3),%a3,%acc2 + mac.w %a1l,%a7u,#1,(%a3),%d2,%acc1 + mac.w %a1l,%a7u,#1,(%a3),%d2,%acc2 + mac.w %a1l,%a7u,#1,(%a3),%a7,%acc1 + mac.w %a1l,%a7u,#1,(%a3),%a7,%acc2 + mac.w %a1l,%a7u,#1,(%a3)&,%d1,%acc1 + mac.w %a1l,%a7u,#1,(%a3)&,%d1,%acc2 + mac.w %a1l,%a7u,#1,(%a3)&,%a3,%acc1 + mac.w %a1l,%a7u,#1,(%a3)&,%a3,%acc2 + mac.w %a1l,%a7u,#1,(%a3)&,%d2,%acc1 + mac.w %a1l,%a7u,#1,(%a3)&,%d2,%acc2 + mac.w %a1l,%a7u,#1,(%a3)&,%a7,%acc1 + mac.w %a1l,%a7u,#1,(%a3)&,%a7,%acc2 + mac.w %a1l,%a7u,#1,(%a2)+,%d1,%acc1 + mac.w %a1l,%a7u,#1,(%a2)+,%d1,%acc2 + mac.w %a1l,%a7u,#1,(%a2)+,%a3,%acc1 + mac.w %a1l,%a7u,#1,(%a2)+,%a3,%acc2 + mac.w %a1l,%a7u,#1,(%a2)+,%d2,%acc1 + mac.w %a1l,%a7u,#1,(%a2)+,%d2,%acc2 + mac.w %a1l,%a7u,#1,(%a2)+,%a7,%acc1 + mac.w %a1l,%a7u,#1,(%a2)+,%a7,%acc2 + mac.w %a1l,%a7u,#1,(%a2)+&,%d1,%acc1 + mac.w %a1l,%a7u,#1,(%a2)+&,%d1,%acc2 + mac.w %a1l,%a7u,#1,(%a2)+&,%a3,%acc1 + mac.w %a1l,%a7u,#1,(%a2)+&,%a3,%acc2 + mac.w %a1l,%a7u,#1,(%a2)+&,%d2,%acc1 + mac.w %a1l,%a7u,#1,(%a2)+&,%d2,%acc2 + mac.w %a1l,%a7u,#1,(%a2)+&,%a7,%acc1 + mac.w %a1l,%a7u,#1,(%a2)+&,%a7,%acc2 + mac.w %a1l,%a7u,#1,10(%a6),%d1,%acc1 + mac.w %a1l,%a7u,#1,10(%a6),%d1,%acc2 + mac.w %a1l,%a7u,#1,10(%a6),%a3,%acc1 + mac.w %a1l,%a7u,#1,10(%a6),%a3,%acc2 + mac.w %a1l,%a7u,#1,10(%a6),%d2,%acc1 + mac.w %a1l,%a7u,#1,10(%a6),%d2,%acc2 + mac.w %a1l,%a7u,#1,10(%a6),%a7,%acc1 + mac.w %a1l,%a7u,#1,10(%a6),%a7,%acc2 + mac.w %a1l,%a7u,#1,10(%a6)&,%d1,%acc1 + mac.w %a1l,%a7u,#1,10(%a6)&,%d1,%acc2 + mac.w %a1l,%a7u,#1,10(%a6)&,%a3,%acc1 + mac.w %a1l,%a7u,#1,10(%a6)&,%a3,%acc2 + mac.w %a1l,%a7u,#1,10(%a6)&,%d2,%acc1 + mac.w %a1l,%a7u,#1,10(%a6)&,%d2,%acc2 + mac.w %a1l,%a7u,#1,10(%a6)&,%a7,%acc1 + mac.w %a1l,%a7u,#1,10(%a6)&,%a7,%acc2 + mac.w %a1l,%a7u,#1,-(%a1),%d1,%acc1 + mac.w %a1l,%a7u,#1,-(%a1),%d1,%acc2 + mac.w %a1l,%a7u,#1,-(%a1),%a3,%acc1 + mac.w %a1l,%a7u,#1,-(%a1),%a3,%acc2 + mac.w %a1l,%a7u,#1,-(%a1),%d2,%acc1 + mac.w %a1l,%a7u,#1,-(%a1),%d2,%acc2 + mac.w %a1l,%a7u,#1,-(%a1),%a7,%acc1 + mac.w %a1l,%a7u,#1,-(%a1),%a7,%acc2 + mac.w %a1l,%a7u,#1,-(%a1)&,%d1,%acc1 + mac.w %a1l,%a7u,#1,-(%a1)&,%d1,%acc2 + mac.w %a1l,%a7u,#1,-(%a1)&,%a3,%acc1 + mac.w %a1l,%a7u,#1,-(%a1)&,%a3,%acc2 + mac.w %a1l,%a7u,#1,-(%a1)&,%d2,%acc1 + mac.w %a1l,%a7u,#1,-(%a1)&,%d2,%acc2 + mac.w %a1l,%a7u,#1,-(%a1)&,%a7,%acc1 + mac.w %a1l,%a7u,#1,-(%a1)&,%a7,%acc2 + mac.w %a1l,%a7u,#-1,(%a3),%d1,%acc1 + mac.w %a1l,%a7u,#-1,(%a3),%d1,%acc2 + mac.w %a1l,%a7u,#-1,(%a3),%a3,%acc1 + mac.w %a1l,%a7u,#-1,(%a3),%a3,%acc2 + mac.w %a1l,%a7u,#-1,(%a3),%d2,%acc1 + mac.w %a1l,%a7u,#-1,(%a3),%d2,%acc2 + mac.w %a1l,%a7u,#-1,(%a3),%a7,%acc1 + mac.w %a1l,%a7u,#-1,(%a3),%a7,%acc2 + mac.w %a1l,%a7u,#-1,(%a3)&,%d1,%acc1 + mac.w %a1l,%a7u,#-1,(%a3)&,%d1,%acc2 + mac.w %a1l,%a7u,#-1,(%a3)&,%a3,%acc1 + mac.w %a1l,%a7u,#-1,(%a3)&,%a3,%acc2 + mac.w %a1l,%a7u,#-1,(%a3)&,%d2,%acc1 + mac.w %a1l,%a7u,#-1,(%a3)&,%d2,%acc2 + mac.w %a1l,%a7u,#-1,(%a3)&,%a7,%acc1 + mac.w %a1l,%a7u,#-1,(%a3)&,%a7,%acc2 + mac.w %a1l,%a7u,#-1,(%a2)+,%d1,%acc1 + mac.w %a1l,%a7u,#-1,(%a2)+,%d1,%acc2 + mac.w %a1l,%a7u,#-1,(%a2)+,%a3,%acc1 + mac.w %a1l,%a7u,#-1,(%a2)+,%a3,%acc2 + mac.w %a1l,%a7u,#-1,(%a2)+,%d2,%acc1 + mac.w %a1l,%a7u,#-1,(%a2)+,%d2,%acc2 + mac.w %a1l,%a7u,#-1,(%a2)+,%a7,%acc1 + mac.w %a1l,%a7u,#-1,(%a2)+,%a7,%acc2 + mac.w %a1l,%a7u,#-1,(%a2)+&,%d1,%acc1 + mac.w %a1l,%a7u,#-1,(%a2)+&,%d1,%acc2 + mac.w %a1l,%a7u,#-1,(%a2)+&,%a3,%acc1 + mac.w %a1l,%a7u,#-1,(%a2)+&,%a3,%acc2 + mac.w %a1l,%a7u,#-1,(%a2)+&,%d2,%acc1 + mac.w %a1l,%a7u,#-1,(%a2)+&,%d2,%acc2 + mac.w %a1l,%a7u,#-1,(%a2)+&,%a7,%acc1 + mac.w %a1l,%a7u,#-1,(%a2)+&,%a7,%acc2 + mac.w %a1l,%a7u,#-1,10(%a6),%d1,%acc1 + mac.w %a1l,%a7u,#-1,10(%a6),%d1,%acc2 + mac.w %a1l,%a7u,#-1,10(%a6),%a3,%acc1 + mac.w %a1l,%a7u,#-1,10(%a6),%a3,%acc2 + mac.w %a1l,%a7u,#-1,10(%a6),%d2,%acc1 + mac.w %a1l,%a7u,#-1,10(%a6),%d2,%acc2 + mac.w %a1l,%a7u,#-1,10(%a6),%a7,%acc1 + mac.w %a1l,%a7u,#-1,10(%a6),%a7,%acc2 + mac.w %a1l,%a7u,#-1,10(%a6)&,%d1,%acc1 + mac.w %a1l,%a7u,#-1,10(%a6)&,%d1,%acc2 + mac.w %a1l,%a7u,#-1,10(%a6)&,%a3,%acc1 + mac.w %a1l,%a7u,#-1,10(%a6)&,%a3,%acc2 + mac.w %a1l,%a7u,#-1,10(%a6)&,%d2,%acc1 + mac.w %a1l,%a7u,#-1,10(%a6)&,%d2,%acc2 + mac.w %a1l,%a7u,#-1,10(%a6)&,%a7,%acc1 + mac.w %a1l,%a7u,#-1,10(%a6)&,%a7,%acc2 + mac.w %a1l,%a7u,#-1,-(%a1),%d1,%acc1 + mac.w %a1l,%a7u,#-1,-(%a1),%d1,%acc2 + mac.w %a1l,%a7u,#-1,-(%a1),%a3,%acc1 + mac.w %a1l,%a7u,#-1,-(%a1),%a3,%acc2 + mac.w %a1l,%a7u,#-1,-(%a1),%d2,%acc1 + mac.w %a1l,%a7u,#-1,-(%a1),%d2,%acc2 + mac.w %a1l,%a7u,#-1,-(%a1),%a7,%acc1 + mac.w %a1l,%a7u,#-1,-(%a1),%a7,%acc2 + mac.w %a1l,%a7u,#-1,-(%a1)&,%d1,%acc1 + mac.w %a1l,%a7u,#-1,-(%a1)&,%d1,%acc2 + mac.w %a1l,%a7u,#-1,-(%a1)&,%a3,%acc1 + mac.w %a1l,%a7u,#-1,-(%a1)&,%a3,%acc2 + mac.w %a1l,%a7u,#-1,-(%a1)&,%d2,%acc1 + mac.w %a1l,%a7u,#-1,-(%a1)&,%d2,%acc2 + mac.w %a1l,%a7u,#-1,-(%a1)&,%a7,%acc1 + mac.w %a1l,%a7u,#-1,-(%a1)&,%a7,%acc2 + mac.w %a1l,%d1l,(%a3),%d1,%acc1 + mac.w %a1l,%d1l,(%a3),%d1,%acc2 + mac.w %a1l,%d1l,(%a3),%a3,%acc1 + mac.w %a1l,%d1l,(%a3),%a3,%acc2 + mac.w %a1l,%d1l,(%a3),%d2,%acc1 + mac.w %a1l,%d1l,(%a3),%d2,%acc2 + mac.w %a1l,%d1l,(%a3),%a7,%acc1 + mac.w %a1l,%d1l,(%a3),%a7,%acc2 + mac.w %a1l,%d1l,(%a3)&,%d1,%acc1 + mac.w %a1l,%d1l,(%a3)&,%d1,%acc2 + mac.w %a1l,%d1l,(%a3)&,%a3,%acc1 + mac.w %a1l,%d1l,(%a3)&,%a3,%acc2 + mac.w %a1l,%d1l,(%a3)&,%d2,%acc1 + mac.w %a1l,%d1l,(%a3)&,%d2,%acc2 + mac.w %a1l,%d1l,(%a3)&,%a7,%acc1 + mac.w %a1l,%d1l,(%a3)&,%a7,%acc2 + mac.w %a1l,%d1l,(%a2)+,%d1,%acc1 + mac.w %a1l,%d1l,(%a2)+,%d1,%acc2 + mac.w %a1l,%d1l,(%a2)+,%a3,%acc1 + mac.w %a1l,%d1l,(%a2)+,%a3,%acc2 + mac.w %a1l,%d1l,(%a2)+,%d2,%acc1 + mac.w %a1l,%d1l,(%a2)+,%d2,%acc2 + mac.w %a1l,%d1l,(%a2)+,%a7,%acc1 + mac.w %a1l,%d1l,(%a2)+,%a7,%acc2 + mac.w %a1l,%d1l,(%a2)+&,%d1,%acc1 + mac.w %a1l,%d1l,(%a2)+&,%d1,%acc2 + mac.w %a1l,%d1l,(%a2)+&,%a3,%acc1 + mac.w %a1l,%d1l,(%a2)+&,%a3,%acc2 + mac.w %a1l,%d1l,(%a2)+&,%d2,%acc1 + mac.w %a1l,%d1l,(%a2)+&,%d2,%acc2 + mac.w %a1l,%d1l,(%a2)+&,%a7,%acc1 + mac.w %a1l,%d1l,(%a2)+&,%a7,%acc2 + mac.w %a1l,%d1l,10(%a6),%d1,%acc1 + mac.w %a1l,%d1l,10(%a6),%d1,%acc2 + mac.w %a1l,%d1l,10(%a6),%a3,%acc1 + mac.w %a1l,%d1l,10(%a6),%a3,%acc2 + mac.w %a1l,%d1l,10(%a6),%d2,%acc1 + mac.w %a1l,%d1l,10(%a6),%d2,%acc2 + mac.w %a1l,%d1l,10(%a6),%a7,%acc1 + mac.w %a1l,%d1l,10(%a6),%a7,%acc2 + mac.w %a1l,%d1l,10(%a6)&,%d1,%acc1 + mac.w %a1l,%d1l,10(%a6)&,%d1,%acc2 + mac.w %a1l,%d1l,10(%a6)&,%a3,%acc1 + mac.w %a1l,%d1l,10(%a6)&,%a3,%acc2 + mac.w %a1l,%d1l,10(%a6)&,%d2,%acc1 + mac.w %a1l,%d1l,10(%a6)&,%d2,%acc2 + mac.w %a1l,%d1l,10(%a6)&,%a7,%acc1 + mac.w %a1l,%d1l,10(%a6)&,%a7,%acc2 + mac.w %a1l,%d1l,-(%a1),%d1,%acc1 + mac.w %a1l,%d1l,-(%a1),%d1,%acc2 + mac.w %a1l,%d1l,-(%a1),%a3,%acc1 + mac.w %a1l,%d1l,-(%a1),%a3,%acc2 + mac.w %a1l,%d1l,-(%a1),%d2,%acc1 + mac.w %a1l,%d1l,-(%a1),%d2,%acc2 + mac.w %a1l,%d1l,-(%a1),%a7,%acc1 + mac.w %a1l,%d1l,-(%a1),%a7,%acc2 + mac.w %a1l,%d1l,-(%a1)&,%d1,%acc1 + mac.w %a1l,%d1l,-(%a1)&,%d1,%acc2 + mac.w %a1l,%d1l,-(%a1)&,%a3,%acc1 + mac.w %a1l,%d1l,-(%a1)&,%a3,%acc2 + mac.w %a1l,%d1l,-(%a1)&,%d2,%acc1 + mac.w %a1l,%d1l,-(%a1)&,%d2,%acc2 + mac.w %a1l,%d1l,-(%a1)&,%a7,%acc1 + mac.w %a1l,%d1l,-(%a1)&,%a7,%acc2 + mac.w %a1l,%d1l,<<,(%a3),%d1,%acc1 + mac.w %a1l,%d1l,<<,(%a3),%d1,%acc2 + mac.w %a1l,%d1l,<<,(%a3),%a3,%acc1 + mac.w %a1l,%d1l,<<,(%a3),%a3,%acc2 + mac.w %a1l,%d1l,<<,(%a3),%d2,%acc1 + mac.w %a1l,%d1l,<<,(%a3),%d2,%acc2 + mac.w %a1l,%d1l,<<,(%a3),%a7,%acc1 + mac.w %a1l,%d1l,<<,(%a3),%a7,%acc2 + mac.w %a1l,%d1l,<<,(%a3)&,%d1,%acc1 + mac.w %a1l,%d1l,<<,(%a3)&,%d1,%acc2 + mac.w %a1l,%d1l,<<,(%a3)&,%a3,%acc1 + mac.w %a1l,%d1l,<<,(%a3)&,%a3,%acc2 + mac.w %a1l,%d1l,<<,(%a3)&,%d2,%acc1 + mac.w %a1l,%d1l,<<,(%a3)&,%d2,%acc2 + mac.w %a1l,%d1l,<<,(%a3)&,%a7,%acc1 + mac.w %a1l,%d1l,<<,(%a3)&,%a7,%acc2 + mac.w %a1l,%d1l,<<,(%a2)+,%d1,%acc1 + mac.w %a1l,%d1l,<<,(%a2)+,%d1,%acc2 + mac.w %a1l,%d1l,<<,(%a2)+,%a3,%acc1 + mac.w %a1l,%d1l,<<,(%a2)+,%a3,%acc2 + mac.w %a1l,%d1l,<<,(%a2)+,%d2,%acc1 + mac.w %a1l,%d1l,<<,(%a2)+,%d2,%acc2 + mac.w %a1l,%d1l,<<,(%a2)+,%a7,%acc1 + mac.w %a1l,%d1l,<<,(%a2)+,%a7,%acc2 + mac.w %a1l,%d1l,<<,(%a2)+&,%d1,%acc1 + mac.w %a1l,%d1l,<<,(%a2)+&,%d1,%acc2 + mac.w %a1l,%d1l,<<,(%a2)+&,%a3,%acc1 + mac.w %a1l,%d1l,<<,(%a2)+&,%a3,%acc2 + mac.w %a1l,%d1l,<<,(%a2)+&,%d2,%acc1 + mac.w %a1l,%d1l,<<,(%a2)+&,%d2,%acc2 + mac.w %a1l,%d1l,<<,(%a2)+&,%a7,%acc1 + mac.w %a1l,%d1l,<<,(%a2)+&,%a7,%acc2 + mac.w %a1l,%d1l,<<,10(%a6),%d1,%acc1 + mac.w %a1l,%d1l,<<,10(%a6),%d1,%acc2 + mac.w %a1l,%d1l,<<,10(%a6),%a3,%acc1 + mac.w %a1l,%d1l,<<,10(%a6),%a3,%acc2 + mac.w %a1l,%d1l,<<,10(%a6),%d2,%acc1 + mac.w %a1l,%d1l,<<,10(%a6),%d2,%acc2 + mac.w %a1l,%d1l,<<,10(%a6),%a7,%acc1 + mac.w %a1l,%d1l,<<,10(%a6),%a7,%acc2 + mac.w %a1l,%d1l,<<,10(%a6)&,%d1,%acc1 + mac.w %a1l,%d1l,<<,10(%a6)&,%d1,%acc2 + mac.w %a1l,%d1l,<<,10(%a6)&,%a3,%acc1 + mac.w %a1l,%d1l,<<,10(%a6)&,%a3,%acc2 + mac.w %a1l,%d1l,<<,10(%a6)&,%d2,%acc1 + mac.w %a1l,%d1l,<<,10(%a6)&,%d2,%acc2 + mac.w %a1l,%d1l,<<,10(%a6)&,%a7,%acc1 + mac.w %a1l,%d1l,<<,10(%a6)&,%a7,%acc2 + mac.w %a1l,%d1l,<<,-(%a1),%d1,%acc1 + mac.w %a1l,%d1l,<<,-(%a1),%d1,%acc2 + mac.w %a1l,%d1l,<<,-(%a1),%a3,%acc1 + mac.w %a1l,%d1l,<<,-(%a1),%a3,%acc2 + mac.w %a1l,%d1l,<<,-(%a1),%d2,%acc1 + mac.w %a1l,%d1l,<<,-(%a1),%d2,%acc2 + mac.w %a1l,%d1l,<<,-(%a1),%a7,%acc1 + mac.w %a1l,%d1l,<<,-(%a1),%a7,%acc2 + mac.w %a1l,%d1l,<<,-(%a1)&,%d1,%acc1 + mac.w %a1l,%d1l,<<,-(%a1)&,%d1,%acc2 + mac.w %a1l,%d1l,<<,-(%a1)&,%a3,%acc1 + mac.w %a1l,%d1l,<<,-(%a1)&,%a3,%acc2 + mac.w %a1l,%d1l,<<,-(%a1)&,%d2,%acc1 + mac.w %a1l,%d1l,<<,-(%a1)&,%d2,%acc2 + mac.w %a1l,%d1l,<<,-(%a1)&,%a7,%acc1 + mac.w %a1l,%d1l,<<,-(%a1)&,%a7,%acc2 + mac.w %a1l,%d1l,>>,(%a3),%d1,%acc1 + mac.w %a1l,%d1l,>>,(%a3),%d1,%acc2 + mac.w %a1l,%d1l,>>,(%a3),%a3,%acc1 + mac.w %a1l,%d1l,>>,(%a3),%a3,%acc2 + mac.w %a1l,%d1l,>>,(%a3),%d2,%acc1 + mac.w %a1l,%d1l,>>,(%a3),%d2,%acc2 + mac.w %a1l,%d1l,>>,(%a3),%a7,%acc1 + mac.w %a1l,%d1l,>>,(%a3),%a7,%acc2 + mac.w %a1l,%d1l,>>,(%a3)&,%d1,%acc1 + mac.w %a1l,%d1l,>>,(%a3)&,%d1,%acc2 + mac.w %a1l,%d1l,>>,(%a3)&,%a3,%acc1 + mac.w %a1l,%d1l,>>,(%a3)&,%a3,%acc2 + mac.w %a1l,%d1l,>>,(%a3)&,%d2,%acc1 + mac.w %a1l,%d1l,>>,(%a3)&,%d2,%acc2 + mac.w %a1l,%d1l,>>,(%a3)&,%a7,%acc1 + mac.w %a1l,%d1l,>>,(%a3)&,%a7,%acc2 + mac.w %a1l,%d1l,>>,(%a2)+,%d1,%acc1 + mac.w %a1l,%d1l,>>,(%a2)+,%d1,%acc2 + mac.w %a1l,%d1l,>>,(%a2)+,%a3,%acc1 + mac.w %a1l,%d1l,>>,(%a2)+,%a3,%acc2 + mac.w %a1l,%d1l,>>,(%a2)+,%d2,%acc1 + mac.w %a1l,%d1l,>>,(%a2)+,%d2,%acc2 + mac.w %a1l,%d1l,>>,(%a2)+,%a7,%acc1 + mac.w %a1l,%d1l,>>,(%a2)+,%a7,%acc2 + mac.w %a1l,%d1l,>>,(%a2)+&,%d1,%acc1 + mac.w %a1l,%d1l,>>,(%a2)+&,%d1,%acc2 + mac.w %a1l,%d1l,>>,(%a2)+&,%a3,%acc1 + mac.w %a1l,%d1l,>>,(%a2)+&,%a3,%acc2 + mac.w %a1l,%d1l,>>,(%a2)+&,%d2,%acc1 + mac.w %a1l,%d1l,>>,(%a2)+&,%d2,%acc2 + mac.w %a1l,%d1l,>>,(%a2)+&,%a7,%acc1 + mac.w %a1l,%d1l,>>,(%a2)+&,%a7,%acc2 + mac.w %a1l,%d1l,>>,10(%a6),%d1,%acc1 + mac.w %a1l,%d1l,>>,10(%a6),%d1,%acc2 + mac.w %a1l,%d1l,>>,10(%a6),%a3,%acc1 + mac.w %a1l,%d1l,>>,10(%a6),%a3,%acc2 + mac.w %a1l,%d1l,>>,10(%a6),%d2,%acc1 + mac.w %a1l,%d1l,>>,10(%a6),%d2,%acc2 + mac.w %a1l,%d1l,>>,10(%a6),%a7,%acc1 + mac.w %a1l,%d1l,>>,10(%a6),%a7,%acc2 + mac.w %a1l,%d1l,>>,10(%a6)&,%d1,%acc1 + mac.w %a1l,%d1l,>>,10(%a6)&,%d1,%acc2 + mac.w %a1l,%d1l,>>,10(%a6)&,%a3,%acc1 + mac.w %a1l,%d1l,>>,10(%a6)&,%a3,%acc2 + mac.w %a1l,%d1l,>>,10(%a6)&,%d2,%acc1 + mac.w %a1l,%d1l,>>,10(%a6)&,%d2,%acc2 + mac.w %a1l,%d1l,>>,10(%a6)&,%a7,%acc1 + mac.w %a1l,%d1l,>>,10(%a6)&,%a7,%acc2 + mac.w %a1l,%d1l,>>,-(%a1),%d1,%acc1 + mac.w %a1l,%d1l,>>,-(%a1),%d1,%acc2 + mac.w %a1l,%d1l,>>,-(%a1),%a3,%acc1 + mac.w %a1l,%d1l,>>,-(%a1),%a3,%acc2 + mac.w %a1l,%d1l,>>,-(%a1),%d2,%acc1 + mac.w %a1l,%d1l,>>,-(%a1),%d2,%acc2 + mac.w %a1l,%d1l,>>,-(%a1),%a7,%acc1 + mac.w %a1l,%d1l,>>,-(%a1),%a7,%acc2 + mac.w %a1l,%d1l,>>,-(%a1)&,%d1,%acc1 + mac.w %a1l,%d1l,>>,-(%a1)&,%d1,%acc2 + mac.w %a1l,%d1l,>>,-(%a1)&,%a3,%acc1 + mac.w %a1l,%d1l,>>,-(%a1)&,%a3,%acc2 + mac.w %a1l,%d1l,>>,-(%a1)&,%d2,%acc1 + mac.w %a1l,%d1l,>>,-(%a1)&,%d2,%acc2 + mac.w %a1l,%d1l,>>,-(%a1)&,%a7,%acc1 + mac.w %a1l,%d1l,>>,-(%a1)&,%a7,%acc2 + mac.w %a1l,%d1l,#1,(%a3),%d1,%acc1 + mac.w %a1l,%d1l,#1,(%a3),%d1,%acc2 + mac.w %a1l,%d1l,#1,(%a3),%a3,%acc1 + mac.w %a1l,%d1l,#1,(%a3),%a3,%acc2 + mac.w %a1l,%d1l,#1,(%a3),%d2,%acc1 + mac.w %a1l,%d1l,#1,(%a3),%d2,%acc2 + mac.w %a1l,%d1l,#1,(%a3),%a7,%acc1 + mac.w %a1l,%d1l,#1,(%a3),%a7,%acc2 + mac.w %a1l,%d1l,#1,(%a3)&,%d1,%acc1 + mac.w %a1l,%d1l,#1,(%a3)&,%d1,%acc2 + mac.w %a1l,%d1l,#1,(%a3)&,%a3,%acc1 + mac.w %a1l,%d1l,#1,(%a3)&,%a3,%acc2 + mac.w %a1l,%d1l,#1,(%a3)&,%d2,%acc1 + mac.w %a1l,%d1l,#1,(%a3)&,%d2,%acc2 + mac.w %a1l,%d1l,#1,(%a3)&,%a7,%acc1 + mac.w %a1l,%d1l,#1,(%a3)&,%a7,%acc2 + mac.w %a1l,%d1l,#1,(%a2)+,%d1,%acc1 + mac.w %a1l,%d1l,#1,(%a2)+,%d1,%acc2 + mac.w %a1l,%d1l,#1,(%a2)+,%a3,%acc1 + mac.w %a1l,%d1l,#1,(%a2)+,%a3,%acc2 + mac.w %a1l,%d1l,#1,(%a2)+,%d2,%acc1 + mac.w %a1l,%d1l,#1,(%a2)+,%d2,%acc2 + mac.w %a1l,%d1l,#1,(%a2)+,%a7,%acc1 + mac.w %a1l,%d1l,#1,(%a2)+,%a7,%acc2 + mac.w %a1l,%d1l,#1,(%a2)+&,%d1,%acc1 + mac.w %a1l,%d1l,#1,(%a2)+&,%d1,%acc2 + mac.w %a1l,%d1l,#1,(%a2)+&,%a3,%acc1 + mac.w %a1l,%d1l,#1,(%a2)+&,%a3,%acc2 + mac.w %a1l,%d1l,#1,(%a2)+&,%d2,%acc1 + mac.w %a1l,%d1l,#1,(%a2)+&,%d2,%acc2 + mac.w %a1l,%d1l,#1,(%a2)+&,%a7,%acc1 + mac.w %a1l,%d1l,#1,(%a2)+&,%a7,%acc2 + mac.w %a1l,%d1l,#1,10(%a6),%d1,%acc1 + mac.w %a1l,%d1l,#1,10(%a6),%d1,%acc2 + mac.w %a1l,%d1l,#1,10(%a6),%a3,%acc1 + mac.w %a1l,%d1l,#1,10(%a6),%a3,%acc2 + mac.w %a1l,%d1l,#1,10(%a6),%d2,%acc1 + mac.w %a1l,%d1l,#1,10(%a6),%d2,%acc2 + mac.w %a1l,%d1l,#1,10(%a6),%a7,%acc1 + mac.w %a1l,%d1l,#1,10(%a6),%a7,%acc2 + mac.w %a1l,%d1l,#1,10(%a6)&,%d1,%acc1 + mac.w %a1l,%d1l,#1,10(%a6)&,%d1,%acc2 + mac.w %a1l,%d1l,#1,10(%a6)&,%a3,%acc1 + mac.w %a1l,%d1l,#1,10(%a6)&,%a3,%acc2 + mac.w %a1l,%d1l,#1,10(%a6)&,%d2,%acc1 + mac.w %a1l,%d1l,#1,10(%a6)&,%d2,%acc2 + mac.w %a1l,%d1l,#1,10(%a6)&,%a7,%acc1 + mac.w %a1l,%d1l,#1,10(%a6)&,%a7,%acc2 + mac.w %a1l,%d1l,#1,-(%a1),%d1,%acc1 + mac.w %a1l,%d1l,#1,-(%a1),%d1,%acc2 + mac.w %a1l,%d1l,#1,-(%a1),%a3,%acc1 + mac.w %a1l,%d1l,#1,-(%a1),%a3,%acc2 + mac.w %a1l,%d1l,#1,-(%a1),%d2,%acc1 + mac.w %a1l,%d1l,#1,-(%a1),%d2,%acc2 + mac.w %a1l,%d1l,#1,-(%a1),%a7,%acc1 + mac.w %a1l,%d1l,#1,-(%a1),%a7,%acc2 + mac.w %a1l,%d1l,#1,-(%a1)&,%d1,%acc1 + mac.w %a1l,%d1l,#1,-(%a1)&,%d1,%acc2 + mac.w %a1l,%d1l,#1,-(%a1)&,%a3,%acc1 + mac.w %a1l,%d1l,#1,-(%a1)&,%a3,%acc2 + mac.w %a1l,%d1l,#1,-(%a1)&,%d2,%acc1 + mac.w %a1l,%d1l,#1,-(%a1)&,%d2,%acc2 + mac.w %a1l,%d1l,#1,-(%a1)&,%a7,%acc1 + mac.w %a1l,%d1l,#1,-(%a1)&,%a7,%acc2 + mac.w %a1l,%d1l,#-1,(%a3),%d1,%acc1 + mac.w %a1l,%d1l,#-1,(%a3),%d1,%acc2 + mac.w %a1l,%d1l,#-1,(%a3),%a3,%acc1 + mac.w %a1l,%d1l,#-1,(%a3),%a3,%acc2 + mac.w %a1l,%d1l,#-1,(%a3),%d2,%acc1 + mac.w %a1l,%d1l,#-1,(%a3),%d2,%acc2 + mac.w %a1l,%d1l,#-1,(%a3),%a7,%acc1 + mac.w %a1l,%d1l,#-1,(%a3),%a7,%acc2 + mac.w %a1l,%d1l,#-1,(%a3)&,%d1,%acc1 + mac.w %a1l,%d1l,#-1,(%a3)&,%d1,%acc2 + mac.w %a1l,%d1l,#-1,(%a3)&,%a3,%acc1 + mac.w %a1l,%d1l,#-1,(%a3)&,%a3,%acc2 + mac.w %a1l,%d1l,#-1,(%a3)&,%d2,%acc1 + mac.w %a1l,%d1l,#-1,(%a3)&,%d2,%acc2 + mac.w %a1l,%d1l,#-1,(%a3)&,%a7,%acc1 + mac.w %a1l,%d1l,#-1,(%a3)&,%a7,%acc2 + mac.w %a1l,%d1l,#-1,(%a2)+,%d1,%acc1 + mac.w %a1l,%d1l,#-1,(%a2)+,%d1,%acc2 + mac.w %a1l,%d1l,#-1,(%a2)+,%a3,%acc1 + mac.w %a1l,%d1l,#-1,(%a2)+,%a3,%acc2 + mac.w %a1l,%d1l,#-1,(%a2)+,%d2,%acc1 + mac.w %a1l,%d1l,#-1,(%a2)+,%d2,%acc2 + mac.w %a1l,%d1l,#-1,(%a2)+,%a7,%acc1 + mac.w %a1l,%d1l,#-1,(%a2)+,%a7,%acc2 + mac.w %a1l,%d1l,#-1,(%a2)+&,%d1,%acc1 + mac.w %a1l,%d1l,#-1,(%a2)+&,%d1,%acc2 + mac.w %a1l,%d1l,#-1,(%a2)+&,%a3,%acc1 + mac.w %a1l,%d1l,#-1,(%a2)+&,%a3,%acc2 + mac.w %a1l,%d1l,#-1,(%a2)+&,%d2,%acc1 + mac.w %a1l,%d1l,#-1,(%a2)+&,%d2,%acc2 + mac.w %a1l,%d1l,#-1,(%a2)+&,%a7,%acc1 + mac.w %a1l,%d1l,#-1,(%a2)+&,%a7,%acc2 + mac.w %a1l,%d1l,#-1,10(%a6),%d1,%acc1 + mac.w %a1l,%d1l,#-1,10(%a6),%d1,%acc2 + mac.w %a1l,%d1l,#-1,10(%a6),%a3,%acc1 + mac.w %a1l,%d1l,#-1,10(%a6),%a3,%acc2 + mac.w %a1l,%d1l,#-1,10(%a6),%d2,%acc1 + mac.w %a1l,%d1l,#-1,10(%a6),%d2,%acc2 + mac.w %a1l,%d1l,#-1,10(%a6),%a7,%acc1 + mac.w %a1l,%d1l,#-1,10(%a6),%a7,%acc2 + mac.w %a1l,%d1l,#-1,10(%a6)&,%d1,%acc1 + mac.w %a1l,%d1l,#-1,10(%a6)&,%d1,%acc2 + mac.w %a1l,%d1l,#-1,10(%a6)&,%a3,%acc1 + mac.w %a1l,%d1l,#-1,10(%a6)&,%a3,%acc2 + mac.w %a1l,%d1l,#-1,10(%a6)&,%d2,%acc1 + mac.w %a1l,%d1l,#-1,10(%a6)&,%d2,%acc2 + mac.w %a1l,%d1l,#-1,10(%a6)&,%a7,%acc1 + mac.w %a1l,%d1l,#-1,10(%a6)&,%a7,%acc2 + mac.w %a1l,%d1l,#-1,-(%a1),%d1,%acc1 + mac.w %a1l,%d1l,#-1,-(%a1),%d1,%acc2 + mac.w %a1l,%d1l,#-1,-(%a1),%a3,%acc1 + mac.w %a1l,%d1l,#-1,-(%a1),%a3,%acc2 + mac.w %a1l,%d1l,#-1,-(%a1),%d2,%acc1 + mac.w %a1l,%d1l,#-1,-(%a1),%d2,%acc2 + mac.w %a1l,%d1l,#-1,-(%a1),%a7,%acc1 + mac.w %a1l,%d1l,#-1,-(%a1),%a7,%acc2 + mac.w %a1l,%d1l,#-1,-(%a1)&,%d1,%acc1 + mac.w %a1l,%d1l,#-1,-(%a1)&,%d1,%acc2 + mac.w %a1l,%d1l,#-1,-(%a1)&,%a3,%acc1 + mac.w %a1l,%d1l,#-1,-(%a1)&,%a3,%acc2 + mac.w %a1l,%d1l,#-1,-(%a1)&,%d2,%acc1 + mac.w %a1l,%d1l,#-1,-(%a1)&,%d2,%acc2 + mac.w %a1l,%d1l,#-1,-(%a1)&,%a7,%acc1 + mac.w %a1l,%d1l,#-1,-(%a1)&,%a7,%acc2 + mac.w %d2u,%a2u,(%a3),%d1,%acc1 + mac.w %d2u,%a2u,(%a3),%d1,%acc2 + mac.w %d2u,%a2u,(%a3),%a3,%acc1 + mac.w %d2u,%a2u,(%a3),%a3,%acc2 + mac.w %d2u,%a2u,(%a3),%d2,%acc1 + mac.w %d2u,%a2u,(%a3),%d2,%acc2 + mac.w %d2u,%a2u,(%a3),%a7,%acc1 + mac.w %d2u,%a2u,(%a3),%a7,%acc2 + mac.w %d2u,%a2u,(%a3)&,%d1,%acc1 + mac.w %d2u,%a2u,(%a3)&,%d1,%acc2 + mac.w %d2u,%a2u,(%a3)&,%a3,%acc1 + mac.w %d2u,%a2u,(%a3)&,%a3,%acc2 + mac.w %d2u,%a2u,(%a3)&,%d2,%acc1 + mac.w %d2u,%a2u,(%a3)&,%d2,%acc2 + mac.w %d2u,%a2u,(%a3)&,%a7,%acc1 + mac.w %d2u,%a2u,(%a3)&,%a7,%acc2 + mac.w %d2u,%a2u,(%a2)+,%d1,%acc1 + mac.w %d2u,%a2u,(%a2)+,%d1,%acc2 + mac.w %d2u,%a2u,(%a2)+,%a3,%acc1 + mac.w %d2u,%a2u,(%a2)+,%a3,%acc2 + mac.w %d2u,%a2u,(%a2)+,%d2,%acc1 + mac.w %d2u,%a2u,(%a2)+,%d2,%acc2 + mac.w %d2u,%a2u,(%a2)+,%a7,%acc1 + mac.w %d2u,%a2u,(%a2)+,%a7,%acc2 + mac.w %d2u,%a2u,(%a2)+&,%d1,%acc1 + mac.w %d2u,%a2u,(%a2)+&,%d1,%acc2 + mac.w %d2u,%a2u,(%a2)+&,%a3,%acc1 + mac.w %d2u,%a2u,(%a2)+&,%a3,%acc2 + mac.w %d2u,%a2u,(%a2)+&,%d2,%acc1 + mac.w %d2u,%a2u,(%a2)+&,%d2,%acc2 + mac.w %d2u,%a2u,(%a2)+&,%a7,%acc1 + mac.w %d2u,%a2u,(%a2)+&,%a7,%acc2 + mac.w %d2u,%a2u,10(%a6),%d1,%acc1 + mac.w %d2u,%a2u,10(%a6),%d1,%acc2 + mac.w %d2u,%a2u,10(%a6),%a3,%acc1 + mac.w %d2u,%a2u,10(%a6),%a3,%acc2 + mac.w %d2u,%a2u,10(%a6),%d2,%acc1 + mac.w %d2u,%a2u,10(%a6),%d2,%acc2 + mac.w %d2u,%a2u,10(%a6),%a7,%acc1 + mac.w %d2u,%a2u,10(%a6),%a7,%acc2 + mac.w %d2u,%a2u,10(%a6)&,%d1,%acc1 + mac.w %d2u,%a2u,10(%a6)&,%d1,%acc2 + mac.w %d2u,%a2u,10(%a6)&,%a3,%acc1 + mac.w %d2u,%a2u,10(%a6)&,%a3,%acc2 + mac.w %d2u,%a2u,10(%a6)&,%d2,%acc1 + mac.w %d2u,%a2u,10(%a6)&,%d2,%acc2 + mac.w %d2u,%a2u,10(%a6)&,%a7,%acc1 + mac.w %d2u,%a2u,10(%a6)&,%a7,%acc2 + mac.w %d2u,%a2u,-(%a1),%d1,%acc1 + mac.w %d2u,%a2u,-(%a1),%d1,%acc2 + mac.w %d2u,%a2u,-(%a1),%a3,%acc1 + mac.w %d2u,%a2u,-(%a1),%a3,%acc2 + mac.w %d2u,%a2u,-(%a1),%d2,%acc1 + mac.w %d2u,%a2u,-(%a1),%d2,%acc2 + mac.w %d2u,%a2u,-(%a1),%a7,%acc1 + mac.w %d2u,%a2u,-(%a1),%a7,%acc2 + mac.w %d2u,%a2u,-(%a1)&,%d1,%acc1 + mac.w %d2u,%a2u,-(%a1)&,%d1,%acc2 + mac.w %d2u,%a2u,-(%a1)&,%a3,%acc1 + mac.w %d2u,%a2u,-(%a1)&,%a3,%acc2 + mac.w %d2u,%a2u,-(%a1)&,%d2,%acc1 + mac.w %d2u,%a2u,-(%a1)&,%d2,%acc2 + mac.w %d2u,%a2u,-(%a1)&,%a7,%acc1 + mac.w %d2u,%a2u,-(%a1)&,%a7,%acc2 + mac.w %d2u,%a2u,<<,(%a3),%d1,%acc1 + mac.w %d2u,%a2u,<<,(%a3),%d1,%acc2 + mac.w %d2u,%a2u,<<,(%a3),%a3,%acc1 + mac.w %d2u,%a2u,<<,(%a3),%a3,%acc2 + mac.w %d2u,%a2u,<<,(%a3),%d2,%acc1 + mac.w %d2u,%a2u,<<,(%a3),%d2,%acc2 + mac.w %d2u,%a2u,<<,(%a3),%a7,%acc1 + mac.w %d2u,%a2u,<<,(%a3),%a7,%acc2 + mac.w %d2u,%a2u,<<,(%a3)&,%d1,%acc1 + mac.w %d2u,%a2u,<<,(%a3)&,%d1,%acc2 + mac.w %d2u,%a2u,<<,(%a3)&,%a3,%acc1 + mac.w %d2u,%a2u,<<,(%a3)&,%a3,%acc2 + mac.w %d2u,%a2u,<<,(%a3)&,%d2,%acc1 + mac.w %d2u,%a2u,<<,(%a3)&,%d2,%acc2 + mac.w %d2u,%a2u,<<,(%a3)&,%a7,%acc1 + mac.w %d2u,%a2u,<<,(%a3)&,%a7,%acc2 + mac.w %d2u,%a2u,<<,(%a2)+,%d1,%acc1 + mac.w %d2u,%a2u,<<,(%a2)+,%d1,%acc2 + mac.w %d2u,%a2u,<<,(%a2)+,%a3,%acc1 + mac.w %d2u,%a2u,<<,(%a2)+,%a3,%acc2 + mac.w %d2u,%a2u,<<,(%a2)+,%d2,%acc1 + mac.w %d2u,%a2u,<<,(%a2)+,%d2,%acc2 + mac.w %d2u,%a2u,<<,(%a2)+,%a7,%acc1 + mac.w %d2u,%a2u,<<,(%a2)+,%a7,%acc2 + mac.w %d2u,%a2u,<<,(%a2)+&,%d1,%acc1 + mac.w %d2u,%a2u,<<,(%a2)+&,%d1,%acc2 + mac.w %d2u,%a2u,<<,(%a2)+&,%a3,%acc1 + mac.w %d2u,%a2u,<<,(%a2)+&,%a3,%acc2 + mac.w %d2u,%a2u,<<,(%a2)+&,%d2,%acc1 + mac.w %d2u,%a2u,<<,(%a2)+&,%d2,%acc2 + mac.w %d2u,%a2u,<<,(%a2)+&,%a7,%acc1 + mac.w %d2u,%a2u,<<,(%a2)+&,%a7,%acc2 + mac.w %d2u,%a2u,<<,10(%a6),%d1,%acc1 + mac.w %d2u,%a2u,<<,10(%a6),%d1,%acc2 + mac.w %d2u,%a2u,<<,10(%a6),%a3,%acc1 + mac.w %d2u,%a2u,<<,10(%a6),%a3,%acc2 + mac.w %d2u,%a2u,<<,10(%a6),%d2,%acc1 + mac.w %d2u,%a2u,<<,10(%a6),%d2,%acc2 + mac.w %d2u,%a2u,<<,10(%a6),%a7,%acc1 + mac.w %d2u,%a2u,<<,10(%a6),%a7,%acc2 + mac.w %d2u,%a2u,<<,10(%a6)&,%d1,%acc1 + mac.w %d2u,%a2u,<<,10(%a6)&,%d1,%acc2 + mac.w %d2u,%a2u,<<,10(%a6)&,%a3,%acc1 + mac.w %d2u,%a2u,<<,10(%a6)&,%a3,%acc2 + mac.w %d2u,%a2u,<<,10(%a6)&,%d2,%acc1 + mac.w %d2u,%a2u,<<,10(%a6)&,%d2,%acc2 + mac.w %d2u,%a2u,<<,10(%a6)&,%a7,%acc1 + mac.w %d2u,%a2u,<<,10(%a6)&,%a7,%acc2 + mac.w %d2u,%a2u,<<,-(%a1),%d1,%acc1 + mac.w %d2u,%a2u,<<,-(%a1),%d1,%acc2 + mac.w %d2u,%a2u,<<,-(%a1),%a3,%acc1 + mac.w %d2u,%a2u,<<,-(%a1),%a3,%acc2 + mac.w %d2u,%a2u,<<,-(%a1),%d2,%acc1 + mac.w %d2u,%a2u,<<,-(%a1),%d2,%acc2 + mac.w %d2u,%a2u,<<,-(%a1),%a7,%acc1 + mac.w %d2u,%a2u,<<,-(%a1),%a7,%acc2 + mac.w %d2u,%a2u,<<,-(%a1)&,%d1,%acc1 + mac.w %d2u,%a2u,<<,-(%a1)&,%d1,%acc2 + mac.w %d2u,%a2u,<<,-(%a1)&,%a3,%acc1 + mac.w %d2u,%a2u,<<,-(%a1)&,%a3,%acc2 + mac.w %d2u,%a2u,<<,-(%a1)&,%d2,%acc1 + mac.w %d2u,%a2u,<<,-(%a1)&,%d2,%acc2 + mac.w %d2u,%a2u,<<,-(%a1)&,%a7,%acc1 + mac.w %d2u,%a2u,<<,-(%a1)&,%a7,%acc2 + mac.w %d2u,%a2u,>>,(%a3),%d1,%acc1 + mac.w %d2u,%a2u,>>,(%a3),%d1,%acc2 + mac.w %d2u,%a2u,>>,(%a3),%a3,%acc1 + mac.w %d2u,%a2u,>>,(%a3),%a3,%acc2 + mac.w %d2u,%a2u,>>,(%a3),%d2,%acc1 + mac.w %d2u,%a2u,>>,(%a3),%d2,%acc2 + mac.w %d2u,%a2u,>>,(%a3),%a7,%acc1 + mac.w %d2u,%a2u,>>,(%a3),%a7,%acc2 + mac.w %d2u,%a2u,>>,(%a3)&,%d1,%acc1 + mac.w %d2u,%a2u,>>,(%a3)&,%d1,%acc2 + mac.w %d2u,%a2u,>>,(%a3)&,%a3,%acc1 + mac.w %d2u,%a2u,>>,(%a3)&,%a3,%acc2 + mac.w %d2u,%a2u,>>,(%a3)&,%d2,%acc1 + mac.w %d2u,%a2u,>>,(%a3)&,%d2,%acc2 + mac.w %d2u,%a2u,>>,(%a3)&,%a7,%acc1 + mac.w %d2u,%a2u,>>,(%a3)&,%a7,%acc2 + mac.w %d2u,%a2u,>>,(%a2)+,%d1,%acc1 + mac.w %d2u,%a2u,>>,(%a2)+,%d1,%acc2 + mac.w %d2u,%a2u,>>,(%a2)+,%a3,%acc1 + mac.w %d2u,%a2u,>>,(%a2)+,%a3,%acc2 + mac.w %d2u,%a2u,>>,(%a2)+,%d2,%acc1 + mac.w %d2u,%a2u,>>,(%a2)+,%d2,%acc2 + mac.w %d2u,%a2u,>>,(%a2)+,%a7,%acc1 + mac.w %d2u,%a2u,>>,(%a2)+,%a7,%acc2 + mac.w %d2u,%a2u,>>,(%a2)+&,%d1,%acc1 + mac.w %d2u,%a2u,>>,(%a2)+&,%d1,%acc2 + mac.w %d2u,%a2u,>>,(%a2)+&,%a3,%acc1 + mac.w %d2u,%a2u,>>,(%a2)+&,%a3,%acc2 + mac.w %d2u,%a2u,>>,(%a2)+&,%d2,%acc1 + mac.w %d2u,%a2u,>>,(%a2)+&,%d2,%acc2 + mac.w %d2u,%a2u,>>,(%a2)+&,%a7,%acc1 + mac.w %d2u,%a2u,>>,(%a2)+&,%a7,%acc2 + mac.w %d2u,%a2u,>>,10(%a6),%d1,%acc1 + mac.w %d2u,%a2u,>>,10(%a6),%d1,%acc2 + mac.w %d2u,%a2u,>>,10(%a6),%a3,%acc1 + mac.w %d2u,%a2u,>>,10(%a6),%a3,%acc2 + mac.w %d2u,%a2u,>>,10(%a6),%d2,%acc1 + mac.w %d2u,%a2u,>>,10(%a6),%d2,%acc2 + mac.w %d2u,%a2u,>>,10(%a6),%a7,%acc1 + mac.w %d2u,%a2u,>>,10(%a6),%a7,%acc2 + mac.w %d2u,%a2u,>>,10(%a6)&,%d1,%acc1 + mac.w %d2u,%a2u,>>,10(%a6)&,%d1,%acc2 + mac.w %d2u,%a2u,>>,10(%a6)&,%a3,%acc1 + mac.w %d2u,%a2u,>>,10(%a6)&,%a3,%acc2 + mac.w %d2u,%a2u,>>,10(%a6)&,%d2,%acc1 + mac.w %d2u,%a2u,>>,10(%a6)&,%d2,%acc2 + mac.w %d2u,%a2u,>>,10(%a6)&,%a7,%acc1 + mac.w %d2u,%a2u,>>,10(%a6)&,%a7,%acc2 + mac.w %d2u,%a2u,>>,-(%a1),%d1,%acc1 + mac.w %d2u,%a2u,>>,-(%a1),%d1,%acc2 + mac.w %d2u,%a2u,>>,-(%a1),%a3,%acc1 + mac.w %d2u,%a2u,>>,-(%a1),%a3,%acc2 + mac.w %d2u,%a2u,>>,-(%a1),%d2,%acc1 + mac.w %d2u,%a2u,>>,-(%a1),%d2,%acc2 + mac.w %d2u,%a2u,>>,-(%a1),%a7,%acc1 + mac.w %d2u,%a2u,>>,-(%a1),%a7,%acc2 + mac.w %d2u,%a2u,>>,-(%a1)&,%d1,%acc1 + mac.w %d2u,%a2u,>>,-(%a1)&,%d1,%acc2 + mac.w %d2u,%a2u,>>,-(%a1)&,%a3,%acc1 + mac.w %d2u,%a2u,>>,-(%a1)&,%a3,%acc2 + mac.w %d2u,%a2u,>>,-(%a1)&,%d2,%acc1 + mac.w %d2u,%a2u,>>,-(%a1)&,%d2,%acc2 + mac.w %d2u,%a2u,>>,-(%a1)&,%a7,%acc1 + mac.w %d2u,%a2u,>>,-(%a1)&,%a7,%acc2 + mac.w %d2u,%a2u,#1,(%a3),%d1,%acc1 + mac.w %d2u,%a2u,#1,(%a3),%d1,%acc2 + mac.w %d2u,%a2u,#1,(%a3),%a3,%acc1 + mac.w %d2u,%a2u,#1,(%a3),%a3,%acc2 + mac.w %d2u,%a2u,#1,(%a3),%d2,%acc1 + mac.w %d2u,%a2u,#1,(%a3),%d2,%acc2 + mac.w %d2u,%a2u,#1,(%a3),%a7,%acc1 + mac.w %d2u,%a2u,#1,(%a3),%a7,%acc2 + mac.w %d2u,%a2u,#1,(%a3)&,%d1,%acc1 + mac.w %d2u,%a2u,#1,(%a3)&,%d1,%acc2 + mac.w %d2u,%a2u,#1,(%a3)&,%a3,%acc1 + mac.w %d2u,%a2u,#1,(%a3)&,%a3,%acc2 + mac.w %d2u,%a2u,#1,(%a3)&,%d2,%acc1 + mac.w %d2u,%a2u,#1,(%a3)&,%d2,%acc2 + mac.w %d2u,%a2u,#1,(%a3)&,%a7,%acc1 + mac.w %d2u,%a2u,#1,(%a3)&,%a7,%acc2 + mac.w %d2u,%a2u,#1,(%a2)+,%d1,%acc1 + mac.w %d2u,%a2u,#1,(%a2)+,%d1,%acc2 + mac.w %d2u,%a2u,#1,(%a2)+,%a3,%acc1 + mac.w %d2u,%a2u,#1,(%a2)+,%a3,%acc2 + mac.w %d2u,%a2u,#1,(%a2)+,%d2,%acc1 + mac.w %d2u,%a2u,#1,(%a2)+,%d2,%acc2 + mac.w %d2u,%a2u,#1,(%a2)+,%a7,%acc1 + mac.w %d2u,%a2u,#1,(%a2)+,%a7,%acc2 + mac.w %d2u,%a2u,#1,(%a2)+&,%d1,%acc1 + mac.w %d2u,%a2u,#1,(%a2)+&,%d1,%acc2 + mac.w %d2u,%a2u,#1,(%a2)+&,%a3,%acc1 + mac.w %d2u,%a2u,#1,(%a2)+&,%a3,%acc2 + mac.w %d2u,%a2u,#1,(%a2)+&,%d2,%acc1 + mac.w %d2u,%a2u,#1,(%a2)+&,%d2,%acc2 + mac.w %d2u,%a2u,#1,(%a2)+&,%a7,%acc1 + mac.w %d2u,%a2u,#1,(%a2)+&,%a7,%acc2 + mac.w %d2u,%a2u,#1,10(%a6),%d1,%acc1 + mac.w %d2u,%a2u,#1,10(%a6),%d1,%acc2 + mac.w %d2u,%a2u,#1,10(%a6),%a3,%acc1 + mac.w %d2u,%a2u,#1,10(%a6),%a3,%acc2 + mac.w %d2u,%a2u,#1,10(%a6),%d2,%acc1 + mac.w %d2u,%a2u,#1,10(%a6),%d2,%acc2 + mac.w %d2u,%a2u,#1,10(%a6),%a7,%acc1 + mac.w %d2u,%a2u,#1,10(%a6),%a7,%acc2 + mac.w %d2u,%a2u,#1,10(%a6)&,%d1,%acc1 + mac.w %d2u,%a2u,#1,10(%a6)&,%d1,%acc2 + mac.w %d2u,%a2u,#1,10(%a6)&,%a3,%acc1 + mac.w %d2u,%a2u,#1,10(%a6)&,%a3,%acc2 + mac.w %d2u,%a2u,#1,10(%a6)&,%d2,%acc1 + mac.w %d2u,%a2u,#1,10(%a6)&,%d2,%acc2 + mac.w %d2u,%a2u,#1,10(%a6)&,%a7,%acc1 + mac.w %d2u,%a2u,#1,10(%a6)&,%a7,%acc2 + mac.w %d2u,%a2u,#1,-(%a1),%d1,%acc1 + mac.w %d2u,%a2u,#1,-(%a1),%d1,%acc2 + mac.w %d2u,%a2u,#1,-(%a1),%a3,%acc1 + mac.w %d2u,%a2u,#1,-(%a1),%a3,%acc2 + mac.w %d2u,%a2u,#1,-(%a1),%d2,%acc1 + mac.w %d2u,%a2u,#1,-(%a1),%d2,%acc2 + mac.w %d2u,%a2u,#1,-(%a1),%a7,%acc1 + mac.w %d2u,%a2u,#1,-(%a1),%a7,%acc2 + mac.w %d2u,%a2u,#1,-(%a1)&,%d1,%acc1 + mac.w %d2u,%a2u,#1,-(%a1)&,%d1,%acc2 + mac.w %d2u,%a2u,#1,-(%a1)&,%a3,%acc1 + mac.w %d2u,%a2u,#1,-(%a1)&,%a3,%acc2 + mac.w %d2u,%a2u,#1,-(%a1)&,%d2,%acc1 + mac.w %d2u,%a2u,#1,-(%a1)&,%d2,%acc2 + mac.w %d2u,%a2u,#1,-(%a1)&,%a7,%acc1 + mac.w %d2u,%a2u,#1,-(%a1)&,%a7,%acc2 + mac.w %d2u,%a2u,#-1,(%a3),%d1,%acc1 + mac.w %d2u,%a2u,#-1,(%a3),%d1,%acc2 + mac.w %d2u,%a2u,#-1,(%a3),%a3,%acc1 + mac.w %d2u,%a2u,#-1,(%a3),%a3,%acc2 + mac.w %d2u,%a2u,#-1,(%a3),%d2,%acc1 + mac.w %d2u,%a2u,#-1,(%a3),%d2,%acc2 + mac.w %d2u,%a2u,#-1,(%a3),%a7,%acc1 + mac.w %d2u,%a2u,#-1,(%a3),%a7,%acc2 + mac.w %d2u,%a2u,#-1,(%a3)&,%d1,%acc1 + mac.w %d2u,%a2u,#-1,(%a3)&,%d1,%acc2 + mac.w %d2u,%a2u,#-1,(%a3)&,%a3,%acc1 + mac.w %d2u,%a2u,#-1,(%a3)&,%a3,%acc2 + mac.w %d2u,%a2u,#-1,(%a3)&,%d2,%acc1 + mac.w %d2u,%a2u,#-1,(%a3)&,%d2,%acc2 + mac.w %d2u,%a2u,#-1,(%a3)&,%a7,%acc1 + mac.w %d2u,%a2u,#-1,(%a3)&,%a7,%acc2 + mac.w %d2u,%a2u,#-1,(%a2)+,%d1,%acc1 + mac.w %d2u,%a2u,#-1,(%a2)+,%d1,%acc2 + mac.w %d2u,%a2u,#-1,(%a2)+,%a3,%acc1 + mac.w %d2u,%a2u,#-1,(%a2)+,%a3,%acc2 + mac.w %d2u,%a2u,#-1,(%a2)+,%d2,%acc1 + mac.w %d2u,%a2u,#-1,(%a2)+,%d2,%acc2 + mac.w %d2u,%a2u,#-1,(%a2)+,%a7,%acc1 + mac.w %d2u,%a2u,#-1,(%a2)+,%a7,%acc2 + mac.w %d2u,%a2u,#-1,(%a2)+&,%d1,%acc1 + mac.w %d2u,%a2u,#-1,(%a2)+&,%d1,%acc2 + mac.w %d2u,%a2u,#-1,(%a2)+&,%a3,%acc1 + mac.w %d2u,%a2u,#-1,(%a2)+&,%a3,%acc2 + mac.w %d2u,%a2u,#-1,(%a2)+&,%d2,%acc1 + mac.w %d2u,%a2u,#-1,(%a2)+&,%d2,%acc2 + mac.w %d2u,%a2u,#-1,(%a2)+&,%a7,%acc1 + mac.w %d2u,%a2u,#-1,(%a2)+&,%a7,%acc2 + mac.w %d2u,%a2u,#-1,10(%a6),%d1,%acc1 + mac.w %d2u,%a2u,#-1,10(%a6),%d1,%acc2 + mac.w %d2u,%a2u,#-1,10(%a6),%a3,%acc1 + mac.w %d2u,%a2u,#-1,10(%a6),%a3,%acc2 + mac.w %d2u,%a2u,#-1,10(%a6),%d2,%acc1 + mac.w %d2u,%a2u,#-1,10(%a6),%d2,%acc2 + mac.w %d2u,%a2u,#-1,10(%a6),%a7,%acc1 + mac.w %d2u,%a2u,#-1,10(%a6),%a7,%acc2 + mac.w %d2u,%a2u,#-1,10(%a6)&,%d1,%acc1 + mac.w %d2u,%a2u,#-1,10(%a6)&,%d1,%acc2 + mac.w %d2u,%a2u,#-1,10(%a6)&,%a3,%acc1 + mac.w %d2u,%a2u,#-1,10(%a6)&,%a3,%acc2 + mac.w %d2u,%a2u,#-1,10(%a6)&,%d2,%acc1 + mac.w %d2u,%a2u,#-1,10(%a6)&,%d2,%acc2 + mac.w %d2u,%a2u,#-1,10(%a6)&,%a7,%acc1 + mac.w %d2u,%a2u,#-1,10(%a6)&,%a7,%acc2 + mac.w %d2u,%a2u,#-1,-(%a1),%d1,%acc1 + mac.w %d2u,%a2u,#-1,-(%a1),%d1,%acc2 + mac.w %d2u,%a2u,#-1,-(%a1),%a3,%acc1 + mac.w %d2u,%a2u,#-1,-(%a1),%a3,%acc2 + mac.w %d2u,%a2u,#-1,-(%a1),%d2,%acc1 + mac.w %d2u,%a2u,#-1,-(%a1),%d2,%acc2 + mac.w %d2u,%a2u,#-1,-(%a1),%a7,%acc1 + mac.w %d2u,%a2u,#-1,-(%a1),%a7,%acc2 + mac.w %d2u,%a2u,#-1,-(%a1)&,%d1,%acc1 + mac.w %d2u,%a2u,#-1,-(%a1)&,%d1,%acc2 + mac.w %d2u,%a2u,#-1,-(%a1)&,%a3,%acc1 + mac.w %d2u,%a2u,#-1,-(%a1)&,%a3,%acc2 + mac.w %d2u,%a2u,#-1,-(%a1)&,%d2,%acc1 + mac.w %d2u,%a2u,#-1,-(%a1)&,%d2,%acc2 + mac.w %d2u,%a2u,#-1,-(%a1)&,%a7,%acc1 + mac.w %d2u,%a2u,#-1,-(%a1)&,%a7,%acc2 + mac.w %d2u,%d3l,(%a3),%d1,%acc1 + mac.w %d2u,%d3l,(%a3),%d1,%acc2 + mac.w %d2u,%d3l,(%a3),%a3,%acc1 + mac.w %d2u,%d3l,(%a3),%a3,%acc2 + mac.w %d2u,%d3l,(%a3),%d2,%acc1 + mac.w %d2u,%d3l,(%a3),%d2,%acc2 + mac.w %d2u,%d3l,(%a3),%a7,%acc1 + mac.w %d2u,%d3l,(%a3),%a7,%acc2 + mac.w %d2u,%d3l,(%a3)&,%d1,%acc1 + mac.w %d2u,%d3l,(%a3)&,%d1,%acc2 + mac.w %d2u,%d3l,(%a3)&,%a3,%acc1 + mac.w %d2u,%d3l,(%a3)&,%a3,%acc2 + mac.w %d2u,%d3l,(%a3)&,%d2,%acc1 + mac.w %d2u,%d3l,(%a3)&,%d2,%acc2 + mac.w %d2u,%d3l,(%a3)&,%a7,%acc1 + mac.w %d2u,%d3l,(%a3)&,%a7,%acc2 + mac.w %d2u,%d3l,(%a2)+,%d1,%acc1 + mac.w %d2u,%d3l,(%a2)+,%d1,%acc2 + mac.w %d2u,%d3l,(%a2)+,%a3,%acc1 + mac.w %d2u,%d3l,(%a2)+,%a3,%acc2 + mac.w %d2u,%d3l,(%a2)+,%d2,%acc1 + mac.w %d2u,%d3l,(%a2)+,%d2,%acc2 + mac.w %d2u,%d3l,(%a2)+,%a7,%acc1 + mac.w %d2u,%d3l,(%a2)+,%a7,%acc2 + mac.w %d2u,%d3l,(%a2)+&,%d1,%acc1 + mac.w %d2u,%d3l,(%a2)+&,%d1,%acc2 + mac.w %d2u,%d3l,(%a2)+&,%a3,%acc1 + mac.w %d2u,%d3l,(%a2)+&,%a3,%acc2 + mac.w %d2u,%d3l,(%a2)+&,%d2,%acc1 + mac.w %d2u,%d3l,(%a2)+&,%d2,%acc2 + mac.w %d2u,%d3l,(%a2)+&,%a7,%acc1 + mac.w %d2u,%d3l,(%a2)+&,%a7,%acc2 + mac.w %d2u,%d3l,10(%a6),%d1,%acc1 + mac.w %d2u,%d3l,10(%a6),%d1,%acc2 + mac.w %d2u,%d3l,10(%a6),%a3,%acc1 + mac.w %d2u,%d3l,10(%a6),%a3,%acc2 + mac.w %d2u,%d3l,10(%a6),%d2,%acc1 + mac.w %d2u,%d3l,10(%a6),%d2,%acc2 + mac.w %d2u,%d3l,10(%a6),%a7,%acc1 + mac.w %d2u,%d3l,10(%a6),%a7,%acc2 + mac.w %d2u,%d3l,10(%a6)&,%d1,%acc1 + mac.w %d2u,%d3l,10(%a6)&,%d1,%acc2 + mac.w %d2u,%d3l,10(%a6)&,%a3,%acc1 + mac.w %d2u,%d3l,10(%a6)&,%a3,%acc2 + mac.w %d2u,%d3l,10(%a6)&,%d2,%acc1 + mac.w %d2u,%d3l,10(%a6)&,%d2,%acc2 + mac.w %d2u,%d3l,10(%a6)&,%a7,%acc1 + mac.w %d2u,%d3l,10(%a6)&,%a7,%acc2 + mac.w %d2u,%d3l,-(%a1),%d1,%acc1 + mac.w %d2u,%d3l,-(%a1),%d1,%acc2 + mac.w %d2u,%d3l,-(%a1),%a3,%acc1 + mac.w %d2u,%d3l,-(%a1),%a3,%acc2 + mac.w %d2u,%d3l,-(%a1),%d2,%acc1 + mac.w %d2u,%d3l,-(%a1),%d2,%acc2 + mac.w %d2u,%d3l,-(%a1),%a7,%acc1 + mac.w %d2u,%d3l,-(%a1),%a7,%acc2 + mac.w %d2u,%d3l,-(%a1)&,%d1,%acc1 + mac.w %d2u,%d3l,-(%a1)&,%d1,%acc2 + mac.w %d2u,%d3l,-(%a1)&,%a3,%acc1 + mac.w %d2u,%d3l,-(%a1)&,%a3,%acc2 + mac.w %d2u,%d3l,-(%a1)&,%d2,%acc1 + mac.w %d2u,%d3l,-(%a1)&,%d2,%acc2 + mac.w %d2u,%d3l,-(%a1)&,%a7,%acc1 + mac.w %d2u,%d3l,-(%a1)&,%a7,%acc2 + mac.w %d2u,%d3l,<<,(%a3),%d1,%acc1 + mac.w %d2u,%d3l,<<,(%a3),%d1,%acc2 + mac.w %d2u,%d3l,<<,(%a3),%a3,%acc1 + mac.w %d2u,%d3l,<<,(%a3),%a3,%acc2 + mac.w %d2u,%d3l,<<,(%a3),%d2,%acc1 + mac.w %d2u,%d3l,<<,(%a3),%d2,%acc2 + mac.w %d2u,%d3l,<<,(%a3),%a7,%acc1 + mac.w %d2u,%d3l,<<,(%a3),%a7,%acc2 + mac.w %d2u,%d3l,<<,(%a3)&,%d1,%acc1 + mac.w %d2u,%d3l,<<,(%a3)&,%d1,%acc2 + mac.w %d2u,%d3l,<<,(%a3)&,%a3,%acc1 + mac.w %d2u,%d3l,<<,(%a3)&,%a3,%acc2 + mac.w %d2u,%d3l,<<,(%a3)&,%d2,%acc1 + mac.w %d2u,%d3l,<<,(%a3)&,%d2,%acc2 + mac.w %d2u,%d3l,<<,(%a3)&,%a7,%acc1 + mac.w %d2u,%d3l,<<,(%a3)&,%a7,%acc2 + mac.w %d2u,%d3l,<<,(%a2)+,%d1,%acc1 + mac.w %d2u,%d3l,<<,(%a2)+,%d1,%acc2 + mac.w %d2u,%d3l,<<,(%a2)+,%a3,%acc1 + mac.w %d2u,%d3l,<<,(%a2)+,%a3,%acc2 + mac.w %d2u,%d3l,<<,(%a2)+,%d2,%acc1 + mac.w %d2u,%d3l,<<,(%a2)+,%d2,%acc2 + mac.w %d2u,%d3l,<<,(%a2)+,%a7,%acc1 + mac.w %d2u,%d3l,<<,(%a2)+,%a7,%acc2 + mac.w %d2u,%d3l,<<,(%a2)+&,%d1,%acc1 + mac.w %d2u,%d3l,<<,(%a2)+&,%d1,%acc2 + mac.w %d2u,%d3l,<<,(%a2)+&,%a3,%acc1 + mac.w %d2u,%d3l,<<,(%a2)+&,%a3,%acc2 + mac.w %d2u,%d3l,<<,(%a2)+&,%d2,%acc1 + mac.w %d2u,%d3l,<<,(%a2)+&,%d2,%acc2 + mac.w %d2u,%d3l,<<,(%a2)+&,%a7,%acc1 + mac.w %d2u,%d3l,<<,(%a2)+&,%a7,%acc2 + mac.w %d2u,%d3l,<<,10(%a6),%d1,%acc1 + mac.w %d2u,%d3l,<<,10(%a6),%d1,%acc2 + mac.w %d2u,%d3l,<<,10(%a6),%a3,%acc1 + mac.w %d2u,%d3l,<<,10(%a6),%a3,%acc2 + mac.w %d2u,%d3l,<<,10(%a6),%d2,%acc1 + mac.w %d2u,%d3l,<<,10(%a6),%d2,%acc2 + mac.w %d2u,%d3l,<<,10(%a6),%a7,%acc1 + mac.w %d2u,%d3l,<<,10(%a6),%a7,%acc2 + mac.w %d2u,%d3l,<<,10(%a6)&,%d1,%acc1 + mac.w %d2u,%d3l,<<,10(%a6)&,%d1,%acc2 + mac.w %d2u,%d3l,<<,10(%a6)&,%a3,%acc1 + mac.w %d2u,%d3l,<<,10(%a6)&,%a3,%acc2 + mac.w %d2u,%d3l,<<,10(%a6)&,%d2,%acc1 + mac.w %d2u,%d3l,<<,10(%a6)&,%d2,%acc2 + mac.w %d2u,%d3l,<<,10(%a6)&,%a7,%acc1 + mac.w %d2u,%d3l,<<,10(%a6)&,%a7,%acc2 + mac.w %d2u,%d3l,<<,-(%a1),%d1,%acc1 + mac.w %d2u,%d3l,<<,-(%a1),%d1,%acc2 + mac.w %d2u,%d3l,<<,-(%a1),%a3,%acc1 + mac.w %d2u,%d3l,<<,-(%a1),%a3,%acc2 + mac.w %d2u,%d3l,<<,-(%a1),%d2,%acc1 + mac.w %d2u,%d3l,<<,-(%a1),%d2,%acc2 + mac.w %d2u,%d3l,<<,-(%a1),%a7,%acc1 + mac.w %d2u,%d3l,<<,-(%a1),%a7,%acc2 + mac.w %d2u,%d3l,<<,-(%a1)&,%d1,%acc1 + mac.w %d2u,%d3l,<<,-(%a1)&,%d1,%acc2 + mac.w %d2u,%d3l,<<,-(%a1)&,%a3,%acc1 + mac.w %d2u,%d3l,<<,-(%a1)&,%a3,%acc2 + mac.w %d2u,%d3l,<<,-(%a1)&,%d2,%acc1 + mac.w %d2u,%d3l,<<,-(%a1)&,%d2,%acc2 + mac.w %d2u,%d3l,<<,-(%a1)&,%a7,%acc1 + mac.w %d2u,%d3l,<<,-(%a1)&,%a7,%acc2 + mac.w %d2u,%d3l,>>,(%a3),%d1,%acc1 + mac.w %d2u,%d3l,>>,(%a3),%d1,%acc2 + mac.w %d2u,%d3l,>>,(%a3),%a3,%acc1 + mac.w %d2u,%d3l,>>,(%a3),%a3,%acc2 + mac.w %d2u,%d3l,>>,(%a3),%d2,%acc1 + mac.w %d2u,%d3l,>>,(%a3),%d2,%acc2 + mac.w %d2u,%d3l,>>,(%a3),%a7,%acc1 + mac.w %d2u,%d3l,>>,(%a3),%a7,%acc2 + mac.w %d2u,%d3l,>>,(%a3)&,%d1,%acc1 + mac.w %d2u,%d3l,>>,(%a3)&,%d1,%acc2 + mac.w %d2u,%d3l,>>,(%a3)&,%a3,%acc1 + mac.w %d2u,%d3l,>>,(%a3)&,%a3,%acc2 + mac.w %d2u,%d3l,>>,(%a3)&,%d2,%acc1 + mac.w %d2u,%d3l,>>,(%a3)&,%d2,%acc2 + mac.w %d2u,%d3l,>>,(%a3)&,%a7,%acc1 + mac.w %d2u,%d3l,>>,(%a3)&,%a7,%acc2 + mac.w %d2u,%d3l,>>,(%a2)+,%d1,%acc1 + mac.w %d2u,%d3l,>>,(%a2)+,%d1,%acc2 + mac.w %d2u,%d3l,>>,(%a2)+,%a3,%acc1 + mac.w %d2u,%d3l,>>,(%a2)+,%a3,%acc2 + mac.w %d2u,%d3l,>>,(%a2)+,%d2,%acc1 + mac.w %d2u,%d3l,>>,(%a2)+,%d2,%acc2 + mac.w %d2u,%d3l,>>,(%a2)+,%a7,%acc1 + mac.w %d2u,%d3l,>>,(%a2)+,%a7,%acc2 + mac.w %d2u,%d3l,>>,(%a2)+&,%d1,%acc1 + mac.w %d2u,%d3l,>>,(%a2)+&,%d1,%acc2 + mac.w %d2u,%d3l,>>,(%a2)+&,%a3,%acc1 + mac.w %d2u,%d3l,>>,(%a2)+&,%a3,%acc2 + mac.w %d2u,%d3l,>>,(%a2)+&,%d2,%acc1 + mac.w %d2u,%d3l,>>,(%a2)+&,%d2,%acc2 + mac.w %d2u,%d3l,>>,(%a2)+&,%a7,%acc1 + mac.w %d2u,%d3l,>>,(%a2)+&,%a7,%acc2 + mac.w %d2u,%d3l,>>,10(%a6),%d1,%acc1 + mac.w %d2u,%d3l,>>,10(%a6),%d1,%acc2 + mac.w %d2u,%d3l,>>,10(%a6),%a3,%acc1 + mac.w %d2u,%d3l,>>,10(%a6),%a3,%acc2 + mac.w %d2u,%d3l,>>,10(%a6),%d2,%acc1 + mac.w %d2u,%d3l,>>,10(%a6),%d2,%acc2 + mac.w %d2u,%d3l,>>,10(%a6),%a7,%acc1 + mac.w %d2u,%d3l,>>,10(%a6),%a7,%acc2 + mac.w %d2u,%d3l,>>,10(%a6)&,%d1,%acc1 + mac.w %d2u,%d3l,>>,10(%a6)&,%d1,%acc2 + mac.w %d2u,%d3l,>>,10(%a6)&,%a3,%acc1 + mac.w %d2u,%d3l,>>,10(%a6)&,%a3,%acc2 + mac.w %d2u,%d3l,>>,10(%a6)&,%d2,%acc1 + mac.w %d2u,%d3l,>>,10(%a6)&,%d2,%acc2 + mac.w %d2u,%d3l,>>,10(%a6)&,%a7,%acc1 + mac.w %d2u,%d3l,>>,10(%a6)&,%a7,%acc2 + mac.w %d2u,%d3l,>>,-(%a1),%d1,%acc1 + mac.w %d2u,%d3l,>>,-(%a1),%d1,%acc2 + mac.w %d2u,%d3l,>>,-(%a1),%a3,%acc1 + mac.w %d2u,%d3l,>>,-(%a1),%a3,%acc2 + mac.w %d2u,%d3l,>>,-(%a1),%d2,%acc1 + mac.w %d2u,%d3l,>>,-(%a1),%d2,%acc2 + mac.w %d2u,%d3l,>>,-(%a1),%a7,%acc1 + mac.w %d2u,%d3l,>>,-(%a1),%a7,%acc2 + mac.w %d2u,%d3l,>>,-(%a1)&,%d1,%acc1 + mac.w %d2u,%d3l,>>,-(%a1)&,%d1,%acc2 + mac.w %d2u,%d3l,>>,-(%a1)&,%a3,%acc1 + mac.w %d2u,%d3l,>>,-(%a1)&,%a3,%acc2 + mac.w %d2u,%d3l,>>,-(%a1)&,%d2,%acc1 + mac.w %d2u,%d3l,>>,-(%a1)&,%d2,%acc2 + mac.w %d2u,%d3l,>>,-(%a1)&,%a7,%acc1 + mac.w %d2u,%d3l,>>,-(%a1)&,%a7,%acc2 + mac.w %d2u,%d3l,#1,(%a3),%d1,%acc1 + mac.w %d2u,%d3l,#1,(%a3),%d1,%acc2 + mac.w %d2u,%d3l,#1,(%a3),%a3,%acc1 + mac.w %d2u,%d3l,#1,(%a3),%a3,%acc2 + mac.w %d2u,%d3l,#1,(%a3),%d2,%acc1 + mac.w %d2u,%d3l,#1,(%a3),%d2,%acc2 + mac.w %d2u,%d3l,#1,(%a3),%a7,%acc1 + mac.w %d2u,%d3l,#1,(%a3),%a7,%acc2 + mac.w %d2u,%d3l,#1,(%a3)&,%d1,%acc1 + mac.w %d2u,%d3l,#1,(%a3)&,%d1,%acc2 + mac.w %d2u,%d3l,#1,(%a3)&,%a3,%acc1 + mac.w %d2u,%d3l,#1,(%a3)&,%a3,%acc2 + mac.w %d2u,%d3l,#1,(%a3)&,%d2,%acc1 + mac.w %d2u,%d3l,#1,(%a3)&,%d2,%acc2 + mac.w %d2u,%d3l,#1,(%a3)&,%a7,%acc1 + mac.w %d2u,%d3l,#1,(%a3)&,%a7,%acc2 + mac.w %d2u,%d3l,#1,(%a2)+,%d1,%acc1 + mac.w %d2u,%d3l,#1,(%a2)+,%d1,%acc2 + mac.w %d2u,%d3l,#1,(%a2)+,%a3,%acc1 + mac.w %d2u,%d3l,#1,(%a2)+,%a3,%acc2 + mac.w %d2u,%d3l,#1,(%a2)+,%d2,%acc1 + mac.w %d2u,%d3l,#1,(%a2)+,%d2,%acc2 + mac.w %d2u,%d3l,#1,(%a2)+,%a7,%acc1 + mac.w %d2u,%d3l,#1,(%a2)+,%a7,%acc2 + mac.w %d2u,%d3l,#1,(%a2)+&,%d1,%acc1 + mac.w %d2u,%d3l,#1,(%a2)+&,%d1,%acc2 + mac.w %d2u,%d3l,#1,(%a2)+&,%a3,%acc1 + mac.w %d2u,%d3l,#1,(%a2)+&,%a3,%acc2 + mac.w %d2u,%d3l,#1,(%a2)+&,%d2,%acc1 + mac.w %d2u,%d3l,#1,(%a2)+&,%d2,%acc2 + mac.w %d2u,%d3l,#1,(%a2)+&,%a7,%acc1 + mac.w %d2u,%d3l,#1,(%a2)+&,%a7,%acc2 + mac.w %d2u,%d3l,#1,10(%a6),%d1,%acc1 + mac.w %d2u,%d3l,#1,10(%a6),%d1,%acc2 + mac.w %d2u,%d3l,#1,10(%a6),%a3,%acc1 + mac.w %d2u,%d3l,#1,10(%a6),%a3,%acc2 + mac.w %d2u,%d3l,#1,10(%a6),%d2,%acc1 + mac.w %d2u,%d3l,#1,10(%a6),%d2,%acc2 + mac.w %d2u,%d3l,#1,10(%a6),%a7,%acc1 + mac.w %d2u,%d3l,#1,10(%a6),%a7,%acc2 + mac.w %d2u,%d3l,#1,10(%a6)&,%d1,%acc1 + mac.w %d2u,%d3l,#1,10(%a6)&,%d1,%acc2 + mac.w %d2u,%d3l,#1,10(%a6)&,%a3,%acc1 + mac.w %d2u,%d3l,#1,10(%a6)&,%a3,%acc2 + mac.w %d2u,%d3l,#1,10(%a6)&,%d2,%acc1 + mac.w %d2u,%d3l,#1,10(%a6)&,%d2,%acc2 + mac.w %d2u,%d3l,#1,10(%a6)&,%a7,%acc1 + mac.w %d2u,%d3l,#1,10(%a6)&,%a7,%acc2 + mac.w %d2u,%d3l,#1,-(%a1),%d1,%acc1 + mac.w %d2u,%d3l,#1,-(%a1),%d1,%acc2 + mac.w %d2u,%d3l,#1,-(%a1),%a3,%acc1 + mac.w %d2u,%d3l,#1,-(%a1),%a3,%acc2 + mac.w %d2u,%d3l,#1,-(%a1),%d2,%acc1 + mac.w %d2u,%d3l,#1,-(%a1),%d2,%acc2 + mac.w %d2u,%d3l,#1,-(%a1),%a7,%acc1 + mac.w %d2u,%d3l,#1,-(%a1),%a7,%acc2 + mac.w %d2u,%d3l,#1,-(%a1)&,%d1,%acc1 + mac.w %d2u,%d3l,#1,-(%a1)&,%d1,%acc2 + mac.w %d2u,%d3l,#1,-(%a1)&,%a3,%acc1 + mac.w %d2u,%d3l,#1,-(%a1)&,%a3,%acc2 + mac.w %d2u,%d3l,#1,-(%a1)&,%d2,%acc1 + mac.w %d2u,%d3l,#1,-(%a1)&,%d2,%acc2 + mac.w %d2u,%d3l,#1,-(%a1)&,%a7,%acc1 + mac.w %d2u,%d3l,#1,-(%a1)&,%a7,%acc2 + mac.w %d2u,%d3l,#-1,(%a3),%d1,%acc1 + mac.w %d2u,%d3l,#-1,(%a3),%d1,%acc2 + mac.w %d2u,%d3l,#-1,(%a3),%a3,%acc1 + mac.w %d2u,%d3l,#-1,(%a3),%a3,%acc2 + mac.w %d2u,%d3l,#-1,(%a3),%d2,%acc1 + mac.w %d2u,%d3l,#-1,(%a3),%d2,%acc2 + mac.w %d2u,%d3l,#-1,(%a3),%a7,%acc1 + mac.w %d2u,%d3l,#-1,(%a3),%a7,%acc2 + mac.w %d2u,%d3l,#-1,(%a3)&,%d1,%acc1 + mac.w %d2u,%d3l,#-1,(%a3)&,%d1,%acc2 + mac.w %d2u,%d3l,#-1,(%a3)&,%a3,%acc1 + mac.w %d2u,%d3l,#-1,(%a3)&,%a3,%acc2 + mac.w %d2u,%d3l,#-1,(%a3)&,%d2,%acc1 + mac.w %d2u,%d3l,#-1,(%a3)&,%d2,%acc2 + mac.w %d2u,%d3l,#-1,(%a3)&,%a7,%acc1 + mac.w %d2u,%d3l,#-1,(%a3)&,%a7,%acc2 + mac.w %d2u,%d3l,#-1,(%a2)+,%d1,%acc1 + mac.w %d2u,%d3l,#-1,(%a2)+,%d1,%acc2 + mac.w %d2u,%d3l,#-1,(%a2)+,%a3,%acc1 + mac.w %d2u,%d3l,#-1,(%a2)+,%a3,%acc2 + mac.w %d2u,%d3l,#-1,(%a2)+,%d2,%acc1 + mac.w %d2u,%d3l,#-1,(%a2)+,%d2,%acc2 + mac.w %d2u,%d3l,#-1,(%a2)+,%a7,%acc1 + mac.w %d2u,%d3l,#-1,(%a2)+,%a7,%acc2 + mac.w %d2u,%d3l,#-1,(%a2)+&,%d1,%acc1 + mac.w %d2u,%d3l,#-1,(%a2)+&,%d1,%acc2 + mac.w %d2u,%d3l,#-1,(%a2)+&,%a3,%acc1 + mac.w %d2u,%d3l,#-1,(%a2)+&,%a3,%acc2 + mac.w %d2u,%d3l,#-1,(%a2)+&,%d2,%acc1 + mac.w %d2u,%d3l,#-1,(%a2)+&,%d2,%acc2 + mac.w %d2u,%d3l,#-1,(%a2)+&,%a7,%acc1 + mac.w %d2u,%d3l,#-1,(%a2)+&,%a7,%acc2 + mac.w %d2u,%d3l,#-1,10(%a6),%d1,%acc1 + mac.w %d2u,%d3l,#-1,10(%a6),%d1,%acc2 + mac.w %d2u,%d3l,#-1,10(%a6),%a3,%acc1 + mac.w %d2u,%d3l,#-1,10(%a6),%a3,%acc2 + mac.w %d2u,%d3l,#-1,10(%a6),%d2,%acc1 + mac.w %d2u,%d3l,#-1,10(%a6),%d2,%acc2 + mac.w %d2u,%d3l,#-1,10(%a6),%a7,%acc1 + mac.w %d2u,%d3l,#-1,10(%a6),%a7,%acc2 + mac.w %d2u,%d3l,#-1,10(%a6)&,%d1,%acc1 + mac.w %d2u,%d3l,#-1,10(%a6)&,%d1,%acc2 + mac.w %d2u,%d3l,#-1,10(%a6)&,%a3,%acc1 + mac.w %d2u,%d3l,#-1,10(%a6)&,%a3,%acc2 + mac.w %d2u,%d3l,#-1,10(%a6)&,%d2,%acc1 + mac.w %d2u,%d3l,#-1,10(%a6)&,%d2,%acc2 + mac.w %d2u,%d3l,#-1,10(%a6)&,%a7,%acc1 + mac.w %d2u,%d3l,#-1,10(%a6)&,%a7,%acc2 + mac.w %d2u,%d3l,#-1,-(%a1),%d1,%acc1 + mac.w %d2u,%d3l,#-1,-(%a1),%d1,%acc2 + mac.w %d2u,%d3l,#-1,-(%a1),%a3,%acc1 + mac.w %d2u,%d3l,#-1,-(%a1),%a3,%acc2 + mac.w %d2u,%d3l,#-1,-(%a1),%d2,%acc1 + mac.w %d2u,%d3l,#-1,-(%a1),%d2,%acc2 + mac.w %d2u,%d3l,#-1,-(%a1),%a7,%acc1 + mac.w %d2u,%d3l,#-1,-(%a1),%a7,%acc2 + mac.w %d2u,%d3l,#-1,-(%a1)&,%d1,%acc1 + mac.w %d2u,%d3l,#-1,-(%a1)&,%d1,%acc2 + mac.w %d2u,%d3l,#-1,-(%a1)&,%a3,%acc1 + mac.w %d2u,%d3l,#-1,-(%a1)&,%a3,%acc2 + mac.w %d2u,%d3l,#-1,-(%a1)&,%d2,%acc1 + mac.w %d2u,%d3l,#-1,-(%a1)&,%d2,%acc2 + mac.w %d2u,%d3l,#-1,-(%a1)&,%a7,%acc1 + mac.w %d2u,%d3l,#-1,-(%a1)&,%a7,%acc2 + mac.w %d2u,%a7u,(%a3),%d1,%acc1 + mac.w %d2u,%a7u,(%a3),%d1,%acc2 + mac.w %d2u,%a7u,(%a3),%a3,%acc1 + mac.w %d2u,%a7u,(%a3),%a3,%acc2 + mac.w %d2u,%a7u,(%a3),%d2,%acc1 + mac.w %d2u,%a7u,(%a3),%d2,%acc2 + mac.w %d2u,%a7u,(%a3),%a7,%acc1 + mac.w %d2u,%a7u,(%a3),%a7,%acc2 + mac.w %d2u,%a7u,(%a3)&,%d1,%acc1 + mac.w %d2u,%a7u,(%a3)&,%d1,%acc2 + mac.w %d2u,%a7u,(%a3)&,%a3,%acc1 + mac.w %d2u,%a7u,(%a3)&,%a3,%acc2 + mac.w %d2u,%a7u,(%a3)&,%d2,%acc1 + mac.w %d2u,%a7u,(%a3)&,%d2,%acc2 + mac.w %d2u,%a7u,(%a3)&,%a7,%acc1 + mac.w %d2u,%a7u,(%a3)&,%a7,%acc2 + mac.w %d2u,%a7u,(%a2)+,%d1,%acc1 + mac.w %d2u,%a7u,(%a2)+,%d1,%acc2 + mac.w %d2u,%a7u,(%a2)+,%a3,%acc1 + mac.w %d2u,%a7u,(%a2)+,%a3,%acc2 + mac.w %d2u,%a7u,(%a2)+,%d2,%acc1 + mac.w %d2u,%a7u,(%a2)+,%d2,%acc2 + mac.w %d2u,%a7u,(%a2)+,%a7,%acc1 + mac.w %d2u,%a7u,(%a2)+,%a7,%acc2 + mac.w %d2u,%a7u,(%a2)+&,%d1,%acc1 + mac.w %d2u,%a7u,(%a2)+&,%d1,%acc2 + mac.w %d2u,%a7u,(%a2)+&,%a3,%acc1 + mac.w %d2u,%a7u,(%a2)+&,%a3,%acc2 + mac.w %d2u,%a7u,(%a2)+&,%d2,%acc1 + mac.w %d2u,%a7u,(%a2)+&,%d2,%acc2 + mac.w %d2u,%a7u,(%a2)+&,%a7,%acc1 + mac.w %d2u,%a7u,(%a2)+&,%a7,%acc2 + mac.w %d2u,%a7u,10(%a6),%d1,%acc1 + mac.w %d2u,%a7u,10(%a6),%d1,%acc2 + mac.w %d2u,%a7u,10(%a6),%a3,%acc1 + mac.w %d2u,%a7u,10(%a6),%a3,%acc2 + mac.w %d2u,%a7u,10(%a6),%d2,%acc1 + mac.w %d2u,%a7u,10(%a6),%d2,%acc2 + mac.w %d2u,%a7u,10(%a6),%a7,%acc1 + mac.w %d2u,%a7u,10(%a6),%a7,%acc2 + mac.w %d2u,%a7u,10(%a6)&,%d1,%acc1 + mac.w %d2u,%a7u,10(%a6)&,%d1,%acc2 + mac.w %d2u,%a7u,10(%a6)&,%a3,%acc1 + mac.w %d2u,%a7u,10(%a6)&,%a3,%acc2 + mac.w %d2u,%a7u,10(%a6)&,%d2,%acc1 + mac.w %d2u,%a7u,10(%a6)&,%d2,%acc2 + mac.w %d2u,%a7u,10(%a6)&,%a7,%acc1 + mac.w %d2u,%a7u,10(%a6)&,%a7,%acc2 + mac.w %d2u,%a7u,-(%a1),%d1,%acc1 + mac.w %d2u,%a7u,-(%a1),%d1,%acc2 + mac.w %d2u,%a7u,-(%a1),%a3,%acc1 + mac.w %d2u,%a7u,-(%a1),%a3,%acc2 + mac.w %d2u,%a7u,-(%a1),%d2,%acc1 + mac.w %d2u,%a7u,-(%a1),%d2,%acc2 + mac.w %d2u,%a7u,-(%a1),%a7,%acc1 + mac.w %d2u,%a7u,-(%a1),%a7,%acc2 + mac.w %d2u,%a7u,-(%a1)&,%d1,%acc1 + mac.w %d2u,%a7u,-(%a1)&,%d1,%acc2 + mac.w %d2u,%a7u,-(%a1)&,%a3,%acc1 + mac.w %d2u,%a7u,-(%a1)&,%a3,%acc2 + mac.w %d2u,%a7u,-(%a1)&,%d2,%acc1 + mac.w %d2u,%a7u,-(%a1)&,%d2,%acc2 + mac.w %d2u,%a7u,-(%a1)&,%a7,%acc1 + mac.w %d2u,%a7u,-(%a1)&,%a7,%acc2 + mac.w %d2u,%a7u,<<,(%a3),%d1,%acc1 + mac.w %d2u,%a7u,<<,(%a3),%d1,%acc2 + mac.w %d2u,%a7u,<<,(%a3),%a3,%acc1 + mac.w %d2u,%a7u,<<,(%a3),%a3,%acc2 + mac.w %d2u,%a7u,<<,(%a3),%d2,%acc1 + mac.w %d2u,%a7u,<<,(%a3),%d2,%acc2 + mac.w %d2u,%a7u,<<,(%a3),%a7,%acc1 + mac.w %d2u,%a7u,<<,(%a3),%a7,%acc2 + mac.w %d2u,%a7u,<<,(%a3)&,%d1,%acc1 + mac.w %d2u,%a7u,<<,(%a3)&,%d1,%acc2 + mac.w %d2u,%a7u,<<,(%a3)&,%a3,%acc1 + mac.w %d2u,%a7u,<<,(%a3)&,%a3,%acc2 + mac.w %d2u,%a7u,<<,(%a3)&,%d2,%acc1 + mac.w %d2u,%a7u,<<,(%a3)&,%d2,%acc2 + mac.w %d2u,%a7u,<<,(%a3)&,%a7,%acc1 + mac.w %d2u,%a7u,<<,(%a3)&,%a7,%acc2 + mac.w %d2u,%a7u,<<,(%a2)+,%d1,%acc1 + mac.w %d2u,%a7u,<<,(%a2)+,%d1,%acc2 + mac.w %d2u,%a7u,<<,(%a2)+,%a3,%acc1 + mac.w %d2u,%a7u,<<,(%a2)+,%a3,%acc2 + mac.w %d2u,%a7u,<<,(%a2)+,%d2,%acc1 + mac.w %d2u,%a7u,<<,(%a2)+,%d2,%acc2 + mac.w %d2u,%a7u,<<,(%a2)+,%a7,%acc1 + mac.w %d2u,%a7u,<<,(%a2)+,%a7,%acc2 + mac.w %d2u,%a7u,<<,(%a2)+&,%d1,%acc1 + mac.w %d2u,%a7u,<<,(%a2)+&,%d1,%acc2 + mac.w %d2u,%a7u,<<,(%a2)+&,%a3,%acc1 + mac.w %d2u,%a7u,<<,(%a2)+&,%a3,%acc2 + mac.w %d2u,%a7u,<<,(%a2)+&,%d2,%acc1 + mac.w %d2u,%a7u,<<,(%a2)+&,%d2,%acc2 + mac.w %d2u,%a7u,<<,(%a2)+&,%a7,%acc1 + mac.w %d2u,%a7u,<<,(%a2)+&,%a7,%acc2 + mac.w %d2u,%a7u,<<,10(%a6),%d1,%acc1 + mac.w %d2u,%a7u,<<,10(%a6),%d1,%acc2 + mac.w %d2u,%a7u,<<,10(%a6),%a3,%acc1 + mac.w %d2u,%a7u,<<,10(%a6),%a3,%acc2 + mac.w %d2u,%a7u,<<,10(%a6),%d2,%acc1 + mac.w %d2u,%a7u,<<,10(%a6),%d2,%acc2 + mac.w %d2u,%a7u,<<,10(%a6),%a7,%acc1 + mac.w %d2u,%a7u,<<,10(%a6),%a7,%acc2 + mac.w %d2u,%a7u,<<,10(%a6)&,%d1,%acc1 + mac.w %d2u,%a7u,<<,10(%a6)&,%d1,%acc2 + mac.w %d2u,%a7u,<<,10(%a6)&,%a3,%acc1 + mac.w %d2u,%a7u,<<,10(%a6)&,%a3,%acc2 + mac.w %d2u,%a7u,<<,10(%a6)&,%d2,%acc1 + mac.w %d2u,%a7u,<<,10(%a6)&,%d2,%acc2 + mac.w %d2u,%a7u,<<,10(%a6)&,%a7,%acc1 + mac.w %d2u,%a7u,<<,10(%a6)&,%a7,%acc2 + mac.w %d2u,%a7u,<<,-(%a1),%d1,%acc1 + mac.w %d2u,%a7u,<<,-(%a1),%d1,%acc2 + mac.w %d2u,%a7u,<<,-(%a1),%a3,%acc1 + mac.w %d2u,%a7u,<<,-(%a1),%a3,%acc2 + mac.w %d2u,%a7u,<<,-(%a1),%d2,%acc1 + mac.w %d2u,%a7u,<<,-(%a1),%d2,%acc2 + mac.w %d2u,%a7u,<<,-(%a1),%a7,%acc1 + mac.w %d2u,%a7u,<<,-(%a1),%a7,%acc2 + mac.w %d2u,%a7u,<<,-(%a1)&,%d1,%acc1 + mac.w %d2u,%a7u,<<,-(%a1)&,%d1,%acc2 + mac.w %d2u,%a7u,<<,-(%a1)&,%a3,%acc1 + mac.w %d2u,%a7u,<<,-(%a1)&,%a3,%acc2 + mac.w %d2u,%a7u,<<,-(%a1)&,%d2,%acc1 + mac.w %d2u,%a7u,<<,-(%a1)&,%d2,%acc2 + mac.w %d2u,%a7u,<<,-(%a1)&,%a7,%acc1 + mac.w %d2u,%a7u,<<,-(%a1)&,%a7,%acc2 + mac.w %d2u,%a7u,>>,(%a3),%d1,%acc1 + mac.w %d2u,%a7u,>>,(%a3),%d1,%acc2 + mac.w %d2u,%a7u,>>,(%a3),%a3,%acc1 + mac.w %d2u,%a7u,>>,(%a3),%a3,%acc2 + mac.w %d2u,%a7u,>>,(%a3),%d2,%acc1 + mac.w %d2u,%a7u,>>,(%a3),%d2,%acc2 + mac.w %d2u,%a7u,>>,(%a3),%a7,%acc1 + mac.w %d2u,%a7u,>>,(%a3),%a7,%acc2 + mac.w %d2u,%a7u,>>,(%a3)&,%d1,%acc1 + mac.w %d2u,%a7u,>>,(%a3)&,%d1,%acc2 + mac.w %d2u,%a7u,>>,(%a3)&,%a3,%acc1 + mac.w %d2u,%a7u,>>,(%a3)&,%a3,%acc2 + mac.w %d2u,%a7u,>>,(%a3)&,%d2,%acc1 + mac.w %d2u,%a7u,>>,(%a3)&,%d2,%acc2 + mac.w %d2u,%a7u,>>,(%a3)&,%a7,%acc1 + mac.w %d2u,%a7u,>>,(%a3)&,%a7,%acc2 + mac.w %d2u,%a7u,>>,(%a2)+,%d1,%acc1 + mac.w %d2u,%a7u,>>,(%a2)+,%d1,%acc2 + mac.w %d2u,%a7u,>>,(%a2)+,%a3,%acc1 + mac.w %d2u,%a7u,>>,(%a2)+,%a3,%acc2 + mac.w %d2u,%a7u,>>,(%a2)+,%d2,%acc1 + mac.w %d2u,%a7u,>>,(%a2)+,%d2,%acc2 + mac.w %d2u,%a7u,>>,(%a2)+,%a7,%acc1 + mac.w %d2u,%a7u,>>,(%a2)+,%a7,%acc2 + mac.w %d2u,%a7u,>>,(%a2)+&,%d1,%acc1 + mac.w %d2u,%a7u,>>,(%a2)+&,%d1,%acc2 + mac.w %d2u,%a7u,>>,(%a2)+&,%a3,%acc1 + mac.w %d2u,%a7u,>>,(%a2)+&,%a3,%acc2 + mac.w %d2u,%a7u,>>,(%a2)+&,%d2,%acc1 + mac.w %d2u,%a7u,>>,(%a2)+&,%d2,%acc2 + mac.w %d2u,%a7u,>>,(%a2)+&,%a7,%acc1 + mac.w %d2u,%a7u,>>,(%a2)+&,%a7,%acc2 + mac.w %d2u,%a7u,>>,10(%a6),%d1,%acc1 + mac.w %d2u,%a7u,>>,10(%a6),%d1,%acc2 + mac.w %d2u,%a7u,>>,10(%a6),%a3,%acc1 + mac.w %d2u,%a7u,>>,10(%a6),%a3,%acc2 + mac.w %d2u,%a7u,>>,10(%a6),%d2,%acc1 + mac.w %d2u,%a7u,>>,10(%a6),%d2,%acc2 + mac.w %d2u,%a7u,>>,10(%a6),%a7,%acc1 + mac.w %d2u,%a7u,>>,10(%a6),%a7,%acc2 + mac.w %d2u,%a7u,>>,10(%a6)&,%d1,%acc1 + mac.w %d2u,%a7u,>>,10(%a6)&,%d1,%acc2 + mac.w %d2u,%a7u,>>,10(%a6)&,%a3,%acc1 + mac.w %d2u,%a7u,>>,10(%a6)&,%a3,%acc2 + mac.w %d2u,%a7u,>>,10(%a6)&,%d2,%acc1 + mac.w %d2u,%a7u,>>,10(%a6)&,%d2,%acc2 + mac.w %d2u,%a7u,>>,10(%a6)&,%a7,%acc1 + mac.w %d2u,%a7u,>>,10(%a6)&,%a7,%acc2 + mac.w %d2u,%a7u,>>,-(%a1),%d1,%acc1 + mac.w %d2u,%a7u,>>,-(%a1),%d1,%acc2 + mac.w %d2u,%a7u,>>,-(%a1),%a3,%acc1 + mac.w %d2u,%a7u,>>,-(%a1),%a3,%acc2 + mac.w %d2u,%a7u,>>,-(%a1),%d2,%acc1 + mac.w %d2u,%a7u,>>,-(%a1),%d2,%acc2 + mac.w %d2u,%a7u,>>,-(%a1),%a7,%acc1 + mac.w %d2u,%a7u,>>,-(%a1),%a7,%acc2 + mac.w %d2u,%a7u,>>,-(%a1)&,%d1,%acc1 + mac.w %d2u,%a7u,>>,-(%a1)&,%d1,%acc2 + mac.w %d2u,%a7u,>>,-(%a1)&,%a3,%acc1 + mac.w %d2u,%a7u,>>,-(%a1)&,%a3,%acc2 + mac.w %d2u,%a7u,>>,-(%a1)&,%d2,%acc1 + mac.w %d2u,%a7u,>>,-(%a1)&,%d2,%acc2 + mac.w %d2u,%a7u,>>,-(%a1)&,%a7,%acc1 + mac.w %d2u,%a7u,>>,-(%a1)&,%a7,%acc2 + mac.w %d2u,%a7u,#1,(%a3),%d1,%acc1 + mac.w %d2u,%a7u,#1,(%a3),%d1,%acc2 + mac.w %d2u,%a7u,#1,(%a3),%a3,%acc1 + mac.w %d2u,%a7u,#1,(%a3),%a3,%acc2 + mac.w %d2u,%a7u,#1,(%a3),%d2,%acc1 + mac.w %d2u,%a7u,#1,(%a3),%d2,%acc2 + mac.w %d2u,%a7u,#1,(%a3),%a7,%acc1 + mac.w %d2u,%a7u,#1,(%a3),%a7,%acc2 + mac.w %d2u,%a7u,#1,(%a3)&,%d1,%acc1 + mac.w %d2u,%a7u,#1,(%a3)&,%d1,%acc2 + mac.w %d2u,%a7u,#1,(%a3)&,%a3,%acc1 + mac.w %d2u,%a7u,#1,(%a3)&,%a3,%acc2 + mac.w %d2u,%a7u,#1,(%a3)&,%d2,%acc1 + mac.w %d2u,%a7u,#1,(%a3)&,%d2,%acc2 + mac.w %d2u,%a7u,#1,(%a3)&,%a7,%acc1 + mac.w %d2u,%a7u,#1,(%a3)&,%a7,%acc2 + mac.w %d2u,%a7u,#1,(%a2)+,%d1,%acc1 + mac.w %d2u,%a7u,#1,(%a2)+,%d1,%acc2 + mac.w %d2u,%a7u,#1,(%a2)+,%a3,%acc1 + mac.w %d2u,%a7u,#1,(%a2)+,%a3,%acc2 + mac.w %d2u,%a7u,#1,(%a2)+,%d2,%acc1 + mac.w %d2u,%a7u,#1,(%a2)+,%d2,%acc2 + mac.w %d2u,%a7u,#1,(%a2)+,%a7,%acc1 + mac.w %d2u,%a7u,#1,(%a2)+,%a7,%acc2 + mac.w %d2u,%a7u,#1,(%a2)+&,%d1,%acc1 + mac.w %d2u,%a7u,#1,(%a2)+&,%d1,%acc2 + mac.w %d2u,%a7u,#1,(%a2)+&,%a3,%acc1 + mac.w %d2u,%a7u,#1,(%a2)+&,%a3,%acc2 + mac.w %d2u,%a7u,#1,(%a2)+&,%d2,%acc1 + mac.w %d2u,%a7u,#1,(%a2)+&,%d2,%acc2 + mac.w %d2u,%a7u,#1,(%a2)+&,%a7,%acc1 + mac.w %d2u,%a7u,#1,(%a2)+&,%a7,%acc2 + mac.w %d2u,%a7u,#1,10(%a6),%d1,%acc1 + mac.w %d2u,%a7u,#1,10(%a6),%d1,%acc2 + mac.w %d2u,%a7u,#1,10(%a6),%a3,%acc1 + mac.w %d2u,%a7u,#1,10(%a6),%a3,%acc2 + mac.w %d2u,%a7u,#1,10(%a6),%d2,%acc1 + mac.w %d2u,%a7u,#1,10(%a6),%d2,%acc2 + mac.w %d2u,%a7u,#1,10(%a6),%a7,%acc1 + mac.w %d2u,%a7u,#1,10(%a6),%a7,%acc2 + mac.w %d2u,%a7u,#1,10(%a6)&,%d1,%acc1 + mac.w %d2u,%a7u,#1,10(%a6)&,%d1,%acc2 + mac.w %d2u,%a7u,#1,10(%a6)&,%a3,%acc1 + mac.w %d2u,%a7u,#1,10(%a6)&,%a3,%acc2 + mac.w %d2u,%a7u,#1,10(%a6)&,%d2,%acc1 + mac.w %d2u,%a7u,#1,10(%a6)&,%d2,%acc2 + mac.w %d2u,%a7u,#1,10(%a6)&,%a7,%acc1 + mac.w %d2u,%a7u,#1,10(%a6)&,%a7,%acc2 + mac.w %d2u,%a7u,#1,-(%a1),%d1,%acc1 + mac.w %d2u,%a7u,#1,-(%a1),%d1,%acc2 + mac.w %d2u,%a7u,#1,-(%a1),%a3,%acc1 + mac.w %d2u,%a7u,#1,-(%a1),%a3,%acc2 + mac.w %d2u,%a7u,#1,-(%a1),%d2,%acc1 + mac.w %d2u,%a7u,#1,-(%a1),%d2,%acc2 + mac.w %d2u,%a7u,#1,-(%a1),%a7,%acc1 + mac.w %d2u,%a7u,#1,-(%a1),%a7,%acc2 + mac.w %d2u,%a7u,#1,-(%a1)&,%d1,%acc1 + mac.w %d2u,%a7u,#1,-(%a1)&,%d1,%acc2 + mac.w %d2u,%a7u,#1,-(%a1)&,%a3,%acc1 + mac.w %d2u,%a7u,#1,-(%a1)&,%a3,%acc2 + mac.w %d2u,%a7u,#1,-(%a1)&,%d2,%acc1 + mac.w %d2u,%a7u,#1,-(%a1)&,%d2,%acc2 + mac.w %d2u,%a7u,#1,-(%a1)&,%a7,%acc1 + mac.w %d2u,%a7u,#1,-(%a1)&,%a7,%acc2 + mac.w %d2u,%a7u,#-1,(%a3),%d1,%acc1 + mac.w %d2u,%a7u,#-1,(%a3),%d1,%acc2 + mac.w %d2u,%a7u,#-1,(%a3),%a3,%acc1 + mac.w %d2u,%a7u,#-1,(%a3),%a3,%acc2 + mac.w %d2u,%a7u,#-1,(%a3),%d2,%acc1 + mac.w %d2u,%a7u,#-1,(%a3),%d2,%acc2 + mac.w %d2u,%a7u,#-1,(%a3),%a7,%acc1 + mac.w %d2u,%a7u,#-1,(%a3),%a7,%acc2 + mac.w %d2u,%a7u,#-1,(%a3)&,%d1,%acc1 + mac.w %d2u,%a7u,#-1,(%a3)&,%d1,%acc2 + mac.w %d2u,%a7u,#-1,(%a3)&,%a3,%acc1 + mac.w %d2u,%a7u,#-1,(%a3)&,%a3,%acc2 + mac.w %d2u,%a7u,#-1,(%a3)&,%d2,%acc1 + mac.w %d2u,%a7u,#-1,(%a3)&,%d2,%acc2 + mac.w %d2u,%a7u,#-1,(%a3)&,%a7,%acc1 + mac.w %d2u,%a7u,#-1,(%a3)&,%a7,%acc2 + mac.w %d2u,%a7u,#-1,(%a2)+,%d1,%acc1 + mac.w %d2u,%a7u,#-1,(%a2)+,%d1,%acc2 + mac.w %d2u,%a7u,#-1,(%a2)+,%a3,%acc1 + mac.w %d2u,%a7u,#-1,(%a2)+,%a3,%acc2 + mac.w %d2u,%a7u,#-1,(%a2)+,%d2,%acc1 + mac.w %d2u,%a7u,#-1,(%a2)+,%d2,%acc2 + mac.w %d2u,%a7u,#-1,(%a2)+,%a7,%acc1 + mac.w %d2u,%a7u,#-1,(%a2)+,%a7,%acc2 + mac.w %d2u,%a7u,#-1,(%a2)+&,%d1,%acc1 + mac.w %d2u,%a7u,#-1,(%a2)+&,%d1,%acc2 + mac.w %d2u,%a7u,#-1,(%a2)+&,%a3,%acc1 + mac.w %d2u,%a7u,#-1,(%a2)+&,%a3,%acc2 + mac.w %d2u,%a7u,#-1,(%a2)+&,%d2,%acc1 + mac.w %d2u,%a7u,#-1,(%a2)+&,%d2,%acc2 + mac.w %d2u,%a7u,#-1,(%a2)+&,%a7,%acc1 + mac.w %d2u,%a7u,#-1,(%a2)+&,%a7,%acc2 + mac.w %d2u,%a7u,#-1,10(%a6),%d1,%acc1 + mac.w %d2u,%a7u,#-1,10(%a6),%d1,%acc2 + mac.w %d2u,%a7u,#-1,10(%a6),%a3,%acc1 + mac.w %d2u,%a7u,#-1,10(%a6),%a3,%acc2 + mac.w %d2u,%a7u,#-1,10(%a6),%d2,%acc1 + mac.w %d2u,%a7u,#-1,10(%a6),%d2,%acc2 + mac.w %d2u,%a7u,#-1,10(%a6),%a7,%acc1 + mac.w %d2u,%a7u,#-1,10(%a6),%a7,%acc2 + mac.w %d2u,%a7u,#-1,10(%a6)&,%d1,%acc1 + mac.w %d2u,%a7u,#-1,10(%a6)&,%d1,%acc2 + mac.w %d2u,%a7u,#-1,10(%a6)&,%a3,%acc1 + mac.w %d2u,%a7u,#-1,10(%a6)&,%a3,%acc2 + mac.w %d2u,%a7u,#-1,10(%a6)&,%d2,%acc1 + mac.w %d2u,%a7u,#-1,10(%a6)&,%d2,%acc2 + mac.w %d2u,%a7u,#-1,10(%a6)&,%a7,%acc1 + mac.w %d2u,%a7u,#-1,10(%a6)&,%a7,%acc2 + mac.w %d2u,%a7u,#-1,-(%a1),%d1,%acc1 + mac.w %d2u,%a7u,#-1,-(%a1),%d1,%acc2 + mac.w %d2u,%a7u,#-1,-(%a1),%a3,%acc1 + mac.w %d2u,%a7u,#-1,-(%a1),%a3,%acc2 + mac.w %d2u,%a7u,#-1,-(%a1),%d2,%acc1 + mac.w %d2u,%a7u,#-1,-(%a1),%d2,%acc2 + mac.w %d2u,%a7u,#-1,-(%a1),%a7,%acc1 + mac.w %d2u,%a7u,#-1,-(%a1),%a7,%acc2 + mac.w %d2u,%a7u,#-1,-(%a1)&,%d1,%acc1 + mac.w %d2u,%a7u,#-1,-(%a1)&,%d1,%acc2 + mac.w %d2u,%a7u,#-1,-(%a1)&,%a3,%acc1 + mac.w %d2u,%a7u,#-1,-(%a1)&,%a3,%acc2 + mac.w %d2u,%a7u,#-1,-(%a1)&,%d2,%acc1 + mac.w %d2u,%a7u,#-1,-(%a1)&,%d2,%acc2 + mac.w %d2u,%a7u,#-1,-(%a1)&,%a7,%acc1 + mac.w %d2u,%a7u,#-1,-(%a1)&,%a7,%acc2 + mac.w %d2u,%d1l,(%a3),%d1,%acc1 + mac.w %d2u,%d1l,(%a3),%d1,%acc2 + mac.w %d2u,%d1l,(%a3),%a3,%acc1 + mac.w %d2u,%d1l,(%a3),%a3,%acc2 + mac.w %d2u,%d1l,(%a3),%d2,%acc1 + mac.w %d2u,%d1l,(%a3),%d2,%acc2 + mac.w %d2u,%d1l,(%a3),%a7,%acc1 + mac.w %d2u,%d1l,(%a3),%a7,%acc2 + mac.w %d2u,%d1l,(%a3)&,%d1,%acc1 + mac.w %d2u,%d1l,(%a3)&,%d1,%acc2 + mac.w %d2u,%d1l,(%a3)&,%a3,%acc1 + mac.w %d2u,%d1l,(%a3)&,%a3,%acc2 + mac.w %d2u,%d1l,(%a3)&,%d2,%acc1 + mac.w %d2u,%d1l,(%a3)&,%d2,%acc2 + mac.w %d2u,%d1l,(%a3)&,%a7,%acc1 + mac.w %d2u,%d1l,(%a3)&,%a7,%acc2 + mac.w %d2u,%d1l,(%a2)+,%d1,%acc1 + mac.w %d2u,%d1l,(%a2)+,%d1,%acc2 + mac.w %d2u,%d1l,(%a2)+,%a3,%acc1 + mac.w %d2u,%d1l,(%a2)+,%a3,%acc2 + mac.w %d2u,%d1l,(%a2)+,%d2,%acc1 + mac.w %d2u,%d1l,(%a2)+,%d2,%acc2 + mac.w %d2u,%d1l,(%a2)+,%a7,%acc1 + mac.w %d2u,%d1l,(%a2)+,%a7,%acc2 + mac.w %d2u,%d1l,(%a2)+&,%d1,%acc1 + mac.w %d2u,%d1l,(%a2)+&,%d1,%acc2 + mac.w %d2u,%d1l,(%a2)+&,%a3,%acc1 + mac.w %d2u,%d1l,(%a2)+&,%a3,%acc2 + mac.w %d2u,%d1l,(%a2)+&,%d2,%acc1 + mac.w %d2u,%d1l,(%a2)+&,%d2,%acc2 + mac.w %d2u,%d1l,(%a2)+&,%a7,%acc1 + mac.w %d2u,%d1l,(%a2)+&,%a7,%acc2 + mac.w %d2u,%d1l,10(%a6),%d1,%acc1 + mac.w %d2u,%d1l,10(%a6),%d1,%acc2 + mac.w %d2u,%d1l,10(%a6),%a3,%acc1 + mac.w %d2u,%d1l,10(%a6),%a3,%acc2 + mac.w %d2u,%d1l,10(%a6),%d2,%acc1 + mac.w %d2u,%d1l,10(%a6),%d2,%acc2 + mac.w %d2u,%d1l,10(%a6),%a7,%acc1 + mac.w %d2u,%d1l,10(%a6),%a7,%acc2 + mac.w %d2u,%d1l,10(%a6)&,%d1,%acc1 + mac.w %d2u,%d1l,10(%a6)&,%d1,%acc2 + mac.w %d2u,%d1l,10(%a6)&,%a3,%acc1 + mac.w %d2u,%d1l,10(%a6)&,%a3,%acc2 + mac.w %d2u,%d1l,10(%a6)&,%d2,%acc1 + mac.w %d2u,%d1l,10(%a6)&,%d2,%acc2 + mac.w %d2u,%d1l,10(%a6)&,%a7,%acc1 + mac.w %d2u,%d1l,10(%a6)&,%a7,%acc2 + mac.w %d2u,%d1l,-(%a1),%d1,%acc1 + mac.w %d2u,%d1l,-(%a1),%d1,%acc2 + mac.w %d2u,%d1l,-(%a1),%a3,%acc1 + mac.w %d2u,%d1l,-(%a1),%a3,%acc2 + mac.w %d2u,%d1l,-(%a1),%d2,%acc1 + mac.w %d2u,%d1l,-(%a1),%d2,%acc2 + mac.w %d2u,%d1l,-(%a1),%a7,%acc1 + mac.w %d2u,%d1l,-(%a1),%a7,%acc2 + mac.w %d2u,%d1l,-(%a1)&,%d1,%acc1 + mac.w %d2u,%d1l,-(%a1)&,%d1,%acc2 + mac.w %d2u,%d1l,-(%a1)&,%a3,%acc1 + mac.w %d2u,%d1l,-(%a1)&,%a3,%acc2 + mac.w %d2u,%d1l,-(%a1)&,%d2,%acc1 + mac.w %d2u,%d1l,-(%a1)&,%d2,%acc2 + mac.w %d2u,%d1l,-(%a1)&,%a7,%acc1 + mac.w %d2u,%d1l,-(%a1)&,%a7,%acc2 + mac.w %d2u,%d1l,<<,(%a3),%d1,%acc1 + mac.w %d2u,%d1l,<<,(%a3),%d1,%acc2 + mac.w %d2u,%d1l,<<,(%a3),%a3,%acc1 + mac.w %d2u,%d1l,<<,(%a3),%a3,%acc2 + mac.w %d2u,%d1l,<<,(%a3),%d2,%acc1 + mac.w %d2u,%d1l,<<,(%a3),%d2,%acc2 + mac.w %d2u,%d1l,<<,(%a3),%a7,%acc1 + mac.w %d2u,%d1l,<<,(%a3),%a7,%acc2 + mac.w %d2u,%d1l,<<,(%a3)&,%d1,%acc1 + mac.w %d2u,%d1l,<<,(%a3)&,%d1,%acc2 + mac.w %d2u,%d1l,<<,(%a3)&,%a3,%acc1 + mac.w %d2u,%d1l,<<,(%a3)&,%a3,%acc2 + mac.w %d2u,%d1l,<<,(%a3)&,%d2,%acc1 + mac.w %d2u,%d1l,<<,(%a3)&,%d2,%acc2 + mac.w %d2u,%d1l,<<,(%a3)&,%a7,%acc1 + mac.w %d2u,%d1l,<<,(%a3)&,%a7,%acc2 + mac.w %d2u,%d1l,<<,(%a2)+,%d1,%acc1 + mac.w %d2u,%d1l,<<,(%a2)+,%d1,%acc2 + mac.w %d2u,%d1l,<<,(%a2)+,%a3,%acc1 + mac.w %d2u,%d1l,<<,(%a2)+,%a3,%acc2 + mac.w %d2u,%d1l,<<,(%a2)+,%d2,%acc1 + mac.w %d2u,%d1l,<<,(%a2)+,%d2,%acc2 + mac.w %d2u,%d1l,<<,(%a2)+,%a7,%acc1 + mac.w %d2u,%d1l,<<,(%a2)+,%a7,%acc2 + mac.w %d2u,%d1l,<<,(%a2)+&,%d1,%acc1 + mac.w %d2u,%d1l,<<,(%a2)+&,%d1,%acc2 + mac.w %d2u,%d1l,<<,(%a2)+&,%a3,%acc1 + mac.w %d2u,%d1l,<<,(%a2)+&,%a3,%acc2 + mac.w %d2u,%d1l,<<,(%a2)+&,%d2,%acc1 + mac.w %d2u,%d1l,<<,(%a2)+&,%d2,%acc2 + mac.w %d2u,%d1l,<<,(%a2)+&,%a7,%acc1 + mac.w %d2u,%d1l,<<,(%a2)+&,%a7,%acc2 + mac.w %d2u,%d1l,<<,10(%a6),%d1,%acc1 + mac.w %d2u,%d1l,<<,10(%a6),%d1,%acc2 + mac.w %d2u,%d1l,<<,10(%a6),%a3,%acc1 + mac.w %d2u,%d1l,<<,10(%a6),%a3,%acc2 + mac.w %d2u,%d1l,<<,10(%a6),%d2,%acc1 + mac.w %d2u,%d1l,<<,10(%a6),%d2,%acc2 + mac.w %d2u,%d1l,<<,10(%a6),%a7,%acc1 + mac.w %d2u,%d1l,<<,10(%a6),%a7,%acc2 + mac.w %d2u,%d1l,<<,10(%a6)&,%d1,%acc1 + mac.w %d2u,%d1l,<<,10(%a6)&,%d1,%acc2 + mac.w %d2u,%d1l,<<,10(%a6)&,%a3,%acc1 + mac.w %d2u,%d1l,<<,10(%a6)&,%a3,%acc2 + mac.w %d2u,%d1l,<<,10(%a6)&,%d2,%acc1 + mac.w %d2u,%d1l,<<,10(%a6)&,%d2,%acc2 + mac.w %d2u,%d1l,<<,10(%a6)&,%a7,%acc1 + mac.w %d2u,%d1l,<<,10(%a6)&,%a7,%acc2 + mac.w %d2u,%d1l,<<,-(%a1),%d1,%acc1 + mac.w %d2u,%d1l,<<,-(%a1),%d1,%acc2 + mac.w %d2u,%d1l,<<,-(%a1),%a3,%acc1 + mac.w %d2u,%d1l,<<,-(%a1),%a3,%acc2 + mac.w %d2u,%d1l,<<,-(%a1),%d2,%acc1 + mac.w %d2u,%d1l,<<,-(%a1),%d2,%acc2 + mac.w %d2u,%d1l,<<,-(%a1),%a7,%acc1 + mac.w %d2u,%d1l,<<,-(%a1),%a7,%acc2 + mac.w %d2u,%d1l,<<,-(%a1)&,%d1,%acc1 + mac.w %d2u,%d1l,<<,-(%a1)&,%d1,%acc2 + mac.w %d2u,%d1l,<<,-(%a1)&,%a3,%acc1 + mac.w %d2u,%d1l,<<,-(%a1)&,%a3,%acc2 + mac.w %d2u,%d1l,<<,-(%a1)&,%d2,%acc1 + mac.w %d2u,%d1l,<<,-(%a1)&,%d2,%acc2 + mac.w %d2u,%d1l,<<,-(%a1)&,%a7,%acc1 + mac.w %d2u,%d1l,<<,-(%a1)&,%a7,%acc2 + mac.w %d2u,%d1l,>>,(%a3),%d1,%acc1 + mac.w %d2u,%d1l,>>,(%a3),%d1,%acc2 + mac.w %d2u,%d1l,>>,(%a3),%a3,%acc1 + mac.w %d2u,%d1l,>>,(%a3),%a3,%acc2 + mac.w %d2u,%d1l,>>,(%a3),%d2,%acc1 + mac.w %d2u,%d1l,>>,(%a3),%d2,%acc2 + mac.w %d2u,%d1l,>>,(%a3),%a7,%acc1 + mac.w %d2u,%d1l,>>,(%a3),%a7,%acc2 + mac.w %d2u,%d1l,>>,(%a3)&,%d1,%acc1 + mac.w %d2u,%d1l,>>,(%a3)&,%d1,%acc2 + mac.w %d2u,%d1l,>>,(%a3)&,%a3,%acc1 + mac.w %d2u,%d1l,>>,(%a3)&,%a3,%acc2 + mac.w %d2u,%d1l,>>,(%a3)&,%d2,%acc1 + mac.w %d2u,%d1l,>>,(%a3)&,%d2,%acc2 + mac.w %d2u,%d1l,>>,(%a3)&,%a7,%acc1 + mac.w %d2u,%d1l,>>,(%a3)&,%a7,%acc2 + mac.w %d2u,%d1l,>>,(%a2)+,%d1,%acc1 + mac.w %d2u,%d1l,>>,(%a2)+,%d1,%acc2 + mac.w %d2u,%d1l,>>,(%a2)+,%a3,%acc1 + mac.w %d2u,%d1l,>>,(%a2)+,%a3,%acc2 + mac.w %d2u,%d1l,>>,(%a2)+,%d2,%acc1 + mac.w %d2u,%d1l,>>,(%a2)+,%d2,%acc2 + mac.w %d2u,%d1l,>>,(%a2)+,%a7,%acc1 + mac.w %d2u,%d1l,>>,(%a2)+,%a7,%acc2 + mac.w %d2u,%d1l,>>,(%a2)+&,%d1,%acc1 + mac.w %d2u,%d1l,>>,(%a2)+&,%d1,%acc2 + mac.w %d2u,%d1l,>>,(%a2)+&,%a3,%acc1 + mac.w %d2u,%d1l,>>,(%a2)+&,%a3,%acc2 + mac.w %d2u,%d1l,>>,(%a2)+&,%d2,%acc1 + mac.w %d2u,%d1l,>>,(%a2)+&,%d2,%acc2 + mac.w %d2u,%d1l,>>,(%a2)+&,%a7,%acc1 + mac.w %d2u,%d1l,>>,(%a2)+&,%a7,%acc2 + mac.w %d2u,%d1l,>>,10(%a6),%d1,%acc1 + mac.w %d2u,%d1l,>>,10(%a6),%d1,%acc2 + mac.w %d2u,%d1l,>>,10(%a6),%a3,%acc1 + mac.w %d2u,%d1l,>>,10(%a6),%a3,%acc2 + mac.w %d2u,%d1l,>>,10(%a6),%d2,%acc1 + mac.w %d2u,%d1l,>>,10(%a6),%d2,%acc2 + mac.w %d2u,%d1l,>>,10(%a6),%a7,%acc1 + mac.w %d2u,%d1l,>>,10(%a6),%a7,%acc2 + mac.w %d2u,%d1l,>>,10(%a6)&,%d1,%acc1 + mac.w %d2u,%d1l,>>,10(%a6)&,%d1,%acc2 + mac.w %d2u,%d1l,>>,10(%a6)&,%a3,%acc1 + mac.w %d2u,%d1l,>>,10(%a6)&,%a3,%acc2 + mac.w %d2u,%d1l,>>,10(%a6)&,%d2,%acc1 + mac.w %d2u,%d1l,>>,10(%a6)&,%d2,%acc2 + mac.w %d2u,%d1l,>>,10(%a6)&,%a7,%acc1 + mac.w %d2u,%d1l,>>,10(%a6)&,%a7,%acc2 + mac.w %d2u,%d1l,>>,-(%a1),%d1,%acc1 + mac.w %d2u,%d1l,>>,-(%a1),%d1,%acc2 + mac.w %d2u,%d1l,>>,-(%a1),%a3,%acc1 + mac.w %d2u,%d1l,>>,-(%a1),%a3,%acc2 + mac.w %d2u,%d1l,>>,-(%a1),%d2,%acc1 + mac.w %d2u,%d1l,>>,-(%a1),%d2,%acc2 + mac.w %d2u,%d1l,>>,-(%a1),%a7,%acc1 + mac.w %d2u,%d1l,>>,-(%a1),%a7,%acc2 + mac.w %d2u,%d1l,>>,-(%a1)&,%d1,%acc1 + mac.w %d2u,%d1l,>>,-(%a1)&,%d1,%acc2 + mac.w %d2u,%d1l,>>,-(%a1)&,%a3,%acc1 + mac.w %d2u,%d1l,>>,-(%a1)&,%a3,%acc2 + mac.w %d2u,%d1l,>>,-(%a1)&,%d2,%acc1 + mac.w %d2u,%d1l,>>,-(%a1)&,%d2,%acc2 + mac.w %d2u,%d1l,>>,-(%a1)&,%a7,%acc1 + mac.w %d2u,%d1l,>>,-(%a1)&,%a7,%acc2 + mac.w %d2u,%d1l,#1,(%a3),%d1,%acc1 + mac.w %d2u,%d1l,#1,(%a3),%d1,%acc2 + mac.w %d2u,%d1l,#1,(%a3),%a3,%acc1 + mac.w %d2u,%d1l,#1,(%a3),%a3,%acc2 + mac.w %d2u,%d1l,#1,(%a3),%d2,%acc1 + mac.w %d2u,%d1l,#1,(%a3),%d2,%acc2 + mac.w %d2u,%d1l,#1,(%a3),%a7,%acc1 + mac.w %d2u,%d1l,#1,(%a3),%a7,%acc2 + mac.w %d2u,%d1l,#1,(%a3)&,%d1,%acc1 + mac.w %d2u,%d1l,#1,(%a3)&,%d1,%acc2 + mac.w %d2u,%d1l,#1,(%a3)&,%a3,%acc1 + mac.w %d2u,%d1l,#1,(%a3)&,%a3,%acc2 + mac.w %d2u,%d1l,#1,(%a3)&,%d2,%acc1 + mac.w %d2u,%d1l,#1,(%a3)&,%d2,%acc2 + mac.w %d2u,%d1l,#1,(%a3)&,%a7,%acc1 + mac.w %d2u,%d1l,#1,(%a3)&,%a7,%acc2 + mac.w %d2u,%d1l,#1,(%a2)+,%d1,%acc1 + mac.w %d2u,%d1l,#1,(%a2)+,%d1,%acc2 + mac.w %d2u,%d1l,#1,(%a2)+,%a3,%acc1 + mac.w %d2u,%d1l,#1,(%a2)+,%a3,%acc2 + mac.w %d2u,%d1l,#1,(%a2)+,%d2,%acc1 + mac.w %d2u,%d1l,#1,(%a2)+,%d2,%acc2 + mac.w %d2u,%d1l,#1,(%a2)+,%a7,%acc1 + mac.w %d2u,%d1l,#1,(%a2)+,%a7,%acc2 + mac.w %d2u,%d1l,#1,(%a2)+&,%d1,%acc1 + mac.w %d2u,%d1l,#1,(%a2)+&,%d1,%acc2 + mac.w %d2u,%d1l,#1,(%a2)+&,%a3,%acc1 + mac.w %d2u,%d1l,#1,(%a2)+&,%a3,%acc2 + mac.w %d2u,%d1l,#1,(%a2)+&,%d2,%acc1 + mac.w %d2u,%d1l,#1,(%a2)+&,%d2,%acc2 + mac.w %d2u,%d1l,#1,(%a2)+&,%a7,%acc1 + mac.w %d2u,%d1l,#1,(%a2)+&,%a7,%acc2 + mac.w %d2u,%d1l,#1,10(%a6),%d1,%acc1 + mac.w %d2u,%d1l,#1,10(%a6),%d1,%acc2 + mac.w %d2u,%d1l,#1,10(%a6),%a3,%acc1 + mac.w %d2u,%d1l,#1,10(%a6),%a3,%acc2 + mac.w %d2u,%d1l,#1,10(%a6),%d2,%acc1 + mac.w %d2u,%d1l,#1,10(%a6),%d2,%acc2 + mac.w %d2u,%d1l,#1,10(%a6),%a7,%acc1 + mac.w %d2u,%d1l,#1,10(%a6),%a7,%acc2 + mac.w %d2u,%d1l,#1,10(%a6)&,%d1,%acc1 + mac.w %d2u,%d1l,#1,10(%a6)&,%d1,%acc2 + mac.w %d2u,%d1l,#1,10(%a6)&,%a3,%acc1 + mac.w %d2u,%d1l,#1,10(%a6)&,%a3,%acc2 + mac.w %d2u,%d1l,#1,10(%a6)&,%d2,%acc1 + mac.w %d2u,%d1l,#1,10(%a6)&,%d2,%acc2 + mac.w %d2u,%d1l,#1,10(%a6)&,%a7,%acc1 + mac.w %d2u,%d1l,#1,10(%a6)&,%a7,%acc2 + mac.w %d2u,%d1l,#1,-(%a1),%d1,%acc1 + mac.w %d2u,%d1l,#1,-(%a1),%d1,%acc2 + mac.w %d2u,%d1l,#1,-(%a1),%a3,%acc1 + mac.w %d2u,%d1l,#1,-(%a1),%a3,%acc2 + mac.w %d2u,%d1l,#1,-(%a1),%d2,%acc1 + mac.w %d2u,%d1l,#1,-(%a1),%d2,%acc2 + mac.w %d2u,%d1l,#1,-(%a1),%a7,%acc1 + mac.w %d2u,%d1l,#1,-(%a1),%a7,%acc2 + mac.w %d2u,%d1l,#1,-(%a1)&,%d1,%acc1 + mac.w %d2u,%d1l,#1,-(%a1)&,%d1,%acc2 + mac.w %d2u,%d1l,#1,-(%a1)&,%a3,%acc1 + mac.w %d2u,%d1l,#1,-(%a1)&,%a3,%acc2 + mac.w %d2u,%d1l,#1,-(%a1)&,%d2,%acc1 + mac.w %d2u,%d1l,#1,-(%a1)&,%d2,%acc2 + mac.w %d2u,%d1l,#1,-(%a1)&,%a7,%acc1 + mac.w %d2u,%d1l,#1,-(%a1)&,%a7,%acc2 + mac.w %d2u,%d1l,#-1,(%a3),%d1,%acc1 + mac.w %d2u,%d1l,#-1,(%a3),%d1,%acc2 + mac.w %d2u,%d1l,#-1,(%a3),%a3,%acc1 + mac.w %d2u,%d1l,#-1,(%a3),%a3,%acc2 + mac.w %d2u,%d1l,#-1,(%a3),%d2,%acc1 + mac.w %d2u,%d1l,#-1,(%a3),%d2,%acc2 + mac.w %d2u,%d1l,#-1,(%a3),%a7,%acc1 + mac.w %d2u,%d1l,#-1,(%a3),%a7,%acc2 + mac.w %d2u,%d1l,#-1,(%a3)&,%d1,%acc1 + mac.w %d2u,%d1l,#-1,(%a3)&,%d1,%acc2 + mac.w %d2u,%d1l,#-1,(%a3)&,%a3,%acc1 + mac.w %d2u,%d1l,#-1,(%a3)&,%a3,%acc2 + mac.w %d2u,%d1l,#-1,(%a3)&,%d2,%acc1 + mac.w %d2u,%d1l,#-1,(%a3)&,%d2,%acc2 + mac.w %d2u,%d1l,#-1,(%a3)&,%a7,%acc1 + mac.w %d2u,%d1l,#-1,(%a3)&,%a7,%acc2 + mac.w %d2u,%d1l,#-1,(%a2)+,%d1,%acc1 + mac.w %d2u,%d1l,#-1,(%a2)+,%d1,%acc2 + mac.w %d2u,%d1l,#-1,(%a2)+,%a3,%acc1 + mac.w %d2u,%d1l,#-1,(%a2)+,%a3,%acc2 + mac.w %d2u,%d1l,#-1,(%a2)+,%d2,%acc1 + mac.w %d2u,%d1l,#-1,(%a2)+,%d2,%acc2 + mac.w %d2u,%d1l,#-1,(%a2)+,%a7,%acc1 + mac.w %d2u,%d1l,#-1,(%a2)+,%a7,%acc2 + mac.w %d2u,%d1l,#-1,(%a2)+&,%d1,%acc1 + mac.w %d2u,%d1l,#-1,(%a2)+&,%d1,%acc2 + mac.w %d2u,%d1l,#-1,(%a2)+&,%a3,%acc1 + mac.w %d2u,%d1l,#-1,(%a2)+&,%a3,%acc2 + mac.w %d2u,%d1l,#-1,(%a2)+&,%d2,%acc1 + mac.w %d2u,%d1l,#-1,(%a2)+&,%d2,%acc2 + mac.w %d2u,%d1l,#-1,(%a2)+&,%a7,%acc1 + mac.w %d2u,%d1l,#-1,(%a2)+&,%a7,%acc2 + mac.w %d2u,%d1l,#-1,10(%a6),%d1,%acc1 + mac.w %d2u,%d1l,#-1,10(%a6),%d1,%acc2 + mac.w %d2u,%d1l,#-1,10(%a6),%a3,%acc1 + mac.w %d2u,%d1l,#-1,10(%a6),%a3,%acc2 + mac.w %d2u,%d1l,#-1,10(%a6),%d2,%acc1 + mac.w %d2u,%d1l,#-1,10(%a6),%d2,%acc2 + mac.w %d2u,%d1l,#-1,10(%a6),%a7,%acc1 + mac.w %d2u,%d1l,#-1,10(%a6),%a7,%acc2 + mac.w %d2u,%d1l,#-1,10(%a6)&,%d1,%acc1 + mac.w %d2u,%d1l,#-1,10(%a6)&,%d1,%acc2 + mac.w %d2u,%d1l,#-1,10(%a6)&,%a3,%acc1 + mac.w %d2u,%d1l,#-1,10(%a6)&,%a3,%acc2 + mac.w %d2u,%d1l,#-1,10(%a6)&,%d2,%acc1 + mac.w %d2u,%d1l,#-1,10(%a6)&,%d2,%acc2 + mac.w %d2u,%d1l,#-1,10(%a6)&,%a7,%acc1 + mac.w %d2u,%d1l,#-1,10(%a6)&,%a7,%acc2 + mac.w %d2u,%d1l,#-1,-(%a1),%d1,%acc1 + mac.w %d2u,%d1l,#-1,-(%a1),%d1,%acc2 + mac.w %d2u,%d1l,#-1,-(%a1),%a3,%acc1 + mac.w %d2u,%d1l,#-1,-(%a1),%a3,%acc2 + mac.w %d2u,%d1l,#-1,-(%a1),%d2,%acc1 + mac.w %d2u,%d1l,#-1,-(%a1),%d2,%acc2 + mac.w %d2u,%d1l,#-1,-(%a1),%a7,%acc1 + mac.w %d2u,%d1l,#-1,-(%a1),%a7,%acc2 + mac.w %d2u,%d1l,#-1,-(%a1)&,%d1,%acc1 + mac.w %d2u,%d1l,#-1,-(%a1)&,%d1,%acc2 + mac.w %d2u,%d1l,#-1,-(%a1)&,%a3,%acc1 + mac.w %d2u,%d1l,#-1,-(%a1)&,%a3,%acc2 + mac.w %d2u,%d1l,#-1,-(%a1)&,%d2,%acc1 + mac.w %d2u,%d1l,#-1,-(%a1)&,%d2,%acc2 + mac.w %d2u,%d1l,#-1,-(%a1)&,%a7,%acc1 + mac.w %d2u,%d1l,#-1,-(%a1)&,%a7,%acc2 + mac.w %a5l,%a2u,(%a3),%d1,%acc1 + mac.w %a5l,%a2u,(%a3),%d1,%acc2 + mac.w %a5l,%a2u,(%a3),%a3,%acc1 + mac.w %a5l,%a2u,(%a3),%a3,%acc2 + mac.w %a5l,%a2u,(%a3),%d2,%acc1 + mac.w %a5l,%a2u,(%a3),%d2,%acc2 + mac.w %a5l,%a2u,(%a3),%a7,%acc1 + mac.w %a5l,%a2u,(%a3),%a7,%acc2 + mac.w %a5l,%a2u,(%a3)&,%d1,%acc1 + mac.w %a5l,%a2u,(%a3)&,%d1,%acc2 + mac.w %a5l,%a2u,(%a3)&,%a3,%acc1 + mac.w %a5l,%a2u,(%a3)&,%a3,%acc2 + mac.w %a5l,%a2u,(%a3)&,%d2,%acc1 + mac.w %a5l,%a2u,(%a3)&,%d2,%acc2 + mac.w %a5l,%a2u,(%a3)&,%a7,%acc1 + mac.w %a5l,%a2u,(%a3)&,%a7,%acc2 + mac.w %a5l,%a2u,(%a2)+,%d1,%acc1 + mac.w %a5l,%a2u,(%a2)+,%d1,%acc2 + mac.w %a5l,%a2u,(%a2)+,%a3,%acc1 + mac.w %a5l,%a2u,(%a2)+,%a3,%acc2 + mac.w %a5l,%a2u,(%a2)+,%d2,%acc1 + mac.w %a5l,%a2u,(%a2)+,%d2,%acc2 + mac.w %a5l,%a2u,(%a2)+,%a7,%acc1 + mac.w %a5l,%a2u,(%a2)+,%a7,%acc2 + mac.w %a5l,%a2u,(%a2)+&,%d1,%acc1 + mac.w %a5l,%a2u,(%a2)+&,%d1,%acc2 + mac.w %a5l,%a2u,(%a2)+&,%a3,%acc1 + mac.w %a5l,%a2u,(%a2)+&,%a3,%acc2 + mac.w %a5l,%a2u,(%a2)+&,%d2,%acc1 + mac.w %a5l,%a2u,(%a2)+&,%d2,%acc2 + mac.w %a5l,%a2u,(%a2)+&,%a7,%acc1 + mac.w %a5l,%a2u,(%a2)+&,%a7,%acc2 + mac.w %a5l,%a2u,10(%a6),%d1,%acc1 + mac.w %a5l,%a2u,10(%a6),%d1,%acc2 + mac.w %a5l,%a2u,10(%a6),%a3,%acc1 + mac.w %a5l,%a2u,10(%a6),%a3,%acc2 + mac.w %a5l,%a2u,10(%a6),%d2,%acc1 + mac.w %a5l,%a2u,10(%a6),%d2,%acc2 + mac.w %a5l,%a2u,10(%a6),%a7,%acc1 + mac.w %a5l,%a2u,10(%a6),%a7,%acc2 + mac.w %a5l,%a2u,10(%a6)&,%d1,%acc1 + mac.w %a5l,%a2u,10(%a6)&,%d1,%acc2 + mac.w %a5l,%a2u,10(%a6)&,%a3,%acc1 + mac.w %a5l,%a2u,10(%a6)&,%a3,%acc2 + mac.w %a5l,%a2u,10(%a6)&,%d2,%acc1 + mac.w %a5l,%a2u,10(%a6)&,%d2,%acc2 + mac.w %a5l,%a2u,10(%a6)&,%a7,%acc1 + mac.w %a5l,%a2u,10(%a6)&,%a7,%acc2 + mac.w %a5l,%a2u,-(%a1),%d1,%acc1 + mac.w %a5l,%a2u,-(%a1),%d1,%acc2 + mac.w %a5l,%a2u,-(%a1),%a3,%acc1 + mac.w %a5l,%a2u,-(%a1),%a3,%acc2 + mac.w %a5l,%a2u,-(%a1),%d2,%acc1 + mac.w %a5l,%a2u,-(%a1),%d2,%acc2 + mac.w %a5l,%a2u,-(%a1),%a7,%acc1 + mac.w %a5l,%a2u,-(%a1),%a7,%acc2 + mac.w %a5l,%a2u,-(%a1)&,%d1,%acc1 + mac.w %a5l,%a2u,-(%a1)&,%d1,%acc2 + mac.w %a5l,%a2u,-(%a1)&,%a3,%acc1 + mac.w %a5l,%a2u,-(%a1)&,%a3,%acc2 + mac.w %a5l,%a2u,-(%a1)&,%d2,%acc1 + mac.w %a5l,%a2u,-(%a1)&,%d2,%acc2 + mac.w %a5l,%a2u,-(%a1)&,%a7,%acc1 + mac.w %a5l,%a2u,-(%a1)&,%a7,%acc2 + mac.w %a5l,%a2u,<<,(%a3),%d1,%acc1 + mac.w %a5l,%a2u,<<,(%a3),%d1,%acc2 + mac.w %a5l,%a2u,<<,(%a3),%a3,%acc1 + mac.w %a5l,%a2u,<<,(%a3),%a3,%acc2 + mac.w %a5l,%a2u,<<,(%a3),%d2,%acc1 + mac.w %a5l,%a2u,<<,(%a3),%d2,%acc2 + mac.w %a5l,%a2u,<<,(%a3),%a7,%acc1 + mac.w %a5l,%a2u,<<,(%a3),%a7,%acc2 + mac.w %a5l,%a2u,<<,(%a3)&,%d1,%acc1 + mac.w %a5l,%a2u,<<,(%a3)&,%d1,%acc2 + mac.w %a5l,%a2u,<<,(%a3)&,%a3,%acc1 + mac.w %a5l,%a2u,<<,(%a3)&,%a3,%acc2 + mac.w %a5l,%a2u,<<,(%a3)&,%d2,%acc1 + mac.w %a5l,%a2u,<<,(%a3)&,%d2,%acc2 + mac.w %a5l,%a2u,<<,(%a3)&,%a7,%acc1 + mac.w %a5l,%a2u,<<,(%a3)&,%a7,%acc2 + mac.w %a5l,%a2u,<<,(%a2)+,%d1,%acc1 + mac.w %a5l,%a2u,<<,(%a2)+,%d1,%acc2 + mac.w %a5l,%a2u,<<,(%a2)+,%a3,%acc1 + mac.w %a5l,%a2u,<<,(%a2)+,%a3,%acc2 + mac.w %a5l,%a2u,<<,(%a2)+,%d2,%acc1 + mac.w %a5l,%a2u,<<,(%a2)+,%d2,%acc2 + mac.w %a5l,%a2u,<<,(%a2)+,%a7,%acc1 + mac.w %a5l,%a2u,<<,(%a2)+,%a7,%acc2 + mac.w %a5l,%a2u,<<,(%a2)+&,%d1,%acc1 + mac.w %a5l,%a2u,<<,(%a2)+&,%d1,%acc2 + mac.w %a5l,%a2u,<<,(%a2)+&,%a3,%acc1 + mac.w %a5l,%a2u,<<,(%a2)+&,%a3,%acc2 + mac.w %a5l,%a2u,<<,(%a2)+&,%d2,%acc1 + mac.w %a5l,%a2u,<<,(%a2)+&,%d2,%acc2 + mac.w %a5l,%a2u,<<,(%a2)+&,%a7,%acc1 + mac.w %a5l,%a2u,<<,(%a2)+&,%a7,%acc2 + mac.w %a5l,%a2u,<<,10(%a6),%d1,%acc1 + mac.w %a5l,%a2u,<<,10(%a6),%d1,%acc2 + mac.w %a5l,%a2u,<<,10(%a6),%a3,%acc1 + mac.w %a5l,%a2u,<<,10(%a6),%a3,%acc2 + mac.w %a5l,%a2u,<<,10(%a6),%d2,%acc1 + mac.w %a5l,%a2u,<<,10(%a6),%d2,%acc2 + mac.w %a5l,%a2u,<<,10(%a6),%a7,%acc1 + mac.w %a5l,%a2u,<<,10(%a6),%a7,%acc2 + mac.w %a5l,%a2u,<<,10(%a6)&,%d1,%acc1 + mac.w %a5l,%a2u,<<,10(%a6)&,%d1,%acc2 + mac.w %a5l,%a2u,<<,10(%a6)&,%a3,%acc1 + mac.w %a5l,%a2u,<<,10(%a6)&,%a3,%acc2 + mac.w %a5l,%a2u,<<,10(%a6)&,%d2,%acc1 + mac.w %a5l,%a2u,<<,10(%a6)&,%d2,%acc2 + mac.w %a5l,%a2u,<<,10(%a6)&,%a7,%acc1 + mac.w %a5l,%a2u,<<,10(%a6)&,%a7,%acc2 + mac.w %a5l,%a2u,<<,-(%a1),%d1,%acc1 + mac.w %a5l,%a2u,<<,-(%a1),%d1,%acc2 + mac.w %a5l,%a2u,<<,-(%a1),%a3,%acc1 + mac.w %a5l,%a2u,<<,-(%a1),%a3,%acc2 + mac.w %a5l,%a2u,<<,-(%a1),%d2,%acc1 + mac.w %a5l,%a2u,<<,-(%a1),%d2,%acc2 + mac.w %a5l,%a2u,<<,-(%a1),%a7,%acc1 + mac.w %a5l,%a2u,<<,-(%a1),%a7,%acc2 + mac.w %a5l,%a2u,<<,-(%a1)&,%d1,%acc1 + mac.w %a5l,%a2u,<<,-(%a1)&,%d1,%acc2 + mac.w %a5l,%a2u,<<,-(%a1)&,%a3,%acc1 + mac.w %a5l,%a2u,<<,-(%a1)&,%a3,%acc2 + mac.w %a5l,%a2u,<<,-(%a1)&,%d2,%acc1 + mac.w %a5l,%a2u,<<,-(%a1)&,%d2,%acc2 + mac.w %a5l,%a2u,<<,-(%a1)&,%a7,%acc1 + mac.w %a5l,%a2u,<<,-(%a1)&,%a7,%acc2 + mac.w %a5l,%a2u,>>,(%a3),%d1,%acc1 + mac.w %a5l,%a2u,>>,(%a3),%d1,%acc2 + mac.w %a5l,%a2u,>>,(%a3),%a3,%acc1 + mac.w %a5l,%a2u,>>,(%a3),%a3,%acc2 + mac.w %a5l,%a2u,>>,(%a3),%d2,%acc1 + mac.w %a5l,%a2u,>>,(%a3),%d2,%acc2 + mac.w %a5l,%a2u,>>,(%a3),%a7,%acc1 + mac.w %a5l,%a2u,>>,(%a3),%a7,%acc2 + mac.w %a5l,%a2u,>>,(%a3)&,%d1,%acc1 + mac.w %a5l,%a2u,>>,(%a3)&,%d1,%acc2 + mac.w %a5l,%a2u,>>,(%a3)&,%a3,%acc1 + mac.w %a5l,%a2u,>>,(%a3)&,%a3,%acc2 + mac.w %a5l,%a2u,>>,(%a3)&,%d2,%acc1 + mac.w %a5l,%a2u,>>,(%a3)&,%d2,%acc2 + mac.w %a5l,%a2u,>>,(%a3)&,%a7,%acc1 + mac.w %a5l,%a2u,>>,(%a3)&,%a7,%acc2 + mac.w %a5l,%a2u,>>,(%a2)+,%d1,%acc1 + mac.w %a5l,%a2u,>>,(%a2)+,%d1,%acc2 + mac.w %a5l,%a2u,>>,(%a2)+,%a3,%acc1 + mac.w %a5l,%a2u,>>,(%a2)+,%a3,%acc2 + mac.w %a5l,%a2u,>>,(%a2)+,%d2,%acc1 + mac.w %a5l,%a2u,>>,(%a2)+,%d2,%acc2 + mac.w %a5l,%a2u,>>,(%a2)+,%a7,%acc1 + mac.w %a5l,%a2u,>>,(%a2)+,%a7,%acc2 + mac.w %a5l,%a2u,>>,(%a2)+&,%d1,%acc1 + mac.w %a5l,%a2u,>>,(%a2)+&,%d1,%acc2 + mac.w %a5l,%a2u,>>,(%a2)+&,%a3,%acc1 + mac.w %a5l,%a2u,>>,(%a2)+&,%a3,%acc2 + mac.w %a5l,%a2u,>>,(%a2)+&,%d2,%acc1 + mac.w %a5l,%a2u,>>,(%a2)+&,%d2,%acc2 + mac.w %a5l,%a2u,>>,(%a2)+&,%a7,%acc1 + mac.w %a5l,%a2u,>>,(%a2)+&,%a7,%acc2 + mac.w %a5l,%a2u,>>,10(%a6),%d1,%acc1 + mac.w %a5l,%a2u,>>,10(%a6),%d1,%acc2 + mac.w %a5l,%a2u,>>,10(%a6),%a3,%acc1 + mac.w %a5l,%a2u,>>,10(%a6),%a3,%acc2 + mac.w %a5l,%a2u,>>,10(%a6),%d2,%acc1 + mac.w %a5l,%a2u,>>,10(%a6),%d2,%acc2 + mac.w %a5l,%a2u,>>,10(%a6),%a7,%acc1 + mac.w %a5l,%a2u,>>,10(%a6),%a7,%acc2 + mac.w %a5l,%a2u,>>,10(%a6)&,%d1,%acc1 + mac.w %a5l,%a2u,>>,10(%a6)&,%d1,%acc2 + mac.w %a5l,%a2u,>>,10(%a6)&,%a3,%acc1 + mac.w %a5l,%a2u,>>,10(%a6)&,%a3,%acc2 + mac.w %a5l,%a2u,>>,10(%a6)&,%d2,%acc1 + mac.w %a5l,%a2u,>>,10(%a6)&,%d2,%acc2 + mac.w %a5l,%a2u,>>,10(%a6)&,%a7,%acc1 + mac.w %a5l,%a2u,>>,10(%a6)&,%a7,%acc2 + mac.w %a5l,%a2u,>>,-(%a1),%d1,%acc1 + mac.w %a5l,%a2u,>>,-(%a1),%d1,%acc2 + mac.w %a5l,%a2u,>>,-(%a1),%a3,%acc1 + mac.w %a5l,%a2u,>>,-(%a1),%a3,%acc2 + mac.w %a5l,%a2u,>>,-(%a1),%d2,%acc1 + mac.w %a5l,%a2u,>>,-(%a1),%d2,%acc2 + mac.w %a5l,%a2u,>>,-(%a1),%a7,%acc1 + mac.w %a5l,%a2u,>>,-(%a1),%a7,%acc2 + mac.w %a5l,%a2u,>>,-(%a1)&,%d1,%acc1 + mac.w %a5l,%a2u,>>,-(%a1)&,%d1,%acc2 + mac.w %a5l,%a2u,>>,-(%a1)&,%a3,%acc1 + mac.w %a5l,%a2u,>>,-(%a1)&,%a3,%acc2 + mac.w %a5l,%a2u,>>,-(%a1)&,%d2,%acc1 + mac.w %a5l,%a2u,>>,-(%a1)&,%d2,%acc2 + mac.w %a5l,%a2u,>>,-(%a1)&,%a7,%acc1 + mac.w %a5l,%a2u,>>,-(%a1)&,%a7,%acc2 + mac.w %a5l,%a2u,#1,(%a3),%d1,%acc1 + mac.w %a5l,%a2u,#1,(%a3),%d1,%acc2 + mac.w %a5l,%a2u,#1,(%a3),%a3,%acc1 + mac.w %a5l,%a2u,#1,(%a3),%a3,%acc2 + mac.w %a5l,%a2u,#1,(%a3),%d2,%acc1 + mac.w %a5l,%a2u,#1,(%a3),%d2,%acc2 + mac.w %a5l,%a2u,#1,(%a3),%a7,%acc1 + mac.w %a5l,%a2u,#1,(%a3),%a7,%acc2 + mac.w %a5l,%a2u,#1,(%a3)&,%d1,%acc1 + mac.w %a5l,%a2u,#1,(%a3)&,%d1,%acc2 + mac.w %a5l,%a2u,#1,(%a3)&,%a3,%acc1 + mac.w %a5l,%a2u,#1,(%a3)&,%a3,%acc2 + mac.w %a5l,%a2u,#1,(%a3)&,%d2,%acc1 + mac.w %a5l,%a2u,#1,(%a3)&,%d2,%acc2 + mac.w %a5l,%a2u,#1,(%a3)&,%a7,%acc1 + mac.w %a5l,%a2u,#1,(%a3)&,%a7,%acc2 + mac.w %a5l,%a2u,#1,(%a2)+,%d1,%acc1 + mac.w %a5l,%a2u,#1,(%a2)+,%d1,%acc2 + mac.w %a5l,%a2u,#1,(%a2)+,%a3,%acc1 + mac.w %a5l,%a2u,#1,(%a2)+,%a3,%acc2 + mac.w %a5l,%a2u,#1,(%a2)+,%d2,%acc1 + mac.w %a5l,%a2u,#1,(%a2)+,%d2,%acc2 + mac.w %a5l,%a2u,#1,(%a2)+,%a7,%acc1 + mac.w %a5l,%a2u,#1,(%a2)+,%a7,%acc2 + mac.w %a5l,%a2u,#1,(%a2)+&,%d1,%acc1 + mac.w %a5l,%a2u,#1,(%a2)+&,%d1,%acc2 + mac.w %a5l,%a2u,#1,(%a2)+&,%a3,%acc1 + mac.w %a5l,%a2u,#1,(%a2)+&,%a3,%acc2 + mac.w %a5l,%a2u,#1,(%a2)+&,%d2,%acc1 + mac.w %a5l,%a2u,#1,(%a2)+&,%d2,%acc2 + mac.w %a5l,%a2u,#1,(%a2)+&,%a7,%acc1 + mac.w %a5l,%a2u,#1,(%a2)+&,%a7,%acc2 + mac.w %a5l,%a2u,#1,10(%a6),%d1,%acc1 + mac.w %a5l,%a2u,#1,10(%a6),%d1,%acc2 + mac.w %a5l,%a2u,#1,10(%a6),%a3,%acc1 + mac.w %a5l,%a2u,#1,10(%a6),%a3,%acc2 + mac.w %a5l,%a2u,#1,10(%a6),%d2,%acc1 + mac.w %a5l,%a2u,#1,10(%a6),%d2,%acc2 + mac.w %a5l,%a2u,#1,10(%a6),%a7,%acc1 + mac.w %a5l,%a2u,#1,10(%a6),%a7,%acc2 + mac.w %a5l,%a2u,#1,10(%a6)&,%d1,%acc1 + mac.w %a5l,%a2u,#1,10(%a6)&,%d1,%acc2 + mac.w %a5l,%a2u,#1,10(%a6)&,%a3,%acc1 + mac.w %a5l,%a2u,#1,10(%a6)&,%a3,%acc2 + mac.w %a5l,%a2u,#1,10(%a6)&,%d2,%acc1 + mac.w %a5l,%a2u,#1,10(%a6)&,%d2,%acc2 + mac.w %a5l,%a2u,#1,10(%a6)&,%a7,%acc1 + mac.w %a5l,%a2u,#1,10(%a6)&,%a7,%acc2 + mac.w %a5l,%a2u,#1,-(%a1),%d1,%acc1 + mac.w %a5l,%a2u,#1,-(%a1),%d1,%acc2 + mac.w %a5l,%a2u,#1,-(%a1),%a3,%acc1 + mac.w %a5l,%a2u,#1,-(%a1),%a3,%acc2 + mac.w %a5l,%a2u,#1,-(%a1),%d2,%acc1 + mac.w %a5l,%a2u,#1,-(%a1),%d2,%acc2 + mac.w %a5l,%a2u,#1,-(%a1),%a7,%acc1 + mac.w %a5l,%a2u,#1,-(%a1),%a7,%acc2 + mac.w %a5l,%a2u,#1,-(%a1)&,%d1,%acc1 + mac.w %a5l,%a2u,#1,-(%a1)&,%d1,%acc2 + mac.w %a5l,%a2u,#1,-(%a1)&,%a3,%acc1 + mac.w %a5l,%a2u,#1,-(%a1)&,%a3,%acc2 + mac.w %a5l,%a2u,#1,-(%a1)&,%d2,%acc1 + mac.w %a5l,%a2u,#1,-(%a1)&,%d2,%acc2 + mac.w %a5l,%a2u,#1,-(%a1)&,%a7,%acc1 + mac.w %a5l,%a2u,#1,-(%a1)&,%a7,%acc2 + mac.w %a5l,%a2u,#-1,(%a3),%d1,%acc1 + mac.w %a5l,%a2u,#-1,(%a3),%d1,%acc2 + mac.w %a5l,%a2u,#-1,(%a3),%a3,%acc1 + mac.w %a5l,%a2u,#-1,(%a3),%a3,%acc2 + mac.w %a5l,%a2u,#-1,(%a3),%d2,%acc1 + mac.w %a5l,%a2u,#-1,(%a3),%d2,%acc2 + mac.w %a5l,%a2u,#-1,(%a3),%a7,%acc1 + mac.w %a5l,%a2u,#-1,(%a3),%a7,%acc2 + mac.w %a5l,%a2u,#-1,(%a3)&,%d1,%acc1 + mac.w %a5l,%a2u,#-1,(%a3)&,%d1,%acc2 + mac.w %a5l,%a2u,#-1,(%a3)&,%a3,%acc1 + mac.w %a5l,%a2u,#-1,(%a3)&,%a3,%acc2 + mac.w %a5l,%a2u,#-1,(%a3)&,%d2,%acc1 + mac.w %a5l,%a2u,#-1,(%a3)&,%d2,%acc2 + mac.w %a5l,%a2u,#-1,(%a3)&,%a7,%acc1 + mac.w %a5l,%a2u,#-1,(%a3)&,%a7,%acc2 + mac.w %a5l,%a2u,#-1,(%a2)+,%d1,%acc1 + mac.w %a5l,%a2u,#-1,(%a2)+,%d1,%acc2 + mac.w %a5l,%a2u,#-1,(%a2)+,%a3,%acc1 + mac.w %a5l,%a2u,#-1,(%a2)+,%a3,%acc2 + mac.w %a5l,%a2u,#-1,(%a2)+,%d2,%acc1 + mac.w %a5l,%a2u,#-1,(%a2)+,%d2,%acc2 + mac.w %a5l,%a2u,#-1,(%a2)+,%a7,%acc1 + mac.w %a5l,%a2u,#-1,(%a2)+,%a7,%acc2 + mac.w %a5l,%a2u,#-1,(%a2)+&,%d1,%acc1 + mac.w %a5l,%a2u,#-1,(%a2)+&,%d1,%acc2 + mac.w %a5l,%a2u,#-1,(%a2)+&,%a3,%acc1 + mac.w %a5l,%a2u,#-1,(%a2)+&,%a3,%acc2 + mac.w %a5l,%a2u,#-1,(%a2)+&,%d2,%acc1 + mac.w %a5l,%a2u,#-1,(%a2)+&,%d2,%acc2 + mac.w %a5l,%a2u,#-1,(%a2)+&,%a7,%acc1 + mac.w %a5l,%a2u,#-1,(%a2)+&,%a7,%acc2 + mac.w %a5l,%a2u,#-1,10(%a6),%d1,%acc1 + mac.w %a5l,%a2u,#-1,10(%a6),%d1,%acc2 + mac.w %a5l,%a2u,#-1,10(%a6),%a3,%acc1 + mac.w %a5l,%a2u,#-1,10(%a6),%a3,%acc2 + mac.w %a5l,%a2u,#-1,10(%a6),%d2,%acc1 + mac.w %a5l,%a2u,#-1,10(%a6),%d2,%acc2 + mac.w %a5l,%a2u,#-1,10(%a6),%a7,%acc1 + mac.w %a5l,%a2u,#-1,10(%a6),%a7,%acc2 + mac.w %a5l,%a2u,#-1,10(%a6)&,%d1,%acc1 + mac.w %a5l,%a2u,#-1,10(%a6)&,%d1,%acc2 + mac.w %a5l,%a2u,#-1,10(%a6)&,%a3,%acc1 + mac.w %a5l,%a2u,#-1,10(%a6)&,%a3,%acc2 + mac.w %a5l,%a2u,#-1,10(%a6)&,%d2,%acc1 + mac.w %a5l,%a2u,#-1,10(%a6)&,%d2,%acc2 + mac.w %a5l,%a2u,#-1,10(%a6)&,%a7,%acc1 + mac.w %a5l,%a2u,#-1,10(%a6)&,%a7,%acc2 + mac.w %a5l,%a2u,#-1,-(%a1),%d1,%acc1 + mac.w %a5l,%a2u,#-1,-(%a1),%d1,%acc2 + mac.w %a5l,%a2u,#-1,-(%a1),%a3,%acc1 + mac.w %a5l,%a2u,#-1,-(%a1),%a3,%acc2 + mac.w %a5l,%a2u,#-1,-(%a1),%d2,%acc1 + mac.w %a5l,%a2u,#-1,-(%a1),%d2,%acc2 + mac.w %a5l,%a2u,#-1,-(%a1),%a7,%acc1 + mac.w %a5l,%a2u,#-1,-(%a1),%a7,%acc2 + mac.w %a5l,%a2u,#-1,-(%a1)&,%d1,%acc1 + mac.w %a5l,%a2u,#-1,-(%a1)&,%d1,%acc2 + mac.w %a5l,%a2u,#-1,-(%a1)&,%a3,%acc1 + mac.w %a5l,%a2u,#-1,-(%a1)&,%a3,%acc2 + mac.w %a5l,%a2u,#-1,-(%a1)&,%d2,%acc1 + mac.w %a5l,%a2u,#-1,-(%a1)&,%d2,%acc2 + mac.w %a5l,%a2u,#-1,-(%a1)&,%a7,%acc1 + mac.w %a5l,%a2u,#-1,-(%a1)&,%a7,%acc2 + mac.w %a5l,%d3l,(%a3),%d1,%acc1 + mac.w %a5l,%d3l,(%a3),%d1,%acc2 + mac.w %a5l,%d3l,(%a3),%a3,%acc1 + mac.w %a5l,%d3l,(%a3),%a3,%acc2 + mac.w %a5l,%d3l,(%a3),%d2,%acc1 + mac.w %a5l,%d3l,(%a3),%d2,%acc2 + mac.w %a5l,%d3l,(%a3),%a7,%acc1 + mac.w %a5l,%d3l,(%a3),%a7,%acc2 + mac.w %a5l,%d3l,(%a3)&,%d1,%acc1 + mac.w %a5l,%d3l,(%a3)&,%d1,%acc2 + mac.w %a5l,%d3l,(%a3)&,%a3,%acc1 + mac.w %a5l,%d3l,(%a3)&,%a3,%acc2 + mac.w %a5l,%d3l,(%a3)&,%d2,%acc1 + mac.w %a5l,%d3l,(%a3)&,%d2,%acc2 + mac.w %a5l,%d3l,(%a3)&,%a7,%acc1 + mac.w %a5l,%d3l,(%a3)&,%a7,%acc2 + mac.w %a5l,%d3l,(%a2)+,%d1,%acc1 + mac.w %a5l,%d3l,(%a2)+,%d1,%acc2 + mac.w %a5l,%d3l,(%a2)+,%a3,%acc1 + mac.w %a5l,%d3l,(%a2)+,%a3,%acc2 + mac.w %a5l,%d3l,(%a2)+,%d2,%acc1 + mac.w %a5l,%d3l,(%a2)+,%d2,%acc2 + mac.w %a5l,%d3l,(%a2)+,%a7,%acc1 + mac.w %a5l,%d3l,(%a2)+,%a7,%acc2 + mac.w %a5l,%d3l,(%a2)+&,%d1,%acc1 + mac.w %a5l,%d3l,(%a2)+&,%d1,%acc2 + mac.w %a5l,%d3l,(%a2)+&,%a3,%acc1 + mac.w %a5l,%d3l,(%a2)+&,%a3,%acc2 + mac.w %a5l,%d3l,(%a2)+&,%d2,%acc1 + mac.w %a5l,%d3l,(%a2)+&,%d2,%acc2 + mac.w %a5l,%d3l,(%a2)+&,%a7,%acc1 + mac.w %a5l,%d3l,(%a2)+&,%a7,%acc2 + mac.w %a5l,%d3l,10(%a6),%d1,%acc1 + mac.w %a5l,%d3l,10(%a6),%d1,%acc2 + mac.w %a5l,%d3l,10(%a6),%a3,%acc1 + mac.w %a5l,%d3l,10(%a6),%a3,%acc2 + mac.w %a5l,%d3l,10(%a6),%d2,%acc1 + mac.w %a5l,%d3l,10(%a6),%d2,%acc2 + mac.w %a5l,%d3l,10(%a6),%a7,%acc1 + mac.w %a5l,%d3l,10(%a6),%a7,%acc2 + mac.w %a5l,%d3l,10(%a6)&,%d1,%acc1 + mac.w %a5l,%d3l,10(%a6)&,%d1,%acc2 + mac.w %a5l,%d3l,10(%a6)&,%a3,%acc1 + mac.w %a5l,%d3l,10(%a6)&,%a3,%acc2 + mac.w %a5l,%d3l,10(%a6)&,%d2,%acc1 + mac.w %a5l,%d3l,10(%a6)&,%d2,%acc2 + mac.w %a5l,%d3l,10(%a6)&,%a7,%acc1 + mac.w %a5l,%d3l,10(%a6)&,%a7,%acc2 + mac.w %a5l,%d3l,-(%a1),%d1,%acc1 + mac.w %a5l,%d3l,-(%a1),%d1,%acc2 + mac.w %a5l,%d3l,-(%a1),%a3,%acc1 + mac.w %a5l,%d3l,-(%a1),%a3,%acc2 + mac.w %a5l,%d3l,-(%a1),%d2,%acc1 + mac.w %a5l,%d3l,-(%a1),%d2,%acc2 + mac.w %a5l,%d3l,-(%a1),%a7,%acc1 + mac.w %a5l,%d3l,-(%a1),%a7,%acc2 + mac.w %a5l,%d3l,-(%a1)&,%d1,%acc1 + mac.w %a5l,%d3l,-(%a1)&,%d1,%acc2 + mac.w %a5l,%d3l,-(%a1)&,%a3,%acc1 + mac.w %a5l,%d3l,-(%a1)&,%a3,%acc2 + mac.w %a5l,%d3l,-(%a1)&,%d2,%acc1 + mac.w %a5l,%d3l,-(%a1)&,%d2,%acc2 + mac.w %a5l,%d3l,-(%a1)&,%a7,%acc1 + mac.w %a5l,%d3l,-(%a1)&,%a7,%acc2 + mac.w %a5l,%d3l,<<,(%a3),%d1,%acc1 + mac.w %a5l,%d3l,<<,(%a3),%d1,%acc2 + mac.w %a5l,%d3l,<<,(%a3),%a3,%acc1 + mac.w %a5l,%d3l,<<,(%a3),%a3,%acc2 + mac.w %a5l,%d3l,<<,(%a3),%d2,%acc1 + mac.w %a5l,%d3l,<<,(%a3),%d2,%acc2 + mac.w %a5l,%d3l,<<,(%a3),%a7,%acc1 + mac.w %a5l,%d3l,<<,(%a3),%a7,%acc2 + mac.w %a5l,%d3l,<<,(%a3)&,%d1,%acc1 + mac.w %a5l,%d3l,<<,(%a3)&,%d1,%acc2 + mac.w %a5l,%d3l,<<,(%a3)&,%a3,%acc1 + mac.w %a5l,%d3l,<<,(%a3)&,%a3,%acc2 + mac.w %a5l,%d3l,<<,(%a3)&,%d2,%acc1 + mac.w %a5l,%d3l,<<,(%a3)&,%d2,%acc2 + mac.w %a5l,%d3l,<<,(%a3)&,%a7,%acc1 + mac.w %a5l,%d3l,<<,(%a3)&,%a7,%acc2 + mac.w %a5l,%d3l,<<,(%a2)+,%d1,%acc1 + mac.w %a5l,%d3l,<<,(%a2)+,%d1,%acc2 + mac.w %a5l,%d3l,<<,(%a2)+,%a3,%acc1 + mac.w %a5l,%d3l,<<,(%a2)+,%a3,%acc2 + mac.w %a5l,%d3l,<<,(%a2)+,%d2,%acc1 + mac.w %a5l,%d3l,<<,(%a2)+,%d2,%acc2 + mac.w %a5l,%d3l,<<,(%a2)+,%a7,%acc1 + mac.w %a5l,%d3l,<<,(%a2)+,%a7,%acc2 + mac.w %a5l,%d3l,<<,(%a2)+&,%d1,%acc1 + mac.w %a5l,%d3l,<<,(%a2)+&,%d1,%acc2 + mac.w %a5l,%d3l,<<,(%a2)+&,%a3,%acc1 + mac.w %a5l,%d3l,<<,(%a2)+&,%a3,%acc2 + mac.w %a5l,%d3l,<<,(%a2)+&,%d2,%acc1 + mac.w %a5l,%d3l,<<,(%a2)+&,%d2,%acc2 + mac.w %a5l,%d3l,<<,(%a2)+&,%a7,%acc1 + mac.w %a5l,%d3l,<<,(%a2)+&,%a7,%acc2 + mac.w %a5l,%d3l,<<,10(%a6),%d1,%acc1 + mac.w %a5l,%d3l,<<,10(%a6),%d1,%acc2 + mac.w %a5l,%d3l,<<,10(%a6),%a3,%acc1 + mac.w %a5l,%d3l,<<,10(%a6),%a3,%acc2 + mac.w %a5l,%d3l,<<,10(%a6),%d2,%acc1 + mac.w %a5l,%d3l,<<,10(%a6),%d2,%acc2 + mac.w %a5l,%d3l,<<,10(%a6),%a7,%acc1 + mac.w %a5l,%d3l,<<,10(%a6),%a7,%acc2 + mac.w %a5l,%d3l,<<,10(%a6)&,%d1,%acc1 + mac.w %a5l,%d3l,<<,10(%a6)&,%d1,%acc2 + mac.w %a5l,%d3l,<<,10(%a6)&,%a3,%acc1 + mac.w %a5l,%d3l,<<,10(%a6)&,%a3,%acc2 + mac.w %a5l,%d3l,<<,10(%a6)&,%d2,%acc1 + mac.w %a5l,%d3l,<<,10(%a6)&,%d2,%acc2 + mac.w %a5l,%d3l,<<,10(%a6)&,%a7,%acc1 + mac.w %a5l,%d3l,<<,10(%a6)&,%a7,%acc2 + mac.w %a5l,%d3l,<<,-(%a1),%d1,%acc1 + mac.w %a5l,%d3l,<<,-(%a1),%d1,%acc2 + mac.w %a5l,%d3l,<<,-(%a1),%a3,%acc1 + mac.w %a5l,%d3l,<<,-(%a1),%a3,%acc2 + mac.w %a5l,%d3l,<<,-(%a1),%d2,%acc1 + mac.w %a5l,%d3l,<<,-(%a1),%d2,%acc2 + mac.w %a5l,%d3l,<<,-(%a1),%a7,%acc1 + mac.w %a5l,%d3l,<<,-(%a1),%a7,%acc2 + mac.w %a5l,%d3l,<<,-(%a1)&,%d1,%acc1 + mac.w %a5l,%d3l,<<,-(%a1)&,%d1,%acc2 + mac.w %a5l,%d3l,<<,-(%a1)&,%a3,%acc1 + mac.w %a5l,%d3l,<<,-(%a1)&,%a3,%acc2 + mac.w %a5l,%d3l,<<,-(%a1)&,%d2,%acc1 + mac.w %a5l,%d3l,<<,-(%a1)&,%d2,%acc2 + mac.w %a5l,%d3l,<<,-(%a1)&,%a7,%acc1 + mac.w %a5l,%d3l,<<,-(%a1)&,%a7,%acc2 + mac.w %a5l,%d3l,>>,(%a3),%d1,%acc1 + mac.w %a5l,%d3l,>>,(%a3),%d1,%acc2 + mac.w %a5l,%d3l,>>,(%a3),%a3,%acc1 + mac.w %a5l,%d3l,>>,(%a3),%a3,%acc2 + mac.w %a5l,%d3l,>>,(%a3),%d2,%acc1 + mac.w %a5l,%d3l,>>,(%a3),%d2,%acc2 + mac.w %a5l,%d3l,>>,(%a3),%a7,%acc1 + mac.w %a5l,%d3l,>>,(%a3),%a7,%acc2 + mac.w %a5l,%d3l,>>,(%a3)&,%d1,%acc1 + mac.w %a5l,%d3l,>>,(%a3)&,%d1,%acc2 + mac.w %a5l,%d3l,>>,(%a3)&,%a3,%acc1 + mac.w %a5l,%d3l,>>,(%a3)&,%a3,%acc2 + mac.w %a5l,%d3l,>>,(%a3)&,%d2,%acc1 + mac.w %a5l,%d3l,>>,(%a3)&,%d2,%acc2 + mac.w %a5l,%d3l,>>,(%a3)&,%a7,%acc1 + mac.w %a5l,%d3l,>>,(%a3)&,%a7,%acc2 + mac.w %a5l,%d3l,>>,(%a2)+,%d1,%acc1 + mac.w %a5l,%d3l,>>,(%a2)+,%d1,%acc2 + mac.w %a5l,%d3l,>>,(%a2)+,%a3,%acc1 + mac.w %a5l,%d3l,>>,(%a2)+,%a3,%acc2 + mac.w %a5l,%d3l,>>,(%a2)+,%d2,%acc1 + mac.w %a5l,%d3l,>>,(%a2)+,%d2,%acc2 + mac.w %a5l,%d3l,>>,(%a2)+,%a7,%acc1 + mac.w %a5l,%d3l,>>,(%a2)+,%a7,%acc2 + mac.w %a5l,%d3l,>>,(%a2)+&,%d1,%acc1 + mac.w %a5l,%d3l,>>,(%a2)+&,%d1,%acc2 + mac.w %a5l,%d3l,>>,(%a2)+&,%a3,%acc1 + mac.w %a5l,%d3l,>>,(%a2)+&,%a3,%acc2 + mac.w %a5l,%d3l,>>,(%a2)+&,%d2,%acc1 + mac.w %a5l,%d3l,>>,(%a2)+&,%d2,%acc2 + mac.w %a5l,%d3l,>>,(%a2)+&,%a7,%acc1 + mac.w %a5l,%d3l,>>,(%a2)+&,%a7,%acc2 + mac.w %a5l,%d3l,>>,10(%a6),%d1,%acc1 + mac.w %a5l,%d3l,>>,10(%a6),%d1,%acc2 + mac.w %a5l,%d3l,>>,10(%a6),%a3,%acc1 + mac.w %a5l,%d3l,>>,10(%a6),%a3,%acc2 + mac.w %a5l,%d3l,>>,10(%a6),%d2,%acc1 + mac.w %a5l,%d3l,>>,10(%a6),%d2,%acc2 + mac.w %a5l,%d3l,>>,10(%a6),%a7,%acc1 + mac.w %a5l,%d3l,>>,10(%a6),%a7,%acc2 + mac.w %a5l,%d3l,>>,10(%a6)&,%d1,%acc1 + mac.w %a5l,%d3l,>>,10(%a6)&,%d1,%acc2 + mac.w %a5l,%d3l,>>,10(%a6)&,%a3,%acc1 + mac.w %a5l,%d3l,>>,10(%a6)&,%a3,%acc2 + mac.w %a5l,%d3l,>>,10(%a6)&,%d2,%acc1 + mac.w %a5l,%d3l,>>,10(%a6)&,%d2,%acc2 + mac.w %a5l,%d3l,>>,10(%a6)&,%a7,%acc1 + mac.w %a5l,%d3l,>>,10(%a6)&,%a7,%acc2 + mac.w %a5l,%d3l,>>,-(%a1),%d1,%acc1 + mac.w %a5l,%d3l,>>,-(%a1),%d1,%acc2 + mac.w %a5l,%d3l,>>,-(%a1),%a3,%acc1 + mac.w %a5l,%d3l,>>,-(%a1),%a3,%acc2 + mac.w %a5l,%d3l,>>,-(%a1),%d2,%acc1 + mac.w %a5l,%d3l,>>,-(%a1),%d2,%acc2 + mac.w %a5l,%d3l,>>,-(%a1),%a7,%acc1 + mac.w %a5l,%d3l,>>,-(%a1),%a7,%acc2 + mac.w %a5l,%d3l,>>,-(%a1)&,%d1,%acc1 + mac.w %a5l,%d3l,>>,-(%a1)&,%d1,%acc2 + mac.w %a5l,%d3l,>>,-(%a1)&,%a3,%acc1 + mac.w %a5l,%d3l,>>,-(%a1)&,%a3,%acc2 + mac.w %a5l,%d3l,>>,-(%a1)&,%d2,%acc1 + mac.w %a5l,%d3l,>>,-(%a1)&,%d2,%acc2 + mac.w %a5l,%d3l,>>,-(%a1)&,%a7,%acc1 + mac.w %a5l,%d3l,>>,-(%a1)&,%a7,%acc2 + mac.w %a5l,%d3l,#1,(%a3),%d1,%acc1 + mac.w %a5l,%d3l,#1,(%a3),%d1,%acc2 + mac.w %a5l,%d3l,#1,(%a3),%a3,%acc1 + mac.w %a5l,%d3l,#1,(%a3),%a3,%acc2 + mac.w %a5l,%d3l,#1,(%a3),%d2,%acc1 + mac.w %a5l,%d3l,#1,(%a3),%d2,%acc2 + mac.w %a5l,%d3l,#1,(%a3),%a7,%acc1 + mac.w %a5l,%d3l,#1,(%a3),%a7,%acc2 + mac.w %a5l,%d3l,#1,(%a3)&,%d1,%acc1 + mac.w %a5l,%d3l,#1,(%a3)&,%d1,%acc2 + mac.w %a5l,%d3l,#1,(%a3)&,%a3,%acc1 + mac.w %a5l,%d3l,#1,(%a3)&,%a3,%acc2 + mac.w %a5l,%d3l,#1,(%a3)&,%d2,%acc1 + mac.w %a5l,%d3l,#1,(%a3)&,%d2,%acc2 + mac.w %a5l,%d3l,#1,(%a3)&,%a7,%acc1 + mac.w %a5l,%d3l,#1,(%a3)&,%a7,%acc2 + mac.w %a5l,%d3l,#1,(%a2)+,%d1,%acc1 + mac.w %a5l,%d3l,#1,(%a2)+,%d1,%acc2 + mac.w %a5l,%d3l,#1,(%a2)+,%a3,%acc1 + mac.w %a5l,%d3l,#1,(%a2)+,%a3,%acc2 + mac.w %a5l,%d3l,#1,(%a2)+,%d2,%acc1 + mac.w %a5l,%d3l,#1,(%a2)+,%d2,%acc2 + mac.w %a5l,%d3l,#1,(%a2)+,%a7,%acc1 + mac.w %a5l,%d3l,#1,(%a2)+,%a7,%acc2 + mac.w %a5l,%d3l,#1,(%a2)+&,%d1,%acc1 + mac.w %a5l,%d3l,#1,(%a2)+&,%d1,%acc2 + mac.w %a5l,%d3l,#1,(%a2)+&,%a3,%acc1 + mac.w %a5l,%d3l,#1,(%a2)+&,%a3,%acc2 + mac.w %a5l,%d3l,#1,(%a2)+&,%d2,%acc1 + mac.w %a5l,%d3l,#1,(%a2)+&,%d2,%acc2 + mac.w %a5l,%d3l,#1,(%a2)+&,%a7,%acc1 + mac.w %a5l,%d3l,#1,(%a2)+&,%a7,%acc2 + mac.w %a5l,%d3l,#1,10(%a6),%d1,%acc1 + mac.w %a5l,%d3l,#1,10(%a6),%d1,%acc2 + mac.w %a5l,%d3l,#1,10(%a6),%a3,%acc1 + mac.w %a5l,%d3l,#1,10(%a6),%a3,%acc2 + mac.w %a5l,%d3l,#1,10(%a6),%d2,%acc1 + mac.w %a5l,%d3l,#1,10(%a6),%d2,%acc2 + mac.w %a5l,%d3l,#1,10(%a6),%a7,%acc1 + mac.w %a5l,%d3l,#1,10(%a6),%a7,%acc2 + mac.w %a5l,%d3l,#1,10(%a6)&,%d1,%acc1 + mac.w %a5l,%d3l,#1,10(%a6)&,%d1,%acc2 + mac.w %a5l,%d3l,#1,10(%a6)&,%a3,%acc1 + mac.w %a5l,%d3l,#1,10(%a6)&,%a3,%acc2 + mac.w %a5l,%d3l,#1,10(%a6)&,%d2,%acc1 + mac.w %a5l,%d3l,#1,10(%a6)&,%d2,%acc2 + mac.w %a5l,%d3l,#1,10(%a6)&,%a7,%acc1 + mac.w %a5l,%d3l,#1,10(%a6)&,%a7,%acc2 + mac.w %a5l,%d3l,#1,-(%a1),%d1,%acc1 + mac.w %a5l,%d3l,#1,-(%a1),%d1,%acc2 + mac.w %a5l,%d3l,#1,-(%a1),%a3,%acc1 + mac.w %a5l,%d3l,#1,-(%a1),%a3,%acc2 + mac.w %a5l,%d3l,#1,-(%a1),%d2,%acc1 + mac.w %a5l,%d3l,#1,-(%a1),%d2,%acc2 + mac.w %a5l,%d3l,#1,-(%a1),%a7,%acc1 + mac.w %a5l,%d3l,#1,-(%a1),%a7,%acc2 + mac.w %a5l,%d3l,#1,-(%a1)&,%d1,%acc1 + mac.w %a5l,%d3l,#1,-(%a1)&,%d1,%acc2 + mac.w %a5l,%d3l,#1,-(%a1)&,%a3,%acc1 + mac.w %a5l,%d3l,#1,-(%a1)&,%a3,%acc2 + mac.w %a5l,%d3l,#1,-(%a1)&,%d2,%acc1 + mac.w %a5l,%d3l,#1,-(%a1)&,%d2,%acc2 + mac.w %a5l,%d3l,#1,-(%a1)&,%a7,%acc1 + mac.w %a5l,%d3l,#1,-(%a1)&,%a7,%acc2 + mac.w %a5l,%d3l,#-1,(%a3),%d1,%acc1 + mac.w %a5l,%d3l,#-1,(%a3),%d1,%acc2 + mac.w %a5l,%d3l,#-1,(%a3),%a3,%acc1 + mac.w %a5l,%d3l,#-1,(%a3),%a3,%acc2 + mac.w %a5l,%d3l,#-1,(%a3),%d2,%acc1 + mac.w %a5l,%d3l,#-1,(%a3),%d2,%acc2 + mac.w %a5l,%d3l,#-1,(%a3),%a7,%acc1 + mac.w %a5l,%d3l,#-1,(%a3),%a7,%acc2 + mac.w %a5l,%d3l,#-1,(%a3)&,%d1,%acc1 + mac.w %a5l,%d3l,#-1,(%a3)&,%d1,%acc2 + mac.w %a5l,%d3l,#-1,(%a3)&,%a3,%acc1 + mac.w %a5l,%d3l,#-1,(%a3)&,%a3,%acc2 + mac.w %a5l,%d3l,#-1,(%a3)&,%d2,%acc1 + mac.w %a5l,%d3l,#-1,(%a3)&,%d2,%acc2 + mac.w %a5l,%d3l,#-1,(%a3)&,%a7,%acc1 + mac.w %a5l,%d3l,#-1,(%a3)&,%a7,%acc2 + mac.w %a5l,%d3l,#-1,(%a2)+,%d1,%acc1 + mac.w %a5l,%d3l,#-1,(%a2)+,%d1,%acc2 + mac.w %a5l,%d3l,#-1,(%a2)+,%a3,%acc1 + mac.w %a5l,%d3l,#-1,(%a2)+,%a3,%acc2 + mac.w %a5l,%d3l,#-1,(%a2)+,%d2,%acc1 + mac.w %a5l,%d3l,#-1,(%a2)+,%d2,%acc2 + mac.w %a5l,%d3l,#-1,(%a2)+,%a7,%acc1 + mac.w %a5l,%d3l,#-1,(%a2)+,%a7,%acc2 + mac.w %a5l,%d3l,#-1,(%a2)+&,%d1,%acc1 + mac.w %a5l,%d3l,#-1,(%a2)+&,%d1,%acc2 + mac.w %a5l,%d3l,#-1,(%a2)+&,%a3,%acc1 + mac.w %a5l,%d3l,#-1,(%a2)+&,%a3,%acc2 + mac.w %a5l,%d3l,#-1,(%a2)+&,%d2,%acc1 + mac.w %a5l,%d3l,#-1,(%a2)+&,%d2,%acc2 + mac.w %a5l,%d3l,#-1,(%a2)+&,%a7,%acc1 + mac.w %a5l,%d3l,#-1,(%a2)+&,%a7,%acc2 + mac.w %a5l,%d3l,#-1,10(%a6),%d1,%acc1 + mac.w %a5l,%d3l,#-1,10(%a6),%d1,%acc2 + mac.w %a5l,%d3l,#-1,10(%a6),%a3,%acc1 + mac.w %a5l,%d3l,#-1,10(%a6),%a3,%acc2 + mac.w %a5l,%d3l,#-1,10(%a6),%d2,%acc1 + mac.w %a5l,%d3l,#-1,10(%a6),%d2,%acc2 + mac.w %a5l,%d3l,#-1,10(%a6),%a7,%acc1 + mac.w %a5l,%d3l,#-1,10(%a6),%a7,%acc2 + mac.w %a5l,%d3l,#-1,10(%a6)&,%d1,%acc1 + mac.w %a5l,%d3l,#-1,10(%a6)&,%d1,%acc2 + mac.w %a5l,%d3l,#-1,10(%a6)&,%a3,%acc1 + mac.w %a5l,%d3l,#-1,10(%a6)&,%a3,%acc2 + mac.w %a5l,%d3l,#-1,10(%a6)&,%d2,%acc1 + mac.w %a5l,%d3l,#-1,10(%a6)&,%d2,%acc2 + mac.w %a5l,%d3l,#-1,10(%a6)&,%a7,%acc1 + mac.w %a5l,%d3l,#-1,10(%a6)&,%a7,%acc2 + mac.w %a5l,%d3l,#-1,-(%a1),%d1,%acc1 + mac.w %a5l,%d3l,#-1,-(%a1),%d1,%acc2 + mac.w %a5l,%d3l,#-1,-(%a1),%a3,%acc1 + mac.w %a5l,%d3l,#-1,-(%a1),%a3,%acc2 + mac.w %a5l,%d3l,#-1,-(%a1),%d2,%acc1 + mac.w %a5l,%d3l,#-1,-(%a1),%d2,%acc2 + mac.w %a5l,%d3l,#-1,-(%a1),%a7,%acc1 + mac.w %a5l,%d3l,#-1,-(%a1),%a7,%acc2 + mac.w %a5l,%d3l,#-1,-(%a1)&,%d1,%acc1 + mac.w %a5l,%d3l,#-1,-(%a1)&,%d1,%acc2 + mac.w %a5l,%d3l,#-1,-(%a1)&,%a3,%acc1 + mac.w %a5l,%d3l,#-1,-(%a1)&,%a3,%acc2 + mac.w %a5l,%d3l,#-1,-(%a1)&,%d2,%acc1 + mac.w %a5l,%d3l,#-1,-(%a1)&,%d2,%acc2 + mac.w %a5l,%d3l,#-1,-(%a1)&,%a7,%acc1 + mac.w %a5l,%d3l,#-1,-(%a1)&,%a7,%acc2 + mac.w %a5l,%a7u,(%a3),%d1,%acc1 + mac.w %a5l,%a7u,(%a3),%d1,%acc2 + mac.w %a5l,%a7u,(%a3),%a3,%acc1 + mac.w %a5l,%a7u,(%a3),%a3,%acc2 + mac.w %a5l,%a7u,(%a3),%d2,%acc1 + mac.w %a5l,%a7u,(%a3),%d2,%acc2 + mac.w %a5l,%a7u,(%a3),%a7,%acc1 + mac.w %a5l,%a7u,(%a3),%a7,%acc2 + mac.w %a5l,%a7u,(%a3)&,%d1,%acc1 + mac.w %a5l,%a7u,(%a3)&,%d1,%acc2 + mac.w %a5l,%a7u,(%a3)&,%a3,%acc1 + mac.w %a5l,%a7u,(%a3)&,%a3,%acc2 + mac.w %a5l,%a7u,(%a3)&,%d2,%acc1 + mac.w %a5l,%a7u,(%a3)&,%d2,%acc2 + mac.w %a5l,%a7u,(%a3)&,%a7,%acc1 + mac.w %a5l,%a7u,(%a3)&,%a7,%acc2 + mac.w %a5l,%a7u,(%a2)+,%d1,%acc1 + mac.w %a5l,%a7u,(%a2)+,%d1,%acc2 + mac.w %a5l,%a7u,(%a2)+,%a3,%acc1 + mac.w %a5l,%a7u,(%a2)+,%a3,%acc2 + mac.w %a5l,%a7u,(%a2)+,%d2,%acc1 + mac.w %a5l,%a7u,(%a2)+,%d2,%acc2 + mac.w %a5l,%a7u,(%a2)+,%a7,%acc1 + mac.w %a5l,%a7u,(%a2)+,%a7,%acc2 + mac.w %a5l,%a7u,(%a2)+&,%d1,%acc1 + mac.w %a5l,%a7u,(%a2)+&,%d1,%acc2 + mac.w %a5l,%a7u,(%a2)+&,%a3,%acc1 + mac.w %a5l,%a7u,(%a2)+&,%a3,%acc2 + mac.w %a5l,%a7u,(%a2)+&,%d2,%acc1 + mac.w %a5l,%a7u,(%a2)+&,%d2,%acc2 + mac.w %a5l,%a7u,(%a2)+&,%a7,%acc1 + mac.w %a5l,%a7u,(%a2)+&,%a7,%acc2 + mac.w %a5l,%a7u,10(%a6),%d1,%acc1 + mac.w %a5l,%a7u,10(%a6),%d1,%acc2 + mac.w %a5l,%a7u,10(%a6),%a3,%acc1 + mac.w %a5l,%a7u,10(%a6),%a3,%acc2 + mac.w %a5l,%a7u,10(%a6),%d2,%acc1 + mac.w %a5l,%a7u,10(%a6),%d2,%acc2 + mac.w %a5l,%a7u,10(%a6),%a7,%acc1 + mac.w %a5l,%a7u,10(%a6),%a7,%acc2 + mac.w %a5l,%a7u,10(%a6)&,%d1,%acc1 + mac.w %a5l,%a7u,10(%a6)&,%d1,%acc2 + mac.w %a5l,%a7u,10(%a6)&,%a3,%acc1 + mac.w %a5l,%a7u,10(%a6)&,%a3,%acc2 + mac.w %a5l,%a7u,10(%a6)&,%d2,%acc1 + mac.w %a5l,%a7u,10(%a6)&,%d2,%acc2 + mac.w %a5l,%a7u,10(%a6)&,%a7,%acc1 + mac.w %a5l,%a7u,10(%a6)&,%a7,%acc2 + mac.w %a5l,%a7u,-(%a1),%d1,%acc1 + mac.w %a5l,%a7u,-(%a1),%d1,%acc2 + mac.w %a5l,%a7u,-(%a1),%a3,%acc1 + mac.w %a5l,%a7u,-(%a1),%a3,%acc2 + mac.w %a5l,%a7u,-(%a1),%d2,%acc1 + mac.w %a5l,%a7u,-(%a1),%d2,%acc2 + mac.w %a5l,%a7u,-(%a1),%a7,%acc1 + mac.w %a5l,%a7u,-(%a1),%a7,%acc2 + mac.w %a5l,%a7u,-(%a1)&,%d1,%acc1 + mac.w %a5l,%a7u,-(%a1)&,%d1,%acc2 + mac.w %a5l,%a7u,-(%a1)&,%a3,%acc1 + mac.w %a5l,%a7u,-(%a1)&,%a3,%acc2 + mac.w %a5l,%a7u,-(%a1)&,%d2,%acc1 + mac.w %a5l,%a7u,-(%a1)&,%d2,%acc2 + mac.w %a5l,%a7u,-(%a1)&,%a7,%acc1 + mac.w %a5l,%a7u,-(%a1)&,%a7,%acc2 + mac.w %a5l,%a7u,<<,(%a3),%d1,%acc1 + mac.w %a5l,%a7u,<<,(%a3),%d1,%acc2 + mac.w %a5l,%a7u,<<,(%a3),%a3,%acc1 + mac.w %a5l,%a7u,<<,(%a3),%a3,%acc2 + mac.w %a5l,%a7u,<<,(%a3),%d2,%acc1 + mac.w %a5l,%a7u,<<,(%a3),%d2,%acc2 + mac.w %a5l,%a7u,<<,(%a3),%a7,%acc1 + mac.w %a5l,%a7u,<<,(%a3),%a7,%acc2 + mac.w %a5l,%a7u,<<,(%a3)&,%d1,%acc1 + mac.w %a5l,%a7u,<<,(%a3)&,%d1,%acc2 + mac.w %a5l,%a7u,<<,(%a3)&,%a3,%acc1 + mac.w %a5l,%a7u,<<,(%a3)&,%a3,%acc2 + mac.w %a5l,%a7u,<<,(%a3)&,%d2,%acc1 + mac.w %a5l,%a7u,<<,(%a3)&,%d2,%acc2 + mac.w %a5l,%a7u,<<,(%a3)&,%a7,%acc1 + mac.w %a5l,%a7u,<<,(%a3)&,%a7,%acc2 + mac.w %a5l,%a7u,<<,(%a2)+,%d1,%acc1 + mac.w %a5l,%a7u,<<,(%a2)+,%d1,%acc2 + mac.w %a5l,%a7u,<<,(%a2)+,%a3,%acc1 + mac.w %a5l,%a7u,<<,(%a2)+,%a3,%acc2 + mac.w %a5l,%a7u,<<,(%a2)+,%d2,%acc1 + mac.w %a5l,%a7u,<<,(%a2)+,%d2,%acc2 + mac.w %a5l,%a7u,<<,(%a2)+,%a7,%acc1 + mac.w %a5l,%a7u,<<,(%a2)+,%a7,%acc2 + mac.w %a5l,%a7u,<<,(%a2)+&,%d1,%acc1 + mac.w %a5l,%a7u,<<,(%a2)+&,%d1,%acc2 + mac.w %a5l,%a7u,<<,(%a2)+&,%a3,%acc1 + mac.w %a5l,%a7u,<<,(%a2)+&,%a3,%acc2 + mac.w %a5l,%a7u,<<,(%a2)+&,%d2,%acc1 + mac.w %a5l,%a7u,<<,(%a2)+&,%d2,%acc2 + mac.w %a5l,%a7u,<<,(%a2)+&,%a7,%acc1 + mac.w %a5l,%a7u,<<,(%a2)+&,%a7,%acc2 + mac.w %a5l,%a7u,<<,10(%a6),%d1,%acc1 + mac.w %a5l,%a7u,<<,10(%a6),%d1,%acc2 + mac.w %a5l,%a7u,<<,10(%a6),%a3,%acc1 + mac.w %a5l,%a7u,<<,10(%a6),%a3,%acc2 + mac.w %a5l,%a7u,<<,10(%a6),%d2,%acc1 + mac.w %a5l,%a7u,<<,10(%a6),%d2,%acc2 + mac.w %a5l,%a7u,<<,10(%a6),%a7,%acc1 + mac.w %a5l,%a7u,<<,10(%a6),%a7,%acc2 + mac.w %a5l,%a7u,<<,10(%a6)&,%d1,%acc1 + mac.w %a5l,%a7u,<<,10(%a6)&,%d1,%acc2 + mac.w %a5l,%a7u,<<,10(%a6)&,%a3,%acc1 + mac.w %a5l,%a7u,<<,10(%a6)&,%a3,%acc2 + mac.w %a5l,%a7u,<<,10(%a6)&,%d2,%acc1 + mac.w %a5l,%a7u,<<,10(%a6)&,%d2,%acc2 + mac.w %a5l,%a7u,<<,10(%a6)&,%a7,%acc1 + mac.w %a5l,%a7u,<<,10(%a6)&,%a7,%acc2 + mac.w %a5l,%a7u,<<,-(%a1),%d1,%acc1 + mac.w %a5l,%a7u,<<,-(%a1),%d1,%acc2 + mac.w %a5l,%a7u,<<,-(%a1),%a3,%acc1 + mac.w %a5l,%a7u,<<,-(%a1),%a3,%acc2 + mac.w %a5l,%a7u,<<,-(%a1),%d2,%acc1 + mac.w %a5l,%a7u,<<,-(%a1),%d2,%acc2 + mac.w %a5l,%a7u,<<,-(%a1),%a7,%acc1 + mac.w %a5l,%a7u,<<,-(%a1),%a7,%acc2 + mac.w %a5l,%a7u,<<,-(%a1)&,%d1,%acc1 + mac.w %a5l,%a7u,<<,-(%a1)&,%d1,%acc2 + mac.w %a5l,%a7u,<<,-(%a1)&,%a3,%acc1 + mac.w %a5l,%a7u,<<,-(%a1)&,%a3,%acc2 + mac.w %a5l,%a7u,<<,-(%a1)&,%d2,%acc1 + mac.w %a5l,%a7u,<<,-(%a1)&,%d2,%acc2 + mac.w %a5l,%a7u,<<,-(%a1)&,%a7,%acc1 + mac.w %a5l,%a7u,<<,-(%a1)&,%a7,%acc2 + mac.w %a5l,%a7u,>>,(%a3),%d1,%acc1 + mac.w %a5l,%a7u,>>,(%a3),%d1,%acc2 + mac.w %a5l,%a7u,>>,(%a3),%a3,%acc1 + mac.w %a5l,%a7u,>>,(%a3),%a3,%acc2 + mac.w %a5l,%a7u,>>,(%a3),%d2,%acc1 + mac.w %a5l,%a7u,>>,(%a3),%d2,%acc2 + mac.w %a5l,%a7u,>>,(%a3),%a7,%acc1 + mac.w %a5l,%a7u,>>,(%a3),%a7,%acc2 + mac.w %a5l,%a7u,>>,(%a3)&,%d1,%acc1 + mac.w %a5l,%a7u,>>,(%a3)&,%d1,%acc2 + mac.w %a5l,%a7u,>>,(%a3)&,%a3,%acc1 + mac.w %a5l,%a7u,>>,(%a3)&,%a3,%acc2 + mac.w %a5l,%a7u,>>,(%a3)&,%d2,%acc1 + mac.w %a5l,%a7u,>>,(%a3)&,%d2,%acc2 + mac.w %a5l,%a7u,>>,(%a3)&,%a7,%acc1 + mac.w %a5l,%a7u,>>,(%a3)&,%a7,%acc2 + mac.w %a5l,%a7u,>>,(%a2)+,%d1,%acc1 + mac.w %a5l,%a7u,>>,(%a2)+,%d1,%acc2 + mac.w %a5l,%a7u,>>,(%a2)+,%a3,%acc1 + mac.w %a5l,%a7u,>>,(%a2)+,%a3,%acc2 + mac.w %a5l,%a7u,>>,(%a2)+,%d2,%acc1 + mac.w %a5l,%a7u,>>,(%a2)+,%d2,%acc2 + mac.w %a5l,%a7u,>>,(%a2)+,%a7,%acc1 + mac.w %a5l,%a7u,>>,(%a2)+,%a7,%acc2 + mac.w %a5l,%a7u,>>,(%a2)+&,%d1,%acc1 + mac.w %a5l,%a7u,>>,(%a2)+&,%d1,%acc2 + mac.w %a5l,%a7u,>>,(%a2)+&,%a3,%acc1 + mac.w %a5l,%a7u,>>,(%a2)+&,%a3,%acc2 + mac.w %a5l,%a7u,>>,(%a2)+&,%d2,%acc1 + mac.w %a5l,%a7u,>>,(%a2)+&,%d2,%acc2 + mac.w %a5l,%a7u,>>,(%a2)+&,%a7,%acc1 + mac.w %a5l,%a7u,>>,(%a2)+&,%a7,%acc2 + mac.w %a5l,%a7u,>>,10(%a6),%d1,%acc1 + mac.w %a5l,%a7u,>>,10(%a6),%d1,%acc2 + mac.w %a5l,%a7u,>>,10(%a6),%a3,%acc1 + mac.w %a5l,%a7u,>>,10(%a6),%a3,%acc2 + mac.w %a5l,%a7u,>>,10(%a6),%d2,%acc1 + mac.w %a5l,%a7u,>>,10(%a6),%d2,%acc2 + mac.w %a5l,%a7u,>>,10(%a6),%a7,%acc1 + mac.w %a5l,%a7u,>>,10(%a6),%a7,%acc2 + mac.w %a5l,%a7u,>>,10(%a6)&,%d1,%acc1 + mac.w %a5l,%a7u,>>,10(%a6)&,%d1,%acc2 + mac.w %a5l,%a7u,>>,10(%a6)&,%a3,%acc1 + mac.w %a5l,%a7u,>>,10(%a6)&,%a3,%acc2 + mac.w %a5l,%a7u,>>,10(%a6)&,%d2,%acc1 + mac.w %a5l,%a7u,>>,10(%a6)&,%d2,%acc2 + mac.w %a5l,%a7u,>>,10(%a6)&,%a7,%acc1 + mac.w %a5l,%a7u,>>,10(%a6)&,%a7,%acc2 + mac.w %a5l,%a7u,>>,-(%a1),%d1,%acc1 + mac.w %a5l,%a7u,>>,-(%a1),%d1,%acc2 + mac.w %a5l,%a7u,>>,-(%a1),%a3,%acc1 + mac.w %a5l,%a7u,>>,-(%a1),%a3,%acc2 + mac.w %a5l,%a7u,>>,-(%a1),%d2,%acc1 + mac.w %a5l,%a7u,>>,-(%a1),%d2,%acc2 + mac.w %a5l,%a7u,>>,-(%a1),%a7,%acc1 + mac.w %a5l,%a7u,>>,-(%a1),%a7,%acc2 + mac.w %a5l,%a7u,>>,-(%a1)&,%d1,%acc1 + mac.w %a5l,%a7u,>>,-(%a1)&,%d1,%acc2 + mac.w %a5l,%a7u,>>,-(%a1)&,%a3,%acc1 + mac.w %a5l,%a7u,>>,-(%a1)&,%a3,%acc2 + mac.w %a5l,%a7u,>>,-(%a1)&,%d2,%acc1 + mac.w %a5l,%a7u,>>,-(%a1)&,%d2,%acc2 + mac.w %a5l,%a7u,>>,-(%a1)&,%a7,%acc1 + mac.w %a5l,%a7u,>>,-(%a1)&,%a7,%acc2 + mac.w %a5l,%a7u,#1,(%a3),%d1,%acc1 + mac.w %a5l,%a7u,#1,(%a3),%d1,%acc2 + mac.w %a5l,%a7u,#1,(%a3),%a3,%acc1 + mac.w %a5l,%a7u,#1,(%a3),%a3,%acc2 + mac.w %a5l,%a7u,#1,(%a3),%d2,%acc1 + mac.w %a5l,%a7u,#1,(%a3),%d2,%acc2 + mac.w %a5l,%a7u,#1,(%a3),%a7,%acc1 + mac.w %a5l,%a7u,#1,(%a3),%a7,%acc2 + mac.w %a5l,%a7u,#1,(%a3)&,%d1,%acc1 + mac.w %a5l,%a7u,#1,(%a3)&,%d1,%acc2 + mac.w %a5l,%a7u,#1,(%a3)&,%a3,%acc1 + mac.w %a5l,%a7u,#1,(%a3)&,%a3,%acc2 + mac.w %a5l,%a7u,#1,(%a3)&,%d2,%acc1 + mac.w %a5l,%a7u,#1,(%a3)&,%d2,%acc2 + mac.w %a5l,%a7u,#1,(%a3)&,%a7,%acc1 + mac.w %a5l,%a7u,#1,(%a3)&,%a7,%acc2 + mac.w %a5l,%a7u,#1,(%a2)+,%d1,%acc1 + mac.w %a5l,%a7u,#1,(%a2)+,%d1,%acc2 + mac.w %a5l,%a7u,#1,(%a2)+,%a3,%acc1 + mac.w %a5l,%a7u,#1,(%a2)+,%a3,%acc2 + mac.w %a5l,%a7u,#1,(%a2)+,%d2,%acc1 + mac.w %a5l,%a7u,#1,(%a2)+,%d2,%acc2 + mac.w %a5l,%a7u,#1,(%a2)+,%a7,%acc1 + mac.w %a5l,%a7u,#1,(%a2)+,%a7,%acc2 + mac.w %a5l,%a7u,#1,(%a2)+&,%d1,%acc1 + mac.w %a5l,%a7u,#1,(%a2)+&,%d1,%acc2 + mac.w %a5l,%a7u,#1,(%a2)+&,%a3,%acc1 + mac.w %a5l,%a7u,#1,(%a2)+&,%a3,%acc2 + mac.w %a5l,%a7u,#1,(%a2)+&,%d2,%acc1 + mac.w %a5l,%a7u,#1,(%a2)+&,%d2,%acc2 + mac.w %a5l,%a7u,#1,(%a2)+&,%a7,%acc1 + mac.w %a5l,%a7u,#1,(%a2)+&,%a7,%acc2 + mac.w %a5l,%a7u,#1,10(%a6),%d1,%acc1 + mac.w %a5l,%a7u,#1,10(%a6),%d1,%acc2 + mac.w %a5l,%a7u,#1,10(%a6),%a3,%acc1 + mac.w %a5l,%a7u,#1,10(%a6),%a3,%acc2 + mac.w %a5l,%a7u,#1,10(%a6),%d2,%acc1 + mac.w %a5l,%a7u,#1,10(%a6),%d2,%acc2 + mac.w %a5l,%a7u,#1,10(%a6),%a7,%acc1 + mac.w %a5l,%a7u,#1,10(%a6),%a7,%acc2 + mac.w %a5l,%a7u,#1,10(%a6)&,%d1,%acc1 + mac.w %a5l,%a7u,#1,10(%a6)&,%d1,%acc2 + mac.w %a5l,%a7u,#1,10(%a6)&,%a3,%acc1 + mac.w %a5l,%a7u,#1,10(%a6)&,%a3,%acc2 + mac.w %a5l,%a7u,#1,10(%a6)&,%d2,%acc1 + mac.w %a5l,%a7u,#1,10(%a6)&,%d2,%acc2 + mac.w %a5l,%a7u,#1,10(%a6)&,%a7,%acc1 + mac.w %a5l,%a7u,#1,10(%a6)&,%a7,%acc2 + mac.w %a5l,%a7u,#1,-(%a1),%d1,%acc1 + mac.w %a5l,%a7u,#1,-(%a1),%d1,%acc2 + mac.w %a5l,%a7u,#1,-(%a1),%a3,%acc1 + mac.w %a5l,%a7u,#1,-(%a1),%a3,%acc2 + mac.w %a5l,%a7u,#1,-(%a1),%d2,%acc1 + mac.w %a5l,%a7u,#1,-(%a1),%d2,%acc2 + mac.w %a5l,%a7u,#1,-(%a1),%a7,%acc1 + mac.w %a5l,%a7u,#1,-(%a1),%a7,%acc2 + mac.w %a5l,%a7u,#1,-(%a1)&,%d1,%acc1 + mac.w %a5l,%a7u,#1,-(%a1)&,%d1,%acc2 + mac.w %a5l,%a7u,#1,-(%a1)&,%a3,%acc1 + mac.w %a5l,%a7u,#1,-(%a1)&,%a3,%acc2 + mac.w %a5l,%a7u,#1,-(%a1)&,%d2,%acc1 + mac.w %a5l,%a7u,#1,-(%a1)&,%d2,%acc2 + mac.w %a5l,%a7u,#1,-(%a1)&,%a7,%acc1 + mac.w %a5l,%a7u,#1,-(%a1)&,%a7,%acc2 + mac.w %a5l,%a7u,#-1,(%a3),%d1,%acc1 + mac.w %a5l,%a7u,#-1,(%a3),%d1,%acc2 + mac.w %a5l,%a7u,#-1,(%a3),%a3,%acc1 + mac.w %a5l,%a7u,#-1,(%a3),%a3,%acc2 + mac.w %a5l,%a7u,#-1,(%a3),%d2,%acc1 + mac.w %a5l,%a7u,#-1,(%a3),%d2,%acc2 + mac.w %a5l,%a7u,#-1,(%a3),%a7,%acc1 + mac.w %a5l,%a7u,#-1,(%a3),%a7,%acc2 + mac.w %a5l,%a7u,#-1,(%a3)&,%d1,%acc1 + mac.w %a5l,%a7u,#-1,(%a3)&,%d1,%acc2 + mac.w %a5l,%a7u,#-1,(%a3)&,%a3,%acc1 + mac.w %a5l,%a7u,#-1,(%a3)&,%a3,%acc2 + mac.w %a5l,%a7u,#-1,(%a3)&,%d2,%acc1 + mac.w %a5l,%a7u,#-1,(%a3)&,%d2,%acc2 + mac.w %a5l,%a7u,#-1,(%a3)&,%a7,%acc1 + mac.w %a5l,%a7u,#-1,(%a3)&,%a7,%acc2 + mac.w %a5l,%a7u,#-1,(%a2)+,%d1,%acc1 + mac.w %a5l,%a7u,#-1,(%a2)+,%d1,%acc2 + mac.w %a5l,%a7u,#-1,(%a2)+,%a3,%acc1 + mac.w %a5l,%a7u,#-1,(%a2)+,%a3,%acc2 + mac.w %a5l,%a7u,#-1,(%a2)+,%d2,%acc1 + mac.w %a5l,%a7u,#-1,(%a2)+,%d2,%acc2 + mac.w %a5l,%a7u,#-1,(%a2)+,%a7,%acc1 + mac.w %a5l,%a7u,#-1,(%a2)+,%a7,%acc2 + mac.w %a5l,%a7u,#-1,(%a2)+&,%d1,%acc1 + mac.w %a5l,%a7u,#-1,(%a2)+&,%d1,%acc2 + mac.w %a5l,%a7u,#-1,(%a2)+&,%a3,%acc1 + mac.w %a5l,%a7u,#-1,(%a2)+&,%a3,%acc2 + mac.w %a5l,%a7u,#-1,(%a2)+&,%d2,%acc1 + mac.w %a5l,%a7u,#-1,(%a2)+&,%d2,%acc2 + mac.w %a5l,%a7u,#-1,(%a2)+&,%a7,%acc1 + mac.w %a5l,%a7u,#-1,(%a2)+&,%a7,%acc2 + mac.w %a5l,%a7u,#-1,10(%a6),%d1,%acc1 + mac.w %a5l,%a7u,#-1,10(%a6),%d1,%acc2 + mac.w %a5l,%a7u,#-1,10(%a6),%a3,%acc1 + mac.w %a5l,%a7u,#-1,10(%a6),%a3,%acc2 + mac.w %a5l,%a7u,#-1,10(%a6),%d2,%acc1 + mac.w %a5l,%a7u,#-1,10(%a6),%d2,%acc2 + mac.w %a5l,%a7u,#-1,10(%a6),%a7,%acc1 + mac.w %a5l,%a7u,#-1,10(%a6),%a7,%acc2 + mac.w %a5l,%a7u,#-1,10(%a6)&,%d1,%acc1 + mac.w %a5l,%a7u,#-1,10(%a6)&,%d1,%acc2 + mac.w %a5l,%a7u,#-1,10(%a6)&,%a3,%acc1 + mac.w %a5l,%a7u,#-1,10(%a6)&,%a3,%acc2 + mac.w %a5l,%a7u,#-1,10(%a6)&,%d2,%acc1 + mac.w %a5l,%a7u,#-1,10(%a6)&,%d2,%acc2 + mac.w %a5l,%a7u,#-1,10(%a6)&,%a7,%acc1 + mac.w %a5l,%a7u,#-1,10(%a6)&,%a7,%acc2 + mac.w %a5l,%a7u,#-1,-(%a1),%d1,%acc1 + mac.w %a5l,%a7u,#-1,-(%a1),%d1,%acc2 + mac.w %a5l,%a7u,#-1,-(%a1),%a3,%acc1 + mac.w %a5l,%a7u,#-1,-(%a1),%a3,%acc2 + mac.w %a5l,%a7u,#-1,-(%a1),%d2,%acc1 + mac.w %a5l,%a7u,#-1,-(%a1),%d2,%acc2 + mac.w %a5l,%a7u,#-1,-(%a1),%a7,%acc1 + mac.w %a5l,%a7u,#-1,-(%a1),%a7,%acc2 + mac.w %a5l,%a7u,#-1,-(%a1)&,%d1,%acc1 + mac.w %a5l,%a7u,#-1,-(%a1)&,%d1,%acc2 + mac.w %a5l,%a7u,#-1,-(%a1)&,%a3,%acc1 + mac.w %a5l,%a7u,#-1,-(%a1)&,%a3,%acc2 + mac.w %a5l,%a7u,#-1,-(%a1)&,%d2,%acc1 + mac.w %a5l,%a7u,#-1,-(%a1)&,%d2,%acc2 + mac.w %a5l,%a7u,#-1,-(%a1)&,%a7,%acc1 + mac.w %a5l,%a7u,#-1,-(%a1)&,%a7,%acc2 + mac.w %a5l,%d1l,(%a3),%d1,%acc1 + mac.w %a5l,%d1l,(%a3),%d1,%acc2 + mac.w %a5l,%d1l,(%a3),%a3,%acc1 + mac.w %a5l,%d1l,(%a3),%a3,%acc2 + mac.w %a5l,%d1l,(%a3),%d2,%acc1 + mac.w %a5l,%d1l,(%a3),%d2,%acc2 + mac.w %a5l,%d1l,(%a3),%a7,%acc1 + mac.w %a5l,%d1l,(%a3),%a7,%acc2 + mac.w %a5l,%d1l,(%a3)&,%d1,%acc1 + mac.w %a5l,%d1l,(%a3)&,%d1,%acc2 + mac.w %a5l,%d1l,(%a3)&,%a3,%acc1 + mac.w %a5l,%d1l,(%a3)&,%a3,%acc2 + mac.w %a5l,%d1l,(%a3)&,%d2,%acc1 + mac.w %a5l,%d1l,(%a3)&,%d2,%acc2 + mac.w %a5l,%d1l,(%a3)&,%a7,%acc1 + mac.w %a5l,%d1l,(%a3)&,%a7,%acc2 + mac.w %a5l,%d1l,(%a2)+,%d1,%acc1 + mac.w %a5l,%d1l,(%a2)+,%d1,%acc2 + mac.w %a5l,%d1l,(%a2)+,%a3,%acc1 + mac.w %a5l,%d1l,(%a2)+,%a3,%acc2 + mac.w %a5l,%d1l,(%a2)+,%d2,%acc1 + mac.w %a5l,%d1l,(%a2)+,%d2,%acc2 + mac.w %a5l,%d1l,(%a2)+,%a7,%acc1 + mac.w %a5l,%d1l,(%a2)+,%a7,%acc2 + mac.w %a5l,%d1l,(%a2)+&,%d1,%acc1 + mac.w %a5l,%d1l,(%a2)+&,%d1,%acc2 + mac.w %a5l,%d1l,(%a2)+&,%a3,%acc1 + mac.w %a5l,%d1l,(%a2)+&,%a3,%acc2 + mac.w %a5l,%d1l,(%a2)+&,%d2,%acc1 + mac.w %a5l,%d1l,(%a2)+&,%d2,%acc2 + mac.w %a5l,%d1l,(%a2)+&,%a7,%acc1 + mac.w %a5l,%d1l,(%a2)+&,%a7,%acc2 + mac.w %a5l,%d1l,10(%a6),%d1,%acc1 + mac.w %a5l,%d1l,10(%a6),%d1,%acc2 + mac.w %a5l,%d1l,10(%a6),%a3,%acc1 + mac.w %a5l,%d1l,10(%a6),%a3,%acc2 + mac.w %a5l,%d1l,10(%a6),%d2,%acc1 + mac.w %a5l,%d1l,10(%a6),%d2,%acc2 + mac.w %a5l,%d1l,10(%a6),%a7,%acc1 + mac.w %a5l,%d1l,10(%a6),%a7,%acc2 + mac.w %a5l,%d1l,10(%a6)&,%d1,%acc1 + mac.w %a5l,%d1l,10(%a6)&,%d1,%acc2 + mac.w %a5l,%d1l,10(%a6)&,%a3,%acc1 + mac.w %a5l,%d1l,10(%a6)&,%a3,%acc2 + mac.w %a5l,%d1l,10(%a6)&,%d2,%acc1 + mac.w %a5l,%d1l,10(%a6)&,%d2,%acc2 + mac.w %a5l,%d1l,10(%a6)&,%a7,%acc1 + mac.w %a5l,%d1l,10(%a6)&,%a7,%acc2 + mac.w %a5l,%d1l,-(%a1),%d1,%acc1 + mac.w %a5l,%d1l,-(%a1),%d1,%acc2 + mac.w %a5l,%d1l,-(%a1),%a3,%acc1 + mac.w %a5l,%d1l,-(%a1),%a3,%acc2 + mac.w %a5l,%d1l,-(%a1),%d2,%acc1 + mac.w %a5l,%d1l,-(%a1),%d2,%acc2 + mac.w %a5l,%d1l,-(%a1),%a7,%acc1 + mac.w %a5l,%d1l,-(%a1),%a7,%acc2 + mac.w %a5l,%d1l,-(%a1)&,%d1,%acc1 + mac.w %a5l,%d1l,-(%a1)&,%d1,%acc2 + mac.w %a5l,%d1l,-(%a1)&,%a3,%acc1 + mac.w %a5l,%d1l,-(%a1)&,%a3,%acc2 + mac.w %a5l,%d1l,-(%a1)&,%d2,%acc1 + mac.w %a5l,%d1l,-(%a1)&,%d2,%acc2 + mac.w %a5l,%d1l,-(%a1)&,%a7,%acc1 + mac.w %a5l,%d1l,-(%a1)&,%a7,%acc2 + mac.w %a5l,%d1l,<<,(%a3),%d1,%acc1 + mac.w %a5l,%d1l,<<,(%a3),%d1,%acc2 + mac.w %a5l,%d1l,<<,(%a3),%a3,%acc1 + mac.w %a5l,%d1l,<<,(%a3),%a3,%acc2 + mac.w %a5l,%d1l,<<,(%a3),%d2,%acc1 + mac.w %a5l,%d1l,<<,(%a3),%d2,%acc2 + mac.w %a5l,%d1l,<<,(%a3),%a7,%acc1 + mac.w %a5l,%d1l,<<,(%a3),%a7,%acc2 + mac.w %a5l,%d1l,<<,(%a3)&,%d1,%acc1 + mac.w %a5l,%d1l,<<,(%a3)&,%d1,%acc2 + mac.w %a5l,%d1l,<<,(%a3)&,%a3,%acc1 + mac.w %a5l,%d1l,<<,(%a3)&,%a3,%acc2 + mac.w %a5l,%d1l,<<,(%a3)&,%d2,%acc1 + mac.w %a5l,%d1l,<<,(%a3)&,%d2,%acc2 + mac.w %a5l,%d1l,<<,(%a3)&,%a7,%acc1 + mac.w %a5l,%d1l,<<,(%a3)&,%a7,%acc2 + mac.w %a5l,%d1l,<<,(%a2)+,%d1,%acc1 + mac.w %a5l,%d1l,<<,(%a2)+,%d1,%acc2 + mac.w %a5l,%d1l,<<,(%a2)+,%a3,%acc1 + mac.w %a5l,%d1l,<<,(%a2)+,%a3,%acc2 + mac.w %a5l,%d1l,<<,(%a2)+,%d2,%acc1 + mac.w %a5l,%d1l,<<,(%a2)+,%d2,%acc2 + mac.w %a5l,%d1l,<<,(%a2)+,%a7,%acc1 + mac.w %a5l,%d1l,<<,(%a2)+,%a7,%acc2 + mac.w %a5l,%d1l,<<,(%a2)+&,%d1,%acc1 + mac.w %a5l,%d1l,<<,(%a2)+&,%d1,%acc2 + mac.w %a5l,%d1l,<<,(%a2)+&,%a3,%acc1 + mac.w %a5l,%d1l,<<,(%a2)+&,%a3,%acc2 + mac.w %a5l,%d1l,<<,(%a2)+&,%d2,%acc1 + mac.w %a5l,%d1l,<<,(%a2)+&,%d2,%acc2 + mac.w %a5l,%d1l,<<,(%a2)+&,%a7,%acc1 + mac.w %a5l,%d1l,<<,(%a2)+&,%a7,%acc2 + mac.w %a5l,%d1l,<<,10(%a6),%d1,%acc1 + mac.w %a5l,%d1l,<<,10(%a6),%d1,%acc2 + mac.w %a5l,%d1l,<<,10(%a6),%a3,%acc1 + mac.w %a5l,%d1l,<<,10(%a6),%a3,%acc2 + mac.w %a5l,%d1l,<<,10(%a6),%d2,%acc1 + mac.w %a5l,%d1l,<<,10(%a6),%d2,%acc2 + mac.w %a5l,%d1l,<<,10(%a6),%a7,%acc1 + mac.w %a5l,%d1l,<<,10(%a6),%a7,%acc2 + mac.w %a5l,%d1l,<<,10(%a6)&,%d1,%acc1 + mac.w %a5l,%d1l,<<,10(%a6)&,%d1,%acc2 + mac.w %a5l,%d1l,<<,10(%a6)&,%a3,%acc1 + mac.w %a5l,%d1l,<<,10(%a6)&,%a3,%acc2 + mac.w %a5l,%d1l,<<,10(%a6)&,%d2,%acc1 + mac.w %a5l,%d1l,<<,10(%a6)&,%d2,%acc2 + mac.w %a5l,%d1l,<<,10(%a6)&,%a7,%acc1 + mac.w %a5l,%d1l,<<,10(%a6)&,%a7,%acc2 + mac.w %a5l,%d1l,<<,-(%a1),%d1,%acc1 + mac.w %a5l,%d1l,<<,-(%a1),%d1,%acc2 + mac.w %a5l,%d1l,<<,-(%a1),%a3,%acc1 + mac.w %a5l,%d1l,<<,-(%a1),%a3,%acc2 + mac.w %a5l,%d1l,<<,-(%a1),%d2,%acc1 + mac.w %a5l,%d1l,<<,-(%a1),%d2,%acc2 + mac.w %a5l,%d1l,<<,-(%a1),%a7,%acc1 + mac.w %a5l,%d1l,<<,-(%a1),%a7,%acc2 + mac.w %a5l,%d1l,<<,-(%a1)&,%d1,%acc1 + mac.w %a5l,%d1l,<<,-(%a1)&,%d1,%acc2 + mac.w %a5l,%d1l,<<,-(%a1)&,%a3,%acc1 + mac.w %a5l,%d1l,<<,-(%a1)&,%a3,%acc2 + mac.w %a5l,%d1l,<<,-(%a1)&,%d2,%acc1 + mac.w %a5l,%d1l,<<,-(%a1)&,%d2,%acc2 + mac.w %a5l,%d1l,<<,-(%a1)&,%a7,%acc1 + mac.w %a5l,%d1l,<<,-(%a1)&,%a7,%acc2 + mac.w %a5l,%d1l,>>,(%a3),%d1,%acc1 + mac.w %a5l,%d1l,>>,(%a3),%d1,%acc2 + mac.w %a5l,%d1l,>>,(%a3),%a3,%acc1 + mac.w %a5l,%d1l,>>,(%a3),%a3,%acc2 + mac.w %a5l,%d1l,>>,(%a3),%d2,%acc1 + mac.w %a5l,%d1l,>>,(%a3),%d2,%acc2 + mac.w %a5l,%d1l,>>,(%a3),%a7,%acc1 + mac.w %a5l,%d1l,>>,(%a3),%a7,%acc2 + mac.w %a5l,%d1l,>>,(%a3)&,%d1,%acc1 + mac.w %a5l,%d1l,>>,(%a3)&,%d1,%acc2 + mac.w %a5l,%d1l,>>,(%a3)&,%a3,%acc1 + mac.w %a5l,%d1l,>>,(%a3)&,%a3,%acc2 + mac.w %a5l,%d1l,>>,(%a3)&,%d2,%acc1 + mac.w %a5l,%d1l,>>,(%a3)&,%d2,%acc2 + mac.w %a5l,%d1l,>>,(%a3)&,%a7,%acc1 + mac.w %a5l,%d1l,>>,(%a3)&,%a7,%acc2 + mac.w %a5l,%d1l,>>,(%a2)+,%d1,%acc1 + mac.w %a5l,%d1l,>>,(%a2)+,%d1,%acc2 + mac.w %a5l,%d1l,>>,(%a2)+,%a3,%acc1 + mac.w %a5l,%d1l,>>,(%a2)+,%a3,%acc2 + mac.w %a5l,%d1l,>>,(%a2)+,%d2,%acc1 + mac.w %a5l,%d1l,>>,(%a2)+,%d2,%acc2 + mac.w %a5l,%d1l,>>,(%a2)+,%a7,%acc1 + mac.w %a5l,%d1l,>>,(%a2)+,%a7,%acc2 + mac.w %a5l,%d1l,>>,(%a2)+&,%d1,%acc1 + mac.w %a5l,%d1l,>>,(%a2)+&,%d1,%acc2 + mac.w %a5l,%d1l,>>,(%a2)+&,%a3,%acc1 + mac.w %a5l,%d1l,>>,(%a2)+&,%a3,%acc2 + mac.w %a5l,%d1l,>>,(%a2)+&,%d2,%acc1 + mac.w %a5l,%d1l,>>,(%a2)+&,%d2,%acc2 + mac.w %a5l,%d1l,>>,(%a2)+&,%a7,%acc1 + mac.w %a5l,%d1l,>>,(%a2)+&,%a7,%acc2 + mac.w %a5l,%d1l,>>,10(%a6),%d1,%acc1 + mac.w %a5l,%d1l,>>,10(%a6),%d1,%acc2 + mac.w %a5l,%d1l,>>,10(%a6),%a3,%acc1 + mac.w %a5l,%d1l,>>,10(%a6),%a3,%acc2 + mac.w %a5l,%d1l,>>,10(%a6),%d2,%acc1 + mac.w %a5l,%d1l,>>,10(%a6),%d2,%acc2 + mac.w %a5l,%d1l,>>,10(%a6),%a7,%acc1 + mac.w %a5l,%d1l,>>,10(%a6),%a7,%acc2 + mac.w %a5l,%d1l,>>,10(%a6)&,%d1,%acc1 + mac.w %a5l,%d1l,>>,10(%a6)&,%d1,%acc2 + mac.w %a5l,%d1l,>>,10(%a6)&,%a3,%acc1 + mac.w %a5l,%d1l,>>,10(%a6)&,%a3,%acc2 + mac.w %a5l,%d1l,>>,10(%a6)&,%d2,%acc1 + mac.w %a5l,%d1l,>>,10(%a6)&,%d2,%acc2 + mac.w %a5l,%d1l,>>,10(%a6)&,%a7,%acc1 + mac.w %a5l,%d1l,>>,10(%a6)&,%a7,%acc2 + mac.w %a5l,%d1l,>>,-(%a1),%d1,%acc1 + mac.w %a5l,%d1l,>>,-(%a1),%d1,%acc2 + mac.w %a5l,%d1l,>>,-(%a1),%a3,%acc1 + mac.w %a5l,%d1l,>>,-(%a1),%a3,%acc2 + mac.w %a5l,%d1l,>>,-(%a1),%d2,%acc1 + mac.w %a5l,%d1l,>>,-(%a1),%d2,%acc2 + mac.w %a5l,%d1l,>>,-(%a1),%a7,%acc1 + mac.w %a5l,%d1l,>>,-(%a1),%a7,%acc2 + mac.w %a5l,%d1l,>>,-(%a1)&,%d1,%acc1 + mac.w %a5l,%d1l,>>,-(%a1)&,%d1,%acc2 + mac.w %a5l,%d1l,>>,-(%a1)&,%a3,%acc1 + mac.w %a5l,%d1l,>>,-(%a1)&,%a3,%acc2 + mac.w %a5l,%d1l,>>,-(%a1)&,%d2,%acc1 + mac.w %a5l,%d1l,>>,-(%a1)&,%d2,%acc2 + mac.w %a5l,%d1l,>>,-(%a1)&,%a7,%acc1 + mac.w %a5l,%d1l,>>,-(%a1)&,%a7,%acc2 + mac.w %a5l,%d1l,#1,(%a3),%d1,%acc1 + mac.w %a5l,%d1l,#1,(%a3),%d1,%acc2 + mac.w %a5l,%d1l,#1,(%a3),%a3,%acc1 + mac.w %a5l,%d1l,#1,(%a3),%a3,%acc2 + mac.w %a5l,%d1l,#1,(%a3),%d2,%acc1 + mac.w %a5l,%d1l,#1,(%a3),%d2,%acc2 + mac.w %a5l,%d1l,#1,(%a3),%a7,%acc1 + mac.w %a5l,%d1l,#1,(%a3),%a7,%acc2 + mac.w %a5l,%d1l,#1,(%a3)&,%d1,%acc1 + mac.w %a5l,%d1l,#1,(%a3)&,%d1,%acc2 + mac.w %a5l,%d1l,#1,(%a3)&,%a3,%acc1 + mac.w %a5l,%d1l,#1,(%a3)&,%a3,%acc2 + mac.w %a5l,%d1l,#1,(%a3)&,%d2,%acc1 + mac.w %a5l,%d1l,#1,(%a3)&,%d2,%acc2 + mac.w %a5l,%d1l,#1,(%a3)&,%a7,%acc1 + mac.w %a5l,%d1l,#1,(%a3)&,%a7,%acc2 + mac.w %a5l,%d1l,#1,(%a2)+,%d1,%acc1 + mac.w %a5l,%d1l,#1,(%a2)+,%d1,%acc2 + mac.w %a5l,%d1l,#1,(%a2)+,%a3,%acc1 + mac.w %a5l,%d1l,#1,(%a2)+,%a3,%acc2 + mac.w %a5l,%d1l,#1,(%a2)+,%d2,%acc1 + mac.w %a5l,%d1l,#1,(%a2)+,%d2,%acc2 + mac.w %a5l,%d1l,#1,(%a2)+,%a7,%acc1 + mac.w %a5l,%d1l,#1,(%a2)+,%a7,%acc2 + mac.w %a5l,%d1l,#1,(%a2)+&,%d1,%acc1 + mac.w %a5l,%d1l,#1,(%a2)+&,%d1,%acc2 + mac.w %a5l,%d1l,#1,(%a2)+&,%a3,%acc1 + mac.w %a5l,%d1l,#1,(%a2)+&,%a3,%acc2 + mac.w %a5l,%d1l,#1,(%a2)+&,%d2,%acc1 + mac.w %a5l,%d1l,#1,(%a2)+&,%d2,%acc2 + mac.w %a5l,%d1l,#1,(%a2)+&,%a7,%acc1 + mac.w %a5l,%d1l,#1,(%a2)+&,%a7,%acc2 + mac.w %a5l,%d1l,#1,10(%a6),%d1,%acc1 + mac.w %a5l,%d1l,#1,10(%a6),%d1,%acc2 + mac.w %a5l,%d1l,#1,10(%a6),%a3,%acc1 + mac.w %a5l,%d1l,#1,10(%a6),%a3,%acc2 + mac.w %a5l,%d1l,#1,10(%a6),%d2,%acc1 + mac.w %a5l,%d1l,#1,10(%a6),%d2,%acc2 + mac.w %a5l,%d1l,#1,10(%a6),%a7,%acc1 + mac.w %a5l,%d1l,#1,10(%a6),%a7,%acc2 + mac.w %a5l,%d1l,#1,10(%a6)&,%d1,%acc1 + mac.w %a5l,%d1l,#1,10(%a6)&,%d1,%acc2 + mac.w %a5l,%d1l,#1,10(%a6)&,%a3,%acc1 + mac.w %a5l,%d1l,#1,10(%a6)&,%a3,%acc2 + mac.w %a5l,%d1l,#1,10(%a6)&,%d2,%acc1 + mac.w %a5l,%d1l,#1,10(%a6)&,%d2,%acc2 + mac.w %a5l,%d1l,#1,10(%a6)&,%a7,%acc1 + mac.w %a5l,%d1l,#1,10(%a6)&,%a7,%acc2 + mac.w %a5l,%d1l,#1,-(%a1),%d1,%acc1 + mac.w %a5l,%d1l,#1,-(%a1),%d1,%acc2 + mac.w %a5l,%d1l,#1,-(%a1),%a3,%acc1 + mac.w %a5l,%d1l,#1,-(%a1),%a3,%acc2 + mac.w %a5l,%d1l,#1,-(%a1),%d2,%acc1 + mac.w %a5l,%d1l,#1,-(%a1),%d2,%acc2 + mac.w %a5l,%d1l,#1,-(%a1),%a7,%acc1 + mac.w %a5l,%d1l,#1,-(%a1),%a7,%acc2 + mac.w %a5l,%d1l,#1,-(%a1)&,%d1,%acc1 + mac.w %a5l,%d1l,#1,-(%a1)&,%d1,%acc2 + mac.w %a5l,%d1l,#1,-(%a1)&,%a3,%acc1 + mac.w %a5l,%d1l,#1,-(%a1)&,%a3,%acc2 + mac.w %a5l,%d1l,#1,-(%a1)&,%d2,%acc1 + mac.w %a5l,%d1l,#1,-(%a1)&,%d2,%acc2 + mac.w %a5l,%d1l,#1,-(%a1)&,%a7,%acc1 + mac.w %a5l,%d1l,#1,-(%a1)&,%a7,%acc2 + mac.w %a5l,%d1l,#-1,(%a3),%d1,%acc1 + mac.w %a5l,%d1l,#-1,(%a3),%d1,%acc2 + mac.w %a5l,%d1l,#-1,(%a3),%a3,%acc1 + mac.w %a5l,%d1l,#-1,(%a3),%a3,%acc2 + mac.w %a5l,%d1l,#-1,(%a3),%d2,%acc1 + mac.w %a5l,%d1l,#-1,(%a3),%d2,%acc2 + mac.w %a5l,%d1l,#-1,(%a3),%a7,%acc1 + mac.w %a5l,%d1l,#-1,(%a3),%a7,%acc2 + mac.w %a5l,%d1l,#-1,(%a3)&,%d1,%acc1 + mac.w %a5l,%d1l,#-1,(%a3)&,%d1,%acc2 + mac.w %a5l,%d1l,#-1,(%a3)&,%a3,%acc1 + mac.w %a5l,%d1l,#-1,(%a3)&,%a3,%acc2 + mac.w %a5l,%d1l,#-1,(%a3)&,%d2,%acc1 + mac.w %a5l,%d1l,#-1,(%a3)&,%d2,%acc2 + mac.w %a5l,%d1l,#-1,(%a3)&,%a7,%acc1 + mac.w %a5l,%d1l,#-1,(%a3)&,%a7,%acc2 + mac.w %a5l,%d1l,#-1,(%a2)+,%d1,%acc1 + mac.w %a5l,%d1l,#-1,(%a2)+,%d1,%acc2 + mac.w %a5l,%d1l,#-1,(%a2)+,%a3,%acc1 + mac.w %a5l,%d1l,#-1,(%a2)+,%a3,%acc2 + mac.w %a5l,%d1l,#-1,(%a2)+,%d2,%acc1 + mac.w %a5l,%d1l,#-1,(%a2)+,%d2,%acc2 + mac.w %a5l,%d1l,#-1,(%a2)+,%a7,%acc1 + mac.w %a5l,%d1l,#-1,(%a2)+,%a7,%acc2 + mac.w %a5l,%d1l,#-1,(%a2)+&,%d1,%acc1 + mac.w %a5l,%d1l,#-1,(%a2)+&,%d1,%acc2 + mac.w %a5l,%d1l,#-1,(%a2)+&,%a3,%acc1 + mac.w %a5l,%d1l,#-1,(%a2)+&,%a3,%acc2 + mac.w %a5l,%d1l,#-1,(%a2)+&,%d2,%acc1 + mac.w %a5l,%d1l,#-1,(%a2)+&,%d2,%acc2 + mac.w %a5l,%d1l,#-1,(%a2)+&,%a7,%acc1 + mac.w %a5l,%d1l,#-1,(%a2)+&,%a7,%acc2 + mac.w %a5l,%d1l,#-1,10(%a6),%d1,%acc1 + mac.w %a5l,%d1l,#-1,10(%a6),%d1,%acc2 + mac.w %a5l,%d1l,#-1,10(%a6),%a3,%acc1 + mac.w %a5l,%d1l,#-1,10(%a6),%a3,%acc2 + mac.w %a5l,%d1l,#-1,10(%a6),%d2,%acc1 + mac.w %a5l,%d1l,#-1,10(%a6),%d2,%acc2 + mac.w %a5l,%d1l,#-1,10(%a6),%a7,%acc1 + mac.w %a5l,%d1l,#-1,10(%a6),%a7,%acc2 + mac.w %a5l,%d1l,#-1,10(%a6)&,%d1,%acc1 + mac.w %a5l,%d1l,#-1,10(%a6)&,%d1,%acc2 + mac.w %a5l,%d1l,#-1,10(%a6)&,%a3,%acc1 + mac.w %a5l,%d1l,#-1,10(%a6)&,%a3,%acc2 + mac.w %a5l,%d1l,#-1,10(%a6)&,%d2,%acc1 + mac.w %a5l,%d1l,#-1,10(%a6)&,%d2,%acc2 + mac.w %a5l,%d1l,#-1,10(%a6)&,%a7,%acc1 + mac.w %a5l,%d1l,#-1,10(%a6)&,%a7,%acc2 + mac.w %a5l,%d1l,#-1,-(%a1),%d1,%acc1 + mac.w %a5l,%d1l,#-1,-(%a1),%d1,%acc2 + mac.w %a5l,%d1l,#-1,-(%a1),%a3,%acc1 + mac.w %a5l,%d1l,#-1,-(%a1),%a3,%acc2 + mac.w %a5l,%d1l,#-1,-(%a1),%d2,%acc1 + mac.w %a5l,%d1l,#-1,-(%a1),%d2,%acc2 + mac.w %a5l,%d1l,#-1,-(%a1),%a7,%acc1 + mac.w %a5l,%d1l,#-1,-(%a1),%a7,%acc2 + mac.w %a5l,%d1l,#-1,-(%a1)&,%d1,%acc1 + mac.w %a5l,%d1l,#-1,-(%a1)&,%d1,%acc2 + mac.w %a5l,%d1l,#-1,-(%a1)&,%a3,%acc1 + mac.w %a5l,%d1l,#-1,-(%a1)&,%a3,%acc2 + mac.w %a5l,%d1l,#-1,-(%a1)&,%d2,%acc1 + mac.w %a5l,%d1l,#-1,-(%a1)&,%d2,%acc2 + mac.w %a5l,%d1l,#-1,-(%a1)&,%a7,%acc1 + mac.w %a5l,%d1l,#-1,-(%a1)&,%a7,%acc2 + mac.w %d6u,%a2u,(%a3),%d1,%acc1 + mac.w %d6u,%a2u,(%a3),%d1,%acc2 + mac.w %d6u,%a2u,(%a3),%a3,%acc1 + mac.w %d6u,%a2u,(%a3),%a3,%acc2 + mac.w %d6u,%a2u,(%a3),%d2,%acc1 + mac.w %d6u,%a2u,(%a3),%d2,%acc2 + mac.w %d6u,%a2u,(%a3),%a7,%acc1 + mac.w %d6u,%a2u,(%a3),%a7,%acc2 + mac.w %d6u,%a2u,(%a3)&,%d1,%acc1 + mac.w %d6u,%a2u,(%a3)&,%d1,%acc2 + mac.w %d6u,%a2u,(%a3)&,%a3,%acc1 + mac.w %d6u,%a2u,(%a3)&,%a3,%acc2 + mac.w %d6u,%a2u,(%a3)&,%d2,%acc1 + mac.w %d6u,%a2u,(%a3)&,%d2,%acc2 + mac.w %d6u,%a2u,(%a3)&,%a7,%acc1 + mac.w %d6u,%a2u,(%a3)&,%a7,%acc2 + mac.w %d6u,%a2u,(%a2)+,%d1,%acc1 + mac.w %d6u,%a2u,(%a2)+,%d1,%acc2 + mac.w %d6u,%a2u,(%a2)+,%a3,%acc1 + mac.w %d6u,%a2u,(%a2)+,%a3,%acc2 + mac.w %d6u,%a2u,(%a2)+,%d2,%acc1 + mac.w %d6u,%a2u,(%a2)+,%d2,%acc2 + mac.w %d6u,%a2u,(%a2)+,%a7,%acc1 + mac.w %d6u,%a2u,(%a2)+,%a7,%acc2 + mac.w %d6u,%a2u,(%a2)+&,%d1,%acc1 + mac.w %d6u,%a2u,(%a2)+&,%d1,%acc2 + mac.w %d6u,%a2u,(%a2)+&,%a3,%acc1 + mac.w %d6u,%a2u,(%a2)+&,%a3,%acc2 + mac.w %d6u,%a2u,(%a2)+&,%d2,%acc1 + mac.w %d6u,%a2u,(%a2)+&,%d2,%acc2 + mac.w %d6u,%a2u,(%a2)+&,%a7,%acc1 + mac.w %d6u,%a2u,(%a2)+&,%a7,%acc2 + mac.w %d6u,%a2u,10(%a6),%d1,%acc1 + mac.w %d6u,%a2u,10(%a6),%d1,%acc2 + mac.w %d6u,%a2u,10(%a6),%a3,%acc1 + mac.w %d6u,%a2u,10(%a6),%a3,%acc2 + mac.w %d6u,%a2u,10(%a6),%d2,%acc1 + mac.w %d6u,%a2u,10(%a6),%d2,%acc2 + mac.w %d6u,%a2u,10(%a6),%a7,%acc1 + mac.w %d6u,%a2u,10(%a6),%a7,%acc2 + mac.w %d6u,%a2u,10(%a6)&,%d1,%acc1 + mac.w %d6u,%a2u,10(%a6)&,%d1,%acc2 + mac.w %d6u,%a2u,10(%a6)&,%a3,%acc1 + mac.w %d6u,%a2u,10(%a6)&,%a3,%acc2 + mac.w %d6u,%a2u,10(%a6)&,%d2,%acc1 + mac.w %d6u,%a2u,10(%a6)&,%d2,%acc2 + mac.w %d6u,%a2u,10(%a6)&,%a7,%acc1 + mac.w %d6u,%a2u,10(%a6)&,%a7,%acc2 + mac.w %d6u,%a2u,-(%a1),%d1,%acc1 + mac.w %d6u,%a2u,-(%a1),%d1,%acc2 + mac.w %d6u,%a2u,-(%a1),%a3,%acc1 + mac.w %d6u,%a2u,-(%a1),%a3,%acc2 + mac.w %d6u,%a2u,-(%a1),%d2,%acc1 + mac.w %d6u,%a2u,-(%a1),%d2,%acc2 + mac.w %d6u,%a2u,-(%a1),%a7,%acc1 + mac.w %d6u,%a2u,-(%a1),%a7,%acc2 + mac.w %d6u,%a2u,-(%a1)&,%d1,%acc1 + mac.w %d6u,%a2u,-(%a1)&,%d1,%acc2 + mac.w %d6u,%a2u,-(%a1)&,%a3,%acc1 + mac.w %d6u,%a2u,-(%a1)&,%a3,%acc2 + mac.w %d6u,%a2u,-(%a1)&,%d2,%acc1 + mac.w %d6u,%a2u,-(%a1)&,%d2,%acc2 + mac.w %d6u,%a2u,-(%a1)&,%a7,%acc1 + mac.w %d6u,%a2u,-(%a1)&,%a7,%acc2 + mac.w %d6u,%a2u,<<,(%a3),%d1,%acc1 + mac.w %d6u,%a2u,<<,(%a3),%d1,%acc2 + mac.w %d6u,%a2u,<<,(%a3),%a3,%acc1 + mac.w %d6u,%a2u,<<,(%a3),%a3,%acc2 + mac.w %d6u,%a2u,<<,(%a3),%d2,%acc1 + mac.w %d6u,%a2u,<<,(%a3),%d2,%acc2 + mac.w %d6u,%a2u,<<,(%a3),%a7,%acc1 + mac.w %d6u,%a2u,<<,(%a3),%a7,%acc2 + mac.w %d6u,%a2u,<<,(%a3)&,%d1,%acc1 + mac.w %d6u,%a2u,<<,(%a3)&,%d1,%acc2 + mac.w %d6u,%a2u,<<,(%a3)&,%a3,%acc1 + mac.w %d6u,%a2u,<<,(%a3)&,%a3,%acc2 + mac.w %d6u,%a2u,<<,(%a3)&,%d2,%acc1 + mac.w %d6u,%a2u,<<,(%a3)&,%d2,%acc2 + mac.w %d6u,%a2u,<<,(%a3)&,%a7,%acc1 + mac.w %d6u,%a2u,<<,(%a3)&,%a7,%acc2 + mac.w %d6u,%a2u,<<,(%a2)+,%d1,%acc1 + mac.w %d6u,%a2u,<<,(%a2)+,%d1,%acc2 + mac.w %d6u,%a2u,<<,(%a2)+,%a3,%acc1 + mac.w %d6u,%a2u,<<,(%a2)+,%a3,%acc2 + mac.w %d6u,%a2u,<<,(%a2)+,%d2,%acc1 + mac.w %d6u,%a2u,<<,(%a2)+,%d2,%acc2 + mac.w %d6u,%a2u,<<,(%a2)+,%a7,%acc1 + mac.w %d6u,%a2u,<<,(%a2)+,%a7,%acc2 + mac.w %d6u,%a2u,<<,(%a2)+&,%d1,%acc1 + mac.w %d6u,%a2u,<<,(%a2)+&,%d1,%acc2 + mac.w %d6u,%a2u,<<,(%a2)+&,%a3,%acc1 + mac.w %d6u,%a2u,<<,(%a2)+&,%a3,%acc2 + mac.w %d6u,%a2u,<<,(%a2)+&,%d2,%acc1 + mac.w %d6u,%a2u,<<,(%a2)+&,%d2,%acc2 + mac.w %d6u,%a2u,<<,(%a2)+&,%a7,%acc1 + mac.w %d6u,%a2u,<<,(%a2)+&,%a7,%acc2 + mac.w %d6u,%a2u,<<,10(%a6),%d1,%acc1 + mac.w %d6u,%a2u,<<,10(%a6),%d1,%acc2 + mac.w %d6u,%a2u,<<,10(%a6),%a3,%acc1 + mac.w %d6u,%a2u,<<,10(%a6),%a3,%acc2 + mac.w %d6u,%a2u,<<,10(%a6),%d2,%acc1 + mac.w %d6u,%a2u,<<,10(%a6),%d2,%acc2 + mac.w %d6u,%a2u,<<,10(%a6),%a7,%acc1 + mac.w %d6u,%a2u,<<,10(%a6),%a7,%acc2 + mac.w %d6u,%a2u,<<,10(%a6)&,%d1,%acc1 + mac.w %d6u,%a2u,<<,10(%a6)&,%d1,%acc2 + mac.w %d6u,%a2u,<<,10(%a6)&,%a3,%acc1 + mac.w %d6u,%a2u,<<,10(%a6)&,%a3,%acc2 + mac.w %d6u,%a2u,<<,10(%a6)&,%d2,%acc1 + mac.w %d6u,%a2u,<<,10(%a6)&,%d2,%acc2 + mac.w %d6u,%a2u,<<,10(%a6)&,%a7,%acc1 + mac.w %d6u,%a2u,<<,10(%a6)&,%a7,%acc2 + mac.w %d6u,%a2u,<<,-(%a1),%d1,%acc1 + mac.w %d6u,%a2u,<<,-(%a1),%d1,%acc2 + mac.w %d6u,%a2u,<<,-(%a1),%a3,%acc1 + mac.w %d6u,%a2u,<<,-(%a1),%a3,%acc2 + mac.w %d6u,%a2u,<<,-(%a1),%d2,%acc1 + mac.w %d6u,%a2u,<<,-(%a1),%d2,%acc2 + mac.w %d6u,%a2u,<<,-(%a1),%a7,%acc1 + mac.w %d6u,%a2u,<<,-(%a1),%a7,%acc2 + mac.w %d6u,%a2u,<<,-(%a1)&,%d1,%acc1 + mac.w %d6u,%a2u,<<,-(%a1)&,%d1,%acc2 + mac.w %d6u,%a2u,<<,-(%a1)&,%a3,%acc1 + mac.w %d6u,%a2u,<<,-(%a1)&,%a3,%acc2 + mac.w %d6u,%a2u,<<,-(%a1)&,%d2,%acc1 + mac.w %d6u,%a2u,<<,-(%a1)&,%d2,%acc2 + mac.w %d6u,%a2u,<<,-(%a1)&,%a7,%acc1 + mac.w %d6u,%a2u,<<,-(%a1)&,%a7,%acc2 + mac.w %d6u,%a2u,>>,(%a3),%d1,%acc1 + mac.w %d6u,%a2u,>>,(%a3),%d1,%acc2 + mac.w %d6u,%a2u,>>,(%a3),%a3,%acc1 + mac.w %d6u,%a2u,>>,(%a3),%a3,%acc2 + mac.w %d6u,%a2u,>>,(%a3),%d2,%acc1 + mac.w %d6u,%a2u,>>,(%a3),%d2,%acc2 + mac.w %d6u,%a2u,>>,(%a3),%a7,%acc1 + mac.w %d6u,%a2u,>>,(%a3),%a7,%acc2 + mac.w %d6u,%a2u,>>,(%a3)&,%d1,%acc1 + mac.w %d6u,%a2u,>>,(%a3)&,%d1,%acc2 + mac.w %d6u,%a2u,>>,(%a3)&,%a3,%acc1 + mac.w %d6u,%a2u,>>,(%a3)&,%a3,%acc2 + mac.w %d6u,%a2u,>>,(%a3)&,%d2,%acc1 + mac.w %d6u,%a2u,>>,(%a3)&,%d2,%acc2 + mac.w %d6u,%a2u,>>,(%a3)&,%a7,%acc1 + mac.w %d6u,%a2u,>>,(%a3)&,%a7,%acc2 + mac.w %d6u,%a2u,>>,(%a2)+,%d1,%acc1 + mac.w %d6u,%a2u,>>,(%a2)+,%d1,%acc2 + mac.w %d6u,%a2u,>>,(%a2)+,%a3,%acc1 + mac.w %d6u,%a2u,>>,(%a2)+,%a3,%acc2 + mac.w %d6u,%a2u,>>,(%a2)+,%d2,%acc1 + mac.w %d6u,%a2u,>>,(%a2)+,%d2,%acc2 + mac.w %d6u,%a2u,>>,(%a2)+,%a7,%acc1 + mac.w %d6u,%a2u,>>,(%a2)+,%a7,%acc2 + mac.w %d6u,%a2u,>>,(%a2)+&,%d1,%acc1 + mac.w %d6u,%a2u,>>,(%a2)+&,%d1,%acc2 + mac.w %d6u,%a2u,>>,(%a2)+&,%a3,%acc1 + mac.w %d6u,%a2u,>>,(%a2)+&,%a3,%acc2 + mac.w %d6u,%a2u,>>,(%a2)+&,%d2,%acc1 + mac.w %d6u,%a2u,>>,(%a2)+&,%d2,%acc2 + mac.w %d6u,%a2u,>>,(%a2)+&,%a7,%acc1 + mac.w %d6u,%a2u,>>,(%a2)+&,%a7,%acc2 + mac.w %d6u,%a2u,>>,10(%a6),%d1,%acc1 + mac.w %d6u,%a2u,>>,10(%a6),%d1,%acc2 + mac.w %d6u,%a2u,>>,10(%a6),%a3,%acc1 + mac.w %d6u,%a2u,>>,10(%a6),%a3,%acc2 + mac.w %d6u,%a2u,>>,10(%a6),%d2,%acc1 + mac.w %d6u,%a2u,>>,10(%a6),%d2,%acc2 + mac.w %d6u,%a2u,>>,10(%a6),%a7,%acc1 + mac.w %d6u,%a2u,>>,10(%a6),%a7,%acc2 + mac.w %d6u,%a2u,>>,10(%a6)&,%d1,%acc1 + mac.w %d6u,%a2u,>>,10(%a6)&,%d1,%acc2 + mac.w %d6u,%a2u,>>,10(%a6)&,%a3,%acc1 + mac.w %d6u,%a2u,>>,10(%a6)&,%a3,%acc2 + mac.w %d6u,%a2u,>>,10(%a6)&,%d2,%acc1 + mac.w %d6u,%a2u,>>,10(%a6)&,%d2,%acc2 + mac.w %d6u,%a2u,>>,10(%a6)&,%a7,%acc1 + mac.w %d6u,%a2u,>>,10(%a6)&,%a7,%acc2 + mac.w %d6u,%a2u,>>,-(%a1),%d1,%acc1 + mac.w %d6u,%a2u,>>,-(%a1),%d1,%acc2 + mac.w %d6u,%a2u,>>,-(%a1),%a3,%acc1 + mac.w %d6u,%a2u,>>,-(%a1),%a3,%acc2 + mac.w %d6u,%a2u,>>,-(%a1),%d2,%acc1 + mac.w %d6u,%a2u,>>,-(%a1),%d2,%acc2 + mac.w %d6u,%a2u,>>,-(%a1),%a7,%acc1 + mac.w %d6u,%a2u,>>,-(%a1),%a7,%acc2 + mac.w %d6u,%a2u,>>,-(%a1)&,%d1,%acc1 + mac.w %d6u,%a2u,>>,-(%a1)&,%d1,%acc2 + mac.w %d6u,%a2u,>>,-(%a1)&,%a3,%acc1 + mac.w %d6u,%a2u,>>,-(%a1)&,%a3,%acc2 + mac.w %d6u,%a2u,>>,-(%a1)&,%d2,%acc1 + mac.w %d6u,%a2u,>>,-(%a1)&,%d2,%acc2 + mac.w %d6u,%a2u,>>,-(%a1)&,%a7,%acc1 + mac.w %d6u,%a2u,>>,-(%a1)&,%a7,%acc2 + mac.w %d6u,%a2u,#1,(%a3),%d1,%acc1 + mac.w %d6u,%a2u,#1,(%a3),%d1,%acc2 + mac.w %d6u,%a2u,#1,(%a3),%a3,%acc1 + mac.w %d6u,%a2u,#1,(%a3),%a3,%acc2 + mac.w %d6u,%a2u,#1,(%a3),%d2,%acc1 + mac.w %d6u,%a2u,#1,(%a3),%d2,%acc2 + mac.w %d6u,%a2u,#1,(%a3),%a7,%acc1 + mac.w %d6u,%a2u,#1,(%a3),%a7,%acc2 + mac.w %d6u,%a2u,#1,(%a3)&,%d1,%acc1 + mac.w %d6u,%a2u,#1,(%a3)&,%d1,%acc2 + mac.w %d6u,%a2u,#1,(%a3)&,%a3,%acc1 + mac.w %d6u,%a2u,#1,(%a3)&,%a3,%acc2 + mac.w %d6u,%a2u,#1,(%a3)&,%d2,%acc1 + mac.w %d6u,%a2u,#1,(%a3)&,%d2,%acc2 + mac.w %d6u,%a2u,#1,(%a3)&,%a7,%acc1 + mac.w %d6u,%a2u,#1,(%a3)&,%a7,%acc2 + mac.w %d6u,%a2u,#1,(%a2)+,%d1,%acc1 + mac.w %d6u,%a2u,#1,(%a2)+,%d1,%acc2 + mac.w %d6u,%a2u,#1,(%a2)+,%a3,%acc1 + mac.w %d6u,%a2u,#1,(%a2)+,%a3,%acc2 + mac.w %d6u,%a2u,#1,(%a2)+,%d2,%acc1 + mac.w %d6u,%a2u,#1,(%a2)+,%d2,%acc2 + mac.w %d6u,%a2u,#1,(%a2)+,%a7,%acc1 + mac.w %d6u,%a2u,#1,(%a2)+,%a7,%acc2 + mac.w %d6u,%a2u,#1,(%a2)+&,%d1,%acc1 + mac.w %d6u,%a2u,#1,(%a2)+&,%d1,%acc2 + mac.w %d6u,%a2u,#1,(%a2)+&,%a3,%acc1 + mac.w %d6u,%a2u,#1,(%a2)+&,%a3,%acc2 + mac.w %d6u,%a2u,#1,(%a2)+&,%d2,%acc1 + mac.w %d6u,%a2u,#1,(%a2)+&,%d2,%acc2 + mac.w %d6u,%a2u,#1,(%a2)+&,%a7,%acc1 + mac.w %d6u,%a2u,#1,(%a2)+&,%a7,%acc2 + mac.w %d6u,%a2u,#1,10(%a6),%d1,%acc1 + mac.w %d6u,%a2u,#1,10(%a6),%d1,%acc2 + mac.w %d6u,%a2u,#1,10(%a6),%a3,%acc1 + mac.w %d6u,%a2u,#1,10(%a6),%a3,%acc2 + mac.w %d6u,%a2u,#1,10(%a6),%d2,%acc1 + mac.w %d6u,%a2u,#1,10(%a6),%d2,%acc2 + mac.w %d6u,%a2u,#1,10(%a6),%a7,%acc1 + mac.w %d6u,%a2u,#1,10(%a6),%a7,%acc2 + mac.w %d6u,%a2u,#1,10(%a6)&,%d1,%acc1 + mac.w %d6u,%a2u,#1,10(%a6)&,%d1,%acc2 + mac.w %d6u,%a2u,#1,10(%a6)&,%a3,%acc1 + mac.w %d6u,%a2u,#1,10(%a6)&,%a3,%acc2 + mac.w %d6u,%a2u,#1,10(%a6)&,%d2,%acc1 + mac.w %d6u,%a2u,#1,10(%a6)&,%d2,%acc2 + mac.w %d6u,%a2u,#1,10(%a6)&,%a7,%acc1 + mac.w %d6u,%a2u,#1,10(%a6)&,%a7,%acc2 + mac.w %d6u,%a2u,#1,-(%a1),%d1,%acc1 + mac.w %d6u,%a2u,#1,-(%a1),%d1,%acc2 + mac.w %d6u,%a2u,#1,-(%a1),%a3,%acc1 + mac.w %d6u,%a2u,#1,-(%a1),%a3,%acc2 + mac.w %d6u,%a2u,#1,-(%a1),%d2,%acc1 + mac.w %d6u,%a2u,#1,-(%a1),%d2,%acc2 + mac.w %d6u,%a2u,#1,-(%a1),%a7,%acc1 + mac.w %d6u,%a2u,#1,-(%a1),%a7,%acc2 + mac.w %d6u,%a2u,#1,-(%a1)&,%d1,%acc1 + mac.w %d6u,%a2u,#1,-(%a1)&,%d1,%acc2 + mac.w %d6u,%a2u,#1,-(%a1)&,%a3,%acc1 + mac.w %d6u,%a2u,#1,-(%a1)&,%a3,%acc2 + mac.w %d6u,%a2u,#1,-(%a1)&,%d2,%acc1 + mac.w %d6u,%a2u,#1,-(%a1)&,%d2,%acc2 + mac.w %d6u,%a2u,#1,-(%a1)&,%a7,%acc1 + mac.w %d6u,%a2u,#1,-(%a1)&,%a7,%acc2 + mac.w %d6u,%a2u,#-1,(%a3),%d1,%acc1 + mac.w %d6u,%a2u,#-1,(%a3),%d1,%acc2 + mac.w %d6u,%a2u,#-1,(%a3),%a3,%acc1 + mac.w %d6u,%a2u,#-1,(%a3),%a3,%acc2 + mac.w %d6u,%a2u,#-1,(%a3),%d2,%acc1 + mac.w %d6u,%a2u,#-1,(%a3),%d2,%acc2 + mac.w %d6u,%a2u,#-1,(%a3),%a7,%acc1 + mac.w %d6u,%a2u,#-1,(%a3),%a7,%acc2 + mac.w %d6u,%a2u,#-1,(%a3)&,%d1,%acc1 + mac.w %d6u,%a2u,#-1,(%a3)&,%d1,%acc2 + mac.w %d6u,%a2u,#-1,(%a3)&,%a3,%acc1 + mac.w %d6u,%a2u,#-1,(%a3)&,%a3,%acc2 + mac.w %d6u,%a2u,#-1,(%a3)&,%d2,%acc1 + mac.w %d6u,%a2u,#-1,(%a3)&,%d2,%acc2 + mac.w %d6u,%a2u,#-1,(%a3)&,%a7,%acc1 + mac.w %d6u,%a2u,#-1,(%a3)&,%a7,%acc2 + mac.w %d6u,%a2u,#-1,(%a2)+,%d1,%acc1 + mac.w %d6u,%a2u,#-1,(%a2)+,%d1,%acc2 + mac.w %d6u,%a2u,#-1,(%a2)+,%a3,%acc1 + mac.w %d6u,%a2u,#-1,(%a2)+,%a3,%acc2 + mac.w %d6u,%a2u,#-1,(%a2)+,%d2,%acc1 + mac.w %d6u,%a2u,#-1,(%a2)+,%d2,%acc2 + mac.w %d6u,%a2u,#-1,(%a2)+,%a7,%acc1 + mac.w %d6u,%a2u,#-1,(%a2)+,%a7,%acc2 + mac.w %d6u,%a2u,#-1,(%a2)+&,%d1,%acc1 + mac.w %d6u,%a2u,#-1,(%a2)+&,%d1,%acc2 + mac.w %d6u,%a2u,#-1,(%a2)+&,%a3,%acc1 + mac.w %d6u,%a2u,#-1,(%a2)+&,%a3,%acc2 + mac.w %d6u,%a2u,#-1,(%a2)+&,%d2,%acc1 + mac.w %d6u,%a2u,#-1,(%a2)+&,%d2,%acc2 + mac.w %d6u,%a2u,#-1,(%a2)+&,%a7,%acc1 + mac.w %d6u,%a2u,#-1,(%a2)+&,%a7,%acc2 + mac.w %d6u,%a2u,#-1,10(%a6),%d1,%acc1 + mac.w %d6u,%a2u,#-1,10(%a6),%d1,%acc2 + mac.w %d6u,%a2u,#-1,10(%a6),%a3,%acc1 + mac.w %d6u,%a2u,#-1,10(%a6),%a3,%acc2 + mac.w %d6u,%a2u,#-1,10(%a6),%d2,%acc1 + mac.w %d6u,%a2u,#-1,10(%a6),%d2,%acc2 + mac.w %d6u,%a2u,#-1,10(%a6),%a7,%acc1 + mac.w %d6u,%a2u,#-1,10(%a6),%a7,%acc2 + mac.w %d6u,%a2u,#-1,10(%a6)&,%d1,%acc1 + mac.w %d6u,%a2u,#-1,10(%a6)&,%d1,%acc2 + mac.w %d6u,%a2u,#-1,10(%a6)&,%a3,%acc1 + mac.w %d6u,%a2u,#-1,10(%a6)&,%a3,%acc2 + mac.w %d6u,%a2u,#-1,10(%a6)&,%d2,%acc1 + mac.w %d6u,%a2u,#-1,10(%a6)&,%d2,%acc2 + mac.w %d6u,%a2u,#-1,10(%a6)&,%a7,%acc1 + mac.w %d6u,%a2u,#-1,10(%a6)&,%a7,%acc2 + mac.w %d6u,%a2u,#-1,-(%a1),%d1,%acc1 + mac.w %d6u,%a2u,#-1,-(%a1),%d1,%acc2 + mac.w %d6u,%a2u,#-1,-(%a1),%a3,%acc1 + mac.w %d6u,%a2u,#-1,-(%a1),%a3,%acc2 + mac.w %d6u,%a2u,#-1,-(%a1),%d2,%acc1 + mac.w %d6u,%a2u,#-1,-(%a1),%d2,%acc2 + mac.w %d6u,%a2u,#-1,-(%a1),%a7,%acc1 + mac.w %d6u,%a2u,#-1,-(%a1),%a7,%acc2 + mac.w %d6u,%a2u,#-1,-(%a1)&,%d1,%acc1 + mac.w %d6u,%a2u,#-1,-(%a1)&,%d1,%acc2 + mac.w %d6u,%a2u,#-1,-(%a1)&,%a3,%acc1 + mac.w %d6u,%a2u,#-1,-(%a1)&,%a3,%acc2 + mac.w %d6u,%a2u,#-1,-(%a1)&,%d2,%acc1 + mac.w %d6u,%a2u,#-1,-(%a1)&,%d2,%acc2 + mac.w %d6u,%a2u,#-1,-(%a1)&,%a7,%acc1 + mac.w %d6u,%a2u,#-1,-(%a1)&,%a7,%acc2 + mac.w %d6u,%d3l,(%a3),%d1,%acc1 + mac.w %d6u,%d3l,(%a3),%d1,%acc2 + mac.w %d6u,%d3l,(%a3),%a3,%acc1 + mac.w %d6u,%d3l,(%a3),%a3,%acc2 + mac.w %d6u,%d3l,(%a3),%d2,%acc1 + mac.w %d6u,%d3l,(%a3),%d2,%acc2 + mac.w %d6u,%d3l,(%a3),%a7,%acc1 + mac.w %d6u,%d3l,(%a3),%a7,%acc2 + mac.w %d6u,%d3l,(%a3)&,%d1,%acc1 + mac.w %d6u,%d3l,(%a3)&,%d1,%acc2 + mac.w %d6u,%d3l,(%a3)&,%a3,%acc1 + mac.w %d6u,%d3l,(%a3)&,%a3,%acc2 + mac.w %d6u,%d3l,(%a3)&,%d2,%acc1 + mac.w %d6u,%d3l,(%a3)&,%d2,%acc2 + mac.w %d6u,%d3l,(%a3)&,%a7,%acc1 + mac.w %d6u,%d3l,(%a3)&,%a7,%acc2 + mac.w %d6u,%d3l,(%a2)+,%d1,%acc1 + mac.w %d6u,%d3l,(%a2)+,%d1,%acc2 + mac.w %d6u,%d3l,(%a2)+,%a3,%acc1 + mac.w %d6u,%d3l,(%a2)+,%a3,%acc2 + mac.w %d6u,%d3l,(%a2)+,%d2,%acc1 + mac.w %d6u,%d3l,(%a2)+,%d2,%acc2 + mac.w %d6u,%d3l,(%a2)+,%a7,%acc1 + mac.w %d6u,%d3l,(%a2)+,%a7,%acc2 + mac.w %d6u,%d3l,(%a2)+&,%d1,%acc1 + mac.w %d6u,%d3l,(%a2)+&,%d1,%acc2 + mac.w %d6u,%d3l,(%a2)+&,%a3,%acc1 + mac.w %d6u,%d3l,(%a2)+&,%a3,%acc2 + mac.w %d6u,%d3l,(%a2)+&,%d2,%acc1 + mac.w %d6u,%d3l,(%a2)+&,%d2,%acc2 + mac.w %d6u,%d3l,(%a2)+&,%a7,%acc1 + mac.w %d6u,%d3l,(%a2)+&,%a7,%acc2 + mac.w %d6u,%d3l,10(%a6),%d1,%acc1 + mac.w %d6u,%d3l,10(%a6),%d1,%acc2 + mac.w %d6u,%d3l,10(%a6),%a3,%acc1 + mac.w %d6u,%d3l,10(%a6),%a3,%acc2 + mac.w %d6u,%d3l,10(%a6),%d2,%acc1 + mac.w %d6u,%d3l,10(%a6),%d2,%acc2 + mac.w %d6u,%d3l,10(%a6),%a7,%acc1 + mac.w %d6u,%d3l,10(%a6),%a7,%acc2 + mac.w %d6u,%d3l,10(%a6)&,%d1,%acc1 + mac.w %d6u,%d3l,10(%a6)&,%d1,%acc2 + mac.w %d6u,%d3l,10(%a6)&,%a3,%acc1 + mac.w %d6u,%d3l,10(%a6)&,%a3,%acc2 + mac.w %d6u,%d3l,10(%a6)&,%d2,%acc1 + mac.w %d6u,%d3l,10(%a6)&,%d2,%acc2 + mac.w %d6u,%d3l,10(%a6)&,%a7,%acc1 + mac.w %d6u,%d3l,10(%a6)&,%a7,%acc2 + mac.w %d6u,%d3l,-(%a1),%d1,%acc1 + mac.w %d6u,%d3l,-(%a1),%d1,%acc2 + mac.w %d6u,%d3l,-(%a1),%a3,%acc1 + mac.w %d6u,%d3l,-(%a1),%a3,%acc2 + mac.w %d6u,%d3l,-(%a1),%d2,%acc1 + mac.w %d6u,%d3l,-(%a1),%d2,%acc2 + mac.w %d6u,%d3l,-(%a1),%a7,%acc1 + mac.w %d6u,%d3l,-(%a1),%a7,%acc2 + mac.w %d6u,%d3l,-(%a1)&,%d1,%acc1 + mac.w %d6u,%d3l,-(%a1)&,%d1,%acc2 + mac.w %d6u,%d3l,-(%a1)&,%a3,%acc1 + mac.w %d6u,%d3l,-(%a1)&,%a3,%acc2 + mac.w %d6u,%d3l,-(%a1)&,%d2,%acc1 + mac.w %d6u,%d3l,-(%a1)&,%d2,%acc2 + mac.w %d6u,%d3l,-(%a1)&,%a7,%acc1 + mac.w %d6u,%d3l,-(%a1)&,%a7,%acc2 + mac.w %d6u,%d3l,<<,(%a3),%d1,%acc1 + mac.w %d6u,%d3l,<<,(%a3),%d1,%acc2 + mac.w %d6u,%d3l,<<,(%a3),%a3,%acc1 + mac.w %d6u,%d3l,<<,(%a3),%a3,%acc2 + mac.w %d6u,%d3l,<<,(%a3),%d2,%acc1 + mac.w %d6u,%d3l,<<,(%a3),%d2,%acc2 + mac.w %d6u,%d3l,<<,(%a3),%a7,%acc1 + mac.w %d6u,%d3l,<<,(%a3),%a7,%acc2 + mac.w %d6u,%d3l,<<,(%a3)&,%d1,%acc1 + mac.w %d6u,%d3l,<<,(%a3)&,%d1,%acc2 + mac.w %d6u,%d3l,<<,(%a3)&,%a3,%acc1 + mac.w %d6u,%d3l,<<,(%a3)&,%a3,%acc2 + mac.w %d6u,%d3l,<<,(%a3)&,%d2,%acc1 + mac.w %d6u,%d3l,<<,(%a3)&,%d2,%acc2 + mac.w %d6u,%d3l,<<,(%a3)&,%a7,%acc1 + mac.w %d6u,%d3l,<<,(%a3)&,%a7,%acc2 + mac.w %d6u,%d3l,<<,(%a2)+,%d1,%acc1 + mac.w %d6u,%d3l,<<,(%a2)+,%d1,%acc2 + mac.w %d6u,%d3l,<<,(%a2)+,%a3,%acc1 + mac.w %d6u,%d3l,<<,(%a2)+,%a3,%acc2 + mac.w %d6u,%d3l,<<,(%a2)+,%d2,%acc1 + mac.w %d6u,%d3l,<<,(%a2)+,%d2,%acc2 + mac.w %d6u,%d3l,<<,(%a2)+,%a7,%acc1 + mac.w %d6u,%d3l,<<,(%a2)+,%a7,%acc2 + mac.w %d6u,%d3l,<<,(%a2)+&,%d1,%acc1 + mac.w %d6u,%d3l,<<,(%a2)+&,%d1,%acc2 + mac.w %d6u,%d3l,<<,(%a2)+&,%a3,%acc1 + mac.w %d6u,%d3l,<<,(%a2)+&,%a3,%acc2 + mac.w %d6u,%d3l,<<,(%a2)+&,%d2,%acc1 + mac.w %d6u,%d3l,<<,(%a2)+&,%d2,%acc2 + mac.w %d6u,%d3l,<<,(%a2)+&,%a7,%acc1 + mac.w %d6u,%d3l,<<,(%a2)+&,%a7,%acc2 + mac.w %d6u,%d3l,<<,10(%a6),%d1,%acc1 + mac.w %d6u,%d3l,<<,10(%a6),%d1,%acc2 + mac.w %d6u,%d3l,<<,10(%a6),%a3,%acc1 + mac.w %d6u,%d3l,<<,10(%a6),%a3,%acc2 + mac.w %d6u,%d3l,<<,10(%a6),%d2,%acc1 + mac.w %d6u,%d3l,<<,10(%a6),%d2,%acc2 + mac.w %d6u,%d3l,<<,10(%a6),%a7,%acc1 + mac.w %d6u,%d3l,<<,10(%a6),%a7,%acc2 + mac.w %d6u,%d3l,<<,10(%a6)&,%d1,%acc1 + mac.w %d6u,%d3l,<<,10(%a6)&,%d1,%acc2 + mac.w %d6u,%d3l,<<,10(%a6)&,%a3,%acc1 + mac.w %d6u,%d3l,<<,10(%a6)&,%a3,%acc2 + mac.w %d6u,%d3l,<<,10(%a6)&,%d2,%acc1 + mac.w %d6u,%d3l,<<,10(%a6)&,%d2,%acc2 + mac.w %d6u,%d3l,<<,10(%a6)&,%a7,%acc1 + mac.w %d6u,%d3l,<<,10(%a6)&,%a7,%acc2 + mac.w %d6u,%d3l,<<,-(%a1),%d1,%acc1 + mac.w %d6u,%d3l,<<,-(%a1),%d1,%acc2 + mac.w %d6u,%d3l,<<,-(%a1),%a3,%acc1 + mac.w %d6u,%d3l,<<,-(%a1),%a3,%acc2 + mac.w %d6u,%d3l,<<,-(%a1),%d2,%acc1 + mac.w %d6u,%d3l,<<,-(%a1),%d2,%acc2 + mac.w %d6u,%d3l,<<,-(%a1),%a7,%acc1 + mac.w %d6u,%d3l,<<,-(%a1),%a7,%acc2 + mac.w %d6u,%d3l,<<,-(%a1)&,%d1,%acc1 + mac.w %d6u,%d3l,<<,-(%a1)&,%d1,%acc2 + mac.w %d6u,%d3l,<<,-(%a1)&,%a3,%acc1 + mac.w %d6u,%d3l,<<,-(%a1)&,%a3,%acc2 + mac.w %d6u,%d3l,<<,-(%a1)&,%d2,%acc1 + mac.w %d6u,%d3l,<<,-(%a1)&,%d2,%acc2 + mac.w %d6u,%d3l,<<,-(%a1)&,%a7,%acc1 + mac.w %d6u,%d3l,<<,-(%a1)&,%a7,%acc2 + mac.w %d6u,%d3l,>>,(%a3),%d1,%acc1 + mac.w %d6u,%d3l,>>,(%a3),%d1,%acc2 + mac.w %d6u,%d3l,>>,(%a3),%a3,%acc1 + mac.w %d6u,%d3l,>>,(%a3),%a3,%acc2 + mac.w %d6u,%d3l,>>,(%a3),%d2,%acc1 + mac.w %d6u,%d3l,>>,(%a3),%d2,%acc2 + mac.w %d6u,%d3l,>>,(%a3),%a7,%acc1 + mac.w %d6u,%d3l,>>,(%a3),%a7,%acc2 + mac.w %d6u,%d3l,>>,(%a3)&,%d1,%acc1 + mac.w %d6u,%d3l,>>,(%a3)&,%d1,%acc2 + mac.w %d6u,%d3l,>>,(%a3)&,%a3,%acc1 + mac.w %d6u,%d3l,>>,(%a3)&,%a3,%acc2 + mac.w %d6u,%d3l,>>,(%a3)&,%d2,%acc1 + mac.w %d6u,%d3l,>>,(%a3)&,%d2,%acc2 + mac.w %d6u,%d3l,>>,(%a3)&,%a7,%acc1 + mac.w %d6u,%d3l,>>,(%a3)&,%a7,%acc2 + mac.w %d6u,%d3l,>>,(%a2)+,%d1,%acc1 + mac.w %d6u,%d3l,>>,(%a2)+,%d1,%acc2 + mac.w %d6u,%d3l,>>,(%a2)+,%a3,%acc1 + mac.w %d6u,%d3l,>>,(%a2)+,%a3,%acc2 + mac.w %d6u,%d3l,>>,(%a2)+,%d2,%acc1 + mac.w %d6u,%d3l,>>,(%a2)+,%d2,%acc2 + mac.w %d6u,%d3l,>>,(%a2)+,%a7,%acc1 + mac.w %d6u,%d3l,>>,(%a2)+,%a7,%acc2 + mac.w %d6u,%d3l,>>,(%a2)+&,%d1,%acc1 + mac.w %d6u,%d3l,>>,(%a2)+&,%d1,%acc2 + mac.w %d6u,%d3l,>>,(%a2)+&,%a3,%acc1 + mac.w %d6u,%d3l,>>,(%a2)+&,%a3,%acc2 + mac.w %d6u,%d3l,>>,(%a2)+&,%d2,%acc1 + mac.w %d6u,%d3l,>>,(%a2)+&,%d2,%acc2 + mac.w %d6u,%d3l,>>,(%a2)+&,%a7,%acc1 + mac.w %d6u,%d3l,>>,(%a2)+&,%a7,%acc2 + mac.w %d6u,%d3l,>>,10(%a6),%d1,%acc1 + mac.w %d6u,%d3l,>>,10(%a6),%d1,%acc2 + mac.w %d6u,%d3l,>>,10(%a6),%a3,%acc1 + mac.w %d6u,%d3l,>>,10(%a6),%a3,%acc2 + mac.w %d6u,%d3l,>>,10(%a6),%d2,%acc1 + mac.w %d6u,%d3l,>>,10(%a6),%d2,%acc2 + mac.w %d6u,%d3l,>>,10(%a6),%a7,%acc1 + mac.w %d6u,%d3l,>>,10(%a6),%a7,%acc2 + mac.w %d6u,%d3l,>>,10(%a6)&,%d1,%acc1 + mac.w %d6u,%d3l,>>,10(%a6)&,%d1,%acc2 + mac.w %d6u,%d3l,>>,10(%a6)&,%a3,%acc1 + mac.w %d6u,%d3l,>>,10(%a6)&,%a3,%acc2 + mac.w %d6u,%d3l,>>,10(%a6)&,%d2,%acc1 + mac.w %d6u,%d3l,>>,10(%a6)&,%d2,%acc2 + mac.w %d6u,%d3l,>>,10(%a6)&,%a7,%acc1 + mac.w %d6u,%d3l,>>,10(%a6)&,%a7,%acc2 + mac.w %d6u,%d3l,>>,-(%a1),%d1,%acc1 + mac.w %d6u,%d3l,>>,-(%a1),%d1,%acc2 + mac.w %d6u,%d3l,>>,-(%a1),%a3,%acc1 + mac.w %d6u,%d3l,>>,-(%a1),%a3,%acc2 + mac.w %d6u,%d3l,>>,-(%a1),%d2,%acc1 + mac.w %d6u,%d3l,>>,-(%a1),%d2,%acc2 + mac.w %d6u,%d3l,>>,-(%a1),%a7,%acc1 + mac.w %d6u,%d3l,>>,-(%a1),%a7,%acc2 + mac.w %d6u,%d3l,>>,-(%a1)&,%d1,%acc1 + mac.w %d6u,%d3l,>>,-(%a1)&,%d1,%acc2 + mac.w %d6u,%d3l,>>,-(%a1)&,%a3,%acc1 + mac.w %d6u,%d3l,>>,-(%a1)&,%a3,%acc2 + mac.w %d6u,%d3l,>>,-(%a1)&,%d2,%acc1 + mac.w %d6u,%d3l,>>,-(%a1)&,%d2,%acc2 + mac.w %d6u,%d3l,>>,-(%a1)&,%a7,%acc1 + mac.w %d6u,%d3l,>>,-(%a1)&,%a7,%acc2 + mac.w %d6u,%d3l,#1,(%a3),%d1,%acc1 + mac.w %d6u,%d3l,#1,(%a3),%d1,%acc2 + mac.w %d6u,%d3l,#1,(%a3),%a3,%acc1 + mac.w %d6u,%d3l,#1,(%a3),%a3,%acc2 + mac.w %d6u,%d3l,#1,(%a3),%d2,%acc1 + mac.w %d6u,%d3l,#1,(%a3),%d2,%acc2 + mac.w %d6u,%d3l,#1,(%a3),%a7,%acc1 + mac.w %d6u,%d3l,#1,(%a3),%a7,%acc2 + mac.w %d6u,%d3l,#1,(%a3)&,%d1,%acc1 + mac.w %d6u,%d3l,#1,(%a3)&,%d1,%acc2 + mac.w %d6u,%d3l,#1,(%a3)&,%a3,%acc1 + mac.w %d6u,%d3l,#1,(%a3)&,%a3,%acc2 + mac.w %d6u,%d3l,#1,(%a3)&,%d2,%acc1 + mac.w %d6u,%d3l,#1,(%a3)&,%d2,%acc2 + mac.w %d6u,%d3l,#1,(%a3)&,%a7,%acc1 + mac.w %d6u,%d3l,#1,(%a3)&,%a7,%acc2 + mac.w %d6u,%d3l,#1,(%a2)+,%d1,%acc1 + mac.w %d6u,%d3l,#1,(%a2)+,%d1,%acc2 + mac.w %d6u,%d3l,#1,(%a2)+,%a3,%acc1 + mac.w %d6u,%d3l,#1,(%a2)+,%a3,%acc2 + mac.w %d6u,%d3l,#1,(%a2)+,%d2,%acc1 + mac.w %d6u,%d3l,#1,(%a2)+,%d2,%acc2 + mac.w %d6u,%d3l,#1,(%a2)+,%a7,%acc1 + mac.w %d6u,%d3l,#1,(%a2)+,%a7,%acc2 + mac.w %d6u,%d3l,#1,(%a2)+&,%d1,%acc1 + mac.w %d6u,%d3l,#1,(%a2)+&,%d1,%acc2 + mac.w %d6u,%d3l,#1,(%a2)+&,%a3,%acc1 + mac.w %d6u,%d3l,#1,(%a2)+&,%a3,%acc2 + mac.w %d6u,%d3l,#1,(%a2)+&,%d2,%acc1 + mac.w %d6u,%d3l,#1,(%a2)+&,%d2,%acc2 + mac.w %d6u,%d3l,#1,(%a2)+&,%a7,%acc1 + mac.w %d6u,%d3l,#1,(%a2)+&,%a7,%acc2 + mac.w %d6u,%d3l,#1,10(%a6),%d1,%acc1 + mac.w %d6u,%d3l,#1,10(%a6),%d1,%acc2 + mac.w %d6u,%d3l,#1,10(%a6),%a3,%acc1 + mac.w %d6u,%d3l,#1,10(%a6),%a3,%acc2 + mac.w %d6u,%d3l,#1,10(%a6),%d2,%acc1 + mac.w %d6u,%d3l,#1,10(%a6),%d2,%acc2 + mac.w %d6u,%d3l,#1,10(%a6),%a7,%acc1 + mac.w %d6u,%d3l,#1,10(%a6),%a7,%acc2 + mac.w %d6u,%d3l,#1,10(%a6)&,%d1,%acc1 + mac.w %d6u,%d3l,#1,10(%a6)&,%d1,%acc2 + mac.w %d6u,%d3l,#1,10(%a6)&,%a3,%acc1 + mac.w %d6u,%d3l,#1,10(%a6)&,%a3,%acc2 + mac.w %d6u,%d3l,#1,10(%a6)&,%d2,%acc1 + mac.w %d6u,%d3l,#1,10(%a6)&,%d2,%acc2 + mac.w %d6u,%d3l,#1,10(%a6)&,%a7,%acc1 + mac.w %d6u,%d3l,#1,10(%a6)&,%a7,%acc2 + mac.w %d6u,%d3l,#1,-(%a1),%d1,%acc1 + mac.w %d6u,%d3l,#1,-(%a1),%d1,%acc2 + mac.w %d6u,%d3l,#1,-(%a1),%a3,%acc1 + mac.w %d6u,%d3l,#1,-(%a1),%a3,%acc2 + mac.w %d6u,%d3l,#1,-(%a1),%d2,%acc1 + mac.w %d6u,%d3l,#1,-(%a1),%d2,%acc2 + mac.w %d6u,%d3l,#1,-(%a1),%a7,%acc1 + mac.w %d6u,%d3l,#1,-(%a1),%a7,%acc2 + mac.w %d6u,%d3l,#1,-(%a1)&,%d1,%acc1 + mac.w %d6u,%d3l,#1,-(%a1)&,%d1,%acc2 + mac.w %d6u,%d3l,#1,-(%a1)&,%a3,%acc1 + mac.w %d6u,%d3l,#1,-(%a1)&,%a3,%acc2 + mac.w %d6u,%d3l,#1,-(%a1)&,%d2,%acc1 + mac.w %d6u,%d3l,#1,-(%a1)&,%d2,%acc2 + mac.w %d6u,%d3l,#1,-(%a1)&,%a7,%acc1 + mac.w %d6u,%d3l,#1,-(%a1)&,%a7,%acc2 + mac.w %d6u,%d3l,#-1,(%a3),%d1,%acc1 + mac.w %d6u,%d3l,#-1,(%a3),%d1,%acc2 + mac.w %d6u,%d3l,#-1,(%a3),%a3,%acc1 + mac.w %d6u,%d3l,#-1,(%a3),%a3,%acc2 + mac.w %d6u,%d3l,#-1,(%a3),%d2,%acc1 + mac.w %d6u,%d3l,#-1,(%a3),%d2,%acc2 + mac.w %d6u,%d3l,#-1,(%a3),%a7,%acc1 + mac.w %d6u,%d3l,#-1,(%a3),%a7,%acc2 + mac.w %d6u,%d3l,#-1,(%a3)&,%d1,%acc1 + mac.w %d6u,%d3l,#-1,(%a3)&,%d1,%acc2 + mac.w %d6u,%d3l,#-1,(%a3)&,%a3,%acc1 + mac.w %d6u,%d3l,#-1,(%a3)&,%a3,%acc2 + mac.w %d6u,%d3l,#-1,(%a3)&,%d2,%acc1 + mac.w %d6u,%d3l,#-1,(%a3)&,%d2,%acc2 + mac.w %d6u,%d3l,#-1,(%a3)&,%a7,%acc1 + mac.w %d6u,%d3l,#-1,(%a3)&,%a7,%acc2 + mac.w %d6u,%d3l,#-1,(%a2)+,%d1,%acc1 + mac.w %d6u,%d3l,#-1,(%a2)+,%d1,%acc2 + mac.w %d6u,%d3l,#-1,(%a2)+,%a3,%acc1 + mac.w %d6u,%d3l,#-1,(%a2)+,%a3,%acc2 + mac.w %d6u,%d3l,#-1,(%a2)+,%d2,%acc1 + mac.w %d6u,%d3l,#-1,(%a2)+,%d2,%acc2 + mac.w %d6u,%d3l,#-1,(%a2)+,%a7,%acc1 + mac.w %d6u,%d3l,#-1,(%a2)+,%a7,%acc2 + mac.w %d6u,%d3l,#-1,(%a2)+&,%d1,%acc1 + mac.w %d6u,%d3l,#-1,(%a2)+&,%d1,%acc2 + mac.w %d6u,%d3l,#-1,(%a2)+&,%a3,%acc1 + mac.w %d6u,%d3l,#-1,(%a2)+&,%a3,%acc2 + mac.w %d6u,%d3l,#-1,(%a2)+&,%d2,%acc1 + mac.w %d6u,%d3l,#-1,(%a2)+&,%d2,%acc2 + mac.w %d6u,%d3l,#-1,(%a2)+&,%a7,%acc1 + mac.w %d6u,%d3l,#-1,(%a2)+&,%a7,%acc2 + mac.w %d6u,%d3l,#-1,10(%a6),%d1,%acc1 + mac.w %d6u,%d3l,#-1,10(%a6),%d1,%acc2 + mac.w %d6u,%d3l,#-1,10(%a6),%a3,%acc1 + mac.w %d6u,%d3l,#-1,10(%a6),%a3,%acc2 + mac.w %d6u,%d3l,#-1,10(%a6),%d2,%acc1 + mac.w %d6u,%d3l,#-1,10(%a6),%d2,%acc2 + mac.w %d6u,%d3l,#-1,10(%a6),%a7,%acc1 + mac.w %d6u,%d3l,#-1,10(%a6),%a7,%acc2 + mac.w %d6u,%d3l,#-1,10(%a6)&,%d1,%acc1 + mac.w %d6u,%d3l,#-1,10(%a6)&,%d1,%acc2 + mac.w %d6u,%d3l,#-1,10(%a6)&,%a3,%acc1 + mac.w %d6u,%d3l,#-1,10(%a6)&,%a3,%acc2 + mac.w %d6u,%d3l,#-1,10(%a6)&,%d2,%acc1 + mac.w %d6u,%d3l,#-1,10(%a6)&,%d2,%acc2 + mac.w %d6u,%d3l,#-1,10(%a6)&,%a7,%acc1 + mac.w %d6u,%d3l,#-1,10(%a6)&,%a7,%acc2 + mac.w %d6u,%d3l,#-1,-(%a1),%d1,%acc1 + mac.w %d6u,%d3l,#-1,-(%a1),%d1,%acc2 + mac.w %d6u,%d3l,#-1,-(%a1),%a3,%acc1 + mac.w %d6u,%d3l,#-1,-(%a1),%a3,%acc2 + mac.w %d6u,%d3l,#-1,-(%a1),%d2,%acc1 + mac.w %d6u,%d3l,#-1,-(%a1),%d2,%acc2 + mac.w %d6u,%d3l,#-1,-(%a1),%a7,%acc1 + mac.w %d6u,%d3l,#-1,-(%a1),%a7,%acc2 + mac.w %d6u,%d3l,#-1,-(%a1)&,%d1,%acc1 + mac.w %d6u,%d3l,#-1,-(%a1)&,%d1,%acc2 + mac.w %d6u,%d3l,#-1,-(%a1)&,%a3,%acc1 + mac.w %d6u,%d3l,#-1,-(%a1)&,%a3,%acc2 + mac.w %d6u,%d3l,#-1,-(%a1)&,%d2,%acc1 + mac.w %d6u,%d3l,#-1,-(%a1)&,%d2,%acc2 + mac.w %d6u,%d3l,#-1,-(%a1)&,%a7,%acc1 + mac.w %d6u,%d3l,#-1,-(%a1)&,%a7,%acc2 + mac.w %d6u,%a7u,(%a3),%d1,%acc1 + mac.w %d6u,%a7u,(%a3),%d1,%acc2 + mac.w %d6u,%a7u,(%a3),%a3,%acc1 + mac.w %d6u,%a7u,(%a3),%a3,%acc2 + mac.w %d6u,%a7u,(%a3),%d2,%acc1 + mac.w %d6u,%a7u,(%a3),%d2,%acc2 + mac.w %d6u,%a7u,(%a3),%a7,%acc1 + mac.w %d6u,%a7u,(%a3),%a7,%acc2 + mac.w %d6u,%a7u,(%a3)&,%d1,%acc1 + mac.w %d6u,%a7u,(%a3)&,%d1,%acc2 + mac.w %d6u,%a7u,(%a3)&,%a3,%acc1 + mac.w %d6u,%a7u,(%a3)&,%a3,%acc2 + mac.w %d6u,%a7u,(%a3)&,%d2,%acc1 + mac.w %d6u,%a7u,(%a3)&,%d2,%acc2 + mac.w %d6u,%a7u,(%a3)&,%a7,%acc1 + mac.w %d6u,%a7u,(%a3)&,%a7,%acc2 + mac.w %d6u,%a7u,(%a2)+,%d1,%acc1 + mac.w %d6u,%a7u,(%a2)+,%d1,%acc2 + mac.w %d6u,%a7u,(%a2)+,%a3,%acc1 + mac.w %d6u,%a7u,(%a2)+,%a3,%acc2 + mac.w %d6u,%a7u,(%a2)+,%d2,%acc1 + mac.w %d6u,%a7u,(%a2)+,%d2,%acc2 + mac.w %d6u,%a7u,(%a2)+,%a7,%acc1 + mac.w %d6u,%a7u,(%a2)+,%a7,%acc2 + mac.w %d6u,%a7u,(%a2)+&,%d1,%acc1 + mac.w %d6u,%a7u,(%a2)+&,%d1,%acc2 + mac.w %d6u,%a7u,(%a2)+&,%a3,%acc1 + mac.w %d6u,%a7u,(%a2)+&,%a3,%acc2 + mac.w %d6u,%a7u,(%a2)+&,%d2,%acc1 + mac.w %d6u,%a7u,(%a2)+&,%d2,%acc2 + mac.w %d6u,%a7u,(%a2)+&,%a7,%acc1 + mac.w %d6u,%a7u,(%a2)+&,%a7,%acc2 + mac.w %d6u,%a7u,10(%a6),%d1,%acc1 + mac.w %d6u,%a7u,10(%a6),%d1,%acc2 + mac.w %d6u,%a7u,10(%a6),%a3,%acc1 + mac.w %d6u,%a7u,10(%a6),%a3,%acc2 + mac.w %d6u,%a7u,10(%a6),%d2,%acc1 + mac.w %d6u,%a7u,10(%a6),%d2,%acc2 + mac.w %d6u,%a7u,10(%a6),%a7,%acc1 + mac.w %d6u,%a7u,10(%a6),%a7,%acc2 + mac.w %d6u,%a7u,10(%a6)&,%d1,%acc1 + mac.w %d6u,%a7u,10(%a6)&,%d1,%acc2 + mac.w %d6u,%a7u,10(%a6)&,%a3,%acc1 + mac.w %d6u,%a7u,10(%a6)&,%a3,%acc2 + mac.w %d6u,%a7u,10(%a6)&,%d2,%acc1 + mac.w %d6u,%a7u,10(%a6)&,%d2,%acc2 + mac.w %d6u,%a7u,10(%a6)&,%a7,%acc1 + mac.w %d6u,%a7u,10(%a6)&,%a7,%acc2 + mac.w %d6u,%a7u,-(%a1),%d1,%acc1 + mac.w %d6u,%a7u,-(%a1),%d1,%acc2 + mac.w %d6u,%a7u,-(%a1),%a3,%acc1 + mac.w %d6u,%a7u,-(%a1),%a3,%acc2 + mac.w %d6u,%a7u,-(%a1),%d2,%acc1 + mac.w %d6u,%a7u,-(%a1),%d2,%acc2 + mac.w %d6u,%a7u,-(%a1),%a7,%acc1 + mac.w %d6u,%a7u,-(%a1),%a7,%acc2 + mac.w %d6u,%a7u,-(%a1)&,%d1,%acc1 + mac.w %d6u,%a7u,-(%a1)&,%d1,%acc2 + mac.w %d6u,%a7u,-(%a1)&,%a3,%acc1 + mac.w %d6u,%a7u,-(%a1)&,%a3,%acc2 + mac.w %d6u,%a7u,-(%a1)&,%d2,%acc1 + mac.w %d6u,%a7u,-(%a1)&,%d2,%acc2 + mac.w %d6u,%a7u,-(%a1)&,%a7,%acc1 + mac.w %d6u,%a7u,-(%a1)&,%a7,%acc2 + mac.w %d6u,%a7u,<<,(%a3),%d1,%acc1 + mac.w %d6u,%a7u,<<,(%a3),%d1,%acc2 + mac.w %d6u,%a7u,<<,(%a3),%a3,%acc1 + mac.w %d6u,%a7u,<<,(%a3),%a3,%acc2 + mac.w %d6u,%a7u,<<,(%a3),%d2,%acc1 + mac.w %d6u,%a7u,<<,(%a3),%d2,%acc2 + mac.w %d6u,%a7u,<<,(%a3),%a7,%acc1 + mac.w %d6u,%a7u,<<,(%a3),%a7,%acc2 + mac.w %d6u,%a7u,<<,(%a3)&,%d1,%acc1 + mac.w %d6u,%a7u,<<,(%a3)&,%d1,%acc2 + mac.w %d6u,%a7u,<<,(%a3)&,%a3,%acc1 + mac.w %d6u,%a7u,<<,(%a3)&,%a3,%acc2 + mac.w %d6u,%a7u,<<,(%a3)&,%d2,%acc1 + mac.w %d6u,%a7u,<<,(%a3)&,%d2,%acc2 + mac.w %d6u,%a7u,<<,(%a3)&,%a7,%acc1 + mac.w %d6u,%a7u,<<,(%a3)&,%a7,%acc2 + mac.w %d6u,%a7u,<<,(%a2)+,%d1,%acc1 + mac.w %d6u,%a7u,<<,(%a2)+,%d1,%acc2 + mac.w %d6u,%a7u,<<,(%a2)+,%a3,%acc1 + mac.w %d6u,%a7u,<<,(%a2)+,%a3,%acc2 + mac.w %d6u,%a7u,<<,(%a2)+,%d2,%acc1 + mac.w %d6u,%a7u,<<,(%a2)+,%d2,%acc2 + mac.w %d6u,%a7u,<<,(%a2)+,%a7,%acc1 + mac.w %d6u,%a7u,<<,(%a2)+,%a7,%acc2 + mac.w %d6u,%a7u,<<,(%a2)+&,%d1,%acc1 + mac.w %d6u,%a7u,<<,(%a2)+&,%d1,%acc2 + mac.w %d6u,%a7u,<<,(%a2)+&,%a3,%acc1 + mac.w %d6u,%a7u,<<,(%a2)+&,%a3,%acc2 + mac.w %d6u,%a7u,<<,(%a2)+&,%d2,%acc1 + mac.w %d6u,%a7u,<<,(%a2)+&,%d2,%acc2 + mac.w %d6u,%a7u,<<,(%a2)+&,%a7,%acc1 + mac.w %d6u,%a7u,<<,(%a2)+&,%a7,%acc2 + mac.w %d6u,%a7u,<<,10(%a6),%d1,%acc1 + mac.w %d6u,%a7u,<<,10(%a6),%d1,%acc2 + mac.w %d6u,%a7u,<<,10(%a6),%a3,%acc1 + mac.w %d6u,%a7u,<<,10(%a6),%a3,%acc2 + mac.w %d6u,%a7u,<<,10(%a6),%d2,%acc1 + mac.w %d6u,%a7u,<<,10(%a6),%d2,%acc2 + mac.w %d6u,%a7u,<<,10(%a6),%a7,%acc1 + mac.w %d6u,%a7u,<<,10(%a6),%a7,%acc2 + mac.w %d6u,%a7u,<<,10(%a6)&,%d1,%acc1 + mac.w %d6u,%a7u,<<,10(%a6)&,%d1,%acc2 + mac.w %d6u,%a7u,<<,10(%a6)&,%a3,%acc1 + mac.w %d6u,%a7u,<<,10(%a6)&,%a3,%acc2 + mac.w %d6u,%a7u,<<,10(%a6)&,%d2,%acc1 + mac.w %d6u,%a7u,<<,10(%a6)&,%d2,%acc2 + mac.w %d6u,%a7u,<<,10(%a6)&,%a7,%acc1 + mac.w %d6u,%a7u,<<,10(%a6)&,%a7,%acc2 + mac.w %d6u,%a7u,<<,-(%a1),%d1,%acc1 + mac.w %d6u,%a7u,<<,-(%a1),%d1,%acc2 + mac.w %d6u,%a7u,<<,-(%a1),%a3,%acc1 + mac.w %d6u,%a7u,<<,-(%a1),%a3,%acc2 + mac.w %d6u,%a7u,<<,-(%a1),%d2,%acc1 + mac.w %d6u,%a7u,<<,-(%a1),%d2,%acc2 + mac.w %d6u,%a7u,<<,-(%a1),%a7,%acc1 + mac.w %d6u,%a7u,<<,-(%a1),%a7,%acc2 + mac.w %d6u,%a7u,<<,-(%a1)&,%d1,%acc1 + mac.w %d6u,%a7u,<<,-(%a1)&,%d1,%acc2 + mac.w %d6u,%a7u,<<,-(%a1)&,%a3,%acc1 + mac.w %d6u,%a7u,<<,-(%a1)&,%a3,%acc2 + mac.w %d6u,%a7u,<<,-(%a1)&,%d2,%acc1 + mac.w %d6u,%a7u,<<,-(%a1)&,%d2,%acc2 + mac.w %d6u,%a7u,<<,-(%a1)&,%a7,%acc1 + mac.w %d6u,%a7u,<<,-(%a1)&,%a7,%acc2 + mac.w %d6u,%a7u,>>,(%a3),%d1,%acc1 + mac.w %d6u,%a7u,>>,(%a3),%d1,%acc2 + mac.w %d6u,%a7u,>>,(%a3),%a3,%acc1 + mac.w %d6u,%a7u,>>,(%a3),%a3,%acc2 + mac.w %d6u,%a7u,>>,(%a3),%d2,%acc1 + mac.w %d6u,%a7u,>>,(%a3),%d2,%acc2 + mac.w %d6u,%a7u,>>,(%a3),%a7,%acc1 + mac.w %d6u,%a7u,>>,(%a3),%a7,%acc2 + mac.w %d6u,%a7u,>>,(%a3)&,%d1,%acc1 + mac.w %d6u,%a7u,>>,(%a3)&,%d1,%acc2 + mac.w %d6u,%a7u,>>,(%a3)&,%a3,%acc1 + mac.w %d6u,%a7u,>>,(%a3)&,%a3,%acc2 + mac.w %d6u,%a7u,>>,(%a3)&,%d2,%acc1 + mac.w %d6u,%a7u,>>,(%a3)&,%d2,%acc2 + mac.w %d6u,%a7u,>>,(%a3)&,%a7,%acc1 + mac.w %d6u,%a7u,>>,(%a3)&,%a7,%acc2 + mac.w %d6u,%a7u,>>,(%a2)+,%d1,%acc1 + mac.w %d6u,%a7u,>>,(%a2)+,%d1,%acc2 + mac.w %d6u,%a7u,>>,(%a2)+,%a3,%acc1 + mac.w %d6u,%a7u,>>,(%a2)+,%a3,%acc2 + mac.w %d6u,%a7u,>>,(%a2)+,%d2,%acc1 + mac.w %d6u,%a7u,>>,(%a2)+,%d2,%acc2 + mac.w %d6u,%a7u,>>,(%a2)+,%a7,%acc1 + mac.w %d6u,%a7u,>>,(%a2)+,%a7,%acc2 + mac.w %d6u,%a7u,>>,(%a2)+&,%d1,%acc1 + mac.w %d6u,%a7u,>>,(%a2)+&,%d1,%acc2 + mac.w %d6u,%a7u,>>,(%a2)+&,%a3,%acc1 + mac.w %d6u,%a7u,>>,(%a2)+&,%a3,%acc2 + mac.w %d6u,%a7u,>>,(%a2)+&,%d2,%acc1 + mac.w %d6u,%a7u,>>,(%a2)+&,%d2,%acc2 + mac.w %d6u,%a7u,>>,(%a2)+&,%a7,%acc1 + mac.w %d6u,%a7u,>>,(%a2)+&,%a7,%acc2 + mac.w %d6u,%a7u,>>,10(%a6),%d1,%acc1 + mac.w %d6u,%a7u,>>,10(%a6),%d1,%acc2 + mac.w %d6u,%a7u,>>,10(%a6),%a3,%acc1 + mac.w %d6u,%a7u,>>,10(%a6),%a3,%acc2 + mac.w %d6u,%a7u,>>,10(%a6),%d2,%acc1 + mac.w %d6u,%a7u,>>,10(%a6),%d2,%acc2 + mac.w %d6u,%a7u,>>,10(%a6),%a7,%acc1 + mac.w %d6u,%a7u,>>,10(%a6),%a7,%acc2 + mac.w %d6u,%a7u,>>,10(%a6)&,%d1,%acc1 + mac.w %d6u,%a7u,>>,10(%a6)&,%d1,%acc2 + mac.w %d6u,%a7u,>>,10(%a6)&,%a3,%acc1 + mac.w %d6u,%a7u,>>,10(%a6)&,%a3,%acc2 + mac.w %d6u,%a7u,>>,10(%a6)&,%d2,%acc1 + mac.w %d6u,%a7u,>>,10(%a6)&,%d2,%acc2 + mac.w %d6u,%a7u,>>,10(%a6)&,%a7,%acc1 + mac.w %d6u,%a7u,>>,10(%a6)&,%a7,%acc2 + mac.w %d6u,%a7u,>>,-(%a1),%d1,%acc1 + mac.w %d6u,%a7u,>>,-(%a1),%d1,%acc2 + mac.w %d6u,%a7u,>>,-(%a1),%a3,%acc1 + mac.w %d6u,%a7u,>>,-(%a1),%a3,%acc2 + mac.w %d6u,%a7u,>>,-(%a1),%d2,%acc1 + mac.w %d6u,%a7u,>>,-(%a1),%d2,%acc2 + mac.w %d6u,%a7u,>>,-(%a1),%a7,%acc1 + mac.w %d6u,%a7u,>>,-(%a1),%a7,%acc2 + mac.w %d6u,%a7u,>>,-(%a1)&,%d1,%acc1 + mac.w %d6u,%a7u,>>,-(%a1)&,%d1,%acc2 + mac.w %d6u,%a7u,>>,-(%a1)&,%a3,%acc1 + mac.w %d6u,%a7u,>>,-(%a1)&,%a3,%acc2 + mac.w %d6u,%a7u,>>,-(%a1)&,%d2,%acc1 + mac.w %d6u,%a7u,>>,-(%a1)&,%d2,%acc2 + mac.w %d6u,%a7u,>>,-(%a1)&,%a7,%acc1 + mac.w %d6u,%a7u,>>,-(%a1)&,%a7,%acc2 + mac.w %d6u,%a7u,#1,(%a3),%d1,%acc1 + mac.w %d6u,%a7u,#1,(%a3),%d1,%acc2 + mac.w %d6u,%a7u,#1,(%a3),%a3,%acc1 + mac.w %d6u,%a7u,#1,(%a3),%a3,%acc2 + mac.w %d6u,%a7u,#1,(%a3),%d2,%acc1 + mac.w %d6u,%a7u,#1,(%a3),%d2,%acc2 + mac.w %d6u,%a7u,#1,(%a3),%a7,%acc1 + mac.w %d6u,%a7u,#1,(%a3),%a7,%acc2 + mac.w %d6u,%a7u,#1,(%a3)&,%d1,%acc1 + mac.w %d6u,%a7u,#1,(%a3)&,%d1,%acc2 + mac.w %d6u,%a7u,#1,(%a3)&,%a3,%acc1 + mac.w %d6u,%a7u,#1,(%a3)&,%a3,%acc2 + mac.w %d6u,%a7u,#1,(%a3)&,%d2,%acc1 + mac.w %d6u,%a7u,#1,(%a3)&,%d2,%acc2 + mac.w %d6u,%a7u,#1,(%a3)&,%a7,%acc1 + mac.w %d6u,%a7u,#1,(%a3)&,%a7,%acc2 + mac.w %d6u,%a7u,#1,(%a2)+,%d1,%acc1 + mac.w %d6u,%a7u,#1,(%a2)+,%d1,%acc2 + mac.w %d6u,%a7u,#1,(%a2)+,%a3,%acc1 + mac.w %d6u,%a7u,#1,(%a2)+,%a3,%acc2 + mac.w %d6u,%a7u,#1,(%a2)+,%d2,%acc1 + mac.w %d6u,%a7u,#1,(%a2)+,%d2,%acc2 + mac.w %d6u,%a7u,#1,(%a2)+,%a7,%acc1 + mac.w %d6u,%a7u,#1,(%a2)+,%a7,%acc2 + mac.w %d6u,%a7u,#1,(%a2)+&,%d1,%acc1 + mac.w %d6u,%a7u,#1,(%a2)+&,%d1,%acc2 + mac.w %d6u,%a7u,#1,(%a2)+&,%a3,%acc1 + mac.w %d6u,%a7u,#1,(%a2)+&,%a3,%acc2 + mac.w %d6u,%a7u,#1,(%a2)+&,%d2,%acc1 + mac.w %d6u,%a7u,#1,(%a2)+&,%d2,%acc2 + mac.w %d6u,%a7u,#1,(%a2)+&,%a7,%acc1 + mac.w %d6u,%a7u,#1,(%a2)+&,%a7,%acc2 + mac.w %d6u,%a7u,#1,10(%a6),%d1,%acc1 + mac.w %d6u,%a7u,#1,10(%a6),%d1,%acc2 + mac.w %d6u,%a7u,#1,10(%a6),%a3,%acc1 + mac.w %d6u,%a7u,#1,10(%a6),%a3,%acc2 + mac.w %d6u,%a7u,#1,10(%a6),%d2,%acc1 + mac.w %d6u,%a7u,#1,10(%a6),%d2,%acc2 + mac.w %d6u,%a7u,#1,10(%a6),%a7,%acc1 + mac.w %d6u,%a7u,#1,10(%a6),%a7,%acc2 + mac.w %d6u,%a7u,#1,10(%a6)&,%d1,%acc1 + mac.w %d6u,%a7u,#1,10(%a6)&,%d1,%acc2 + mac.w %d6u,%a7u,#1,10(%a6)&,%a3,%acc1 + mac.w %d6u,%a7u,#1,10(%a6)&,%a3,%acc2 + mac.w %d6u,%a7u,#1,10(%a6)&,%d2,%acc1 + mac.w %d6u,%a7u,#1,10(%a6)&,%d2,%acc2 + mac.w %d6u,%a7u,#1,10(%a6)&,%a7,%acc1 + mac.w %d6u,%a7u,#1,10(%a6)&,%a7,%acc2 + mac.w %d6u,%a7u,#1,-(%a1),%d1,%acc1 + mac.w %d6u,%a7u,#1,-(%a1),%d1,%acc2 + mac.w %d6u,%a7u,#1,-(%a1),%a3,%acc1 + mac.w %d6u,%a7u,#1,-(%a1),%a3,%acc2 + mac.w %d6u,%a7u,#1,-(%a1),%d2,%acc1 + mac.w %d6u,%a7u,#1,-(%a1),%d2,%acc2 + mac.w %d6u,%a7u,#1,-(%a1),%a7,%acc1 + mac.w %d6u,%a7u,#1,-(%a1),%a7,%acc2 + mac.w %d6u,%a7u,#1,-(%a1)&,%d1,%acc1 + mac.w %d6u,%a7u,#1,-(%a1)&,%d1,%acc2 + mac.w %d6u,%a7u,#1,-(%a1)&,%a3,%acc1 + mac.w %d6u,%a7u,#1,-(%a1)&,%a3,%acc2 + mac.w %d6u,%a7u,#1,-(%a1)&,%d2,%acc1 + mac.w %d6u,%a7u,#1,-(%a1)&,%d2,%acc2 + mac.w %d6u,%a7u,#1,-(%a1)&,%a7,%acc1 + mac.w %d6u,%a7u,#1,-(%a1)&,%a7,%acc2 + mac.w %d6u,%a7u,#-1,(%a3),%d1,%acc1 + mac.w %d6u,%a7u,#-1,(%a3),%d1,%acc2 + mac.w %d6u,%a7u,#-1,(%a3),%a3,%acc1 + mac.w %d6u,%a7u,#-1,(%a3),%a3,%acc2 + mac.w %d6u,%a7u,#-1,(%a3),%d2,%acc1 + mac.w %d6u,%a7u,#-1,(%a3),%d2,%acc2 + mac.w %d6u,%a7u,#-1,(%a3),%a7,%acc1 + mac.w %d6u,%a7u,#-1,(%a3),%a7,%acc2 + mac.w %d6u,%a7u,#-1,(%a3)&,%d1,%acc1 + mac.w %d6u,%a7u,#-1,(%a3)&,%d1,%acc2 + mac.w %d6u,%a7u,#-1,(%a3)&,%a3,%acc1 + mac.w %d6u,%a7u,#-1,(%a3)&,%a3,%acc2 + mac.w %d6u,%a7u,#-1,(%a3)&,%d2,%acc1 + mac.w %d6u,%a7u,#-1,(%a3)&,%d2,%acc2 + mac.w %d6u,%a7u,#-1,(%a3)&,%a7,%acc1 + mac.w %d6u,%a7u,#-1,(%a3)&,%a7,%acc2 + mac.w %d6u,%a7u,#-1,(%a2)+,%d1,%acc1 + mac.w %d6u,%a7u,#-1,(%a2)+,%d1,%acc2 + mac.w %d6u,%a7u,#-1,(%a2)+,%a3,%acc1 + mac.w %d6u,%a7u,#-1,(%a2)+,%a3,%acc2 + mac.w %d6u,%a7u,#-1,(%a2)+,%d2,%acc1 + mac.w %d6u,%a7u,#-1,(%a2)+,%d2,%acc2 + mac.w %d6u,%a7u,#-1,(%a2)+,%a7,%acc1 + mac.w %d6u,%a7u,#-1,(%a2)+,%a7,%acc2 + mac.w %d6u,%a7u,#-1,(%a2)+&,%d1,%acc1 + mac.w %d6u,%a7u,#-1,(%a2)+&,%d1,%acc2 + mac.w %d6u,%a7u,#-1,(%a2)+&,%a3,%acc1 + mac.w %d6u,%a7u,#-1,(%a2)+&,%a3,%acc2 + mac.w %d6u,%a7u,#-1,(%a2)+&,%d2,%acc1 + mac.w %d6u,%a7u,#-1,(%a2)+&,%d2,%acc2 + mac.w %d6u,%a7u,#-1,(%a2)+&,%a7,%acc1 + mac.w %d6u,%a7u,#-1,(%a2)+&,%a7,%acc2 + mac.w %d6u,%a7u,#-1,10(%a6),%d1,%acc1 + mac.w %d6u,%a7u,#-1,10(%a6),%d1,%acc2 + mac.w %d6u,%a7u,#-1,10(%a6),%a3,%acc1 + mac.w %d6u,%a7u,#-1,10(%a6),%a3,%acc2 + mac.w %d6u,%a7u,#-1,10(%a6),%d2,%acc1 + mac.w %d6u,%a7u,#-1,10(%a6),%d2,%acc2 + mac.w %d6u,%a7u,#-1,10(%a6),%a7,%acc1 + mac.w %d6u,%a7u,#-1,10(%a6),%a7,%acc2 + mac.w %d6u,%a7u,#-1,10(%a6)&,%d1,%acc1 + mac.w %d6u,%a7u,#-1,10(%a6)&,%d1,%acc2 + mac.w %d6u,%a7u,#-1,10(%a6)&,%a3,%acc1 + mac.w %d6u,%a7u,#-1,10(%a6)&,%a3,%acc2 + mac.w %d6u,%a7u,#-1,10(%a6)&,%d2,%acc1 + mac.w %d6u,%a7u,#-1,10(%a6)&,%d2,%acc2 + mac.w %d6u,%a7u,#-1,10(%a6)&,%a7,%acc1 + mac.w %d6u,%a7u,#-1,10(%a6)&,%a7,%acc2 + mac.w %d6u,%a7u,#-1,-(%a1),%d1,%acc1 + mac.w %d6u,%a7u,#-1,-(%a1),%d1,%acc2 + mac.w %d6u,%a7u,#-1,-(%a1),%a3,%acc1 + mac.w %d6u,%a7u,#-1,-(%a1),%a3,%acc2 + mac.w %d6u,%a7u,#-1,-(%a1),%d2,%acc1 + mac.w %d6u,%a7u,#-1,-(%a1),%d2,%acc2 + mac.w %d6u,%a7u,#-1,-(%a1),%a7,%acc1 + mac.w %d6u,%a7u,#-1,-(%a1),%a7,%acc2 + mac.w %d6u,%a7u,#-1,-(%a1)&,%d1,%acc1 + mac.w %d6u,%a7u,#-1,-(%a1)&,%d1,%acc2 + mac.w %d6u,%a7u,#-1,-(%a1)&,%a3,%acc1 + mac.w %d6u,%a7u,#-1,-(%a1)&,%a3,%acc2 + mac.w %d6u,%a7u,#-1,-(%a1)&,%d2,%acc1 + mac.w %d6u,%a7u,#-1,-(%a1)&,%d2,%acc2 + mac.w %d6u,%a7u,#-1,-(%a1)&,%a7,%acc1 + mac.w %d6u,%a7u,#-1,-(%a1)&,%a7,%acc2 + mac.w %d6u,%d1l,(%a3),%d1,%acc1 + mac.w %d6u,%d1l,(%a3),%d1,%acc2 + mac.w %d6u,%d1l,(%a3),%a3,%acc1 + mac.w %d6u,%d1l,(%a3),%a3,%acc2 + mac.w %d6u,%d1l,(%a3),%d2,%acc1 + mac.w %d6u,%d1l,(%a3),%d2,%acc2 + mac.w %d6u,%d1l,(%a3),%a7,%acc1 + mac.w %d6u,%d1l,(%a3),%a7,%acc2 + mac.w %d6u,%d1l,(%a3)&,%d1,%acc1 + mac.w %d6u,%d1l,(%a3)&,%d1,%acc2 + mac.w %d6u,%d1l,(%a3)&,%a3,%acc1 + mac.w %d6u,%d1l,(%a3)&,%a3,%acc2 + mac.w %d6u,%d1l,(%a3)&,%d2,%acc1 + mac.w %d6u,%d1l,(%a3)&,%d2,%acc2 + mac.w %d6u,%d1l,(%a3)&,%a7,%acc1 + mac.w %d6u,%d1l,(%a3)&,%a7,%acc2 + mac.w %d6u,%d1l,(%a2)+,%d1,%acc1 + mac.w %d6u,%d1l,(%a2)+,%d1,%acc2 + mac.w %d6u,%d1l,(%a2)+,%a3,%acc1 + mac.w %d6u,%d1l,(%a2)+,%a3,%acc2 + mac.w %d6u,%d1l,(%a2)+,%d2,%acc1 + mac.w %d6u,%d1l,(%a2)+,%d2,%acc2 + mac.w %d6u,%d1l,(%a2)+,%a7,%acc1 + mac.w %d6u,%d1l,(%a2)+,%a7,%acc2 + mac.w %d6u,%d1l,(%a2)+&,%d1,%acc1 + mac.w %d6u,%d1l,(%a2)+&,%d1,%acc2 + mac.w %d6u,%d1l,(%a2)+&,%a3,%acc1 + mac.w %d6u,%d1l,(%a2)+&,%a3,%acc2 + mac.w %d6u,%d1l,(%a2)+&,%d2,%acc1 + mac.w %d6u,%d1l,(%a2)+&,%d2,%acc2 + mac.w %d6u,%d1l,(%a2)+&,%a7,%acc1 + mac.w %d6u,%d1l,(%a2)+&,%a7,%acc2 + mac.w %d6u,%d1l,10(%a6),%d1,%acc1 + mac.w %d6u,%d1l,10(%a6),%d1,%acc2 + mac.w %d6u,%d1l,10(%a6),%a3,%acc1 + mac.w %d6u,%d1l,10(%a6),%a3,%acc2 + mac.w %d6u,%d1l,10(%a6),%d2,%acc1 + mac.w %d6u,%d1l,10(%a6),%d2,%acc2 + mac.w %d6u,%d1l,10(%a6),%a7,%acc1 + mac.w %d6u,%d1l,10(%a6),%a7,%acc2 + mac.w %d6u,%d1l,10(%a6)&,%d1,%acc1 + mac.w %d6u,%d1l,10(%a6)&,%d1,%acc2 + mac.w %d6u,%d1l,10(%a6)&,%a3,%acc1 + mac.w %d6u,%d1l,10(%a6)&,%a3,%acc2 + mac.w %d6u,%d1l,10(%a6)&,%d2,%acc1 + mac.w %d6u,%d1l,10(%a6)&,%d2,%acc2 + mac.w %d6u,%d1l,10(%a6)&,%a7,%acc1 + mac.w %d6u,%d1l,10(%a6)&,%a7,%acc2 + mac.w %d6u,%d1l,-(%a1),%d1,%acc1 + mac.w %d6u,%d1l,-(%a1),%d1,%acc2 + mac.w %d6u,%d1l,-(%a1),%a3,%acc1 + mac.w %d6u,%d1l,-(%a1),%a3,%acc2 + mac.w %d6u,%d1l,-(%a1),%d2,%acc1 + mac.w %d6u,%d1l,-(%a1),%d2,%acc2 + mac.w %d6u,%d1l,-(%a1),%a7,%acc1 + mac.w %d6u,%d1l,-(%a1),%a7,%acc2 + mac.w %d6u,%d1l,-(%a1)&,%d1,%acc1 + mac.w %d6u,%d1l,-(%a1)&,%d1,%acc2 + mac.w %d6u,%d1l,-(%a1)&,%a3,%acc1 + mac.w %d6u,%d1l,-(%a1)&,%a3,%acc2 + mac.w %d6u,%d1l,-(%a1)&,%d2,%acc1 + mac.w %d6u,%d1l,-(%a1)&,%d2,%acc2 + mac.w %d6u,%d1l,-(%a1)&,%a7,%acc1 + mac.w %d6u,%d1l,-(%a1)&,%a7,%acc2 + mac.w %d6u,%d1l,<<,(%a3),%d1,%acc1 + mac.w %d6u,%d1l,<<,(%a3),%d1,%acc2 + mac.w %d6u,%d1l,<<,(%a3),%a3,%acc1 + mac.w %d6u,%d1l,<<,(%a3),%a3,%acc2 + mac.w %d6u,%d1l,<<,(%a3),%d2,%acc1 + mac.w %d6u,%d1l,<<,(%a3),%d2,%acc2 + mac.w %d6u,%d1l,<<,(%a3),%a7,%acc1 + mac.w %d6u,%d1l,<<,(%a3),%a7,%acc2 + mac.w %d6u,%d1l,<<,(%a3)&,%d1,%acc1 + mac.w %d6u,%d1l,<<,(%a3)&,%d1,%acc2 + mac.w %d6u,%d1l,<<,(%a3)&,%a3,%acc1 + mac.w %d6u,%d1l,<<,(%a3)&,%a3,%acc2 + mac.w %d6u,%d1l,<<,(%a3)&,%d2,%acc1 + mac.w %d6u,%d1l,<<,(%a3)&,%d2,%acc2 + mac.w %d6u,%d1l,<<,(%a3)&,%a7,%acc1 + mac.w %d6u,%d1l,<<,(%a3)&,%a7,%acc2 + mac.w %d6u,%d1l,<<,(%a2)+,%d1,%acc1 + mac.w %d6u,%d1l,<<,(%a2)+,%d1,%acc2 + mac.w %d6u,%d1l,<<,(%a2)+,%a3,%acc1 + mac.w %d6u,%d1l,<<,(%a2)+,%a3,%acc2 + mac.w %d6u,%d1l,<<,(%a2)+,%d2,%acc1 + mac.w %d6u,%d1l,<<,(%a2)+,%d2,%acc2 + mac.w %d6u,%d1l,<<,(%a2)+,%a7,%acc1 + mac.w %d6u,%d1l,<<,(%a2)+,%a7,%acc2 + mac.w %d6u,%d1l,<<,(%a2)+&,%d1,%acc1 + mac.w %d6u,%d1l,<<,(%a2)+&,%d1,%acc2 + mac.w %d6u,%d1l,<<,(%a2)+&,%a3,%acc1 + mac.w %d6u,%d1l,<<,(%a2)+&,%a3,%acc2 + mac.w %d6u,%d1l,<<,(%a2)+&,%d2,%acc1 + mac.w %d6u,%d1l,<<,(%a2)+&,%d2,%acc2 + mac.w %d6u,%d1l,<<,(%a2)+&,%a7,%acc1 + mac.w %d6u,%d1l,<<,(%a2)+&,%a7,%acc2 + mac.w %d6u,%d1l,<<,10(%a6),%d1,%acc1 + mac.w %d6u,%d1l,<<,10(%a6),%d1,%acc2 + mac.w %d6u,%d1l,<<,10(%a6),%a3,%acc1 + mac.w %d6u,%d1l,<<,10(%a6),%a3,%acc2 + mac.w %d6u,%d1l,<<,10(%a6),%d2,%acc1 + mac.w %d6u,%d1l,<<,10(%a6),%d2,%acc2 + mac.w %d6u,%d1l,<<,10(%a6),%a7,%acc1 + mac.w %d6u,%d1l,<<,10(%a6),%a7,%acc2 + mac.w %d6u,%d1l,<<,10(%a6)&,%d1,%acc1 + mac.w %d6u,%d1l,<<,10(%a6)&,%d1,%acc2 + mac.w %d6u,%d1l,<<,10(%a6)&,%a3,%acc1 + mac.w %d6u,%d1l,<<,10(%a6)&,%a3,%acc2 + mac.w %d6u,%d1l,<<,10(%a6)&,%d2,%acc1 + mac.w %d6u,%d1l,<<,10(%a6)&,%d2,%acc2 + mac.w %d6u,%d1l,<<,10(%a6)&,%a7,%acc1 + mac.w %d6u,%d1l,<<,10(%a6)&,%a7,%acc2 + mac.w %d6u,%d1l,<<,-(%a1),%d1,%acc1 + mac.w %d6u,%d1l,<<,-(%a1),%d1,%acc2 + mac.w %d6u,%d1l,<<,-(%a1),%a3,%acc1 + mac.w %d6u,%d1l,<<,-(%a1),%a3,%acc2 + mac.w %d6u,%d1l,<<,-(%a1),%d2,%acc1 + mac.w %d6u,%d1l,<<,-(%a1),%d2,%acc2 + mac.w %d6u,%d1l,<<,-(%a1),%a7,%acc1 + mac.w %d6u,%d1l,<<,-(%a1),%a7,%acc2 + mac.w %d6u,%d1l,<<,-(%a1)&,%d1,%acc1 + mac.w %d6u,%d1l,<<,-(%a1)&,%d1,%acc2 + mac.w %d6u,%d1l,<<,-(%a1)&,%a3,%acc1 + mac.w %d6u,%d1l,<<,-(%a1)&,%a3,%acc2 + mac.w %d6u,%d1l,<<,-(%a1)&,%d2,%acc1 + mac.w %d6u,%d1l,<<,-(%a1)&,%d2,%acc2 + mac.w %d6u,%d1l,<<,-(%a1)&,%a7,%acc1 + mac.w %d6u,%d1l,<<,-(%a1)&,%a7,%acc2 + mac.w %d6u,%d1l,>>,(%a3),%d1,%acc1 + mac.w %d6u,%d1l,>>,(%a3),%d1,%acc2 + mac.w %d6u,%d1l,>>,(%a3),%a3,%acc1 + mac.w %d6u,%d1l,>>,(%a3),%a3,%acc2 + mac.w %d6u,%d1l,>>,(%a3),%d2,%acc1 + mac.w %d6u,%d1l,>>,(%a3),%d2,%acc2 + mac.w %d6u,%d1l,>>,(%a3),%a7,%acc1 + mac.w %d6u,%d1l,>>,(%a3),%a7,%acc2 + mac.w %d6u,%d1l,>>,(%a3)&,%d1,%acc1 + mac.w %d6u,%d1l,>>,(%a3)&,%d1,%acc2 + mac.w %d6u,%d1l,>>,(%a3)&,%a3,%acc1 + mac.w %d6u,%d1l,>>,(%a3)&,%a3,%acc2 + mac.w %d6u,%d1l,>>,(%a3)&,%d2,%acc1 + mac.w %d6u,%d1l,>>,(%a3)&,%d2,%acc2 + mac.w %d6u,%d1l,>>,(%a3)&,%a7,%acc1 + mac.w %d6u,%d1l,>>,(%a3)&,%a7,%acc2 + mac.w %d6u,%d1l,>>,(%a2)+,%d1,%acc1 + mac.w %d6u,%d1l,>>,(%a2)+,%d1,%acc2 + mac.w %d6u,%d1l,>>,(%a2)+,%a3,%acc1 + mac.w %d6u,%d1l,>>,(%a2)+,%a3,%acc2 + mac.w %d6u,%d1l,>>,(%a2)+,%d2,%acc1 + mac.w %d6u,%d1l,>>,(%a2)+,%d2,%acc2 + mac.w %d6u,%d1l,>>,(%a2)+,%a7,%acc1 + mac.w %d6u,%d1l,>>,(%a2)+,%a7,%acc2 + mac.w %d6u,%d1l,>>,(%a2)+&,%d1,%acc1 + mac.w %d6u,%d1l,>>,(%a2)+&,%d1,%acc2 + mac.w %d6u,%d1l,>>,(%a2)+&,%a3,%acc1 + mac.w %d6u,%d1l,>>,(%a2)+&,%a3,%acc2 + mac.w %d6u,%d1l,>>,(%a2)+&,%d2,%acc1 + mac.w %d6u,%d1l,>>,(%a2)+&,%d2,%acc2 + mac.w %d6u,%d1l,>>,(%a2)+&,%a7,%acc1 + mac.w %d6u,%d1l,>>,(%a2)+&,%a7,%acc2 + mac.w %d6u,%d1l,>>,10(%a6),%d1,%acc1 + mac.w %d6u,%d1l,>>,10(%a6),%d1,%acc2 + mac.w %d6u,%d1l,>>,10(%a6),%a3,%acc1 + mac.w %d6u,%d1l,>>,10(%a6),%a3,%acc2 + mac.w %d6u,%d1l,>>,10(%a6),%d2,%acc1 + mac.w %d6u,%d1l,>>,10(%a6),%d2,%acc2 + mac.w %d6u,%d1l,>>,10(%a6),%a7,%acc1 + mac.w %d6u,%d1l,>>,10(%a6),%a7,%acc2 + mac.w %d6u,%d1l,>>,10(%a6)&,%d1,%acc1 + mac.w %d6u,%d1l,>>,10(%a6)&,%d1,%acc2 + mac.w %d6u,%d1l,>>,10(%a6)&,%a3,%acc1 + mac.w %d6u,%d1l,>>,10(%a6)&,%a3,%acc2 + mac.w %d6u,%d1l,>>,10(%a6)&,%d2,%acc1 + mac.w %d6u,%d1l,>>,10(%a6)&,%d2,%acc2 + mac.w %d6u,%d1l,>>,10(%a6)&,%a7,%acc1 + mac.w %d6u,%d1l,>>,10(%a6)&,%a7,%acc2 + mac.w %d6u,%d1l,>>,-(%a1),%d1,%acc1 + mac.w %d6u,%d1l,>>,-(%a1),%d1,%acc2 + mac.w %d6u,%d1l,>>,-(%a1),%a3,%acc1 + mac.w %d6u,%d1l,>>,-(%a1),%a3,%acc2 + mac.w %d6u,%d1l,>>,-(%a1),%d2,%acc1 + mac.w %d6u,%d1l,>>,-(%a1),%d2,%acc2 + mac.w %d6u,%d1l,>>,-(%a1),%a7,%acc1 + mac.w %d6u,%d1l,>>,-(%a1),%a7,%acc2 + mac.w %d6u,%d1l,>>,-(%a1)&,%d1,%acc1 + mac.w %d6u,%d1l,>>,-(%a1)&,%d1,%acc2 + mac.w %d6u,%d1l,>>,-(%a1)&,%a3,%acc1 + mac.w %d6u,%d1l,>>,-(%a1)&,%a3,%acc2 + mac.w %d6u,%d1l,>>,-(%a1)&,%d2,%acc1 + mac.w %d6u,%d1l,>>,-(%a1)&,%d2,%acc2 + mac.w %d6u,%d1l,>>,-(%a1)&,%a7,%acc1 + mac.w %d6u,%d1l,>>,-(%a1)&,%a7,%acc2 + mac.w %d6u,%d1l,#1,(%a3),%d1,%acc1 + mac.w %d6u,%d1l,#1,(%a3),%d1,%acc2 + mac.w %d6u,%d1l,#1,(%a3),%a3,%acc1 + mac.w %d6u,%d1l,#1,(%a3),%a3,%acc2 + mac.w %d6u,%d1l,#1,(%a3),%d2,%acc1 + mac.w %d6u,%d1l,#1,(%a3),%d2,%acc2 + mac.w %d6u,%d1l,#1,(%a3),%a7,%acc1 + mac.w %d6u,%d1l,#1,(%a3),%a7,%acc2 + mac.w %d6u,%d1l,#1,(%a3)&,%d1,%acc1 + mac.w %d6u,%d1l,#1,(%a3)&,%d1,%acc2 + mac.w %d6u,%d1l,#1,(%a3)&,%a3,%acc1 + mac.w %d6u,%d1l,#1,(%a3)&,%a3,%acc2 + mac.w %d6u,%d1l,#1,(%a3)&,%d2,%acc1 + mac.w %d6u,%d1l,#1,(%a3)&,%d2,%acc2 + mac.w %d6u,%d1l,#1,(%a3)&,%a7,%acc1 + mac.w %d6u,%d1l,#1,(%a3)&,%a7,%acc2 + mac.w %d6u,%d1l,#1,(%a2)+,%d1,%acc1 + mac.w %d6u,%d1l,#1,(%a2)+,%d1,%acc2 + mac.w %d6u,%d1l,#1,(%a2)+,%a3,%acc1 + mac.w %d6u,%d1l,#1,(%a2)+,%a3,%acc2 + mac.w %d6u,%d1l,#1,(%a2)+,%d2,%acc1 + mac.w %d6u,%d1l,#1,(%a2)+,%d2,%acc2 + mac.w %d6u,%d1l,#1,(%a2)+,%a7,%acc1 + mac.w %d6u,%d1l,#1,(%a2)+,%a7,%acc2 + mac.w %d6u,%d1l,#1,(%a2)+&,%d1,%acc1 + mac.w %d6u,%d1l,#1,(%a2)+&,%d1,%acc2 + mac.w %d6u,%d1l,#1,(%a2)+&,%a3,%acc1 + mac.w %d6u,%d1l,#1,(%a2)+&,%a3,%acc2 + mac.w %d6u,%d1l,#1,(%a2)+&,%d2,%acc1 + mac.w %d6u,%d1l,#1,(%a2)+&,%d2,%acc2 + mac.w %d6u,%d1l,#1,(%a2)+&,%a7,%acc1 + mac.w %d6u,%d1l,#1,(%a2)+&,%a7,%acc2 + mac.w %d6u,%d1l,#1,10(%a6),%d1,%acc1 + mac.w %d6u,%d1l,#1,10(%a6),%d1,%acc2 + mac.w %d6u,%d1l,#1,10(%a6),%a3,%acc1 + mac.w %d6u,%d1l,#1,10(%a6),%a3,%acc2 + mac.w %d6u,%d1l,#1,10(%a6),%d2,%acc1 + mac.w %d6u,%d1l,#1,10(%a6),%d2,%acc2 + mac.w %d6u,%d1l,#1,10(%a6),%a7,%acc1 + mac.w %d6u,%d1l,#1,10(%a6),%a7,%acc2 + mac.w %d6u,%d1l,#1,10(%a6)&,%d1,%acc1 + mac.w %d6u,%d1l,#1,10(%a6)&,%d1,%acc2 + mac.w %d6u,%d1l,#1,10(%a6)&,%a3,%acc1 + mac.w %d6u,%d1l,#1,10(%a6)&,%a3,%acc2 + mac.w %d6u,%d1l,#1,10(%a6)&,%d2,%acc1 + mac.w %d6u,%d1l,#1,10(%a6)&,%d2,%acc2 + mac.w %d6u,%d1l,#1,10(%a6)&,%a7,%acc1 + mac.w %d6u,%d1l,#1,10(%a6)&,%a7,%acc2 + mac.w %d6u,%d1l,#1,-(%a1),%d1,%acc1 + mac.w %d6u,%d1l,#1,-(%a1),%d1,%acc2 + mac.w %d6u,%d1l,#1,-(%a1),%a3,%acc1 + mac.w %d6u,%d1l,#1,-(%a1),%a3,%acc2 + mac.w %d6u,%d1l,#1,-(%a1),%d2,%acc1 + mac.w %d6u,%d1l,#1,-(%a1),%d2,%acc2 + mac.w %d6u,%d1l,#1,-(%a1),%a7,%acc1 + mac.w %d6u,%d1l,#1,-(%a1),%a7,%acc2 + mac.w %d6u,%d1l,#1,-(%a1)&,%d1,%acc1 + mac.w %d6u,%d1l,#1,-(%a1)&,%d1,%acc2 + mac.w %d6u,%d1l,#1,-(%a1)&,%a3,%acc1 + mac.w %d6u,%d1l,#1,-(%a1)&,%a3,%acc2 + mac.w %d6u,%d1l,#1,-(%a1)&,%d2,%acc1 + mac.w %d6u,%d1l,#1,-(%a1)&,%d2,%acc2 + mac.w %d6u,%d1l,#1,-(%a1)&,%a7,%acc1 + mac.w %d6u,%d1l,#1,-(%a1)&,%a7,%acc2 + mac.w %d6u,%d1l,#-1,(%a3),%d1,%acc1 + mac.w %d6u,%d1l,#-1,(%a3),%d1,%acc2 + mac.w %d6u,%d1l,#-1,(%a3),%a3,%acc1 + mac.w %d6u,%d1l,#-1,(%a3),%a3,%acc2 + mac.w %d6u,%d1l,#-1,(%a3),%d2,%acc1 + mac.w %d6u,%d1l,#-1,(%a3),%d2,%acc2 + mac.w %d6u,%d1l,#-1,(%a3),%a7,%acc1 + mac.w %d6u,%d1l,#-1,(%a3),%a7,%acc2 + mac.w %d6u,%d1l,#-1,(%a3)&,%d1,%acc1 + mac.w %d6u,%d1l,#-1,(%a3)&,%d1,%acc2 + mac.w %d6u,%d1l,#-1,(%a3)&,%a3,%acc1 + mac.w %d6u,%d1l,#-1,(%a3)&,%a3,%acc2 + mac.w %d6u,%d1l,#-1,(%a3)&,%d2,%acc1 + mac.w %d6u,%d1l,#-1,(%a3)&,%d2,%acc2 + mac.w %d6u,%d1l,#-1,(%a3)&,%a7,%acc1 + mac.w %d6u,%d1l,#-1,(%a3)&,%a7,%acc2 + mac.w %d6u,%d1l,#-1,(%a2)+,%d1,%acc1 + mac.w %d6u,%d1l,#-1,(%a2)+,%d1,%acc2 + mac.w %d6u,%d1l,#-1,(%a2)+,%a3,%acc1 + mac.w %d6u,%d1l,#-1,(%a2)+,%a3,%acc2 + mac.w %d6u,%d1l,#-1,(%a2)+,%d2,%acc1 + mac.w %d6u,%d1l,#-1,(%a2)+,%d2,%acc2 + mac.w %d6u,%d1l,#-1,(%a2)+,%a7,%acc1 + mac.w %d6u,%d1l,#-1,(%a2)+,%a7,%acc2 + mac.w %d6u,%d1l,#-1,(%a2)+&,%d1,%acc1 + mac.w %d6u,%d1l,#-1,(%a2)+&,%d1,%acc2 + mac.w %d6u,%d1l,#-1,(%a2)+&,%a3,%acc1 + mac.w %d6u,%d1l,#-1,(%a2)+&,%a3,%acc2 + mac.w %d6u,%d1l,#-1,(%a2)+&,%d2,%acc1 + mac.w %d6u,%d1l,#-1,(%a2)+&,%d2,%acc2 + mac.w %d6u,%d1l,#-1,(%a2)+&,%a7,%acc1 + mac.w %d6u,%d1l,#-1,(%a2)+&,%a7,%acc2 + mac.w %d6u,%d1l,#-1,10(%a6),%d1,%acc1 + mac.w %d6u,%d1l,#-1,10(%a6),%d1,%acc2 + mac.w %d6u,%d1l,#-1,10(%a6),%a3,%acc1 + mac.w %d6u,%d1l,#-1,10(%a6),%a3,%acc2 + mac.w %d6u,%d1l,#-1,10(%a6),%d2,%acc1 + mac.w %d6u,%d1l,#-1,10(%a6),%d2,%acc2 + mac.w %d6u,%d1l,#-1,10(%a6),%a7,%acc1 + mac.w %d6u,%d1l,#-1,10(%a6),%a7,%acc2 + mac.w %d6u,%d1l,#-1,10(%a6)&,%d1,%acc1 + mac.w %d6u,%d1l,#-1,10(%a6)&,%d1,%acc2 + mac.w %d6u,%d1l,#-1,10(%a6)&,%a3,%acc1 + mac.w %d6u,%d1l,#-1,10(%a6)&,%a3,%acc2 + mac.w %d6u,%d1l,#-1,10(%a6)&,%d2,%acc1 + mac.w %d6u,%d1l,#-1,10(%a6)&,%d2,%acc2 + mac.w %d6u,%d1l,#-1,10(%a6)&,%a7,%acc1 + mac.w %d6u,%d1l,#-1,10(%a6)&,%a7,%acc2 + mac.w %d6u,%d1l,#-1,-(%a1),%d1,%acc1 + mac.w %d6u,%d1l,#-1,-(%a1),%d1,%acc2 + mac.w %d6u,%d1l,#-1,-(%a1),%a3,%acc1 + mac.w %d6u,%d1l,#-1,-(%a1),%a3,%acc2 + mac.w %d6u,%d1l,#-1,-(%a1),%d2,%acc1 + mac.w %d6u,%d1l,#-1,-(%a1),%d2,%acc2 + mac.w %d6u,%d1l,#-1,-(%a1),%a7,%acc1 + mac.w %d6u,%d1l,#-1,-(%a1),%a7,%acc2 + mac.w %d6u,%d1l,#-1,-(%a1)&,%d1,%acc1 + mac.w %d6u,%d1l,#-1,-(%a1)&,%d1,%acc2 + mac.w %d6u,%d1l,#-1,-(%a1)&,%a3,%acc1 + mac.w %d6u,%d1l,#-1,-(%a1)&,%a3,%acc2 + mac.w %d6u,%d1l,#-1,-(%a1)&,%d2,%acc1 + mac.w %d6u,%d1l,#-1,-(%a1)&,%d2,%acc2 + mac.w %d6u,%d1l,#-1,-(%a1)&,%a7,%acc1 + mac.w %d6u,%d1l,#-1,-(%a1)&,%a7,%acc2 + + mac.l %a1,%a3,%acc1 + mac.l %a1,%a3,%acc2 + mac.l %a1,%a3,<<,%acc1 + mac.l %a1,%a3,<<,%acc2 + mac.l %a1,%a3,>>,%acc1 + mac.l %a1,%a3,>>,%acc2 + mac.l %a1,%a3,#1,%acc1 + mac.l %a1,%a3,#1,%acc2 + mac.l %a1,%a3,#-1,%acc1 + mac.l %a1,%a3,#-1,%acc2 + mac.l %a1,%d4,%acc1 + mac.l %a1,%d4,%acc2 + mac.l %a1,%d4,<<,%acc1 + mac.l %a1,%d4,<<,%acc2 + mac.l %a1,%d4,>>,%acc1 + mac.l %a1,%d4,>>,%acc2 + mac.l %a1,%d4,#1,%acc1 + mac.l %a1,%d4,#1,%acc2 + mac.l %a1,%d4,#-1,%acc1 + mac.l %a1,%d4,#-1,%acc2 + mac.l %d6,%a3,%acc1 + mac.l %d6,%a3,%acc2 + mac.l %d6,%a3,<<,%acc1 + mac.l %d6,%a3,<<,%acc2 + mac.l %d6,%a3,>>,%acc1 + mac.l %d6,%a3,>>,%acc2 + mac.l %d6,%a3,#1,%acc1 + mac.l %d6,%a3,#1,%acc2 + mac.l %d6,%a3,#-1,%acc1 + mac.l %d6,%a3,#-1,%acc2 + mac.l %d6,%d4,%acc1 + mac.l %d6,%d4,%acc2 + mac.l %d6,%d4,<<,%acc1 + mac.l %d6,%d4,<<,%acc2 + mac.l %d6,%d4,>>,%acc1 + mac.l %d6,%d4,>>,%acc2 + mac.l %d6,%d4,#1,%acc1 + mac.l %d6,%d4,#1,%acc2 + mac.l %d6,%d4,#-1,%acc1 + mac.l %d6,%d4,#-1,%acc2 + + mac.l %a1,%a3,(%a3),%d1,%acc1 + mac.l %a1,%a3,(%a3),%d1,%acc2 + mac.l %a1,%a3,(%a3),%a3,%acc1 + mac.l %a1,%a3,(%a3),%a3,%acc2 + mac.l %a1,%a3,(%a3),%d2,%acc1 + mac.l %a1,%a3,(%a3),%d2,%acc2 + mac.l %a1,%a3,(%a3),%a7,%acc1 + mac.l %a1,%a3,(%a3),%a7,%acc2 + mac.l %a1,%a3,(%a3)&,%d1,%acc1 + mac.l %a1,%a3,(%a3)&,%d1,%acc2 + mac.l %a1,%a3,(%a3)&,%a3,%acc1 + mac.l %a1,%a3,(%a3)&,%a3,%acc2 + mac.l %a1,%a3,(%a3)&,%d2,%acc1 + mac.l %a1,%a3,(%a3)&,%d2,%acc2 + mac.l %a1,%a3,(%a3)&,%a7,%acc1 + mac.l %a1,%a3,(%a3)&,%a7,%acc2 + mac.l %a1,%a3,(%a2)+,%d1,%acc1 + mac.l %a1,%a3,(%a2)+,%d1,%acc2 + mac.l %a1,%a3,(%a2)+,%a3,%acc1 + mac.l %a1,%a3,(%a2)+,%a3,%acc2 + mac.l %a1,%a3,(%a2)+,%d2,%acc1 + mac.l %a1,%a3,(%a2)+,%d2,%acc2 + mac.l %a1,%a3,(%a2)+,%a7,%acc1 + mac.l %a1,%a3,(%a2)+,%a7,%acc2 + mac.l %a1,%a3,(%a2)+&,%d1,%acc1 + mac.l %a1,%a3,(%a2)+&,%d1,%acc2 + mac.l %a1,%a3,(%a2)+&,%a3,%acc1 + mac.l %a1,%a3,(%a2)+&,%a3,%acc2 + mac.l %a1,%a3,(%a2)+&,%d2,%acc1 + mac.l %a1,%a3,(%a2)+&,%d2,%acc2 + mac.l %a1,%a3,(%a2)+&,%a7,%acc1 + mac.l %a1,%a3,(%a2)+&,%a7,%acc2 + mac.l %a1,%a3,10(%a6),%d1,%acc1 + mac.l %a1,%a3,10(%a6),%d1,%acc2 + mac.l %a1,%a3,10(%a6),%a3,%acc1 + mac.l %a1,%a3,10(%a6),%a3,%acc2 + mac.l %a1,%a3,10(%a6),%d2,%acc1 + mac.l %a1,%a3,10(%a6),%d2,%acc2 + mac.l %a1,%a3,10(%a6),%a7,%acc1 + mac.l %a1,%a3,10(%a6),%a7,%acc2 + mac.l %a1,%a3,10(%a6)&,%d1,%acc1 + mac.l %a1,%a3,10(%a6)&,%d1,%acc2 + mac.l %a1,%a3,10(%a6)&,%a3,%acc1 + mac.l %a1,%a3,10(%a6)&,%a3,%acc2 + mac.l %a1,%a3,10(%a6)&,%d2,%acc1 + mac.l %a1,%a3,10(%a6)&,%d2,%acc2 + mac.l %a1,%a3,10(%a6)&,%a7,%acc1 + mac.l %a1,%a3,10(%a6)&,%a7,%acc2 + mac.l %a1,%a3,-(%a1),%d1,%acc1 + mac.l %a1,%a3,-(%a1),%d1,%acc2 + mac.l %a1,%a3,-(%a1),%a3,%acc1 + mac.l %a1,%a3,-(%a1),%a3,%acc2 + mac.l %a1,%a3,-(%a1),%d2,%acc1 + mac.l %a1,%a3,-(%a1),%d2,%acc2 + mac.l %a1,%a3,-(%a1),%a7,%acc1 + mac.l %a1,%a3,-(%a1),%a7,%acc2 + mac.l %a1,%a3,-(%a1)&,%d1,%acc1 + mac.l %a1,%a3,-(%a1)&,%d1,%acc2 + mac.l %a1,%a3,-(%a1)&,%a3,%acc1 + mac.l %a1,%a3,-(%a1)&,%a3,%acc2 + mac.l %a1,%a3,-(%a1)&,%d2,%acc1 + mac.l %a1,%a3,-(%a1)&,%d2,%acc2 + mac.l %a1,%a3,-(%a1)&,%a7,%acc1 + mac.l %a1,%a3,-(%a1)&,%a7,%acc2 + mac.l %a1,%a3,<<,(%a3),%d1,%acc1 + mac.l %a1,%a3,<<,(%a3),%d1,%acc2 + mac.l %a1,%a3,<<,(%a3),%a3,%acc1 + mac.l %a1,%a3,<<,(%a3),%a3,%acc2 + mac.l %a1,%a3,<<,(%a3),%d2,%acc1 + mac.l %a1,%a3,<<,(%a3),%d2,%acc2 + mac.l %a1,%a3,<<,(%a3),%a7,%acc1 + mac.l %a1,%a3,<<,(%a3),%a7,%acc2 + mac.l %a1,%a3,<<,(%a3)&,%d1,%acc1 + mac.l %a1,%a3,<<,(%a3)&,%d1,%acc2 + mac.l %a1,%a3,<<,(%a3)&,%a3,%acc1 + mac.l %a1,%a3,<<,(%a3)&,%a3,%acc2 + mac.l %a1,%a3,<<,(%a3)&,%d2,%acc1 + mac.l %a1,%a3,<<,(%a3)&,%d2,%acc2 + mac.l %a1,%a3,<<,(%a3)&,%a7,%acc1 + mac.l %a1,%a3,<<,(%a3)&,%a7,%acc2 + mac.l %a1,%a3,<<,(%a2)+,%d1,%acc1 + mac.l %a1,%a3,<<,(%a2)+,%d1,%acc2 + mac.l %a1,%a3,<<,(%a2)+,%a3,%acc1 + mac.l %a1,%a3,<<,(%a2)+,%a3,%acc2 + mac.l %a1,%a3,<<,(%a2)+,%d2,%acc1 + mac.l %a1,%a3,<<,(%a2)+,%d2,%acc2 + mac.l %a1,%a3,<<,(%a2)+,%a7,%acc1 + mac.l %a1,%a3,<<,(%a2)+,%a7,%acc2 + mac.l %a1,%a3,<<,(%a2)+&,%d1,%acc1 + mac.l %a1,%a3,<<,(%a2)+&,%d1,%acc2 + mac.l %a1,%a3,<<,(%a2)+&,%a3,%acc1 + mac.l %a1,%a3,<<,(%a2)+&,%a3,%acc2 + mac.l %a1,%a3,<<,(%a2)+&,%d2,%acc1 + mac.l %a1,%a3,<<,(%a2)+&,%d2,%acc2 + mac.l %a1,%a3,<<,(%a2)+&,%a7,%acc1 + mac.l %a1,%a3,<<,(%a2)+&,%a7,%acc2 + mac.l %a1,%a3,<<,10(%a6),%d1,%acc1 + mac.l %a1,%a3,<<,10(%a6),%d1,%acc2 + mac.l %a1,%a3,<<,10(%a6),%a3,%acc1 + mac.l %a1,%a3,<<,10(%a6),%a3,%acc2 + mac.l %a1,%a3,<<,10(%a6),%d2,%acc1 + mac.l %a1,%a3,<<,10(%a6),%d2,%acc2 + mac.l %a1,%a3,<<,10(%a6),%a7,%acc1 + mac.l %a1,%a3,<<,10(%a6),%a7,%acc2 + mac.l %a1,%a3,<<,10(%a6)&,%d1,%acc1 + mac.l %a1,%a3,<<,10(%a6)&,%d1,%acc2 + mac.l %a1,%a3,<<,10(%a6)&,%a3,%acc1 + mac.l %a1,%a3,<<,10(%a6)&,%a3,%acc2 + mac.l %a1,%a3,<<,10(%a6)&,%d2,%acc1 + mac.l %a1,%a3,<<,10(%a6)&,%d2,%acc2 + mac.l %a1,%a3,<<,10(%a6)&,%a7,%acc1 + mac.l %a1,%a3,<<,10(%a6)&,%a7,%acc2 + mac.l %a1,%a3,<<,-(%a1),%d1,%acc1 + mac.l %a1,%a3,<<,-(%a1),%d1,%acc2 + mac.l %a1,%a3,<<,-(%a1),%a3,%acc1 + mac.l %a1,%a3,<<,-(%a1),%a3,%acc2 + mac.l %a1,%a3,<<,-(%a1),%d2,%acc1 + mac.l %a1,%a3,<<,-(%a1),%d2,%acc2 + mac.l %a1,%a3,<<,-(%a1),%a7,%acc1 + mac.l %a1,%a3,<<,-(%a1),%a7,%acc2 + mac.l %a1,%a3,<<,-(%a1)&,%d1,%acc1 + mac.l %a1,%a3,<<,-(%a1)&,%d1,%acc2 + mac.l %a1,%a3,<<,-(%a1)&,%a3,%acc1 + mac.l %a1,%a3,<<,-(%a1)&,%a3,%acc2 + mac.l %a1,%a3,<<,-(%a1)&,%d2,%acc1 + mac.l %a1,%a3,<<,-(%a1)&,%d2,%acc2 + mac.l %a1,%a3,<<,-(%a1)&,%a7,%acc1 + mac.l %a1,%a3,<<,-(%a1)&,%a7,%acc2 + mac.l %a1,%a3,>>,(%a3),%d1,%acc1 + mac.l %a1,%a3,>>,(%a3),%d1,%acc2 + mac.l %a1,%a3,>>,(%a3),%a3,%acc1 + mac.l %a1,%a3,>>,(%a3),%a3,%acc2 + mac.l %a1,%a3,>>,(%a3),%d2,%acc1 + mac.l %a1,%a3,>>,(%a3),%d2,%acc2 + mac.l %a1,%a3,>>,(%a3),%a7,%acc1 + mac.l %a1,%a3,>>,(%a3),%a7,%acc2 + mac.l %a1,%a3,>>,(%a3)&,%d1,%acc1 + mac.l %a1,%a3,>>,(%a3)&,%d1,%acc2 + mac.l %a1,%a3,>>,(%a3)&,%a3,%acc1 + mac.l %a1,%a3,>>,(%a3)&,%a3,%acc2 + mac.l %a1,%a3,>>,(%a3)&,%d2,%acc1 + mac.l %a1,%a3,>>,(%a3)&,%d2,%acc2 + mac.l %a1,%a3,>>,(%a3)&,%a7,%acc1 + mac.l %a1,%a3,>>,(%a3)&,%a7,%acc2 + mac.l %a1,%a3,>>,(%a2)+,%d1,%acc1 + mac.l %a1,%a3,>>,(%a2)+,%d1,%acc2 + mac.l %a1,%a3,>>,(%a2)+,%a3,%acc1 + mac.l %a1,%a3,>>,(%a2)+,%a3,%acc2 + mac.l %a1,%a3,>>,(%a2)+,%d2,%acc1 + mac.l %a1,%a3,>>,(%a2)+,%d2,%acc2 + mac.l %a1,%a3,>>,(%a2)+,%a7,%acc1 + mac.l %a1,%a3,>>,(%a2)+,%a7,%acc2 + mac.l %a1,%a3,>>,(%a2)+&,%d1,%acc1 + mac.l %a1,%a3,>>,(%a2)+&,%d1,%acc2 + mac.l %a1,%a3,>>,(%a2)+&,%a3,%acc1 + mac.l %a1,%a3,>>,(%a2)+&,%a3,%acc2 + mac.l %a1,%a3,>>,(%a2)+&,%d2,%acc1 + mac.l %a1,%a3,>>,(%a2)+&,%d2,%acc2 + mac.l %a1,%a3,>>,(%a2)+&,%a7,%acc1 + mac.l %a1,%a3,>>,(%a2)+&,%a7,%acc2 + mac.l %a1,%a3,>>,10(%a6),%d1,%acc1 + mac.l %a1,%a3,>>,10(%a6),%d1,%acc2 + mac.l %a1,%a3,>>,10(%a6),%a3,%acc1 + mac.l %a1,%a3,>>,10(%a6),%a3,%acc2 + mac.l %a1,%a3,>>,10(%a6),%d2,%acc1 + mac.l %a1,%a3,>>,10(%a6),%d2,%acc2 + mac.l %a1,%a3,>>,10(%a6),%a7,%acc1 + mac.l %a1,%a3,>>,10(%a6),%a7,%acc2 + mac.l %a1,%a3,>>,10(%a6)&,%d1,%acc1 + mac.l %a1,%a3,>>,10(%a6)&,%d1,%acc2 + mac.l %a1,%a3,>>,10(%a6)&,%a3,%acc1 + mac.l %a1,%a3,>>,10(%a6)&,%a3,%acc2 + mac.l %a1,%a3,>>,10(%a6)&,%d2,%acc1 + mac.l %a1,%a3,>>,10(%a6)&,%d2,%acc2 + mac.l %a1,%a3,>>,10(%a6)&,%a7,%acc1 + mac.l %a1,%a3,>>,10(%a6)&,%a7,%acc2 + mac.l %a1,%a3,>>,-(%a1),%d1,%acc1 + mac.l %a1,%a3,>>,-(%a1),%d1,%acc2 + mac.l %a1,%a3,>>,-(%a1),%a3,%acc1 + mac.l %a1,%a3,>>,-(%a1),%a3,%acc2 + mac.l %a1,%a3,>>,-(%a1),%d2,%acc1 + mac.l %a1,%a3,>>,-(%a1),%d2,%acc2 + mac.l %a1,%a3,>>,-(%a1),%a7,%acc1 + mac.l %a1,%a3,>>,-(%a1),%a7,%acc2 + mac.l %a1,%a3,>>,-(%a1)&,%d1,%acc1 + mac.l %a1,%a3,>>,-(%a1)&,%d1,%acc2 + mac.l %a1,%a3,>>,-(%a1)&,%a3,%acc1 + mac.l %a1,%a3,>>,-(%a1)&,%a3,%acc2 + mac.l %a1,%a3,>>,-(%a1)&,%d2,%acc1 + mac.l %a1,%a3,>>,-(%a1)&,%d2,%acc2 + mac.l %a1,%a3,>>,-(%a1)&,%a7,%acc1 + mac.l %a1,%a3,>>,-(%a1)&,%a7,%acc2 + mac.l %a1,%a3,#1,(%a3),%d1,%acc1 + mac.l %a1,%a3,#1,(%a3),%d1,%acc2 + mac.l %a1,%a3,#1,(%a3),%a3,%acc1 + mac.l %a1,%a3,#1,(%a3),%a3,%acc2 + mac.l %a1,%a3,#1,(%a3),%d2,%acc1 + mac.l %a1,%a3,#1,(%a3),%d2,%acc2 + mac.l %a1,%a3,#1,(%a3),%a7,%acc1 + mac.l %a1,%a3,#1,(%a3),%a7,%acc2 + mac.l %a1,%a3,#1,(%a3)&,%d1,%acc1 + mac.l %a1,%a3,#1,(%a3)&,%d1,%acc2 + mac.l %a1,%a3,#1,(%a3)&,%a3,%acc1 + mac.l %a1,%a3,#1,(%a3)&,%a3,%acc2 + mac.l %a1,%a3,#1,(%a3)&,%d2,%acc1 + mac.l %a1,%a3,#1,(%a3)&,%d2,%acc2 + mac.l %a1,%a3,#1,(%a3)&,%a7,%acc1 + mac.l %a1,%a3,#1,(%a3)&,%a7,%acc2 + mac.l %a1,%a3,#1,(%a2)+,%d1,%acc1 + mac.l %a1,%a3,#1,(%a2)+,%d1,%acc2 + mac.l %a1,%a3,#1,(%a2)+,%a3,%acc1 + mac.l %a1,%a3,#1,(%a2)+,%a3,%acc2 + mac.l %a1,%a3,#1,(%a2)+,%d2,%acc1 + mac.l %a1,%a3,#1,(%a2)+,%d2,%acc2 + mac.l %a1,%a3,#1,(%a2)+,%a7,%acc1 + mac.l %a1,%a3,#1,(%a2)+,%a7,%acc2 + mac.l %a1,%a3,#1,(%a2)+&,%d1,%acc1 + mac.l %a1,%a3,#1,(%a2)+&,%d1,%acc2 + mac.l %a1,%a3,#1,(%a2)+&,%a3,%acc1 + mac.l %a1,%a3,#1,(%a2)+&,%a3,%acc2 + mac.l %a1,%a3,#1,(%a2)+&,%d2,%acc1 + mac.l %a1,%a3,#1,(%a2)+&,%d2,%acc2 + mac.l %a1,%a3,#1,(%a2)+&,%a7,%acc1 + mac.l %a1,%a3,#1,(%a2)+&,%a7,%acc2 + mac.l %a1,%a3,#1,10(%a6),%d1,%acc1 + mac.l %a1,%a3,#1,10(%a6),%d1,%acc2 + mac.l %a1,%a3,#1,10(%a6),%a3,%acc1 + mac.l %a1,%a3,#1,10(%a6),%a3,%acc2 + mac.l %a1,%a3,#1,10(%a6),%d2,%acc1 + mac.l %a1,%a3,#1,10(%a6),%d2,%acc2 + mac.l %a1,%a3,#1,10(%a6),%a7,%acc1 + mac.l %a1,%a3,#1,10(%a6),%a7,%acc2 + mac.l %a1,%a3,#1,10(%a6)&,%d1,%acc1 + mac.l %a1,%a3,#1,10(%a6)&,%d1,%acc2 + mac.l %a1,%a3,#1,10(%a6)&,%a3,%acc1 + mac.l %a1,%a3,#1,10(%a6)&,%a3,%acc2 + mac.l %a1,%a3,#1,10(%a6)&,%d2,%acc1 + mac.l %a1,%a3,#1,10(%a6)&,%d2,%acc2 + mac.l %a1,%a3,#1,10(%a6)&,%a7,%acc1 + mac.l %a1,%a3,#1,10(%a6)&,%a7,%acc2 + mac.l %a1,%a3,#1,-(%a1),%d1,%acc1 + mac.l %a1,%a3,#1,-(%a1),%d1,%acc2 + mac.l %a1,%a3,#1,-(%a1),%a3,%acc1 + mac.l %a1,%a3,#1,-(%a1),%a3,%acc2 + mac.l %a1,%a3,#1,-(%a1),%d2,%acc1 + mac.l %a1,%a3,#1,-(%a1),%d2,%acc2 + mac.l %a1,%a3,#1,-(%a1),%a7,%acc1 + mac.l %a1,%a3,#1,-(%a1),%a7,%acc2 + mac.l %a1,%a3,#1,-(%a1)&,%d1,%acc1 + mac.l %a1,%a3,#1,-(%a1)&,%d1,%acc2 + mac.l %a1,%a3,#1,-(%a1)&,%a3,%acc1 + mac.l %a1,%a3,#1,-(%a1)&,%a3,%acc2 + mac.l %a1,%a3,#1,-(%a1)&,%d2,%acc1 + mac.l %a1,%a3,#1,-(%a1)&,%d2,%acc2 + mac.l %a1,%a3,#1,-(%a1)&,%a7,%acc1 + mac.l %a1,%a3,#1,-(%a1)&,%a7,%acc2 + mac.l %a1,%a3,#-1,(%a3),%d1,%acc1 + mac.l %a1,%a3,#-1,(%a3),%d1,%acc2 + mac.l %a1,%a3,#-1,(%a3),%a3,%acc1 + mac.l %a1,%a3,#-1,(%a3),%a3,%acc2 + mac.l %a1,%a3,#-1,(%a3),%d2,%acc1 + mac.l %a1,%a3,#-1,(%a3),%d2,%acc2 + mac.l %a1,%a3,#-1,(%a3),%a7,%acc1 + mac.l %a1,%a3,#-1,(%a3),%a7,%acc2 + mac.l %a1,%a3,#-1,(%a3)&,%d1,%acc1 + mac.l %a1,%a3,#-1,(%a3)&,%d1,%acc2 + mac.l %a1,%a3,#-1,(%a3)&,%a3,%acc1 + mac.l %a1,%a3,#-1,(%a3)&,%a3,%acc2 + mac.l %a1,%a3,#-1,(%a3)&,%d2,%acc1 + mac.l %a1,%a3,#-1,(%a3)&,%d2,%acc2 + mac.l %a1,%a3,#-1,(%a3)&,%a7,%acc1 + mac.l %a1,%a3,#-1,(%a3)&,%a7,%acc2 + mac.l %a1,%a3,#-1,(%a2)+,%d1,%acc1 + mac.l %a1,%a3,#-1,(%a2)+,%d1,%acc2 + mac.l %a1,%a3,#-1,(%a2)+,%a3,%acc1 + mac.l %a1,%a3,#-1,(%a2)+,%a3,%acc2 + mac.l %a1,%a3,#-1,(%a2)+,%d2,%acc1 + mac.l %a1,%a3,#-1,(%a2)+,%d2,%acc2 + mac.l %a1,%a3,#-1,(%a2)+,%a7,%acc1 + mac.l %a1,%a3,#-1,(%a2)+,%a7,%acc2 + mac.l %a1,%a3,#-1,(%a2)+&,%d1,%acc1 + mac.l %a1,%a3,#-1,(%a2)+&,%d1,%acc2 + mac.l %a1,%a3,#-1,(%a2)+&,%a3,%acc1 + mac.l %a1,%a3,#-1,(%a2)+&,%a3,%acc2 + mac.l %a1,%a3,#-1,(%a2)+&,%d2,%acc1 + mac.l %a1,%a3,#-1,(%a2)+&,%d2,%acc2 + mac.l %a1,%a3,#-1,(%a2)+&,%a7,%acc1 + mac.l %a1,%a3,#-1,(%a2)+&,%a7,%acc2 + mac.l %a1,%a3,#-1,10(%a6),%d1,%acc1 + mac.l %a1,%a3,#-1,10(%a6),%d1,%acc2 + mac.l %a1,%a3,#-1,10(%a6),%a3,%acc1 + mac.l %a1,%a3,#-1,10(%a6),%a3,%acc2 + mac.l %a1,%a3,#-1,10(%a6),%d2,%acc1 + mac.l %a1,%a3,#-1,10(%a6),%d2,%acc2 + mac.l %a1,%a3,#-1,10(%a6),%a7,%acc1 + mac.l %a1,%a3,#-1,10(%a6),%a7,%acc2 + mac.l %a1,%a3,#-1,10(%a6)&,%d1,%acc1 + mac.l %a1,%a3,#-1,10(%a6)&,%d1,%acc2 + mac.l %a1,%a3,#-1,10(%a6)&,%a3,%acc1 + mac.l %a1,%a3,#-1,10(%a6)&,%a3,%acc2 + mac.l %a1,%a3,#-1,10(%a6)&,%d2,%acc1 + mac.l %a1,%a3,#-1,10(%a6)&,%d2,%acc2 + mac.l %a1,%a3,#-1,10(%a6)&,%a7,%acc1 + mac.l %a1,%a3,#-1,10(%a6)&,%a7,%acc2 + mac.l %a1,%a3,#-1,-(%a1),%d1,%acc1 + mac.l %a1,%a3,#-1,-(%a1),%d1,%acc2 + mac.l %a1,%a3,#-1,-(%a1),%a3,%acc1 + mac.l %a1,%a3,#-1,-(%a1),%a3,%acc2 + mac.l %a1,%a3,#-1,-(%a1),%d2,%acc1 + mac.l %a1,%a3,#-1,-(%a1),%d2,%acc2 + mac.l %a1,%a3,#-1,-(%a1),%a7,%acc1 + mac.l %a1,%a3,#-1,-(%a1),%a7,%acc2 + mac.l %a1,%a3,#-1,-(%a1)&,%d1,%acc1 + mac.l %a1,%a3,#-1,-(%a1)&,%d1,%acc2 + mac.l %a1,%a3,#-1,-(%a1)&,%a3,%acc1 + mac.l %a1,%a3,#-1,-(%a1)&,%a3,%acc2 + mac.l %a1,%a3,#-1,-(%a1)&,%d2,%acc1 + mac.l %a1,%a3,#-1,-(%a1)&,%d2,%acc2 + mac.l %a1,%a3,#-1,-(%a1)&,%a7,%acc1 + mac.l %a1,%a3,#-1,-(%a1)&,%a7,%acc2 + mac.l %a1,%d4,(%a3),%d1,%acc1 + mac.l %a1,%d4,(%a3),%d1,%acc2 + mac.l %a1,%d4,(%a3),%a3,%acc1 + mac.l %a1,%d4,(%a3),%a3,%acc2 + mac.l %a1,%d4,(%a3),%d2,%acc1 + mac.l %a1,%d4,(%a3),%d2,%acc2 + mac.l %a1,%d4,(%a3),%a7,%acc1 + mac.l %a1,%d4,(%a3),%a7,%acc2 + mac.l %a1,%d4,(%a3)&,%d1,%acc1 + mac.l %a1,%d4,(%a3)&,%d1,%acc2 + mac.l %a1,%d4,(%a3)&,%a3,%acc1 + mac.l %a1,%d4,(%a3)&,%a3,%acc2 + mac.l %a1,%d4,(%a3)&,%d2,%acc1 + mac.l %a1,%d4,(%a3)&,%d2,%acc2 + mac.l %a1,%d4,(%a3)&,%a7,%acc1 + mac.l %a1,%d4,(%a3)&,%a7,%acc2 + mac.l %a1,%d4,(%a2)+,%d1,%acc1 + mac.l %a1,%d4,(%a2)+,%d1,%acc2 + mac.l %a1,%d4,(%a2)+,%a3,%acc1 + mac.l %a1,%d4,(%a2)+,%a3,%acc2 + mac.l %a1,%d4,(%a2)+,%d2,%acc1 + mac.l %a1,%d4,(%a2)+,%d2,%acc2 + mac.l %a1,%d4,(%a2)+,%a7,%acc1 + mac.l %a1,%d4,(%a2)+,%a7,%acc2 + mac.l %a1,%d4,(%a2)+&,%d1,%acc1 + mac.l %a1,%d4,(%a2)+&,%d1,%acc2 + mac.l %a1,%d4,(%a2)+&,%a3,%acc1 + mac.l %a1,%d4,(%a2)+&,%a3,%acc2 + mac.l %a1,%d4,(%a2)+&,%d2,%acc1 + mac.l %a1,%d4,(%a2)+&,%d2,%acc2 + mac.l %a1,%d4,(%a2)+&,%a7,%acc1 + mac.l %a1,%d4,(%a2)+&,%a7,%acc2 + mac.l %a1,%d4,10(%a6),%d1,%acc1 + mac.l %a1,%d4,10(%a6),%d1,%acc2 + mac.l %a1,%d4,10(%a6),%a3,%acc1 + mac.l %a1,%d4,10(%a6),%a3,%acc2 + mac.l %a1,%d4,10(%a6),%d2,%acc1 + mac.l %a1,%d4,10(%a6),%d2,%acc2 + mac.l %a1,%d4,10(%a6),%a7,%acc1 + mac.l %a1,%d4,10(%a6),%a7,%acc2 + mac.l %a1,%d4,10(%a6)&,%d1,%acc1 + mac.l %a1,%d4,10(%a6)&,%d1,%acc2 + mac.l %a1,%d4,10(%a6)&,%a3,%acc1 + mac.l %a1,%d4,10(%a6)&,%a3,%acc2 + mac.l %a1,%d4,10(%a6)&,%d2,%acc1 + mac.l %a1,%d4,10(%a6)&,%d2,%acc2 + mac.l %a1,%d4,10(%a6)&,%a7,%acc1 + mac.l %a1,%d4,10(%a6)&,%a7,%acc2 + mac.l %a1,%d4,-(%a1),%d1,%acc1 + mac.l %a1,%d4,-(%a1),%d1,%acc2 + mac.l %a1,%d4,-(%a1),%a3,%acc1 + mac.l %a1,%d4,-(%a1),%a3,%acc2 + mac.l %a1,%d4,-(%a1),%d2,%acc1 + mac.l %a1,%d4,-(%a1),%d2,%acc2 + mac.l %a1,%d4,-(%a1),%a7,%acc1 + mac.l %a1,%d4,-(%a1),%a7,%acc2 + mac.l %a1,%d4,-(%a1)&,%d1,%acc1 + mac.l %a1,%d4,-(%a1)&,%d1,%acc2 + mac.l %a1,%d4,-(%a1)&,%a3,%acc1 + mac.l %a1,%d4,-(%a1)&,%a3,%acc2 + mac.l %a1,%d4,-(%a1)&,%d2,%acc1 + mac.l %a1,%d4,-(%a1)&,%d2,%acc2 + mac.l %a1,%d4,-(%a1)&,%a7,%acc1 + mac.l %a1,%d4,-(%a1)&,%a7,%acc2 + mac.l %a1,%d4,<<,(%a3),%d1,%acc1 + mac.l %a1,%d4,<<,(%a3),%d1,%acc2 + mac.l %a1,%d4,<<,(%a3),%a3,%acc1 + mac.l %a1,%d4,<<,(%a3),%a3,%acc2 + mac.l %a1,%d4,<<,(%a3),%d2,%acc1 + mac.l %a1,%d4,<<,(%a3),%d2,%acc2 + mac.l %a1,%d4,<<,(%a3),%a7,%acc1 + mac.l %a1,%d4,<<,(%a3),%a7,%acc2 + mac.l %a1,%d4,<<,(%a3)&,%d1,%acc1 + mac.l %a1,%d4,<<,(%a3)&,%d1,%acc2 + mac.l %a1,%d4,<<,(%a3)&,%a3,%acc1 + mac.l %a1,%d4,<<,(%a3)&,%a3,%acc2 + mac.l %a1,%d4,<<,(%a3)&,%d2,%acc1 + mac.l %a1,%d4,<<,(%a3)&,%d2,%acc2 + mac.l %a1,%d4,<<,(%a3)&,%a7,%acc1 + mac.l %a1,%d4,<<,(%a3)&,%a7,%acc2 + mac.l %a1,%d4,<<,(%a2)+,%d1,%acc1 + mac.l %a1,%d4,<<,(%a2)+,%d1,%acc2 + mac.l %a1,%d4,<<,(%a2)+,%a3,%acc1 + mac.l %a1,%d4,<<,(%a2)+,%a3,%acc2 + mac.l %a1,%d4,<<,(%a2)+,%d2,%acc1 + mac.l %a1,%d4,<<,(%a2)+,%d2,%acc2 + mac.l %a1,%d4,<<,(%a2)+,%a7,%acc1 + mac.l %a1,%d4,<<,(%a2)+,%a7,%acc2 + mac.l %a1,%d4,<<,(%a2)+&,%d1,%acc1 + mac.l %a1,%d4,<<,(%a2)+&,%d1,%acc2 + mac.l %a1,%d4,<<,(%a2)+&,%a3,%acc1 + mac.l %a1,%d4,<<,(%a2)+&,%a3,%acc2 + mac.l %a1,%d4,<<,(%a2)+&,%d2,%acc1 + mac.l %a1,%d4,<<,(%a2)+&,%d2,%acc2 + mac.l %a1,%d4,<<,(%a2)+&,%a7,%acc1 + mac.l %a1,%d4,<<,(%a2)+&,%a7,%acc2 + mac.l %a1,%d4,<<,10(%a6),%d1,%acc1 + mac.l %a1,%d4,<<,10(%a6),%d1,%acc2 + mac.l %a1,%d4,<<,10(%a6),%a3,%acc1 + mac.l %a1,%d4,<<,10(%a6),%a3,%acc2 + mac.l %a1,%d4,<<,10(%a6),%d2,%acc1 + mac.l %a1,%d4,<<,10(%a6),%d2,%acc2 + mac.l %a1,%d4,<<,10(%a6),%a7,%acc1 + mac.l %a1,%d4,<<,10(%a6),%a7,%acc2 + mac.l %a1,%d4,<<,10(%a6)&,%d1,%acc1 + mac.l %a1,%d4,<<,10(%a6)&,%d1,%acc2 + mac.l %a1,%d4,<<,10(%a6)&,%a3,%acc1 + mac.l %a1,%d4,<<,10(%a6)&,%a3,%acc2 + mac.l %a1,%d4,<<,10(%a6)&,%d2,%acc1 + mac.l %a1,%d4,<<,10(%a6)&,%d2,%acc2 + mac.l %a1,%d4,<<,10(%a6)&,%a7,%acc1 + mac.l %a1,%d4,<<,10(%a6)&,%a7,%acc2 + mac.l %a1,%d4,<<,-(%a1),%d1,%acc1 + mac.l %a1,%d4,<<,-(%a1),%d1,%acc2 + mac.l %a1,%d4,<<,-(%a1),%a3,%acc1 + mac.l %a1,%d4,<<,-(%a1),%a3,%acc2 + mac.l %a1,%d4,<<,-(%a1),%d2,%acc1 + mac.l %a1,%d4,<<,-(%a1),%d2,%acc2 + mac.l %a1,%d4,<<,-(%a1),%a7,%acc1 + mac.l %a1,%d4,<<,-(%a1),%a7,%acc2 + mac.l %a1,%d4,<<,-(%a1)&,%d1,%acc1 + mac.l %a1,%d4,<<,-(%a1)&,%d1,%acc2 + mac.l %a1,%d4,<<,-(%a1)&,%a3,%acc1 + mac.l %a1,%d4,<<,-(%a1)&,%a3,%acc2 + mac.l %a1,%d4,<<,-(%a1)&,%d2,%acc1 + mac.l %a1,%d4,<<,-(%a1)&,%d2,%acc2 + mac.l %a1,%d4,<<,-(%a1)&,%a7,%acc1 + mac.l %a1,%d4,<<,-(%a1)&,%a7,%acc2 + mac.l %a1,%d4,>>,(%a3),%d1,%acc1 + mac.l %a1,%d4,>>,(%a3),%d1,%acc2 + mac.l %a1,%d4,>>,(%a3),%a3,%acc1 + mac.l %a1,%d4,>>,(%a3),%a3,%acc2 + mac.l %a1,%d4,>>,(%a3),%d2,%acc1 + mac.l %a1,%d4,>>,(%a3),%d2,%acc2 + mac.l %a1,%d4,>>,(%a3),%a7,%acc1 + mac.l %a1,%d4,>>,(%a3),%a7,%acc2 + mac.l %a1,%d4,>>,(%a3)&,%d1,%acc1 + mac.l %a1,%d4,>>,(%a3)&,%d1,%acc2 + mac.l %a1,%d4,>>,(%a3)&,%a3,%acc1 + mac.l %a1,%d4,>>,(%a3)&,%a3,%acc2 + mac.l %a1,%d4,>>,(%a3)&,%d2,%acc1 + mac.l %a1,%d4,>>,(%a3)&,%d2,%acc2 + mac.l %a1,%d4,>>,(%a3)&,%a7,%acc1 + mac.l %a1,%d4,>>,(%a3)&,%a7,%acc2 + mac.l %a1,%d4,>>,(%a2)+,%d1,%acc1 + mac.l %a1,%d4,>>,(%a2)+,%d1,%acc2 + mac.l %a1,%d4,>>,(%a2)+,%a3,%acc1 + mac.l %a1,%d4,>>,(%a2)+,%a3,%acc2 + mac.l %a1,%d4,>>,(%a2)+,%d2,%acc1 + mac.l %a1,%d4,>>,(%a2)+,%d2,%acc2 + mac.l %a1,%d4,>>,(%a2)+,%a7,%acc1 + mac.l %a1,%d4,>>,(%a2)+,%a7,%acc2 + mac.l %a1,%d4,>>,(%a2)+&,%d1,%acc1 + mac.l %a1,%d4,>>,(%a2)+&,%d1,%acc2 + mac.l %a1,%d4,>>,(%a2)+&,%a3,%acc1 + mac.l %a1,%d4,>>,(%a2)+&,%a3,%acc2 + mac.l %a1,%d4,>>,(%a2)+&,%d2,%acc1 + mac.l %a1,%d4,>>,(%a2)+&,%d2,%acc2 + mac.l %a1,%d4,>>,(%a2)+&,%a7,%acc1 + mac.l %a1,%d4,>>,(%a2)+&,%a7,%acc2 + mac.l %a1,%d4,>>,10(%a6),%d1,%acc1 + mac.l %a1,%d4,>>,10(%a6),%d1,%acc2 + mac.l %a1,%d4,>>,10(%a6),%a3,%acc1 + mac.l %a1,%d4,>>,10(%a6),%a3,%acc2 + mac.l %a1,%d4,>>,10(%a6),%d2,%acc1 + mac.l %a1,%d4,>>,10(%a6),%d2,%acc2 + mac.l %a1,%d4,>>,10(%a6),%a7,%acc1 + mac.l %a1,%d4,>>,10(%a6),%a7,%acc2 + mac.l %a1,%d4,>>,10(%a6)&,%d1,%acc1 + mac.l %a1,%d4,>>,10(%a6)&,%d1,%acc2 + mac.l %a1,%d4,>>,10(%a6)&,%a3,%acc1 + mac.l %a1,%d4,>>,10(%a6)&,%a3,%acc2 + mac.l %a1,%d4,>>,10(%a6)&,%d2,%acc1 + mac.l %a1,%d4,>>,10(%a6)&,%d2,%acc2 + mac.l %a1,%d4,>>,10(%a6)&,%a7,%acc1 + mac.l %a1,%d4,>>,10(%a6)&,%a7,%acc2 + mac.l %a1,%d4,>>,-(%a1),%d1,%acc1 + mac.l %a1,%d4,>>,-(%a1),%d1,%acc2 + mac.l %a1,%d4,>>,-(%a1),%a3,%acc1 + mac.l %a1,%d4,>>,-(%a1),%a3,%acc2 + mac.l %a1,%d4,>>,-(%a1),%d2,%acc1 + mac.l %a1,%d4,>>,-(%a1),%d2,%acc2 + mac.l %a1,%d4,>>,-(%a1),%a7,%acc1 + mac.l %a1,%d4,>>,-(%a1),%a7,%acc2 + mac.l %a1,%d4,>>,-(%a1)&,%d1,%acc1 + mac.l %a1,%d4,>>,-(%a1)&,%d1,%acc2 + mac.l %a1,%d4,>>,-(%a1)&,%a3,%acc1 + mac.l %a1,%d4,>>,-(%a1)&,%a3,%acc2 + mac.l %a1,%d4,>>,-(%a1)&,%d2,%acc1 + mac.l %a1,%d4,>>,-(%a1)&,%d2,%acc2 + mac.l %a1,%d4,>>,-(%a1)&,%a7,%acc1 + mac.l %a1,%d4,>>,-(%a1)&,%a7,%acc2 + mac.l %a1,%d4,#1,(%a3),%d1,%acc1 + mac.l %a1,%d4,#1,(%a3),%d1,%acc2 + mac.l %a1,%d4,#1,(%a3),%a3,%acc1 + mac.l %a1,%d4,#1,(%a3),%a3,%acc2 + mac.l %a1,%d4,#1,(%a3),%d2,%acc1 + mac.l %a1,%d4,#1,(%a3),%d2,%acc2 + mac.l %a1,%d4,#1,(%a3),%a7,%acc1 + mac.l %a1,%d4,#1,(%a3),%a7,%acc2 + mac.l %a1,%d4,#1,(%a3)&,%d1,%acc1 + mac.l %a1,%d4,#1,(%a3)&,%d1,%acc2 + mac.l %a1,%d4,#1,(%a3)&,%a3,%acc1 + mac.l %a1,%d4,#1,(%a3)&,%a3,%acc2 + mac.l %a1,%d4,#1,(%a3)&,%d2,%acc1 + mac.l %a1,%d4,#1,(%a3)&,%d2,%acc2 + mac.l %a1,%d4,#1,(%a3)&,%a7,%acc1 + mac.l %a1,%d4,#1,(%a3)&,%a7,%acc2 + mac.l %a1,%d4,#1,(%a2)+,%d1,%acc1 + mac.l %a1,%d4,#1,(%a2)+,%d1,%acc2 + mac.l %a1,%d4,#1,(%a2)+,%a3,%acc1 + mac.l %a1,%d4,#1,(%a2)+,%a3,%acc2 + mac.l %a1,%d4,#1,(%a2)+,%d2,%acc1 + mac.l %a1,%d4,#1,(%a2)+,%d2,%acc2 + mac.l %a1,%d4,#1,(%a2)+,%a7,%acc1 + mac.l %a1,%d4,#1,(%a2)+,%a7,%acc2 + mac.l %a1,%d4,#1,(%a2)+&,%d1,%acc1 + mac.l %a1,%d4,#1,(%a2)+&,%d1,%acc2 + mac.l %a1,%d4,#1,(%a2)+&,%a3,%acc1 + mac.l %a1,%d4,#1,(%a2)+&,%a3,%acc2 + mac.l %a1,%d4,#1,(%a2)+&,%d2,%acc1 + mac.l %a1,%d4,#1,(%a2)+&,%d2,%acc2 + mac.l %a1,%d4,#1,(%a2)+&,%a7,%acc1 + mac.l %a1,%d4,#1,(%a2)+&,%a7,%acc2 + mac.l %a1,%d4,#1,10(%a6),%d1,%acc1 + mac.l %a1,%d4,#1,10(%a6),%d1,%acc2 + mac.l %a1,%d4,#1,10(%a6),%a3,%acc1 + mac.l %a1,%d4,#1,10(%a6),%a3,%acc2 + mac.l %a1,%d4,#1,10(%a6),%d2,%acc1 + mac.l %a1,%d4,#1,10(%a6),%d2,%acc2 + mac.l %a1,%d4,#1,10(%a6),%a7,%acc1 + mac.l %a1,%d4,#1,10(%a6),%a7,%acc2 + mac.l %a1,%d4,#1,10(%a6)&,%d1,%acc1 + mac.l %a1,%d4,#1,10(%a6)&,%d1,%acc2 + mac.l %a1,%d4,#1,10(%a6)&,%a3,%acc1 + mac.l %a1,%d4,#1,10(%a6)&,%a3,%acc2 + mac.l %a1,%d4,#1,10(%a6)&,%d2,%acc1 + mac.l %a1,%d4,#1,10(%a6)&,%d2,%acc2 + mac.l %a1,%d4,#1,10(%a6)&,%a7,%acc1 + mac.l %a1,%d4,#1,10(%a6)&,%a7,%acc2 + mac.l %a1,%d4,#1,-(%a1),%d1,%acc1 + mac.l %a1,%d4,#1,-(%a1),%d1,%acc2 + mac.l %a1,%d4,#1,-(%a1),%a3,%acc1 + mac.l %a1,%d4,#1,-(%a1),%a3,%acc2 + mac.l %a1,%d4,#1,-(%a1),%d2,%acc1 + mac.l %a1,%d4,#1,-(%a1),%d2,%acc2 + mac.l %a1,%d4,#1,-(%a1),%a7,%acc1 + mac.l %a1,%d4,#1,-(%a1),%a7,%acc2 + mac.l %a1,%d4,#1,-(%a1)&,%d1,%acc1 + mac.l %a1,%d4,#1,-(%a1)&,%d1,%acc2 + mac.l %a1,%d4,#1,-(%a1)&,%a3,%acc1 + mac.l %a1,%d4,#1,-(%a1)&,%a3,%acc2 + mac.l %a1,%d4,#1,-(%a1)&,%d2,%acc1 + mac.l %a1,%d4,#1,-(%a1)&,%d2,%acc2 + mac.l %a1,%d4,#1,-(%a1)&,%a7,%acc1 + mac.l %a1,%d4,#1,-(%a1)&,%a7,%acc2 + mac.l %a1,%d4,#-1,(%a3),%d1,%acc1 + mac.l %a1,%d4,#-1,(%a3),%d1,%acc2 + mac.l %a1,%d4,#-1,(%a3),%a3,%acc1 + mac.l %a1,%d4,#-1,(%a3),%a3,%acc2 + mac.l %a1,%d4,#-1,(%a3),%d2,%acc1 + mac.l %a1,%d4,#-1,(%a3),%d2,%acc2 + mac.l %a1,%d4,#-1,(%a3),%a7,%acc1 + mac.l %a1,%d4,#-1,(%a3),%a7,%acc2 + mac.l %a1,%d4,#-1,(%a3)&,%d1,%acc1 + mac.l %a1,%d4,#-1,(%a3)&,%d1,%acc2 + mac.l %a1,%d4,#-1,(%a3)&,%a3,%acc1 + mac.l %a1,%d4,#-1,(%a3)&,%a3,%acc2 + mac.l %a1,%d4,#-1,(%a3)&,%d2,%acc1 + mac.l %a1,%d4,#-1,(%a3)&,%d2,%acc2 + mac.l %a1,%d4,#-1,(%a3)&,%a7,%acc1 + mac.l %a1,%d4,#-1,(%a3)&,%a7,%acc2 + mac.l %a1,%d4,#-1,(%a2)+,%d1,%acc1 + mac.l %a1,%d4,#-1,(%a2)+,%d1,%acc2 + mac.l %a1,%d4,#-1,(%a2)+,%a3,%acc1 + mac.l %a1,%d4,#-1,(%a2)+,%a3,%acc2 + mac.l %a1,%d4,#-1,(%a2)+,%d2,%acc1 + mac.l %a1,%d4,#-1,(%a2)+,%d2,%acc2 + mac.l %a1,%d4,#-1,(%a2)+,%a7,%acc1 + mac.l %a1,%d4,#-1,(%a2)+,%a7,%acc2 + mac.l %a1,%d4,#-1,(%a2)+&,%d1,%acc1 + mac.l %a1,%d4,#-1,(%a2)+&,%d1,%acc2 + mac.l %a1,%d4,#-1,(%a2)+&,%a3,%acc1 + mac.l %a1,%d4,#-1,(%a2)+&,%a3,%acc2 + mac.l %a1,%d4,#-1,(%a2)+&,%d2,%acc1 + mac.l %a1,%d4,#-1,(%a2)+&,%d2,%acc2 + mac.l %a1,%d4,#-1,(%a2)+&,%a7,%acc1 + mac.l %a1,%d4,#-1,(%a2)+&,%a7,%acc2 + mac.l %a1,%d4,#-1,10(%a6),%d1,%acc1 + mac.l %a1,%d4,#-1,10(%a6),%d1,%acc2 + mac.l %a1,%d4,#-1,10(%a6),%a3,%acc1 + mac.l %a1,%d4,#-1,10(%a6),%a3,%acc2 + mac.l %a1,%d4,#-1,10(%a6),%d2,%acc1 + mac.l %a1,%d4,#-1,10(%a6),%d2,%acc2 + mac.l %a1,%d4,#-1,10(%a6),%a7,%acc1 + mac.l %a1,%d4,#-1,10(%a6),%a7,%acc2 + mac.l %a1,%d4,#-1,10(%a6)&,%d1,%acc1 + mac.l %a1,%d4,#-1,10(%a6)&,%d1,%acc2 + mac.l %a1,%d4,#-1,10(%a6)&,%a3,%acc1 + mac.l %a1,%d4,#-1,10(%a6)&,%a3,%acc2 + mac.l %a1,%d4,#-1,10(%a6)&,%d2,%acc1 + mac.l %a1,%d4,#-1,10(%a6)&,%d2,%acc2 + mac.l %a1,%d4,#-1,10(%a6)&,%a7,%acc1 + mac.l %a1,%d4,#-1,10(%a6)&,%a7,%acc2 + mac.l %a1,%d4,#-1,-(%a1),%d1,%acc1 + mac.l %a1,%d4,#-1,-(%a1),%d1,%acc2 + mac.l %a1,%d4,#-1,-(%a1),%a3,%acc1 + mac.l %a1,%d4,#-1,-(%a1),%a3,%acc2 + mac.l %a1,%d4,#-1,-(%a1),%d2,%acc1 + mac.l %a1,%d4,#-1,-(%a1),%d2,%acc2 + mac.l %a1,%d4,#-1,-(%a1),%a7,%acc1 + mac.l %a1,%d4,#-1,-(%a1),%a7,%acc2 + mac.l %a1,%d4,#-1,-(%a1)&,%d1,%acc1 + mac.l %a1,%d4,#-1,-(%a1)&,%d1,%acc2 + mac.l %a1,%d4,#-1,-(%a1)&,%a3,%acc1 + mac.l %a1,%d4,#-1,-(%a1)&,%a3,%acc2 + mac.l %a1,%d4,#-1,-(%a1)&,%d2,%acc1 + mac.l %a1,%d4,#-1,-(%a1)&,%d2,%acc2 + mac.l %a1,%d4,#-1,-(%a1)&,%a7,%acc1 + mac.l %a1,%d4,#-1,-(%a1)&,%a7,%acc2 + mac.l %d6,%a3,(%a3),%d1,%acc1 + mac.l %d6,%a3,(%a3),%d1,%acc2 + mac.l %d6,%a3,(%a3),%a3,%acc1 + mac.l %d6,%a3,(%a3),%a3,%acc2 + mac.l %d6,%a3,(%a3),%d2,%acc1 + mac.l %d6,%a3,(%a3),%d2,%acc2 + mac.l %d6,%a3,(%a3),%a7,%acc1 + mac.l %d6,%a3,(%a3),%a7,%acc2 + mac.l %d6,%a3,(%a3)&,%d1,%acc1 + mac.l %d6,%a3,(%a3)&,%d1,%acc2 + mac.l %d6,%a3,(%a3)&,%a3,%acc1 + mac.l %d6,%a3,(%a3)&,%a3,%acc2 + mac.l %d6,%a3,(%a3)&,%d2,%acc1 + mac.l %d6,%a3,(%a3)&,%d2,%acc2 + mac.l %d6,%a3,(%a3)&,%a7,%acc1 + mac.l %d6,%a3,(%a3)&,%a7,%acc2 + mac.l %d6,%a3,(%a2)+,%d1,%acc1 + mac.l %d6,%a3,(%a2)+,%d1,%acc2 + mac.l %d6,%a3,(%a2)+,%a3,%acc1 + mac.l %d6,%a3,(%a2)+,%a3,%acc2 + mac.l %d6,%a3,(%a2)+,%d2,%acc1 + mac.l %d6,%a3,(%a2)+,%d2,%acc2 + mac.l %d6,%a3,(%a2)+,%a7,%acc1 + mac.l %d6,%a3,(%a2)+,%a7,%acc2 + mac.l %d6,%a3,(%a2)+&,%d1,%acc1 + mac.l %d6,%a3,(%a2)+&,%d1,%acc2 + mac.l %d6,%a3,(%a2)+&,%a3,%acc1 + mac.l %d6,%a3,(%a2)+&,%a3,%acc2 + mac.l %d6,%a3,(%a2)+&,%d2,%acc1 + mac.l %d6,%a3,(%a2)+&,%d2,%acc2 + mac.l %d6,%a3,(%a2)+&,%a7,%acc1 + mac.l %d6,%a3,(%a2)+&,%a7,%acc2 + mac.l %d6,%a3,10(%a6),%d1,%acc1 + mac.l %d6,%a3,10(%a6),%d1,%acc2 + mac.l %d6,%a3,10(%a6),%a3,%acc1 + mac.l %d6,%a3,10(%a6),%a3,%acc2 + mac.l %d6,%a3,10(%a6),%d2,%acc1 + mac.l %d6,%a3,10(%a6),%d2,%acc2 + mac.l %d6,%a3,10(%a6),%a7,%acc1 + mac.l %d6,%a3,10(%a6),%a7,%acc2 + mac.l %d6,%a3,10(%a6)&,%d1,%acc1 + mac.l %d6,%a3,10(%a6)&,%d1,%acc2 + mac.l %d6,%a3,10(%a6)&,%a3,%acc1 + mac.l %d6,%a3,10(%a6)&,%a3,%acc2 + mac.l %d6,%a3,10(%a6)&,%d2,%acc1 + mac.l %d6,%a3,10(%a6)&,%d2,%acc2 + mac.l %d6,%a3,10(%a6)&,%a7,%acc1 + mac.l %d6,%a3,10(%a6)&,%a7,%acc2 + mac.l %d6,%a3,-(%a1),%d1,%acc1 + mac.l %d6,%a3,-(%a1),%d1,%acc2 + mac.l %d6,%a3,-(%a1),%a3,%acc1 + mac.l %d6,%a3,-(%a1),%a3,%acc2 + mac.l %d6,%a3,-(%a1),%d2,%acc1 + mac.l %d6,%a3,-(%a1),%d2,%acc2 + mac.l %d6,%a3,-(%a1),%a7,%acc1 + mac.l %d6,%a3,-(%a1),%a7,%acc2 + mac.l %d6,%a3,-(%a1)&,%d1,%acc1 + mac.l %d6,%a3,-(%a1)&,%d1,%acc2 + mac.l %d6,%a3,-(%a1)&,%a3,%acc1 + mac.l %d6,%a3,-(%a1)&,%a3,%acc2 + mac.l %d6,%a3,-(%a1)&,%d2,%acc1 + mac.l %d6,%a3,-(%a1)&,%d2,%acc2 + mac.l %d6,%a3,-(%a1)&,%a7,%acc1 + mac.l %d6,%a3,-(%a1)&,%a7,%acc2 + mac.l %d6,%a3,<<,(%a3),%d1,%acc1 + mac.l %d6,%a3,<<,(%a3),%d1,%acc2 + mac.l %d6,%a3,<<,(%a3),%a3,%acc1 + mac.l %d6,%a3,<<,(%a3),%a3,%acc2 + mac.l %d6,%a3,<<,(%a3),%d2,%acc1 + mac.l %d6,%a3,<<,(%a3),%d2,%acc2 + mac.l %d6,%a3,<<,(%a3),%a7,%acc1 + mac.l %d6,%a3,<<,(%a3),%a7,%acc2 + mac.l %d6,%a3,<<,(%a3)&,%d1,%acc1 + mac.l %d6,%a3,<<,(%a3)&,%d1,%acc2 + mac.l %d6,%a3,<<,(%a3)&,%a3,%acc1 + mac.l %d6,%a3,<<,(%a3)&,%a3,%acc2 + mac.l %d6,%a3,<<,(%a3)&,%d2,%acc1 + mac.l %d6,%a3,<<,(%a3)&,%d2,%acc2 + mac.l %d6,%a3,<<,(%a3)&,%a7,%acc1 + mac.l %d6,%a3,<<,(%a3)&,%a7,%acc2 + mac.l %d6,%a3,<<,(%a2)+,%d1,%acc1 + mac.l %d6,%a3,<<,(%a2)+,%d1,%acc2 + mac.l %d6,%a3,<<,(%a2)+,%a3,%acc1 + mac.l %d6,%a3,<<,(%a2)+,%a3,%acc2 + mac.l %d6,%a3,<<,(%a2)+,%d2,%acc1 + mac.l %d6,%a3,<<,(%a2)+,%d2,%acc2 + mac.l %d6,%a3,<<,(%a2)+,%a7,%acc1 + mac.l %d6,%a3,<<,(%a2)+,%a7,%acc2 + mac.l %d6,%a3,<<,(%a2)+&,%d1,%acc1 + mac.l %d6,%a3,<<,(%a2)+&,%d1,%acc2 + mac.l %d6,%a3,<<,(%a2)+&,%a3,%acc1 + mac.l %d6,%a3,<<,(%a2)+&,%a3,%acc2 + mac.l %d6,%a3,<<,(%a2)+&,%d2,%acc1 + mac.l %d6,%a3,<<,(%a2)+&,%d2,%acc2 + mac.l %d6,%a3,<<,(%a2)+&,%a7,%acc1 + mac.l %d6,%a3,<<,(%a2)+&,%a7,%acc2 + mac.l %d6,%a3,<<,10(%a6),%d1,%acc1 + mac.l %d6,%a3,<<,10(%a6),%d1,%acc2 + mac.l %d6,%a3,<<,10(%a6),%a3,%acc1 + mac.l %d6,%a3,<<,10(%a6),%a3,%acc2 + mac.l %d6,%a3,<<,10(%a6),%d2,%acc1 + mac.l %d6,%a3,<<,10(%a6),%d2,%acc2 + mac.l %d6,%a3,<<,10(%a6),%a7,%acc1 + mac.l %d6,%a3,<<,10(%a6),%a7,%acc2 + mac.l %d6,%a3,<<,10(%a6)&,%d1,%acc1 + mac.l %d6,%a3,<<,10(%a6)&,%d1,%acc2 + mac.l %d6,%a3,<<,10(%a6)&,%a3,%acc1 + mac.l %d6,%a3,<<,10(%a6)&,%a3,%acc2 + mac.l %d6,%a3,<<,10(%a6)&,%d2,%acc1 + mac.l %d6,%a3,<<,10(%a6)&,%d2,%acc2 + mac.l %d6,%a3,<<,10(%a6)&,%a7,%acc1 + mac.l %d6,%a3,<<,10(%a6)&,%a7,%acc2 + mac.l %d6,%a3,<<,-(%a1),%d1,%acc1 + mac.l %d6,%a3,<<,-(%a1),%d1,%acc2 + mac.l %d6,%a3,<<,-(%a1),%a3,%acc1 + mac.l %d6,%a3,<<,-(%a1),%a3,%acc2 + mac.l %d6,%a3,<<,-(%a1),%d2,%acc1 + mac.l %d6,%a3,<<,-(%a1),%d2,%acc2 + mac.l %d6,%a3,<<,-(%a1),%a7,%acc1 + mac.l %d6,%a3,<<,-(%a1),%a7,%acc2 + mac.l %d6,%a3,<<,-(%a1)&,%d1,%acc1 + mac.l %d6,%a3,<<,-(%a1)&,%d1,%acc2 + mac.l %d6,%a3,<<,-(%a1)&,%a3,%acc1 + mac.l %d6,%a3,<<,-(%a1)&,%a3,%acc2 + mac.l %d6,%a3,<<,-(%a1)&,%d2,%acc1 + mac.l %d6,%a3,<<,-(%a1)&,%d2,%acc2 + mac.l %d6,%a3,<<,-(%a1)&,%a7,%acc1 + mac.l %d6,%a3,<<,-(%a1)&,%a7,%acc2 + mac.l %d6,%a3,>>,(%a3),%d1,%acc1 + mac.l %d6,%a3,>>,(%a3),%d1,%acc2 + mac.l %d6,%a3,>>,(%a3),%a3,%acc1 + mac.l %d6,%a3,>>,(%a3),%a3,%acc2 + mac.l %d6,%a3,>>,(%a3),%d2,%acc1 + mac.l %d6,%a3,>>,(%a3),%d2,%acc2 + mac.l %d6,%a3,>>,(%a3),%a7,%acc1 + mac.l %d6,%a3,>>,(%a3),%a7,%acc2 + mac.l %d6,%a3,>>,(%a3)&,%d1,%acc1 + mac.l %d6,%a3,>>,(%a3)&,%d1,%acc2 + mac.l %d6,%a3,>>,(%a3)&,%a3,%acc1 + mac.l %d6,%a3,>>,(%a3)&,%a3,%acc2 + mac.l %d6,%a3,>>,(%a3)&,%d2,%acc1 + mac.l %d6,%a3,>>,(%a3)&,%d2,%acc2 + mac.l %d6,%a3,>>,(%a3)&,%a7,%acc1 + mac.l %d6,%a3,>>,(%a3)&,%a7,%acc2 + mac.l %d6,%a3,>>,(%a2)+,%d1,%acc1 + mac.l %d6,%a3,>>,(%a2)+,%d1,%acc2 + mac.l %d6,%a3,>>,(%a2)+,%a3,%acc1 + mac.l %d6,%a3,>>,(%a2)+,%a3,%acc2 + mac.l %d6,%a3,>>,(%a2)+,%d2,%acc1 + mac.l %d6,%a3,>>,(%a2)+,%d2,%acc2 + mac.l %d6,%a3,>>,(%a2)+,%a7,%acc1 + mac.l %d6,%a3,>>,(%a2)+,%a7,%acc2 + mac.l %d6,%a3,>>,(%a2)+&,%d1,%acc1 + mac.l %d6,%a3,>>,(%a2)+&,%d1,%acc2 + mac.l %d6,%a3,>>,(%a2)+&,%a3,%acc1 + mac.l %d6,%a3,>>,(%a2)+&,%a3,%acc2 + mac.l %d6,%a3,>>,(%a2)+&,%d2,%acc1 + mac.l %d6,%a3,>>,(%a2)+&,%d2,%acc2 + mac.l %d6,%a3,>>,(%a2)+&,%a7,%acc1 + mac.l %d6,%a3,>>,(%a2)+&,%a7,%acc2 + mac.l %d6,%a3,>>,10(%a6),%d1,%acc1 + mac.l %d6,%a3,>>,10(%a6),%d1,%acc2 + mac.l %d6,%a3,>>,10(%a6),%a3,%acc1 + mac.l %d6,%a3,>>,10(%a6),%a3,%acc2 + mac.l %d6,%a3,>>,10(%a6),%d2,%acc1 + mac.l %d6,%a3,>>,10(%a6),%d2,%acc2 + mac.l %d6,%a3,>>,10(%a6),%a7,%acc1 + mac.l %d6,%a3,>>,10(%a6),%a7,%acc2 + mac.l %d6,%a3,>>,10(%a6)&,%d1,%acc1 + mac.l %d6,%a3,>>,10(%a6)&,%d1,%acc2 + mac.l %d6,%a3,>>,10(%a6)&,%a3,%acc1 + mac.l %d6,%a3,>>,10(%a6)&,%a3,%acc2 + mac.l %d6,%a3,>>,10(%a6)&,%d2,%acc1 + mac.l %d6,%a3,>>,10(%a6)&,%d2,%acc2 + mac.l %d6,%a3,>>,10(%a6)&,%a7,%acc1 + mac.l %d6,%a3,>>,10(%a6)&,%a7,%acc2 + mac.l %d6,%a3,>>,-(%a1),%d1,%acc1 + mac.l %d6,%a3,>>,-(%a1),%d1,%acc2 + mac.l %d6,%a3,>>,-(%a1),%a3,%acc1 + mac.l %d6,%a3,>>,-(%a1),%a3,%acc2 + mac.l %d6,%a3,>>,-(%a1),%d2,%acc1 + mac.l %d6,%a3,>>,-(%a1),%d2,%acc2 + mac.l %d6,%a3,>>,-(%a1),%a7,%acc1 + mac.l %d6,%a3,>>,-(%a1),%a7,%acc2 + mac.l %d6,%a3,>>,-(%a1)&,%d1,%acc1 + mac.l %d6,%a3,>>,-(%a1)&,%d1,%acc2 + mac.l %d6,%a3,>>,-(%a1)&,%a3,%acc1 + mac.l %d6,%a3,>>,-(%a1)&,%a3,%acc2 + mac.l %d6,%a3,>>,-(%a1)&,%d2,%acc1 + mac.l %d6,%a3,>>,-(%a1)&,%d2,%acc2 + mac.l %d6,%a3,>>,-(%a1)&,%a7,%acc1 + mac.l %d6,%a3,>>,-(%a1)&,%a7,%acc2 + mac.l %d6,%a3,#1,(%a3),%d1,%acc1 + mac.l %d6,%a3,#1,(%a3),%d1,%acc2 + mac.l %d6,%a3,#1,(%a3),%a3,%acc1 + mac.l %d6,%a3,#1,(%a3),%a3,%acc2 + mac.l %d6,%a3,#1,(%a3),%d2,%acc1 + mac.l %d6,%a3,#1,(%a3),%d2,%acc2 + mac.l %d6,%a3,#1,(%a3),%a7,%acc1 + mac.l %d6,%a3,#1,(%a3),%a7,%acc2 + mac.l %d6,%a3,#1,(%a3)&,%d1,%acc1 + mac.l %d6,%a3,#1,(%a3)&,%d1,%acc2 + mac.l %d6,%a3,#1,(%a3)&,%a3,%acc1 + mac.l %d6,%a3,#1,(%a3)&,%a3,%acc2 + mac.l %d6,%a3,#1,(%a3)&,%d2,%acc1 + mac.l %d6,%a3,#1,(%a3)&,%d2,%acc2 + mac.l %d6,%a3,#1,(%a3)&,%a7,%acc1 + mac.l %d6,%a3,#1,(%a3)&,%a7,%acc2 + mac.l %d6,%a3,#1,(%a2)+,%d1,%acc1 + mac.l %d6,%a3,#1,(%a2)+,%d1,%acc2 + mac.l %d6,%a3,#1,(%a2)+,%a3,%acc1 + mac.l %d6,%a3,#1,(%a2)+,%a3,%acc2 + mac.l %d6,%a3,#1,(%a2)+,%d2,%acc1 + mac.l %d6,%a3,#1,(%a2)+,%d2,%acc2 + mac.l %d6,%a3,#1,(%a2)+,%a7,%acc1 + mac.l %d6,%a3,#1,(%a2)+,%a7,%acc2 + mac.l %d6,%a3,#1,(%a2)+&,%d1,%acc1 + mac.l %d6,%a3,#1,(%a2)+&,%d1,%acc2 + mac.l %d6,%a3,#1,(%a2)+&,%a3,%acc1 + mac.l %d6,%a3,#1,(%a2)+&,%a3,%acc2 + mac.l %d6,%a3,#1,(%a2)+&,%d2,%acc1 + mac.l %d6,%a3,#1,(%a2)+&,%d2,%acc2 + mac.l %d6,%a3,#1,(%a2)+&,%a7,%acc1 + mac.l %d6,%a3,#1,(%a2)+&,%a7,%acc2 + mac.l %d6,%a3,#1,10(%a6),%d1,%acc1 + mac.l %d6,%a3,#1,10(%a6),%d1,%acc2 + mac.l %d6,%a3,#1,10(%a6),%a3,%acc1 + mac.l %d6,%a3,#1,10(%a6),%a3,%acc2 + mac.l %d6,%a3,#1,10(%a6),%d2,%acc1 + mac.l %d6,%a3,#1,10(%a6),%d2,%acc2 + mac.l %d6,%a3,#1,10(%a6),%a7,%acc1 + mac.l %d6,%a3,#1,10(%a6),%a7,%acc2 + mac.l %d6,%a3,#1,10(%a6)&,%d1,%acc1 + mac.l %d6,%a3,#1,10(%a6)&,%d1,%acc2 + mac.l %d6,%a3,#1,10(%a6)&,%a3,%acc1 + mac.l %d6,%a3,#1,10(%a6)&,%a3,%acc2 + mac.l %d6,%a3,#1,10(%a6)&,%d2,%acc1 + mac.l %d6,%a3,#1,10(%a6)&,%d2,%acc2 + mac.l %d6,%a3,#1,10(%a6)&,%a7,%acc1 + mac.l %d6,%a3,#1,10(%a6)&,%a7,%acc2 + mac.l %d6,%a3,#1,-(%a1),%d1,%acc1 + mac.l %d6,%a3,#1,-(%a1),%d1,%acc2 + mac.l %d6,%a3,#1,-(%a1),%a3,%acc1 + mac.l %d6,%a3,#1,-(%a1),%a3,%acc2 + mac.l %d6,%a3,#1,-(%a1),%d2,%acc1 + mac.l %d6,%a3,#1,-(%a1),%d2,%acc2 + mac.l %d6,%a3,#1,-(%a1),%a7,%acc1 + mac.l %d6,%a3,#1,-(%a1),%a7,%acc2 + mac.l %d6,%a3,#1,-(%a1)&,%d1,%acc1 + mac.l %d6,%a3,#1,-(%a1)&,%d1,%acc2 + mac.l %d6,%a3,#1,-(%a1)&,%a3,%acc1 + mac.l %d6,%a3,#1,-(%a1)&,%a3,%acc2 + mac.l %d6,%a3,#1,-(%a1)&,%d2,%acc1 + mac.l %d6,%a3,#1,-(%a1)&,%d2,%acc2 + mac.l %d6,%a3,#1,-(%a1)&,%a7,%acc1 + mac.l %d6,%a3,#1,-(%a1)&,%a7,%acc2 + mac.l %d6,%a3,#-1,(%a3),%d1,%acc1 + mac.l %d6,%a3,#-1,(%a3),%d1,%acc2 + mac.l %d6,%a3,#-1,(%a3),%a3,%acc1 + mac.l %d6,%a3,#-1,(%a3),%a3,%acc2 + mac.l %d6,%a3,#-1,(%a3),%d2,%acc1 + mac.l %d6,%a3,#-1,(%a3),%d2,%acc2 + mac.l %d6,%a3,#-1,(%a3),%a7,%acc1 + mac.l %d6,%a3,#-1,(%a3),%a7,%acc2 + mac.l %d6,%a3,#-1,(%a3)&,%d1,%acc1 + mac.l %d6,%a3,#-1,(%a3)&,%d1,%acc2 + mac.l %d6,%a3,#-1,(%a3)&,%a3,%acc1 + mac.l %d6,%a3,#-1,(%a3)&,%a3,%acc2 + mac.l %d6,%a3,#-1,(%a3)&,%d2,%acc1 + mac.l %d6,%a3,#-1,(%a3)&,%d2,%acc2 + mac.l %d6,%a3,#-1,(%a3)&,%a7,%acc1 + mac.l %d6,%a3,#-1,(%a3)&,%a7,%acc2 + mac.l %d6,%a3,#-1,(%a2)+,%d1,%acc1 + mac.l %d6,%a3,#-1,(%a2)+,%d1,%acc2 + mac.l %d6,%a3,#-1,(%a2)+,%a3,%acc1 + mac.l %d6,%a3,#-1,(%a2)+,%a3,%acc2 + mac.l %d6,%a3,#-1,(%a2)+,%d2,%acc1 + mac.l %d6,%a3,#-1,(%a2)+,%d2,%acc2 + mac.l %d6,%a3,#-1,(%a2)+,%a7,%acc1 + mac.l %d6,%a3,#-1,(%a2)+,%a7,%acc2 + mac.l %d6,%a3,#-1,(%a2)+&,%d1,%acc1 + mac.l %d6,%a3,#-1,(%a2)+&,%d1,%acc2 + mac.l %d6,%a3,#-1,(%a2)+&,%a3,%acc1 + mac.l %d6,%a3,#-1,(%a2)+&,%a3,%acc2 + mac.l %d6,%a3,#-1,(%a2)+&,%d2,%acc1 + mac.l %d6,%a3,#-1,(%a2)+&,%d2,%acc2 + mac.l %d6,%a3,#-1,(%a2)+&,%a7,%acc1 + mac.l %d6,%a3,#-1,(%a2)+&,%a7,%acc2 + mac.l %d6,%a3,#-1,10(%a6),%d1,%acc1 + mac.l %d6,%a3,#-1,10(%a6),%d1,%acc2 + mac.l %d6,%a3,#-1,10(%a6),%a3,%acc1 + mac.l %d6,%a3,#-1,10(%a6),%a3,%acc2 + mac.l %d6,%a3,#-1,10(%a6),%d2,%acc1 + mac.l %d6,%a3,#-1,10(%a6),%d2,%acc2 + mac.l %d6,%a3,#-1,10(%a6),%a7,%acc1 + mac.l %d6,%a3,#-1,10(%a6),%a7,%acc2 + mac.l %d6,%a3,#-1,10(%a6)&,%d1,%acc1 + mac.l %d6,%a3,#-1,10(%a6)&,%d1,%acc2 + mac.l %d6,%a3,#-1,10(%a6)&,%a3,%acc1 + mac.l %d6,%a3,#-1,10(%a6)&,%a3,%acc2 + mac.l %d6,%a3,#-1,10(%a6)&,%d2,%acc1 + mac.l %d6,%a3,#-1,10(%a6)&,%d2,%acc2 + mac.l %d6,%a3,#-1,10(%a6)&,%a7,%acc1 + mac.l %d6,%a3,#-1,10(%a6)&,%a7,%acc2 + mac.l %d6,%a3,#-1,-(%a1),%d1,%acc1 + mac.l %d6,%a3,#-1,-(%a1),%d1,%acc2 + mac.l %d6,%a3,#-1,-(%a1),%a3,%acc1 + mac.l %d6,%a3,#-1,-(%a1),%a3,%acc2 + mac.l %d6,%a3,#-1,-(%a1),%d2,%acc1 + mac.l %d6,%a3,#-1,-(%a1),%d2,%acc2 + mac.l %d6,%a3,#-1,-(%a1),%a7,%acc1 + mac.l %d6,%a3,#-1,-(%a1),%a7,%acc2 + mac.l %d6,%a3,#-1,-(%a1)&,%d1,%acc1 + mac.l %d6,%a3,#-1,-(%a1)&,%d1,%acc2 + mac.l %d6,%a3,#-1,-(%a1)&,%a3,%acc1 + mac.l %d6,%a3,#-1,-(%a1)&,%a3,%acc2 + mac.l %d6,%a3,#-1,-(%a1)&,%d2,%acc1 + mac.l %d6,%a3,#-1,-(%a1)&,%d2,%acc2 + mac.l %d6,%a3,#-1,-(%a1)&,%a7,%acc1 + mac.l %d6,%a3,#-1,-(%a1)&,%a7,%acc2 + mac.l %d6,%d4,(%a3),%d1,%acc1 + mac.l %d6,%d4,(%a3),%d1,%acc2 + mac.l %d6,%d4,(%a3),%a3,%acc1 + mac.l %d6,%d4,(%a3),%a3,%acc2 + mac.l %d6,%d4,(%a3),%d2,%acc1 + mac.l %d6,%d4,(%a3),%d2,%acc2 + mac.l %d6,%d4,(%a3),%a7,%acc1 + mac.l %d6,%d4,(%a3),%a7,%acc2 + mac.l %d6,%d4,(%a3)&,%d1,%acc1 + mac.l %d6,%d4,(%a3)&,%d1,%acc2 + mac.l %d6,%d4,(%a3)&,%a3,%acc1 + mac.l %d6,%d4,(%a3)&,%a3,%acc2 + mac.l %d6,%d4,(%a3)&,%d2,%acc1 + mac.l %d6,%d4,(%a3)&,%d2,%acc2 + mac.l %d6,%d4,(%a3)&,%a7,%acc1 + mac.l %d6,%d4,(%a3)&,%a7,%acc2 + mac.l %d6,%d4,(%a2)+,%d1,%acc1 + mac.l %d6,%d4,(%a2)+,%d1,%acc2 + mac.l %d6,%d4,(%a2)+,%a3,%acc1 + mac.l %d6,%d4,(%a2)+,%a3,%acc2 + mac.l %d6,%d4,(%a2)+,%d2,%acc1 + mac.l %d6,%d4,(%a2)+,%d2,%acc2 + mac.l %d6,%d4,(%a2)+,%a7,%acc1 + mac.l %d6,%d4,(%a2)+,%a7,%acc2 + mac.l %d6,%d4,(%a2)+&,%d1,%acc1 + mac.l %d6,%d4,(%a2)+&,%d1,%acc2 + mac.l %d6,%d4,(%a2)+&,%a3,%acc1 + mac.l %d6,%d4,(%a2)+&,%a3,%acc2 + mac.l %d6,%d4,(%a2)+&,%d2,%acc1 + mac.l %d6,%d4,(%a2)+&,%d2,%acc2 + mac.l %d6,%d4,(%a2)+&,%a7,%acc1 + mac.l %d6,%d4,(%a2)+&,%a7,%acc2 + mac.l %d6,%d4,10(%a6),%d1,%acc1 + mac.l %d6,%d4,10(%a6),%d1,%acc2 + mac.l %d6,%d4,10(%a6),%a3,%acc1 + mac.l %d6,%d4,10(%a6),%a3,%acc2 + mac.l %d6,%d4,10(%a6),%d2,%acc1 + mac.l %d6,%d4,10(%a6),%d2,%acc2 + mac.l %d6,%d4,10(%a6),%a7,%acc1 + mac.l %d6,%d4,10(%a6),%a7,%acc2 + mac.l %d6,%d4,10(%a6)&,%d1,%acc1 + mac.l %d6,%d4,10(%a6)&,%d1,%acc2 + mac.l %d6,%d4,10(%a6)&,%a3,%acc1 + mac.l %d6,%d4,10(%a6)&,%a3,%acc2 + mac.l %d6,%d4,10(%a6)&,%d2,%acc1 + mac.l %d6,%d4,10(%a6)&,%d2,%acc2 + mac.l %d6,%d4,10(%a6)&,%a7,%acc1 + mac.l %d6,%d4,10(%a6)&,%a7,%acc2 + mac.l %d6,%d4,-(%a1),%d1,%acc1 + mac.l %d6,%d4,-(%a1),%d1,%acc2 + mac.l %d6,%d4,-(%a1),%a3,%acc1 + mac.l %d6,%d4,-(%a1),%a3,%acc2 + mac.l %d6,%d4,-(%a1),%d2,%acc1 + mac.l %d6,%d4,-(%a1),%d2,%acc2 + mac.l %d6,%d4,-(%a1),%a7,%acc1 + mac.l %d6,%d4,-(%a1),%a7,%acc2 + mac.l %d6,%d4,-(%a1)&,%d1,%acc1 + mac.l %d6,%d4,-(%a1)&,%d1,%acc2 + mac.l %d6,%d4,-(%a1)&,%a3,%acc1 + mac.l %d6,%d4,-(%a1)&,%a3,%acc2 + mac.l %d6,%d4,-(%a1)&,%d2,%acc1 + mac.l %d6,%d4,-(%a1)&,%d2,%acc2 + mac.l %d6,%d4,-(%a1)&,%a7,%acc1 + mac.l %d6,%d4,-(%a1)&,%a7,%acc2 + mac.l %d6,%d4,<<,(%a3),%d1,%acc1 + mac.l %d6,%d4,<<,(%a3),%d1,%acc2 + mac.l %d6,%d4,<<,(%a3),%a3,%acc1 + mac.l %d6,%d4,<<,(%a3),%a3,%acc2 + mac.l %d6,%d4,<<,(%a3),%d2,%acc1 + mac.l %d6,%d4,<<,(%a3),%d2,%acc2 + mac.l %d6,%d4,<<,(%a3),%a7,%acc1 + mac.l %d6,%d4,<<,(%a3),%a7,%acc2 + mac.l %d6,%d4,<<,(%a3)&,%d1,%acc1 + mac.l %d6,%d4,<<,(%a3)&,%d1,%acc2 + mac.l %d6,%d4,<<,(%a3)&,%a3,%acc1 + mac.l %d6,%d4,<<,(%a3)&,%a3,%acc2 + mac.l %d6,%d4,<<,(%a3)&,%d2,%acc1 + mac.l %d6,%d4,<<,(%a3)&,%d2,%acc2 + mac.l %d6,%d4,<<,(%a3)&,%a7,%acc1 + mac.l %d6,%d4,<<,(%a3)&,%a7,%acc2 + mac.l %d6,%d4,<<,(%a2)+,%d1,%acc1 + mac.l %d6,%d4,<<,(%a2)+,%d1,%acc2 + mac.l %d6,%d4,<<,(%a2)+,%a3,%acc1 + mac.l %d6,%d4,<<,(%a2)+,%a3,%acc2 + mac.l %d6,%d4,<<,(%a2)+,%d2,%acc1 + mac.l %d6,%d4,<<,(%a2)+,%d2,%acc2 + mac.l %d6,%d4,<<,(%a2)+,%a7,%acc1 + mac.l %d6,%d4,<<,(%a2)+,%a7,%acc2 + mac.l %d6,%d4,<<,(%a2)+&,%d1,%acc1 + mac.l %d6,%d4,<<,(%a2)+&,%d1,%acc2 + mac.l %d6,%d4,<<,(%a2)+&,%a3,%acc1 + mac.l %d6,%d4,<<,(%a2)+&,%a3,%acc2 + mac.l %d6,%d4,<<,(%a2)+&,%d2,%acc1 + mac.l %d6,%d4,<<,(%a2)+&,%d2,%acc2 + mac.l %d6,%d4,<<,(%a2)+&,%a7,%acc1 + mac.l %d6,%d4,<<,(%a2)+&,%a7,%acc2 + mac.l %d6,%d4,<<,10(%a6),%d1,%acc1 + mac.l %d6,%d4,<<,10(%a6),%d1,%acc2 + mac.l %d6,%d4,<<,10(%a6),%a3,%acc1 + mac.l %d6,%d4,<<,10(%a6),%a3,%acc2 + mac.l %d6,%d4,<<,10(%a6),%d2,%acc1 + mac.l %d6,%d4,<<,10(%a6),%d2,%acc2 + mac.l %d6,%d4,<<,10(%a6),%a7,%acc1 + mac.l %d6,%d4,<<,10(%a6),%a7,%acc2 + mac.l %d6,%d4,<<,10(%a6)&,%d1,%acc1 + mac.l %d6,%d4,<<,10(%a6)&,%d1,%acc2 + mac.l %d6,%d4,<<,10(%a6)&,%a3,%acc1 + mac.l %d6,%d4,<<,10(%a6)&,%a3,%acc2 + mac.l %d6,%d4,<<,10(%a6)&,%d2,%acc1 + mac.l %d6,%d4,<<,10(%a6)&,%d2,%acc2 + mac.l %d6,%d4,<<,10(%a6)&,%a7,%acc1 + mac.l %d6,%d4,<<,10(%a6)&,%a7,%acc2 + mac.l %d6,%d4,<<,-(%a1),%d1,%acc1 + mac.l %d6,%d4,<<,-(%a1),%d1,%acc2 + mac.l %d6,%d4,<<,-(%a1),%a3,%acc1 + mac.l %d6,%d4,<<,-(%a1),%a3,%acc2 + mac.l %d6,%d4,<<,-(%a1),%d2,%acc1 + mac.l %d6,%d4,<<,-(%a1),%d2,%acc2 + mac.l %d6,%d4,<<,-(%a1),%a7,%acc1 + mac.l %d6,%d4,<<,-(%a1),%a7,%acc2 + mac.l %d6,%d4,<<,-(%a1)&,%d1,%acc1 + mac.l %d6,%d4,<<,-(%a1)&,%d1,%acc2 + mac.l %d6,%d4,<<,-(%a1)&,%a3,%acc1 + mac.l %d6,%d4,<<,-(%a1)&,%a3,%acc2 + mac.l %d6,%d4,<<,-(%a1)&,%d2,%acc1 + mac.l %d6,%d4,<<,-(%a1)&,%d2,%acc2 + mac.l %d6,%d4,<<,-(%a1)&,%a7,%acc1 + mac.l %d6,%d4,<<,-(%a1)&,%a7,%acc2 + mac.l %d6,%d4,>>,(%a3),%d1,%acc1 + mac.l %d6,%d4,>>,(%a3),%d1,%acc2 + mac.l %d6,%d4,>>,(%a3),%a3,%acc1 + mac.l %d6,%d4,>>,(%a3),%a3,%acc2 + mac.l %d6,%d4,>>,(%a3),%d2,%acc1 + mac.l %d6,%d4,>>,(%a3),%d2,%acc2 + mac.l %d6,%d4,>>,(%a3),%a7,%acc1 + mac.l %d6,%d4,>>,(%a3),%a7,%acc2 + mac.l %d6,%d4,>>,(%a3)&,%d1,%acc1 + mac.l %d6,%d4,>>,(%a3)&,%d1,%acc2 + mac.l %d6,%d4,>>,(%a3)&,%a3,%acc1 + mac.l %d6,%d4,>>,(%a3)&,%a3,%acc2 + mac.l %d6,%d4,>>,(%a3)&,%d2,%acc1 + mac.l %d6,%d4,>>,(%a3)&,%d2,%acc2 + mac.l %d6,%d4,>>,(%a3)&,%a7,%acc1 + mac.l %d6,%d4,>>,(%a3)&,%a7,%acc2 + mac.l %d6,%d4,>>,(%a2)+,%d1,%acc1 + mac.l %d6,%d4,>>,(%a2)+,%d1,%acc2 + mac.l %d6,%d4,>>,(%a2)+,%a3,%acc1 + mac.l %d6,%d4,>>,(%a2)+,%a3,%acc2 + mac.l %d6,%d4,>>,(%a2)+,%d2,%acc1 + mac.l %d6,%d4,>>,(%a2)+,%d2,%acc2 + mac.l %d6,%d4,>>,(%a2)+,%a7,%acc1 + mac.l %d6,%d4,>>,(%a2)+,%a7,%acc2 + mac.l %d6,%d4,>>,(%a2)+&,%d1,%acc1 + mac.l %d6,%d4,>>,(%a2)+&,%d1,%acc2 + mac.l %d6,%d4,>>,(%a2)+&,%a3,%acc1 + mac.l %d6,%d4,>>,(%a2)+&,%a3,%acc2 + mac.l %d6,%d4,>>,(%a2)+&,%d2,%acc1 + mac.l %d6,%d4,>>,(%a2)+&,%d2,%acc2 + mac.l %d6,%d4,>>,(%a2)+&,%a7,%acc1 + mac.l %d6,%d4,>>,(%a2)+&,%a7,%acc2 + mac.l %d6,%d4,>>,10(%a6),%d1,%acc1 + mac.l %d6,%d4,>>,10(%a6),%d1,%acc2 + mac.l %d6,%d4,>>,10(%a6),%a3,%acc1 + mac.l %d6,%d4,>>,10(%a6),%a3,%acc2 + mac.l %d6,%d4,>>,10(%a6),%d2,%acc1 + mac.l %d6,%d4,>>,10(%a6),%d2,%acc2 + mac.l %d6,%d4,>>,10(%a6),%a7,%acc1 + mac.l %d6,%d4,>>,10(%a6),%a7,%acc2 + mac.l %d6,%d4,>>,10(%a6)&,%d1,%acc1 + mac.l %d6,%d4,>>,10(%a6)&,%d1,%acc2 + mac.l %d6,%d4,>>,10(%a6)&,%a3,%acc1 + mac.l %d6,%d4,>>,10(%a6)&,%a3,%acc2 + mac.l %d6,%d4,>>,10(%a6)&,%d2,%acc1 + mac.l %d6,%d4,>>,10(%a6)&,%d2,%acc2 + mac.l %d6,%d4,>>,10(%a6)&,%a7,%acc1 + mac.l %d6,%d4,>>,10(%a6)&,%a7,%acc2 + mac.l %d6,%d4,>>,-(%a1),%d1,%acc1 + mac.l %d6,%d4,>>,-(%a1),%d1,%acc2 + mac.l %d6,%d4,>>,-(%a1),%a3,%acc1 + mac.l %d6,%d4,>>,-(%a1),%a3,%acc2 + mac.l %d6,%d4,>>,-(%a1),%d2,%acc1 + mac.l %d6,%d4,>>,-(%a1),%d2,%acc2 + mac.l %d6,%d4,>>,-(%a1),%a7,%acc1 + mac.l %d6,%d4,>>,-(%a1),%a7,%acc2 + mac.l %d6,%d4,>>,-(%a1)&,%d1,%acc1 + mac.l %d6,%d4,>>,-(%a1)&,%d1,%acc2 + mac.l %d6,%d4,>>,-(%a1)&,%a3,%acc1 + mac.l %d6,%d4,>>,-(%a1)&,%a3,%acc2 + mac.l %d6,%d4,>>,-(%a1)&,%d2,%acc1 + mac.l %d6,%d4,>>,-(%a1)&,%d2,%acc2 + mac.l %d6,%d4,>>,-(%a1)&,%a7,%acc1 + mac.l %d6,%d4,>>,-(%a1)&,%a7,%acc2 + mac.l %d6,%d4,#1,(%a3),%d1,%acc1 + mac.l %d6,%d4,#1,(%a3),%d1,%acc2 + mac.l %d6,%d4,#1,(%a3),%a3,%acc1 + mac.l %d6,%d4,#1,(%a3),%a3,%acc2 + mac.l %d6,%d4,#1,(%a3),%d2,%acc1 + mac.l %d6,%d4,#1,(%a3),%d2,%acc2 + mac.l %d6,%d4,#1,(%a3),%a7,%acc1 + mac.l %d6,%d4,#1,(%a3),%a7,%acc2 + mac.l %d6,%d4,#1,(%a3)&,%d1,%acc1 + mac.l %d6,%d4,#1,(%a3)&,%d1,%acc2 + mac.l %d6,%d4,#1,(%a3)&,%a3,%acc1 + mac.l %d6,%d4,#1,(%a3)&,%a3,%acc2 + mac.l %d6,%d4,#1,(%a3)&,%d2,%acc1 + mac.l %d6,%d4,#1,(%a3)&,%d2,%acc2 + mac.l %d6,%d4,#1,(%a3)&,%a7,%acc1 + mac.l %d6,%d4,#1,(%a3)&,%a7,%acc2 + mac.l %d6,%d4,#1,(%a2)+,%d1,%acc1 + mac.l %d6,%d4,#1,(%a2)+,%d1,%acc2 + mac.l %d6,%d4,#1,(%a2)+,%a3,%acc1 + mac.l %d6,%d4,#1,(%a2)+,%a3,%acc2 + mac.l %d6,%d4,#1,(%a2)+,%d2,%acc1 + mac.l %d6,%d4,#1,(%a2)+,%d2,%acc2 + mac.l %d6,%d4,#1,(%a2)+,%a7,%acc1 + mac.l %d6,%d4,#1,(%a2)+,%a7,%acc2 + mac.l %d6,%d4,#1,(%a2)+&,%d1,%acc1 + mac.l %d6,%d4,#1,(%a2)+&,%d1,%acc2 + mac.l %d6,%d4,#1,(%a2)+&,%a3,%acc1 + mac.l %d6,%d4,#1,(%a2)+&,%a3,%acc2 + mac.l %d6,%d4,#1,(%a2)+&,%d2,%acc1 + mac.l %d6,%d4,#1,(%a2)+&,%d2,%acc2 + mac.l %d6,%d4,#1,(%a2)+&,%a7,%acc1 + mac.l %d6,%d4,#1,(%a2)+&,%a7,%acc2 + mac.l %d6,%d4,#1,10(%a6),%d1,%acc1 + mac.l %d6,%d4,#1,10(%a6),%d1,%acc2 + mac.l %d6,%d4,#1,10(%a6),%a3,%acc1 + mac.l %d6,%d4,#1,10(%a6),%a3,%acc2 + mac.l %d6,%d4,#1,10(%a6),%d2,%acc1 + mac.l %d6,%d4,#1,10(%a6),%d2,%acc2 + mac.l %d6,%d4,#1,10(%a6),%a7,%acc1 + mac.l %d6,%d4,#1,10(%a6),%a7,%acc2 + mac.l %d6,%d4,#1,10(%a6)&,%d1,%acc1 + mac.l %d6,%d4,#1,10(%a6)&,%d1,%acc2 + mac.l %d6,%d4,#1,10(%a6)&,%a3,%acc1 + mac.l %d6,%d4,#1,10(%a6)&,%a3,%acc2 + mac.l %d6,%d4,#1,10(%a6)&,%d2,%acc1 + mac.l %d6,%d4,#1,10(%a6)&,%d2,%acc2 + mac.l %d6,%d4,#1,10(%a6)&,%a7,%acc1 + mac.l %d6,%d4,#1,10(%a6)&,%a7,%acc2 + mac.l %d6,%d4,#1,-(%a1),%d1,%acc1 + mac.l %d6,%d4,#1,-(%a1),%d1,%acc2 + mac.l %d6,%d4,#1,-(%a1),%a3,%acc1 + mac.l %d6,%d4,#1,-(%a1),%a3,%acc2 + mac.l %d6,%d4,#1,-(%a1),%d2,%acc1 + mac.l %d6,%d4,#1,-(%a1),%d2,%acc2 + mac.l %d6,%d4,#1,-(%a1),%a7,%acc1 + mac.l %d6,%d4,#1,-(%a1),%a7,%acc2 + mac.l %d6,%d4,#1,-(%a1)&,%d1,%acc1 + mac.l %d6,%d4,#1,-(%a1)&,%d1,%acc2 + mac.l %d6,%d4,#1,-(%a1)&,%a3,%acc1 + mac.l %d6,%d4,#1,-(%a1)&,%a3,%acc2 + mac.l %d6,%d4,#1,-(%a1)&,%d2,%acc1 + mac.l %d6,%d4,#1,-(%a1)&,%d2,%acc2 + mac.l %d6,%d4,#1,-(%a1)&,%a7,%acc1 + mac.l %d6,%d4,#1,-(%a1)&,%a7,%acc2 + mac.l %d6,%d4,#-1,(%a3),%d1,%acc1 + mac.l %d6,%d4,#-1,(%a3),%d1,%acc2 + mac.l %d6,%d4,#-1,(%a3),%a3,%acc1 + mac.l %d6,%d4,#-1,(%a3),%a3,%acc2 + mac.l %d6,%d4,#-1,(%a3),%d2,%acc1 + mac.l %d6,%d4,#-1,(%a3),%d2,%acc2 + mac.l %d6,%d4,#-1,(%a3),%a7,%acc1 + mac.l %d6,%d4,#-1,(%a3),%a7,%acc2 + mac.l %d6,%d4,#-1,(%a3)&,%d1,%acc1 + mac.l %d6,%d4,#-1,(%a3)&,%d1,%acc2 + mac.l %d6,%d4,#-1,(%a3)&,%a3,%acc1 + mac.l %d6,%d4,#-1,(%a3)&,%a3,%acc2 + mac.l %d6,%d4,#-1,(%a3)&,%d2,%acc1 + mac.l %d6,%d4,#-1,(%a3)&,%d2,%acc2 + mac.l %d6,%d4,#-1,(%a3)&,%a7,%acc1 + mac.l %d6,%d4,#-1,(%a3)&,%a7,%acc2 + mac.l %d6,%d4,#-1,(%a2)+,%d1,%acc1 + mac.l %d6,%d4,#-1,(%a2)+,%d1,%acc2 + mac.l %d6,%d4,#-1,(%a2)+,%a3,%acc1 + mac.l %d6,%d4,#-1,(%a2)+,%a3,%acc2 + mac.l %d6,%d4,#-1,(%a2)+,%d2,%acc1 + mac.l %d6,%d4,#-1,(%a2)+,%d2,%acc2 + mac.l %d6,%d4,#-1,(%a2)+,%a7,%acc1 + mac.l %d6,%d4,#-1,(%a2)+,%a7,%acc2 + mac.l %d6,%d4,#-1,(%a2)+&,%d1,%acc1 + mac.l %d6,%d4,#-1,(%a2)+&,%d1,%acc2 + mac.l %d6,%d4,#-1,(%a2)+&,%a3,%acc1 + mac.l %d6,%d4,#-1,(%a2)+&,%a3,%acc2 + mac.l %d6,%d4,#-1,(%a2)+&,%d2,%acc1 + mac.l %d6,%d4,#-1,(%a2)+&,%d2,%acc2 + mac.l %d6,%d4,#-1,(%a2)+&,%a7,%acc1 + mac.l %d6,%d4,#-1,(%a2)+&,%a7,%acc2 + mac.l %d6,%d4,#-1,10(%a6),%d1,%acc1 + mac.l %d6,%d4,#-1,10(%a6),%d1,%acc2 + mac.l %d6,%d4,#-1,10(%a6),%a3,%acc1 + mac.l %d6,%d4,#-1,10(%a6),%a3,%acc2 + mac.l %d6,%d4,#-1,10(%a6),%d2,%acc1 + mac.l %d6,%d4,#-1,10(%a6),%d2,%acc2 + mac.l %d6,%d4,#-1,10(%a6),%a7,%acc1 + mac.l %d6,%d4,#-1,10(%a6),%a7,%acc2 + mac.l %d6,%d4,#-1,10(%a6)&,%d1,%acc1 + mac.l %d6,%d4,#-1,10(%a6)&,%d1,%acc2 + mac.l %d6,%d4,#-1,10(%a6)&,%a3,%acc1 + mac.l %d6,%d4,#-1,10(%a6)&,%a3,%acc2 + mac.l %d6,%d4,#-1,10(%a6)&,%d2,%acc1 + mac.l %d6,%d4,#-1,10(%a6)&,%d2,%acc2 + mac.l %d6,%d4,#-1,10(%a6)&,%a7,%acc1 + mac.l %d6,%d4,#-1,10(%a6)&,%a7,%acc2 + mac.l %d6,%d4,#-1,-(%a1),%d1,%acc1 + mac.l %d6,%d4,#-1,-(%a1),%d1,%acc2 + mac.l %d6,%d4,#-1,-(%a1),%a3,%acc1 + mac.l %d6,%d4,#-1,-(%a1),%a3,%acc2 + mac.l %d6,%d4,#-1,-(%a1),%d2,%acc1 + mac.l %d6,%d4,#-1,-(%a1),%d2,%acc2 + mac.l %d6,%d4,#-1,-(%a1),%a7,%acc1 + mac.l %d6,%d4,#-1,-(%a1),%a7,%acc2 + mac.l %d6,%d4,#-1,-(%a1)&,%d1,%acc1 + mac.l %d6,%d4,#-1,-(%a1)&,%d1,%acc2 + mac.l %d6,%d4,#-1,-(%a1)&,%a3,%acc1 + mac.l %d6,%d4,#-1,-(%a1)&,%a3,%acc2 + mac.l %d6,%d4,#-1,-(%a1)&,%d2,%acc1 + mac.l %d6,%d4,#-1,-(%a1)&,%d2,%acc2 + mac.l %d6,%d4,#-1,-(%a1)&,%a7,%acc1 + mac.l %d6,%d4,#-1,-(%a1)&,%a7,%acc2 diff --git a/gas/testsuite/gas/m68k/mcf-mac.d b/gas/testsuite/gas/m68k/mcf-mac.d new file mode 100644 index 00000000000..e6f87507e8c --- /dev/null +++ b/gas/testsuite/gas/m68k/mcf-mac.d @@ -0,0 +1,3325 @@ +#name: mcf-mac +#objdump: -d --architecture=m68k:5407 +#as: -m5407 + +.*: file format .* + +Disassembly of section .text: + +00000000 <.text>: + 0: a182 movel %acc,%d2 + 2: a189 movel %acc,%a1 + 4: a989 movel %macsr,%a1 + 6: a982 movel %macsr,%d2 + 8: ad89 movel %mask,%a1 + a: ad82 movel %mask,%d2 + c: a9c0 movel %macsr,%ccr + e: a13c 1234 5678 movel #305419896,%acc + 14: a101 movel %d1,%acc + 16: a10a movel %a2,%acc + 18: a93c 1234 5678 movel #305419896,%macsr + 1e: a901 movel %d1,%macsr + 20: a90a movel %a2,%macsr + 22: ad3c 1234 5678 movel #305419896,%mask + 28: ad01 movel %d1,%mask + 2a: ad0a movel %a2,%mask + 2c: a449 0080 macw %a1l,%a2u, + 30: a449 0280 macw %a1l,%a2u,<< + 34: a449 0680 macw %a1l,%a2u,>> + 38: a449 0280 macw %a1l,%a2u,<< + 3c: a449 0680 macw %a1l,%a2u,>> + 40: a609 0000 macw %a1l,%d3l,>> + 44: a609 0200 macw %a1l,%d3l,<< + 48: a609 0600 macw %a1l,%d3l,>> + 4c: a609 0200 macw %a1l,%d3l,<< + 50: a609 0600 macw %a1l,%d3l,>> + 54: ae49 0080 macw %a1l,%spu,>> + 58: ae49 0280 macw %a1l,%spu,<< + 5c: ae49 0680 macw %a1l,%spu,>> + 60: ae49 0280 macw %a1l,%spu,<< + 64: ae49 0680 macw %a1l,%spu,>> + 68: a209 0000 macw %a1l,%d1l,<< + 6c: a209 0200 macw %a1l,%d1l,<< + 70: a209 0600 macw %a1l,%d1l,>> + 74: a209 0200 macw %a1l,%d1l,<< + 78: a209 0600 macw %a1l,%d1l,>> + 7c: a442 00c0 macw %d2u,%a2u, + 80: a442 02c0 macw %d2u,%a2u,<< + 84: a442 06c0 macw %d2u,%a2u,>> + 88: a442 02c0 macw %d2u,%a2u,<< + 8c: a442 06c0 macw %d2u,%a2u,>> + 90: a602 0040 macw %d2u,%d3l,>> + 94: a602 0240 macw %d2u,%d3l,<< + 98: a602 0640 macw %d2u,%d3l,>> + 9c: a602 0240 macw %d2u,%d3l,<< + a0: a602 0640 macw %d2u,%d3l,>> + a4: ae42 00c0 macw %d2u,%spu,>> + a8: ae42 02c0 macw %d2u,%spu,<< + ac: ae42 06c0 macw %d2u,%spu,>> + b0: ae42 02c0 macw %d2u,%spu,<< + b4: ae42 06c0 macw %d2u,%spu,>> + b8: a202 0040 macw %d2u,%d1l,<< + bc: a202 0240 macw %d2u,%d1l,<< + c0: a202 0640 macw %d2u,%d1l,>> + c4: a202 0240 macw %d2u,%d1l,<< + c8: a202 0640 macw %d2u,%d1l,>> + cc: a44d 0080 macw %a5l,%a2u, + d0: a44d 0280 macw %a5l,%a2u,<< + d4: a44d 0680 macw %a5l,%a2u,>> + d8: a44d 0280 macw %a5l,%a2u,<< + dc: a44d 0680 macw %a5l,%a2u,>> + e0: a60d 0000 macw %a5l,%d3l,>> + e4: a60d 0200 macw %a5l,%d3l,<< + e8: a60d 0600 macw %a5l,%d3l,>> + ec: a60d 0200 macw %a5l,%d3l,<< + f0: a60d 0600 macw %a5l,%d3l,>> + f4: ae4d 0080 macw %a5l,%spu,>> + f8: ae4d 0280 macw %a5l,%spu,<< + fc: ae4d 0680 macw %a5l,%spu,>> + 100: ae4d 0280 macw %a5l,%spu,<< + 104: ae4d 0680 macw %a5l,%spu,>> + 108: a20d 0000 macw %a5l,%d1l,<< + 10c: a20d 0200 macw %a5l,%d1l,<< + 110: a20d 0600 macw %a5l,%d1l,>> + 114: a20d 0200 macw %a5l,%d1l,<< + 118: a20d 0600 macw %a5l,%d1l,>> + 11c: a446 00c0 macw %d6u,%a2u, + 120: a446 02c0 macw %d6u,%a2u,<< + 124: a446 06c0 macw %d6u,%a2u,>> + 128: a446 02c0 macw %d6u,%a2u,<< + 12c: a446 06c0 macw %d6u,%a2u,>> + 130: a606 0040 macw %d6u,%d3l,>> + 134: a606 0240 macw %d6u,%d3l,<< + 138: a606 0640 macw %d6u,%d3l,>> + 13c: a606 0240 macw %d6u,%d3l,<< + 140: a606 0640 macw %d6u,%d3l,>> + 144: ae46 00c0 macw %d6u,%spu,>> + 148: ae46 02c0 macw %d6u,%spu,<< + 14c: ae46 06c0 macw %d6u,%spu,>> + 150: ae46 02c0 macw %d6u,%spu,<< + 154: ae46 06c0 macw %d6u,%spu,>> + 158: a206 0040 macw %d6u,%d1l,<< + 15c: a206 0240 macw %d6u,%d1l,<< + 160: a206 0640 macw %d6u,%d1l,>> + 164: a206 0240 macw %d6u,%d1l,<< + 168: a206 0640 macw %d6u,%d1l,>> + 16c: a293 a089 macw %a1l,%a2u,%a3@,%d1 + 170: a6d3 a089 macw %a1l,%a2u,%a3@,%a3 + 174: a493 a089 macw %a1l,%a2u,%a3@,%d2 + 178: aed3 a089 macw %a1l,%a2u,%a3@,%sp + 17c: a293 a0a9 macw %a1l,%a2u,<<,%a3@&,%d1 + 180: a6d3 a0a9 macw %a1l,%a2u,>>,%a3@&,%a3 + 184: a493 a0a9 macw %a1l,%a2u,,%a3@&,%d2 + 188: aed3 a0a9 macw %a1l,%a2u,>>,%a3@&,%sp + 18c: a29a a089 macw %a1l,%a2u,%a2@\+,%d1 + 190: a6da a089 macw %a1l,%a2u,%a2@\+,%a3 + 194: a49a a089 macw %a1l,%a2u,%a2@\+,%d2 + 198: aeda a089 macw %a1l,%a2u,%a2@\+,%sp + 19c: a29a a0a9 macw %a1l,%a2u,<<,%a2@\+&,%d1 + 1a0: a6da a0a9 macw %a1l,%a2u,>>,%a2@\+&,%a3 + 1a4: a49a a0a9 macw %a1l,%a2u,,%a2@\+&,%d2 + 1a8: aeda a0a9 macw %a1l,%a2u,>>,%a2@\+&,%sp + 1ac: a2ae a089 000a macw %a1l,%a2u,%fp@\(10\),%d1 + 1b2: a6ee a089 000a macw %a1l,%a2u,%fp@\(10\),%a3 + 1b8: a4ae a089 000a macw %a1l,%a2u,%fp@\(10\),%d2 + 1be: aeee a089 000a macw %a1l,%a2u,%fp@\(10\),%sp + 1c4: a2ae a0a9 000a macw %a1l,%a2u,<<,%fp@\(10\)&,%d1 + 1ca: a6ee a0a9 000a macw %a1l,%a2u,>>,%fp@\(10\)&,%a3 + 1d0: a4ae a0a9 000a macw %a1l,%a2u,,%fp@\(10\)&,%d2 + 1d6: aeee a0a9 000a macw %a1l,%a2u,>>,%fp@\(10\)&,%sp + 1dc: a2a1 a089 macw %a1l,%a2u,%a1@-,%d1 + 1e0: a6e1 a089 macw %a1l,%a2u,%a1@-,%a3 + 1e4: a4a1 a089 macw %a1l,%a2u,%a1@-,%d2 + 1e8: aee1 a089 macw %a1l,%a2u,%a1@-,%sp + 1ec: a2a1 a0a9 macw %a1l,%a2u,<<,%a1@-&,%d1 + 1f0: a6e1 a0a9 macw %a1l,%a2u,>>,%a1@-&,%a3 + 1f4: a4a1 a0a9 macw %a1l,%a2u,,%a1@-&,%d2 + 1f8: aee1 a0a9 macw %a1l,%a2u,>>,%a1@-&,%sp + 1fc: a293 a289 macw %a1l,%a2u,<<,%a3@,%d1 + 200: a6d3 a289 macw %a1l,%a2u,>>,%a3@,%a3 + 204: a493 a289 macw %a1l,%a2u,,%a3@,%d2 + 208: aed3 a289 macw %a1l,%a2u,>>,%a3@,%sp + 20c: a293 a2a9 macw %a1l,%a2u,<<,%a3@&,%d1 + 210: a6d3 a2a9 macw %a1l,%a2u,>>,%a3@&,%a3 + 214: a493 a2a9 macw %a1l,%a2u,,%a3@&,%d2 + 218: aed3 a2a9 macw %a1l,%a2u,>>,%a3@&,%sp + 21c: a29a a289 macw %a1l,%a2u,<<,%a2@\+,%d1 + 220: a6da a289 macw %a1l,%a2u,>>,%a2@\+,%a3 + 224: a49a a289 macw %a1l,%a2u,,%a2@\+,%d2 + 228: aeda a289 macw %a1l,%a2u,>>,%a2@\+,%sp + 22c: a29a a2a9 macw %a1l,%a2u,<<,%a2@\+&,%d1 + 230: a6da a2a9 macw %a1l,%a2u,>>,%a2@\+&,%a3 + 234: a49a a2a9 macw %a1l,%a2u,,%a2@\+&,%d2 + 238: aeda a2a9 macw %a1l,%a2u,>>,%a2@\+&,%sp + 23c: a2ae a289 000a macw %a1l,%a2u,<<,%fp@\(10\),%d1 + 242: a6ee a289 000a macw %a1l,%a2u,>>,%fp@\(10\),%a3 + 248: a4ae a289 000a macw %a1l,%a2u,,%fp@\(10\),%d2 + 24e: aeee a289 000a macw %a1l,%a2u,>>,%fp@\(10\),%sp + 254: a2ae a2a9 000a macw %a1l,%a2u,<<,%fp@\(10\)&,%d1 + 25a: a6ee a2a9 000a macw %a1l,%a2u,>>,%fp@\(10\)&,%a3 + 260: a4ae a2a9 000a macw %a1l,%a2u,,%fp@\(10\)&,%d2 + 266: aeee a2a9 000a macw %a1l,%a2u,>>,%fp@\(10\)&,%sp + 26c: a2a1 a289 macw %a1l,%a2u,<<,%a1@-,%d1 + 270: a6e1 a289 macw %a1l,%a2u,>>,%a1@-,%a3 + 274: a4a1 a289 macw %a1l,%a2u,,%a1@-,%d2 + 278: aee1 a289 macw %a1l,%a2u,>>,%a1@-,%sp + 27c: a2a1 a2a9 macw %a1l,%a2u,<<,%a1@-&,%d1 + 280: a6e1 a2a9 macw %a1l,%a2u,>>,%a1@-&,%a3 + 284: a4a1 a2a9 macw %a1l,%a2u,,%a1@-&,%d2 + 288: aee1 a2a9 macw %a1l,%a2u,>>,%a1@-&,%sp + 28c: a293 a689 macw %a1l,%a2u,<<,%a3@,%d1 + 290: a6d3 a689 macw %a1l,%a2u,>>,%a3@,%a3 + 294: a493 a689 macw %a1l,%a2u,,%a3@,%d2 + 298: aed3 a689 macw %a1l,%a2u,>>,%a3@,%sp + 29c: a293 a6a9 macw %a1l,%a2u,<<,%a3@&,%d1 + 2a0: a6d3 a6a9 macw %a1l,%a2u,>>,%a3@&,%a3 + 2a4: a493 a6a9 macw %a1l,%a2u,,%a3@&,%d2 + 2a8: aed3 a6a9 macw %a1l,%a2u,>>,%a3@&,%sp + 2ac: a29a a689 macw %a1l,%a2u,<<,%a2@\+,%d1 + 2b0: a6da a689 macw %a1l,%a2u,>>,%a2@\+,%a3 + 2b4: a49a a689 macw %a1l,%a2u,,%a2@\+,%d2 + 2b8: aeda a689 macw %a1l,%a2u,>>,%a2@\+,%sp + 2bc: a29a a6a9 macw %a1l,%a2u,<<,%a2@\+&,%d1 + 2c0: a6da a6a9 macw %a1l,%a2u,>>,%a2@\+&,%a3 + 2c4: a49a a6a9 macw %a1l,%a2u,,%a2@\+&,%d2 + 2c8: aeda a6a9 macw %a1l,%a2u,>>,%a2@\+&,%sp + 2cc: a2ae a689 000a macw %a1l,%a2u,<<,%fp@\(10\),%d1 + 2d2: a6ee a689 000a macw %a1l,%a2u,>>,%fp@\(10\),%a3 + 2d8: a4ae a689 000a macw %a1l,%a2u,,%fp@\(10\),%d2 + 2de: aeee a689 000a macw %a1l,%a2u,>>,%fp@\(10\),%sp + 2e4: a2ae a6a9 000a macw %a1l,%a2u,<<,%fp@\(10\)&,%d1 + 2ea: a6ee a6a9 000a macw %a1l,%a2u,>>,%fp@\(10\)&,%a3 + 2f0: a4ae a6a9 000a macw %a1l,%a2u,,%fp@\(10\)&,%d2 + 2f6: aeee a6a9 000a macw %a1l,%a2u,>>,%fp@\(10\)&,%sp + 2fc: a2a1 a689 macw %a1l,%a2u,<<,%a1@-,%d1 + 300: a6e1 a689 macw %a1l,%a2u,>>,%a1@-,%a3 + 304: a4a1 a689 macw %a1l,%a2u,,%a1@-,%d2 + 308: aee1 a689 macw %a1l,%a2u,>>,%a1@-,%sp + 30c: a2a1 a6a9 macw %a1l,%a2u,<<,%a1@-&,%d1 + 310: a6e1 a6a9 macw %a1l,%a2u,>>,%a1@-&,%a3 + 314: a4a1 a6a9 macw %a1l,%a2u,,%a1@-&,%d2 + 318: aee1 a6a9 macw %a1l,%a2u,>>,%a1@-&,%sp + 31c: a293 a289 macw %a1l,%a2u,<<,%a3@,%d1 + 320: a6d3 a289 macw %a1l,%a2u,>>,%a3@,%a3 + 324: a493 a289 macw %a1l,%a2u,,%a3@,%d2 + 328: aed3 a289 macw %a1l,%a2u,>>,%a3@,%sp + 32c: a293 a2a9 macw %a1l,%a2u,<<,%a3@&,%d1 + 330: a6d3 a2a9 macw %a1l,%a2u,>>,%a3@&,%a3 + 334: a493 a2a9 macw %a1l,%a2u,,%a3@&,%d2 + 338: aed3 a2a9 macw %a1l,%a2u,>>,%a3@&,%sp + 33c: a29a a289 macw %a1l,%a2u,<<,%a2@\+,%d1 + 340: a6da a289 macw %a1l,%a2u,>>,%a2@\+,%a3 + 344: a49a a289 macw %a1l,%a2u,,%a2@\+,%d2 + 348: aeda a289 macw %a1l,%a2u,>>,%a2@\+,%sp + 34c: a29a a2a9 macw %a1l,%a2u,<<,%a2@\+&,%d1 + 350: a6da a2a9 macw %a1l,%a2u,>>,%a2@\+&,%a3 + 354: a49a a2a9 macw %a1l,%a2u,,%a2@\+&,%d2 + 358: aeda a2a9 macw %a1l,%a2u,>>,%a2@\+&,%sp + 35c: a2ae a289 000a macw %a1l,%a2u,<<,%fp@\(10\),%d1 + 362: a6ee a289 000a macw %a1l,%a2u,>>,%fp@\(10\),%a3 + 368: a4ae a289 000a macw %a1l,%a2u,,%fp@\(10\),%d2 + 36e: aeee a289 000a macw %a1l,%a2u,>>,%fp@\(10\),%sp + 374: a2ae a2a9 000a macw %a1l,%a2u,<<,%fp@\(10\)&,%d1 + 37a: a6ee a2a9 000a macw %a1l,%a2u,>>,%fp@\(10\)&,%a3 + 380: a4ae a2a9 000a macw %a1l,%a2u,,%fp@\(10\)&,%d2 + 386: aeee a2a9 000a macw %a1l,%a2u,>>,%fp@\(10\)&,%sp + 38c: a2a1 a289 macw %a1l,%a2u,<<,%a1@-,%d1 + 390: a6e1 a289 macw %a1l,%a2u,>>,%a1@-,%a3 + 394: a4a1 a289 macw %a1l,%a2u,,%a1@-,%d2 + 398: aee1 a289 macw %a1l,%a2u,>>,%a1@-,%sp + 39c: a2a1 a2a9 macw %a1l,%a2u,<<,%a1@-&,%d1 + 3a0: a6e1 a2a9 macw %a1l,%a2u,>>,%a1@-&,%a3 + 3a4: a4a1 a2a9 macw %a1l,%a2u,,%a1@-&,%d2 + 3a8: aee1 a2a9 macw %a1l,%a2u,>>,%a1@-&,%sp + 3ac: a293 a689 macw %a1l,%a2u,<<,%a3@,%d1 + 3b0: a6d3 a689 macw %a1l,%a2u,>>,%a3@,%a3 + 3b4: a493 a689 macw %a1l,%a2u,,%a3@,%d2 + 3b8: aed3 a689 macw %a1l,%a2u,>>,%a3@,%sp + 3bc: a293 a6a9 macw %a1l,%a2u,<<,%a3@&,%d1 + 3c0: a6d3 a6a9 macw %a1l,%a2u,>>,%a3@&,%a3 + 3c4: a493 a6a9 macw %a1l,%a2u,,%a3@&,%d2 + 3c8: aed3 a6a9 macw %a1l,%a2u,>>,%a3@&,%sp + 3cc: a29a a689 macw %a1l,%a2u,<<,%a2@\+,%d1 + 3d0: a6da a689 macw %a1l,%a2u,>>,%a2@\+,%a3 + 3d4: a49a a689 macw %a1l,%a2u,,%a2@\+,%d2 + 3d8: aeda a689 macw %a1l,%a2u,>>,%a2@\+,%sp + 3dc: a29a a6a9 macw %a1l,%a2u,<<,%a2@\+&,%d1 + 3e0: a6da a6a9 macw %a1l,%a2u,>>,%a2@\+&,%a3 + 3e4: a49a a6a9 macw %a1l,%a2u,,%a2@\+&,%d2 + 3e8: aeda a6a9 macw %a1l,%a2u,>>,%a2@\+&,%sp + 3ec: a2ae a689 000a macw %a1l,%a2u,<<,%fp@\(10\),%d1 + 3f2: a6ee a689 000a macw %a1l,%a2u,>>,%fp@\(10\),%a3 + 3f8: a4ae a689 000a macw %a1l,%a2u,,%fp@\(10\),%d2 + 3fe: aeee a689 000a macw %a1l,%a2u,>>,%fp@\(10\),%sp + 404: a2ae a6a9 000a macw %a1l,%a2u,<<,%fp@\(10\)&,%d1 + 40a: a6ee a6a9 000a macw %a1l,%a2u,>>,%fp@\(10\)&,%a3 + 410: a4ae a6a9 000a macw %a1l,%a2u,,%fp@\(10\)&,%d2 + 416: aeee a6a9 000a macw %a1l,%a2u,>>,%fp@\(10\)&,%sp + 41c: a2a1 a689 macw %a1l,%a2u,<<,%a1@-,%d1 + 420: a6e1 a689 macw %a1l,%a2u,>>,%a1@-,%a3 + 424: a4a1 a689 macw %a1l,%a2u,,%a1@-,%d2 + 428: aee1 a689 macw %a1l,%a2u,>>,%a1@-,%sp + 42c: a2a1 a6a9 macw %a1l,%a2u,<<,%a1@-&,%d1 + 430: a6e1 a6a9 macw %a1l,%a2u,>>,%a1@-&,%a3 + 434: a4a1 a6a9 macw %a1l,%a2u,,%a1@-&,%d2 + 438: aee1 a6a9 macw %a1l,%a2u,>>,%a1@-&,%sp + 43c: a293 3009 macw %a1l,%d3l,%a3@,%d1 + 440: a6d3 3009 macw %a1l,%d3l,%a3@,%a3 + 444: a493 3009 macw %a1l,%d3l,%a3@,%d2 + 448: aed3 3009 macw %a1l,%d3l,%a3@,%sp + 44c: a293 3029 macw %a1l,%d3l,<<,%a3@&,%d1 + 450: a6d3 3029 macw %a1l,%d3l,>>,%a3@&,%a3 + 454: a493 3029 macw %a1l,%d3l,,%a3@&,%d2 + 458: aed3 3029 macw %a1l,%d3l,>>,%a3@&,%sp + 45c: a29a 3009 macw %a1l,%d3l,%a2@\+,%d1 + 460: a6da 3009 macw %a1l,%d3l,%a2@\+,%a3 + 464: a49a 3009 macw %a1l,%d3l,%a2@\+,%d2 + 468: aeda 3009 macw %a1l,%d3l,%a2@\+,%sp + 46c: a29a 3029 macw %a1l,%d3l,<<,%a2@\+&,%d1 + 470: a6da 3029 macw %a1l,%d3l,>>,%a2@\+&,%a3 + 474: a49a 3029 macw %a1l,%d3l,,%a2@\+&,%d2 + 478: aeda 3029 macw %a1l,%d3l,>>,%a2@\+&,%sp + 47c: a2ae 3009 000a macw %a1l,%d3l,%fp@\(10\),%d1 + 482: a6ee 3009 000a macw %a1l,%d3l,%fp@\(10\),%a3 + 488: a4ae 3009 000a macw %a1l,%d3l,%fp@\(10\),%d2 + 48e: aeee 3009 000a macw %a1l,%d3l,%fp@\(10\),%sp + 494: a2ae 3029 000a macw %a1l,%d3l,<<,%fp@\(10\)&,%d1 + 49a: a6ee 3029 000a macw %a1l,%d3l,>>,%fp@\(10\)&,%a3 + 4a0: a4ae 3029 000a macw %a1l,%d3l,,%fp@\(10\)&,%d2 + 4a6: aeee 3029 000a macw %a1l,%d3l,>>,%fp@\(10\)&,%sp + 4ac: a2a1 3009 macw %a1l,%d3l,%a1@-,%d1 + 4b0: a6e1 3009 macw %a1l,%d3l,%a1@-,%a3 + 4b4: a4a1 3009 macw %a1l,%d3l,%a1@-,%d2 + 4b8: aee1 3009 macw %a1l,%d3l,%a1@-,%sp + 4bc: a2a1 3029 macw %a1l,%d3l,<<,%a1@-&,%d1 + 4c0: a6e1 3029 macw %a1l,%d3l,>>,%a1@-&,%a3 + 4c4: a4a1 3029 macw %a1l,%d3l,,%a1@-&,%d2 + 4c8: aee1 3029 macw %a1l,%d3l,>>,%a1@-&,%sp + 4cc: a293 3209 macw %a1l,%d3l,<<,%a3@,%d1 + 4d0: a6d3 3209 macw %a1l,%d3l,>>,%a3@,%a3 + 4d4: a493 3209 macw %a1l,%d3l,,%a3@,%d2 + 4d8: aed3 3209 macw %a1l,%d3l,>>,%a3@,%sp + 4dc: a293 3229 macw %a1l,%d3l,<<,%a3@&,%d1 + 4e0: a6d3 3229 macw %a1l,%d3l,>>,%a3@&,%a3 + 4e4: a493 3229 macw %a1l,%d3l,,%a3@&,%d2 + 4e8: aed3 3229 macw %a1l,%d3l,>>,%a3@&,%sp + 4ec: a29a 3209 macw %a1l,%d3l,<<,%a2@\+,%d1 + 4f0: a6da 3209 macw %a1l,%d3l,>>,%a2@\+,%a3 + 4f4: a49a 3209 macw %a1l,%d3l,,%a2@\+,%d2 + 4f8: aeda 3209 macw %a1l,%d3l,>>,%a2@\+,%sp + 4fc: a29a 3229 macw %a1l,%d3l,<<,%a2@\+&,%d1 + 500: a6da 3229 macw %a1l,%d3l,>>,%a2@\+&,%a3 + 504: a49a 3229 macw %a1l,%d3l,,%a2@\+&,%d2 + 508: aeda 3229 macw %a1l,%d3l,>>,%a2@\+&,%sp + 50c: a2ae 3209 000a macw %a1l,%d3l,<<,%fp@\(10\),%d1 + 512: a6ee 3209 000a macw %a1l,%d3l,>>,%fp@\(10\),%a3 + 518: a4ae 3209 000a macw %a1l,%d3l,,%fp@\(10\),%d2 + 51e: aeee 3209 000a macw %a1l,%d3l,>>,%fp@\(10\),%sp + 524: a2ae 3229 000a macw %a1l,%d3l,<<,%fp@\(10\)&,%d1 + 52a: a6ee 3229 000a macw %a1l,%d3l,>>,%fp@\(10\)&,%a3 + 530: a4ae 3229 000a macw %a1l,%d3l,,%fp@\(10\)&,%d2 + 536: aeee 3229 000a macw %a1l,%d3l,>>,%fp@\(10\)&,%sp + 53c: a2a1 3209 macw %a1l,%d3l,<<,%a1@-,%d1 + 540: a6e1 3209 macw %a1l,%d3l,>>,%a1@-,%a3 + 544: a4a1 3209 macw %a1l,%d3l,,%a1@-,%d2 + 548: aee1 3209 macw %a1l,%d3l,>>,%a1@-,%sp + 54c: a2a1 3229 macw %a1l,%d3l,<<,%a1@-&,%d1 + 550: a6e1 3229 macw %a1l,%d3l,>>,%a1@-&,%a3 + 554: a4a1 3229 macw %a1l,%d3l,,%a1@-&,%d2 + 558: aee1 3229 macw %a1l,%d3l,>>,%a1@-&,%sp + 55c: a293 3609 macw %a1l,%d3l,<<,%a3@,%d1 + 560: a6d3 3609 macw %a1l,%d3l,>>,%a3@,%a3 + 564: a493 3609 macw %a1l,%d3l,,%a3@,%d2 + 568: aed3 3609 macw %a1l,%d3l,>>,%a3@,%sp + 56c: a293 3629 macw %a1l,%d3l,<<,%a3@&,%d1 + 570: a6d3 3629 macw %a1l,%d3l,>>,%a3@&,%a3 + 574: a493 3629 macw %a1l,%d3l,,%a3@&,%d2 + 578: aed3 3629 macw %a1l,%d3l,>>,%a3@&,%sp + 57c: a29a 3609 macw %a1l,%d3l,<<,%a2@\+,%d1 + 580: a6da 3609 macw %a1l,%d3l,>>,%a2@\+,%a3 + 584: a49a 3609 macw %a1l,%d3l,,%a2@\+,%d2 + 588: aeda 3609 macw %a1l,%d3l,>>,%a2@\+,%sp + 58c: a29a 3629 macw %a1l,%d3l,<<,%a2@\+&,%d1 + 590: a6da 3629 macw %a1l,%d3l,>>,%a2@\+&,%a3 + 594: a49a 3629 macw %a1l,%d3l,,%a2@\+&,%d2 + 598: aeda 3629 macw %a1l,%d3l,>>,%a2@\+&,%sp + 59c: a2ae 3609 000a macw %a1l,%d3l,<<,%fp@\(10\),%d1 + 5a2: a6ee 3609 000a macw %a1l,%d3l,>>,%fp@\(10\),%a3 + 5a8: a4ae 3609 000a macw %a1l,%d3l,,%fp@\(10\),%d2 + 5ae: aeee 3609 000a macw %a1l,%d3l,>>,%fp@\(10\),%sp + 5b4: a2ae 3629 000a macw %a1l,%d3l,<<,%fp@\(10\)&,%d1 + 5ba: a6ee 3629 000a macw %a1l,%d3l,>>,%fp@\(10\)&,%a3 + 5c0: a4ae 3629 000a macw %a1l,%d3l,,%fp@\(10\)&,%d2 + 5c6: aeee 3629 000a macw %a1l,%d3l,>>,%fp@\(10\)&,%sp + 5cc: a2a1 3609 macw %a1l,%d3l,<<,%a1@-,%d1 + 5d0: a6e1 3609 macw %a1l,%d3l,>>,%a1@-,%a3 + 5d4: a4a1 3609 macw %a1l,%d3l,,%a1@-,%d2 + 5d8: aee1 3609 macw %a1l,%d3l,>>,%a1@-,%sp + 5dc: a2a1 3629 macw %a1l,%d3l,<<,%a1@-&,%d1 + 5e0: a6e1 3629 macw %a1l,%d3l,>>,%a1@-&,%a3 + 5e4: a4a1 3629 macw %a1l,%d3l,,%a1@-&,%d2 + 5e8: aee1 3629 macw %a1l,%d3l,>>,%a1@-&,%sp + 5ec: a293 3209 macw %a1l,%d3l,<<,%a3@,%d1 + 5f0: a6d3 3209 macw %a1l,%d3l,>>,%a3@,%a3 + 5f4: a493 3209 macw %a1l,%d3l,,%a3@,%d2 + 5f8: aed3 3209 macw %a1l,%d3l,>>,%a3@,%sp + 5fc: a293 3229 macw %a1l,%d3l,<<,%a3@&,%d1 + 600: a6d3 3229 macw %a1l,%d3l,>>,%a3@&,%a3 + 604: a493 3229 macw %a1l,%d3l,,%a3@&,%d2 + 608: aed3 3229 macw %a1l,%d3l,>>,%a3@&,%sp + 60c: a29a 3209 macw %a1l,%d3l,<<,%a2@\+,%d1 + 610: a6da 3209 macw %a1l,%d3l,>>,%a2@\+,%a3 + 614: a49a 3209 macw %a1l,%d3l,,%a2@\+,%d2 + 618: aeda 3209 macw %a1l,%d3l,>>,%a2@\+,%sp + 61c: a29a 3229 macw %a1l,%d3l,<<,%a2@\+&,%d1 + 620: a6da 3229 macw %a1l,%d3l,>>,%a2@\+&,%a3 + 624: a49a 3229 macw %a1l,%d3l,,%a2@\+&,%d2 + 628: aeda 3229 macw %a1l,%d3l,>>,%a2@\+&,%sp + 62c: a2ae 3209 000a macw %a1l,%d3l,<<,%fp@\(10\),%d1 + 632: a6ee 3209 000a macw %a1l,%d3l,>>,%fp@\(10\),%a3 + 638: a4ae 3209 000a macw %a1l,%d3l,,%fp@\(10\),%d2 + 63e: aeee 3209 000a macw %a1l,%d3l,>>,%fp@\(10\),%sp + 644: a2ae 3229 000a macw %a1l,%d3l,<<,%fp@\(10\)&,%d1 + 64a: a6ee 3229 000a macw %a1l,%d3l,>>,%fp@\(10\)&,%a3 + 650: a4ae 3229 000a macw %a1l,%d3l,,%fp@\(10\)&,%d2 + 656: aeee 3229 000a macw %a1l,%d3l,>>,%fp@\(10\)&,%sp + 65c: a2a1 3209 macw %a1l,%d3l,<<,%a1@-,%d1 + 660: a6e1 3209 macw %a1l,%d3l,>>,%a1@-,%a3 + 664: a4a1 3209 macw %a1l,%d3l,,%a1@-,%d2 + 668: aee1 3209 macw %a1l,%d3l,>>,%a1@-,%sp + 66c: a2a1 3229 macw %a1l,%d3l,<<,%a1@-&,%d1 + 670: a6e1 3229 macw %a1l,%d3l,>>,%a1@-&,%a3 + 674: a4a1 3229 macw %a1l,%d3l,,%a1@-&,%d2 + 678: aee1 3229 macw %a1l,%d3l,>>,%a1@-&,%sp + 67c: a293 3609 macw %a1l,%d3l,<<,%a3@,%d1 + 680: a6d3 3609 macw %a1l,%d3l,>>,%a3@,%a3 + 684: a493 3609 macw %a1l,%d3l,,%a3@,%d2 + 688: aed3 3609 macw %a1l,%d3l,>>,%a3@,%sp + 68c: a293 3629 macw %a1l,%d3l,<<,%a3@&,%d1 + 690: a6d3 3629 macw %a1l,%d3l,>>,%a3@&,%a3 + 694: a493 3629 macw %a1l,%d3l,,%a3@&,%d2 + 698: aed3 3629 macw %a1l,%d3l,>>,%a3@&,%sp + 69c: a29a 3609 macw %a1l,%d3l,<<,%a2@\+,%d1 + 6a0: a6da 3609 macw %a1l,%d3l,>>,%a2@\+,%a3 + 6a4: a49a 3609 macw %a1l,%d3l,,%a2@\+,%d2 + 6a8: aeda 3609 macw %a1l,%d3l,>>,%a2@\+,%sp + 6ac: a29a 3629 macw %a1l,%d3l,<<,%a2@\+&,%d1 + 6b0: a6da 3629 macw %a1l,%d3l,>>,%a2@\+&,%a3 + 6b4: a49a 3629 macw %a1l,%d3l,,%a2@\+&,%d2 + 6b8: aeda 3629 macw %a1l,%d3l,>>,%a2@\+&,%sp + 6bc: a2ae 3609 000a macw %a1l,%d3l,<<,%fp@\(10\),%d1 + 6c2: a6ee 3609 000a macw %a1l,%d3l,>>,%fp@\(10\),%a3 + 6c8: a4ae 3609 000a macw %a1l,%d3l,,%fp@\(10\),%d2 + 6ce: aeee 3609 000a macw %a1l,%d3l,>>,%fp@\(10\),%sp + 6d4: a2ae 3629 000a macw %a1l,%d3l,<<,%fp@\(10\)&,%d1 + 6da: a6ee 3629 000a macw %a1l,%d3l,>>,%fp@\(10\)&,%a3 + 6e0: a4ae 3629 000a macw %a1l,%d3l,,%fp@\(10\)&,%d2 + 6e6: aeee 3629 000a macw %a1l,%d3l,>>,%fp@\(10\)&,%sp + 6ec: a2a1 3609 macw %a1l,%d3l,<<,%a1@-,%d1 + 6f0: a6e1 3609 macw %a1l,%d3l,>>,%a1@-,%a3 + 6f4: a4a1 3609 macw %a1l,%d3l,,%a1@-,%d2 + 6f8: aee1 3609 macw %a1l,%d3l,>>,%a1@-,%sp + 6fc: a2a1 3629 macw %a1l,%d3l,<<,%a1@-&,%d1 + 700: a6e1 3629 macw %a1l,%d3l,>>,%a1@-&,%a3 + 704: a4a1 3629 macw %a1l,%d3l,,%a1@-&,%d2 + 708: aee1 3629 macw %a1l,%d3l,>>,%a1@-&,%sp + 70c: a293 f089 macw %a1l,%spu,%a3@,%d1 + 710: a6d3 f089 macw %a1l,%spu,%a3@,%a3 + 714: a493 f089 macw %a1l,%spu,%a3@,%d2 + 718: aed3 f089 macw %a1l,%spu,%a3@,%sp + 71c: a293 f0a9 macw %a1l,%spu,<<,%a3@&,%d1 + 720: a6d3 f0a9 macw %a1l,%spu,>>,%a3@&,%a3 + 724: a493 f0a9 macw %a1l,%spu,,%a3@&,%d2 + 728: aed3 f0a9 macw %a1l,%spu,>>,%a3@&,%sp + 72c: a29a f089 macw %a1l,%spu,%a2@\+,%d1 + 730: a6da f089 macw %a1l,%spu,%a2@\+,%a3 + 734: a49a f089 macw %a1l,%spu,%a2@\+,%d2 + 738: aeda f089 macw %a1l,%spu,%a2@\+,%sp + 73c: a29a f0a9 macw %a1l,%spu,<<,%a2@\+&,%d1 + 740: a6da f0a9 macw %a1l,%spu,>>,%a2@\+&,%a3 + 744: a49a f0a9 macw %a1l,%spu,,%a2@\+&,%d2 + 748: aeda f0a9 macw %a1l,%spu,>>,%a2@\+&,%sp + 74c: a2ae f089 000a macw %a1l,%spu,%fp@\(10\),%d1 + 752: a6ee f089 000a macw %a1l,%spu,%fp@\(10\),%a3 + 758: a4ae f089 000a macw %a1l,%spu,%fp@\(10\),%d2 + 75e: aeee f089 000a macw %a1l,%spu,%fp@\(10\),%sp + 764: a2ae f0a9 000a macw %a1l,%spu,<<,%fp@\(10\)&,%d1 + 76a: a6ee f0a9 000a macw %a1l,%spu,>>,%fp@\(10\)&,%a3 + 770: a4ae f0a9 000a macw %a1l,%spu,,%fp@\(10\)&,%d2 + 776: aeee f0a9 000a macw %a1l,%spu,>>,%fp@\(10\)&,%sp + 77c: a2a1 f089 macw %a1l,%spu,%a1@-,%d1 + 780: a6e1 f089 macw %a1l,%spu,%a1@-,%a3 + 784: a4a1 f089 macw %a1l,%spu,%a1@-,%d2 + 788: aee1 f089 macw %a1l,%spu,%a1@-,%sp + 78c: a2a1 f0a9 macw %a1l,%spu,<<,%a1@-&,%d1 + 790: a6e1 f0a9 macw %a1l,%spu,>>,%a1@-&,%a3 + 794: a4a1 f0a9 macw %a1l,%spu,,%a1@-&,%d2 + 798: aee1 f0a9 macw %a1l,%spu,>>,%a1@-&,%sp + 79c: a293 f289 macw %a1l,%spu,<<,%a3@,%d1 + 7a0: a6d3 f289 macw %a1l,%spu,>>,%a3@,%a3 + 7a4: a493 f289 macw %a1l,%spu,,%a3@,%d2 + 7a8: aed3 f289 macw %a1l,%spu,>>,%a3@,%sp + 7ac: a293 f2a9 macw %a1l,%spu,<<,%a3@&,%d1 + 7b0: a6d3 f2a9 macw %a1l,%spu,>>,%a3@&,%a3 + 7b4: a493 f2a9 macw %a1l,%spu,,%a3@&,%d2 + 7b8: aed3 f2a9 macw %a1l,%spu,>>,%a3@&,%sp + 7bc: a29a f289 macw %a1l,%spu,<<,%a2@\+,%d1 + 7c0: a6da f289 macw %a1l,%spu,>>,%a2@\+,%a3 + 7c4: a49a f289 macw %a1l,%spu,,%a2@\+,%d2 + 7c8: aeda f289 macw %a1l,%spu,>>,%a2@\+,%sp + 7cc: a29a f2a9 macw %a1l,%spu,<<,%a2@\+&,%d1 + 7d0: a6da f2a9 macw %a1l,%spu,>>,%a2@\+&,%a3 + 7d4: a49a f2a9 macw %a1l,%spu,,%a2@\+&,%d2 + 7d8: aeda f2a9 macw %a1l,%spu,>>,%a2@\+&,%sp + 7dc: a2ae f289 000a macw %a1l,%spu,<<,%fp@\(10\),%d1 + 7e2: a6ee f289 000a macw %a1l,%spu,>>,%fp@\(10\),%a3 + 7e8: a4ae f289 000a macw %a1l,%spu,,%fp@\(10\),%d2 + 7ee: aeee f289 000a macw %a1l,%spu,>>,%fp@\(10\),%sp + 7f4: a2ae f2a9 000a macw %a1l,%spu,<<,%fp@\(10\)&,%d1 + 7fa: a6ee f2a9 000a macw %a1l,%spu,>>,%fp@\(10\)&,%a3 + 800: a4ae f2a9 000a macw %a1l,%spu,,%fp@\(10\)&,%d2 + 806: aeee f2a9 000a macw %a1l,%spu,>>,%fp@\(10\)&,%sp + 80c: a2a1 f289 macw %a1l,%spu,<<,%a1@-,%d1 + 810: a6e1 f289 macw %a1l,%spu,>>,%a1@-,%a3 + 814: a4a1 f289 macw %a1l,%spu,,%a1@-,%d2 + 818: aee1 f289 macw %a1l,%spu,>>,%a1@-,%sp + 81c: a2a1 f2a9 macw %a1l,%spu,<<,%a1@-&,%d1 + 820: a6e1 f2a9 macw %a1l,%spu,>>,%a1@-&,%a3 + 824: a4a1 f2a9 macw %a1l,%spu,,%a1@-&,%d2 + 828: aee1 f2a9 macw %a1l,%spu,>>,%a1@-&,%sp + 82c: a293 f689 macw %a1l,%spu,<<,%a3@,%d1 + 830: a6d3 f689 macw %a1l,%spu,>>,%a3@,%a3 + 834: a493 f689 macw %a1l,%spu,,%a3@,%d2 + 838: aed3 f689 macw %a1l,%spu,>>,%a3@,%sp + 83c: a293 f6a9 macw %a1l,%spu,<<,%a3@&,%d1 + 840: a6d3 f6a9 macw %a1l,%spu,>>,%a3@&,%a3 + 844: a493 f6a9 macw %a1l,%spu,,%a3@&,%d2 + 848: aed3 f6a9 macw %a1l,%spu,>>,%a3@&,%sp + 84c: a29a f689 macw %a1l,%spu,<<,%a2@\+,%d1 + 850: a6da f689 macw %a1l,%spu,>>,%a2@\+,%a3 + 854: a49a f689 macw %a1l,%spu,,%a2@\+,%d2 + 858: aeda f689 macw %a1l,%spu,>>,%a2@\+,%sp + 85c: a29a f6a9 macw %a1l,%spu,<<,%a2@\+&,%d1 + 860: a6da f6a9 macw %a1l,%spu,>>,%a2@\+&,%a3 + 864: a49a f6a9 macw %a1l,%spu,,%a2@\+&,%d2 + 868: aeda f6a9 macw %a1l,%spu,>>,%a2@\+&,%sp + 86c: a2ae f689 000a macw %a1l,%spu,<<,%fp@\(10\),%d1 + 872: a6ee f689 000a macw %a1l,%spu,>>,%fp@\(10\),%a3 + 878: a4ae f689 000a macw %a1l,%spu,,%fp@\(10\),%d2 + 87e: aeee f689 000a macw %a1l,%spu,>>,%fp@\(10\),%sp + 884: a2ae f6a9 000a macw %a1l,%spu,<<,%fp@\(10\)&,%d1 + 88a: a6ee f6a9 000a macw %a1l,%spu,>>,%fp@\(10\)&,%a3 + 890: a4ae f6a9 000a macw %a1l,%spu,,%fp@\(10\)&,%d2 + 896: aeee f6a9 000a macw %a1l,%spu,>>,%fp@\(10\)&,%sp + 89c: a2a1 f689 macw %a1l,%spu,<<,%a1@-,%d1 + 8a0: a6e1 f689 macw %a1l,%spu,>>,%a1@-,%a3 + 8a4: a4a1 f689 macw %a1l,%spu,,%a1@-,%d2 + 8a8: aee1 f689 macw %a1l,%spu,>>,%a1@-,%sp + 8ac: a2a1 f6a9 macw %a1l,%spu,<<,%a1@-&,%d1 + 8b0: a6e1 f6a9 macw %a1l,%spu,>>,%a1@-&,%a3 + 8b4: a4a1 f6a9 macw %a1l,%spu,,%a1@-&,%d2 + 8b8: aee1 f6a9 macw %a1l,%spu,>>,%a1@-&,%sp + 8bc: a293 f289 macw %a1l,%spu,<<,%a3@,%d1 + 8c0: a6d3 f289 macw %a1l,%spu,>>,%a3@,%a3 + 8c4: a493 f289 macw %a1l,%spu,,%a3@,%d2 + 8c8: aed3 f289 macw %a1l,%spu,>>,%a3@,%sp + 8cc: a293 f2a9 macw %a1l,%spu,<<,%a3@&,%d1 + 8d0: a6d3 f2a9 macw %a1l,%spu,>>,%a3@&,%a3 + 8d4: a493 f2a9 macw %a1l,%spu,,%a3@&,%d2 + 8d8: aed3 f2a9 macw %a1l,%spu,>>,%a3@&,%sp + 8dc: a29a f289 macw %a1l,%spu,<<,%a2@\+,%d1 + 8e0: a6da f289 macw %a1l,%spu,>>,%a2@\+,%a3 + 8e4: a49a f289 macw %a1l,%spu,,%a2@\+,%d2 + 8e8: aeda f289 macw %a1l,%spu,>>,%a2@\+,%sp + 8ec: a29a f2a9 macw %a1l,%spu,<<,%a2@\+&,%d1 + 8f0: a6da f2a9 macw %a1l,%spu,>>,%a2@\+&,%a3 + 8f4: a49a f2a9 macw %a1l,%spu,,%a2@\+&,%d2 + 8f8: aeda f2a9 macw %a1l,%spu,>>,%a2@\+&,%sp + 8fc: a2ae f289 000a macw %a1l,%spu,<<,%fp@\(10\),%d1 + 902: a6ee f289 000a macw %a1l,%spu,>>,%fp@\(10\),%a3 + 908: a4ae f289 000a macw %a1l,%spu,,%fp@\(10\),%d2 + 90e: aeee f289 000a macw %a1l,%spu,>>,%fp@\(10\),%sp + 914: a2ae f2a9 000a macw %a1l,%spu,<<,%fp@\(10\)&,%d1 + 91a: a6ee f2a9 000a macw %a1l,%spu,>>,%fp@\(10\)&,%a3 + 920: a4ae f2a9 000a macw %a1l,%spu,,%fp@\(10\)&,%d2 + 926: aeee f2a9 000a macw %a1l,%spu,>>,%fp@\(10\)&,%sp + 92c: a2a1 f289 macw %a1l,%spu,<<,%a1@-,%d1 + 930: a6e1 f289 macw %a1l,%spu,>>,%a1@-,%a3 + 934: a4a1 f289 macw %a1l,%spu,,%a1@-,%d2 + 938: aee1 f289 macw %a1l,%spu,>>,%a1@-,%sp + 93c: a2a1 f2a9 macw %a1l,%spu,<<,%a1@-&,%d1 + 940: a6e1 f2a9 macw %a1l,%spu,>>,%a1@-&,%a3 + 944: a4a1 f2a9 macw %a1l,%spu,,%a1@-&,%d2 + 948: aee1 f2a9 macw %a1l,%spu,>>,%a1@-&,%sp + 94c: a293 f689 macw %a1l,%spu,<<,%a3@,%d1 + 950: a6d3 f689 macw %a1l,%spu,>>,%a3@,%a3 + 954: a493 f689 macw %a1l,%spu,,%a3@,%d2 + 958: aed3 f689 macw %a1l,%spu,>>,%a3@,%sp + 95c: a293 f6a9 macw %a1l,%spu,<<,%a3@&,%d1 + 960: a6d3 f6a9 macw %a1l,%spu,>>,%a3@&,%a3 + 964: a493 f6a9 macw %a1l,%spu,,%a3@&,%d2 + 968: aed3 f6a9 macw %a1l,%spu,>>,%a3@&,%sp + 96c: a29a f689 macw %a1l,%spu,<<,%a2@\+,%d1 + 970: a6da f689 macw %a1l,%spu,>>,%a2@\+,%a3 + 974: a49a f689 macw %a1l,%spu,,%a2@\+,%d2 + 978: aeda f689 macw %a1l,%spu,>>,%a2@\+,%sp + 97c: a29a f6a9 macw %a1l,%spu,<<,%a2@\+&,%d1 + 980: a6da f6a9 macw %a1l,%spu,>>,%a2@\+&,%a3 + 984: a49a f6a9 macw %a1l,%spu,,%a2@\+&,%d2 + 988: aeda f6a9 macw %a1l,%spu,>>,%a2@\+&,%sp + 98c: a2ae f689 000a macw %a1l,%spu,<<,%fp@\(10\),%d1 + 992: a6ee f689 000a macw %a1l,%spu,>>,%fp@\(10\),%a3 + 998: a4ae f689 000a macw %a1l,%spu,,%fp@\(10\),%d2 + 99e: aeee f689 000a macw %a1l,%spu,>>,%fp@\(10\),%sp + 9a4: a2ae f6a9 000a macw %a1l,%spu,<<,%fp@\(10\)&,%d1 + 9aa: a6ee f6a9 000a macw %a1l,%spu,>>,%fp@\(10\)&,%a3 + 9b0: a4ae f6a9 000a macw %a1l,%spu,,%fp@\(10\)&,%d2 + 9b6: aeee f6a9 000a macw %a1l,%spu,>>,%fp@\(10\)&,%sp + 9bc: a2a1 f689 macw %a1l,%spu,<<,%a1@-,%d1 + 9c0: a6e1 f689 macw %a1l,%spu,>>,%a1@-,%a3 + 9c4: a4a1 f689 macw %a1l,%spu,,%a1@-,%d2 + 9c8: aee1 f689 macw %a1l,%spu,>>,%a1@-,%sp + 9cc: a2a1 f6a9 macw %a1l,%spu,<<,%a1@-&,%d1 + 9d0: a6e1 f6a9 macw %a1l,%spu,>>,%a1@-&,%a3 + 9d4: a4a1 f6a9 macw %a1l,%spu,,%a1@-&,%d2 + 9d8: aee1 f6a9 macw %a1l,%spu,>>,%a1@-&,%sp + 9dc: a293 1009 macw %a1l,%d1l,%a3@,%d1 + 9e0: a6d3 1009 macw %a1l,%d1l,%a3@,%a3 + 9e4: a493 1009 macw %a1l,%d1l,%a3@,%d2 + 9e8: aed3 1009 macw %a1l,%d1l,%a3@,%sp + 9ec: a293 1029 macw %a1l,%d1l,<<,%a3@&,%d1 + 9f0: a6d3 1029 macw %a1l,%d1l,>>,%a3@&,%a3 + 9f4: a493 1029 macw %a1l,%d1l,,%a3@&,%d2 + 9f8: aed3 1029 macw %a1l,%d1l,>>,%a3@&,%sp + 9fc: a29a 1009 macw %a1l,%d1l,%a2@\+,%d1 + a00: a6da 1009 macw %a1l,%d1l,%a2@\+,%a3 + a04: a49a 1009 macw %a1l,%d1l,%a2@\+,%d2 + a08: aeda 1009 macw %a1l,%d1l,%a2@\+,%sp + a0c: a29a 1029 macw %a1l,%d1l,<<,%a2@\+&,%d1 + a10: a6da 1029 macw %a1l,%d1l,>>,%a2@\+&,%a3 + a14: a49a 1029 macw %a1l,%d1l,,%a2@\+&,%d2 + a18: aeda 1029 macw %a1l,%d1l,>>,%a2@\+&,%sp + a1c: a2ae 1009 000a macw %a1l,%d1l,%fp@\(10\),%d1 + a22: a6ee 1009 000a macw %a1l,%d1l,%fp@\(10\),%a3 + a28: a4ae 1009 000a macw %a1l,%d1l,%fp@\(10\),%d2 + a2e: aeee 1009 000a macw %a1l,%d1l,%fp@\(10\),%sp + a34: a2ae 1029 000a macw %a1l,%d1l,<<,%fp@\(10\)&,%d1 + a3a: a6ee 1029 000a macw %a1l,%d1l,>>,%fp@\(10\)&,%a3 + a40: a4ae 1029 000a macw %a1l,%d1l,,%fp@\(10\)&,%d2 + a46: aeee 1029 000a macw %a1l,%d1l,>>,%fp@\(10\)&,%sp + a4c: a2a1 1009 macw %a1l,%d1l,%a1@-,%d1 + a50: a6e1 1009 macw %a1l,%d1l,%a1@-,%a3 + a54: a4a1 1009 macw %a1l,%d1l,%a1@-,%d2 + a58: aee1 1009 macw %a1l,%d1l,%a1@-,%sp + a5c: a2a1 1029 macw %a1l,%d1l,<<,%a1@-&,%d1 + a60: a6e1 1029 macw %a1l,%d1l,>>,%a1@-&,%a3 + a64: a4a1 1029 macw %a1l,%d1l,,%a1@-&,%d2 + a68: aee1 1029 macw %a1l,%d1l,>>,%a1@-&,%sp + a6c: a293 1209 macw %a1l,%d1l,<<,%a3@,%d1 + a70: a6d3 1209 macw %a1l,%d1l,>>,%a3@,%a3 + a74: a493 1209 macw %a1l,%d1l,,%a3@,%d2 + a78: aed3 1209 macw %a1l,%d1l,>>,%a3@,%sp + a7c: a293 1229 macw %a1l,%d1l,<<,%a3@&,%d1 + a80: a6d3 1229 macw %a1l,%d1l,>>,%a3@&,%a3 + a84: a493 1229 macw %a1l,%d1l,,%a3@&,%d2 + a88: aed3 1229 macw %a1l,%d1l,>>,%a3@&,%sp + a8c: a29a 1209 macw %a1l,%d1l,<<,%a2@\+,%d1 + a90: a6da 1209 macw %a1l,%d1l,>>,%a2@\+,%a3 + a94: a49a 1209 macw %a1l,%d1l,,%a2@\+,%d2 + a98: aeda 1209 macw %a1l,%d1l,>>,%a2@\+,%sp + a9c: a29a 1229 macw %a1l,%d1l,<<,%a2@\+&,%d1 + aa0: a6da 1229 macw %a1l,%d1l,>>,%a2@\+&,%a3 + aa4: a49a 1229 macw %a1l,%d1l,,%a2@\+&,%d2 + aa8: aeda 1229 macw %a1l,%d1l,>>,%a2@\+&,%sp + aac: a2ae 1209 000a macw %a1l,%d1l,<<,%fp@\(10\),%d1 + ab2: a6ee 1209 000a macw %a1l,%d1l,>>,%fp@\(10\),%a3 + ab8: a4ae 1209 000a macw %a1l,%d1l,,%fp@\(10\),%d2 + abe: aeee 1209 000a macw %a1l,%d1l,>>,%fp@\(10\),%sp + ac4: a2ae 1229 000a macw %a1l,%d1l,<<,%fp@\(10\)&,%d1 + aca: a6ee 1229 000a macw %a1l,%d1l,>>,%fp@\(10\)&,%a3 + ad0: a4ae 1229 000a macw %a1l,%d1l,,%fp@\(10\)&,%d2 + ad6: aeee 1229 000a macw %a1l,%d1l,>>,%fp@\(10\)&,%sp + adc: a2a1 1209 macw %a1l,%d1l,<<,%a1@-,%d1 + ae0: a6e1 1209 macw %a1l,%d1l,>>,%a1@-,%a3 + ae4: a4a1 1209 macw %a1l,%d1l,,%a1@-,%d2 + ae8: aee1 1209 macw %a1l,%d1l,>>,%a1@-,%sp + aec: a2a1 1229 macw %a1l,%d1l,<<,%a1@-&,%d1 + af0: a6e1 1229 macw %a1l,%d1l,>>,%a1@-&,%a3 + af4: a4a1 1229 macw %a1l,%d1l,,%a1@-&,%d2 + af8: aee1 1229 macw %a1l,%d1l,>>,%a1@-&,%sp + afc: a293 1609 macw %a1l,%d1l,<<,%a3@,%d1 + b00: a6d3 1609 macw %a1l,%d1l,>>,%a3@,%a3 + b04: a493 1609 macw %a1l,%d1l,,%a3@,%d2 + b08: aed3 1609 macw %a1l,%d1l,>>,%a3@,%sp + b0c: a293 1629 macw %a1l,%d1l,<<,%a3@&,%d1 + b10: a6d3 1629 macw %a1l,%d1l,>>,%a3@&,%a3 + b14: a493 1629 macw %a1l,%d1l,,%a3@&,%d2 + b18: aed3 1629 macw %a1l,%d1l,>>,%a3@&,%sp + b1c: a29a 1609 macw %a1l,%d1l,<<,%a2@\+,%d1 + b20: a6da 1609 macw %a1l,%d1l,>>,%a2@\+,%a3 + b24: a49a 1609 macw %a1l,%d1l,,%a2@\+,%d2 + b28: aeda 1609 macw %a1l,%d1l,>>,%a2@\+,%sp + b2c: a29a 1629 macw %a1l,%d1l,<<,%a2@\+&,%d1 + b30: a6da 1629 macw %a1l,%d1l,>>,%a2@\+&,%a3 + b34: a49a 1629 macw %a1l,%d1l,,%a2@\+&,%d2 + b38: aeda 1629 macw %a1l,%d1l,>>,%a2@\+&,%sp + b3c: a2ae 1609 000a macw %a1l,%d1l,<<,%fp@\(10\),%d1 + b42: a6ee 1609 000a macw %a1l,%d1l,>>,%fp@\(10\),%a3 + b48: a4ae 1609 000a macw %a1l,%d1l,,%fp@\(10\),%d2 + b4e: aeee 1609 000a macw %a1l,%d1l,>>,%fp@\(10\),%sp + b54: a2ae 1629 000a macw %a1l,%d1l,<<,%fp@\(10\)&,%d1 + b5a: a6ee 1629 000a macw %a1l,%d1l,>>,%fp@\(10\)&,%a3 + b60: a4ae 1629 000a macw %a1l,%d1l,,%fp@\(10\)&,%d2 + b66: aeee 1629 000a macw %a1l,%d1l,>>,%fp@\(10\)&,%sp + b6c: a2a1 1609 macw %a1l,%d1l,<<,%a1@-,%d1 + b70: a6e1 1609 macw %a1l,%d1l,>>,%a1@-,%a3 + b74: a4a1 1609 macw %a1l,%d1l,,%a1@-,%d2 + b78: aee1 1609 macw %a1l,%d1l,>>,%a1@-,%sp + b7c: a2a1 1629 macw %a1l,%d1l,<<,%a1@-&,%d1 + b80: a6e1 1629 macw %a1l,%d1l,>>,%a1@-&,%a3 + b84: a4a1 1629 macw %a1l,%d1l,,%a1@-&,%d2 + b88: aee1 1629 macw %a1l,%d1l,>>,%a1@-&,%sp + b8c: a293 1209 macw %a1l,%d1l,<<,%a3@,%d1 + b90: a6d3 1209 macw %a1l,%d1l,>>,%a3@,%a3 + b94: a493 1209 macw %a1l,%d1l,,%a3@,%d2 + b98: aed3 1209 macw %a1l,%d1l,>>,%a3@,%sp + b9c: a293 1229 macw %a1l,%d1l,<<,%a3@&,%d1 + ba0: a6d3 1229 macw %a1l,%d1l,>>,%a3@&,%a3 + ba4: a493 1229 macw %a1l,%d1l,,%a3@&,%d2 + ba8: aed3 1229 macw %a1l,%d1l,>>,%a3@&,%sp + bac: a29a 1209 macw %a1l,%d1l,<<,%a2@\+,%d1 + bb0: a6da 1209 macw %a1l,%d1l,>>,%a2@\+,%a3 + bb4: a49a 1209 macw %a1l,%d1l,,%a2@\+,%d2 + bb8: aeda 1209 macw %a1l,%d1l,>>,%a2@\+,%sp + bbc: a29a 1229 macw %a1l,%d1l,<<,%a2@\+&,%d1 + bc0: a6da 1229 macw %a1l,%d1l,>>,%a2@\+&,%a3 + bc4: a49a 1229 macw %a1l,%d1l,,%a2@\+&,%d2 + bc8: aeda 1229 macw %a1l,%d1l,>>,%a2@\+&,%sp + bcc: a2ae 1209 000a macw %a1l,%d1l,<<,%fp@\(10\),%d1 + bd2: a6ee 1209 000a macw %a1l,%d1l,>>,%fp@\(10\),%a3 + bd8: a4ae 1209 000a macw %a1l,%d1l,,%fp@\(10\),%d2 + bde: aeee 1209 000a macw %a1l,%d1l,>>,%fp@\(10\),%sp + be4: a2ae 1229 000a macw %a1l,%d1l,<<,%fp@\(10\)&,%d1 + bea: a6ee 1229 000a macw %a1l,%d1l,>>,%fp@\(10\)&,%a3 + bf0: a4ae 1229 000a macw %a1l,%d1l,,%fp@\(10\)&,%d2 + bf6: aeee 1229 000a macw %a1l,%d1l,>>,%fp@\(10\)&,%sp + bfc: a2a1 1209 macw %a1l,%d1l,<<,%a1@-,%d1 + c00: a6e1 1209 macw %a1l,%d1l,>>,%a1@-,%a3 + c04: a4a1 1209 macw %a1l,%d1l,,%a1@-,%d2 + c08: aee1 1209 macw %a1l,%d1l,>>,%a1@-,%sp + c0c: a2a1 1229 macw %a1l,%d1l,<<,%a1@-&,%d1 + c10: a6e1 1229 macw %a1l,%d1l,>>,%a1@-&,%a3 + c14: a4a1 1229 macw %a1l,%d1l,,%a1@-&,%d2 + c18: aee1 1229 macw %a1l,%d1l,>>,%a1@-&,%sp + c1c: a293 1609 macw %a1l,%d1l,<<,%a3@,%d1 + c20: a6d3 1609 macw %a1l,%d1l,>>,%a3@,%a3 + c24: a493 1609 macw %a1l,%d1l,,%a3@,%d2 + c28: aed3 1609 macw %a1l,%d1l,>>,%a3@,%sp + c2c: a293 1629 macw %a1l,%d1l,<<,%a3@&,%d1 + c30: a6d3 1629 macw %a1l,%d1l,>>,%a3@&,%a3 + c34: a493 1629 macw %a1l,%d1l,,%a3@&,%d2 + c38: aed3 1629 macw %a1l,%d1l,>>,%a3@&,%sp + c3c: a29a 1609 macw %a1l,%d1l,<<,%a2@\+,%d1 + c40: a6da 1609 macw %a1l,%d1l,>>,%a2@\+,%a3 + c44: a49a 1609 macw %a1l,%d1l,,%a2@\+,%d2 + c48: aeda 1609 macw %a1l,%d1l,>>,%a2@\+,%sp + c4c: a29a 1629 macw %a1l,%d1l,<<,%a2@\+&,%d1 + c50: a6da 1629 macw %a1l,%d1l,>>,%a2@\+&,%a3 + c54: a49a 1629 macw %a1l,%d1l,,%a2@\+&,%d2 + c58: aeda 1629 macw %a1l,%d1l,>>,%a2@\+&,%sp + c5c: a2ae 1609 000a macw %a1l,%d1l,<<,%fp@\(10\),%d1 + c62: a6ee 1609 000a macw %a1l,%d1l,>>,%fp@\(10\),%a3 + c68: a4ae 1609 000a macw %a1l,%d1l,,%fp@\(10\),%d2 + c6e: aeee 1609 000a macw %a1l,%d1l,>>,%fp@\(10\),%sp + c74: a2ae 1629 000a macw %a1l,%d1l,<<,%fp@\(10\)&,%d1 + c7a: a6ee 1629 000a macw %a1l,%d1l,>>,%fp@\(10\)&,%a3 + c80: a4ae 1629 000a macw %a1l,%d1l,,%fp@\(10\)&,%d2 + c86: aeee 1629 000a macw %a1l,%d1l,>>,%fp@\(10\)&,%sp + c8c: a2a1 1609 macw %a1l,%d1l,<<,%a1@-,%d1 + c90: a6e1 1609 macw %a1l,%d1l,>>,%a1@-,%a3 + c94: a4a1 1609 macw %a1l,%d1l,,%a1@-,%d2 + c98: aee1 1609 macw %a1l,%d1l,>>,%a1@-,%sp + c9c: a2a1 1629 macw %a1l,%d1l,<<,%a1@-&,%d1 + ca0: a6e1 1629 macw %a1l,%d1l,>>,%a1@-&,%a3 + ca4: a4a1 1629 macw %a1l,%d1l,,%a1@-&,%d2 + ca8: aee1 1629 macw %a1l,%d1l,>>,%a1@-&,%sp + cac: a293 a0c2 macw %d2u,%a2u,%a3@,%d1 + cb0: a6d3 a0c2 macw %d2u,%a2u,%a3@,%a3 + cb4: a493 a0c2 macw %d2u,%a2u,%a3@,%d2 + cb8: aed3 a0c2 macw %d2u,%a2u,%a3@,%sp + cbc: a293 a0e2 macw %d2u,%a2u,<<,%a3@&,%d1 + cc0: a6d3 a0e2 macw %d2u,%a2u,>>,%a3@&,%a3 + cc4: a493 a0e2 macw %d2u,%a2u,,%a3@&,%d2 + cc8: aed3 a0e2 macw %d2u,%a2u,>>,%a3@&,%sp + ccc: a29a a0c2 macw %d2u,%a2u,%a2@\+,%d1 + cd0: a6da a0c2 macw %d2u,%a2u,%a2@\+,%a3 + cd4: a49a a0c2 macw %d2u,%a2u,%a2@\+,%d2 + cd8: aeda a0c2 macw %d2u,%a2u,%a2@\+,%sp + cdc: a29a a0e2 macw %d2u,%a2u,<<,%a2@\+&,%d1 + ce0: a6da a0e2 macw %d2u,%a2u,>>,%a2@\+&,%a3 + ce4: a49a a0e2 macw %d2u,%a2u,,%a2@\+&,%d2 + ce8: aeda a0e2 macw %d2u,%a2u,>>,%a2@\+&,%sp + cec: a2ae a0c2 000a macw %d2u,%a2u,%fp@\(10\),%d1 + cf2: a6ee a0c2 000a macw %d2u,%a2u,%fp@\(10\),%a3 + cf8: a4ae a0c2 000a macw %d2u,%a2u,%fp@\(10\),%d2 + cfe: aeee a0c2 000a macw %d2u,%a2u,%fp@\(10\),%sp + d04: a2ae a0e2 000a macw %d2u,%a2u,<<,%fp@\(10\)&,%d1 + d0a: a6ee a0e2 000a macw %d2u,%a2u,>>,%fp@\(10\)&,%a3 + d10: a4ae a0e2 000a macw %d2u,%a2u,,%fp@\(10\)&,%d2 + d16: aeee a0e2 000a macw %d2u,%a2u,>>,%fp@\(10\)&,%sp + d1c: a2a1 a0c2 macw %d2u,%a2u,%a1@-,%d1 + d20: a6e1 a0c2 macw %d2u,%a2u,%a1@-,%a3 + d24: a4a1 a0c2 macw %d2u,%a2u,%a1@-,%d2 + d28: aee1 a0c2 macw %d2u,%a2u,%a1@-,%sp + d2c: a2a1 a0e2 macw %d2u,%a2u,<<,%a1@-&,%d1 + d30: a6e1 a0e2 macw %d2u,%a2u,>>,%a1@-&,%a3 + d34: a4a1 a0e2 macw %d2u,%a2u,,%a1@-&,%d2 + d38: aee1 a0e2 macw %d2u,%a2u,>>,%a1@-&,%sp + d3c: a293 a2c2 macw %d2u,%a2u,<<,%a3@,%d1 + d40: a6d3 a2c2 macw %d2u,%a2u,>>,%a3@,%a3 + d44: a493 a2c2 macw %d2u,%a2u,,%a3@,%d2 + d48: aed3 a2c2 macw %d2u,%a2u,>>,%a3@,%sp + d4c: a293 a2e2 macw %d2u,%a2u,<<,%a3@&,%d1 + d50: a6d3 a2e2 macw %d2u,%a2u,>>,%a3@&,%a3 + d54: a493 a2e2 macw %d2u,%a2u,,%a3@&,%d2 + d58: aed3 a2e2 macw %d2u,%a2u,>>,%a3@&,%sp + d5c: a29a a2c2 macw %d2u,%a2u,<<,%a2@\+,%d1 + d60: a6da a2c2 macw %d2u,%a2u,>>,%a2@\+,%a3 + d64: a49a a2c2 macw %d2u,%a2u,,%a2@\+,%d2 + d68: aeda a2c2 macw %d2u,%a2u,>>,%a2@\+,%sp + d6c: a29a a2e2 macw %d2u,%a2u,<<,%a2@\+&,%d1 + d70: a6da a2e2 macw %d2u,%a2u,>>,%a2@\+&,%a3 + d74: a49a a2e2 macw %d2u,%a2u,,%a2@\+&,%d2 + d78: aeda a2e2 macw %d2u,%a2u,>>,%a2@\+&,%sp + d7c: a2ae a2c2 000a macw %d2u,%a2u,<<,%fp@\(10\),%d1 + d82: a6ee a2c2 000a macw %d2u,%a2u,>>,%fp@\(10\),%a3 + d88: a4ae a2c2 000a macw %d2u,%a2u,,%fp@\(10\),%d2 + d8e: aeee a2c2 000a macw %d2u,%a2u,>>,%fp@\(10\),%sp + d94: a2ae a2e2 000a macw %d2u,%a2u,<<,%fp@\(10\)&,%d1 + d9a: a6ee a2e2 000a macw %d2u,%a2u,>>,%fp@\(10\)&,%a3 + da0: a4ae a2e2 000a macw %d2u,%a2u,,%fp@\(10\)&,%d2 + da6: aeee a2e2 000a macw %d2u,%a2u,>>,%fp@\(10\)&,%sp + dac: a2a1 a2c2 macw %d2u,%a2u,<<,%a1@-,%d1 + db0: a6e1 a2c2 macw %d2u,%a2u,>>,%a1@-,%a3 + db4: a4a1 a2c2 macw %d2u,%a2u,,%a1@-,%d2 + db8: aee1 a2c2 macw %d2u,%a2u,>>,%a1@-,%sp + dbc: a2a1 a2e2 macw %d2u,%a2u,<<,%a1@-&,%d1 + dc0: a6e1 a2e2 macw %d2u,%a2u,>>,%a1@-&,%a3 + dc4: a4a1 a2e2 macw %d2u,%a2u,,%a1@-&,%d2 + dc8: aee1 a2e2 macw %d2u,%a2u,>>,%a1@-&,%sp + dcc: a293 a6c2 macw %d2u,%a2u,<<,%a3@,%d1 + dd0: a6d3 a6c2 macw %d2u,%a2u,>>,%a3@,%a3 + dd4: a493 a6c2 macw %d2u,%a2u,,%a3@,%d2 + dd8: aed3 a6c2 macw %d2u,%a2u,>>,%a3@,%sp + ddc: a293 a6e2 macw %d2u,%a2u,<<,%a3@&,%d1 + de0: a6d3 a6e2 macw %d2u,%a2u,>>,%a3@&,%a3 + de4: a493 a6e2 macw %d2u,%a2u,,%a3@&,%d2 + de8: aed3 a6e2 macw %d2u,%a2u,>>,%a3@&,%sp + dec: a29a a6c2 macw %d2u,%a2u,<<,%a2@\+,%d1 + df0: a6da a6c2 macw %d2u,%a2u,>>,%a2@\+,%a3 + df4: a49a a6c2 macw %d2u,%a2u,,%a2@\+,%d2 + df8: aeda a6c2 macw %d2u,%a2u,>>,%a2@\+,%sp + dfc: a29a a6e2 macw %d2u,%a2u,<<,%a2@\+&,%d1 + e00: a6da a6e2 macw %d2u,%a2u,>>,%a2@\+&,%a3 + e04: a49a a6e2 macw %d2u,%a2u,,%a2@\+&,%d2 + e08: aeda a6e2 macw %d2u,%a2u,>>,%a2@\+&,%sp + e0c: a2ae a6c2 000a macw %d2u,%a2u,<<,%fp@\(10\),%d1 + e12: a6ee a6c2 000a macw %d2u,%a2u,>>,%fp@\(10\),%a3 + e18: a4ae a6c2 000a macw %d2u,%a2u,,%fp@\(10\),%d2 + e1e: aeee a6c2 000a macw %d2u,%a2u,>>,%fp@\(10\),%sp + e24: a2ae a6e2 000a macw %d2u,%a2u,<<,%fp@\(10\)&,%d1 + e2a: a6ee a6e2 000a macw %d2u,%a2u,>>,%fp@\(10\)&,%a3 + e30: a4ae a6e2 000a macw %d2u,%a2u,,%fp@\(10\)&,%d2 + e36: aeee a6e2 000a macw %d2u,%a2u,>>,%fp@\(10\)&,%sp + e3c: a2a1 a6c2 macw %d2u,%a2u,<<,%a1@-,%d1 + e40: a6e1 a6c2 macw %d2u,%a2u,>>,%a1@-,%a3 + e44: a4a1 a6c2 macw %d2u,%a2u,,%a1@-,%d2 + e48: aee1 a6c2 macw %d2u,%a2u,>>,%a1@-,%sp + e4c: a2a1 a6e2 macw %d2u,%a2u,<<,%a1@-&,%d1 + e50: a6e1 a6e2 macw %d2u,%a2u,>>,%a1@-&,%a3 + e54: a4a1 a6e2 macw %d2u,%a2u,,%a1@-&,%d2 + e58: aee1 a6e2 macw %d2u,%a2u,>>,%a1@-&,%sp + e5c: a293 a2c2 macw %d2u,%a2u,<<,%a3@,%d1 + e60: a6d3 a2c2 macw %d2u,%a2u,>>,%a3@,%a3 + e64: a493 a2c2 macw %d2u,%a2u,,%a3@,%d2 + e68: aed3 a2c2 macw %d2u,%a2u,>>,%a3@,%sp + e6c: a293 a2e2 macw %d2u,%a2u,<<,%a3@&,%d1 + e70: a6d3 a2e2 macw %d2u,%a2u,>>,%a3@&,%a3 + e74: a493 a2e2 macw %d2u,%a2u,,%a3@&,%d2 + e78: aed3 a2e2 macw %d2u,%a2u,>>,%a3@&,%sp + e7c: a29a a2c2 macw %d2u,%a2u,<<,%a2@\+,%d1 + e80: a6da a2c2 macw %d2u,%a2u,>>,%a2@\+,%a3 + e84: a49a a2c2 macw %d2u,%a2u,,%a2@\+,%d2 + e88: aeda a2c2 macw %d2u,%a2u,>>,%a2@\+,%sp + e8c: a29a a2e2 macw %d2u,%a2u,<<,%a2@\+&,%d1 + e90: a6da a2e2 macw %d2u,%a2u,>>,%a2@\+&,%a3 + e94: a49a a2e2 macw %d2u,%a2u,,%a2@\+&,%d2 + e98: aeda a2e2 macw %d2u,%a2u,>>,%a2@\+&,%sp + e9c: a2ae a2c2 000a macw %d2u,%a2u,<<,%fp@\(10\),%d1 + ea2: a6ee a2c2 000a macw %d2u,%a2u,>>,%fp@\(10\),%a3 + ea8: a4ae a2c2 000a macw %d2u,%a2u,,%fp@\(10\),%d2 + eae: aeee a2c2 000a macw %d2u,%a2u,>>,%fp@\(10\),%sp + eb4: a2ae a2e2 000a macw %d2u,%a2u,<<,%fp@\(10\)&,%d1 + eba: a6ee a2e2 000a macw %d2u,%a2u,>>,%fp@\(10\)&,%a3 + ec0: a4ae a2e2 000a macw %d2u,%a2u,,%fp@\(10\)&,%d2 + ec6: aeee a2e2 000a macw %d2u,%a2u,>>,%fp@\(10\)&,%sp + ecc: a2a1 a2c2 macw %d2u,%a2u,<<,%a1@-,%d1 + ed0: a6e1 a2c2 macw %d2u,%a2u,>>,%a1@-,%a3 + ed4: a4a1 a2c2 macw %d2u,%a2u,,%a1@-,%d2 + ed8: aee1 a2c2 macw %d2u,%a2u,>>,%a1@-,%sp + edc: a2a1 a2e2 macw %d2u,%a2u,<<,%a1@-&,%d1 + ee0: a6e1 a2e2 macw %d2u,%a2u,>>,%a1@-&,%a3 + ee4: a4a1 a2e2 macw %d2u,%a2u,,%a1@-&,%d2 + ee8: aee1 a2e2 macw %d2u,%a2u,>>,%a1@-&,%sp + eec: a293 a6c2 macw %d2u,%a2u,<<,%a3@,%d1 + ef0: a6d3 a6c2 macw %d2u,%a2u,>>,%a3@,%a3 + ef4: a493 a6c2 macw %d2u,%a2u,,%a3@,%d2 + ef8: aed3 a6c2 macw %d2u,%a2u,>>,%a3@,%sp + efc: a293 a6e2 macw %d2u,%a2u,<<,%a3@&,%d1 + f00: a6d3 a6e2 macw %d2u,%a2u,>>,%a3@&,%a3 + f04: a493 a6e2 macw %d2u,%a2u,,%a3@&,%d2 + f08: aed3 a6e2 macw %d2u,%a2u,>>,%a3@&,%sp + f0c: a29a a6c2 macw %d2u,%a2u,<<,%a2@\+,%d1 + f10: a6da a6c2 macw %d2u,%a2u,>>,%a2@\+,%a3 + f14: a49a a6c2 macw %d2u,%a2u,,%a2@\+,%d2 + f18: aeda a6c2 macw %d2u,%a2u,>>,%a2@\+,%sp + f1c: a29a a6e2 macw %d2u,%a2u,<<,%a2@\+&,%d1 + f20: a6da a6e2 macw %d2u,%a2u,>>,%a2@\+&,%a3 + f24: a49a a6e2 macw %d2u,%a2u,,%a2@\+&,%d2 + f28: aeda a6e2 macw %d2u,%a2u,>>,%a2@\+&,%sp + f2c: a2ae a6c2 000a macw %d2u,%a2u,<<,%fp@\(10\),%d1 + f32: a6ee a6c2 000a macw %d2u,%a2u,>>,%fp@\(10\),%a3 + f38: a4ae a6c2 000a macw %d2u,%a2u,,%fp@\(10\),%d2 + f3e: aeee a6c2 000a macw %d2u,%a2u,>>,%fp@\(10\),%sp + f44: a2ae a6e2 000a macw %d2u,%a2u,<<,%fp@\(10\)&,%d1 + f4a: a6ee a6e2 000a macw %d2u,%a2u,>>,%fp@\(10\)&,%a3 + f50: a4ae a6e2 000a macw %d2u,%a2u,,%fp@\(10\)&,%d2 + f56: aeee a6e2 000a macw %d2u,%a2u,>>,%fp@\(10\)&,%sp + f5c: a2a1 a6c2 macw %d2u,%a2u,<<,%a1@-,%d1 + f60: a6e1 a6c2 macw %d2u,%a2u,>>,%a1@-,%a3 + f64: a4a1 a6c2 macw %d2u,%a2u,,%a1@-,%d2 + f68: aee1 a6c2 macw %d2u,%a2u,>>,%a1@-,%sp + f6c: a2a1 a6e2 macw %d2u,%a2u,<<,%a1@-&,%d1 + f70: a6e1 a6e2 macw %d2u,%a2u,>>,%a1@-&,%a3 + f74: a4a1 a6e2 macw %d2u,%a2u,,%a1@-&,%d2 + f78: aee1 a6e2 macw %d2u,%a2u,>>,%a1@-&,%sp + f7c: a293 3042 macw %d2u,%d3l,%a3@,%d1 + f80: a6d3 3042 macw %d2u,%d3l,%a3@,%a3 + f84: a493 3042 macw %d2u,%d3l,%a3@,%d2 + f88: aed3 3042 macw %d2u,%d3l,%a3@,%sp + f8c: a293 3062 macw %d2u,%d3l,<<,%a3@&,%d1 + f90: a6d3 3062 macw %d2u,%d3l,>>,%a3@&,%a3 + f94: a493 3062 macw %d2u,%d3l,,%a3@&,%d2 + f98: aed3 3062 macw %d2u,%d3l,>>,%a3@&,%sp + f9c: a29a 3042 macw %d2u,%d3l,%a2@\+,%d1 + fa0: a6da 3042 macw %d2u,%d3l,%a2@\+,%a3 + fa4: a49a 3042 macw %d2u,%d3l,%a2@\+,%d2 + fa8: aeda 3042 macw %d2u,%d3l,%a2@\+,%sp + fac: a29a 3062 macw %d2u,%d3l,<<,%a2@\+&,%d1 + fb0: a6da 3062 macw %d2u,%d3l,>>,%a2@\+&,%a3 + fb4: a49a 3062 macw %d2u,%d3l,,%a2@\+&,%d2 + fb8: aeda 3062 macw %d2u,%d3l,>>,%a2@\+&,%sp + fbc: a2ae 3042 000a macw %d2u,%d3l,%fp@\(10\),%d1 + fc2: a6ee 3042 000a macw %d2u,%d3l,%fp@\(10\),%a3 + fc8: a4ae 3042 000a macw %d2u,%d3l,%fp@\(10\),%d2 + fce: aeee 3042 000a macw %d2u,%d3l,%fp@\(10\),%sp + fd4: a2ae 3062 000a macw %d2u,%d3l,<<,%fp@\(10\)&,%d1 + fda: a6ee 3062 000a macw %d2u,%d3l,>>,%fp@\(10\)&,%a3 + fe0: a4ae 3062 000a macw %d2u,%d3l,,%fp@\(10\)&,%d2 + fe6: aeee 3062 000a macw %d2u,%d3l,>>,%fp@\(10\)&,%sp + fec: a2a1 3042 macw %d2u,%d3l,%a1@-,%d1 + ff0: a6e1 3042 macw %d2u,%d3l,%a1@-,%a3 + ff4: a4a1 3042 macw %d2u,%d3l,%a1@-,%d2 + ff8: aee1 3042 macw %d2u,%d3l,%a1@-,%sp + ffc: a2a1 3062 macw %d2u,%d3l,<<,%a1@-&,%d1 + 1000: a6e1 3062 macw %d2u,%d3l,>>,%a1@-&,%a3 + 1004: a4a1 3062 macw %d2u,%d3l,,%a1@-&,%d2 + 1008: aee1 3062 macw %d2u,%d3l,>>,%a1@-&,%sp + 100c: a293 3242 macw %d2u,%d3l,<<,%a3@,%d1 + 1010: a6d3 3242 macw %d2u,%d3l,>>,%a3@,%a3 + 1014: a493 3242 macw %d2u,%d3l,,%a3@,%d2 + 1018: aed3 3242 macw %d2u,%d3l,>>,%a3@,%sp + 101c: a293 3262 macw %d2u,%d3l,<<,%a3@&,%d1 + 1020: a6d3 3262 macw %d2u,%d3l,>>,%a3@&,%a3 + 1024: a493 3262 macw %d2u,%d3l,,%a3@&,%d2 + 1028: aed3 3262 macw %d2u,%d3l,>>,%a3@&,%sp + 102c: a29a 3242 macw %d2u,%d3l,<<,%a2@\+,%d1 + 1030: a6da 3242 macw %d2u,%d3l,>>,%a2@\+,%a3 + 1034: a49a 3242 macw %d2u,%d3l,,%a2@\+,%d2 + 1038: aeda 3242 macw %d2u,%d3l,>>,%a2@\+,%sp + 103c: a29a 3262 macw %d2u,%d3l,<<,%a2@\+&,%d1 + 1040: a6da 3262 macw %d2u,%d3l,>>,%a2@\+&,%a3 + 1044: a49a 3262 macw %d2u,%d3l,,%a2@\+&,%d2 + 1048: aeda 3262 macw %d2u,%d3l,>>,%a2@\+&,%sp + 104c: a2ae 3242 000a macw %d2u,%d3l,<<,%fp@\(10\),%d1 + 1052: a6ee 3242 000a macw %d2u,%d3l,>>,%fp@\(10\),%a3 + 1058: a4ae 3242 000a macw %d2u,%d3l,,%fp@\(10\),%d2 + 105e: aeee 3242 000a macw %d2u,%d3l,>>,%fp@\(10\),%sp + 1064: a2ae 3262 000a macw %d2u,%d3l,<<,%fp@\(10\)&,%d1 + 106a: a6ee 3262 000a macw %d2u,%d3l,>>,%fp@\(10\)&,%a3 + 1070: a4ae 3262 000a macw %d2u,%d3l,,%fp@\(10\)&,%d2 + 1076: aeee 3262 000a macw %d2u,%d3l,>>,%fp@\(10\)&,%sp + 107c: a2a1 3242 macw %d2u,%d3l,<<,%a1@-,%d1 + 1080: a6e1 3242 macw %d2u,%d3l,>>,%a1@-,%a3 + 1084: a4a1 3242 macw %d2u,%d3l,,%a1@-,%d2 + 1088: aee1 3242 macw %d2u,%d3l,>>,%a1@-,%sp + 108c: a2a1 3262 macw %d2u,%d3l,<<,%a1@-&,%d1 + 1090: a6e1 3262 macw %d2u,%d3l,>>,%a1@-&,%a3 + 1094: a4a1 3262 macw %d2u,%d3l,,%a1@-&,%d2 + 1098: aee1 3262 macw %d2u,%d3l,>>,%a1@-&,%sp + 109c: a293 3642 macw %d2u,%d3l,<<,%a3@,%d1 + 10a0: a6d3 3642 macw %d2u,%d3l,>>,%a3@,%a3 + 10a4: a493 3642 macw %d2u,%d3l,,%a3@,%d2 + 10a8: aed3 3642 macw %d2u,%d3l,>>,%a3@,%sp + 10ac: a293 3662 macw %d2u,%d3l,<<,%a3@&,%d1 + 10b0: a6d3 3662 macw %d2u,%d3l,>>,%a3@&,%a3 + 10b4: a493 3662 macw %d2u,%d3l,,%a3@&,%d2 + 10b8: aed3 3662 macw %d2u,%d3l,>>,%a3@&,%sp + 10bc: a29a 3642 macw %d2u,%d3l,<<,%a2@\+,%d1 + 10c0: a6da 3642 macw %d2u,%d3l,>>,%a2@\+,%a3 + 10c4: a49a 3642 macw %d2u,%d3l,,%a2@\+,%d2 + 10c8: aeda 3642 macw %d2u,%d3l,>>,%a2@\+,%sp + 10cc: a29a 3662 macw %d2u,%d3l,<<,%a2@\+&,%d1 + 10d0: a6da 3662 macw %d2u,%d3l,>>,%a2@\+&,%a3 + 10d4: a49a 3662 macw %d2u,%d3l,,%a2@\+&,%d2 + 10d8: aeda 3662 macw %d2u,%d3l,>>,%a2@\+&,%sp + 10dc: a2ae 3642 000a macw %d2u,%d3l,<<,%fp@\(10\),%d1 + 10e2: a6ee 3642 000a macw %d2u,%d3l,>>,%fp@\(10\),%a3 + 10e8: a4ae 3642 000a macw %d2u,%d3l,,%fp@\(10\),%d2 + 10ee: aeee 3642 000a macw %d2u,%d3l,>>,%fp@\(10\),%sp + 10f4: a2ae 3662 000a macw %d2u,%d3l,<<,%fp@\(10\)&,%d1 + 10fa: a6ee 3662 000a macw %d2u,%d3l,>>,%fp@\(10\)&,%a3 + 1100: a4ae 3662 000a macw %d2u,%d3l,,%fp@\(10\)&,%d2 + 1106: aeee 3662 000a macw %d2u,%d3l,>>,%fp@\(10\)&,%sp + 110c: a2a1 3642 macw %d2u,%d3l,<<,%a1@-,%d1 + 1110: a6e1 3642 macw %d2u,%d3l,>>,%a1@-,%a3 + 1114: a4a1 3642 macw %d2u,%d3l,,%a1@-,%d2 + 1118: aee1 3642 macw %d2u,%d3l,>>,%a1@-,%sp + 111c: a2a1 3662 macw %d2u,%d3l,<<,%a1@-&,%d1 + 1120: a6e1 3662 macw %d2u,%d3l,>>,%a1@-&,%a3 + 1124: a4a1 3662 macw %d2u,%d3l,,%a1@-&,%d2 + 1128: aee1 3662 macw %d2u,%d3l,>>,%a1@-&,%sp + 112c: a293 3242 macw %d2u,%d3l,<<,%a3@,%d1 + 1130: a6d3 3242 macw %d2u,%d3l,>>,%a3@,%a3 + 1134: a493 3242 macw %d2u,%d3l,,%a3@,%d2 + 1138: aed3 3242 macw %d2u,%d3l,>>,%a3@,%sp + 113c: a293 3262 macw %d2u,%d3l,<<,%a3@&,%d1 + 1140: a6d3 3262 macw %d2u,%d3l,>>,%a3@&,%a3 + 1144: a493 3262 macw %d2u,%d3l,,%a3@&,%d2 + 1148: aed3 3262 macw %d2u,%d3l,>>,%a3@&,%sp + 114c: a29a 3242 macw %d2u,%d3l,<<,%a2@\+,%d1 + 1150: a6da 3242 macw %d2u,%d3l,>>,%a2@\+,%a3 + 1154: a49a 3242 macw %d2u,%d3l,,%a2@\+,%d2 + 1158: aeda 3242 macw %d2u,%d3l,>>,%a2@\+,%sp + 115c: a29a 3262 macw %d2u,%d3l,<<,%a2@\+&,%d1 + 1160: a6da 3262 macw %d2u,%d3l,>>,%a2@\+&,%a3 + 1164: a49a 3262 macw %d2u,%d3l,,%a2@\+&,%d2 + 1168: aeda 3262 macw %d2u,%d3l,>>,%a2@\+&,%sp + 116c: a2ae 3242 000a macw %d2u,%d3l,<<,%fp@\(10\),%d1 + 1172: a6ee 3242 000a macw %d2u,%d3l,>>,%fp@\(10\),%a3 + 1178: a4ae 3242 000a macw %d2u,%d3l,,%fp@\(10\),%d2 + 117e: aeee 3242 000a macw %d2u,%d3l,>>,%fp@\(10\),%sp + 1184: a2ae 3262 000a macw %d2u,%d3l,<<,%fp@\(10\)&,%d1 + 118a: a6ee 3262 000a macw %d2u,%d3l,>>,%fp@\(10\)&,%a3 + 1190: a4ae 3262 000a macw %d2u,%d3l,,%fp@\(10\)&,%d2 + 1196: aeee 3262 000a macw %d2u,%d3l,>>,%fp@\(10\)&,%sp + 119c: a2a1 3242 macw %d2u,%d3l,<<,%a1@-,%d1 + 11a0: a6e1 3242 macw %d2u,%d3l,>>,%a1@-,%a3 + 11a4: a4a1 3242 macw %d2u,%d3l,,%a1@-,%d2 + 11a8: aee1 3242 macw %d2u,%d3l,>>,%a1@-,%sp + 11ac: a2a1 3262 macw %d2u,%d3l,<<,%a1@-&,%d1 + 11b0: a6e1 3262 macw %d2u,%d3l,>>,%a1@-&,%a3 + 11b4: a4a1 3262 macw %d2u,%d3l,,%a1@-&,%d2 + 11b8: aee1 3262 macw %d2u,%d3l,>>,%a1@-&,%sp + 11bc: a293 3642 macw %d2u,%d3l,<<,%a3@,%d1 + 11c0: a6d3 3642 macw %d2u,%d3l,>>,%a3@,%a3 + 11c4: a493 3642 macw %d2u,%d3l,,%a3@,%d2 + 11c8: aed3 3642 macw %d2u,%d3l,>>,%a3@,%sp + 11cc: a293 3662 macw %d2u,%d3l,<<,%a3@&,%d1 + 11d0: a6d3 3662 macw %d2u,%d3l,>>,%a3@&,%a3 + 11d4: a493 3662 macw %d2u,%d3l,,%a3@&,%d2 + 11d8: aed3 3662 macw %d2u,%d3l,>>,%a3@&,%sp + 11dc: a29a 3642 macw %d2u,%d3l,<<,%a2@\+,%d1 + 11e0: a6da 3642 macw %d2u,%d3l,>>,%a2@\+,%a3 + 11e4: a49a 3642 macw %d2u,%d3l,,%a2@\+,%d2 + 11e8: aeda 3642 macw %d2u,%d3l,>>,%a2@\+,%sp + 11ec: a29a 3662 macw %d2u,%d3l,<<,%a2@\+&,%d1 + 11f0: a6da 3662 macw %d2u,%d3l,>>,%a2@\+&,%a3 + 11f4: a49a 3662 macw %d2u,%d3l,,%a2@\+&,%d2 + 11f8: aeda 3662 macw %d2u,%d3l,>>,%a2@\+&,%sp + 11fc: a2ae 3642 000a macw %d2u,%d3l,<<,%fp@\(10\),%d1 + 1202: a6ee 3642 000a macw %d2u,%d3l,>>,%fp@\(10\),%a3 + 1208: a4ae 3642 000a macw %d2u,%d3l,,%fp@\(10\),%d2 + 120e: aeee 3642 000a macw %d2u,%d3l,>>,%fp@\(10\),%sp + 1214: a2ae 3662 000a macw %d2u,%d3l,<<,%fp@\(10\)&,%d1 + 121a: a6ee 3662 000a macw %d2u,%d3l,>>,%fp@\(10\)&,%a3 + 1220: a4ae 3662 000a macw %d2u,%d3l,,%fp@\(10\)&,%d2 + 1226: aeee 3662 000a macw %d2u,%d3l,>>,%fp@\(10\)&,%sp + 122c: a2a1 3642 macw %d2u,%d3l,<<,%a1@-,%d1 + 1230: a6e1 3642 macw %d2u,%d3l,>>,%a1@-,%a3 + 1234: a4a1 3642 macw %d2u,%d3l,,%a1@-,%d2 + 1238: aee1 3642 macw %d2u,%d3l,>>,%a1@-,%sp + 123c: a2a1 3662 macw %d2u,%d3l,<<,%a1@-&,%d1 + 1240: a6e1 3662 macw %d2u,%d3l,>>,%a1@-&,%a3 + 1244: a4a1 3662 macw %d2u,%d3l,,%a1@-&,%d2 + 1248: aee1 3662 macw %d2u,%d3l,>>,%a1@-&,%sp + 124c: a293 f0c2 macw %d2u,%spu,%a3@,%d1 + 1250: a6d3 f0c2 macw %d2u,%spu,%a3@,%a3 + 1254: a493 f0c2 macw %d2u,%spu,%a3@,%d2 + 1258: aed3 f0c2 macw %d2u,%spu,%a3@,%sp + 125c: a293 f0e2 macw %d2u,%spu,<<,%a3@&,%d1 + 1260: a6d3 f0e2 macw %d2u,%spu,>>,%a3@&,%a3 + 1264: a493 f0e2 macw %d2u,%spu,,%a3@&,%d2 + 1268: aed3 f0e2 macw %d2u,%spu,>>,%a3@&,%sp + 126c: a29a f0c2 macw %d2u,%spu,%a2@\+,%d1 + 1270: a6da f0c2 macw %d2u,%spu,%a2@\+,%a3 + 1274: a49a f0c2 macw %d2u,%spu,%a2@\+,%d2 + 1278: aeda f0c2 macw %d2u,%spu,%a2@\+,%sp + 127c: a29a f0e2 macw %d2u,%spu,<<,%a2@\+&,%d1 + 1280: a6da f0e2 macw %d2u,%spu,>>,%a2@\+&,%a3 + 1284: a49a f0e2 macw %d2u,%spu,,%a2@\+&,%d2 + 1288: aeda f0e2 macw %d2u,%spu,>>,%a2@\+&,%sp + 128c: a2ae f0c2 000a macw %d2u,%spu,%fp@\(10\),%d1 + 1292: a6ee f0c2 000a macw %d2u,%spu,%fp@\(10\),%a3 + 1298: a4ae f0c2 000a macw %d2u,%spu,%fp@\(10\),%d2 + 129e: aeee f0c2 000a macw %d2u,%spu,%fp@\(10\),%sp + 12a4: a2ae f0e2 000a macw %d2u,%spu,<<,%fp@\(10\)&,%d1 + 12aa: a6ee f0e2 000a macw %d2u,%spu,>>,%fp@\(10\)&,%a3 + 12b0: a4ae f0e2 000a macw %d2u,%spu,,%fp@\(10\)&,%d2 + 12b6: aeee f0e2 000a macw %d2u,%spu,>>,%fp@\(10\)&,%sp + 12bc: a2a1 f0c2 macw %d2u,%spu,%a1@-,%d1 + 12c0: a6e1 f0c2 macw %d2u,%spu,%a1@-,%a3 + 12c4: a4a1 f0c2 macw %d2u,%spu,%a1@-,%d2 + 12c8: aee1 f0c2 macw %d2u,%spu,%a1@-,%sp + 12cc: a2a1 f0e2 macw %d2u,%spu,<<,%a1@-&,%d1 + 12d0: a6e1 f0e2 macw %d2u,%spu,>>,%a1@-&,%a3 + 12d4: a4a1 f0e2 macw %d2u,%spu,,%a1@-&,%d2 + 12d8: aee1 f0e2 macw %d2u,%spu,>>,%a1@-&,%sp + 12dc: a293 f2c2 macw %d2u,%spu,<<,%a3@,%d1 + 12e0: a6d3 f2c2 macw %d2u,%spu,>>,%a3@,%a3 + 12e4: a493 f2c2 macw %d2u,%spu,,%a3@,%d2 + 12e8: aed3 f2c2 macw %d2u,%spu,>>,%a3@,%sp + 12ec: a293 f2e2 macw %d2u,%spu,<<,%a3@&,%d1 + 12f0: a6d3 f2e2 macw %d2u,%spu,>>,%a3@&,%a3 + 12f4: a493 f2e2 macw %d2u,%spu,,%a3@&,%d2 + 12f8: aed3 f2e2 macw %d2u,%spu,>>,%a3@&,%sp + 12fc: a29a f2c2 macw %d2u,%spu,<<,%a2@\+,%d1 + 1300: a6da f2c2 macw %d2u,%spu,>>,%a2@\+,%a3 + 1304: a49a f2c2 macw %d2u,%spu,,%a2@\+,%d2 + 1308: aeda f2c2 macw %d2u,%spu,>>,%a2@\+,%sp + 130c: a29a f2e2 macw %d2u,%spu,<<,%a2@\+&,%d1 + 1310: a6da f2e2 macw %d2u,%spu,>>,%a2@\+&,%a3 + 1314: a49a f2e2 macw %d2u,%spu,,%a2@\+&,%d2 + 1318: aeda f2e2 macw %d2u,%spu,>>,%a2@\+&,%sp + 131c: a2ae f2c2 000a macw %d2u,%spu,<<,%fp@\(10\),%d1 + 1322: a6ee f2c2 000a macw %d2u,%spu,>>,%fp@\(10\),%a3 + 1328: a4ae f2c2 000a macw %d2u,%spu,,%fp@\(10\),%d2 + 132e: aeee f2c2 000a macw %d2u,%spu,>>,%fp@\(10\),%sp + 1334: a2ae f2e2 000a macw %d2u,%spu,<<,%fp@\(10\)&,%d1 + 133a: a6ee f2e2 000a macw %d2u,%spu,>>,%fp@\(10\)&,%a3 + 1340: a4ae f2e2 000a macw %d2u,%spu,,%fp@\(10\)&,%d2 + 1346: aeee f2e2 000a macw %d2u,%spu,>>,%fp@\(10\)&,%sp + 134c: a2a1 f2c2 macw %d2u,%spu,<<,%a1@-,%d1 + 1350: a6e1 f2c2 macw %d2u,%spu,>>,%a1@-,%a3 + 1354: a4a1 f2c2 macw %d2u,%spu,,%a1@-,%d2 + 1358: aee1 f2c2 macw %d2u,%spu,>>,%a1@-,%sp + 135c: a2a1 f2e2 macw %d2u,%spu,<<,%a1@-&,%d1 + 1360: a6e1 f2e2 macw %d2u,%spu,>>,%a1@-&,%a3 + 1364: a4a1 f2e2 macw %d2u,%spu,,%a1@-&,%d2 + 1368: aee1 f2e2 macw %d2u,%spu,>>,%a1@-&,%sp + 136c: a293 f6c2 macw %d2u,%spu,<<,%a3@,%d1 + 1370: a6d3 f6c2 macw %d2u,%spu,>>,%a3@,%a3 + 1374: a493 f6c2 macw %d2u,%spu,,%a3@,%d2 + 1378: aed3 f6c2 macw %d2u,%spu,>>,%a3@,%sp + 137c: a293 f6e2 macw %d2u,%spu,<<,%a3@&,%d1 + 1380: a6d3 f6e2 macw %d2u,%spu,>>,%a3@&,%a3 + 1384: a493 f6e2 macw %d2u,%spu,,%a3@&,%d2 + 1388: aed3 f6e2 macw %d2u,%spu,>>,%a3@&,%sp + 138c: a29a f6c2 macw %d2u,%spu,<<,%a2@\+,%d1 + 1390: a6da f6c2 macw %d2u,%spu,>>,%a2@\+,%a3 + 1394: a49a f6c2 macw %d2u,%spu,,%a2@\+,%d2 + 1398: aeda f6c2 macw %d2u,%spu,>>,%a2@\+,%sp + 139c: a29a f6e2 macw %d2u,%spu,<<,%a2@\+&,%d1 + 13a0: a6da f6e2 macw %d2u,%spu,>>,%a2@\+&,%a3 + 13a4: a49a f6e2 macw %d2u,%spu,,%a2@\+&,%d2 + 13a8: aeda f6e2 macw %d2u,%spu,>>,%a2@\+&,%sp + 13ac: a2ae f6c2 000a macw %d2u,%spu,<<,%fp@\(10\),%d1 + 13b2: a6ee f6c2 000a macw %d2u,%spu,>>,%fp@\(10\),%a3 + 13b8: a4ae f6c2 000a macw %d2u,%spu,,%fp@\(10\),%d2 + 13be: aeee f6c2 000a macw %d2u,%spu,>>,%fp@\(10\),%sp + 13c4: a2ae f6e2 000a macw %d2u,%spu,<<,%fp@\(10\)&,%d1 + 13ca: a6ee f6e2 000a macw %d2u,%spu,>>,%fp@\(10\)&,%a3 + 13d0: a4ae f6e2 000a macw %d2u,%spu,,%fp@\(10\)&,%d2 + 13d6: aeee f6e2 000a macw %d2u,%spu,>>,%fp@\(10\)&,%sp + 13dc: a2a1 f6c2 macw %d2u,%spu,<<,%a1@-,%d1 + 13e0: a6e1 f6c2 macw %d2u,%spu,>>,%a1@-,%a3 + 13e4: a4a1 f6c2 macw %d2u,%spu,,%a1@-,%d2 + 13e8: aee1 f6c2 macw %d2u,%spu,>>,%a1@-,%sp + 13ec: a2a1 f6e2 macw %d2u,%spu,<<,%a1@-&,%d1 + 13f0: a6e1 f6e2 macw %d2u,%spu,>>,%a1@-&,%a3 + 13f4: a4a1 f6e2 macw %d2u,%spu,,%a1@-&,%d2 + 13f8: aee1 f6e2 macw %d2u,%spu,>>,%a1@-&,%sp + 13fc: a293 f2c2 macw %d2u,%spu,<<,%a3@,%d1 + 1400: a6d3 f2c2 macw %d2u,%spu,>>,%a3@,%a3 + 1404: a493 f2c2 macw %d2u,%spu,,%a3@,%d2 + 1408: aed3 f2c2 macw %d2u,%spu,>>,%a3@,%sp + 140c: a293 f2e2 macw %d2u,%spu,<<,%a3@&,%d1 + 1410: a6d3 f2e2 macw %d2u,%spu,>>,%a3@&,%a3 + 1414: a493 f2e2 macw %d2u,%spu,,%a3@&,%d2 + 1418: aed3 f2e2 macw %d2u,%spu,>>,%a3@&,%sp + 141c: a29a f2c2 macw %d2u,%spu,<<,%a2@\+,%d1 + 1420: a6da f2c2 macw %d2u,%spu,>>,%a2@\+,%a3 + 1424: a49a f2c2 macw %d2u,%spu,,%a2@\+,%d2 + 1428: aeda f2c2 macw %d2u,%spu,>>,%a2@\+,%sp + 142c: a29a f2e2 macw %d2u,%spu,<<,%a2@\+&,%d1 + 1430: a6da f2e2 macw %d2u,%spu,>>,%a2@\+&,%a3 + 1434: a49a f2e2 macw %d2u,%spu,,%a2@\+&,%d2 + 1438: aeda f2e2 macw %d2u,%spu,>>,%a2@\+&,%sp + 143c: a2ae f2c2 000a macw %d2u,%spu,<<,%fp@\(10\),%d1 + 1442: a6ee f2c2 000a macw %d2u,%spu,>>,%fp@\(10\),%a3 + 1448: a4ae f2c2 000a macw %d2u,%spu,,%fp@\(10\),%d2 + 144e: aeee f2c2 000a macw %d2u,%spu,>>,%fp@\(10\),%sp + 1454: a2ae f2e2 000a macw %d2u,%spu,<<,%fp@\(10\)&,%d1 + 145a: a6ee f2e2 000a macw %d2u,%spu,>>,%fp@\(10\)&,%a3 + 1460: a4ae f2e2 000a macw %d2u,%spu,,%fp@\(10\)&,%d2 + 1466: aeee f2e2 000a macw %d2u,%spu,>>,%fp@\(10\)&,%sp + 146c: a2a1 f2c2 macw %d2u,%spu,<<,%a1@-,%d1 + 1470: a6e1 f2c2 macw %d2u,%spu,>>,%a1@-,%a3 + 1474: a4a1 f2c2 macw %d2u,%spu,,%a1@-,%d2 + 1478: aee1 f2c2 macw %d2u,%spu,>>,%a1@-,%sp + 147c: a2a1 f2e2 macw %d2u,%spu,<<,%a1@-&,%d1 + 1480: a6e1 f2e2 macw %d2u,%spu,>>,%a1@-&,%a3 + 1484: a4a1 f2e2 macw %d2u,%spu,,%a1@-&,%d2 + 1488: aee1 f2e2 macw %d2u,%spu,>>,%a1@-&,%sp + 148c: a293 f6c2 macw %d2u,%spu,<<,%a3@,%d1 + 1490: a6d3 f6c2 macw %d2u,%spu,>>,%a3@,%a3 + 1494: a493 f6c2 macw %d2u,%spu,,%a3@,%d2 + 1498: aed3 f6c2 macw %d2u,%spu,>>,%a3@,%sp + 149c: a293 f6e2 macw %d2u,%spu,<<,%a3@&,%d1 + 14a0: a6d3 f6e2 macw %d2u,%spu,>>,%a3@&,%a3 + 14a4: a493 f6e2 macw %d2u,%spu,,%a3@&,%d2 + 14a8: aed3 f6e2 macw %d2u,%spu,>>,%a3@&,%sp + 14ac: a29a f6c2 macw %d2u,%spu,<<,%a2@\+,%d1 + 14b0: a6da f6c2 macw %d2u,%spu,>>,%a2@\+,%a3 + 14b4: a49a f6c2 macw %d2u,%spu,,%a2@\+,%d2 + 14b8: aeda f6c2 macw %d2u,%spu,>>,%a2@\+,%sp + 14bc: a29a f6e2 macw %d2u,%spu,<<,%a2@\+&,%d1 + 14c0: a6da f6e2 macw %d2u,%spu,>>,%a2@\+&,%a3 + 14c4: a49a f6e2 macw %d2u,%spu,,%a2@\+&,%d2 + 14c8: aeda f6e2 macw %d2u,%spu,>>,%a2@\+&,%sp + 14cc: a2ae f6c2 000a macw %d2u,%spu,<<,%fp@\(10\),%d1 + 14d2: a6ee f6c2 000a macw %d2u,%spu,>>,%fp@\(10\),%a3 + 14d8: a4ae f6c2 000a macw %d2u,%spu,,%fp@\(10\),%d2 + 14de: aeee f6c2 000a macw %d2u,%spu,>>,%fp@\(10\),%sp + 14e4: a2ae f6e2 000a macw %d2u,%spu,<<,%fp@\(10\)&,%d1 + 14ea: a6ee f6e2 000a macw %d2u,%spu,>>,%fp@\(10\)&,%a3 + 14f0: a4ae f6e2 000a macw %d2u,%spu,,%fp@\(10\)&,%d2 + 14f6: aeee f6e2 000a macw %d2u,%spu,>>,%fp@\(10\)&,%sp + 14fc: a2a1 f6c2 macw %d2u,%spu,<<,%a1@-,%d1 + 1500: a6e1 f6c2 macw %d2u,%spu,>>,%a1@-,%a3 + 1504: a4a1 f6c2 macw %d2u,%spu,,%a1@-,%d2 + 1508: aee1 f6c2 macw %d2u,%spu,>>,%a1@-,%sp + 150c: a2a1 f6e2 macw %d2u,%spu,<<,%a1@-&,%d1 + 1510: a6e1 f6e2 macw %d2u,%spu,>>,%a1@-&,%a3 + 1514: a4a1 f6e2 macw %d2u,%spu,,%a1@-&,%d2 + 1518: aee1 f6e2 macw %d2u,%spu,>>,%a1@-&,%sp + 151c: a293 1042 macw %d2u,%d1l,%a3@,%d1 + 1520: a6d3 1042 macw %d2u,%d1l,%a3@,%a3 + 1524: a493 1042 macw %d2u,%d1l,%a3@,%d2 + 1528: aed3 1042 macw %d2u,%d1l,%a3@,%sp + 152c: a293 1062 macw %d2u,%d1l,<<,%a3@&,%d1 + 1530: a6d3 1062 macw %d2u,%d1l,>>,%a3@&,%a3 + 1534: a493 1062 macw %d2u,%d1l,,%a3@&,%d2 + 1538: aed3 1062 macw %d2u,%d1l,>>,%a3@&,%sp + 153c: a29a 1042 macw %d2u,%d1l,%a2@\+,%d1 + 1540: a6da 1042 macw %d2u,%d1l,%a2@\+,%a3 + 1544: a49a 1042 macw %d2u,%d1l,%a2@\+,%d2 + 1548: aeda 1042 macw %d2u,%d1l,%a2@\+,%sp + 154c: a29a 1062 macw %d2u,%d1l,<<,%a2@\+&,%d1 + 1550: a6da 1062 macw %d2u,%d1l,>>,%a2@\+&,%a3 + 1554: a49a 1062 macw %d2u,%d1l,,%a2@\+&,%d2 + 1558: aeda 1062 macw %d2u,%d1l,>>,%a2@\+&,%sp + 155c: a2ae 1042 000a macw %d2u,%d1l,%fp@\(10\),%d1 + 1562: a6ee 1042 000a macw %d2u,%d1l,%fp@\(10\),%a3 + 1568: a4ae 1042 000a macw %d2u,%d1l,%fp@\(10\),%d2 + 156e: aeee 1042 000a macw %d2u,%d1l,%fp@\(10\),%sp + 1574: a2ae 1062 000a macw %d2u,%d1l,<<,%fp@\(10\)&,%d1 + 157a: a6ee 1062 000a macw %d2u,%d1l,>>,%fp@\(10\)&,%a3 + 1580: a4ae 1062 000a macw %d2u,%d1l,,%fp@\(10\)&,%d2 + 1586: aeee 1062 000a macw %d2u,%d1l,>>,%fp@\(10\)&,%sp + 158c: a2a1 1042 macw %d2u,%d1l,%a1@-,%d1 + 1590: a6e1 1042 macw %d2u,%d1l,%a1@-,%a3 + 1594: a4a1 1042 macw %d2u,%d1l,%a1@-,%d2 + 1598: aee1 1042 macw %d2u,%d1l,%a1@-,%sp + 159c: a2a1 1062 macw %d2u,%d1l,<<,%a1@-&,%d1 + 15a0: a6e1 1062 macw %d2u,%d1l,>>,%a1@-&,%a3 + 15a4: a4a1 1062 macw %d2u,%d1l,,%a1@-&,%d2 + 15a8: aee1 1062 macw %d2u,%d1l,>>,%a1@-&,%sp + 15ac: a293 1242 macw %d2u,%d1l,<<,%a3@,%d1 + 15b0: a6d3 1242 macw %d2u,%d1l,>>,%a3@,%a3 + 15b4: a493 1242 macw %d2u,%d1l,,%a3@,%d2 + 15b8: aed3 1242 macw %d2u,%d1l,>>,%a3@,%sp + 15bc: a293 1262 macw %d2u,%d1l,<<,%a3@&,%d1 + 15c0: a6d3 1262 macw %d2u,%d1l,>>,%a3@&,%a3 + 15c4: a493 1262 macw %d2u,%d1l,,%a3@&,%d2 + 15c8: aed3 1262 macw %d2u,%d1l,>>,%a3@&,%sp + 15cc: a29a 1242 macw %d2u,%d1l,<<,%a2@\+,%d1 + 15d0: a6da 1242 macw %d2u,%d1l,>>,%a2@\+,%a3 + 15d4: a49a 1242 macw %d2u,%d1l,,%a2@\+,%d2 + 15d8: aeda 1242 macw %d2u,%d1l,>>,%a2@\+,%sp + 15dc: a29a 1262 macw %d2u,%d1l,<<,%a2@\+&,%d1 + 15e0: a6da 1262 macw %d2u,%d1l,>>,%a2@\+&,%a3 + 15e4: a49a 1262 macw %d2u,%d1l,,%a2@\+&,%d2 + 15e8: aeda 1262 macw %d2u,%d1l,>>,%a2@\+&,%sp + 15ec: a2ae 1242 000a macw %d2u,%d1l,<<,%fp@\(10\),%d1 + 15f2: a6ee 1242 000a macw %d2u,%d1l,>>,%fp@\(10\),%a3 + 15f8: a4ae 1242 000a macw %d2u,%d1l,,%fp@\(10\),%d2 + 15fe: aeee 1242 000a macw %d2u,%d1l,>>,%fp@\(10\),%sp + 1604: a2ae 1262 000a macw %d2u,%d1l,<<,%fp@\(10\)&,%d1 + 160a: a6ee 1262 000a macw %d2u,%d1l,>>,%fp@\(10\)&,%a3 + 1610: a4ae 1262 000a macw %d2u,%d1l,,%fp@\(10\)&,%d2 + 1616: aeee 1262 000a macw %d2u,%d1l,>>,%fp@\(10\)&,%sp + 161c: a2a1 1242 macw %d2u,%d1l,<<,%a1@-,%d1 + 1620: a6e1 1242 macw %d2u,%d1l,>>,%a1@-,%a3 + 1624: a4a1 1242 macw %d2u,%d1l,,%a1@-,%d2 + 1628: aee1 1242 macw %d2u,%d1l,>>,%a1@-,%sp + 162c: a2a1 1262 macw %d2u,%d1l,<<,%a1@-&,%d1 + 1630: a6e1 1262 macw %d2u,%d1l,>>,%a1@-&,%a3 + 1634: a4a1 1262 macw %d2u,%d1l,,%a1@-&,%d2 + 1638: aee1 1262 macw %d2u,%d1l,>>,%a1@-&,%sp + 163c: a293 1642 macw %d2u,%d1l,<<,%a3@,%d1 + 1640: a6d3 1642 macw %d2u,%d1l,>>,%a3@,%a3 + 1644: a493 1642 macw %d2u,%d1l,,%a3@,%d2 + 1648: aed3 1642 macw %d2u,%d1l,>>,%a3@,%sp + 164c: a293 1662 macw %d2u,%d1l,<<,%a3@&,%d1 + 1650: a6d3 1662 macw %d2u,%d1l,>>,%a3@&,%a3 + 1654: a493 1662 macw %d2u,%d1l,,%a3@&,%d2 + 1658: aed3 1662 macw %d2u,%d1l,>>,%a3@&,%sp + 165c: a29a 1642 macw %d2u,%d1l,<<,%a2@\+,%d1 + 1660: a6da 1642 macw %d2u,%d1l,>>,%a2@\+,%a3 + 1664: a49a 1642 macw %d2u,%d1l,,%a2@\+,%d2 + 1668: aeda 1642 macw %d2u,%d1l,>>,%a2@\+,%sp + 166c: a29a 1662 macw %d2u,%d1l,<<,%a2@\+&,%d1 + 1670: a6da 1662 macw %d2u,%d1l,>>,%a2@\+&,%a3 + 1674: a49a 1662 macw %d2u,%d1l,,%a2@\+&,%d2 + 1678: aeda 1662 macw %d2u,%d1l,>>,%a2@\+&,%sp + 167c: a2ae 1642 000a macw %d2u,%d1l,<<,%fp@\(10\),%d1 + 1682: a6ee 1642 000a macw %d2u,%d1l,>>,%fp@\(10\),%a3 + 1688: a4ae 1642 000a macw %d2u,%d1l,,%fp@\(10\),%d2 + 168e: aeee 1642 000a macw %d2u,%d1l,>>,%fp@\(10\),%sp + 1694: a2ae 1662 000a macw %d2u,%d1l,<<,%fp@\(10\)&,%d1 + 169a: a6ee 1662 000a macw %d2u,%d1l,>>,%fp@\(10\)&,%a3 + 16a0: a4ae 1662 000a macw %d2u,%d1l,,%fp@\(10\)&,%d2 + 16a6: aeee 1662 000a macw %d2u,%d1l,>>,%fp@\(10\)&,%sp + 16ac: a2a1 1642 macw %d2u,%d1l,<<,%a1@-,%d1 + 16b0: a6e1 1642 macw %d2u,%d1l,>>,%a1@-,%a3 + 16b4: a4a1 1642 macw %d2u,%d1l,,%a1@-,%d2 + 16b8: aee1 1642 macw %d2u,%d1l,>>,%a1@-,%sp + 16bc: a2a1 1662 macw %d2u,%d1l,<<,%a1@-&,%d1 + 16c0: a6e1 1662 macw %d2u,%d1l,>>,%a1@-&,%a3 + 16c4: a4a1 1662 macw %d2u,%d1l,,%a1@-&,%d2 + 16c8: aee1 1662 macw %d2u,%d1l,>>,%a1@-&,%sp + 16cc: a293 1242 macw %d2u,%d1l,<<,%a3@,%d1 + 16d0: a6d3 1242 macw %d2u,%d1l,>>,%a3@,%a3 + 16d4: a493 1242 macw %d2u,%d1l,,%a3@,%d2 + 16d8: aed3 1242 macw %d2u,%d1l,>>,%a3@,%sp + 16dc: a293 1262 macw %d2u,%d1l,<<,%a3@&,%d1 + 16e0: a6d3 1262 macw %d2u,%d1l,>>,%a3@&,%a3 + 16e4: a493 1262 macw %d2u,%d1l,,%a3@&,%d2 + 16e8: aed3 1262 macw %d2u,%d1l,>>,%a3@&,%sp + 16ec: a29a 1242 macw %d2u,%d1l,<<,%a2@\+,%d1 + 16f0: a6da 1242 macw %d2u,%d1l,>>,%a2@\+,%a3 + 16f4: a49a 1242 macw %d2u,%d1l,,%a2@\+,%d2 + 16f8: aeda 1242 macw %d2u,%d1l,>>,%a2@\+,%sp + 16fc: a29a 1262 macw %d2u,%d1l,<<,%a2@\+&,%d1 + 1700: a6da 1262 macw %d2u,%d1l,>>,%a2@\+&,%a3 + 1704: a49a 1262 macw %d2u,%d1l,,%a2@\+&,%d2 + 1708: aeda 1262 macw %d2u,%d1l,>>,%a2@\+&,%sp + 170c: a2ae 1242 000a macw %d2u,%d1l,<<,%fp@\(10\),%d1 + 1712: a6ee 1242 000a macw %d2u,%d1l,>>,%fp@\(10\),%a3 + 1718: a4ae 1242 000a macw %d2u,%d1l,,%fp@\(10\),%d2 + 171e: aeee 1242 000a macw %d2u,%d1l,>>,%fp@\(10\),%sp + 1724: a2ae 1262 000a macw %d2u,%d1l,<<,%fp@\(10\)&,%d1 + 172a: a6ee 1262 000a macw %d2u,%d1l,>>,%fp@\(10\)&,%a3 + 1730: a4ae 1262 000a macw %d2u,%d1l,,%fp@\(10\)&,%d2 + 1736: aeee 1262 000a macw %d2u,%d1l,>>,%fp@\(10\)&,%sp + 173c: a2a1 1242 macw %d2u,%d1l,<<,%a1@-,%d1 + 1740: a6e1 1242 macw %d2u,%d1l,>>,%a1@-,%a3 + 1744: a4a1 1242 macw %d2u,%d1l,,%a1@-,%d2 + 1748: aee1 1242 macw %d2u,%d1l,>>,%a1@-,%sp + 174c: a2a1 1262 macw %d2u,%d1l,<<,%a1@-&,%d1 + 1750: a6e1 1262 macw %d2u,%d1l,>>,%a1@-&,%a3 + 1754: a4a1 1262 macw %d2u,%d1l,,%a1@-&,%d2 + 1758: aee1 1262 macw %d2u,%d1l,>>,%a1@-&,%sp + 175c: a293 1642 macw %d2u,%d1l,<<,%a3@,%d1 + 1760: a6d3 1642 macw %d2u,%d1l,>>,%a3@,%a3 + 1764: a493 1642 macw %d2u,%d1l,,%a3@,%d2 + 1768: aed3 1642 macw %d2u,%d1l,>>,%a3@,%sp + 176c: a293 1662 macw %d2u,%d1l,<<,%a3@&,%d1 + 1770: a6d3 1662 macw %d2u,%d1l,>>,%a3@&,%a3 + 1774: a493 1662 macw %d2u,%d1l,,%a3@&,%d2 + 1778: aed3 1662 macw %d2u,%d1l,>>,%a3@&,%sp + 177c: a29a 1642 macw %d2u,%d1l,<<,%a2@\+,%d1 + 1780: a6da 1642 macw %d2u,%d1l,>>,%a2@\+,%a3 + 1784: a49a 1642 macw %d2u,%d1l,,%a2@\+,%d2 + 1788: aeda 1642 macw %d2u,%d1l,>>,%a2@\+,%sp + 178c: a29a 1662 macw %d2u,%d1l,<<,%a2@\+&,%d1 + 1790: a6da 1662 macw %d2u,%d1l,>>,%a2@\+&,%a3 + 1794: a49a 1662 macw %d2u,%d1l,,%a2@\+&,%d2 + 1798: aeda 1662 macw %d2u,%d1l,>>,%a2@\+&,%sp + 179c: a2ae 1642 000a macw %d2u,%d1l,<<,%fp@\(10\),%d1 + 17a2: a6ee 1642 000a macw %d2u,%d1l,>>,%fp@\(10\),%a3 + 17a8: a4ae 1642 000a macw %d2u,%d1l,,%fp@\(10\),%d2 + 17ae: aeee 1642 000a macw %d2u,%d1l,>>,%fp@\(10\),%sp + 17b4: a2ae 1662 000a macw %d2u,%d1l,<<,%fp@\(10\)&,%d1 + 17ba: a6ee 1662 000a macw %d2u,%d1l,>>,%fp@\(10\)&,%a3 + 17c0: a4ae 1662 000a macw %d2u,%d1l,,%fp@\(10\)&,%d2 + 17c6: aeee 1662 000a macw %d2u,%d1l,>>,%fp@\(10\)&,%sp + 17cc: a2a1 1642 macw %d2u,%d1l,<<,%a1@-,%d1 + 17d0: a6e1 1642 macw %d2u,%d1l,>>,%a1@-,%a3 + 17d4: a4a1 1642 macw %d2u,%d1l,,%a1@-,%d2 + 17d8: aee1 1642 macw %d2u,%d1l,>>,%a1@-,%sp + 17dc: a2a1 1662 macw %d2u,%d1l,<<,%a1@-&,%d1 + 17e0: a6e1 1662 macw %d2u,%d1l,>>,%a1@-&,%a3 + 17e4: a4a1 1662 macw %d2u,%d1l,,%a1@-&,%d2 + 17e8: aee1 1662 macw %d2u,%d1l,>>,%a1@-&,%sp + 17ec: a293 a08d macw %a5l,%a2u,%a3@,%d1 + 17f0: a6d3 a08d macw %a5l,%a2u,%a3@,%a3 + 17f4: a493 a08d macw %a5l,%a2u,%a3@,%d2 + 17f8: aed3 a08d macw %a5l,%a2u,%a3@,%sp + 17fc: a293 a0ad macw %a5l,%a2u,<<,%a3@&,%d1 + 1800: a6d3 a0ad macw %a5l,%a2u,>>,%a3@&,%a3 + 1804: a493 a0ad macw %a5l,%a2u,,%a3@&,%d2 + 1808: aed3 a0ad macw %a5l,%a2u,>>,%a3@&,%sp + 180c: a29a a08d macw %a5l,%a2u,%a2@\+,%d1 + 1810: a6da a08d macw %a5l,%a2u,%a2@\+,%a3 + 1814: a49a a08d macw %a5l,%a2u,%a2@\+,%d2 + 1818: aeda a08d macw %a5l,%a2u,%a2@\+,%sp + 181c: a29a a0ad macw %a5l,%a2u,<<,%a2@\+&,%d1 + 1820: a6da a0ad macw %a5l,%a2u,>>,%a2@\+&,%a3 + 1824: a49a a0ad macw %a5l,%a2u,,%a2@\+&,%d2 + 1828: aeda a0ad macw %a5l,%a2u,>>,%a2@\+&,%sp + 182c: a2ae a08d 000a macw %a5l,%a2u,%fp@\(10\),%d1 + 1832: a6ee a08d 000a macw %a5l,%a2u,%fp@\(10\),%a3 + 1838: a4ae a08d 000a macw %a5l,%a2u,%fp@\(10\),%d2 + 183e: aeee a08d 000a macw %a5l,%a2u,%fp@\(10\),%sp + 1844: a2ae a0ad 000a macw %a5l,%a2u,<<,%fp@\(10\)&,%d1 + 184a: a6ee a0ad 000a macw %a5l,%a2u,>>,%fp@\(10\)&,%a3 + 1850: a4ae a0ad 000a macw %a5l,%a2u,,%fp@\(10\)&,%d2 + 1856: aeee a0ad 000a macw %a5l,%a2u,>>,%fp@\(10\)&,%sp + 185c: a2a1 a08d macw %a5l,%a2u,%a1@-,%d1 + 1860: a6e1 a08d macw %a5l,%a2u,%a1@-,%a3 + 1864: a4a1 a08d macw %a5l,%a2u,%a1@-,%d2 + 1868: aee1 a08d macw %a5l,%a2u,%a1@-,%sp + 186c: a2a1 a0ad macw %a5l,%a2u,<<,%a1@-&,%d1 + 1870: a6e1 a0ad macw %a5l,%a2u,>>,%a1@-&,%a3 + 1874: a4a1 a0ad macw %a5l,%a2u,,%a1@-&,%d2 + 1878: aee1 a0ad macw %a5l,%a2u,>>,%a1@-&,%sp + 187c: a293 a28d macw %a5l,%a2u,<<,%a3@,%d1 + 1880: a6d3 a28d macw %a5l,%a2u,>>,%a3@,%a3 + 1884: a493 a28d macw %a5l,%a2u,,%a3@,%d2 + 1888: aed3 a28d macw %a5l,%a2u,>>,%a3@,%sp + 188c: a293 a2ad macw %a5l,%a2u,<<,%a3@&,%d1 + 1890: a6d3 a2ad macw %a5l,%a2u,>>,%a3@&,%a3 + 1894: a493 a2ad macw %a5l,%a2u,,%a3@&,%d2 + 1898: aed3 a2ad macw %a5l,%a2u,>>,%a3@&,%sp + 189c: a29a a28d macw %a5l,%a2u,<<,%a2@\+,%d1 + 18a0: a6da a28d macw %a5l,%a2u,>>,%a2@\+,%a3 + 18a4: a49a a28d macw %a5l,%a2u,,%a2@\+,%d2 + 18a8: aeda a28d macw %a5l,%a2u,>>,%a2@\+,%sp + 18ac: a29a a2ad macw %a5l,%a2u,<<,%a2@\+&,%d1 + 18b0: a6da a2ad macw %a5l,%a2u,>>,%a2@\+&,%a3 + 18b4: a49a a2ad macw %a5l,%a2u,,%a2@\+&,%d2 + 18b8: aeda a2ad macw %a5l,%a2u,>>,%a2@\+&,%sp + 18bc: a2ae a28d 000a macw %a5l,%a2u,<<,%fp@\(10\),%d1 + 18c2: a6ee a28d 000a macw %a5l,%a2u,>>,%fp@\(10\),%a3 + 18c8: a4ae a28d 000a macw %a5l,%a2u,,%fp@\(10\),%d2 + 18ce: aeee a28d 000a macw %a5l,%a2u,>>,%fp@\(10\),%sp + 18d4: a2ae a2ad 000a macw %a5l,%a2u,<<,%fp@\(10\)&,%d1 + 18da: a6ee a2ad 000a macw %a5l,%a2u,>>,%fp@\(10\)&,%a3 + 18e0: a4ae a2ad 000a macw %a5l,%a2u,,%fp@\(10\)&,%d2 + 18e6: aeee a2ad 000a macw %a5l,%a2u,>>,%fp@\(10\)&,%sp + 18ec: a2a1 a28d macw %a5l,%a2u,<<,%a1@-,%d1 + 18f0: a6e1 a28d macw %a5l,%a2u,>>,%a1@-,%a3 + 18f4: a4a1 a28d macw %a5l,%a2u,,%a1@-,%d2 + 18f8: aee1 a28d macw %a5l,%a2u,>>,%a1@-,%sp + 18fc: a2a1 a2ad macw %a5l,%a2u,<<,%a1@-&,%d1 + 1900: a6e1 a2ad macw %a5l,%a2u,>>,%a1@-&,%a3 + 1904: a4a1 a2ad macw %a5l,%a2u,,%a1@-&,%d2 + 1908: aee1 a2ad macw %a5l,%a2u,>>,%a1@-&,%sp + 190c: a293 a68d macw %a5l,%a2u,<<,%a3@,%d1 + 1910: a6d3 a68d macw %a5l,%a2u,>>,%a3@,%a3 + 1914: a493 a68d macw %a5l,%a2u,,%a3@,%d2 + 1918: aed3 a68d macw %a5l,%a2u,>>,%a3@,%sp + 191c: a293 a6ad macw %a5l,%a2u,<<,%a3@&,%d1 + 1920: a6d3 a6ad macw %a5l,%a2u,>>,%a3@&,%a3 + 1924: a493 a6ad macw %a5l,%a2u,,%a3@&,%d2 + 1928: aed3 a6ad macw %a5l,%a2u,>>,%a3@&,%sp + 192c: a29a a68d macw %a5l,%a2u,<<,%a2@\+,%d1 + 1930: a6da a68d macw %a5l,%a2u,>>,%a2@\+,%a3 + 1934: a49a a68d macw %a5l,%a2u,,%a2@\+,%d2 + 1938: aeda a68d macw %a5l,%a2u,>>,%a2@\+,%sp + 193c: a29a a6ad macw %a5l,%a2u,<<,%a2@\+&,%d1 + 1940: a6da a6ad macw %a5l,%a2u,>>,%a2@\+&,%a3 + 1944: a49a a6ad macw %a5l,%a2u,,%a2@\+&,%d2 + 1948: aeda a6ad macw %a5l,%a2u,>>,%a2@\+&,%sp + 194c: a2ae a68d 000a macw %a5l,%a2u,<<,%fp@\(10\),%d1 + 1952: a6ee a68d 000a macw %a5l,%a2u,>>,%fp@\(10\),%a3 + 1958: a4ae a68d 000a macw %a5l,%a2u,,%fp@\(10\),%d2 + 195e: aeee a68d 000a macw %a5l,%a2u,>>,%fp@\(10\),%sp + 1964: a2ae a6ad 000a macw %a5l,%a2u,<<,%fp@\(10\)&,%d1 + 196a: a6ee a6ad 000a macw %a5l,%a2u,>>,%fp@\(10\)&,%a3 + 1970: a4ae a6ad 000a macw %a5l,%a2u,,%fp@\(10\)&,%d2 + 1976: aeee a6ad 000a macw %a5l,%a2u,>>,%fp@\(10\)&,%sp + 197c: a2a1 a68d macw %a5l,%a2u,<<,%a1@-,%d1 + 1980: a6e1 a68d macw %a5l,%a2u,>>,%a1@-,%a3 + 1984: a4a1 a68d macw %a5l,%a2u,,%a1@-,%d2 + 1988: aee1 a68d macw %a5l,%a2u,>>,%a1@-,%sp + 198c: a2a1 a6ad macw %a5l,%a2u,<<,%a1@-&,%d1 + 1990: a6e1 a6ad macw %a5l,%a2u,>>,%a1@-&,%a3 + 1994: a4a1 a6ad macw %a5l,%a2u,,%a1@-&,%d2 + 1998: aee1 a6ad macw %a5l,%a2u,>>,%a1@-&,%sp + 199c: a293 a28d macw %a5l,%a2u,<<,%a3@,%d1 + 19a0: a6d3 a28d macw %a5l,%a2u,>>,%a3@,%a3 + 19a4: a493 a28d macw %a5l,%a2u,,%a3@,%d2 + 19a8: aed3 a28d macw %a5l,%a2u,>>,%a3@,%sp + 19ac: a293 a2ad macw %a5l,%a2u,<<,%a3@&,%d1 + 19b0: a6d3 a2ad macw %a5l,%a2u,>>,%a3@&,%a3 + 19b4: a493 a2ad macw %a5l,%a2u,,%a3@&,%d2 + 19b8: aed3 a2ad macw %a5l,%a2u,>>,%a3@&,%sp + 19bc: a29a a28d macw %a5l,%a2u,<<,%a2@\+,%d1 + 19c0: a6da a28d macw %a5l,%a2u,>>,%a2@\+,%a3 + 19c4: a49a a28d macw %a5l,%a2u,,%a2@\+,%d2 + 19c8: aeda a28d macw %a5l,%a2u,>>,%a2@\+,%sp + 19cc: a29a a2ad macw %a5l,%a2u,<<,%a2@\+&,%d1 + 19d0: a6da a2ad macw %a5l,%a2u,>>,%a2@\+&,%a3 + 19d4: a49a a2ad macw %a5l,%a2u,,%a2@\+&,%d2 + 19d8: aeda a2ad macw %a5l,%a2u,>>,%a2@\+&,%sp + 19dc: a2ae a28d 000a macw %a5l,%a2u,<<,%fp@\(10\),%d1 + 19e2: a6ee a28d 000a macw %a5l,%a2u,>>,%fp@\(10\),%a3 + 19e8: a4ae a28d 000a macw %a5l,%a2u,,%fp@\(10\),%d2 + 19ee: aeee a28d 000a macw %a5l,%a2u,>>,%fp@\(10\),%sp + 19f4: a2ae a2ad 000a macw %a5l,%a2u,<<,%fp@\(10\)&,%d1 + 19fa: a6ee a2ad 000a macw %a5l,%a2u,>>,%fp@\(10\)&,%a3 + 1a00: a4ae a2ad 000a macw %a5l,%a2u,,%fp@\(10\)&,%d2 + 1a06: aeee a2ad 000a macw %a5l,%a2u,>>,%fp@\(10\)&,%sp + 1a0c: a2a1 a28d macw %a5l,%a2u,<<,%a1@-,%d1 + 1a10: a6e1 a28d macw %a5l,%a2u,>>,%a1@-,%a3 + 1a14: a4a1 a28d macw %a5l,%a2u,,%a1@-,%d2 + 1a18: aee1 a28d macw %a5l,%a2u,>>,%a1@-,%sp + 1a1c: a2a1 a2ad macw %a5l,%a2u,<<,%a1@-&,%d1 + 1a20: a6e1 a2ad macw %a5l,%a2u,>>,%a1@-&,%a3 + 1a24: a4a1 a2ad macw %a5l,%a2u,,%a1@-&,%d2 + 1a28: aee1 a2ad macw %a5l,%a2u,>>,%a1@-&,%sp + 1a2c: a293 a68d macw %a5l,%a2u,<<,%a3@,%d1 + 1a30: a6d3 a68d macw %a5l,%a2u,>>,%a3@,%a3 + 1a34: a493 a68d macw %a5l,%a2u,,%a3@,%d2 + 1a38: aed3 a68d macw %a5l,%a2u,>>,%a3@,%sp + 1a3c: a293 a6ad macw %a5l,%a2u,<<,%a3@&,%d1 + 1a40: a6d3 a6ad macw %a5l,%a2u,>>,%a3@&,%a3 + 1a44: a493 a6ad macw %a5l,%a2u,,%a3@&,%d2 + 1a48: aed3 a6ad macw %a5l,%a2u,>>,%a3@&,%sp + 1a4c: a29a a68d macw %a5l,%a2u,<<,%a2@\+,%d1 + 1a50: a6da a68d macw %a5l,%a2u,>>,%a2@\+,%a3 + 1a54: a49a a68d macw %a5l,%a2u,,%a2@\+,%d2 + 1a58: aeda a68d macw %a5l,%a2u,>>,%a2@\+,%sp + 1a5c: a29a a6ad macw %a5l,%a2u,<<,%a2@\+&,%d1 + 1a60: a6da a6ad macw %a5l,%a2u,>>,%a2@\+&,%a3 + 1a64: a49a a6ad macw %a5l,%a2u,,%a2@\+&,%d2 + 1a68: aeda a6ad macw %a5l,%a2u,>>,%a2@\+&,%sp + 1a6c: a2ae a68d 000a macw %a5l,%a2u,<<,%fp@\(10\),%d1 + 1a72: a6ee a68d 000a macw %a5l,%a2u,>>,%fp@\(10\),%a3 + 1a78: a4ae a68d 000a macw %a5l,%a2u,,%fp@\(10\),%d2 + 1a7e: aeee a68d 000a macw %a5l,%a2u,>>,%fp@\(10\),%sp + 1a84: a2ae a6ad 000a macw %a5l,%a2u,<<,%fp@\(10\)&,%d1 + 1a8a: a6ee a6ad 000a macw %a5l,%a2u,>>,%fp@\(10\)&,%a3 + 1a90: a4ae a6ad 000a macw %a5l,%a2u,,%fp@\(10\)&,%d2 + 1a96: aeee a6ad 000a macw %a5l,%a2u,>>,%fp@\(10\)&,%sp + 1a9c: a2a1 a68d macw %a5l,%a2u,<<,%a1@-,%d1 + 1aa0: a6e1 a68d macw %a5l,%a2u,>>,%a1@-,%a3 + 1aa4: a4a1 a68d macw %a5l,%a2u,,%a1@-,%d2 + 1aa8: aee1 a68d macw %a5l,%a2u,>>,%a1@-,%sp + 1aac: a2a1 a6ad macw %a5l,%a2u,<<,%a1@-&,%d1 + 1ab0: a6e1 a6ad macw %a5l,%a2u,>>,%a1@-&,%a3 + 1ab4: a4a1 a6ad macw %a5l,%a2u,,%a1@-&,%d2 + 1ab8: aee1 a6ad macw %a5l,%a2u,>>,%a1@-&,%sp + 1abc: a293 300d macw %a5l,%d3l,%a3@,%d1 + 1ac0: a6d3 300d macw %a5l,%d3l,%a3@,%a3 + 1ac4: a493 300d macw %a5l,%d3l,%a3@,%d2 + 1ac8: aed3 300d macw %a5l,%d3l,%a3@,%sp + 1acc: a293 302d macw %a5l,%d3l,<<,%a3@&,%d1 + 1ad0: a6d3 302d macw %a5l,%d3l,>>,%a3@&,%a3 + 1ad4: a493 302d macw %a5l,%d3l,,%a3@&,%d2 + 1ad8: aed3 302d macw %a5l,%d3l,>>,%a3@&,%sp + 1adc: a29a 300d macw %a5l,%d3l,%a2@\+,%d1 + 1ae0: a6da 300d macw %a5l,%d3l,%a2@\+,%a3 + 1ae4: a49a 300d macw %a5l,%d3l,%a2@\+,%d2 + 1ae8: aeda 300d macw %a5l,%d3l,%a2@\+,%sp + 1aec: a29a 302d macw %a5l,%d3l,<<,%a2@\+&,%d1 + 1af0: a6da 302d macw %a5l,%d3l,>>,%a2@\+&,%a3 + 1af4: a49a 302d macw %a5l,%d3l,,%a2@\+&,%d2 + 1af8: aeda 302d macw %a5l,%d3l,>>,%a2@\+&,%sp + 1afc: a2ae 300d 000a macw %a5l,%d3l,%fp@\(10\),%d1 + 1b02: a6ee 300d 000a macw %a5l,%d3l,%fp@\(10\),%a3 + 1b08: a4ae 300d 000a macw %a5l,%d3l,%fp@\(10\),%d2 + 1b0e: aeee 300d 000a macw %a5l,%d3l,%fp@\(10\),%sp + 1b14: a2ae 302d 000a macw %a5l,%d3l,<<,%fp@\(10\)&,%d1 + 1b1a: a6ee 302d 000a macw %a5l,%d3l,>>,%fp@\(10\)&,%a3 + 1b20: a4ae 302d 000a macw %a5l,%d3l,,%fp@\(10\)&,%d2 + 1b26: aeee 302d 000a macw %a5l,%d3l,>>,%fp@\(10\)&,%sp + 1b2c: a2a1 300d macw %a5l,%d3l,%a1@-,%d1 + 1b30: a6e1 300d macw %a5l,%d3l,%a1@-,%a3 + 1b34: a4a1 300d macw %a5l,%d3l,%a1@-,%d2 + 1b38: aee1 300d macw %a5l,%d3l,%a1@-,%sp + 1b3c: a2a1 302d macw %a5l,%d3l,<<,%a1@-&,%d1 + 1b40: a6e1 302d macw %a5l,%d3l,>>,%a1@-&,%a3 + 1b44: a4a1 302d macw %a5l,%d3l,,%a1@-&,%d2 + 1b48: aee1 302d macw %a5l,%d3l,>>,%a1@-&,%sp + 1b4c: a293 320d macw %a5l,%d3l,<<,%a3@,%d1 + 1b50: a6d3 320d macw %a5l,%d3l,>>,%a3@,%a3 + 1b54: a493 320d macw %a5l,%d3l,,%a3@,%d2 + 1b58: aed3 320d macw %a5l,%d3l,>>,%a3@,%sp + 1b5c: a293 322d macw %a5l,%d3l,<<,%a3@&,%d1 + 1b60: a6d3 322d macw %a5l,%d3l,>>,%a3@&,%a3 + 1b64: a493 322d macw %a5l,%d3l,,%a3@&,%d2 + 1b68: aed3 322d macw %a5l,%d3l,>>,%a3@&,%sp + 1b6c: a29a 320d macw %a5l,%d3l,<<,%a2@\+,%d1 + 1b70: a6da 320d macw %a5l,%d3l,>>,%a2@\+,%a3 + 1b74: a49a 320d macw %a5l,%d3l,,%a2@\+,%d2 + 1b78: aeda 320d macw %a5l,%d3l,>>,%a2@\+,%sp + 1b7c: a29a 322d macw %a5l,%d3l,<<,%a2@\+&,%d1 + 1b80: a6da 322d macw %a5l,%d3l,>>,%a2@\+&,%a3 + 1b84: a49a 322d macw %a5l,%d3l,,%a2@\+&,%d2 + 1b88: aeda 322d macw %a5l,%d3l,>>,%a2@\+&,%sp + 1b8c: a2ae 320d 000a macw %a5l,%d3l,<<,%fp@\(10\),%d1 + 1b92: a6ee 320d 000a macw %a5l,%d3l,>>,%fp@\(10\),%a3 + 1b98: a4ae 320d 000a macw %a5l,%d3l,,%fp@\(10\),%d2 + 1b9e: aeee 320d 000a macw %a5l,%d3l,>>,%fp@\(10\),%sp + 1ba4: a2ae 322d 000a macw %a5l,%d3l,<<,%fp@\(10\)&,%d1 + 1baa: a6ee 322d 000a macw %a5l,%d3l,>>,%fp@\(10\)&,%a3 + 1bb0: a4ae 322d 000a macw %a5l,%d3l,,%fp@\(10\)&,%d2 + 1bb6: aeee 322d 000a macw %a5l,%d3l,>>,%fp@\(10\)&,%sp + 1bbc: a2a1 320d macw %a5l,%d3l,<<,%a1@-,%d1 + 1bc0: a6e1 320d macw %a5l,%d3l,>>,%a1@-,%a3 + 1bc4: a4a1 320d macw %a5l,%d3l,,%a1@-,%d2 + 1bc8: aee1 320d macw %a5l,%d3l,>>,%a1@-,%sp + 1bcc: a2a1 322d macw %a5l,%d3l,<<,%a1@-&,%d1 + 1bd0: a6e1 322d macw %a5l,%d3l,>>,%a1@-&,%a3 + 1bd4: a4a1 322d macw %a5l,%d3l,,%a1@-&,%d2 + 1bd8: aee1 322d macw %a5l,%d3l,>>,%a1@-&,%sp + 1bdc: a293 360d macw %a5l,%d3l,<<,%a3@,%d1 + 1be0: a6d3 360d macw %a5l,%d3l,>>,%a3@,%a3 + 1be4: a493 360d macw %a5l,%d3l,,%a3@,%d2 + 1be8: aed3 360d macw %a5l,%d3l,>>,%a3@,%sp + 1bec: a293 362d macw %a5l,%d3l,<<,%a3@&,%d1 + 1bf0: a6d3 362d macw %a5l,%d3l,>>,%a3@&,%a3 + 1bf4: a493 362d macw %a5l,%d3l,,%a3@&,%d2 + 1bf8: aed3 362d macw %a5l,%d3l,>>,%a3@&,%sp + 1bfc: a29a 360d macw %a5l,%d3l,<<,%a2@\+,%d1 + 1c00: a6da 360d macw %a5l,%d3l,>>,%a2@\+,%a3 + 1c04: a49a 360d macw %a5l,%d3l,,%a2@\+,%d2 + 1c08: aeda 360d macw %a5l,%d3l,>>,%a2@\+,%sp + 1c0c: a29a 362d macw %a5l,%d3l,<<,%a2@\+&,%d1 + 1c10: a6da 362d macw %a5l,%d3l,>>,%a2@\+&,%a3 + 1c14: a49a 362d macw %a5l,%d3l,,%a2@\+&,%d2 + 1c18: aeda 362d macw %a5l,%d3l,>>,%a2@\+&,%sp + 1c1c: a2ae 360d 000a macw %a5l,%d3l,<<,%fp@\(10\),%d1 + 1c22: a6ee 360d 000a macw %a5l,%d3l,>>,%fp@\(10\),%a3 + 1c28: a4ae 360d 000a macw %a5l,%d3l,,%fp@\(10\),%d2 + 1c2e: aeee 360d 000a macw %a5l,%d3l,>>,%fp@\(10\),%sp + 1c34: a2ae 362d 000a macw %a5l,%d3l,<<,%fp@\(10\)&,%d1 + 1c3a: a6ee 362d 000a macw %a5l,%d3l,>>,%fp@\(10\)&,%a3 + 1c40: a4ae 362d 000a macw %a5l,%d3l,,%fp@\(10\)&,%d2 + 1c46: aeee 362d 000a macw %a5l,%d3l,>>,%fp@\(10\)&,%sp + 1c4c: a2a1 360d macw %a5l,%d3l,<<,%a1@-,%d1 + 1c50: a6e1 360d macw %a5l,%d3l,>>,%a1@-,%a3 + 1c54: a4a1 360d macw %a5l,%d3l,,%a1@-,%d2 + 1c58: aee1 360d macw %a5l,%d3l,>>,%a1@-,%sp + 1c5c: a2a1 362d macw %a5l,%d3l,<<,%a1@-&,%d1 + 1c60: a6e1 362d macw %a5l,%d3l,>>,%a1@-&,%a3 + 1c64: a4a1 362d macw %a5l,%d3l,,%a1@-&,%d2 + 1c68: aee1 362d macw %a5l,%d3l,>>,%a1@-&,%sp + 1c6c: a293 320d macw %a5l,%d3l,<<,%a3@,%d1 + 1c70: a6d3 320d macw %a5l,%d3l,>>,%a3@,%a3 + 1c74: a493 320d macw %a5l,%d3l,,%a3@,%d2 + 1c78: aed3 320d macw %a5l,%d3l,>>,%a3@,%sp + 1c7c: a293 322d macw %a5l,%d3l,<<,%a3@&,%d1 + 1c80: a6d3 322d macw %a5l,%d3l,>>,%a3@&,%a3 + 1c84: a493 322d macw %a5l,%d3l,,%a3@&,%d2 + 1c88: aed3 322d macw %a5l,%d3l,>>,%a3@&,%sp + 1c8c: a29a 320d macw %a5l,%d3l,<<,%a2@\+,%d1 + 1c90: a6da 320d macw %a5l,%d3l,>>,%a2@\+,%a3 + 1c94: a49a 320d macw %a5l,%d3l,,%a2@\+,%d2 + 1c98: aeda 320d macw %a5l,%d3l,>>,%a2@\+,%sp + 1c9c: a29a 322d macw %a5l,%d3l,<<,%a2@\+&,%d1 + 1ca0: a6da 322d macw %a5l,%d3l,>>,%a2@\+&,%a3 + 1ca4: a49a 322d macw %a5l,%d3l,,%a2@\+&,%d2 + 1ca8: aeda 322d macw %a5l,%d3l,>>,%a2@\+&,%sp + 1cac: a2ae 320d 000a macw %a5l,%d3l,<<,%fp@\(10\),%d1 + 1cb2: a6ee 320d 000a macw %a5l,%d3l,>>,%fp@\(10\),%a3 + 1cb8: a4ae 320d 000a macw %a5l,%d3l,,%fp@\(10\),%d2 + 1cbe: aeee 320d 000a macw %a5l,%d3l,>>,%fp@\(10\),%sp + 1cc4: a2ae 322d 000a macw %a5l,%d3l,<<,%fp@\(10\)&,%d1 + 1cca: a6ee 322d 000a macw %a5l,%d3l,>>,%fp@\(10\)&,%a3 + 1cd0: a4ae 322d 000a macw %a5l,%d3l,,%fp@\(10\)&,%d2 + 1cd6: aeee 322d 000a macw %a5l,%d3l,>>,%fp@\(10\)&,%sp + 1cdc: a2a1 320d macw %a5l,%d3l,<<,%a1@-,%d1 + 1ce0: a6e1 320d macw %a5l,%d3l,>>,%a1@-,%a3 + 1ce4: a4a1 320d macw %a5l,%d3l,,%a1@-,%d2 + 1ce8: aee1 320d macw %a5l,%d3l,>>,%a1@-,%sp + 1cec: a2a1 322d macw %a5l,%d3l,<<,%a1@-&,%d1 + 1cf0: a6e1 322d macw %a5l,%d3l,>>,%a1@-&,%a3 + 1cf4: a4a1 322d macw %a5l,%d3l,,%a1@-&,%d2 + 1cf8: aee1 322d macw %a5l,%d3l,>>,%a1@-&,%sp + 1cfc: a293 360d macw %a5l,%d3l,<<,%a3@,%d1 + 1d00: a6d3 360d macw %a5l,%d3l,>>,%a3@,%a3 + 1d04: a493 360d macw %a5l,%d3l,,%a3@,%d2 + 1d08: aed3 360d macw %a5l,%d3l,>>,%a3@,%sp + 1d0c: a293 362d macw %a5l,%d3l,<<,%a3@&,%d1 + 1d10: a6d3 362d macw %a5l,%d3l,>>,%a3@&,%a3 + 1d14: a493 362d macw %a5l,%d3l,,%a3@&,%d2 + 1d18: aed3 362d macw %a5l,%d3l,>>,%a3@&,%sp + 1d1c: a29a 360d macw %a5l,%d3l,<<,%a2@\+,%d1 + 1d20: a6da 360d macw %a5l,%d3l,>>,%a2@\+,%a3 + 1d24: a49a 360d macw %a5l,%d3l,,%a2@\+,%d2 + 1d28: aeda 360d macw %a5l,%d3l,>>,%a2@\+,%sp + 1d2c: a29a 362d macw %a5l,%d3l,<<,%a2@\+&,%d1 + 1d30: a6da 362d macw %a5l,%d3l,>>,%a2@\+&,%a3 + 1d34: a49a 362d macw %a5l,%d3l,,%a2@\+&,%d2 + 1d38: aeda 362d macw %a5l,%d3l,>>,%a2@\+&,%sp + 1d3c: a2ae 360d 000a macw %a5l,%d3l,<<,%fp@\(10\),%d1 + 1d42: a6ee 360d 000a macw %a5l,%d3l,>>,%fp@\(10\),%a3 + 1d48: a4ae 360d 000a macw %a5l,%d3l,,%fp@\(10\),%d2 + 1d4e: aeee 360d 000a macw %a5l,%d3l,>>,%fp@\(10\),%sp + 1d54: a2ae 362d 000a macw %a5l,%d3l,<<,%fp@\(10\)&,%d1 + 1d5a: a6ee 362d 000a macw %a5l,%d3l,>>,%fp@\(10\)&,%a3 + 1d60: a4ae 362d 000a macw %a5l,%d3l,,%fp@\(10\)&,%d2 + 1d66: aeee 362d 000a macw %a5l,%d3l,>>,%fp@\(10\)&,%sp + 1d6c: a2a1 360d macw %a5l,%d3l,<<,%a1@-,%d1 + 1d70: a6e1 360d macw %a5l,%d3l,>>,%a1@-,%a3 + 1d74: a4a1 360d macw %a5l,%d3l,,%a1@-,%d2 + 1d78: aee1 360d macw %a5l,%d3l,>>,%a1@-,%sp + 1d7c: a2a1 362d macw %a5l,%d3l,<<,%a1@-&,%d1 + 1d80: a6e1 362d macw %a5l,%d3l,>>,%a1@-&,%a3 + 1d84: a4a1 362d macw %a5l,%d3l,,%a1@-&,%d2 + 1d88: aee1 362d macw %a5l,%d3l,>>,%a1@-&,%sp + 1d8c: a293 f08d macw %a5l,%spu,%a3@,%d1 + 1d90: a6d3 f08d macw %a5l,%spu,%a3@,%a3 + 1d94: a493 f08d macw %a5l,%spu,%a3@,%d2 + 1d98: aed3 f08d macw %a5l,%spu,%a3@,%sp + 1d9c: a293 f0ad macw %a5l,%spu,<<,%a3@&,%d1 + 1da0: a6d3 f0ad macw %a5l,%spu,>>,%a3@&,%a3 + 1da4: a493 f0ad macw %a5l,%spu,,%a3@&,%d2 + 1da8: aed3 f0ad macw %a5l,%spu,>>,%a3@&,%sp + 1dac: a29a f08d macw %a5l,%spu,%a2@\+,%d1 + 1db0: a6da f08d macw %a5l,%spu,%a2@\+,%a3 + 1db4: a49a f08d macw %a5l,%spu,%a2@\+,%d2 + 1db8: aeda f08d macw %a5l,%spu,%a2@\+,%sp + 1dbc: a29a f0ad macw %a5l,%spu,<<,%a2@\+&,%d1 + 1dc0: a6da f0ad macw %a5l,%spu,>>,%a2@\+&,%a3 + 1dc4: a49a f0ad macw %a5l,%spu,,%a2@\+&,%d2 + 1dc8: aeda f0ad macw %a5l,%spu,>>,%a2@\+&,%sp + 1dcc: a2ae f08d 000a macw %a5l,%spu,%fp@\(10\),%d1 + 1dd2: a6ee f08d 000a macw %a5l,%spu,%fp@\(10\),%a3 + 1dd8: a4ae f08d 000a macw %a5l,%spu,%fp@\(10\),%d2 + 1dde: aeee f08d 000a macw %a5l,%spu,%fp@\(10\),%sp + 1de4: a2ae f0ad 000a macw %a5l,%spu,<<,%fp@\(10\)&,%d1 + 1dea: a6ee f0ad 000a macw %a5l,%spu,>>,%fp@\(10\)&,%a3 + 1df0: a4ae f0ad 000a macw %a5l,%spu,,%fp@\(10\)&,%d2 + 1df6: aeee f0ad 000a macw %a5l,%spu,>>,%fp@\(10\)&,%sp + 1dfc: a2a1 f08d macw %a5l,%spu,%a1@-,%d1 + 1e00: a6e1 f08d macw %a5l,%spu,%a1@-,%a3 + 1e04: a4a1 f08d macw %a5l,%spu,%a1@-,%d2 + 1e08: aee1 f08d macw %a5l,%spu,%a1@-,%sp + 1e0c: a2a1 f0ad macw %a5l,%spu,<<,%a1@-&,%d1 + 1e10: a6e1 f0ad macw %a5l,%spu,>>,%a1@-&,%a3 + 1e14: a4a1 f0ad macw %a5l,%spu,,%a1@-&,%d2 + 1e18: aee1 f0ad macw %a5l,%spu,>>,%a1@-&,%sp + 1e1c: a293 f28d macw %a5l,%spu,<<,%a3@,%d1 + 1e20: a6d3 f28d macw %a5l,%spu,>>,%a3@,%a3 + 1e24: a493 f28d macw %a5l,%spu,,%a3@,%d2 + 1e28: aed3 f28d macw %a5l,%spu,>>,%a3@,%sp + 1e2c: a293 f2ad macw %a5l,%spu,<<,%a3@&,%d1 + 1e30: a6d3 f2ad macw %a5l,%spu,>>,%a3@&,%a3 + 1e34: a493 f2ad macw %a5l,%spu,,%a3@&,%d2 + 1e38: aed3 f2ad macw %a5l,%spu,>>,%a3@&,%sp + 1e3c: a29a f28d macw %a5l,%spu,<<,%a2@\+,%d1 + 1e40: a6da f28d macw %a5l,%spu,>>,%a2@\+,%a3 + 1e44: a49a f28d macw %a5l,%spu,,%a2@\+,%d2 + 1e48: aeda f28d macw %a5l,%spu,>>,%a2@\+,%sp + 1e4c: a29a f2ad macw %a5l,%spu,<<,%a2@\+&,%d1 + 1e50: a6da f2ad macw %a5l,%spu,>>,%a2@\+&,%a3 + 1e54: a49a f2ad macw %a5l,%spu,,%a2@\+&,%d2 + 1e58: aeda f2ad macw %a5l,%spu,>>,%a2@\+&,%sp + 1e5c: a2ae f28d 000a macw %a5l,%spu,<<,%fp@\(10\),%d1 + 1e62: a6ee f28d 000a macw %a5l,%spu,>>,%fp@\(10\),%a3 + 1e68: a4ae f28d 000a macw %a5l,%spu,,%fp@\(10\),%d2 + 1e6e: aeee f28d 000a macw %a5l,%spu,>>,%fp@\(10\),%sp + 1e74: a2ae f2ad 000a macw %a5l,%spu,<<,%fp@\(10\)&,%d1 + 1e7a: a6ee f2ad 000a macw %a5l,%spu,>>,%fp@\(10\)&,%a3 + 1e80: a4ae f2ad 000a macw %a5l,%spu,,%fp@\(10\)&,%d2 + 1e86: aeee f2ad 000a macw %a5l,%spu,>>,%fp@\(10\)&,%sp + 1e8c: a2a1 f28d macw %a5l,%spu,<<,%a1@-,%d1 + 1e90: a6e1 f28d macw %a5l,%spu,>>,%a1@-,%a3 + 1e94: a4a1 f28d macw %a5l,%spu,,%a1@-,%d2 + 1e98: aee1 f28d macw %a5l,%spu,>>,%a1@-,%sp + 1e9c: a2a1 f2ad macw %a5l,%spu,<<,%a1@-&,%d1 + 1ea0: a6e1 f2ad macw %a5l,%spu,>>,%a1@-&,%a3 + 1ea4: a4a1 f2ad macw %a5l,%spu,,%a1@-&,%d2 + 1ea8: aee1 f2ad macw %a5l,%spu,>>,%a1@-&,%sp + 1eac: a293 f68d macw %a5l,%spu,<<,%a3@,%d1 + 1eb0: a6d3 f68d macw %a5l,%spu,>>,%a3@,%a3 + 1eb4: a493 f68d macw %a5l,%spu,,%a3@,%d2 + 1eb8: aed3 f68d macw %a5l,%spu,>>,%a3@,%sp + 1ebc: a293 f6ad macw %a5l,%spu,<<,%a3@&,%d1 + 1ec0: a6d3 f6ad macw %a5l,%spu,>>,%a3@&,%a3 + 1ec4: a493 f6ad macw %a5l,%spu,,%a3@&,%d2 + 1ec8: aed3 f6ad macw %a5l,%spu,>>,%a3@&,%sp + 1ecc: a29a f68d macw %a5l,%spu,<<,%a2@\+,%d1 + 1ed0: a6da f68d macw %a5l,%spu,>>,%a2@\+,%a3 + 1ed4: a49a f68d macw %a5l,%spu,,%a2@\+,%d2 + 1ed8: aeda f68d macw %a5l,%spu,>>,%a2@\+,%sp + 1edc: a29a f6ad macw %a5l,%spu,<<,%a2@\+&,%d1 + 1ee0: a6da f6ad macw %a5l,%spu,>>,%a2@\+&,%a3 + 1ee4: a49a f6ad macw %a5l,%spu,,%a2@\+&,%d2 + 1ee8: aeda f6ad macw %a5l,%spu,>>,%a2@\+&,%sp + 1eec: a2ae f68d 000a macw %a5l,%spu,<<,%fp@\(10\),%d1 + 1ef2: a6ee f68d 000a macw %a5l,%spu,>>,%fp@\(10\),%a3 + 1ef8: a4ae f68d 000a macw %a5l,%spu,,%fp@\(10\),%d2 + 1efe: aeee f68d 000a macw %a5l,%spu,>>,%fp@\(10\),%sp + 1f04: a2ae f6ad 000a macw %a5l,%spu,<<,%fp@\(10\)&,%d1 + 1f0a: a6ee f6ad 000a macw %a5l,%spu,>>,%fp@\(10\)&,%a3 + 1f10: a4ae f6ad 000a macw %a5l,%spu,,%fp@\(10\)&,%d2 + 1f16: aeee f6ad 000a macw %a5l,%spu,>>,%fp@\(10\)&,%sp + 1f1c: a2a1 f68d macw %a5l,%spu,<<,%a1@-,%d1 + 1f20: a6e1 f68d macw %a5l,%spu,>>,%a1@-,%a3 + 1f24: a4a1 f68d macw %a5l,%spu,,%a1@-,%d2 + 1f28: aee1 f68d macw %a5l,%spu,>>,%a1@-,%sp + 1f2c: a2a1 f6ad macw %a5l,%spu,<<,%a1@-&,%d1 + 1f30: a6e1 f6ad macw %a5l,%spu,>>,%a1@-&,%a3 + 1f34: a4a1 f6ad macw %a5l,%spu,,%a1@-&,%d2 + 1f38: aee1 f6ad macw %a5l,%spu,>>,%a1@-&,%sp + 1f3c: a293 f28d macw %a5l,%spu,<<,%a3@,%d1 + 1f40: a6d3 f28d macw %a5l,%spu,>>,%a3@,%a3 + 1f44: a493 f28d macw %a5l,%spu,,%a3@,%d2 + 1f48: aed3 f28d macw %a5l,%spu,>>,%a3@,%sp + 1f4c: a293 f2ad macw %a5l,%spu,<<,%a3@&,%d1 + 1f50: a6d3 f2ad macw %a5l,%spu,>>,%a3@&,%a3 + 1f54: a493 f2ad macw %a5l,%spu,,%a3@&,%d2 + 1f58: aed3 f2ad macw %a5l,%spu,>>,%a3@&,%sp + 1f5c: a29a f28d macw %a5l,%spu,<<,%a2@\+,%d1 + 1f60: a6da f28d macw %a5l,%spu,>>,%a2@\+,%a3 + 1f64: a49a f28d macw %a5l,%spu,,%a2@\+,%d2 + 1f68: aeda f28d macw %a5l,%spu,>>,%a2@\+,%sp + 1f6c: a29a f2ad macw %a5l,%spu,<<,%a2@\+&,%d1 + 1f70: a6da f2ad macw %a5l,%spu,>>,%a2@\+&,%a3 + 1f74: a49a f2ad macw %a5l,%spu,,%a2@\+&,%d2 + 1f78: aeda f2ad macw %a5l,%spu,>>,%a2@\+&,%sp + 1f7c: a2ae f28d 000a macw %a5l,%spu,<<,%fp@\(10\),%d1 + 1f82: a6ee f28d 000a macw %a5l,%spu,>>,%fp@\(10\),%a3 + 1f88: a4ae f28d 000a macw %a5l,%spu,,%fp@\(10\),%d2 + 1f8e: aeee f28d 000a macw %a5l,%spu,>>,%fp@\(10\),%sp + 1f94: a2ae f2ad 000a macw %a5l,%spu,<<,%fp@\(10\)&,%d1 + 1f9a: a6ee f2ad 000a macw %a5l,%spu,>>,%fp@\(10\)&,%a3 + 1fa0: a4ae f2ad 000a macw %a5l,%spu,,%fp@\(10\)&,%d2 + 1fa6: aeee f2ad 000a macw %a5l,%spu,>>,%fp@\(10\)&,%sp + 1fac: a2a1 f28d macw %a5l,%spu,<<,%a1@-,%d1 + 1fb0: a6e1 f28d macw %a5l,%spu,>>,%a1@-,%a3 + 1fb4: a4a1 f28d macw %a5l,%spu,,%a1@-,%d2 + 1fb8: aee1 f28d macw %a5l,%spu,>>,%a1@-,%sp + 1fbc: a2a1 f2ad macw %a5l,%spu,<<,%a1@-&,%d1 + 1fc0: a6e1 f2ad macw %a5l,%spu,>>,%a1@-&,%a3 + 1fc4: a4a1 f2ad macw %a5l,%spu,,%a1@-&,%d2 + 1fc8: aee1 f2ad macw %a5l,%spu,>>,%a1@-&,%sp + 1fcc: a293 f68d macw %a5l,%spu,<<,%a3@,%d1 + 1fd0: a6d3 f68d macw %a5l,%spu,>>,%a3@,%a3 + 1fd4: a493 f68d macw %a5l,%spu,,%a3@,%d2 + 1fd8: aed3 f68d macw %a5l,%spu,>>,%a3@,%sp + 1fdc: a293 f6ad macw %a5l,%spu,<<,%a3@&,%d1 + 1fe0: a6d3 f6ad macw %a5l,%spu,>>,%a3@&,%a3 + 1fe4: a493 f6ad macw %a5l,%spu,,%a3@&,%d2 + 1fe8: aed3 f6ad macw %a5l,%spu,>>,%a3@&,%sp + 1fec: a29a f68d macw %a5l,%spu,<<,%a2@\+,%d1 + 1ff0: a6da f68d macw %a5l,%spu,>>,%a2@\+,%a3 + 1ff4: a49a f68d macw %a5l,%spu,,%a2@\+,%d2 + 1ff8: aeda f68d macw %a5l,%spu,>>,%a2@\+,%sp + 1ffc: a29a f6ad macw %a5l,%spu,<<,%a2@\+&,%d1 + 2000: a6da f6ad macw %a5l,%spu,>>,%a2@\+&,%a3 + 2004: a49a f6ad macw %a5l,%spu,,%a2@\+&,%d2 + 2008: aeda f6ad macw %a5l,%spu,>>,%a2@\+&,%sp + 200c: a2ae f68d 000a macw %a5l,%spu,<<,%fp@\(10\),%d1 + 2012: a6ee f68d 000a macw %a5l,%spu,>>,%fp@\(10\),%a3 + 2018: a4ae f68d 000a macw %a5l,%spu,,%fp@\(10\),%d2 + 201e: aeee f68d 000a macw %a5l,%spu,>>,%fp@\(10\),%sp + 2024: a2ae f6ad 000a macw %a5l,%spu,<<,%fp@\(10\)&,%d1 + 202a: a6ee f6ad 000a macw %a5l,%spu,>>,%fp@\(10\)&,%a3 + 2030: a4ae f6ad 000a macw %a5l,%spu,,%fp@\(10\)&,%d2 + 2036: aeee f6ad 000a macw %a5l,%spu,>>,%fp@\(10\)&,%sp + 203c: a2a1 f68d macw %a5l,%spu,<<,%a1@-,%d1 + 2040: a6e1 f68d macw %a5l,%spu,>>,%a1@-,%a3 + 2044: a4a1 f68d macw %a5l,%spu,,%a1@-,%d2 + 2048: aee1 f68d macw %a5l,%spu,>>,%a1@-,%sp + 204c: a2a1 f6ad macw %a5l,%spu,<<,%a1@-&,%d1 + 2050: a6e1 f6ad macw %a5l,%spu,>>,%a1@-&,%a3 + 2054: a4a1 f6ad macw %a5l,%spu,,%a1@-&,%d2 + 2058: aee1 f6ad macw %a5l,%spu,>>,%a1@-&,%sp + 205c: a293 100d macw %a5l,%d1l,%a3@,%d1 + 2060: a6d3 100d macw %a5l,%d1l,%a3@,%a3 + 2064: a493 100d macw %a5l,%d1l,%a3@,%d2 + 2068: aed3 100d macw %a5l,%d1l,%a3@,%sp + 206c: a293 102d macw %a5l,%d1l,<<,%a3@&,%d1 + 2070: a6d3 102d macw %a5l,%d1l,>>,%a3@&,%a3 + 2074: a493 102d macw %a5l,%d1l,,%a3@&,%d2 + 2078: aed3 102d macw %a5l,%d1l,>>,%a3@&,%sp + 207c: a29a 100d macw %a5l,%d1l,%a2@\+,%d1 + 2080: a6da 100d macw %a5l,%d1l,%a2@\+,%a3 + 2084: a49a 100d macw %a5l,%d1l,%a2@\+,%d2 + 2088: aeda 100d macw %a5l,%d1l,%a2@\+,%sp + 208c: a29a 102d macw %a5l,%d1l,<<,%a2@\+&,%d1 + 2090: a6da 102d macw %a5l,%d1l,>>,%a2@\+&,%a3 + 2094: a49a 102d macw %a5l,%d1l,,%a2@\+&,%d2 + 2098: aeda 102d macw %a5l,%d1l,>>,%a2@\+&,%sp + 209c: a2ae 100d 000a macw %a5l,%d1l,%fp@\(10\),%d1 + 20a2: a6ee 100d 000a macw %a5l,%d1l,%fp@\(10\),%a3 + 20a8: a4ae 100d 000a macw %a5l,%d1l,%fp@\(10\),%d2 + 20ae: aeee 100d 000a macw %a5l,%d1l,%fp@\(10\),%sp + 20b4: a2ae 102d 000a macw %a5l,%d1l,<<,%fp@\(10\)&,%d1 + 20ba: a6ee 102d 000a macw %a5l,%d1l,>>,%fp@\(10\)&,%a3 + 20c0: a4ae 102d 000a macw %a5l,%d1l,,%fp@\(10\)&,%d2 + 20c6: aeee 102d 000a macw %a5l,%d1l,>>,%fp@\(10\)&,%sp + 20cc: a2a1 100d macw %a5l,%d1l,%a1@-,%d1 + 20d0: a6e1 100d macw %a5l,%d1l,%a1@-,%a3 + 20d4: a4a1 100d macw %a5l,%d1l,%a1@-,%d2 + 20d8: aee1 100d macw %a5l,%d1l,%a1@-,%sp + 20dc: a2a1 102d macw %a5l,%d1l,<<,%a1@-&,%d1 + 20e0: a6e1 102d macw %a5l,%d1l,>>,%a1@-&,%a3 + 20e4: a4a1 102d macw %a5l,%d1l,,%a1@-&,%d2 + 20e8: aee1 102d macw %a5l,%d1l,>>,%a1@-&,%sp + 20ec: a293 120d macw %a5l,%d1l,<<,%a3@,%d1 + 20f0: a6d3 120d macw %a5l,%d1l,>>,%a3@,%a3 + 20f4: a493 120d macw %a5l,%d1l,,%a3@,%d2 + 20f8: aed3 120d macw %a5l,%d1l,>>,%a3@,%sp + 20fc: a293 122d macw %a5l,%d1l,<<,%a3@&,%d1 + 2100: a6d3 122d macw %a5l,%d1l,>>,%a3@&,%a3 + 2104: a493 122d macw %a5l,%d1l,,%a3@&,%d2 + 2108: aed3 122d macw %a5l,%d1l,>>,%a3@&,%sp + 210c: a29a 120d macw %a5l,%d1l,<<,%a2@\+,%d1 + 2110: a6da 120d macw %a5l,%d1l,>>,%a2@\+,%a3 + 2114: a49a 120d macw %a5l,%d1l,,%a2@\+,%d2 + 2118: aeda 120d macw %a5l,%d1l,>>,%a2@\+,%sp + 211c: a29a 122d macw %a5l,%d1l,<<,%a2@\+&,%d1 + 2120: a6da 122d macw %a5l,%d1l,>>,%a2@\+&,%a3 + 2124: a49a 122d macw %a5l,%d1l,,%a2@\+&,%d2 + 2128: aeda 122d macw %a5l,%d1l,>>,%a2@\+&,%sp + 212c: a2ae 120d 000a macw %a5l,%d1l,<<,%fp@\(10\),%d1 + 2132: a6ee 120d 000a macw %a5l,%d1l,>>,%fp@\(10\),%a3 + 2138: a4ae 120d 000a macw %a5l,%d1l,,%fp@\(10\),%d2 + 213e: aeee 120d 000a macw %a5l,%d1l,>>,%fp@\(10\),%sp + 2144: a2ae 122d 000a macw %a5l,%d1l,<<,%fp@\(10\)&,%d1 + 214a: a6ee 122d 000a macw %a5l,%d1l,>>,%fp@\(10\)&,%a3 + 2150: a4ae 122d 000a macw %a5l,%d1l,,%fp@\(10\)&,%d2 + 2156: aeee 122d 000a macw %a5l,%d1l,>>,%fp@\(10\)&,%sp + 215c: a2a1 120d macw %a5l,%d1l,<<,%a1@-,%d1 + 2160: a6e1 120d macw %a5l,%d1l,>>,%a1@-,%a3 + 2164: a4a1 120d macw %a5l,%d1l,,%a1@-,%d2 + 2168: aee1 120d macw %a5l,%d1l,>>,%a1@-,%sp + 216c: a2a1 122d macw %a5l,%d1l,<<,%a1@-&,%d1 + 2170: a6e1 122d macw %a5l,%d1l,>>,%a1@-&,%a3 + 2174: a4a1 122d macw %a5l,%d1l,,%a1@-&,%d2 + 2178: aee1 122d macw %a5l,%d1l,>>,%a1@-&,%sp + 217c: a293 160d macw %a5l,%d1l,<<,%a3@,%d1 + 2180: a6d3 160d macw %a5l,%d1l,>>,%a3@,%a3 + 2184: a493 160d macw %a5l,%d1l,,%a3@,%d2 + 2188: aed3 160d macw %a5l,%d1l,>>,%a3@,%sp + 218c: a293 162d macw %a5l,%d1l,<<,%a3@&,%d1 + 2190: a6d3 162d macw %a5l,%d1l,>>,%a3@&,%a3 + 2194: a493 162d macw %a5l,%d1l,,%a3@&,%d2 + 2198: aed3 162d macw %a5l,%d1l,>>,%a3@&,%sp + 219c: a29a 160d macw %a5l,%d1l,<<,%a2@\+,%d1 + 21a0: a6da 160d macw %a5l,%d1l,>>,%a2@\+,%a3 + 21a4: a49a 160d macw %a5l,%d1l,,%a2@\+,%d2 + 21a8: aeda 160d macw %a5l,%d1l,>>,%a2@\+,%sp + 21ac: a29a 162d macw %a5l,%d1l,<<,%a2@\+&,%d1 + 21b0: a6da 162d macw %a5l,%d1l,>>,%a2@\+&,%a3 + 21b4: a49a 162d macw %a5l,%d1l,,%a2@\+&,%d2 + 21b8: aeda 162d macw %a5l,%d1l,>>,%a2@\+&,%sp + 21bc: a2ae 160d 000a macw %a5l,%d1l,<<,%fp@\(10\),%d1 + 21c2: a6ee 160d 000a macw %a5l,%d1l,>>,%fp@\(10\),%a3 + 21c8: a4ae 160d 000a macw %a5l,%d1l,,%fp@\(10\),%d2 + 21ce: aeee 160d 000a macw %a5l,%d1l,>>,%fp@\(10\),%sp + 21d4: a2ae 162d 000a macw %a5l,%d1l,<<,%fp@\(10\)&,%d1 + 21da: a6ee 162d 000a macw %a5l,%d1l,>>,%fp@\(10\)&,%a3 + 21e0: a4ae 162d 000a macw %a5l,%d1l,,%fp@\(10\)&,%d2 + 21e6: aeee 162d 000a macw %a5l,%d1l,>>,%fp@\(10\)&,%sp + 21ec: a2a1 160d macw %a5l,%d1l,<<,%a1@-,%d1 + 21f0: a6e1 160d macw %a5l,%d1l,>>,%a1@-,%a3 + 21f4: a4a1 160d macw %a5l,%d1l,,%a1@-,%d2 + 21f8: aee1 160d macw %a5l,%d1l,>>,%a1@-,%sp + 21fc: a2a1 162d macw %a5l,%d1l,<<,%a1@-&,%d1 + 2200: a6e1 162d macw %a5l,%d1l,>>,%a1@-&,%a3 + 2204: a4a1 162d macw %a5l,%d1l,,%a1@-&,%d2 + 2208: aee1 162d macw %a5l,%d1l,>>,%a1@-&,%sp + 220c: a293 120d macw %a5l,%d1l,<<,%a3@,%d1 + 2210: a6d3 120d macw %a5l,%d1l,>>,%a3@,%a3 + 2214: a493 120d macw %a5l,%d1l,,%a3@,%d2 + 2218: aed3 120d macw %a5l,%d1l,>>,%a3@,%sp + 221c: a293 122d macw %a5l,%d1l,<<,%a3@&,%d1 + 2220: a6d3 122d macw %a5l,%d1l,>>,%a3@&,%a3 + 2224: a493 122d macw %a5l,%d1l,,%a3@&,%d2 + 2228: aed3 122d macw %a5l,%d1l,>>,%a3@&,%sp + 222c: a29a 120d macw %a5l,%d1l,<<,%a2@\+,%d1 + 2230: a6da 120d macw %a5l,%d1l,>>,%a2@\+,%a3 + 2234: a49a 120d macw %a5l,%d1l,,%a2@\+,%d2 + 2238: aeda 120d macw %a5l,%d1l,>>,%a2@\+,%sp + 223c: a29a 122d macw %a5l,%d1l,<<,%a2@\+&,%d1 + 2240: a6da 122d macw %a5l,%d1l,>>,%a2@\+&,%a3 + 2244: a49a 122d macw %a5l,%d1l,,%a2@\+&,%d2 + 2248: aeda 122d macw %a5l,%d1l,>>,%a2@\+&,%sp + 224c: a2ae 120d 000a macw %a5l,%d1l,<<,%fp@\(10\),%d1 + 2252: a6ee 120d 000a macw %a5l,%d1l,>>,%fp@\(10\),%a3 + 2258: a4ae 120d 000a macw %a5l,%d1l,,%fp@\(10\),%d2 + 225e: aeee 120d 000a macw %a5l,%d1l,>>,%fp@\(10\),%sp + 2264: a2ae 122d 000a macw %a5l,%d1l,<<,%fp@\(10\)&,%d1 + 226a: a6ee 122d 000a macw %a5l,%d1l,>>,%fp@\(10\)&,%a3 + 2270: a4ae 122d 000a macw %a5l,%d1l,,%fp@\(10\)&,%d2 + 2276: aeee 122d 000a macw %a5l,%d1l,>>,%fp@\(10\)&,%sp + 227c: a2a1 120d macw %a5l,%d1l,<<,%a1@-,%d1 + 2280: a6e1 120d macw %a5l,%d1l,>>,%a1@-,%a3 + 2284: a4a1 120d macw %a5l,%d1l,,%a1@-,%d2 + 2288: aee1 120d macw %a5l,%d1l,>>,%a1@-,%sp + 228c: a2a1 122d macw %a5l,%d1l,<<,%a1@-&,%d1 + 2290: a6e1 122d macw %a5l,%d1l,>>,%a1@-&,%a3 + 2294: a4a1 122d macw %a5l,%d1l,,%a1@-&,%d2 + 2298: aee1 122d macw %a5l,%d1l,>>,%a1@-&,%sp + 229c: a293 160d macw %a5l,%d1l,<<,%a3@,%d1 + 22a0: a6d3 160d macw %a5l,%d1l,>>,%a3@,%a3 + 22a4: a493 160d macw %a5l,%d1l,,%a3@,%d2 + 22a8: aed3 160d macw %a5l,%d1l,>>,%a3@,%sp + 22ac: a293 162d macw %a5l,%d1l,<<,%a3@&,%d1 + 22b0: a6d3 162d macw %a5l,%d1l,>>,%a3@&,%a3 + 22b4: a493 162d macw %a5l,%d1l,,%a3@&,%d2 + 22b8: aed3 162d macw %a5l,%d1l,>>,%a3@&,%sp + 22bc: a29a 160d macw %a5l,%d1l,<<,%a2@\+,%d1 + 22c0: a6da 160d macw %a5l,%d1l,>>,%a2@\+,%a3 + 22c4: a49a 160d macw %a5l,%d1l,,%a2@\+,%d2 + 22c8: aeda 160d macw %a5l,%d1l,>>,%a2@\+,%sp + 22cc: a29a 162d macw %a5l,%d1l,<<,%a2@\+&,%d1 + 22d0: a6da 162d macw %a5l,%d1l,>>,%a2@\+&,%a3 + 22d4: a49a 162d macw %a5l,%d1l,,%a2@\+&,%d2 + 22d8: aeda 162d macw %a5l,%d1l,>>,%a2@\+&,%sp + 22dc: a2ae 160d 000a macw %a5l,%d1l,<<,%fp@\(10\),%d1 + 22e2: a6ee 160d 000a macw %a5l,%d1l,>>,%fp@\(10\),%a3 + 22e8: a4ae 160d 000a macw %a5l,%d1l,,%fp@\(10\),%d2 + 22ee: aeee 160d 000a macw %a5l,%d1l,>>,%fp@\(10\),%sp + 22f4: a2ae 162d 000a macw %a5l,%d1l,<<,%fp@\(10\)&,%d1 + 22fa: a6ee 162d 000a macw %a5l,%d1l,>>,%fp@\(10\)&,%a3 + 2300: a4ae 162d 000a macw %a5l,%d1l,,%fp@\(10\)&,%d2 + 2306: aeee 162d 000a macw %a5l,%d1l,>>,%fp@\(10\)&,%sp + 230c: a2a1 160d macw %a5l,%d1l,<<,%a1@-,%d1 + 2310: a6e1 160d macw %a5l,%d1l,>>,%a1@-,%a3 + 2314: a4a1 160d macw %a5l,%d1l,,%a1@-,%d2 + 2318: aee1 160d macw %a5l,%d1l,>>,%a1@-,%sp + 231c: a2a1 162d macw %a5l,%d1l,<<,%a1@-&,%d1 + 2320: a6e1 162d macw %a5l,%d1l,>>,%a1@-&,%a3 + 2324: a4a1 162d macw %a5l,%d1l,,%a1@-&,%d2 + 2328: aee1 162d macw %a5l,%d1l,>>,%a1@-&,%sp + 232c: a293 a0c6 macw %d6u,%a2u,%a3@,%d1 + 2330: a6d3 a0c6 macw %d6u,%a2u,%a3@,%a3 + 2334: a493 a0c6 macw %d6u,%a2u,%a3@,%d2 + 2338: aed3 a0c6 macw %d6u,%a2u,%a3@,%sp + 233c: a293 a0e6 macw %d6u,%a2u,<<,%a3@&,%d1 + 2340: a6d3 a0e6 macw %d6u,%a2u,>>,%a3@&,%a3 + 2344: a493 a0e6 macw %d6u,%a2u,,%a3@&,%d2 + 2348: aed3 a0e6 macw %d6u,%a2u,>>,%a3@&,%sp + 234c: a29a a0c6 macw %d6u,%a2u,%a2@\+,%d1 + 2350: a6da a0c6 macw %d6u,%a2u,%a2@\+,%a3 + 2354: a49a a0c6 macw %d6u,%a2u,%a2@\+,%d2 + 2358: aeda a0c6 macw %d6u,%a2u,%a2@\+,%sp + 235c: a29a a0e6 macw %d6u,%a2u,<<,%a2@\+&,%d1 + 2360: a6da a0e6 macw %d6u,%a2u,>>,%a2@\+&,%a3 + 2364: a49a a0e6 macw %d6u,%a2u,,%a2@\+&,%d2 + 2368: aeda a0e6 macw %d6u,%a2u,>>,%a2@\+&,%sp + 236c: a2ae a0c6 000a macw %d6u,%a2u,%fp@\(10\),%d1 + 2372: a6ee a0c6 000a macw %d6u,%a2u,%fp@\(10\),%a3 + 2378: a4ae a0c6 000a macw %d6u,%a2u,%fp@\(10\),%d2 + 237e: aeee a0c6 000a macw %d6u,%a2u,%fp@\(10\),%sp + 2384: a2ae a0e6 000a macw %d6u,%a2u,<<,%fp@\(10\)&,%d1 + 238a: a6ee a0e6 000a macw %d6u,%a2u,>>,%fp@\(10\)&,%a3 + 2390: a4ae a0e6 000a macw %d6u,%a2u,,%fp@\(10\)&,%d2 + 2396: aeee a0e6 000a macw %d6u,%a2u,>>,%fp@\(10\)&,%sp + 239c: a2a1 a0c6 macw %d6u,%a2u,%a1@-,%d1 + 23a0: a6e1 a0c6 macw %d6u,%a2u,%a1@-,%a3 + 23a4: a4a1 a0c6 macw %d6u,%a2u,%a1@-,%d2 + 23a8: aee1 a0c6 macw %d6u,%a2u,%a1@-,%sp + 23ac: a2a1 a0e6 macw %d6u,%a2u,<<,%a1@-&,%d1 + 23b0: a6e1 a0e6 macw %d6u,%a2u,>>,%a1@-&,%a3 + 23b4: a4a1 a0e6 macw %d6u,%a2u,,%a1@-&,%d2 + 23b8: aee1 a0e6 macw %d6u,%a2u,>>,%a1@-&,%sp + 23bc: a293 a2c6 macw %d6u,%a2u,<<,%a3@,%d1 + 23c0: a6d3 a2c6 macw %d6u,%a2u,>>,%a3@,%a3 + 23c4: a493 a2c6 macw %d6u,%a2u,,%a3@,%d2 + 23c8: aed3 a2c6 macw %d6u,%a2u,>>,%a3@,%sp + 23cc: a293 a2e6 macw %d6u,%a2u,<<,%a3@&,%d1 + 23d0: a6d3 a2e6 macw %d6u,%a2u,>>,%a3@&,%a3 + 23d4: a493 a2e6 macw %d6u,%a2u,,%a3@&,%d2 + 23d8: aed3 a2e6 macw %d6u,%a2u,>>,%a3@&,%sp + 23dc: a29a a2c6 macw %d6u,%a2u,<<,%a2@\+,%d1 + 23e0: a6da a2c6 macw %d6u,%a2u,>>,%a2@\+,%a3 + 23e4: a49a a2c6 macw %d6u,%a2u,,%a2@\+,%d2 + 23e8: aeda a2c6 macw %d6u,%a2u,>>,%a2@\+,%sp + 23ec: a29a a2e6 macw %d6u,%a2u,<<,%a2@\+&,%d1 + 23f0: a6da a2e6 macw %d6u,%a2u,>>,%a2@\+&,%a3 + 23f4: a49a a2e6 macw %d6u,%a2u,,%a2@\+&,%d2 + 23f8: aeda a2e6 macw %d6u,%a2u,>>,%a2@\+&,%sp + 23fc: a2ae a2c6 000a macw %d6u,%a2u,<<,%fp@\(10\),%d1 + 2402: a6ee a2c6 000a macw %d6u,%a2u,>>,%fp@\(10\),%a3 + 2408: a4ae a2c6 000a macw %d6u,%a2u,,%fp@\(10\),%d2 + 240e: aeee a2c6 000a macw %d6u,%a2u,>>,%fp@\(10\),%sp + 2414: a2ae a2e6 000a macw %d6u,%a2u,<<,%fp@\(10\)&,%d1 + 241a: a6ee a2e6 000a macw %d6u,%a2u,>>,%fp@\(10\)&,%a3 + 2420: a4ae a2e6 000a macw %d6u,%a2u,,%fp@\(10\)&,%d2 + 2426: aeee a2e6 000a macw %d6u,%a2u,>>,%fp@\(10\)&,%sp + 242c: a2a1 a2c6 macw %d6u,%a2u,<<,%a1@-,%d1 + 2430: a6e1 a2c6 macw %d6u,%a2u,>>,%a1@-,%a3 + 2434: a4a1 a2c6 macw %d6u,%a2u,,%a1@-,%d2 + 2438: aee1 a2c6 macw %d6u,%a2u,>>,%a1@-,%sp + 243c: a2a1 a2e6 macw %d6u,%a2u,<<,%a1@-&,%d1 + 2440: a6e1 a2e6 macw %d6u,%a2u,>>,%a1@-&,%a3 + 2444: a4a1 a2e6 macw %d6u,%a2u,,%a1@-&,%d2 + 2448: aee1 a2e6 macw %d6u,%a2u,>>,%a1@-&,%sp + 244c: a293 a6c6 macw %d6u,%a2u,<<,%a3@,%d1 + 2450: a6d3 a6c6 macw %d6u,%a2u,>>,%a3@,%a3 + 2454: a493 a6c6 macw %d6u,%a2u,,%a3@,%d2 + 2458: aed3 a6c6 macw %d6u,%a2u,>>,%a3@,%sp + 245c: a293 a6e6 macw %d6u,%a2u,<<,%a3@&,%d1 + 2460: a6d3 a6e6 macw %d6u,%a2u,>>,%a3@&,%a3 + 2464: a493 a6e6 macw %d6u,%a2u,,%a3@&,%d2 + 2468: aed3 a6e6 macw %d6u,%a2u,>>,%a3@&,%sp + 246c: a29a a6c6 macw %d6u,%a2u,<<,%a2@\+,%d1 + 2470: a6da a6c6 macw %d6u,%a2u,>>,%a2@\+,%a3 + 2474: a49a a6c6 macw %d6u,%a2u,,%a2@\+,%d2 + 2478: aeda a6c6 macw %d6u,%a2u,>>,%a2@\+,%sp + 247c: a29a a6e6 macw %d6u,%a2u,<<,%a2@\+&,%d1 + 2480: a6da a6e6 macw %d6u,%a2u,>>,%a2@\+&,%a3 + 2484: a49a a6e6 macw %d6u,%a2u,,%a2@\+&,%d2 + 2488: aeda a6e6 macw %d6u,%a2u,>>,%a2@\+&,%sp + 248c: a2ae a6c6 000a macw %d6u,%a2u,<<,%fp@\(10\),%d1 + 2492: a6ee a6c6 000a macw %d6u,%a2u,>>,%fp@\(10\),%a3 + 2498: a4ae a6c6 000a macw %d6u,%a2u,,%fp@\(10\),%d2 + 249e: aeee a6c6 000a macw %d6u,%a2u,>>,%fp@\(10\),%sp + 24a4: a2ae a6e6 000a macw %d6u,%a2u,<<,%fp@\(10\)&,%d1 + 24aa: a6ee a6e6 000a macw %d6u,%a2u,>>,%fp@\(10\)&,%a3 + 24b0: a4ae a6e6 000a macw %d6u,%a2u,,%fp@\(10\)&,%d2 + 24b6: aeee a6e6 000a macw %d6u,%a2u,>>,%fp@\(10\)&,%sp + 24bc: a2a1 a6c6 macw %d6u,%a2u,<<,%a1@-,%d1 + 24c0: a6e1 a6c6 macw %d6u,%a2u,>>,%a1@-,%a3 + 24c4: a4a1 a6c6 macw %d6u,%a2u,,%a1@-,%d2 + 24c8: aee1 a6c6 macw %d6u,%a2u,>>,%a1@-,%sp + 24cc: a2a1 a6e6 macw %d6u,%a2u,<<,%a1@-&,%d1 + 24d0: a6e1 a6e6 macw %d6u,%a2u,>>,%a1@-&,%a3 + 24d4: a4a1 a6e6 macw %d6u,%a2u,,%a1@-&,%d2 + 24d8: aee1 a6e6 macw %d6u,%a2u,>>,%a1@-&,%sp + 24dc: a293 a2c6 macw %d6u,%a2u,<<,%a3@,%d1 + 24e0: a6d3 a2c6 macw %d6u,%a2u,>>,%a3@,%a3 + 24e4: a493 a2c6 macw %d6u,%a2u,,%a3@,%d2 + 24e8: aed3 a2c6 macw %d6u,%a2u,>>,%a3@,%sp + 24ec: a293 a2e6 macw %d6u,%a2u,<<,%a3@&,%d1 + 24f0: a6d3 a2e6 macw %d6u,%a2u,>>,%a3@&,%a3 + 24f4: a493 a2e6 macw %d6u,%a2u,,%a3@&,%d2 + 24f8: aed3 a2e6 macw %d6u,%a2u,>>,%a3@&,%sp + 24fc: a29a a2c6 macw %d6u,%a2u,<<,%a2@\+,%d1 + 2500: a6da a2c6 macw %d6u,%a2u,>>,%a2@\+,%a3 + 2504: a49a a2c6 macw %d6u,%a2u,,%a2@\+,%d2 + 2508: aeda a2c6 macw %d6u,%a2u,>>,%a2@\+,%sp + 250c: a29a a2e6 macw %d6u,%a2u,<<,%a2@\+&,%d1 + 2510: a6da a2e6 macw %d6u,%a2u,>>,%a2@\+&,%a3 + 2514: a49a a2e6 macw %d6u,%a2u,,%a2@\+&,%d2 + 2518: aeda a2e6 macw %d6u,%a2u,>>,%a2@\+&,%sp + 251c: a2ae a2c6 000a macw %d6u,%a2u,<<,%fp@\(10\),%d1 + 2522: a6ee a2c6 000a macw %d6u,%a2u,>>,%fp@\(10\),%a3 + 2528: a4ae a2c6 000a macw %d6u,%a2u,,%fp@\(10\),%d2 + 252e: aeee a2c6 000a macw %d6u,%a2u,>>,%fp@\(10\),%sp + 2534: a2ae a2e6 000a macw %d6u,%a2u,<<,%fp@\(10\)&,%d1 + 253a: a6ee a2e6 000a macw %d6u,%a2u,>>,%fp@\(10\)&,%a3 + 2540: a4ae a2e6 000a macw %d6u,%a2u,,%fp@\(10\)&,%d2 + 2546: aeee a2e6 000a macw %d6u,%a2u,>>,%fp@\(10\)&,%sp + 254c: a2a1 a2c6 macw %d6u,%a2u,<<,%a1@-,%d1 + 2550: a6e1 a2c6 macw %d6u,%a2u,>>,%a1@-,%a3 + 2554: a4a1 a2c6 macw %d6u,%a2u,,%a1@-,%d2 + 2558: aee1 a2c6 macw %d6u,%a2u,>>,%a1@-,%sp + 255c: a2a1 a2e6 macw %d6u,%a2u,<<,%a1@-&,%d1 + 2560: a6e1 a2e6 macw %d6u,%a2u,>>,%a1@-&,%a3 + 2564: a4a1 a2e6 macw %d6u,%a2u,,%a1@-&,%d2 + 2568: aee1 a2e6 macw %d6u,%a2u,>>,%a1@-&,%sp + 256c: a293 a6c6 macw %d6u,%a2u,<<,%a3@,%d1 + 2570: a6d3 a6c6 macw %d6u,%a2u,>>,%a3@,%a3 + 2574: a493 a6c6 macw %d6u,%a2u,,%a3@,%d2 + 2578: aed3 a6c6 macw %d6u,%a2u,>>,%a3@,%sp + 257c: a293 a6e6 macw %d6u,%a2u,<<,%a3@&,%d1 + 2580: a6d3 a6e6 macw %d6u,%a2u,>>,%a3@&,%a3 + 2584: a493 a6e6 macw %d6u,%a2u,,%a3@&,%d2 + 2588: aed3 a6e6 macw %d6u,%a2u,>>,%a3@&,%sp + 258c: a29a a6c6 macw %d6u,%a2u,<<,%a2@\+,%d1 + 2590: a6da a6c6 macw %d6u,%a2u,>>,%a2@\+,%a3 + 2594: a49a a6c6 macw %d6u,%a2u,,%a2@\+,%d2 + 2598: aeda a6c6 macw %d6u,%a2u,>>,%a2@\+,%sp + 259c: a29a a6e6 macw %d6u,%a2u,<<,%a2@\+&,%d1 + 25a0: a6da a6e6 macw %d6u,%a2u,>>,%a2@\+&,%a3 + 25a4: a49a a6e6 macw %d6u,%a2u,,%a2@\+&,%d2 + 25a8: aeda a6e6 macw %d6u,%a2u,>>,%a2@\+&,%sp + 25ac: a2ae a6c6 000a macw %d6u,%a2u,<<,%fp@\(10\),%d1 + 25b2: a6ee a6c6 000a macw %d6u,%a2u,>>,%fp@\(10\),%a3 + 25b8: a4ae a6c6 000a macw %d6u,%a2u,,%fp@\(10\),%d2 + 25be: aeee a6c6 000a macw %d6u,%a2u,>>,%fp@\(10\),%sp + 25c4: a2ae a6e6 000a macw %d6u,%a2u,<<,%fp@\(10\)&,%d1 + 25ca: a6ee a6e6 000a macw %d6u,%a2u,>>,%fp@\(10\)&,%a3 + 25d0: a4ae a6e6 000a macw %d6u,%a2u,,%fp@\(10\)&,%d2 + 25d6: aeee a6e6 000a macw %d6u,%a2u,>>,%fp@\(10\)&,%sp + 25dc: a2a1 a6c6 macw %d6u,%a2u,<<,%a1@-,%d1 + 25e0: a6e1 a6c6 macw %d6u,%a2u,>>,%a1@-,%a3 + 25e4: a4a1 a6c6 macw %d6u,%a2u,,%a1@-,%d2 + 25e8: aee1 a6c6 macw %d6u,%a2u,>>,%a1@-,%sp + 25ec: a2a1 a6e6 macw %d6u,%a2u,<<,%a1@-&,%d1 + 25f0: a6e1 a6e6 macw %d6u,%a2u,>>,%a1@-&,%a3 + 25f4: a4a1 a6e6 macw %d6u,%a2u,,%a1@-&,%d2 + 25f8: aee1 a6e6 macw %d6u,%a2u,>>,%a1@-&,%sp + 25fc: a293 3046 macw %d6u,%d3l,%a3@,%d1 + 2600: a6d3 3046 macw %d6u,%d3l,%a3@,%a3 + 2604: a493 3046 macw %d6u,%d3l,%a3@,%d2 + 2608: aed3 3046 macw %d6u,%d3l,%a3@,%sp + 260c: a293 3066 macw %d6u,%d3l,<<,%a3@&,%d1 + 2610: a6d3 3066 macw %d6u,%d3l,>>,%a3@&,%a3 + 2614: a493 3066 macw %d6u,%d3l,,%a3@&,%d2 + 2618: aed3 3066 macw %d6u,%d3l,>>,%a3@&,%sp + 261c: a29a 3046 macw %d6u,%d3l,%a2@\+,%d1 + 2620: a6da 3046 macw %d6u,%d3l,%a2@\+,%a3 + 2624: a49a 3046 macw %d6u,%d3l,%a2@\+,%d2 + 2628: aeda 3046 macw %d6u,%d3l,%a2@\+,%sp + 262c: a29a 3066 macw %d6u,%d3l,<<,%a2@\+&,%d1 + 2630: a6da 3066 macw %d6u,%d3l,>>,%a2@\+&,%a3 + 2634: a49a 3066 macw %d6u,%d3l,,%a2@\+&,%d2 + 2638: aeda 3066 macw %d6u,%d3l,>>,%a2@\+&,%sp + 263c: a2ae 3046 000a macw %d6u,%d3l,%fp@\(10\),%d1 + 2642: a6ee 3046 000a macw %d6u,%d3l,%fp@\(10\),%a3 + 2648: a4ae 3046 000a macw %d6u,%d3l,%fp@\(10\),%d2 + 264e: aeee 3046 000a macw %d6u,%d3l,%fp@\(10\),%sp + 2654: a2ae 3066 000a macw %d6u,%d3l,<<,%fp@\(10\)&,%d1 + 265a: a6ee 3066 000a macw %d6u,%d3l,>>,%fp@\(10\)&,%a3 + 2660: a4ae 3066 000a macw %d6u,%d3l,,%fp@\(10\)&,%d2 + 2666: aeee 3066 000a macw %d6u,%d3l,>>,%fp@\(10\)&,%sp + 266c: a2a1 3046 macw %d6u,%d3l,%a1@-,%d1 + 2670: a6e1 3046 macw %d6u,%d3l,%a1@-,%a3 + 2674: a4a1 3046 macw %d6u,%d3l,%a1@-,%d2 + 2678: aee1 3046 macw %d6u,%d3l,%a1@-,%sp + 267c: a2a1 3066 macw %d6u,%d3l,<<,%a1@-&,%d1 + 2680: a6e1 3066 macw %d6u,%d3l,>>,%a1@-&,%a3 + 2684: a4a1 3066 macw %d6u,%d3l,,%a1@-&,%d2 + 2688: aee1 3066 macw %d6u,%d3l,>>,%a1@-&,%sp + 268c: a293 3246 macw %d6u,%d3l,<<,%a3@,%d1 + 2690: a6d3 3246 macw %d6u,%d3l,>>,%a3@,%a3 + 2694: a493 3246 macw %d6u,%d3l,,%a3@,%d2 + 2698: aed3 3246 macw %d6u,%d3l,>>,%a3@,%sp + 269c: a293 3266 macw %d6u,%d3l,<<,%a3@&,%d1 + 26a0: a6d3 3266 macw %d6u,%d3l,>>,%a3@&,%a3 + 26a4: a493 3266 macw %d6u,%d3l,,%a3@&,%d2 + 26a8: aed3 3266 macw %d6u,%d3l,>>,%a3@&,%sp + 26ac: a29a 3246 macw %d6u,%d3l,<<,%a2@\+,%d1 + 26b0: a6da 3246 macw %d6u,%d3l,>>,%a2@\+,%a3 + 26b4: a49a 3246 macw %d6u,%d3l,,%a2@\+,%d2 + 26b8: aeda 3246 macw %d6u,%d3l,>>,%a2@\+,%sp + 26bc: a29a 3266 macw %d6u,%d3l,<<,%a2@\+&,%d1 + 26c0: a6da 3266 macw %d6u,%d3l,>>,%a2@\+&,%a3 + 26c4: a49a 3266 macw %d6u,%d3l,,%a2@\+&,%d2 + 26c8: aeda 3266 macw %d6u,%d3l,>>,%a2@\+&,%sp + 26cc: a2ae 3246 000a macw %d6u,%d3l,<<,%fp@\(10\),%d1 + 26d2: a6ee 3246 000a macw %d6u,%d3l,>>,%fp@\(10\),%a3 + 26d8: a4ae 3246 000a macw %d6u,%d3l,,%fp@\(10\),%d2 + 26de: aeee 3246 000a macw %d6u,%d3l,>>,%fp@\(10\),%sp + 26e4: a2ae 3266 000a macw %d6u,%d3l,<<,%fp@\(10\)&,%d1 + 26ea: a6ee 3266 000a macw %d6u,%d3l,>>,%fp@\(10\)&,%a3 + 26f0: a4ae 3266 000a macw %d6u,%d3l,,%fp@\(10\)&,%d2 + 26f6: aeee 3266 000a macw %d6u,%d3l,>>,%fp@\(10\)&,%sp + 26fc: a2a1 3246 macw %d6u,%d3l,<<,%a1@-,%d1 + 2700: a6e1 3246 macw %d6u,%d3l,>>,%a1@-,%a3 + 2704: a4a1 3246 macw %d6u,%d3l,,%a1@-,%d2 + 2708: aee1 3246 macw %d6u,%d3l,>>,%a1@-,%sp + 270c: a2a1 3266 macw %d6u,%d3l,<<,%a1@-&,%d1 + 2710: a6e1 3266 macw %d6u,%d3l,>>,%a1@-&,%a3 + 2714: a4a1 3266 macw %d6u,%d3l,,%a1@-&,%d2 + 2718: aee1 3266 macw %d6u,%d3l,>>,%a1@-&,%sp + 271c: a293 3646 macw %d6u,%d3l,<<,%a3@,%d1 + 2720: a6d3 3646 macw %d6u,%d3l,>>,%a3@,%a3 + 2724: a493 3646 macw %d6u,%d3l,,%a3@,%d2 + 2728: aed3 3646 macw %d6u,%d3l,>>,%a3@,%sp + 272c: a293 3666 macw %d6u,%d3l,<<,%a3@&,%d1 + 2730: a6d3 3666 macw %d6u,%d3l,>>,%a3@&,%a3 + 2734: a493 3666 macw %d6u,%d3l,,%a3@&,%d2 + 2738: aed3 3666 macw %d6u,%d3l,>>,%a3@&,%sp + 273c: a29a 3646 macw %d6u,%d3l,<<,%a2@\+,%d1 + 2740: a6da 3646 macw %d6u,%d3l,>>,%a2@\+,%a3 + 2744: a49a 3646 macw %d6u,%d3l,,%a2@\+,%d2 + 2748: aeda 3646 macw %d6u,%d3l,>>,%a2@\+,%sp + 274c: a29a 3666 macw %d6u,%d3l,<<,%a2@\+&,%d1 + 2750: a6da 3666 macw %d6u,%d3l,>>,%a2@\+&,%a3 + 2754: a49a 3666 macw %d6u,%d3l,,%a2@\+&,%d2 + 2758: aeda 3666 macw %d6u,%d3l,>>,%a2@\+&,%sp + 275c: a2ae 3646 000a macw %d6u,%d3l,<<,%fp@\(10\),%d1 + 2762: a6ee 3646 000a macw %d6u,%d3l,>>,%fp@\(10\),%a3 + 2768: a4ae 3646 000a macw %d6u,%d3l,,%fp@\(10\),%d2 + 276e: aeee 3646 000a macw %d6u,%d3l,>>,%fp@\(10\),%sp + 2774: a2ae 3666 000a macw %d6u,%d3l,<<,%fp@\(10\)&,%d1 + 277a: a6ee 3666 000a macw %d6u,%d3l,>>,%fp@\(10\)&,%a3 + 2780: a4ae 3666 000a macw %d6u,%d3l,,%fp@\(10\)&,%d2 + 2786: aeee 3666 000a macw %d6u,%d3l,>>,%fp@\(10\)&,%sp + 278c: a2a1 3646 macw %d6u,%d3l,<<,%a1@-,%d1 + 2790: a6e1 3646 macw %d6u,%d3l,>>,%a1@-,%a3 + 2794: a4a1 3646 macw %d6u,%d3l,,%a1@-,%d2 + 2798: aee1 3646 macw %d6u,%d3l,>>,%a1@-,%sp + 279c: a2a1 3666 macw %d6u,%d3l,<<,%a1@-&,%d1 + 27a0: a6e1 3666 macw %d6u,%d3l,>>,%a1@-&,%a3 + 27a4: a4a1 3666 macw %d6u,%d3l,,%a1@-&,%d2 + 27a8: aee1 3666 macw %d6u,%d3l,>>,%a1@-&,%sp + 27ac: a293 3246 macw %d6u,%d3l,<<,%a3@,%d1 + 27b0: a6d3 3246 macw %d6u,%d3l,>>,%a3@,%a3 + 27b4: a493 3246 macw %d6u,%d3l,,%a3@,%d2 + 27b8: aed3 3246 macw %d6u,%d3l,>>,%a3@,%sp + 27bc: a293 3266 macw %d6u,%d3l,<<,%a3@&,%d1 + 27c0: a6d3 3266 macw %d6u,%d3l,>>,%a3@&,%a3 + 27c4: a493 3266 macw %d6u,%d3l,,%a3@&,%d2 + 27c8: aed3 3266 macw %d6u,%d3l,>>,%a3@&,%sp + 27cc: a29a 3246 macw %d6u,%d3l,<<,%a2@\+,%d1 + 27d0: a6da 3246 macw %d6u,%d3l,>>,%a2@\+,%a3 + 27d4: a49a 3246 macw %d6u,%d3l,,%a2@\+,%d2 + 27d8: aeda 3246 macw %d6u,%d3l,>>,%a2@\+,%sp + 27dc: a29a 3266 macw %d6u,%d3l,<<,%a2@\+&,%d1 + 27e0: a6da 3266 macw %d6u,%d3l,>>,%a2@\+&,%a3 + 27e4: a49a 3266 macw %d6u,%d3l,,%a2@\+&,%d2 + 27e8: aeda 3266 macw %d6u,%d3l,>>,%a2@\+&,%sp + 27ec: a2ae 3246 000a macw %d6u,%d3l,<<,%fp@\(10\),%d1 + 27f2: a6ee 3246 000a macw %d6u,%d3l,>>,%fp@\(10\),%a3 + 27f8: a4ae 3246 000a macw %d6u,%d3l,,%fp@\(10\),%d2 + 27fe: aeee 3246 000a macw %d6u,%d3l,>>,%fp@\(10\),%sp + 2804: a2ae 3266 000a macw %d6u,%d3l,<<,%fp@\(10\)&,%d1 + 280a: a6ee 3266 000a macw %d6u,%d3l,>>,%fp@\(10\)&,%a3 + 2810: a4ae 3266 000a macw %d6u,%d3l,,%fp@\(10\)&,%d2 + 2816: aeee 3266 000a macw %d6u,%d3l,>>,%fp@\(10\)&,%sp + 281c: a2a1 3246 macw %d6u,%d3l,<<,%a1@-,%d1 + 2820: a6e1 3246 macw %d6u,%d3l,>>,%a1@-,%a3 + 2824: a4a1 3246 macw %d6u,%d3l,,%a1@-,%d2 + 2828: aee1 3246 macw %d6u,%d3l,>>,%a1@-,%sp + 282c: a2a1 3266 macw %d6u,%d3l,<<,%a1@-&,%d1 + 2830: a6e1 3266 macw %d6u,%d3l,>>,%a1@-&,%a3 + 2834: a4a1 3266 macw %d6u,%d3l,,%a1@-&,%d2 + 2838: aee1 3266 macw %d6u,%d3l,>>,%a1@-&,%sp + 283c: a293 3646 macw %d6u,%d3l,<<,%a3@,%d1 + 2840: a6d3 3646 macw %d6u,%d3l,>>,%a3@,%a3 + 2844: a493 3646 macw %d6u,%d3l,,%a3@,%d2 + 2848: aed3 3646 macw %d6u,%d3l,>>,%a3@,%sp + 284c: a293 3666 macw %d6u,%d3l,<<,%a3@&,%d1 + 2850: a6d3 3666 macw %d6u,%d3l,>>,%a3@&,%a3 + 2854: a493 3666 macw %d6u,%d3l,,%a3@&,%d2 + 2858: aed3 3666 macw %d6u,%d3l,>>,%a3@&,%sp + 285c: a29a 3646 macw %d6u,%d3l,<<,%a2@\+,%d1 + 2860: a6da 3646 macw %d6u,%d3l,>>,%a2@\+,%a3 + 2864: a49a 3646 macw %d6u,%d3l,,%a2@\+,%d2 + 2868: aeda 3646 macw %d6u,%d3l,>>,%a2@\+,%sp + 286c: a29a 3666 macw %d6u,%d3l,<<,%a2@\+&,%d1 + 2870: a6da 3666 macw %d6u,%d3l,>>,%a2@\+&,%a3 + 2874: a49a 3666 macw %d6u,%d3l,,%a2@\+&,%d2 + 2878: aeda 3666 macw %d6u,%d3l,>>,%a2@\+&,%sp + 287c: a2ae 3646 000a macw %d6u,%d3l,<<,%fp@\(10\),%d1 + 2882: a6ee 3646 000a macw %d6u,%d3l,>>,%fp@\(10\),%a3 + 2888: a4ae 3646 000a macw %d6u,%d3l,,%fp@\(10\),%d2 + 288e: aeee 3646 000a macw %d6u,%d3l,>>,%fp@\(10\),%sp + 2894: a2ae 3666 000a macw %d6u,%d3l,<<,%fp@\(10\)&,%d1 + 289a: a6ee 3666 000a macw %d6u,%d3l,>>,%fp@\(10\)&,%a3 + 28a0: a4ae 3666 000a macw %d6u,%d3l,,%fp@\(10\)&,%d2 + 28a6: aeee 3666 000a macw %d6u,%d3l,>>,%fp@\(10\)&,%sp + 28ac: a2a1 3646 macw %d6u,%d3l,<<,%a1@-,%d1 + 28b0: a6e1 3646 macw %d6u,%d3l,>>,%a1@-,%a3 + 28b4: a4a1 3646 macw %d6u,%d3l,,%a1@-,%d2 + 28b8: aee1 3646 macw %d6u,%d3l,>>,%a1@-,%sp + 28bc: a2a1 3666 macw %d6u,%d3l,<<,%a1@-&,%d1 + 28c0: a6e1 3666 macw %d6u,%d3l,>>,%a1@-&,%a3 + 28c4: a4a1 3666 macw %d6u,%d3l,,%a1@-&,%d2 + 28c8: aee1 3666 macw %d6u,%d3l,>>,%a1@-&,%sp + 28cc: a293 f0c6 macw %d6u,%spu,%a3@,%d1 + 28d0: a6d3 f0c6 macw %d6u,%spu,%a3@,%a3 + 28d4: a493 f0c6 macw %d6u,%spu,%a3@,%d2 + 28d8: aed3 f0c6 macw %d6u,%spu,%a3@,%sp + 28dc: a293 f0e6 macw %d6u,%spu,<<,%a3@&,%d1 + 28e0: a6d3 f0e6 macw %d6u,%spu,>>,%a3@&,%a3 + 28e4: a493 f0e6 macw %d6u,%spu,,%a3@&,%d2 + 28e8: aed3 f0e6 macw %d6u,%spu,>>,%a3@&,%sp + 28ec: a29a f0c6 macw %d6u,%spu,%a2@\+,%d1 + 28f0: a6da f0c6 macw %d6u,%spu,%a2@\+,%a3 + 28f4: a49a f0c6 macw %d6u,%spu,%a2@\+,%d2 + 28f8: aeda f0c6 macw %d6u,%spu,%a2@\+,%sp + 28fc: a29a f0e6 macw %d6u,%spu,<<,%a2@\+&,%d1 + 2900: a6da f0e6 macw %d6u,%spu,>>,%a2@\+&,%a3 + 2904: a49a f0e6 macw %d6u,%spu,,%a2@\+&,%d2 + 2908: aeda f0e6 macw %d6u,%spu,>>,%a2@\+&,%sp + 290c: a2ae f0c6 000a macw %d6u,%spu,%fp@\(10\),%d1 + 2912: a6ee f0c6 000a macw %d6u,%spu,%fp@\(10\),%a3 + 2918: a4ae f0c6 000a macw %d6u,%spu,%fp@\(10\),%d2 + 291e: aeee f0c6 000a macw %d6u,%spu,%fp@\(10\),%sp + 2924: a2ae f0e6 000a macw %d6u,%spu,<<,%fp@\(10\)&,%d1 + 292a: a6ee f0e6 000a macw %d6u,%spu,>>,%fp@\(10\)&,%a3 + 2930: a4ae f0e6 000a macw %d6u,%spu,,%fp@\(10\)&,%d2 + 2936: aeee f0e6 000a macw %d6u,%spu,>>,%fp@\(10\)&,%sp + 293c: a2a1 f0c6 macw %d6u,%spu,%a1@-,%d1 + 2940: a6e1 f0c6 macw %d6u,%spu,%a1@-,%a3 + 2944: a4a1 f0c6 macw %d6u,%spu,%a1@-,%d2 + 2948: aee1 f0c6 macw %d6u,%spu,%a1@-,%sp + 294c: a2a1 f0e6 macw %d6u,%spu,<<,%a1@-&,%d1 + 2950: a6e1 f0e6 macw %d6u,%spu,>>,%a1@-&,%a3 + 2954: a4a1 f0e6 macw %d6u,%spu,,%a1@-&,%d2 + 2958: aee1 f0e6 macw %d6u,%spu,>>,%a1@-&,%sp + 295c: a293 f2c6 macw %d6u,%spu,<<,%a3@,%d1 + 2960: a6d3 f2c6 macw %d6u,%spu,>>,%a3@,%a3 + 2964: a493 f2c6 macw %d6u,%spu,,%a3@,%d2 + 2968: aed3 f2c6 macw %d6u,%spu,>>,%a3@,%sp + 296c: a293 f2e6 macw %d6u,%spu,<<,%a3@&,%d1 + 2970: a6d3 f2e6 macw %d6u,%spu,>>,%a3@&,%a3 + 2974: a493 f2e6 macw %d6u,%spu,,%a3@&,%d2 + 2978: aed3 f2e6 macw %d6u,%spu,>>,%a3@&,%sp + 297c: a29a f2c6 macw %d6u,%spu,<<,%a2@\+,%d1 + 2980: a6da f2c6 macw %d6u,%spu,>>,%a2@\+,%a3 + 2984: a49a f2c6 macw %d6u,%spu,,%a2@\+,%d2 + 2988: aeda f2c6 macw %d6u,%spu,>>,%a2@\+,%sp + 298c: a29a f2e6 macw %d6u,%spu,<<,%a2@\+&,%d1 + 2990: a6da f2e6 macw %d6u,%spu,>>,%a2@\+&,%a3 + 2994: a49a f2e6 macw %d6u,%spu,,%a2@\+&,%d2 + 2998: aeda f2e6 macw %d6u,%spu,>>,%a2@\+&,%sp + 299c: a2ae f2c6 000a macw %d6u,%spu,<<,%fp@\(10\),%d1 + 29a2: a6ee f2c6 000a macw %d6u,%spu,>>,%fp@\(10\),%a3 + 29a8: a4ae f2c6 000a macw %d6u,%spu,,%fp@\(10\),%d2 + 29ae: aeee f2c6 000a macw %d6u,%spu,>>,%fp@\(10\),%sp + 29b4: a2ae f2e6 000a macw %d6u,%spu,<<,%fp@\(10\)&,%d1 + 29ba: a6ee f2e6 000a macw %d6u,%spu,>>,%fp@\(10\)&,%a3 + 29c0: a4ae f2e6 000a macw %d6u,%spu,,%fp@\(10\)&,%d2 + 29c6: aeee f2e6 000a macw %d6u,%spu,>>,%fp@\(10\)&,%sp + 29cc: a2a1 f2c6 macw %d6u,%spu,<<,%a1@-,%d1 + 29d0: a6e1 f2c6 macw %d6u,%spu,>>,%a1@-,%a3 + 29d4: a4a1 f2c6 macw %d6u,%spu,,%a1@-,%d2 + 29d8: aee1 f2c6 macw %d6u,%spu,>>,%a1@-,%sp + 29dc: a2a1 f2e6 macw %d6u,%spu,<<,%a1@-&,%d1 + 29e0: a6e1 f2e6 macw %d6u,%spu,>>,%a1@-&,%a3 + 29e4: a4a1 f2e6 macw %d6u,%spu,,%a1@-&,%d2 + 29e8: aee1 f2e6 macw %d6u,%spu,>>,%a1@-&,%sp + 29ec: a293 f6c6 macw %d6u,%spu,<<,%a3@,%d1 + 29f0: a6d3 f6c6 macw %d6u,%spu,>>,%a3@,%a3 + 29f4: a493 f6c6 macw %d6u,%spu,,%a3@,%d2 + 29f8: aed3 f6c6 macw %d6u,%spu,>>,%a3@,%sp + 29fc: a293 f6e6 macw %d6u,%spu,<<,%a3@&,%d1 + 2a00: a6d3 f6e6 macw %d6u,%spu,>>,%a3@&,%a3 + 2a04: a493 f6e6 macw %d6u,%spu,,%a3@&,%d2 + 2a08: aed3 f6e6 macw %d6u,%spu,>>,%a3@&,%sp + 2a0c: a29a f6c6 macw %d6u,%spu,<<,%a2@\+,%d1 + 2a10: a6da f6c6 macw %d6u,%spu,>>,%a2@\+,%a3 + 2a14: a49a f6c6 macw %d6u,%spu,,%a2@\+,%d2 + 2a18: aeda f6c6 macw %d6u,%spu,>>,%a2@\+,%sp + 2a1c: a29a f6e6 macw %d6u,%spu,<<,%a2@\+&,%d1 + 2a20: a6da f6e6 macw %d6u,%spu,>>,%a2@\+&,%a3 + 2a24: a49a f6e6 macw %d6u,%spu,,%a2@\+&,%d2 + 2a28: aeda f6e6 macw %d6u,%spu,>>,%a2@\+&,%sp + 2a2c: a2ae f6c6 000a macw %d6u,%spu,<<,%fp@\(10\),%d1 + 2a32: a6ee f6c6 000a macw %d6u,%spu,>>,%fp@\(10\),%a3 + 2a38: a4ae f6c6 000a macw %d6u,%spu,,%fp@\(10\),%d2 + 2a3e: aeee f6c6 000a macw %d6u,%spu,>>,%fp@\(10\),%sp + 2a44: a2ae f6e6 000a macw %d6u,%spu,<<,%fp@\(10\)&,%d1 + 2a4a: a6ee f6e6 000a macw %d6u,%spu,>>,%fp@\(10\)&,%a3 + 2a50: a4ae f6e6 000a macw %d6u,%spu,,%fp@\(10\)&,%d2 + 2a56: aeee f6e6 000a macw %d6u,%spu,>>,%fp@\(10\)&,%sp + 2a5c: a2a1 f6c6 macw %d6u,%spu,<<,%a1@-,%d1 + 2a60: a6e1 f6c6 macw %d6u,%spu,>>,%a1@-,%a3 + 2a64: a4a1 f6c6 macw %d6u,%spu,,%a1@-,%d2 + 2a68: aee1 f6c6 macw %d6u,%spu,>>,%a1@-,%sp + 2a6c: a2a1 f6e6 macw %d6u,%spu,<<,%a1@-&,%d1 + 2a70: a6e1 f6e6 macw %d6u,%spu,>>,%a1@-&,%a3 + 2a74: a4a1 f6e6 macw %d6u,%spu,,%a1@-&,%d2 + 2a78: aee1 f6e6 macw %d6u,%spu,>>,%a1@-&,%sp + 2a7c: a293 f2c6 macw %d6u,%spu,<<,%a3@,%d1 + 2a80: a6d3 f2c6 macw %d6u,%spu,>>,%a3@,%a3 + 2a84: a493 f2c6 macw %d6u,%spu,,%a3@,%d2 + 2a88: aed3 f2c6 macw %d6u,%spu,>>,%a3@,%sp + 2a8c: a293 f2e6 macw %d6u,%spu,<<,%a3@&,%d1 + 2a90: a6d3 f2e6 macw %d6u,%spu,>>,%a3@&,%a3 + 2a94: a493 f2e6 macw %d6u,%spu,,%a3@&,%d2 + 2a98: aed3 f2e6 macw %d6u,%spu,>>,%a3@&,%sp + 2a9c: a29a f2c6 macw %d6u,%spu,<<,%a2@\+,%d1 + 2aa0: a6da f2c6 macw %d6u,%spu,>>,%a2@\+,%a3 + 2aa4: a49a f2c6 macw %d6u,%spu,,%a2@\+,%d2 + 2aa8: aeda f2c6 macw %d6u,%spu,>>,%a2@\+,%sp + 2aac: a29a f2e6 macw %d6u,%spu,<<,%a2@\+&,%d1 + 2ab0: a6da f2e6 macw %d6u,%spu,>>,%a2@\+&,%a3 + 2ab4: a49a f2e6 macw %d6u,%spu,,%a2@\+&,%d2 + 2ab8: aeda f2e6 macw %d6u,%spu,>>,%a2@\+&,%sp + 2abc: a2ae f2c6 000a macw %d6u,%spu,<<,%fp@\(10\),%d1 + 2ac2: a6ee f2c6 000a macw %d6u,%spu,>>,%fp@\(10\),%a3 + 2ac8: a4ae f2c6 000a macw %d6u,%spu,,%fp@\(10\),%d2 + 2ace: aeee f2c6 000a macw %d6u,%spu,>>,%fp@\(10\),%sp + 2ad4: a2ae f2e6 000a macw %d6u,%spu,<<,%fp@\(10\)&,%d1 + 2ada: a6ee f2e6 000a macw %d6u,%spu,>>,%fp@\(10\)&,%a3 + 2ae0: a4ae f2e6 000a macw %d6u,%spu,,%fp@\(10\)&,%d2 + 2ae6: aeee f2e6 000a macw %d6u,%spu,>>,%fp@\(10\)&,%sp + 2aec: a2a1 f2c6 macw %d6u,%spu,<<,%a1@-,%d1 + 2af0: a6e1 f2c6 macw %d6u,%spu,>>,%a1@-,%a3 + 2af4: a4a1 f2c6 macw %d6u,%spu,,%a1@-,%d2 + 2af8: aee1 f2c6 macw %d6u,%spu,>>,%a1@-,%sp + 2afc: a2a1 f2e6 macw %d6u,%spu,<<,%a1@-&,%d1 + 2b00: a6e1 f2e6 macw %d6u,%spu,>>,%a1@-&,%a3 + 2b04: a4a1 f2e6 macw %d6u,%spu,,%a1@-&,%d2 + 2b08: aee1 f2e6 macw %d6u,%spu,>>,%a1@-&,%sp + 2b0c: a293 f6c6 macw %d6u,%spu,<<,%a3@,%d1 + 2b10: a6d3 f6c6 macw %d6u,%spu,>>,%a3@,%a3 + 2b14: a493 f6c6 macw %d6u,%spu,,%a3@,%d2 + 2b18: aed3 f6c6 macw %d6u,%spu,>>,%a3@,%sp + 2b1c: a293 f6e6 macw %d6u,%spu,<<,%a3@&,%d1 + 2b20: a6d3 f6e6 macw %d6u,%spu,>>,%a3@&,%a3 + 2b24: a493 f6e6 macw %d6u,%spu,,%a3@&,%d2 + 2b28: aed3 f6e6 macw %d6u,%spu,>>,%a3@&,%sp + 2b2c: a29a f6c6 macw %d6u,%spu,<<,%a2@\+,%d1 + 2b30: a6da f6c6 macw %d6u,%spu,>>,%a2@\+,%a3 + 2b34: a49a f6c6 macw %d6u,%spu,,%a2@\+,%d2 + 2b38: aeda f6c6 macw %d6u,%spu,>>,%a2@\+,%sp + 2b3c: a29a f6e6 macw %d6u,%spu,<<,%a2@\+&,%d1 + 2b40: a6da f6e6 macw %d6u,%spu,>>,%a2@\+&,%a3 + 2b44: a49a f6e6 macw %d6u,%spu,,%a2@\+&,%d2 + 2b48: aeda f6e6 macw %d6u,%spu,>>,%a2@\+&,%sp + 2b4c: a2ae f6c6 000a macw %d6u,%spu,<<,%fp@\(10\),%d1 + 2b52: a6ee f6c6 000a macw %d6u,%spu,>>,%fp@\(10\),%a3 + 2b58: a4ae f6c6 000a macw %d6u,%spu,,%fp@\(10\),%d2 + 2b5e: aeee f6c6 000a macw %d6u,%spu,>>,%fp@\(10\),%sp + 2b64: a2ae f6e6 000a macw %d6u,%spu,<<,%fp@\(10\)&,%d1 + 2b6a: a6ee f6e6 000a macw %d6u,%spu,>>,%fp@\(10\)&,%a3 + 2b70: a4ae f6e6 000a macw %d6u,%spu,,%fp@\(10\)&,%d2 + 2b76: aeee f6e6 000a macw %d6u,%spu,>>,%fp@\(10\)&,%sp + 2b7c: a2a1 f6c6 macw %d6u,%spu,<<,%a1@-,%d1 + 2b80: a6e1 f6c6 macw %d6u,%spu,>>,%a1@-,%a3 + 2b84: a4a1 f6c6 macw %d6u,%spu,,%a1@-,%d2 + 2b88: aee1 f6c6 macw %d6u,%spu,>>,%a1@-,%sp + 2b8c: a2a1 f6e6 macw %d6u,%spu,<<,%a1@-&,%d1 + 2b90: a6e1 f6e6 macw %d6u,%spu,>>,%a1@-&,%a3 + 2b94: a4a1 f6e6 macw %d6u,%spu,,%a1@-&,%d2 + 2b98: aee1 f6e6 macw %d6u,%spu,>>,%a1@-&,%sp + 2b9c: a293 1046 macw %d6u,%d1l,%a3@,%d1 + 2ba0: a6d3 1046 macw %d6u,%d1l,%a3@,%a3 + 2ba4: a493 1046 macw %d6u,%d1l,%a3@,%d2 + 2ba8: aed3 1046 macw %d6u,%d1l,%a3@,%sp + 2bac: a293 1066 macw %d6u,%d1l,<<,%a3@&,%d1 + 2bb0: a6d3 1066 macw %d6u,%d1l,>>,%a3@&,%a3 + 2bb4: a493 1066 macw %d6u,%d1l,,%a3@&,%d2 + 2bb8: aed3 1066 macw %d6u,%d1l,>>,%a3@&,%sp + 2bbc: a29a 1046 macw %d6u,%d1l,%a2@\+,%d1 + 2bc0: a6da 1046 macw %d6u,%d1l,%a2@\+,%a3 + 2bc4: a49a 1046 macw %d6u,%d1l,%a2@\+,%d2 + 2bc8: aeda 1046 macw %d6u,%d1l,%a2@\+,%sp + 2bcc: a29a 1066 macw %d6u,%d1l,<<,%a2@\+&,%d1 + 2bd0: a6da 1066 macw %d6u,%d1l,>>,%a2@\+&,%a3 + 2bd4: a49a 1066 macw %d6u,%d1l,,%a2@\+&,%d2 + 2bd8: aeda 1066 macw %d6u,%d1l,>>,%a2@\+&,%sp + 2bdc: a2ae 1046 000a macw %d6u,%d1l,%fp@\(10\),%d1 + 2be2: a6ee 1046 000a macw %d6u,%d1l,%fp@\(10\),%a3 + 2be8: a4ae 1046 000a macw %d6u,%d1l,%fp@\(10\),%d2 + 2bee: aeee 1046 000a macw %d6u,%d1l,%fp@\(10\),%sp + 2bf4: a2ae 1066 000a macw %d6u,%d1l,<<,%fp@\(10\)&,%d1 + 2bfa: a6ee 1066 000a macw %d6u,%d1l,>>,%fp@\(10\)&,%a3 + 2c00: a4ae 1066 000a macw %d6u,%d1l,,%fp@\(10\)&,%d2 + 2c06: aeee 1066 000a macw %d6u,%d1l,>>,%fp@\(10\)&,%sp + 2c0c: a2a1 1046 macw %d6u,%d1l,%a1@-,%d1 + 2c10: a6e1 1046 macw %d6u,%d1l,%a1@-,%a3 + 2c14: a4a1 1046 macw %d6u,%d1l,%a1@-,%d2 + 2c18: aee1 1046 macw %d6u,%d1l,%a1@-,%sp + 2c1c: a2a1 1066 macw %d6u,%d1l,<<,%a1@-&,%d1 + 2c20: a6e1 1066 macw %d6u,%d1l,>>,%a1@-&,%a3 + 2c24: a4a1 1066 macw %d6u,%d1l,,%a1@-&,%d2 + 2c28: aee1 1066 macw %d6u,%d1l,>>,%a1@-&,%sp + 2c2c: a293 1246 macw %d6u,%d1l,<<,%a3@,%d1 + 2c30: a6d3 1246 macw %d6u,%d1l,>>,%a3@,%a3 + 2c34: a493 1246 macw %d6u,%d1l,,%a3@,%d2 + 2c38: aed3 1246 macw %d6u,%d1l,>>,%a3@,%sp + 2c3c: a293 1266 macw %d6u,%d1l,<<,%a3@&,%d1 + 2c40: a6d3 1266 macw %d6u,%d1l,>>,%a3@&,%a3 + 2c44: a493 1266 macw %d6u,%d1l,,%a3@&,%d2 + 2c48: aed3 1266 macw %d6u,%d1l,>>,%a3@&,%sp + 2c4c: a29a 1246 macw %d6u,%d1l,<<,%a2@\+,%d1 + 2c50: a6da 1246 macw %d6u,%d1l,>>,%a2@\+,%a3 + 2c54: a49a 1246 macw %d6u,%d1l,,%a2@\+,%d2 + 2c58: aeda 1246 macw %d6u,%d1l,>>,%a2@\+,%sp + 2c5c: a29a 1266 macw %d6u,%d1l,<<,%a2@\+&,%d1 + 2c60: a6da 1266 macw %d6u,%d1l,>>,%a2@\+&,%a3 + 2c64: a49a 1266 macw %d6u,%d1l,,%a2@\+&,%d2 + 2c68: aeda 1266 macw %d6u,%d1l,>>,%a2@\+&,%sp + 2c6c: a2ae 1246 000a macw %d6u,%d1l,<<,%fp@\(10\),%d1 + 2c72: a6ee 1246 000a macw %d6u,%d1l,>>,%fp@\(10\),%a3 + 2c78: a4ae 1246 000a macw %d6u,%d1l,,%fp@\(10\),%d2 + 2c7e: aeee 1246 000a macw %d6u,%d1l,>>,%fp@\(10\),%sp + 2c84: a2ae 1266 000a macw %d6u,%d1l,<<,%fp@\(10\)&,%d1 + 2c8a: a6ee 1266 000a macw %d6u,%d1l,>>,%fp@\(10\)&,%a3 + 2c90: a4ae 1266 000a macw %d6u,%d1l,,%fp@\(10\)&,%d2 + 2c96: aeee 1266 000a macw %d6u,%d1l,>>,%fp@\(10\)&,%sp + 2c9c: a2a1 1246 macw %d6u,%d1l,<<,%a1@-,%d1 + 2ca0: a6e1 1246 macw %d6u,%d1l,>>,%a1@-,%a3 + 2ca4: a4a1 1246 macw %d6u,%d1l,,%a1@-,%d2 + 2ca8: aee1 1246 macw %d6u,%d1l,>>,%a1@-,%sp + 2cac: a2a1 1266 macw %d6u,%d1l,<<,%a1@-&,%d1 + 2cb0: a6e1 1266 macw %d6u,%d1l,>>,%a1@-&,%a3 + 2cb4: a4a1 1266 macw %d6u,%d1l,,%a1@-&,%d2 + 2cb8: aee1 1266 macw %d6u,%d1l,>>,%a1@-&,%sp + 2cbc: a293 1646 macw %d6u,%d1l,<<,%a3@,%d1 + 2cc0: a6d3 1646 macw %d6u,%d1l,>>,%a3@,%a3 + 2cc4: a493 1646 macw %d6u,%d1l,,%a3@,%d2 + 2cc8: aed3 1646 macw %d6u,%d1l,>>,%a3@,%sp + 2ccc: a293 1666 macw %d6u,%d1l,<<,%a3@&,%d1 + 2cd0: a6d3 1666 macw %d6u,%d1l,>>,%a3@&,%a3 + 2cd4: a493 1666 macw %d6u,%d1l,,%a3@&,%d2 + 2cd8: aed3 1666 macw %d6u,%d1l,>>,%a3@&,%sp + 2cdc: a29a 1646 macw %d6u,%d1l,<<,%a2@\+,%d1 + 2ce0: a6da 1646 macw %d6u,%d1l,>>,%a2@\+,%a3 + 2ce4: a49a 1646 macw %d6u,%d1l,,%a2@\+,%d2 + 2ce8: aeda 1646 macw %d6u,%d1l,>>,%a2@\+,%sp + 2cec: a29a 1666 macw %d6u,%d1l,<<,%a2@\+&,%d1 + 2cf0: a6da 1666 macw %d6u,%d1l,>>,%a2@\+&,%a3 + 2cf4: a49a 1666 macw %d6u,%d1l,,%a2@\+&,%d2 + 2cf8: aeda 1666 macw %d6u,%d1l,>>,%a2@\+&,%sp + 2cfc: a2ae 1646 000a macw %d6u,%d1l,<<,%fp@\(10\),%d1 + 2d02: a6ee 1646 000a macw %d6u,%d1l,>>,%fp@\(10\),%a3 + 2d08: a4ae 1646 000a macw %d6u,%d1l,,%fp@\(10\),%d2 + 2d0e: aeee 1646 000a macw %d6u,%d1l,>>,%fp@\(10\),%sp + 2d14: a2ae 1666 000a macw %d6u,%d1l,<<,%fp@\(10\)&,%d1 + 2d1a: a6ee 1666 000a macw %d6u,%d1l,>>,%fp@\(10\)&,%a3 + 2d20: a4ae 1666 000a macw %d6u,%d1l,,%fp@\(10\)&,%d2 + 2d26: aeee 1666 000a macw %d6u,%d1l,>>,%fp@\(10\)&,%sp + 2d2c: a2a1 1646 macw %d6u,%d1l,<<,%a1@-,%d1 + 2d30: a6e1 1646 macw %d6u,%d1l,>>,%a1@-,%a3 + 2d34: a4a1 1646 macw %d6u,%d1l,,%a1@-,%d2 + 2d38: aee1 1646 macw %d6u,%d1l,>>,%a1@-,%sp + 2d3c: a2a1 1666 macw %d6u,%d1l,<<,%a1@-&,%d1 + 2d40: a6e1 1666 macw %d6u,%d1l,>>,%a1@-&,%a3 + 2d44: a4a1 1666 macw %d6u,%d1l,,%a1@-&,%d2 + 2d48: aee1 1666 macw %d6u,%d1l,>>,%a1@-&,%sp + 2d4c: a293 1246 macw %d6u,%d1l,<<,%a3@,%d1 + 2d50: a6d3 1246 macw %d6u,%d1l,>>,%a3@,%a3 + 2d54: a493 1246 macw %d6u,%d1l,,%a3@,%d2 + 2d58: aed3 1246 macw %d6u,%d1l,>>,%a3@,%sp + 2d5c: a293 1266 macw %d6u,%d1l,<<,%a3@&,%d1 + 2d60: a6d3 1266 macw %d6u,%d1l,>>,%a3@&,%a3 + 2d64: a493 1266 macw %d6u,%d1l,,%a3@&,%d2 + 2d68: aed3 1266 macw %d6u,%d1l,>>,%a3@&,%sp + 2d6c: a29a 1246 macw %d6u,%d1l,<<,%a2@\+,%d1 + 2d70: a6da 1246 macw %d6u,%d1l,>>,%a2@\+,%a3 + 2d74: a49a 1246 macw %d6u,%d1l,,%a2@\+,%d2 + 2d78: aeda 1246 macw %d6u,%d1l,>>,%a2@\+,%sp + 2d7c: a29a 1266 macw %d6u,%d1l,<<,%a2@\+&,%d1 + 2d80: a6da 1266 macw %d6u,%d1l,>>,%a2@\+&,%a3 + 2d84: a49a 1266 macw %d6u,%d1l,,%a2@\+&,%d2 + 2d88: aeda 1266 macw %d6u,%d1l,>>,%a2@\+&,%sp + 2d8c: a2ae 1246 000a macw %d6u,%d1l,<<,%fp@\(10\),%d1 + 2d92: a6ee 1246 000a macw %d6u,%d1l,>>,%fp@\(10\),%a3 + 2d98: a4ae 1246 000a macw %d6u,%d1l,,%fp@\(10\),%d2 + 2d9e: aeee 1246 000a macw %d6u,%d1l,>>,%fp@\(10\),%sp + 2da4: a2ae 1266 000a macw %d6u,%d1l,<<,%fp@\(10\)&,%d1 + 2daa: a6ee 1266 000a macw %d6u,%d1l,>>,%fp@\(10\)&,%a3 + 2db0: a4ae 1266 000a macw %d6u,%d1l,,%fp@\(10\)&,%d2 + 2db6: aeee 1266 000a macw %d6u,%d1l,>>,%fp@\(10\)&,%sp + 2dbc: a2a1 1246 macw %d6u,%d1l,<<,%a1@-,%d1 + 2dc0: a6e1 1246 macw %d6u,%d1l,>>,%a1@-,%a3 + 2dc4: a4a1 1246 macw %d6u,%d1l,,%a1@-,%d2 + 2dc8: aee1 1246 macw %d6u,%d1l,>>,%a1@-,%sp + 2dcc: a2a1 1266 macw %d6u,%d1l,<<,%a1@-&,%d1 + 2dd0: a6e1 1266 macw %d6u,%d1l,>>,%a1@-&,%a3 + 2dd4: a4a1 1266 macw %d6u,%d1l,,%a1@-&,%d2 + 2dd8: aee1 1266 macw %d6u,%d1l,>>,%a1@-&,%sp + 2ddc: a293 1646 macw %d6u,%d1l,<<,%a3@,%d1 + 2de0: a6d3 1646 macw %d6u,%d1l,>>,%a3@,%a3 + 2de4: a493 1646 macw %d6u,%d1l,,%a3@,%d2 + 2de8: aed3 1646 macw %d6u,%d1l,>>,%a3@,%sp + 2dec: a293 1666 macw %d6u,%d1l,<<,%a3@&,%d1 + 2df0: a6d3 1666 macw %d6u,%d1l,>>,%a3@&,%a3 + 2df4: a493 1666 macw %d6u,%d1l,,%a3@&,%d2 + 2df8: aed3 1666 macw %d6u,%d1l,>>,%a3@&,%sp + 2dfc: a29a 1646 macw %d6u,%d1l,<<,%a2@\+,%d1 + 2e00: a6da 1646 macw %d6u,%d1l,>>,%a2@\+,%a3 + 2e04: a49a 1646 macw %d6u,%d1l,,%a2@\+,%d2 + 2e08: aeda 1646 macw %d6u,%d1l,>>,%a2@\+,%sp + 2e0c: a29a 1666 macw %d6u,%d1l,<<,%a2@\+&,%d1 + 2e10: a6da 1666 macw %d6u,%d1l,>>,%a2@\+&,%a3 + 2e14: a49a 1666 macw %d6u,%d1l,,%a2@\+&,%d2 + 2e18: aeda 1666 macw %d6u,%d1l,>>,%a2@\+&,%sp + 2e1c: a2ae 1646 000a macw %d6u,%d1l,<<,%fp@\(10\),%d1 + 2e22: a6ee 1646 000a macw %d6u,%d1l,>>,%fp@\(10\),%a3 + 2e28: a4ae 1646 000a macw %d6u,%d1l,,%fp@\(10\),%d2 + 2e2e: aeee 1646 000a macw %d6u,%d1l,>>,%fp@\(10\),%sp + 2e34: a2ae 1666 000a macw %d6u,%d1l,<<,%fp@\(10\)&,%d1 + 2e3a: a6ee 1666 000a macw %d6u,%d1l,>>,%fp@\(10\)&,%a3 + 2e40: a4ae 1666 000a macw %d6u,%d1l,,%fp@\(10\)&,%d2 + 2e46: aeee 1666 000a macw %d6u,%d1l,>>,%fp@\(10\)&,%sp + 2e4c: a2a1 1646 macw %d6u,%d1l,<<,%a1@-,%d1 + 2e50: a6e1 1646 macw %d6u,%d1l,>>,%a1@-,%a3 + 2e54: a4a1 1646 macw %d6u,%d1l,,%a1@-,%d2 + 2e58: aee1 1646 macw %d6u,%d1l,>>,%a1@-,%sp + 2e5c: a2a1 1666 macw %d6u,%d1l,<<,%a1@-&,%d1 + 2e60: a6e1 1666 macw %d6u,%d1l,>>,%a1@-&,%a3 + 2e64: a4a1 1666 macw %d6u,%d1l,,%a1@-&,%d2 + 2e68: aee1 1666 macw %d6u,%d1l,>>,%a1@-&,%sp + 2e6c: a649 0800 macl %a1,%a3,>> + 2e70: a649 0a00 macl %a1,%a3,<< + 2e74: a649 0e00 macl %a1,%a3,>> + 2e78: a649 0a00 macl %a1,%a3,<< + 2e7c: a649 0e00 macl %a1,%a3,>> + 2e80: a809 0800 macl %a1,%d4, + 2e84: a809 0a00 macl %a1,%d4,<< + 2e88: a809 0e00 macl %a1,%d4,>> + 2e8c: a809 0a00 macl %a1,%d4,<< + 2e90: a809 0e00 macl %a1,%d4,>> + 2e94: a646 0800 macl %d6,%a3,>> + 2e98: a646 0a00 macl %d6,%a3,<< + 2e9c: a646 0e00 macl %d6,%a3,>> + 2ea0: a646 0a00 macl %d6,%a3,<< + 2ea4: a646 0e00 macl %d6,%a3,>> + 2ea8: a806 0800 macl %d6,%d4, + 2eac: a806 0a00 macl %d6,%d4,<< + 2eb0: a806 0e00 macl %d6,%d4,>> + 2eb4: a806 0a00 macl %d6,%d4,<< + 2eb8: a806 0e00 macl %d6,%d4,>> + 2ebc: a293 b809 macl %a1,%a3,%a3@,%d1 + 2ec0: a6d3 b809 macl %a1,%a3,%a3@,%a3 + 2ec4: a493 b809 macl %a1,%a3,%a3@,%d2 + 2ec8: aed3 b809 macl %a1,%a3,%a3@,%sp + 2ecc: a293 b829 macl %a1,%a3,<<,%a3@&,%d1 + 2ed0: a6d3 b829 macl %a1,%a3,>>,%a3@&,%a3 + 2ed4: a493 b829 macl %a1,%a3,,%a3@&,%d2 + 2ed8: aed3 b829 macl %a1,%a3,>>,%a3@&,%sp + 2edc: a29a b809 macl %a1,%a3,%a2@\+,%d1 + 2ee0: a6da b809 macl %a1,%a3,%a2@\+,%a3 + 2ee4: a49a b809 macl %a1,%a3,%a2@\+,%d2 + 2ee8: aeda b809 macl %a1,%a3,%a2@\+,%sp + 2eec: a29a b829 macl %a1,%a3,<<,%a2@\+&,%d1 + 2ef0: a6da b829 macl %a1,%a3,>>,%a2@\+&,%a3 + 2ef4: a49a b829 macl %a1,%a3,,%a2@\+&,%d2 + 2ef8: aeda b829 macl %a1,%a3,>>,%a2@\+&,%sp + 2efc: a2ae b809 000a macl %a1,%a3,%fp@\(10\),%d1 + 2f02: a6ee b809 000a macl %a1,%a3,%fp@\(10\),%a3 + 2f08: a4ae b809 000a macl %a1,%a3,%fp@\(10\),%d2 + 2f0e: aeee b809 000a macl %a1,%a3,%fp@\(10\),%sp + 2f14: a2ae b829 000a macl %a1,%a3,<<,%fp@\(10\)&,%d1 + 2f1a: a6ee b829 000a macl %a1,%a3,>>,%fp@\(10\)&,%a3 + 2f20: a4ae b829 000a macl %a1,%a3,,%fp@\(10\)&,%d2 + 2f26: aeee b829 000a macl %a1,%a3,>>,%fp@\(10\)&,%sp + 2f2c: a2a1 b809 macl %a1,%a3,%a1@-,%d1 + 2f30: a6e1 b809 macl %a1,%a3,%a1@-,%a3 + 2f34: a4a1 b809 macl %a1,%a3,%a1@-,%d2 + 2f38: aee1 b809 macl %a1,%a3,%a1@-,%sp + 2f3c: a2a1 b829 macl %a1,%a3,<<,%a1@-&,%d1 + 2f40: a6e1 b829 macl %a1,%a3,>>,%a1@-&,%a3 + 2f44: a4a1 b829 macl %a1,%a3,,%a1@-&,%d2 + 2f48: aee1 b829 macl %a1,%a3,>>,%a1@-&,%sp + 2f4c: a293 ba09 macl %a1,%a3,<<,%a3@,%d1 + 2f50: a6d3 ba09 macl %a1,%a3,>>,%a3@,%a3 + 2f54: a493 ba09 macl %a1,%a3,,%a3@,%d2 + 2f58: aed3 ba09 macl %a1,%a3,>>,%a3@,%sp + 2f5c: a293 ba29 macl %a1,%a3,<<,%a3@&,%d1 + 2f60: a6d3 ba29 macl %a1,%a3,>>,%a3@&,%a3 + 2f64: a493 ba29 macl %a1,%a3,,%a3@&,%d2 + 2f68: aed3 ba29 macl %a1,%a3,>>,%a3@&,%sp + 2f6c: a29a ba09 macl %a1,%a3,<<,%a2@\+,%d1 + 2f70: a6da ba09 macl %a1,%a3,>>,%a2@\+,%a3 + 2f74: a49a ba09 macl %a1,%a3,,%a2@\+,%d2 + 2f78: aeda ba09 macl %a1,%a3,>>,%a2@\+,%sp + 2f7c: a29a ba29 macl %a1,%a3,<<,%a2@\+&,%d1 + 2f80: a6da ba29 macl %a1,%a3,>>,%a2@\+&,%a3 + 2f84: a49a ba29 macl %a1,%a3,,%a2@\+&,%d2 + 2f88: aeda ba29 macl %a1,%a3,>>,%a2@\+&,%sp + 2f8c: a2ae ba09 000a macl %a1,%a3,<<,%fp@\(10\),%d1 + 2f92: a6ee ba09 000a macl %a1,%a3,>>,%fp@\(10\),%a3 + 2f98: a4ae ba09 000a macl %a1,%a3,,%fp@\(10\),%d2 + 2f9e: aeee ba09 000a macl %a1,%a3,>>,%fp@\(10\),%sp + 2fa4: a2ae ba29 000a macl %a1,%a3,<<,%fp@\(10\)&,%d1 + 2faa: a6ee ba29 000a macl %a1,%a3,>>,%fp@\(10\)&,%a3 + 2fb0: a4ae ba29 000a macl %a1,%a3,,%fp@\(10\)&,%d2 + 2fb6: aeee ba29 000a macl %a1,%a3,>>,%fp@\(10\)&,%sp + 2fbc: a2a1 ba09 macl %a1,%a3,<<,%a1@-,%d1 + 2fc0: a6e1 ba09 macl %a1,%a3,>>,%a1@-,%a3 + 2fc4: a4a1 ba09 macl %a1,%a3,,%a1@-,%d2 + 2fc8: aee1 ba09 macl %a1,%a3,>>,%a1@-,%sp + 2fcc: a2a1 ba29 macl %a1,%a3,<<,%a1@-&,%d1 + 2fd0: a6e1 ba29 macl %a1,%a3,>>,%a1@-&,%a3 + 2fd4: a4a1 ba29 macl %a1,%a3,,%a1@-&,%d2 + 2fd8: aee1 ba29 macl %a1,%a3,>>,%a1@-&,%sp + 2fdc: a293 be09 macl %a1,%a3,<<,%a3@,%d1 + 2fe0: a6d3 be09 macl %a1,%a3,>>,%a3@,%a3 + 2fe4: a493 be09 macl %a1,%a3,,%a3@,%d2 + 2fe8: aed3 be09 macl %a1,%a3,>>,%a3@,%sp + 2fec: a293 be29 macl %a1,%a3,<<,%a3@&,%d1 + 2ff0: a6d3 be29 macl %a1,%a3,>>,%a3@&,%a3 + 2ff4: a493 be29 macl %a1,%a3,,%a3@&,%d2 + 2ff8: aed3 be29 macl %a1,%a3,>>,%a3@&,%sp + 2ffc: a29a be09 macl %a1,%a3,<<,%a2@\+,%d1 + 3000: a6da be09 macl %a1,%a3,>>,%a2@\+,%a3 + 3004: a49a be09 macl %a1,%a3,,%a2@\+,%d2 + 3008: aeda be09 macl %a1,%a3,>>,%a2@\+,%sp + 300c: a29a be29 macl %a1,%a3,<<,%a2@\+&,%d1 + 3010: a6da be29 macl %a1,%a3,>>,%a2@\+&,%a3 + 3014: a49a be29 macl %a1,%a3,,%a2@\+&,%d2 + 3018: aeda be29 macl %a1,%a3,>>,%a2@\+&,%sp + 301c: a2ae be09 000a macl %a1,%a3,<<,%fp@\(10\),%d1 + 3022: a6ee be09 000a macl %a1,%a3,>>,%fp@\(10\),%a3 + 3028: a4ae be09 000a macl %a1,%a3,,%fp@\(10\),%d2 + 302e: aeee be09 000a macl %a1,%a3,>>,%fp@\(10\),%sp + 3034: a2ae be29 000a macl %a1,%a3,<<,%fp@\(10\)&,%d1 + 303a: a6ee be29 000a macl %a1,%a3,>>,%fp@\(10\)&,%a3 + 3040: a4ae be29 000a macl %a1,%a3,,%fp@\(10\)&,%d2 + 3046: aeee be29 000a macl %a1,%a3,>>,%fp@\(10\)&,%sp + 304c: a2a1 be09 macl %a1,%a3,<<,%a1@-,%d1 + 3050: a6e1 be09 macl %a1,%a3,>>,%a1@-,%a3 + 3054: a4a1 be09 macl %a1,%a3,,%a1@-,%d2 + 3058: aee1 be09 macl %a1,%a3,>>,%a1@-,%sp + 305c: a2a1 be29 macl %a1,%a3,<<,%a1@-&,%d1 + 3060: a6e1 be29 macl %a1,%a3,>>,%a1@-&,%a3 + 3064: a4a1 be29 macl %a1,%a3,,%a1@-&,%d2 + 3068: aee1 be29 macl %a1,%a3,>>,%a1@-&,%sp + 306c: a293 ba09 macl %a1,%a3,<<,%a3@,%d1 + 3070: a6d3 ba09 macl %a1,%a3,>>,%a3@,%a3 + 3074: a493 ba09 macl %a1,%a3,,%a3@,%d2 + 3078: aed3 ba09 macl %a1,%a3,>>,%a3@,%sp + 307c: a293 ba29 macl %a1,%a3,<<,%a3@&,%d1 + 3080: a6d3 ba29 macl %a1,%a3,>>,%a3@&,%a3 + 3084: a493 ba29 macl %a1,%a3,,%a3@&,%d2 + 3088: aed3 ba29 macl %a1,%a3,>>,%a3@&,%sp + 308c: a29a ba09 macl %a1,%a3,<<,%a2@\+,%d1 + 3090: a6da ba09 macl %a1,%a3,>>,%a2@\+,%a3 + 3094: a49a ba09 macl %a1,%a3,,%a2@\+,%d2 + 3098: aeda ba09 macl %a1,%a3,>>,%a2@\+,%sp + 309c: a29a ba29 macl %a1,%a3,<<,%a2@\+&,%d1 + 30a0: a6da ba29 macl %a1,%a3,>>,%a2@\+&,%a3 + 30a4: a49a ba29 macl %a1,%a3,,%a2@\+&,%d2 + 30a8: aeda ba29 macl %a1,%a3,>>,%a2@\+&,%sp + 30ac: a2ae ba09 000a macl %a1,%a3,<<,%fp@\(10\),%d1 + 30b2: a6ee ba09 000a macl %a1,%a3,>>,%fp@\(10\),%a3 + 30b8: a4ae ba09 000a macl %a1,%a3,,%fp@\(10\),%d2 + 30be: aeee ba09 000a macl %a1,%a3,>>,%fp@\(10\),%sp + 30c4: a2ae ba29 000a macl %a1,%a3,<<,%fp@\(10\)&,%d1 + 30ca: a6ee ba29 000a macl %a1,%a3,>>,%fp@\(10\)&,%a3 + 30d0: a4ae ba29 000a macl %a1,%a3,,%fp@\(10\)&,%d2 + 30d6: aeee ba29 000a macl %a1,%a3,>>,%fp@\(10\)&,%sp + 30dc: a2a1 ba09 macl %a1,%a3,<<,%a1@-,%d1 + 30e0: a6e1 ba09 macl %a1,%a3,>>,%a1@-,%a3 + 30e4: a4a1 ba09 macl %a1,%a3,,%a1@-,%d2 + 30e8: aee1 ba09 macl %a1,%a3,>>,%a1@-,%sp + 30ec: a2a1 ba29 macl %a1,%a3,<<,%a1@-&,%d1 + 30f0: a6e1 ba29 macl %a1,%a3,>>,%a1@-&,%a3 + 30f4: a4a1 ba29 macl %a1,%a3,,%a1@-&,%d2 + 30f8: aee1 ba29 macl %a1,%a3,>>,%a1@-&,%sp + 30fc: a293 be09 macl %a1,%a3,<<,%a3@,%d1 + 3100: a6d3 be09 macl %a1,%a3,>>,%a3@,%a3 + 3104: a493 be09 macl %a1,%a3,,%a3@,%d2 + 3108: aed3 be09 macl %a1,%a3,>>,%a3@,%sp + 310c: a293 be29 macl %a1,%a3,<<,%a3@&,%d1 + 3110: a6d3 be29 macl %a1,%a3,>>,%a3@&,%a3 + 3114: a493 be29 macl %a1,%a3,,%a3@&,%d2 + 3118: aed3 be29 macl %a1,%a3,>>,%a3@&,%sp + 311c: a29a be09 macl %a1,%a3,<<,%a2@\+,%d1 + 3120: a6da be09 macl %a1,%a3,>>,%a2@\+,%a3 + 3124: a49a be09 macl %a1,%a3,,%a2@\+,%d2 + 3128: aeda be09 macl %a1,%a3,>>,%a2@\+,%sp + 312c: a29a be29 macl %a1,%a3,<<,%a2@\+&,%d1 + 3130: a6da be29 macl %a1,%a3,>>,%a2@\+&,%a3 + 3134: a49a be29 macl %a1,%a3,,%a2@\+&,%d2 + 3138: aeda be29 macl %a1,%a3,>>,%a2@\+&,%sp + 313c: a2ae be09 000a macl %a1,%a3,<<,%fp@\(10\),%d1 + 3142: a6ee be09 000a macl %a1,%a3,>>,%fp@\(10\),%a3 + 3148: a4ae be09 000a macl %a1,%a3,,%fp@\(10\),%d2 + 314e: aeee be09 000a macl %a1,%a3,>>,%fp@\(10\),%sp + 3154: a2ae be29 000a macl %a1,%a3,<<,%fp@\(10\)&,%d1 + 315a: a6ee be29 000a macl %a1,%a3,>>,%fp@\(10\)&,%a3 + 3160: a4ae be29 000a macl %a1,%a3,,%fp@\(10\)&,%d2 + 3166: aeee be29 000a macl %a1,%a3,>>,%fp@\(10\)&,%sp + 316c: a2a1 be09 macl %a1,%a3,<<,%a1@-,%d1 + 3170: a6e1 be09 macl %a1,%a3,>>,%a1@-,%a3 + 3174: a4a1 be09 macl %a1,%a3,,%a1@-,%d2 + 3178: aee1 be09 macl %a1,%a3,>>,%a1@-,%sp + 317c: a2a1 be29 macl %a1,%a3,<<,%a1@-&,%d1 + 3180: a6e1 be29 macl %a1,%a3,>>,%a1@-&,%a3 + 3184: a4a1 be29 macl %a1,%a3,,%a1@-&,%d2 + 3188: aee1 be29 macl %a1,%a3,>>,%a1@-&,%sp + 318c: a293 4809 macl %a1,%d4,%a3@,%d1 + 3190: a6d3 4809 macl %a1,%d4,%a3@,%a3 + 3194: a493 4809 macl %a1,%d4,%a3@,%d2 + 3198: aed3 4809 macl %a1,%d4,%a3@,%sp + 319c: a293 4829 macl %a1,%d4,<<,%a3@&,%d1 + 31a0: a6d3 4829 macl %a1,%d4,>>,%a3@&,%a3 + 31a4: a493 4829 macl %a1,%d4,,%a3@&,%d2 + 31a8: aed3 4829 macl %a1,%d4,>>,%a3@&,%sp + 31ac: a29a 4809 macl %a1,%d4,%a2@\+,%d1 + 31b0: a6da 4809 macl %a1,%d4,%a2@\+,%a3 + 31b4: a49a 4809 macl %a1,%d4,%a2@\+,%d2 + 31b8: aeda 4809 macl %a1,%d4,%a2@\+,%sp + 31bc: a29a 4829 macl %a1,%d4,<<,%a2@\+&,%d1 + 31c0: a6da 4829 macl %a1,%d4,>>,%a2@\+&,%a3 + 31c4: a49a 4829 macl %a1,%d4,,%a2@\+&,%d2 + 31c8: aeda 4829 macl %a1,%d4,>>,%a2@\+&,%sp + 31cc: a2ae 4809 000a macl %a1,%d4,%fp@\(10\),%d1 + 31d2: a6ee 4809 000a macl %a1,%d4,%fp@\(10\),%a3 + 31d8: a4ae 4809 000a macl %a1,%d4,%fp@\(10\),%d2 + 31de: aeee 4809 000a macl %a1,%d4,%fp@\(10\),%sp + 31e4: a2ae 4829 000a macl %a1,%d4,<<,%fp@\(10\)&,%d1 + 31ea: a6ee 4829 000a macl %a1,%d4,>>,%fp@\(10\)&,%a3 + 31f0: a4ae 4829 000a macl %a1,%d4,,%fp@\(10\)&,%d2 + 31f6: aeee 4829 000a macl %a1,%d4,>>,%fp@\(10\)&,%sp + 31fc: a2a1 4809 macl %a1,%d4,%a1@-,%d1 + 3200: a6e1 4809 macl %a1,%d4,%a1@-,%a3 + 3204: a4a1 4809 macl %a1,%d4,%a1@-,%d2 + 3208: aee1 4809 macl %a1,%d4,%a1@-,%sp + 320c: a2a1 4829 macl %a1,%d4,<<,%a1@-&,%d1 + 3210: a6e1 4829 macl %a1,%d4,>>,%a1@-&,%a3 + 3214: a4a1 4829 macl %a1,%d4,,%a1@-&,%d2 + 3218: aee1 4829 macl %a1,%d4,>>,%a1@-&,%sp + 321c: a293 4a09 macl %a1,%d4,<<,%a3@,%d1 + 3220: a6d3 4a09 macl %a1,%d4,>>,%a3@,%a3 + 3224: a493 4a09 macl %a1,%d4,,%a3@,%d2 + 3228: aed3 4a09 macl %a1,%d4,>>,%a3@,%sp + 322c: a293 4a29 macl %a1,%d4,<<,%a3@&,%d1 + 3230: a6d3 4a29 macl %a1,%d4,>>,%a3@&,%a3 + 3234: a493 4a29 macl %a1,%d4,,%a3@&,%d2 + 3238: aed3 4a29 macl %a1,%d4,>>,%a3@&,%sp + 323c: a29a 4a09 macl %a1,%d4,<<,%a2@\+,%d1 + 3240: a6da 4a09 macl %a1,%d4,>>,%a2@\+,%a3 + 3244: a49a 4a09 macl %a1,%d4,,%a2@\+,%d2 + 3248: aeda 4a09 macl %a1,%d4,>>,%a2@\+,%sp + 324c: a29a 4a29 macl %a1,%d4,<<,%a2@\+&,%d1 + 3250: a6da 4a29 macl %a1,%d4,>>,%a2@\+&,%a3 + 3254: a49a 4a29 macl %a1,%d4,,%a2@\+&,%d2 + 3258: aeda 4a29 macl %a1,%d4,>>,%a2@\+&,%sp + 325c: a2ae 4a09 000a macl %a1,%d4,<<,%fp@\(10\),%d1 + 3262: a6ee 4a09 000a macl %a1,%d4,>>,%fp@\(10\),%a3 + 3268: a4ae 4a09 000a macl %a1,%d4,,%fp@\(10\),%d2 + 326e: aeee 4a09 000a macl %a1,%d4,>>,%fp@\(10\),%sp + 3274: a2ae 4a29 000a macl %a1,%d4,<<,%fp@\(10\)&,%d1 + 327a: a6ee 4a29 000a macl %a1,%d4,>>,%fp@\(10\)&,%a3 + 3280: a4ae 4a29 000a macl %a1,%d4,,%fp@\(10\)&,%d2 + 3286: aeee 4a29 000a macl %a1,%d4,>>,%fp@\(10\)&,%sp + 328c: a2a1 4a09 macl %a1,%d4,<<,%a1@-,%d1 + 3290: a6e1 4a09 macl %a1,%d4,>>,%a1@-,%a3 + 3294: a4a1 4a09 macl %a1,%d4,,%a1@-,%d2 + 3298: aee1 4a09 macl %a1,%d4,>>,%a1@-,%sp + 329c: a2a1 4a29 macl %a1,%d4,<<,%a1@-&,%d1 + 32a0: a6e1 4a29 macl %a1,%d4,>>,%a1@-&,%a3 + 32a4: a4a1 4a29 macl %a1,%d4,,%a1@-&,%d2 + 32a8: aee1 4a29 macl %a1,%d4,>>,%a1@-&,%sp + 32ac: a293 4e09 macl %a1,%d4,<<,%a3@,%d1 + 32b0: a6d3 4e09 macl %a1,%d4,>>,%a3@,%a3 + 32b4: a493 4e09 macl %a1,%d4,,%a3@,%d2 + 32b8: aed3 4e09 macl %a1,%d4,>>,%a3@,%sp + 32bc: a293 4e29 macl %a1,%d4,<<,%a3@&,%d1 + 32c0: a6d3 4e29 macl %a1,%d4,>>,%a3@&,%a3 + 32c4: a493 4e29 macl %a1,%d4,,%a3@&,%d2 + 32c8: aed3 4e29 macl %a1,%d4,>>,%a3@&,%sp + 32cc: a29a 4e09 macl %a1,%d4,<<,%a2@\+,%d1 + 32d0: a6da 4e09 macl %a1,%d4,>>,%a2@\+,%a3 + 32d4: a49a 4e09 macl %a1,%d4,,%a2@\+,%d2 + 32d8: aeda 4e09 macl %a1,%d4,>>,%a2@\+,%sp + 32dc: a29a 4e29 macl %a1,%d4,<<,%a2@\+&,%d1 + 32e0: a6da 4e29 macl %a1,%d4,>>,%a2@\+&,%a3 + 32e4: a49a 4e29 macl %a1,%d4,,%a2@\+&,%d2 + 32e8: aeda 4e29 macl %a1,%d4,>>,%a2@\+&,%sp + 32ec: a2ae 4e09 000a macl %a1,%d4,<<,%fp@\(10\),%d1 + 32f2: a6ee 4e09 000a macl %a1,%d4,>>,%fp@\(10\),%a3 + 32f8: a4ae 4e09 000a macl %a1,%d4,,%fp@\(10\),%d2 + 32fe: aeee 4e09 000a macl %a1,%d4,>>,%fp@\(10\),%sp + 3304: a2ae 4e29 000a macl %a1,%d4,<<,%fp@\(10\)&,%d1 + 330a: a6ee 4e29 000a macl %a1,%d4,>>,%fp@\(10\)&,%a3 + 3310: a4ae 4e29 000a macl %a1,%d4,,%fp@\(10\)&,%d2 + 3316: aeee 4e29 000a macl %a1,%d4,>>,%fp@\(10\)&,%sp + 331c: a2a1 4e09 macl %a1,%d4,<<,%a1@-,%d1 + 3320: a6e1 4e09 macl %a1,%d4,>>,%a1@-,%a3 + 3324: a4a1 4e09 macl %a1,%d4,,%a1@-,%d2 + 3328: aee1 4e09 macl %a1,%d4,>>,%a1@-,%sp + 332c: a2a1 4e29 macl %a1,%d4,<<,%a1@-&,%d1 + 3330: a6e1 4e29 macl %a1,%d4,>>,%a1@-&,%a3 + 3334: a4a1 4e29 macl %a1,%d4,,%a1@-&,%d2 + 3338: aee1 4e29 macl %a1,%d4,>>,%a1@-&,%sp + 333c: a293 4a09 macl %a1,%d4,<<,%a3@,%d1 + 3340: a6d3 4a09 macl %a1,%d4,>>,%a3@,%a3 + 3344: a493 4a09 macl %a1,%d4,,%a3@,%d2 + 3348: aed3 4a09 macl %a1,%d4,>>,%a3@,%sp + 334c: a293 4a29 macl %a1,%d4,<<,%a3@&,%d1 + 3350: a6d3 4a29 macl %a1,%d4,>>,%a3@&,%a3 + 3354: a493 4a29 macl %a1,%d4,,%a3@&,%d2 + 3358: aed3 4a29 macl %a1,%d4,>>,%a3@&,%sp + 335c: a29a 4a09 macl %a1,%d4,<<,%a2@\+,%d1 + 3360: a6da 4a09 macl %a1,%d4,>>,%a2@\+,%a3 + 3364: a49a 4a09 macl %a1,%d4,,%a2@\+,%d2 + 3368: aeda 4a09 macl %a1,%d4,>>,%a2@\+,%sp + 336c: a29a 4a29 macl %a1,%d4,<<,%a2@\+&,%d1 + 3370: a6da 4a29 macl %a1,%d4,>>,%a2@\+&,%a3 + 3374: a49a 4a29 macl %a1,%d4,,%a2@\+&,%d2 + 3378: aeda 4a29 macl %a1,%d4,>>,%a2@\+&,%sp + 337c: a2ae 4a09 000a macl %a1,%d4,<<,%fp@\(10\),%d1 + 3382: a6ee 4a09 000a macl %a1,%d4,>>,%fp@\(10\),%a3 + 3388: a4ae 4a09 000a macl %a1,%d4,,%fp@\(10\),%d2 + 338e: aeee 4a09 000a macl %a1,%d4,>>,%fp@\(10\),%sp + 3394: a2ae 4a29 000a macl %a1,%d4,<<,%fp@\(10\)&,%d1 + 339a: a6ee 4a29 000a macl %a1,%d4,>>,%fp@\(10\)&,%a3 + 33a0: a4ae 4a29 000a macl %a1,%d4,,%fp@\(10\)&,%d2 + 33a6: aeee 4a29 000a macl %a1,%d4,>>,%fp@\(10\)&,%sp + 33ac: a2a1 4a09 macl %a1,%d4,<<,%a1@-,%d1 + 33b0: a6e1 4a09 macl %a1,%d4,>>,%a1@-,%a3 + 33b4: a4a1 4a09 macl %a1,%d4,,%a1@-,%d2 + 33b8: aee1 4a09 macl %a1,%d4,>>,%a1@-,%sp + 33bc: a2a1 4a29 macl %a1,%d4,<<,%a1@-&,%d1 + 33c0: a6e1 4a29 macl %a1,%d4,>>,%a1@-&,%a3 + 33c4: a4a1 4a29 macl %a1,%d4,,%a1@-&,%d2 + 33c8: aee1 4a29 macl %a1,%d4,>>,%a1@-&,%sp + 33cc: a293 4e09 macl %a1,%d4,<<,%a3@,%d1 + 33d0: a6d3 4e09 macl %a1,%d4,>>,%a3@,%a3 + 33d4: a493 4e09 macl %a1,%d4,,%a3@,%d2 + 33d8: aed3 4e09 macl %a1,%d4,>>,%a3@,%sp + 33dc: a293 4e29 macl %a1,%d4,<<,%a3@&,%d1 + 33e0: a6d3 4e29 macl %a1,%d4,>>,%a3@&,%a3 + 33e4: a493 4e29 macl %a1,%d4,,%a3@&,%d2 + 33e8: aed3 4e29 macl %a1,%d4,>>,%a3@&,%sp + 33ec: a29a 4e09 macl %a1,%d4,<<,%a2@\+,%d1 + 33f0: a6da 4e09 macl %a1,%d4,>>,%a2@\+,%a3 + 33f4: a49a 4e09 macl %a1,%d4,,%a2@\+,%d2 + 33f8: aeda 4e09 macl %a1,%d4,>>,%a2@\+,%sp + 33fc: a29a 4e29 macl %a1,%d4,<<,%a2@\+&,%d1 + 3400: a6da 4e29 macl %a1,%d4,>>,%a2@\+&,%a3 + 3404: a49a 4e29 macl %a1,%d4,,%a2@\+&,%d2 + 3408: aeda 4e29 macl %a1,%d4,>>,%a2@\+&,%sp + 340c: a2ae 4e09 000a macl %a1,%d4,<<,%fp@\(10\),%d1 + 3412: a6ee 4e09 000a macl %a1,%d4,>>,%fp@\(10\),%a3 + 3418: a4ae 4e09 000a macl %a1,%d4,,%fp@\(10\),%d2 + 341e: aeee 4e09 000a macl %a1,%d4,>>,%fp@\(10\),%sp + 3424: a2ae 4e29 000a macl %a1,%d4,<<,%fp@\(10\)&,%d1 + 342a: a6ee 4e29 000a macl %a1,%d4,>>,%fp@\(10\)&,%a3 + 3430: a4ae 4e29 000a macl %a1,%d4,,%fp@\(10\)&,%d2 + 3436: aeee 4e29 000a macl %a1,%d4,>>,%fp@\(10\)&,%sp + 343c: a2a1 4e09 macl %a1,%d4,<<,%a1@-,%d1 + 3440: a6e1 4e09 macl %a1,%d4,>>,%a1@-,%a3 + 3444: a4a1 4e09 macl %a1,%d4,,%a1@-,%d2 + 3448: aee1 4e09 macl %a1,%d4,>>,%a1@-,%sp + 344c: a2a1 4e29 macl %a1,%d4,<<,%a1@-&,%d1 + 3450: a6e1 4e29 macl %a1,%d4,>>,%a1@-&,%a3 + 3454: a4a1 4e29 macl %a1,%d4,,%a1@-&,%d2 + 3458: aee1 4e29 macl %a1,%d4,>>,%a1@-&,%sp + 345c: a293 b806 macl %d6,%a3,%a3@,%d1 + 3460: a6d3 b806 macl %d6,%a3,%a3@,%a3 + 3464: a493 b806 macl %d6,%a3,%a3@,%d2 + 3468: aed3 b806 macl %d6,%a3,%a3@,%sp + 346c: a293 b826 macl %d6,%a3,<<,%a3@&,%d1 + 3470: a6d3 b826 macl %d6,%a3,>>,%a3@&,%a3 + 3474: a493 b826 macl %d6,%a3,,%a3@&,%d2 + 3478: aed3 b826 macl %d6,%a3,>>,%a3@&,%sp + 347c: a29a b806 macl %d6,%a3,%a2@\+,%d1 + 3480: a6da b806 macl %d6,%a3,%a2@\+,%a3 + 3484: a49a b806 macl %d6,%a3,%a2@\+,%d2 + 3488: aeda b806 macl %d6,%a3,%a2@\+,%sp + 348c: a29a b826 macl %d6,%a3,<<,%a2@\+&,%d1 + 3490: a6da b826 macl %d6,%a3,>>,%a2@\+&,%a3 + 3494: a49a b826 macl %d6,%a3,,%a2@\+&,%d2 + 3498: aeda b826 macl %d6,%a3,>>,%a2@\+&,%sp + 349c: a2ae b806 000a macl %d6,%a3,%fp@\(10\),%d1 + 34a2: a6ee b806 000a macl %d6,%a3,%fp@\(10\),%a3 + 34a8: a4ae b806 000a macl %d6,%a3,%fp@\(10\),%d2 + 34ae: aeee b806 000a macl %d6,%a3,%fp@\(10\),%sp + 34b4: a2ae b826 000a macl %d6,%a3,<<,%fp@\(10\)&,%d1 + 34ba: a6ee b826 000a macl %d6,%a3,>>,%fp@\(10\)&,%a3 + 34c0: a4ae b826 000a macl %d6,%a3,,%fp@\(10\)&,%d2 + 34c6: aeee b826 000a macl %d6,%a3,>>,%fp@\(10\)&,%sp + 34cc: a2a1 b806 macl %d6,%a3,%a1@-,%d1 + 34d0: a6e1 b806 macl %d6,%a3,%a1@-,%a3 + 34d4: a4a1 b806 macl %d6,%a3,%a1@-,%d2 + 34d8: aee1 b806 macl %d6,%a3,%a1@-,%sp + 34dc: a2a1 b826 macl %d6,%a3,<<,%a1@-&,%d1 + 34e0: a6e1 b826 macl %d6,%a3,>>,%a1@-&,%a3 + 34e4: a4a1 b826 macl %d6,%a3,,%a1@-&,%d2 + 34e8: aee1 b826 macl %d6,%a3,>>,%a1@-&,%sp + 34ec: a293 ba06 macl %d6,%a3,<<,%a3@,%d1 + 34f0: a6d3 ba06 macl %d6,%a3,>>,%a3@,%a3 + 34f4: a493 ba06 macl %d6,%a3,,%a3@,%d2 + 34f8: aed3 ba06 macl %d6,%a3,>>,%a3@,%sp + 34fc: a293 ba26 macl %d6,%a3,<<,%a3@&,%d1 + 3500: a6d3 ba26 macl %d6,%a3,>>,%a3@&,%a3 + 3504: a493 ba26 macl %d6,%a3,,%a3@&,%d2 + 3508: aed3 ba26 macl %d6,%a3,>>,%a3@&,%sp + 350c: a29a ba06 macl %d6,%a3,<<,%a2@\+,%d1 + 3510: a6da ba06 macl %d6,%a3,>>,%a2@\+,%a3 + 3514: a49a ba06 macl %d6,%a3,,%a2@\+,%d2 + 3518: aeda ba06 macl %d6,%a3,>>,%a2@\+,%sp + 351c: a29a ba26 macl %d6,%a3,<<,%a2@\+&,%d1 + 3520: a6da ba26 macl %d6,%a3,>>,%a2@\+&,%a3 + 3524: a49a ba26 macl %d6,%a3,,%a2@\+&,%d2 + 3528: aeda ba26 macl %d6,%a3,>>,%a2@\+&,%sp + 352c: a2ae ba06 000a macl %d6,%a3,<<,%fp@\(10\),%d1 + 3532: a6ee ba06 000a macl %d6,%a3,>>,%fp@\(10\),%a3 + 3538: a4ae ba06 000a macl %d6,%a3,,%fp@\(10\),%d2 + 353e: aeee ba06 000a macl %d6,%a3,>>,%fp@\(10\),%sp + 3544: a2ae ba26 000a macl %d6,%a3,<<,%fp@\(10\)&,%d1 + 354a: a6ee ba26 000a macl %d6,%a3,>>,%fp@\(10\)&,%a3 + 3550: a4ae ba26 000a macl %d6,%a3,,%fp@\(10\)&,%d2 + 3556: aeee ba26 000a macl %d6,%a3,>>,%fp@\(10\)&,%sp + 355c: a2a1 ba06 macl %d6,%a3,<<,%a1@-,%d1 + 3560: a6e1 ba06 macl %d6,%a3,>>,%a1@-,%a3 + 3564: a4a1 ba06 macl %d6,%a3,,%a1@-,%d2 + 3568: aee1 ba06 macl %d6,%a3,>>,%a1@-,%sp + 356c: a2a1 ba26 macl %d6,%a3,<<,%a1@-&,%d1 + 3570: a6e1 ba26 macl %d6,%a3,>>,%a1@-&,%a3 + 3574: a4a1 ba26 macl %d6,%a3,,%a1@-&,%d2 + 3578: aee1 ba26 macl %d6,%a3,>>,%a1@-&,%sp + 357c: a293 be06 macl %d6,%a3,<<,%a3@,%d1 + 3580: a6d3 be06 macl %d6,%a3,>>,%a3@,%a3 + 3584: a493 be06 macl %d6,%a3,,%a3@,%d2 + 3588: aed3 be06 macl %d6,%a3,>>,%a3@,%sp + 358c: a293 be26 macl %d6,%a3,<<,%a3@&,%d1 + 3590: a6d3 be26 macl %d6,%a3,>>,%a3@&,%a3 + 3594: a493 be26 macl %d6,%a3,,%a3@&,%d2 + 3598: aed3 be26 macl %d6,%a3,>>,%a3@&,%sp + 359c: a29a be06 macl %d6,%a3,<<,%a2@\+,%d1 + 35a0: a6da be06 macl %d6,%a3,>>,%a2@\+,%a3 + 35a4: a49a be06 macl %d6,%a3,,%a2@\+,%d2 + 35a8: aeda be06 macl %d6,%a3,>>,%a2@\+,%sp + 35ac: a29a be26 macl %d6,%a3,<<,%a2@\+&,%d1 + 35b0: a6da be26 macl %d6,%a3,>>,%a2@\+&,%a3 + 35b4: a49a be26 macl %d6,%a3,,%a2@\+&,%d2 + 35b8: aeda be26 macl %d6,%a3,>>,%a2@\+&,%sp + 35bc: a2ae be06 000a macl %d6,%a3,<<,%fp@\(10\),%d1 + 35c2: a6ee be06 000a macl %d6,%a3,>>,%fp@\(10\),%a3 + 35c8: a4ae be06 000a macl %d6,%a3,,%fp@\(10\),%d2 + 35ce: aeee be06 000a macl %d6,%a3,>>,%fp@\(10\),%sp + 35d4: a2ae be26 000a macl %d6,%a3,<<,%fp@\(10\)&,%d1 + 35da: a6ee be26 000a macl %d6,%a3,>>,%fp@\(10\)&,%a3 + 35e0: a4ae be26 000a macl %d6,%a3,,%fp@\(10\)&,%d2 + 35e6: aeee be26 000a macl %d6,%a3,>>,%fp@\(10\)&,%sp + 35ec: a2a1 be06 macl %d6,%a3,<<,%a1@-,%d1 + 35f0: a6e1 be06 macl %d6,%a3,>>,%a1@-,%a3 + 35f4: a4a1 be06 macl %d6,%a3,,%a1@-,%d2 + 35f8: aee1 be06 macl %d6,%a3,>>,%a1@-,%sp + 35fc: a2a1 be26 macl %d6,%a3,<<,%a1@-&,%d1 + 3600: a6e1 be26 macl %d6,%a3,>>,%a1@-&,%a3 + 3604: a4a1 be26 macl %d6,%a3,,%a1@-&,%d2 + 3608: aee1 be26 macl %d6,%a3,>>,%a1@-&,%sp + 360c: a293 ba06 macl %d6,%a3,<<,%a3@,%d1 + 3610: a6d3 ba06 macl %d6,%a3,>>,%a3@,%a3 + 3614: a493 ba06 macl %d6,%a3,,%a3@,%d2 + 3618: aed3 ba06 macl %d6,%a3,>>,%a3@,%sp + 361c: a293 ba26 macl %d6,%a3,<<,%a3@&,%d1 + 3620: a6d3 ba26 macl %d6,%a3,>>,%a3@&,%a3 + 3624: a493 ba26 macl %d6,%a3,,%a3@&,%d2 + 3628: aed3 ba26 macl %d6,%a3,>>,%a3@&,%sp + 362c: a29a ba06 macl %d6,%a3,<<,%a2@\+,%d1 + 3630: a6da ba06 macl %d6,%a3,>>,%a2@\+,%a3 + 3634: a49a ba06 macl %d6,%a3,,%a2@\+,%d2 + 3638: aeda ba06 macl %d6,%a3,>>,%a2@\+,%sp + 363c: a29a ba26 macl %d6,%a3,<<,%a2@\+&,%d1 + 3640: a6da ba26 macl %d6,%a3,>>,%a2@\+&,%a3 + 3644: a49a ba26 macl %d6,%a3,,%a2@\+&,%d2 + 3648: aeda ba26 macl %d6,%a3,>>,%a2@\+&,%sp + 364c: a2ae ba06 000a macl %d6,%a3,<<,%fp@\(10\),%d1 + 3652: a6ee ba06 000a macl %d6,%a3,>>,%fp@\(10\),%a3 + 3658: a4ae ba06 000a macl %d6,%a3,,%fp@\(10\),%d2 + 365e: aeee ba06 000a macl %d6,%a3,>>,%fp@\(10\),%sp + 3664: a2ae ba26 000a macl %d6,%a3,<<,%fp@\(10\)&,%d1 + 366a: a6ee ba26 000a macl %d6,%a3,>>,%fp@\(10\)&,%a3 + 3670: a4ae ba26 000a macl %d6,%a3,,%fp@\(10\)&,%d2 + 3676: aeee ba26 000a macl %d6,%a3,>>,%fp@\(10\)&,%sp + 367c: a2a1 ba06 macl %d6,%a3,<<,%a1@-,%d1 + 3680: a6e1 ba06 macl %d6,%a3,>>,%a1@-,%a3 + 3684: a4a1 ba06 macl %d6,%a3,,%a1@-,%d2 + 3688: aee1 ba06 macl %d6,%a3,>>,%a1@-,%sp + 368c: a2a1 ba26 macl %d6,%a3,<<,%a1@-&,%d1 + 3690: a6e1 ba26 macl %d6,%a3,>>,%a1@-&,%a3 + 3694: a4a1 ba26 macl %d6,%a3,,%a1@-&,%d2 + 3698: aee1 ba26 macl %d6,%a3,>>,%a1@-&,%sp + 369c: a293 be06 macl %d6,%a3,<<,%a3@,%d1 + 36a0: a6d3 be06 macl %d6,%a3,>>,%a3@,%a3 + 36a4: a493 be06 macl %d6,%a3,,%a3@,%d2 + 36a8: aed3 be06 macl %d6,%a3,>>,%a3@,%sp + 36ac: a293 be26 macl %d6,%a3,<<,%a3@&,%d1 + 36b0: a6d3 be26 macl %d6,%a3,>>,%a3@&,%a3 + 36b4: a493 be26 macl %d6,%a3,,%a3@&,%d2 + 36b8: aed3 be26 macl %d6,%a3,>>,%a3@&,%sp + 36bc: a29a be06 macl %d6,%a3,<<,%a2@\+,%d1 + 36c0: a6da be06 macl %d6,%a3,>>,%a2@\+,%a3 + 36c4: a49a be06 macl %d6,%a3,,%a2@\+,%d2 + 36c8: aeda be06 macl %d6,%a3,>>,%a2@\+,%sp + 36cc: a29a be26 macl %d6,%a3,<<,%a2@\+&,%d1 + 36d0: a6da be26 macl %d6,%a3,>>,%a2@\+&,%a3 + 36d4: a49a be26 macl %d6,%a3,,%a2@\+&,%d2 + 36d8: aeda be26 macl %d6,%a3,>>,%a2@\+&,%sp + 36dc: a2ae be06 000a macl %d6,%a3,<<,%fp@\(10\),%d1 + 36e2: a6ee be06 000a macl %d6,%a3,>>,%fp@\(10\),%a3 + 36e8: a4ae be06 000a macl %d6,%a3,,%fp@\(10\),%d2 + 36ee: aeee be06 000a macl %d6,%a3,>>,%fp@\(10\),%sp + 36f4: a2ae be26 000a macl %d6,%a3,<<,%fp@\(10\)&,%d1 + 36fa: a6ee be26 000a macl %d6,%a3,>>,%fp@\(10\)&,%a3 + 3700: a4ae be26 000a macl %d6,%a3,,%fp@\(10\)&,%d2 + 3706: aeee be26 000a macl %d6,%a3,>>,%fp@\(10\)&,%sp + 370c: a2a1 be06 macl %d6,%a3,<<,%a1@-,%d1 + 3710: a6e1 be06 macl %d6,%a3,>>,%a1@-,%a3 + 3714: a4a1 be06 macl %d6,%a3,,%a1@-,%d2 + 3718: aee1 be06 macl %d6,%a3,>>,%a1@-,%sp + 371c: a2a1 be26 macl %d6,%a3,<<,%a1@-&,%d1 + 3720: a6e1 be26 macl %d6,%a3,>>,%a1@-&,%a3 + 3724: a4a1 be26 macl %d6,%a3,,%a1@-&,%d2 + 3728: aee1 be26 macl %d6,%a3,>>,%a1@-&,%sp + 372c: a293 4806 macl %d6,%d4,%a3@,%d1 + 3730: a6d3 4806 macl %d6,%d4,%a3@,%a3 + 3734: a493 4806 macl %d6,%d4,%a3@,%d2 + 3738: aed3 4806 macl %d6,%d4,%a3@,%sp + 373c: a293 4826 macl %d6,%d4,<<,%a3@&,%d1 + 3740: a6d3 4826 macl %d6,%d4,>>,%a3@&,%a3 + 3744: a493 4826 macl %d6,%d4,,%a3@&,%d2 + 3748: aed3 4826 macl %d6,%d4,>>,%a3@&,%sp + 374c: a29a 4806 macl %d6,%d4,%a2@\+,%d1 + 3750: a6da 4806 macl %d6,%d4,%a2@\+,%a3 + 3754: a49a 4806 macl %d6,%d4,%a2@\+,%d2 + 3758: aeda 4806 macl %d6,%d4,%a2@\+,%sp + 375c: a29a 4826 macl %d6,%d4,<<,%a2@\+&,%d1 + 3760: a6da 4826 macl %d6,%d4,>>,%a2@\+&,%a3 + 3764: a49a 4826 macl %d6,%d4,,%a2@\+&,%d2 + 3768: aeda 4826 macl %d6,%d4,>>,%a2@\+&,%sp + 376c: a2ae 4806 000a macl %d6,%d4,%fp@\(10\),%d1 + 3772: a6ee 4806 000a macl %d6,%d4,%fp@\(10\),%a3 + 3778: a4ae 4806 000a macl %d6,%d4,%fp@\(10\),%d2 + 377e: aeee 4806 000a macl %d6,%d4,%fp@\(10\),%sp + 3784: a2ae 4826 000a macl %d6,%d4,<<,%fp@\(10\)&,%d1 + 378a: a6ee 4826 000a macl %d6,%d4,>>,%fp@\(10\)&,%a3 + 3790: a4ae 4826 000a macl %d6,%d4,,%fp@\(10\)&,%d2 + 3796: aeee 4826 000a macl %d6,%d4,>>,%fp@\(10\)&,%sp + 379c: a2a1 4806 macl %d6,%d4,%a1@-,%d1 + 37a0: a6e1 4806 macl %d6,%d4,%a1@-,%a3 + 37a4: a4a1 4806 macl %d6,%d4,%a1@-,%d2 + 37a8: aee1 4806 macl %d6,%d4,%a1@-,%sp + 37ac: a2a1 4826 macl %d6,%d4,<<,%a1@-&,%d1 + 37b0: a6e1 4826 macl %d6,%d4,>>,%a1@-&,%a3 + 37b4: a4a1 4826 macl %d6,%d4,,%a1@-&,%d2 + 37b8: aee1 4826 macl %d6,%d4,>>,%a1@-&,%sp + 37bc: a293 4a06 macl %d6,%d4,<<,%a3@,%d1 + 37c0: a6d3 4a06 macl %d6,%d4,>>,%a3@,%a3 + 37c4: a493 4a06 macl %d6,%d4,,%a3@,%d2 + 37c8: aed3 4a06 macl %d6,%d4,>>,%a3@,%sp + 37cc: a293 4a26 macl %d6,%d4,<<,%a3@&,%d1 + 37d0: a6d3 4a26 macl %d6,%d4,>>,%a3@&,%a3 + 37d4: a493 4a26 macl %d6,%d4,,%a3@&,%d2 + 37d8: aed3 4a26 macl %d6,%d4,>>,%a3@&,%sp + 37dc: a29a 4a06 macl %d6,%d4,<<,%a2@\+,%d1 + 37e0: a6da 4a06 macl %d6,%d4,>>,%a2@\+,%a3 + 37e4: a49a 4a06 macl %d6,%d4,,%a2@\+,%d2 + 37e8: aeda 4a06 macl %d6,%d4,>>,%a2@\+,%sp + 37ec: a29a 4a26 macl %d6,%d4,<<,%a2@\+&,%d1 + 37f0: a6da 4a26 macl %d6,%d4,>>,%a2@\+&,%a3 + 37f4: a49a 4a26 macl %d6,%d4,,%a2@\+&,%d2 + 37f8: aeda 4a26 macl %d6,%d4,>>,%a2@\+&,%sp + 37fc: a2ae 4a06 000a macl %d6,%d4,<<,%fp@\(10\),%d1 + 3802: a6ee 4a06 000a macl %d6,%d4,>>,%fp@\(10\),%a3 + 3808: a4ae 4a06 000a macl %d6,%d4,,%fp@\(10\),%d2 + 380e: aeee 4a06 000a macl %d6,%d4,>>,%fp@\(10\),%sp + 3814: a2ae 4a26 000a macl %d6,%d4,<<,%fp@\(10\)&,%d1 + 381a: a6ee 4a26 000a macl %d6,%d4,>>,%fp@\(10\)&,%a3 + 3820: a4ae 4a26 000a macl %d6,%d4,,%fp@\(10\)&,%d2 + 3826: aeee 4a26 000a macl %d6,%d4,>>,%fp@\(10\)&,%sp + 382c: a2a1 4a06 macl %d6,%d4,<<,%a1@-,%d1 + 3830: a6e1 4a06 macl %d6,%d4,>>,%a1@-,%a3 + 3834: a4a1 4a06 macl %d6,%d4,,%a1@-,%d2 + 3838: aee1 4a06 macl %d6,%d4,>>,%a1@-,%sp + 383c: a2a1 4a26 macl %d6,%d4,<<,%a1@-&,%d1 + 3840: a6e1 4a26 macl %d6,%d4,>>,%a1@-&,%a3 + 3844: a4a1 4a26 macl %d6,%d4,,%a1@-&,%d2 + 3848: aee1 4a26 macl %d6,%d4,>>,%a1@-&,%sp + 384c: a293 4e06 macl %d6,%d4,<<,%a3@,%d1 + 3850: a6d3 4e06 macl %d6,%d4,>>,%a3@,%a3 + 3854: a493 4e06 macl %d6,%d4,,%a3@,%d2 + 3858: aed3 4e06 macl %d6,%d4,>>,%a3@,%sp + 385c: a293 4e26 macl %d6,%d4,<<,%a3@&,%d1 + 3860: a6d3 4e26 macl %d6,%d4,>>,%a3@&,%a3 + 3864: a493 4e26 macl %d6,%d4,,%a3@&,%d2 + 3868: aed3 4e26 macl %d6,%d4,>>,%a3@&,%sp + 386c: a29a 4e06 macl %d6,%d4,<<,%a2@\+,%d1 + 3870: a6da 4e06 macl %d6,%d4,>>,%a2@\+,%a3 + 3874: a49a 4e06 macl %d6,%d4,,%a2@\+,%d2 + 3878: aeda 4e06 macl %d6,%d4,>>,%a2@\+,%sp + 387c: a29a 4e26 macl %d6,%d4,<<,%a2@\+&,%d1 + 3880: a6da 4e26 macl %d6,%d4,>>,%a2@\+&,%a3 + 3884: a49a 4e26 macl %d6,%d4,,%a2@\+&,%d2 + 3888: aeda 4e26 macl %d6,%d4,>>,%a2@\+&,%sp + 388c: a2ae 4e06 000a macl %d6,%d4,<<,%fp@\(10\),%d1 + 3892: a6ee 4e06 000a macl %d6,%d4,>>,%fp@\(10\),%a3 + 3898: a4ae 4e06 000a macl %d6,%d4,,%fp@\(10\),%d2 + 389e: aeee 4e06 000a macl %d6,%d4,>>,%fp@\(10\),%sp + 38a4: a2ae 4e26 000a macl %d6,%d4,<<,%fp@\(10\)&,%d1 + 38aa: a6ee 4e26 000a macl %d6,%d4,>>,%fp@\(10\)&,%a3 + 38b0: a4ae 4e26 000a macl %d6,%d4,,%fp@\(10\)&,%d2 + 38b6: aeee 4e26 000a macl %d6,%d4,>>,%fp@\(10\)&,%sp + 38bc: a2a1 4e06 macl %d6,%d4,<<,%a1@-,%d1 + 38c0: a6e1 4e06 macl %d6,%d4,>>,%a1@-,%a3 + 38c4: a4a1 4e06 macl %d6,%d4,,%a1@-,%d2 + 38c8: aee1 4e06 macl %d6,%d4,>>,%a1@-,%sp + 38cc: a2a1 4e26 macl %d6,%d4,<<,%a1@-&,%d1 + 38d0: a6e1 4e26 macl %d6,%d4,>>,%a1@-&,%a3 + 38d4: a4a1 4e26 macl %d6,%d4,,%a1@-&,%d2 + 38d8: aee1 4e26 macl %d6,%d4,>>,%a1@-&,%sp + 38dc: a293 4a06 macl %d6,%d4,<<,%a3@,%d1 + 38e0: a6d3 4a06 macl %d6,%d4,>>,%a3@,%a3 + 38e4: a493 4a06 macl %d6,%d4,,%a3@,%d2 + 38e8: aed3 4a06 macl %d6,%d4,>>,%a3@,%sp + 38ec: a293 4a26 macl %d6,%d4,<<,%a3@&,%d1 + 38f0: a6d3 4a26 macl %d6,%d4,>>,%a3@&,%a3 + 38f4: a493 4a26 macl %d6,%d4,,%a3@&,%d2 + 38f8: aed3 4a26 macl %d6,%d4,>>,%a3@&,%sp + 38fc: a29a 4a06 macl %d6,%d4,<<,%a2@\+,%d1 + 3900: a6da 4a06 macl %d6,%d4,>>,%a2@\+,%a3 + 3904: a49a 4a06 macl %d6,%d4,,%a2@\+,%d2 + 3908: aeda 4a06 macl %d6,%d4,>>,%a2@\+,%sp + 390c: a29a 4a26 macl %d6,%d4,<<,%a2@\+&,%d1 + 3910: a6da 4a26 macl %d6,%d4,>>,%a2@\+&,%a3 + 3914: a49a 4a26 macl %d6,%d4,,%a2@\+&,%d2 + 3918: aeda 4a26 macl %d6,%d4,>>,%a2@\+&,%sp + 391c: a2ae 4a06 000a macl %d6,%d4,<<,%fp@\(10\),%d1 + 3922: a6ee 4a06 000a macl %d6,%d4,>>,%fp@\(10\),%a3 + 3928: a4ae 4a06 000a macl %d6,%d4,,%fp@\(10\),%d2 + 392e: aeee 4a06 000a macl %d6,%d4,>>,%fp@\(10\),%sp + 3934: a2ae 4a26 000a macl %d6,%d4,<<,%fp@\(10\)&,%d1 + 393a: a6ee 4a26 000a macl %d6,%d4,>>,%fp@\(10\)&,%a3 + 3940: a4ae 4a26 000a macl %d6,%d4,,%fp@\(10\)&,%d2 + 3946: aeee 4a26 000a macl %d6,%d4,>>,%fp@\(10\)&,%sp + 394c: a2a1 4a06 macl %d6,%d4,<<,%a1@-,%d1 + 3950: a6e1 4a06 macl %d6,%d4,>>,%a1@-,%a3 + 3954: a4a1 4a06 macl %d6,%d4,,%a1@-,%d2 + 3958: aee1 4a06 macl %d6,%d4,>>,%a1@-,%sp + 395c: a2a1 4a26 macl %d6,%d4,<<,%a1@-&,%d1 + 3960: a6e1 4a26 macl %d6,%d4,>>,%a1@-&,%a3 + 3964: a4a1 4a26 macl %d6,%d4,,%a1@-&,%d2 + 3968: aee1 4a26 macl %d6,%d4,>>,%a1@-&,%sp + 396c: a293 4e06 macl %d6,%d4,<<,%a3@,%d1 + 3970: a6d3 4e06 macl %d6,%d4,>>,%a3@,%a3 + 3974: a493 4e06 macl %d6,%d4,,%a3@,%d2 + 3978: aed3 4e06 macl %d6,%d4,>>,%a3@,%sp + 397c: a293 4e26 macl %d6,%d4,<<,%a3@&,%d1 + 3980: a6d3 4e26 macl %d6,%d4,>>,%a3@&,%a3 + 3984: a493 4e26 macl %d6,%d4,,%a3@&,%d2 + 3988: aed3 4e26 macl %d6,%d4,>>,%a3@&,%sp + 398c: a29a 4e06 macl %d6,%d4,<<,%a2@\+,%d1 + 3990: a6da 4e06 macl %d6,%d4,>>,%a2@\+,%a3 + 3994: a49a 4e06 macl %d6,%d4,,%a2@\+,%d2 + 3998: aeda 4e06 macl %d6,%d4,>>,%a2@\+,%sp + 399c: a29a 4e26 macl %d6,%d4,<<,%a2@\+&,%d1 + 39a0: a6da 4e26 macl %d6,%d4,>>,%a2@\+&,%a3 + 39a4: a49a 4e26 macl %d6,%d4,,%a2@\+&,%d2 + 39a8: aeda 4e26 macl %d6,%d4,>>,%a2@\+&,%sp + 39ac: a2ae 4e06 000a macl %d6,%d4,<<,%fp@\(10\),%d1 + 39b2: a6ee 4e06 000a macl %d6,%d4,>>,%fp@\(10\),%a3 + 39b8: a4ae 4e06 000a macl %d6,%d4,,%fp@\(10\),%d2 + 39be: aeee 4e06 000a macl %d6,%d4,>>,%fp@\(10\),%sp + 39c4: a2ae 4e26 000a macl %d6,%d4,<<,%fp@\(10\)&,%d1 + 39ca: a6ee 4e26 000a macl %d6,%d4,>>,%fp@\(10\)&,%a3 + 39d0: a4ae 4e26 000a macl %d6,%d4,,%fp@\(10\)&,%d2 + 39d6: aeee 4e26 000a macl %d6,%d4,>>,%fp@\(10\)&,%sp + 39dc: a2a1 4e06 macl %d6,%d4,<<,%a1@-,%d1 + 39e0: a6e1 4e06 macl %d6,%d4,>>,%a1@-,%a3 + 39e4: a4a1 4e06 macl %d6,%d4,,%a1@-,%d2 + 39e8: aee1 4e06 macl %d6,%d4,>>,%a1@-,%sp + 39ec: a2a1 4e26 macl %d6,%d4,<<,%a1@-&,%d1 + 39f0: a6e1 4e26 macl %d6,%d4,>>,%a1@-&,%a3 + 39f4: a4a1 4e26 macl %d6,%d4,,%a1@-&,%d2 + 39f8: aee1 4e26 macl %d6,%d4,>>,%a1@-&,%sp diff --git a/gas/testsuite/gas/m68k/mcf-mac.s b/gas/testsuite/gas/m68k/mcf-mac.s new file mode 100644 index 00000000000..5b59a106e06 --- /dev/null +++ b/gas/testsuite/gas/m68k/mcf-mac.s @@ -0,0 +1,3331 @@ + + .text + + move.l %acc,%d2 + move.l %acc,%a1 + + move.l %macsr,%a1 + move.l %macsr,%d2 + + move.l %mask,%a1 + move.l %mask,%d2 + + move.l %macsr,%ccr + + move.l #0x12345678,%acc + move.l %d1,%acc + move.l %a2,%acc + + move.l #0x12345678,%macsr + move.l %d1,%macsr + move.l %a2,%macsr + + move.l #0x12345678,%mask + move.l %d1,%mask + move.l %a2,%mask + + | automated from here + + mac.w %a1l,%a2u + mac.w %a1l,%a2u,<< + mac.w %a1l,%a2u,>> + mac.w %a1l,%a2u,#1 + mac.w %a1l,%a2u,#-1 + mac.w %a1l,%d3l + mac.w %a1l,%d3l,<< + mac.w %a1l,%d3l,>> + mac.w %a1l,%d3l,#1 + mac.w %a1l,%d3l,#-1 + mac.w %a1l,%a7u + mac.w %a1l,%a7u,<< + mac.w %a1l,%a7u,>> + mac.w %a1l,%a7u,#1 + mac.w %a1l,%a7u,#-1 + mac.w %a1l,%d1l + mac.w %a1l,%d1l,<< + mac.w %a1l,%d1l,>> + mac.w %a1l,%d1l,#1 + mac.w %a1l,%d1l,#-1 + mac.w %d2u,%a2u + mac.w %d2u,%a2u,<< + mac.w %d2u,%a2u,>> + mac.w %d2u,%a2u,#1 + mac.w %d2u,%a2u,#-1 + mac.w %d2u,%d3l + mac.w %d2u,%d3l,<< + mac.w %d2u,%d3l,>> + mac.w %d2u,%d3l,#1 + mac.w %d2u,%d3l,#-1 + mac.w %d2u,%a7u + mac.w %d2u,%a7u,<< + mac.w %d2u,%a7u,>> + mac.w %d2u,%a7u,#1 + mac.w %d2u,%a7u,#-1 + mac.w %d2u,%d1l + mac.w %d2u,%d1l,<< + mac.w %d2u,%d1l,>> + mac.w %d2u,%d1l,#1 + mac.w %d2u,%d1l,#-1 + mac.w %a5l,%a2u + mac.w %a5l,%a2u,<< + mac.w %a5l,%a2u,>> + mac.w %a5l,%a2u,#1 + mac.w %a5l,%a2u,#-1 + mac.w %a5l,%d3l + mac.w %a5l,%d3l,<< + mac.w %a5l,%d3l,>> + mac.w %a5l,%d3l,#1 + mac.w %a5l,%d3l,#-1 + mac.w %a5l,%a7u + mac.w %a5l,%a7u,<< + mac.w %a5l,%a7u,>> + mac.w %a5l,%a7u,#1 + mac.w %a5l,%a7u,#-1 + mac.w %a5l,%d1l + mac.w %a5l,%d1l,<< + mac.w %a5l,%d1l,>> + mac.w %a5l,%d1l,#1 + mac.w %a5l,%d1l,#-1 + mac.w %d6u,%a2u + mac.w %d6u,%a2u,<< + mac.w %d6u,%a2u,>> + mac.w %d6u,%a2u,#1 + mac.w %d6u,%a2u,#-1 + mac.w %d6u,%d3l + mac.w %d6u,%d3l,<< + mac.w %d6u,%d3l,>> + mac.w %d6u,%d3l,#1 + mac.w %d6u,%d3l,#-1 + mac.w %d6u,%a7u + mac.w %d6u,%a7u,<< + mac.w %d6u,%a7u,>> + mac.w %d6u,%a7u,#1 + mac.w %d6u,%a7u,#-1 + mac.w %d6u,%d1l + mac.w %d6u,%d1l,<< + mac.w %d6u,%d1l,>> + mac.w %d6u,%d1l,#1 + mac.w %d6u,%d1l,#-1 + + mac.w %a1l,%a2u,(%a3),%d1 + mac.w %a1l,%a2u,(%a3),%a3 + mac.w %a1l,%a2u,(%a3),%d2 + mac.w %a1l,%a2u,(%a3),%a7 + mac.w %a1l,%a2u,(%a3)&,%d1 + mac.w %a1l,%a2u,(%a3)&,%a3 + mac.w %a1l,%a2u,(%a3)&,%d2 + mac.w %a1l,%a2u,(%a3)&,%a7 + mac.w %a1l,%a2u,(%a2)+,%d1 + mac.w %a1l,%a2u,(%a2)+,%a3 + mac.w %a1l,%a2u,(%a2)+,%d2 + mac.w %a1l,%a2u,(%a2)+,%a7 + mac.w %a1l,%a2u,(%a2)+&,%d1 + mac.w %a1l,%a2u,(%a2)+&,%a3 + mac.w %a1l,%a2u,(%a2)+&,%d2 + mac.w %a1l,%a2u,(%a2)+&,%a7 + mac.w %a1l,%a2u,10(%a6),%d1 + mac.w %a1l,%a2u,10(%a6),%a3 + mac.w %a1l,%a2u,10(%a6),%d2 + mac.w %a1l,%a2u,10(%a6),%a7 + mac.w %a1l,%a2u,10(%a6)&,%d1 + mac.w %a1l,%a2u,10(%a6)&,%a3 + mac.w %a1l,%a2u,10(%a6)&,%d2 + mac.w %a1l,%a2u,10(%a6)&,%a7 + mac.w %a1l,%a2u,-(%a1),%d1 + mac.w %a1l,%a2u,-(%a1),%a3 + mac.w %a1l,%a2u,-(%a1),%d2 + mac.w %a1l,%a2u,-(%a1),%a7 + mac.w %a1l,%a2u,-(%a1)&,%d1 + mac.w %a1l,%a2u,-(%a1)&,%a3 + mac.w %a1l,%a2u,-(%a1)&,%d2 + mac.w %a1l,%a2u,-(%a1)&,%a7 + mac.w %a1l,%a2u,<<,(%a3),%d1 + mac.w %a1l,%a2u,<<,(%a3),%a3 + mac.w %a1l,%a2u,<<,(%a3),%d2 + mac.w %a1l,%a2u,<<,(%a3),%a7 + mac.w %a1l,%a2u,<<,(%a3)&,%d1 + mac.w %a1l,%a2u,<<,(%a3)&,%a3 + mac.w %a1l,%a2u,<<,(%a3)&,%d2 + mac.w %a1l,%a2u,<<,(%a3)&,%a7 + mac.w %a1l,%a2u,<<,(%a2)+,%d1 + mac.w %a1l,%a2u,<<,(%a2)+,%a3 + mac.w %a1l,%a2u,<<,(%a2)+,%d2 + mac.w %a1l,%a2u,<<,(%a2)+,%a7 + mac.w %a1l,%a2u,<<,(%a2)+&,%d1 + mac.w %a1l,%a2u,<<,(%a2)+&,%a3 + mac.w %a1l,%a2u,<<,(%a2)+&,%d2 + mac.w %a1l,%a2u,<<,(%a2)+&,%a7 + mac.w %a1l,%a2u,<<,10(%a6),%d1 + mac.w %a1l,%a2u,<<,10(%a6),%a3 + mac.w %a1l,%a2u,<<,10(%a6),%d2 + mac.w %a1l,%a2u,<<,10(%a6),%a7 + mac.w %a1l,%a2u,<<,10(%a6)&,%d1 + mac.w %a1l,%a2u,<<,10(%a6)&,%a3 + mac.w %a1l,%a2u,<<,10(%a6)&,%d2 + mac.w %a1l,%a2u,<<,10(%a6)&,%a7 + mac.w %a1l,%a2u,<<,-(%a1),%d1 + mac.w %a1l,%a2u,<<,-(%a1),%a3 + mac.w %a1l,%a2u,<<,-(%a1),%d2 + mac.w %a1l,%a2u,<<,-(%a1),%a7 + mac.w %a1l,%a2u,<<,-(%a1)&,%d1 + mac.w %a1l,%a2u,<<,-(%a1)&,%a3 + mac.w %a1l,%a2u,<<,-(%a1)&,%d2 + mac.w %a1l,%a2u,<<,-(%a1)&,%a7 + mac.w %a1l,%a2u,>>,(%a3),%d1 + mac.w %a1l,%a2u,>>,(%a3),%a3 + mac.w %a1l,%a2u,>>,(%a3),%d2 + mac.w %a1l,%a2u,>>,(%a3),%a7 + mac.w %a1l,%a2u,>>,(%a3)&,%d1 + mac.w %a1l,%a2u,>>,(%a3)&,%a3 + mac.w %a1l,%a2u,>>,(%a3)&,%d2 + mac.w %a1l,%a2u,>>,(%a3)&,%a7 + mac.w %a1l,%a2u,>>,(%a2)+,%d1 + mac.w %a1l,%a2u,>>,(%a2)+,%a3 + mac.w %a1l,%a2u,>>,(%a2)+,%d2 + mac.w %a1l,%a2u,>>,(%a2)+,%a7 + mac.w %a1l,%a2u,>>,(%a2)+&,%d1 + mac.w %a1l,%a2u,>>,(%a2)+&,%a3 + mac.w %a1l,%a2u,>>,(%a2)+&,%d2 + mac.w %a1l,%a2u,>>,(%a2)+&,%a7 + mac.w %a1l,%a2u,>>,10(%a6),%d1 + mac.w %a1l,%a2u,>>,10(%a6),%a3 + mac.w %a1l,%a2u,>>,10(%a6),%d2 + mac.w %a1l,%a2u,>>,10(%a6),%a7 + mac.w %a1l,%a2u,>>,10(%a6)&,%d1 + mac.w %a1l,%a2u,>>,10(%a6)&,%a3 + mac.w %a1l,%a2u,>>,10(%a6)&,%d2 + mac.w %a1l,%a2u,>>,10(%a6)&,%a7 + mac.w %a1l,%a2u,>>,-(%a1),%d1 + mac.w %a1l,%a2u,>>,-(%a1),%a3 + mac.w %a1l,%a2u,>>,-(%a1),%d2 + mac.w %a1l,%a2u,>>,-(%a1),%a7 + mac.w %a1l,%a2u,>>,-(%a1)&,%d1 + mac.w %a1l,%a2u,>>,-(%a1)&,%a3 + mac.w %a1l,%a2u,>>,-(%a1)&,%d2 + mac.w %a1l,%a2u,>>,-(%a1)&,%a7 + mac.w %a1l,%a2u,#1,(%a3),%d1 + mac.w %a1l,%a2u,#1,(%a3),%a3 + mac.w %a1l,%a2u,#1,(%a3),%d2 + mac.w %a1l,%a2u,#1,(%a3),%a7 + mac.w %a1l,%a2u,#1,(%a3)&,%d1 + mac.w %a1l,%a2u,#1,(%a3)&,%a3 + mac.w %a1l,%a2u,#1,(%a3)&,%d2 + mac.w %a1l,%a2u,#1,(%a3)&,%a7 + mac.w %a1l,%a2u,#1,(%a2)+,%d1 + mac.w %a1l,%a2u,#1,(%a2)+,%a3 + mac.w %a1l,%a2u,#1,(%a2)+,%d2 + mac.w %a1l,%a2u,#1,(%a2)+,%a7 + mac.w %a1l,%a2u,#1,(%a2)+&,%d1 + mac.w %a1l,%a2u,#1,(%a2)+&,%a3 + mac.w %a1l,%a2u,#1,(%a2)+&,%d2 + mac.w %a1l,%a2u,#1,(%a2)+&,%a7 + mac.w %a1l,%a2u,#1,10(%a6),%d1 + mac.w %a1l,%a2u,#1,10(%a6),%a3 + mac.w %a1l,%a2u,#1,10(%a6),%d2 + mac.w %a1l,%a2u,#1,10(%a6),%a7 + mac.w %a1l,%a2u,#1,10(%a6)&,%d1 + mac.w %a1l,%a2u,#1,10(%a6)&,%a3 + mac.w %a1l,%a2u,#1,10(%a6)&,%d2 + mac.w %a1l,%a2u,#1,10(%a6)&,%a7 + mac.w %a1l,%a2u,#1,-(%a1),%d1 + mac.w %a1l,%a2u,#1,-(%a1),%a3 + mac.w %a1l,%a2u,#1,-(%a1),%d2 + mac.w %a1l,%a2u,#1,-(%a1),%a7 + mac.w %a1l,%a2u,#1,-(%a1)&,%d1 + mac.w %a1l,%a2u,#1,-(%a1)&,%a3 + mac.w %a1l,%a2u,#1,-(%a1)&,%d2 + mac.w %a1l,%a2u,#1,-(%a1)&,%a7 + mac.w %a1l,%a2u,#-1,(%a3),%d1 + mac.w %a1l,%a2u,#-1,(%a3),%a3 + mac.w %a1l,%a2u,#-1,(%a3),%d2 + mac.w %a1l,%a2u,#-1,(%a3),%a7 + mac.w %a1l,%a2u,#-1,(%a3)&,%d1 + mac.w %a1l,%a2u,#-1,(%a3)&,%a3 + mac.w %a1l,%a2u,#-1,(%a3)&,%d2 + mac.w %a1l,%a2u,#-1,(%a3)&,%a7 + mac.w %a1l,%a2u,#-1,(%a2)+,%d1 + mac.w %a1l,%a2u,#-1,(%a2)+,%a3 + mac.w %a1l,%a2u,#-1,(%a2)+,%d2 + mac.w %a1l,%a2u,#-1,(%a2)+,%a7 + mac.w %a1l,%a2u,#-1,(%a2)+&,%d1 + mac.w %a1l,%a2u,#-1,(%a2)+&,%a3 + mac.w %a1l,%a2u,#-1,(%a2)+&,%d2 + mac.w %a1l,%a2u,#-1,(%a2)+&,%a7 + mac.w %a1l,%a2u,#-1,10(%a6),%d1 + mac.w %a1l,%a2u,#-1,10(%a6),%a3 + mac.w %a1l,%a2u,#-1,10(%a6),%d2 + mac.w %a1l,%a2u,#-1,10(%a6),%a7 + mac.w %a1l,%a2u,#-1,10(%a6)&,%d1 + mac.w %a1l,%a2u,#-1,10(%a6)&,%a3 + mac.w %a1l,%a2u,#-1,10(%a6)&,%d2 + mac.w %a1l,%a2u,#-1,10(%a6)&,%a7 + mac.w %a1l,%a2u,#-1,-(%a1),%d1 + mac.w %a1l,%a2u,#-1,-(%a1),%a3 + mac.w %a1l,%a2u,#-1,-(%a1),%d2 + mac.w %a1l,%a2u,#-1,-(%a1),%a7 + mac.w %a1l,%a2u,#-1,-(%a1)&,%d1 + mac.w %a1l,%a2u,#-1,-(%a1)&,%a3 + mac.w %a1l,%a2u,#-1,-(%a1)&,%d2 + mac.w %a1l,%a2u,#-1,-(%a1)&,%a7 + mac.w %a1l,%d3l,(%a3),%d1 + mac.w %a1l,%d3l,(%a3),%a3 + mac.w %a1l,%d3l,(%a3),%d2 + mac.w %a1l,%d3l,(%a3),%a7 + mac.w %a1l,%d3l,(%a3)&,%d1 + mac.w %a1l,%d3l,(%a3)&,%a3 + mac.w %a1l,%d3l,(%a3)&,%d2 + mac.w %a1l,%d3l,(%a3)&,%a7 + mac.w %a1l,%d3l,(%a2)+,%d1 + mac.w %a1l,%d3l,(%a2)+,%a3 + mac.w %a1l,%d3l,(%a2)+,%d2 + mac.w %a1l,%d3l,(%a2)+,%a7 + mac.w %a1l,%d3l,(%a2)+&,%d1 + mac.w %a1l,%d3l,(%a2)+&,%a3 + mac.w %a1l,%d3l,(%a2)+&,%d2 + mac.w %a1l,%d3l,(%a2)+&,%a7 + mac.w %a1l,%d3l,10(%a6),%d1 + mac.w %a1l,%d3l,10(%a6),%a3 + mac.w %a1l,%d3l,10(%a6),%d2 + mac.w %a1l,%d3l,10(%a6),%a7 + mac.w %a1l,%d3l,10(%a6)&,%d1 + mac.w %a1l,%d3l,10(%a6)&,%a3 + mac.w %a1l,%d3l,10(%a6)&,%d2 + mac.w %a1l,%d3l,10(%a6)&,%a7 + mac.w %a1l,%d3l,-(%a1),%d1 + mac.w %a1l,%d3l,-(%a1),%a3 + mac.w %a1l,%d3l,-(%a1),%d2 + mac.w %a1l,%d3l,-(%a1),%a7 + mac.w %a1l,%d3l,-(%a1)&,%d1 + mac.w %a1l,%d3l,-(%a1)&,%a3 + mac.w %a1l,%d3l,-(%a1)&,%d2 + mac.w %a1l,%d3l,-(%a1)&,%a7 + mac.w %a1l,%d3l,<<,(%a3),%d1 + mac.w %a1l,%d3l,<<,(%a3),%a3 + mac.w %a1l,%d3l,<<,(%a3),%d2 + mac.w %a1l,%d3l,<<,(%a3),%a7 + mac.w %a1l,%d3l,<<,(%a3)&,%d1 + mac.w %a1l,%d3l,<<,(%a3)&,%a3 + mac.w %a1l,%d3l,<<,(%a3)&,%d2 + mac.w %a1l,%d3l,<<,(%a3)&,%a7 + mac.w %a1l,%d3l,<<,(%a2)+,%d1 + mac.w %a1l,%d3l,<<,(%a2)+,%a3 + mac.w %a1l,%d3l,<<,(%a2)+,%d2 + mac.w %a1l,%d3l,<<,(%a2)+,%a7 + mac.w %a1l,%d3l,<<,(%a2)+&,%d1 + mac.w %a1l,%d3l,<<,(%a2)+&,%a3 + mac.w %a1l,%d3l,<<,(%a2)+&,%d2 + mac.w %a1l,%d3l,<<,(%a2)+&,%a7 + mac.w %a1l,%d3l,<<,10(%a6),%d1 + mac.w %a1l,%d3l,<<,10(%a6),%a3 + mac.w %a1l,%d3l,<<,10(%a6),%d2 + mac.w %a1l,%d3l,<<,10(%a6),%a7 + mac.w %a1l,%d3l,<<,10(%a6)&,%d1 + mac.w %a1l,%d3l,<<,10(%a6)&,%a3 + mac.w %a1l,%d3l,<<,10(%a6)&,%d2 + mac.w %a1l,%d3l,<<,10(%a6)&,%a7 + mac.w %a1l,%d3l,<<,-(%a1),%d1 + mac.w %a1l,%d3l,<<,-(%a1),%a3 + mac.w %a1l,%d3l,<<,-(%a1),%d2 + mac.w %a1l,%d3l,<<,-(%a1),%a7 + mac.w %a1l,%d3l,<<,-(%a1)&,%d1 + mac.w %a1l,%d3l,<<,-(%a1)&,%a3 + mac.w %a1l,%d3l,<<,-(%a1)&,%d2 + mac.w %a1l,%d3l,<<,-(%a1)&,%a7 + mac.w %a1l,%d3l,>>,(%a3),%d1 + mac.w %a1l,%d3l,>>,(%a3),%a3 + mac.w %a1l,%d3l,>>,(%a3),%d2 + mac.w %a1l,%d3l,>>,(%a3),%a7 + mac.w %a1l,%d3l,>>,(%a3)&,%d1 + mac.w %a1l,%d3l,>>,(%a3)&,%a3 + mac.w %a1l,%d3l,>>,(%a3)&,%d2 + mac.w %a1l,%d3l,>>,(%a3)&,%a7 + mac.w %a1l,%d3l,>>,(%a2)+,%d1 + mac.w %a1l,%d3l,>>,(%a2)+,%a3 + mac.w %a1l,%d3l,>>,(%a2)+,%d2 + mac.w %a1l,%d3l,>>,(%a2)+,%a7 + mac.w %a1l,%d3l,>>,(%a2)+&,%d1 + mac.w %a1l,%d3l,>>,(%a2)+&,%a3 + mac.w %a1l,%d3l,>>,(%a2)+&,%d2 + mac.w %a1l,%d3l,>>,(%a2)+&,%a7 + mac.w %a1l,%d3l,>>,10(%a6),%d1 + mac.w %a1l,%d3l,>>,10(%a6),%a3 + mac.w %a1l,%d3l,>>,10(%a6),%d2 + mac.w %a1l,%d3l,>>,10(%a6),%a7 + mac.w %a1l,%d3l,>>,10(%a6)&,%d1 + mac.w %a1l,%d3l,>>,10(%a6)&,%a3 + mac.w %a1l,%d3l,>>,10(%a6)&,%d2 + mac.w %a1l,%d3l,>>,10(%a6)&,%a7 + mac.w %a1l,%d3l,>>,-(%a1),%d1 + mac.w %a1l,%d3l,>>,-(%a1),%a3 + mac.w %a1l,%d3l,>>,-(%a1),%d2 + mac.w %a1l,%d3l,>>,-(%a1),%a7 + mac.w %a1l,%d3l,>>,-(%a1)&,%d1 + mac.w %a1l,%d3l,>>,-(%a1)&,%a3 + mac.w %a1l,%d3l,>>,-(%a1)&,%d2 + mac.w %a1l,%d3l,>>,-(%a1)&,%a7 + mac.w %a1l,%d3l,#1,(%a3),%d1 + mac.w %a1l,%d3l,#1,(%a3),%a3 + mac.w %a1l,%d3l,#1,(%a3),%d2 + mac.w %a1l,%d3l,#1,(%a3),%a7 + mac.w %a1l,%d3l,#1,(%a3)&,%d1 + mac.w %a1l,%d3l,#1,(%a3)&,%a3 + mac.w %a1l,%d3l,#1,(%a3)&,%d2 + mac.w %a1l,%d3l,#1,(%a3)&,%a7 + mac.w %a1l,%d3l,#1,(%a2)+,%d1 + mac.w %a1l,%d3l,#1,(%a2)+,%a3 + mac.w %a1l,%d3l,#1,(%a2)+,%d2 + mac.w %a1l,%d3l,#1,(%a2)+,%a7 + mac.w %a1l,%d3l,#1,(%a2)+&,%d1 + mac.w %a1l,%d3l,#1,(%a2)+&,%a3 + mac.w %a1l,%d3l,#1,(%a2)+&,%d2 + mac.w %a1l,%d3l,#1,(%a2)+&,%a7 + mac.w %a1l,%d3l,#1,10(%a6),%d1 + mac.w %a1l,%d3l,#1,10(%a6),%a3 + mac.w %a1l,%d3l,#1,10(%a6),%d2 + mac.w %a1l,%d3l,#1,10(%a6),%a7 + mac.w %a1l,%d3l,#1,10(%a6)&,%d1 + mac.w %a1l,%d3l,#1,10(%a6)&,%a3 + mac.w %a1l,%d3l,#1,10(%a6)&,%d2 + mac.w %a1l,%d3l,#1,10(%a6)&,%a7 + mac.w %a1l,%d3l,#1,-(%a1),%d1 + mac.w %a1l,%d3l,#1,-(%a1),%a3 + mac.w %a1l,%d3l,#1,-(%a1),%d2 + mac.w %a1l,%d3l,#1,-(%a1),%a7 + mac.w %a1l,%d3l,#1,-(%a1)&,%d1 + mac.w %a1l,%d3l,#1,-(%a1)&,%a3 + mac.w %a1l,%d3l,#1,-(%a1)&,%d2 + mac.w %a1l,%d3l,#1,-(%a1)&,%a7 + mac.w %a1l,%d3l,#-1,(%a3),%d1 + mac.w %a1l,%d3l,#-1,(%a3),%a3 + mac.w %a1l,%d3l,#-1,(%a3),%d2 + mac.w %a1l,%d3l,#-1,(%a3),%a7 + mac.w %a1l,%d3l,#-1,(%a3)&,%d1 + mac.w %a1l,%d3l,#-1,(%a3)&,%a3 + mac.w %a1l,%d3l,#-1,(%a3)&,%d2 + mac.w %a1l,%d3l,#-1,(%a3)&,%a7 + mac.w %a1l,%d3l,#-1,(%a2)+,%d1 + mac.w %a1l,%d3l,#-1,(%a2)+,%a3 + mac.w %a1l,%d3l,#-1,(%a2)+,%d2 + mac.w %a1l,%d3l,#-1,(%a2)+,%a7 + mac.w %a1l,%d3l,#-1,(%a2)+&,%d1 + mac.w %a1l,%d3l,#-1,(%a2)+&,%a3 + mac.w %a1l,%d3l,#-1,(%a2)+&,%d2 + mac.w %a1l,%d3l,#-1,(%a2)+&,%a7 + mac.w %a1l,%d3l,#-1,10(%a6),%d1 + mac.w %a1l,%d3l,#-1,10(%a6),%a3 + mac.w %a1l,%d3l,#-1,10(%a6),%d2 + mac.w %a1l,%d3l,#-1,10(%a6),%a7 + mac.w %a1l,%d3l,#-1,10(%a6)&,%d1 + mac.w %a1l,%d3l,#-1,10(%a6)&,%a3 + mac.w %a1l,%d3l,#-1,10(%a6)&,%d2 + mac.w %a1l,%d3l,#-1,10(%a6)&,%a7 + mac.w %a1l,%d3l,#-1,-(%a1),%d1 + mac.w %a1l,%d3l,#-1,-(%a1),%a3 + mac.w %a1l,%d3l,#-1,-(%a1),%d2 + mac.w %a1l,%d3l,#-1,-(%a1),%a7 + mac.w %a1l,%d3l,#-1,-(%a1)&,%d1 + mac.w %a1l,%d3l,#-1,-(%a1)&,%a3 + mac.w %a1l,%d3l,#-1,-(%a1)&,%d2 + mac.w %a1l,%d3l,#-1,-(%a1)&,%a7 + mac.w %a1l,%a7u,(%a3),%d1 + mac.w %a1l,%a7u,(%a3),%a3 + mac.w %a1l,%a7u,(%a3),%d2 + mac.w %a1l,%a7u,(%a3),%a7 + mac.w %a1l,%a7u,(%a3)&,%d1 + mac.w %a1l,%a7u,(%a3)&,%a3 + mac.w %a1l,%a7u,(%a3)&,%d2 + mac.w %a1l,%a7u,(%a3)&,%a7 + mac.w %a1l,%a7u,(%a2)+,%d1 + mac.w %a1l,%a7u,(%a2)+,%a3 + mac.w %a1l,%a7u,(%a2)+,%d2 + mac.w %a1l,%a7u,(%a2)+,%a7 + mac.w %a1l,%a7u,(%a2)+&,%d1 + mac.w %a1l,%a7u,(%a2)+&,%a3 + mac.w %a1l,%a7u,(%a2)+&,%d2 + mac.w %a1l,%a7u,(%a2)+&,%a7 + mac.w %a1l,%a7u,10(%a6),%d1 + mac.w %a1l,%a7u,10(%a6),%a3 + mac.w %a1l,%a7u,10(%a6),%d2 + mac.w %a1l,%a7u,10(%a6),%a7 + mac.w %a1l,%a7u,10(%a6)&,%d1 + mac.w %a1l,%a7u,10(%a6)&,%a3 + mac.w %a1l,%a7u,10(%a6)&,%d2 + mac.w %a1l,%a7u,10(%a6)&,%a7 + mac.w %a1l,%a7u,-(%a1),%d1 + mac.w %a1l,%a7u,-(%a1),%a3 + mac.w %a1l,%a7u,-(%a1),%d2 + mac.w %a1l,%a7u,-(%a1),%a7 + mac.w %a1l,%a7u,-(%a1)&,%d1 + mac.w %a1l,%a7u,-(%a1)&,%a3 + mac.w %a1l,%a7u,-(%a1)&,%d2 + mac.w %a1l,%a7u,-(%a1)&,%a7 + mac.w %a1l,%a7u,<<,(%a3),%d1 + mac.w %a1l,%a7u,<<,(%a3),%a3 + mac.w %a1l,%a7u,<<,(%a3),%d2 + mac.w %a1l,%a7u,<<,(%a3),%a7 + mac.w %a1l,%a7u,<<,(%a3)&,%d1 + mac.w %a1l,%a7u,<<,(%a3)&,%a3 + mac.w %a1l,%a7u,<<,(%a3)&,%d2 + mac.w %a1l,%a7u,<<,(%a3)&,%a7 + mac.w %a1l,%a7u,<<,(%a2)+,%d1 + mac.w %a1l,%a7u,<<,(%a2)+,%a3 + mac.w %a1l,%a7u,<<,(%a2)+,%d2 + mac.w %a1l,%a7u,<<,(%a2)+,%a7 + mac.w %a1l,%a7u,<<,(%a2)+&,%d1 + mac.w %a1l,%a7u,<<,(%a2)+&,%a3 + mac.w %a1l,%a7u,<<,(%a2)+&,%d2 + mac.w %a1l,%a7u,<<,(%a2)+&,%a7 + mac.w %a1l,%a7u,<<,10(%a6),%d1 + mac.w %a1l,%a7u,<<,10(%a6),%a3 + mac.w %a1l,%a7u,<<,10(%a6),%d2 + mac.w %a1l,%a7u,<<,10(%a6),%a7 + mac.w %a1l,%a7u,<<,10(%a6)&,%d1 + mac.w %a1l,%a7u,<<,10(%a6)&,%a3 + mac.w %a1l,%a7u,<<,10(%a6)&,%d2 + mac.w %a1l,%a7u,<<,10(%a6)&,%a7 + mac.w %a1l,%a7u,<<,-(%a1),%d1 + mac.w %a1l,%a7u,<<,-(%a1),%a3 + mac.w %a1l,%a7u,<<,-(%a1),%d2 + mac.w %a1l,%a7u,<<,-(%a1),%a7 + mac.w %a1l,%a7u,<<,-(%a1)&,%d1 + mac.w %a1l,%a7u,<<,-(%a1)&,%a3 + mac.w %a1l,%a7u,<<,-(%a1)&,%d2 + mac.w %a1l,%a7u,<<,-(%a1)&,%a7 + mac.w %a1l,%a7u,>>,(%a3),%d1 + mac.w %a1l,%a7u,>>,(%a3),%a3 + mac.w %a1l,%a7u,>>,(%a3),%d2 + mac.w %a1l,%a7u,>>,(%a3),%a7 + mac.w %a1l,%a7u,>>,(%a3)&,%d1 + mac.w %a1l,%a7u,>>,(%a3)&,%a3 + mac.w %a1l,%a7u,>>,(%a3)&,%d2 + mac.w %a1l,%a7u,>>,(%a3)&,%a7 + mac.w %a1l,%a7u,>>,(%a2)+,%d1 + mac.w %a1l,%a7u,>>,(%a2)+,%a3 + mac.w %a1l,%a7u,>>,(%a2)+,%d2 + mac.w %a1l,%a7u,>>,(%a2)+,%a7 + mac.w %a1l,%a7u,>>,(%a2)+&,%d1 + mac.w %a1l,%a7u,>>,(%a2)+&,%a3 + mac.w %a1l,%a7u,>>,(%a2)+&,%d2 + mac.w %a1l,%a7u,>>,(%a2)+&,%a7 + mac.w %a1l,%a7u,>>,10(%a6),%d1 + mac.w %a1l,%a7u,>>,10(%a6),%a3 + mac.w %a1l,%a7u,>>,10(%a6),%d2 + mac.w %a1l,%a7u,>>,10(%a6),%a7 + mac.w %a1l,%a7u,>>,10(%a6)&,%d1 + mac.w %a1l,%a7u,>>,10(%a6)&,%a3 + mac.w %a1l,%a7u,>>,10(%a6)&,%d2 + mac.w %a1l,%a7u,>>,10(%a6)&,%a7 + mac.w %a1l,%a7u,>>,-(%a1),%d1 + mac.w %a1l,%a7u,>>,-(%a1),%a3 + mac.w %a1l,%a7u,>>,-(%a1),%d2 + mac.w %a1l,%a7u,>>,-(%a1),%a7 + mac.w %a1l,%a7u,>>,-(%a1)&,%d1 + mac.w %a1l,%a7u,>>,-(%a1)&,%a3 + mac.w %a1l,%a7u,>>,-(%a1)&,%d2 + mac.w %a1l,%a7u,>>,-(%a1)&,%a7 + mac.w %a1l,%a7u,#1,(%a3),%d1 + mac.w %a1l,%a7u,#1,(%a3),%a3 + mac.w %a1l,%a7u,#1,(%a3),%d2 + mac.w %a1l,%a7u,#1,(%a3),%a7 + mac.w %a1l,%a7u,#1,(%a3)&,%d1 + mac.w %a1l,%a7u,#1,(%a3)&,%a3 + mac.w %a1l,%a7u,#1,(%a3)&,%d2 + mac.w %a1l,%a7u,#1,(%a3)&,%a7 + mac.w %a1l,%a7u,#1,(%a2)+,%d1 + mac.w %a1l,%a7u,#1,(%a2)+,%a3 + mac.w %a1l,%a7u,#1,(%a2)+,%d2 + mac.w %a1l,%a7u,#1,(%a2)+,%a7 + mac.w %a1l,%a7u,#1,(%a2)+&,%d1 + mac.w %a1l,%a7u,#1,(%a2)+&,%a3 + mac.w %a1l,%a7u,#1,(%a2)+&,%d2 + mac.w %a1l,%a7u,#1,(%a2)+&,%a7 + mac.w %a1l,%a7u,#1,10(%a6),%d1 + mac.w %a1l,%a7u,#1,10(%a6),%a3 + mac.w %a1l,%a7u,#1,10(%a6),%d2 + mac.w %a1l,%a7u,#1,10(%a6),%a7 + mac.w %a1l,%a7u,#1,10(%a6)&,%d1 + mac.w %a1l,%a7u,#1,10(%a6)&,%a3 + mac.w %a1l,%a7u,#1,10(%a6)&,%d2 + mac.w %a1l,%a7u,#1,10(%a6)&,%a7 + mac.w %a1l,%a7u,#1,-(%a1),%d1 + mac.w %a1l,%a7u,#1,-(%a1),%a3 + mac.w %a1l,%a7u,#1,-(%a1),%d2 + mac.w %a1l,%a7u,#1,-(%a1),%a7 + mac.w %a1l,%a7u,#1,-(%a1)&,%d1 + mac.w %a1l,%a7u,#1,-(%a1)&,%a3 + mac.w %a1l,%a7u,#1,-(%a1)&,%d2 + mac.w %a1l,%a7u,#1,-(%a1)&,%a7 + mac.w %a1l,%a7u,#-1,(%a3),%d1 + mac.w %a1l,%a7u,#-1,(%a3),%a3 + mac.w %a1l,%a7u,#-1,(%a3),%d2 + mac.w %a1l,%a7u,#-1,(%a3),%a7 + mac.w %a1l,%a7u,#-1,(%a3)&,%d1 + mac.w %a1l,%a7u,#-1,(%a3)&,%a3 + mac.w %a1l,%a7u,#-1,(%a3)&,%d2 + mac.w %a1l,%a7u,#-1,(%a3)&,%a7 + mac.w %a1l,%a7u,#-1,(%a2)+,%d1 + mac.w %a1l,%a7u,#-1,(%a2)+,%a3 + mac.w %a1l,%a7u,#-1,(%a2)+,%d2 + mac.w %a1l,%a7u,#-1,(%a2)+,%a7 + mac.w %a1l,%a7u,#-1,(%a2)+&,%d1 + mac.w %a1l,%a7u,#-1,(%a2)+&,%a3 + mac.w %a1l,%a7u,#-1,(%a2)+&,%d2 + mac.w %a1l,%a7u,#-1,(%a2)+&,%a7 + mac.w %a1l,%a7u,#-1,10(%a6),%d1 + mac.w %a1l,%a7u,#-1,10(%a6),%a3 + mac.w %a1l,%a7u,#-1,10(%a6),%d2 + mac.w %a1l,%a7u,#-1,10(%a6),%a7 + mac.w %a1l,%a7u,#-1,10(%a6)&,%d1 + mac.w %a1l,%a7u,#-1,10(%a6)&,%a3 + mac.w %a1l,%a7u,#-1,10(%a6)&,%d2 + mac.w %a1l,%a7u,#-1,10(%a6)&,%a7 + mac.w %a1l,%a7u,#-1,-(%a1),%d1 + mac.w %a1l,%a7u,#-1,-(%a1),%a3 + mac.w %a1l,%a7u,#-1,-(%a1),%d2 + mac.w %a1l,%a7u,#-1,-(%a1),%a7 + mac.w %a1l,%a7u,#-1,-(%a1)&,%d1 + mac.w %a1l,%a7u,#-1,-(%a1)&,%a3 + mac.w %a1l,%a7u,#-1,-(%a1)&,%d2 + mac.w %a1l,%a7u,#-1,-(%a1)&,%a7 + mac.w %a1l,%d1l,(%a3),%d1 + mac.w %a1l,%d1l,(%a3),%a3 + mac.w %a1l,%d1l,(%a3),%d2 + mac.w %a1l,%d1l,(%a3),%a7 + mac.w %a1l,%d1l,(%a3)&,%d1 + mac.w %a1l,%d1l,(%a3)&,%a3 + mac.w %a1l,%d1l,(%a3)&,%d2 + mac.w %a1l,%d1l,(%a3)&,%a7 + mac.w %a1l,%d1l,(%a2)+,%d1 + mac.w %a1l,%d1l,(%a2)+,%a3 + mac.w %a1l,%d1l,(%a2)+,%d2 + mac.w %a1l,%d1l,(%a2)+,%a7 + mac.w %a1l,%d1l,(%a2)+&,%d1 + mac.w %a1l,%d1l,(%a2)+&,%a3 + mac.w %a1l,%d1l,(%a2)+&,%d2 + mac.w %a1l,%d1l,(%a2)+&,%a7 + mac.w %a1l,%d1l,10(%a6),%d1 + mac.w %a1l,%d1l,10(%a6),%a3 + mac.w %a1l,%d1l,10(%a6),%d2 + mac.w %a1l,%d1l,10(%a6),%a7 + mac.w %a1l,%d1l,10(%a6)&,%d1 + mac.w %a1l,%d1l,10(%a6)&,%a3 + mac.w %a1l,%d1l,10(%a6)&,%d2 + mac.w %a1l,%d1l,10(%a6)&,%a7 + mac.w %a1l,%d1l,-(%a1),%d1 + mac.w %a1l,%d1l,-(%a1),%a3 + mac.w %a1l,%d1l,-(%a1),%d2 + mac.w %a1l,%d1l,-(%a1),%a7 + mac.w %a1l,%d1l,-(%a1)&,%d1 + mac.w %a1l,%d1l,-(%a1)&,%a3 + mac.w %a1l,%d1l,-(%a1)&,%d2 + mac.w %a1l,%d1l,-(%a1)&,%a7 + mac.w %a1l,%d1l,<<,(%a3),%d1 + mac.w %a1l,%d1l,<<,(%a3),%a3 + mac.w %a1l,%d1l,<<,(%a3),%d2 + mac.w %a1l,%d1l,<<,(%a3),%a7 + mac.w %a1l,%d1l,<<,(%a3)&,%d1 + mac.w %a1l,%d1l,<<,(%a3)&,%a3 + mac.w %a1l,%d1l,<<,(%a3)&,%d2 + mac.w %a1l,%d1l,<<,(%a3)&,%a7 + mac.w %a1l,%d1l,<<,(%a2)+,%d1 + mac.w %a1l,%d1l,<<,(%a2)+,%a3 + mac.w %a1l,%d1l,<<,(%a2)+,%d2 + mac.w %a1l,%d1l,<<,(%a2)+,%a7 + mac.w %a1l,%d1l,<<,(%a2)+&,%d1 + mac.w %a1l,%d1l,<<,(%a2)+&,%a3 + mac.w %a1l,%d1l,<<,(%a2)+&,%d2 + mac.w %a1l,%d1l,<<,(%a2)+&,%a7 + mac.w %a1l,%d1l,<<,10(%a6),%d1 + mac.w %a1l,%d1l,<<,10(%a6),%a3 + mac.w %a1l,%d1l,<<,10(%a6),%d2 + mac.w %a1l,%d1l,<<,10(%a6),%a7 + mac.w %a1l,%d1l,<<,10(%a6)&,%d1 + mac.w %a1l,%d1l,<<,10(%a6)&,%a3 + mac.w %a1l,%d1l,<<,10(%a6)&,%d2 + mac.w %a1l,%d1l,<<,10(%a6)&,%a7 + mac.w %a1l,%d1l,<<,-(%a1),%d1 + mac.w %a1l,%d1l,<<,-(%a1),%a3 + mac.w %a1l,%d1l,<<,-(%a1),%d2 + mac.w %a1l,%d1l,<<,-(%a1),%a7 + mac.w %a1l,%d1l,<<,-(%a1)&,%d1 + mac.w %a1l,%d1l,<<,-(%a1)&,%a3 + mac.w %a1l,%d1l,<<,-(%a1)&,%d2 + mac.w %a1l,%d1l,<<,-(%a1)&,%a7 + mac.w %a1l,%d1l,>>,(%a3),%d1 + mac.w %a1l,%d1l,>>,(%a3),%a3 + mac.w %a1l,%d1l,>>,(%a3),%d2 + mac.w %a1l,%d1l,>>,(%a3),%a7 + mac.w %a1l,%d1l,>>,(%a3)&,%d1 + mac.w %a1l,%d1l,>>,(%a3)&,%a3 + mac.w %a1l,%d1l,>>,(%a3)&,%d2 + mac.w %a1l,%d1l,>>,(%a3)&,%a7 + mac.w %a1l,%d1l,>>,(%a2)+,%d1 + mac.w %a1l,%d1l,>>,(%a2)+,%a3 + mac.w %a1l,%d1l,>>,(%a2)+,%d2 + mac.w %a1l,%d1l,>>,(%a2)+,%a7 + mac.w %a1l,%d1l,>>,(%a2)+&,%d1 + mac.w %a1l,%d1l,>>,(%a2)+&,%a3 + mac.w %a1l,%d1l,>>,(%a2)+&,%d2 + mac.w %a1l,%d1l,>>,(%a2)+&,%a7 + mac.w %a1l,%d1l,>>,10(%a6),%d1 + mac.w %a1l,%d1l,>>,10(%a6),%a3 + mac.w %a1l,%d1l,>>,10(%a6),%d2 + mac.w %a1l,%d1l,>>,10(%a6),%a7 + mac.w %a1l,%d1l,>>,10(%a6)&,%d1 + mac.w %a1l,%d1l,>>,10(%a6)&,%a3 + mac.w %a1l,%d1l,>>,10(%a6)&,%d2 + mac.w %a1l,%d1l,>>,10(%a6)&,%a7 + mac.w %a1l,%d1l,>>,-(%a1),%d1 + mac.w %a1l,%d1l,>>,-(%a1),%a3 + mac.w %a1l,%d1l,>>,-(%a1),%d2 + mac.w %a1l,%d1l,>>,-(%a1),%a7 + mac.w %a1l,%d1l,>>,-(%a1)&,%d1 + mac.w %a1l,%d1l,>>,-(%a1)&,%a3 + mac.w %a1l,%d1l,>>,-(%a1)&,%d2 + mac.w %a1l,%d1l,>>,-(%a1)&,%a7 + mac.w %a1l,%d1l,#1,(%a3),%d1 + mac.w %a1l,%d1l,#1,(%a3),%a3 + mac.w %a1l,%d1l,#1,(%a3),%d2 + mac.w %a1l,%d1l,#1,(%a3),%a7 + mac.w %a1l,%d1l,#1,(%a3)&,%d1 + mac.w %a1l,%d1l,#1,(%a3)&,%a3 + mac.w %a1l,%d1l,#1,(%a3)&,%d2 + mac.w %a1l,%d1l,#1,(%a3)&,%a7 + mac.w %a1l,%d1l,#1,(%a2)+,%d1 + mac.w %a1l,%d1l,#1,(%a2)+,%a3 + mac.w %a1l,%d1l,#1,(%a2)+,%d2 + mac.w %a1l,%d1l,#1,(%a2)+,%a7 + mac.w %a1l,%d1l,#1,(%a2)+&,%d1 + mac.w %a1l,%d1l,#1,(%a2)+&,%a3 + mac.w %a1l,%d1l,#1,(%a2)+&,%d2 + mac.w %a1l,%d1l,#1,(%a2)+&,%a7 + mac.w %a1l,%d1l,#1,10(%a6),%d1 + mac.w %a1l,%d1l,#1,10(%a6),%a3 + mac.w %a1l,%d1l,#1,10(%a6),%d2 + mac.w %a1l,%d1l,#1,10(%a6),%a7 + mac.w %a1l,%d1l,#1,10(%a6)&,%d1 + mac.w %a1l,%d1l,#1,10(%a6)&,%a3 + mac.w %a1l,%d1l,#1,10(%a6)&,%d2 + mac.w %a1l,%d1l,#1,10(%a6)&,%a7 + mac.w %a1l,%d1l,#1,-(%a1),%d1 + mac.w %a1l,%d1l,#1,-(%a1),%a3 + mac.w %a1l,%d1l,#1,-(%a1),%d2 + mac.w %a1l,%d1l,#1,-(%a1),%a7 + mac.w %a1l,%d1l,#1,-(%a1)&,%d1 + mac.w %a1l,%d1l,#1,-(%a1)&,%a3 + mac.w %a1l,%d1l,#1,-(%a1)&,%d2 + mac.w %a1l,%d1l,#1,-(%a1)&,%a7 + mac.w %a1l,%d1l,#-1,(%a3),%d1 + mac.w %a1l,%d1l,#-1,(%a3),%a3 + mac.w %a1l,%d1l,#-1,(%a3),%d2 + mac.w %a1l,%d1l,#-1,(%a3),%a7 + mac.w %a1l,%d1l,#-1,(%a3)&,%d1 + mac.w %a1l,%d1l,#-1,(%a3)&,%a3 + mac.w %a1l,%d1l,#-1,(%a3)&,%d2 + mac.w %a1l,%d1l,#-1,(%a3)&,%a7 + mac.w %a1l,%d1l,#-1,(%a2)+,%d1 + mac.w %a1l,%d1l,#-1,(%a2)+,%a3 + mac.w %a1l,%d1l,#-1,(%a2)+,%d2 + mac.w %a1l,%d1l,#-1,(%a2)+,%a7 + mac.w %a1l,%d1l,#-1,(%a2)+&,%d1 + mac.w %a1l,%d1l,#-1,(%a2)+&,%a3 + mac.w %a1l,%d1l,#-1,(%a2)+&,%d2 + mac.w %a1l,%d1l,#-1,(%a2)+&,%a7 + mac.w %a1l,%d1l,#-1,10(%a6),%d1 + mac.w %a1l,%d1l,#-1,10(%a6),%a3 + mac.w %a1l,%d1l,#-1,10(%a6),%d2 + mac.w %a1l,%d1l,#-1,10(%a6),%a7 + mac.w %a1l,%d1l,#-1,10(%a6)&,%d1 + mac.w %a1l,%d1l,#-1,10(%a6)&,%a3 + mac.w %a1l,%d1l,#-1,10(%a6)&,%d2 + mac.w %a1l,%d1l,#-1,10(%a6)&,%a7 + mac.w %a1l,%d1l,#-1,-(%a1),%d1 + mac.w %a1l,%d1l,#-1,-(%a1),%a3 + mac.w %a1l,%d1l,#-1,-(%a1),%d2 + mac.w %a1l,%d1l,#-1,-(%a1),%a7 + mac.w %a1l,%d1l,#-1,-(%a1)&,%d1 + mac.w %a1l,%d1l,#-1,-(%a1)&,%a3 + mac.w %a1l,%d1l,#-1,-(%a1)&,%d2 + mac.w %a1l,%d1l,#-1,-(%a1)&,%a7 + mac.w %d2u,%a2u,(%a3),%d1 + mac.w %d2u,%a2u,(%a3),%a3 + mac.w %d2u,%a2u,(%a3),%d2 + mac.w %d2u,%a2u,(%a3),%a7 + mac.w %d2u,%a2u,(%a3)&,%d1 + mac.w %d2u,%a2u,(%a3)&,%a3 + mac.w %d2u,%a2u,(%a3)&,%d2 + mac.w %d2u,%a2u,(%a3)&,%a7 + mac.w %d2u,%a2u,(%a2)+,%d1 + mac.w %d2u,%a2u,(%a2)+,%a3 + mac.w %d2u,%a2u,(%a2)+,%d2 + mac.w %d2u,%a2u,(%a2)+,%a7 + mac.w %d2u,%a2u,(%a2)+&,%d1 + mac.w %d2u,%a2u,(%a2)+&,%a3 + mac.w %d2u,%a2u,(%a2)+&,%d2 + mac.w %d2u,%a2u,(%a2)+&,%a7 + mac.w %d2u,%a2u,10(%a6),%d1 + mac.w %d2u,%a2u,10(%a6),%a3 + mac.w %d2u,%a2u,10(%a6),%d2 + mac.w %d2u,%a2u,10(%a6),%a7 + mac.w %d2u,%a2u,10(%a6)&,%d1 + mac.w %d2u,%a2u,10(%a6)&,%a3 + mac.w %d2u,%a2u,10(%a6)&,%d2 + mac.w %d2u,%a2u,10(%a6)&,%a7 + mac.w %d2u,%a2u,-(%a1),%d1 + mac.w %d2u,%a2u,-(%a1),%a3 + mac.w %d2u,%a2u,-(%a1),%d2 + mac.w %d2u,%a2u,-(%a1),%a7 + mac.w %d2u,%a2u,-(%a1)&,%d1 + mac.w %d2u,%a2u,-(%a1)&,%a3 + mac.w %d2u,%a2u,-(%a1)&,%d2 + mac.w %d2u,%a2u,-(%a1)&,%a7 + mac.w %d2u,%a2u,<<,(%a3),%d1 + mac.w %d2u,%a2u,<<,(%a3),%a3 + mac.w %d2u,%a2u,<<,(%a3),%d2 + mac.w %d2u,%a2u,<<,(%a3),%a7 + mac.w %d2u,%a2u,<<,(%a3)&,%d1 + mac.w %d2u,%a2u,<<,(%a3)&,%a3 + mac.w %d2u,%a2u,<<,(%a3)&,%d2 + mac.w %d2u,%a2u,<<,(%a3)&,%a7 + mac.w %d2u,%a2u,<<,(%a2)+,%d1 + mac.w %d2u,%a2u,<<,(%a2)+,%a3 + mac.w %d2u,%a2u,<<,(%a2)+,%d2 + mac.w %d2u,%a2u,<<,(%a2)+,%a7 + mac.w %d2u,%a2u,<<,(%a2)+&,%d1 + mac.w %d2u,%a2u,<<,(%a2)+&,%a3 + mac.w %d2u,%a2u,<<,(%a2)+&,%d2 + mac.w %d2u,%a2u,<<,(%a2)+&,%a7 + mac.w %d2u,%a2u,<<,10(%a6),%d1 + mac.w %d2u,%a2u,<<,10(%a6),%a3 + mac.w %d2u,%a2u,<<,10(%a6),%d2 + mac.w %d2u,%a2u,<<,10(%a6),%a7 + mac.w %d2u,%a2u,<<,10(%a6)&,%d1 + mac.w %d2u,%a2u,<<,10(%a6)&,%a3 + mac.w %d2u,%a2u,<<,10(%a6)&,%d2 + mac.w %d2u,%a2u,<<,10(%a6)&,%a7 + mac.w %d2u,%a2u,<<,-(%a1),%d1 + mac.w %d2u,%a2u,<<,-(%a1),%a3 + mac.w %d2u,%a2u,<<,-(%a1),%d2 + mac.w %d2u,%a2u,<<,-(%a1),%a7 + mac.w %d2u,%a2u,<<,-(%a1)&,%d1 + mac.w %d2u,%a2u,<<,-(%a1)&,%a3 + mac.w %d2u,%a2u,<<,-(%a1)&,%d2 + mac.w %d2u,%a2u,<<,-(%a1)&,%a7 + mac.w %d2u,%a2u,>>,(%a3),%d1 + mac.w %d2u,%a2u,>>,(%a3),%a3 + mac.w %d2u,%a2u,>>,(%a3),%d2 + mac.w %d2u,%a2u,>>,(%a3),%a7 + mac.w %d2u,%a2u,>>,(%a3)&,%d1 + mac.w %d2u,%a2u,>>,(%a3)&,%a3 + mac.w %d2u,%a2u,>>,(%a3)&,%d2 + mac.w %d2u,%a2u,>>,(%a3)&,%a7 + mac.w %d2u,%a2u,>>,(%a2)+,%d1 + mac.w %d2u,%a2u,>>,(%a2)+,%a3 + mac.w %d2u,%a2u,>>,(%a2)+,%d2 + mac.w %d2u,%a2u,>>,(%a2)+,%a7 + mac.w %d2u,%a2u,>>,(%a2)+&,%d1 + mac.w %d2u,%a2u,>>,(%a2)+&,%a3 + mac.w %d2u,%a2u,>>,(%a2)+&,%d2 + mac.w %d2u,%a2u,>>,(%a2)+&,%a7 + mac.w %d2u,%a2u,>>,10(%a6),%d1 + mac.w %d2u,%a2u,>>,10(%a6),%a3 + mac.w %d2u,%a2u,>>,10(%a6),%d2 + mac.w %d2u,%a2u,>>,10(%a6),%a7 + mac.w %d2u,%a2u,>>,10(%a6)&,%d1 + mac.w %d2u,%a2u,>>,10(%a6)&,%a3 + mac.w %d2u,%a2u,>>,10(%a6)&,%d2 + mac.w %d2u,%a2u,>>,10(%a6)&,%a7 + mac.w %d2u,%a2u,>>,-(%a1),%d1 + mac.w %d2u,%a2u,>>,-(%a1),%a3 + mac.w %d2u,%a2u,>>,-(%a1),%d2 + mac.w %d2u,%a2u,>>,-(%a1),%a7 + mac.w %d2u,%a2u,>>,-(%a1)&,%d1 + mac.w %d2u,%a2u,>>,-(%a1)&,%a3 + mac.w %d2u,%a2u,>>,-(%a1)&,%d2 + mac.w %d2u,%a2u,>>,-(%a1)&,%a7 + mac.w %d2u,%a2u,#1,(%a3),%d1 + mac.w %d2u,%a2u,#1,(%a3),%a3 + mac.w %d2u,%a2u,#1,(%a3),%d2 + mac.w %d2u,%a2u,#1,(%a3),%a7 + mac.w %d2u,%a2u,#1,(%a3)&,%d1 + mac.w %d2u,%a2u,#1,(%a3)&,%a3 + mac.w %d2u,%a2u,#1,(%a3)&,%d2 + mac.w %d2u,%a2u,#1,(%a3)&,%a7 + mac.w %d2u,%a2u,#1,(%a2)+,%d1 + mac.w %d2u,%a2u,#1,(%a2)+,%a3 + mac.w %d2u,%a2u,#1,(%a2)+,%d2 + mac.w %d2u,%a2u,#1,(%a2)+,%a7 + mac.w %d2u,%a2u,#1,(%a2)+&,%d1 + mac.w %d2u,%a2u,#1,(%a2)+&,%a3 + mac.w %d2u,%a2u,#1,(%a2)+&,%d2 + mac.w %d2u,%a2u,#1,(%a2)+&,%a7 + mac.w %d2u,%a2u,#1,10(%a6),%d1 + mac.w %d2u,%a2u,#1,10(%a6),%a3 + mac.w %d2u,%a2u,#1,10(%a6),%d2 + mac.w %d2u,%a2u,#1,10(%a6),%a7 + mac.w %d2u,%a2u,#1,10(%a6)&,%d1 + mac.w %d2u,%a2u,#1,10(%a6)&,%a3 + mac.w %d2u,%a2u,#1,10(%a6)&,%d2 + mac.w %d2u,%a2u,#1,10(%a6)&,%a7 + mac.w %d2u,%a2u,#1,-(%a1),%d1 + mac.w %d2u,%a2u,#1,-(%a1),%a3 + mac.w %d2u,%a2u,#1,-(%a1),%d2 + mac.w %d2u,%a2u,#1,-(%a1),%a7 + mac.w %d2u,%a2u,#1,-(%a1)&,%d1 + mac.w %d2u,%a2u,#1,-(%a1)&,%a3 + mac.w %d2u,%a2u,#1,-(%a1)&,%d2 + mac.w %d2u,%a2u,#1,-(%a1)&,%a7 + mac.w %d2u,%a2u,#-1,(%a3),%d1 + mac.w %d2u,%a2u,#-1,(%a3),%a3 + mac.w %d2u,%a2u,#-1,(%a3),%d2 + mac.w %d2u,%a2u,#-1,(%a3),%a7 + mac.w %d2u,%a2u,#-1,(%a3)&,%d1 + mac.w %d2u,%a2u,#-1,(%a3)&,%a3 + mac.w %d2u,%a2u,#-1,(%a3)&,%d2 + mac.w %d2u,%a2u,#-1,(%a3)&,%a7 + mac.w %d2u,%a2u,#-1,(%a2)+,%d1 + mac.w %d2u,%a2u,#-1,(%a2)+,%a3 + mac.w %d2u,%a2u,#-1,(%a2)+,%d2 + mac.w %d2u,%a2u,#-1,(%a2)+,%a7 + mac.w %d2u,%a2u,#-1,(%a2)+&,%d1 + mac.w %d2u,%a2u,#-1,(%a2)+&,%a3 + mac.w %d2u,%a2u,#-1,(%a2)+&,%d2 + mac.w %d2u,%a2u,#-1,(%a2)+&,%a7 + mac.w %d2u,%a2u,#-1,10(%a6),%d1 + mac.w %d2u,%a2u,#-1,10(%a6),%a3 + mac.w %d2u,%a2u,#-1,10(%a6),%d2 + mac.w %d2u,%a2u,#-1,10(%a6),%a7 + mac.w %d2u,%a2u,#-1,10(%a6)&,%d1 + mac.w %d2u,%a2u,#-1,10(%a6)&,%a3 + mac.w %d2u,%a2u,#-1,10(%a6)&,%d2 + mac.w %d2u,%a2u,#-1,10(%a6)&,%a7 + mac.w %d2u,%a2u,#-1,-(%a1),%d1 + mac.w %d2u,%a2u,#-1,-(%a1),%a3 + mac.w %d2u,%a2u,#-1,-(%a1),%d2 + mac.w %d2u,%a2u,#-1,-(%a1),%a7 + mac.w %d2u,%a2u,#-1,-(%a1)&,%d1 + mac.w %d2u,%a2u,#-1,-(%a1)&,%a3 + mac.w %d2u,%a2u,#-1,-(%a1)&,%d2 + mac.w %d2u,%a2u,#-1,-(%a1)&,%a7 + mac.w %d2u,%d3l,(%a3),%d1 + mac.w %d2u,%d3l,(%a3),%a3 + mac.w %d2u,%d3l,(%a3),%d2 + mac.w %d2u,%d3l,(%a3),%a7 + mac.w %d2u,%d3l,(%a3)&,%d1 + mac.w %d2u,%d3l,(%a3)&,%a3 + mac.w %d2u,%d3l,(%a3)&,%d2 + mac.w %d2u,%d3l,(%a3)&,%a7 + mac.w %d2u,%d3l,(%a2)+,%d1 + mac.w %d2u,%d3l,(%a2)+,%a3 + mac.w %d2u,%d3l,(%a2)+,%d2 + mac.w %d2u,%d3l,(%a2)+,%a7 + mac.w %d2u,%d3l,(%a2)+&,%d1 + mac.w %d2u,%d3l,(%a2)+&,%a3 + mac.w %d2u,%d3l,(%a2)+&,%d2 + mac.w %d2u,%d3l,(%a2)+&,%a7 + mac.w %d2u,%d3l,10(%a6),%d1 + mac.w %d2u,%d3l,10(%a6),%a3 + mac.w %d2u,%d3l,10(%a6),%d2 + mac.w %d2u,%d3l,10(%a6),%a7 + mac.w %d2u,%d3l,10(%a6)&,%d1 + mac.w %d2u,%d3l,10(%a6)&,%a3 + mac.w %d2u,%d3l,10(%a6)&,%d2 + mac.w %d2u,%d3l,10(%a6)&,%a7 + mac.w %d2u,%d3l,-(%a1),%d1 + mac.w %d2u,%d3l,-(%a1),%a3 + mac.w %d2u,%d3l,-(%a1),%d2 + mac.w %d2u,%d3l,-(%a1),%a7 + mac.w %d2u,%d3l,-(%a1)&,%d1 + mac.w %d2u,%d3l,-(%a1)&,%a3 + mac.w %d2u,%d3l,-(%a1)&,%d2 + mac.w %d2u,%d3l,-(%a1)&,%a7 + mac.w %d2u,%d3l,<<,(%a3),%d1 + mac.w %d2u,%d3l,<<,(%a3),%a3 + mac.w %d2u,%d3l,<<,(%a3),%d2 + mac.w %d2u,%d3l,<<,(%a3),%a7 + mac.w %d2u,%d3l,<<,(%a3)&,%d1 + mac.w %d2u,%d3l,<<,(%a3)&,%a3 + mac.w %d2u,%d3l,<<,(%a3)&,%d2 + mac.w %d2u,%d3l,<<,(%a3)&,%a7 + mac.w %d2u,%d3l,<<,(%a2)+,%d1 + mac.w %d2u,%d3l,<<,(%a2)+,%a3 + mac.w %d2u,%d3l,<<,(%a2)+,%d2 + mac.w %d2u,%d3l,<<,(%a2)+,%a7 + mac.w %d2u,%d3l,<<,(%a2)+&,%d1 + mac.w %d2u,%d3l,<<,(%a2)+&,%a3 + mac.w %d2u,%d3l,<<,(%a2)+&,%d2 + mac.w %d2u,%d3l,<<,(%a2)+&,%a7 + mac.w %d2u,%d3l,<<,10(%a6),%d1 + mac.w %d2u,%d3l,<<,10(%a6),%a3 + mac.w %d2u,%d3l,<<,10(%a6),%d2 + mac.w %d2u,%d3l,<<,10(%a6),%a7 + mac.w %d2u,%d3l,<<,10(%a6)&,%d1 + mac.w %d2u,%d3l,<<,10(%a6)&,%a3 + mac.w %d2u,%d3l,<<,10(%a6)&,%d2 + mac.w %d2u,%d3l,<<,10(%a6)&,%a7 + mac.w %d2u,%d3l,<<,-(%a1),%d1 + mac.w %d2u,%d3l,<<,-(%a1),%a3 + mac.w %d2u,%d3l,<<,-(%a1),%d2 + mac.w %d2u,%d3l,<<,-(%a1),%a7 + mac.w %d2u,%d3l,<<,-(%a1)&,%d1 + mac.w %d2u,%d3l,<<,-(%a1)&,%a3 + mac.w %d2u,%d3l,<<,-(%a1)&,%d2 + mac.w %d2u,%d3l,<<,-(%a1)&,%a7 + mac.w %d2u,%d3l,>>,(%a3),%d1 + mac.w %d2u,%d3l,>>,(%a3),%a3 + mac.w %d2u,%d3l,>>,(%a3),%d2 + mac.w %d2u,%d3l,>>,(%a3),%a7 + mac.w %d2u,%d3l,>>,(%a3)&,%d1 + mac.w %d2u,%d3l,>>,(%a3)&,%a3 + mac.w %d2u,%d3l,>>,(%a3)&,%d2 + mac.w %d2u,%d3l,>>,(%a3)&,%a7 + mac.w %d2u,%d3l,>>,(%a2)+,%d1 + mac.w %d2u,%d3l,>>,(%a2)+,%a3 + mac.w %d2u,%d3l,>>,(%a2)+,%d2 + mac.w %d2u,%d3l,>>,(%a2)+,%a7 + mac.w %d2u,%d3l,>>,(%a2)+&,%d1 + mac.w %d2u,%d3l,>>,(%a2)+&,%a3 + mac.w %d2u,%d3l,>>,(%a2)+&,%d2 + mac.w %d2u,%d3l,>>,(%a2)+&,%a7 + mac.w %d2u,%d3l,>>,10(%a6),%d1 + mac.w %d2u,%d3l,>>,10(%a6),%a3 + mac.w %d2u,%d3l,>>,10(%a6),%d2 + mac.w %d2u,%d3l,>>,10(%a6),%a7 + mac.w %d2u,%d3l,>>,10(%a6)&,%d1 + mac.w %d2u,%d3l,>>,10(%a6)&,%a3 + mac.w %d2u,%d3l,>>,10(%a6)&,%d2 + mac.w %d2u,%d3l,>>,10(%a6)&,%a7 + mac.w %d2u,%d3l,>>,-(%a1),%d1 + mac.w %d2u,%d3l,>>,-(%a1),%a3 + mac.w %d2u,%d3l,>>,-(%a1),%d2 + mac.w %d2u,%d3l,>>,-(%a1),%a7 + mac.w %d2u,%d3l,>>,-(%a1)&,%d1 + mac.w %d2u,%d3l,>>,-(%a1)&,%a3 + mac.w %d2u,%d3l,>>,-(%a1)&,%d2 + mac.w %d2u,%d3l,>>,-(%a1)&,%a7 + mac.w %d2u,%d3l,#1,(%a3),%d1 + mac.w %d2u,%d3l,#1,(%a3),%a3 + mac.w %d2u,%d3l,#1,(%a3),%d2 + mac.w %d2u,%d3l,#1,(%a3),%a7 + mac.w %d2u,%d3l,#1,(%a3)&,%d1 + mac.w %d2u,%d3l,#1,(%a3)&,%a3 + mac.w %d2u,%d3l,#1,(%a3)&,%d2 + mac.w %d2u,%d3l,#1,(%a3)&,%a7 + mac.w %d2u,%d3l,#1,(%a2)+,%d1 + mac.w %d2u,%d3l,#1,(%a2)+,%a3 + mac.w %d2u,%d3l,#1,(%a2)+,%d2 + mac.w %d2u,%d3l,#1,(%a2)+,%a7 + mac.w %d2u,%d3l,#1,(%a2)+&,%d1 + mac.w %d2u,%d3l,#1,(%a2)+&,%a3 + mac.w %d2u,%d3l,#1,(%a2)+&,%d2 + mac.w %d2u,%d3l,#1,(%a2)+&,%a7 + mac.w %d2u,%d3l,#1,10(%a6),%d1 + mac.w %d2u,%d3l,#1,10(%a6),%a3 + mac.w %d2u,%d3l,#1,10(%a6),%d2 + mac.w %d2u,%d3l,#1,10(%a6),%a7 + mac.w %d2u,%d3l,#1,10(%a6)&,%d1 + mac.w %d2u,%d3l,#1,10(%a6)&,%a3 + mac.w %d2u,%d3l,#1,10(%a6)&,%d2 + mac.w %d2u,%d3l,#1,10(%a6)&,%a7 + mac.w %d2u,%d3l,#1,-(%a1),%d1 + mac.w %d2u,%d3l,#1,-(%a1),%a3 + mac.w %d2u,%d3l,#1,-(%a1),%d2 + mac.w %d2u,%d3l,#1,-(%a1),%a7 + mac.w %d2u,%d3l,#1,-(%a1)&,%d1 + mac.w %d2u,%d3l,#1,-(%a1)&,%a3 + mac.w %d2u,%d3l,#1,-(%a1)&,%d2 + mac.w %d2u,%d3l,#1,-(%a1)&,%a7 + mac.w %d2u,%d3l,#-1,(%a3),%d1 + mac.w %d2u,%d3l,#-1,(%a3),%a3 + mac.w %d2u,%d3l,#-1,(%a3),%d2 + mac.w %d2u,%d3l,#-1,(%a3),%a7 + mac.w %d2u,%d3l,#-1,(%a3)&,%d1 + mac.w %d2u,%d3l,#-1,(%a3)&,%a3 + mac.w %d2u,%d3l,#-1,(%a3)&,%d2 + mac.w %d2u,%d3l,#-1,(%a3)&,%a7 + mac.w %d2u,%d3l,#-1,(%a2)+,%d1 + mac.w %d2u,%d3l,#-1,(%a2)+,%a3 + mac.w %d2u,%d3l,#-1,(%a2)+,%d2 + mac.w %d2u,%d3l,#-1,(%a2)+,%a7 + mac.w %d2u,%d3l,#-1,(%a2)+&,%d1 + mac.w %d2u,%d3l,#-1,(%a2)+&,%a3 + mac.w %d2u,%d3l,#-1,(%a2)+&,%d2 + mac.w %d2u,%d3l,#-1,(%a2)+&,%a7 + mac.w %d2u,%d3l,#-1,10(%a6),%d1 + mac.w %d2u,%d3l,#-1,10(%a6),%a3 + mac.w %d2u,%d3l,#-1,10(%a6),%d2 + mac.w %d2u,%d3l,#-1,10(%a6),%a7 + mac.w %d2u,%d3l,#-1,10(%a6)&,%d1 + mac.w %d2u,%d3l,#-1,10(%a6)&,%a3 + mac.w %d2u,%d3l,#-1,10(%a6)&,%d2 + mac.w %d2u,%d3l,#-1,10(%a6)&,%a7 + mac.w %d2u,%d3l,#-1,-(%a1),%d1 + mac.w %d2u,%d3l,#-1,-(%a1),%a3 + mac.w %d2u,%d3l,#-1,-(%a1),%d2 + mac.w %d2u,%d3l,#-1,-(%a1),%a7 + mac.w %d2u,%d3l,#-1,-(%a1)&,%d1 + mac.w %d2u,%d3l,#-1,-(%a1)&,%a3 + mac.w %d2u,%d3l,#-1,-(%a1)&,%d2 + mac.w %d2u,%d3l,#-1,-(%a1)&,%a7 + mac.w %d2u,%a7u,(%a3),%d1 + mac.w %d2u,%a7u,(%a3),%a3 + mac.w %d2u,%a7u,(%a3),%d2 + mac.w %d2u,%a7u,(%a3),%a7 + mac.w %d2u,%a7u,(%a3)&,%d1 + mac.w %d2u,%a7u,(%a3)&,%a3 + mac.w %d2u,%a7u,(%a3)&,%d2 + mac.w %d2u,%a7u,(%a3)&,%a7 + mac.w %d2u,%a7u,(%a2)+,%d1 + mac.w %d2u,%a7u,(%a2)+,%a3 + mac.w %d2u,%a7u,(%a2)+,%d2 + mac.w %d2u,%a7u,(%a2)+,%a7 + mac.w %d2u,%a7u,(%a2)+&,%d1 + mac.w %d2u,%a7u,(%a2)+&,%a3 + mac.w %d2u,%a7u,(%a2)+&,%d2 + mac.w %d2u,%a7u,(%a2)+&,%a7 + mac.w %d2u,%a7u,10(%a6),%d1 + mac.w %d2u,%a7u,10(%a6),%a3 + mac.w %d2u,%a7u,10(%a6),%d2 + mac.w %d2u,%a7u,10(%a6),%a7 + mac.w %d2u,%a7u,10(%a6)&,%d1 + mac.w %d2u,%a7u,10(%a6)&,%a3 + mac.w %d2u,%a7u,10(%a6)&,%d2 + mac.w %d2u,%a7u,10(%a6)&,%a7 + mac.w %d2u,%a7u,-(%a1),%d1 + mac.w %d2u,%a7u,-(%a1),%a3 + mac.w %d2u,%a7u,-(%a1),%d2 + mac.w %d2u,%a7u,-(%a1),%a7 + mac.w %d2u,%a7u,-(%a1)&,%d1 + mac.w %d2u,%a7u,-(%a1)&,%a3 + mac.w %d2u,%a7u,-(%a1)&,%d2 + mac.w %d2u,%a7u,-(%a1)&,%a7 + mac.w %d2u,%a7u,<<,(%a3),%d1 + mac.w %d2u,%a7u,<<,(%a3),%a3 + mac.w %d2u,%a7u,<<,(%a3),%d2 + mac.w %d2u,%a7u,<<,(%a3),%a7 + mac.w %d2u,%a7u,<<,(%a3)&,%d1 + mac.w %d2u,%a7u,<<,(%a3)&,%a3 + mac.w %d2u,%a7u,<<,(%a3)&,%d2 + mac.w %d2u,%a7u,<<,(%a3)&,%a7 + mac.w %d2u,%a7u,<<,(%a2)+,%d1 + mac.w %d2u,%a7u,<<,(%a2)+,%a3 + mac.w %d2u,%a7u,<<,(%a2)+,%d2 + mac.w %d2u,%a7u,<<,(%a2)+,%a7 + mac.w %d2u,%a7u,<<,(%a2)+&,%d1 + mac.w %d2u,%a7u,<<,(%a2)+&,%a3 + mac.w %d2u,%a7u,<<,(%a2)+&,%d2 + mac.w %d2u,%a7u,<<,(%a2)+&,%a7 + mac.w %d2u,%a7u,<<,10(%a6),%d1 + mac.w %d2u,%a7u,<<,10(%a6),%a3 + mac.w %d2u,%a7u,<<,10(%a6),%d2 + mac.w %d2u,%a7u,<<,10(%a6),%a7 + mac.w %d2u,%a7u,<<,10(%a6)&,%d1 + mac.w %d2u,%a7u,<<,10(%a6)&,%a3 + mac.w %d2u,%a7u,<<,10(%a6)&,%d2 + mac.w %d2u,%a7u,<<,10(%a6)&,%a7 + mac.w %d2u,%a7u,<<,-(%a1),%d1 + mac.w %d2u,%a7u,<<,-(%a1),%a3 + mac.w %d2u,%a7u,<<,-(%a1),%d2 + mac.w %d2u,%a7u,<<,-(%a1),%a7 + mac.w %d2u,%a7u,<<,-(%a1)&,%d1 + mac.w %d2u,%a7u,<<,-(%a1)&,%a3 + mac.w %d2u,%a7u,<<,-(%a1)&,%d2 + mac.w %d2u,%a7u,<<,-(%a1)&,%a7 + mac.w %d2u,%a7u,>>,(%a3),%d1 + mac.w %d2u,%a7u,>>,(%a3),%a3 + mac.w %d2u,%a7u,>>,(%a3),%d2 + mac.w %d2u,%a7u,>>,(%a3),%a7 + mac.w %d2u,%a7u,>>,(%a3)&,%d1 + mac.w %d2u,%a7u,>>,(%a3)&,%a3 + mac.w %d2u,%a7u,>>,(%a3)&,%d2 + mac.w %d2u,%a7u,>>,(%a3)&,%a7 + mac.w %d2u,%a7u,>>,(%a2)+,%d1 + mac.w %d2u,%a7u,>>,(%a2)+,%a3 + mac.w %d2u,%a7u,>>,(%a2)+,%d2 + mac.w %d2u,%a7u,>>,(%a2)+,%a7 + mac.w %d2u,%a7u,>>,(%a2)+&,%d1 + mac.w %d2u,%a7u,>>,(%a2)+&,%a3 + mac.w %d2u,%a7u,>>,(%a2)+&,%d2 + mac.w %d2u,%a7u,>>,(%a2)+&,%a7 + mac.w %d2u,%a7u,>>,10(%a6),%d1 + mac.w %d2u,%a7u,>>,10(%a6),%a3 + mac.w %d2u,%a7u,>>,10(%a6),%d2 + mac.w %d2u,%a7u,>>,10(%a6),%a7 + mac.w %d2u,%a7u,>>,10(%a6)&,%d1 + mac.w %d2u,%a7u,>>,10(%a6)&,%a3 + mac.w %d2u,%a7u,>>,10(%a6)&,%d2 + mac.w %d2u,%a7u,>>,10(%a6)&,%a7 + mac.w %d2u,%a7u,>>,-(%a1),%d1 + mac.w %d2u,%a7u,>>,-(%a1),%a3 + mac.w %d2u,%a7u,>>,-(%a1),%d2 + mac.w %d2u,%a7u,>>,-(%a1),%a7 + mac.w %d2u,%a7u,>>,-(%a1)&,%d1 + mac.w %d2u,%a7u,>>,-(%a1)&,%a3 + mac.w %d2u,%a7u,>>,-(%a1)&,%d2 + mac.w %d2u,%a7u,>>,-(%a1)&,%a7 + mac.w %d2u,%a7u,#1,(%a3),%d1 + mac.w %d2u,%a7u,#1,(%a3),%a3 + mac.w %d2u,%a7u,#1,(%a3),%d2 + mac.w %d2u,%a7u,#1,(%a3),%a7 + mac.w %d2u,%a7u,#1,(%a3)&,%d1 + mac.w %d2u,%a7u,#1,(%a3)&,%a3 + mac.w %d2u,%a7u,#1,(%a3)&,%d2 + mac.w %d2u,%a7u,#1,(%a3)&,%a7 + mac.w %d2u,%a7u,#1,(%a2)+,%d1 + mac.w %d2u,%a7u,#1,(%a2)+,%a3 + mac.w %d2u,%a7u,#1,(%a2)+,%d2 + mac.w %d2u,%a7u,#1,(%a2)+,%a7 + mac.w %d2u,%a7u,#1,(%a2)+&,%d1 + mac.w %d2u,%a7u,#1,(%a2)+&,%a3 + mac.w %d2u,%a7u,#1,(%a2)+&,%d2 + mac.w %d2u,%a7u,#1,(%a2)+&,%a7 + mac.w %d2u,%a7u,#1,10(%a6),%d1 + mac.w %d2u,%a7u,#1,10(%a6),%a3 + mac.w %d2u,%a7u,#1,10(%a6),%d2 + mac.w %d2u,%a7u,#1,10(%a6),%a7 + mac.w %d2u,%a7u,#1,10(%a6)&,%d1 + mac.w %d2u,%a7u,#1,10(%a6)&,%a3 + mac.w %d2u,%a7u,#1,10(%a6)&,%d2 + mac.w %d2u,%a7u,#1,10(%a6)&,%a7 + mac.w %d2u,%a7u,#1,-(%a1),%d1 + mac.w %d2u,%a7u,#1,-(%a1),%a3 + mac.w %d2u,%a7u,#1,-(%a1),%d2 + mac.w %d2u,%a7u,#1,-(%a1),%a7 + mac.w %d2u,%a7u,#1,-(%a1)&,%d1 + mac.w %d2u,%a7u,#1,-(%a1)&,%a3 + mac.w %d2u,%a7u,#1,-(%a1)&,%d2 + mac.w %d2u,%a7u,#1,-(%a1)&,%a7 + mac.w %d2u,%a7u,#-1,(%a3),%d1 + mac.w %d2u,%a7u,#-1,(%a3),%a3 + mac.w %d2u,%a7u,#-1,(%a3),%d2 + mac.w %d2u,%a7u,#-1,(%a3),%a7 + mac.w %d2u,%a7u,#-1,(%a3)&,%d1 + mac.w %d2u,%a7u,#-1,(%a3)&,%a3 + mac.w %d2u,%a7u,#-1,(%a3)&,%d2 + mac.w %d2u,%a7u,#-1,(%a3)&,%a7 + mac.w %d2u,%a7u,#-1,(%a2)+,%d1 + mac.w %d2u,%a7u,#-1,(%a2)+,%a3 + mac.w %d2u,%a7u,#-1,(%a2)+,%d2 + mac.w %d2u,%a7u,#-1,(%a2)+,%a7 + mac.w %d2u,%a7u,#-1,(%a2)+&,%d1 + mac.w %d2u,%a7u,#-1,(%a2)+&,%a3 + mac.w %d2u,%a7u,#-1,(%a2)+&,%d2 + mac.w %d2u,%a7u,#-1,(%a2)+&,%a7 + mac.w %d2u,%a7u,#-1,10(%a6),%d1 + mac.w %d2u,%a7u,#-1,10(%a6),%a3 + mac.w %d2u,%a7u,#-1,10(%a6),%d2 + mac.w %d2u,%a7u,#-1,10(%a6),%a7 + mac.w %d2u,%a7u,#-1,10(%a6)&,%d1 + mac.w %d2u,%a7u,#-1,10(%a6)&,%a3 + mac.w %d2u,%a7u,#-1,10(%a6)&,%d2 + mac.w %d2u,%a7u,#-1,10(%a6)&,%a7 + mac.w %d2u,%a7u,#-1,-(%a1),%d1 + mac.w %d2u,%a7u,#-1,-(%a1),%a3 + mac.w %d2u,%a7u,#-1,-(%a1),%d2 + mac.w %d2u,%a7u,#-1,-(%a1),%a7 + mac.w %d2u,%a7u,#-1,-(%a1)&,%d1 + mac.w %d2u,%a7u,#-1,-(%a1)&,%a3 + mac.w %d2u,%a7u,#-1,-(%a1)&,%d2 + mac.w %d2u,%a7u,#-1,-(%a1)&,%a7 + mac.w %d2u,%d1l,(%a3),%d1 + mac.w %d2u,%d1l,(%a3),%a3 + mac.w %d2u,%d1l,(%a3),%d2 + mac.w %d2u,%d1l,(%a3),%a7 + mac.w %d2u,%d1l,(%a3)&,%d1 + mac.w %d2u,%d1l,(%a3)&,%a3 + mac.w %d2u,%d1l,(%a3)&,%d2 + mac.w %d2u,%d1l,(%a3)&,%a7 + mac.w %d2u,%d1l,(%a2)+,%d1 + mac.w %d2u,%d1l,(%a2)+,%a3 + mac.w %d2u,%d1l,(%a2)+,%d2 + mac.w %d2u,%d1l,(%a2)+,%a7 + mac.w %d2u,%d1l,(%a2)+&,%d1 + mac.w %d2u,%d1l,(%a2)+&,%a3 + mac.w %d2u,%d1l,(%a2)+&,%d2 + mac.w %d2u,%d1l,(%a2)+&,%a7 + mac.w %d2u,%d1l,10(%a6),%d1 + mac.w %d2u,%d1l,10(%a6),%a3 + mac.w %d2u,%d1l,10(%a6),%d2 + mac.w %d2u,%d1l,10(%a6),%a7 + mac.w %d2u,%d1l,10(%a6)&,%d1 + mac.w %d2u,%d1l,10(%a6)&,%a3 + mac.w %d2u,%d1l,10(%a6)&,%d2 + mac.w %d2u,%d1l,10(%a6)&,%a7 + mac.w %d2u,%d1l,-(%a1),%d1 + mac.w %d2u,%d1l,-(%a1),%a3 + mac.w %d2u,%d1l,-(%a1),%d2 + mac.w %d2u,%d1l,-(%a1),%a7 + mac.w %d2u,%d1l,-(%a1)&,%d1 + mac.w %d2u,%d1l,-(%a1)&,%a3 + mac.w %d2u,%d1l,-(%a1)&,%d2 + mac.w %d2u,%d1l,-(%a1)&,%a7 + mac.w %d2u,%d1l,<<,(%a3),%d1 + mac.w %d2u,%d1l,<<,(%a3),%a3 + mac.w %d2u,%d1l,<<,(%a3),%d2 + mac.w %d2u,%d1l,<<,(%a3),%a7 + mac.w %d2u,%d1l,<<,(%a3)&,%d1 + mac.w %d2u,%d1l,<<,(%a3)&,%a3 + mac.w %d2u,%d1l,<<,(%a3)&,%d2 + mac.w %d2u,%d1l,<<,(%a3)&,%a7 + mac.w %d2u,%d1l,<<,(%a2)+,%d1 + mac.w %d2u,%d1l,<<,(%a2)+,%a3 + mac.w %d2u,%d1l,<<,(%a2)+,%d2 + mac.w %d2u,%d1l,<<,(%a2)+,%a7 + mac.w %d2u,%d1l,<<,(%a2)+&,%d1 + mac.w %d2u,%d1l,<<,(%a2)+&,%a3 + mac.w %d2u,%d1l,<<,(%a2)+&,%d2 + mac.w %d2u,%d1l,<<,(%a2)+&,%a7 + mac.w %d2u,%d1l,<<,10(%a6),%d1 + mac.w %d2u,%d1l,<<,10(%a6),%a3 + mac.w %d2u,%d1l,<<,10(%a6),%d2 + mac.w %d2u,%d1l,<<,10(%a6),%a7 + mac.w %d2u,%d1l,<<,10(%a6)&,%d1 + mac.w %d2u,%d1l,<<,10(%a6)&,%a3 + mac.w %d2u,%d1l,<<,10(%a6)&,%d2 + mac.w %d2u,%d1l,<<,10(%a6)&,%a7 + mac.w %d2u,%d1l,<<,-(%a1),%d1 + mac.w %d2u,%d1l,<<,-(%a1),%a3 + mac.w %d2u,%d1l,<<,-(%a1),%d2 + mac.w %d2u,%d1l,<<,-(%a1),%a7 + mac.w %d2u,%d1l,<<,-(%a1)&,%d1 + mac.w %d2u,%d1l,<<,-(%a1)&,%a3 + mac.w %d2u,%d1l,<<,-(%a1)&,%d2 + mac.w %d2u,%d1l,<<,-(%a1)&,%a7 + mac.w %d2u,%d1l,>>,(%a3),%d1 + mac.w %d2u,%d1l,>>,(%a3),%a3 + mac.w %d2u,%d1l,>>,(%a3),%d2 + mac.w %d2u,%d1l,>>,(%a3),%a7 + mac.w %d2u,%d1l,>>,(%a3)&,%d1 + mac.w %d2u,%d1l,>>,(%a3)&,%a3 + mac.w %d2u,%d1l,>>,(%a3)&,%d2 + mac.w %d2u,%d1l,>>,(%a3)&,%a7 + mac.w %d2u,%d1l,>>,(%a2)+,%d1 + mac.w %d2u,%d1l,>>,(%a2)+,%a3 + mac.w %d2u,%d1l,>>,(%a2)+,%d2 + mac.w %d2u,%d1l,>>,(%a2)+,%a7 + mac.w %d2u,%d1l,>>,(%a2)+&,%d1 + mac.w %d2u,%d1l,>>,(%a2)+&,%a3 + mac.w %d2u,%d1l,>>,(%a2)+&,%d2 + mac.w %d2u,%d1l,>>,(%a2)+&,%a7 + mac.w %d2u,%d1l,>>,10(%a6),%d1 + mac.w %d2u,%d1l,>>,10(%a6),%a3 + mac.w %d2u,%d1l,>>,10(%a6),%d2 + mac.w %d2u,%d1l,>>,10(%a6),%a7 + mac.w %d2u,%d1l,>>,10(%a6)&,%d1 + mac.w %d2u,%d1l,>>,10(%a6)&,%a3 + mac.w %d2u,%d1l,>>,10(%a6)&,%d2 + mac.w %d2u,%d1l,>>,10(%a6)&,%a7 + mac.w %d2u,%d1l,>>,-(%a1),%d1 + mac.w %d2u,%d1l,>>,-(%a1),%a3 + mac.w %d2u,%d1l,>>,-(%a1),%d2 + mac.w %d2u,%d1l,>>,-(%a1),%a7 + mac.w %d2u,%d1l,>>,-(%a1)&,%d1 + mac.w %d2u,%d1l,>>,-(%a1)&,%a3 + mac.w %d2u,%d1l,>>,-(%a1)&,%d2 + mac.w %d2u,%d1l,>>,-(%a1)&,%a7 + mac.w %d2u,%d1l,#1,(%a3),%d1 + mac.w %d2u,%d1l,#1,(%a3),%a3 + mac.w %d2u,%d1l,#1,(%a3),%d2 + mac.w %d2u,%d1l,#1,(%a3),%a7 + mac.w %d2u,%d1l,#1,(%a3)&,%d1 + mac.w %d2u,%d1l,#1,(%a3)&,%a3 + mac.w %d2u,%d1l,#1,(%a3)&,%d2 + mac.w %d2u,%d1l,#1,(%a3)&,%a7 + mac.w %d2u,%d1l,#1,(%a2)+,%d1 + mac.w %d2u,%d1l,#1,(%a2)+,%a3 + mac.w %d2u,%d1l,#1,(%a2)+,%d2 + mac.w %d2u,%d1l,#1,(%a2)+,%a7 + mac.w %d2u,%d1l,#1,(%a2)+&,%d1 + mac.w %d2u,%d1l,#1,(%a2)+&,%a3 + mac.w %d2u,%d1l,#1,(%a2)+&,%d2 + mac.w %d2u,%d1l,#1,(%a2)+&,%a7 + mac.w %d2u,%d1l,#1,10(%a6),%d1 + mac.w %d2u,%d1l,#1,10(%a6),%a3 + mac.w %d2u,%d1l,#1,10(%a6),%d2 + mac.w %d2u,%d1l,#1,10(%a6),%a7 + mac.w %d2u,%d1l,#1,10(%a6)&,%d1 + mac.w %d2u,%d1l,#1,10(%a6)&,%a3 + mac.w %d2u,%d1l,#1,10(%a6)&,%d2 + mac.w %d2u,%d1l,#1,10(%a6)&,%a7 + mac.w %d2u,%d1l,#1,-(%a1),%d1 + mac.w %d2u,%d1l,#1,-(%a1),%a3 + mac.w %d2u,%d1l,#1,-(%a1),%d2 + mac.w %d2u,%d1l,#1,-(%a1),%a7 + mac.w %d2u,%d1l,#1,-(%a1)&,%d1 + mac.w %d2u,%d1l,#1,-(%a1)&,%a3 + mac.w %d2u,%d1l,#1,-(%a1)&,%d2 + mac.w %d2u,%d1l,#1,-(%a1)&,%a7 + mac.w %d2u,%d1l,#-1,(%a3),%d1 + mac.w %d2u,%d1l,#-1,(%a3),%a3 + mac.w %d2u,%d1l,#-1,(%a3),%d2 + mac.w %d2u,%d1l,#-1,(%a3),%a7 + mac.w %d2u,%d1l,#-1,(%a3)&,%d1 + mac.w %d2u,%d1l,#-1,(%a3)&,%a3 + mac.w %d2u,%d1l,#-1,(%a3)&,%d2 + mac.w %d2u,%d1l,#-1,(%a3)&,%a7 + mac.w %d2u,%d1l,#-1,(%a2)+,%d1 + mac.w %d2u,%d1l,#-1,(%a2)+,%a3 + mac.w %d2u,%d1l,#-1,(%a2)+,%d2 + mac.w %d2u,%d1l,#-1,(%a2)+,%a7 + mac.w %d2u,%d1l,#-1,(%a2)+&,%d1 + mac.w %d2u,%d1l,#-1,(%a2)+&,%a3 + mac.w %d2u,%d1l,#-1,(%a2)+&,%d2 + mac.w %d2u,%d1l,#-1,(%a2)+&,%a7 + mac.w %d2u,%d1l,#-1,10(%a6),%d1 + mac.w %d2u,%d1l,#-1,10(%a6),%a3 + mac.w %d2u,%d1l,#-1,10(%a6),%d2 + mac.w %d2u,%d1l,#-1,10(%a6),%a7 + mac.w %d2u,%d1l,#-1,10(%a6)&,%d1 + mac.w %d2u,%d1l,#-1,10(%a6)&,%a3 + mac.w %d2u,%d1l,#-1,10(%a6)&,%d2 + mac.w %d2u,%d1l,#-1,10(%a6)&,%a7 + mac.w %d2u,%d1l,#-1,-(%a1),%d1 + mac.w %d2u,%d1l,#-1,-(%a1),%a3 + mac.w %d2u,%d1l,#-1,-(%a1),%d2 + mac.w %d2u,%d1l,#-1,-(%a1),%a7 + mac.w %d2u,%d1l,#-1,-(%a1)&,%d1 + mac.w %d2u,%d1l,#-1,-(%a1)&,%a3 + mac.w %d2u,%d1l,#-1,-(%a1)&,%d2 + mac.w %d2u,%d1l,#-1,-(%a1)&,%a7 + mac.w %a5l,%a2u,(%a3),%d1 + mac.w %a5l,%a2u,(%a3),%a3 + mac.w %a5l,%a2u,(%a3),%d2 + mac.w %a5l,%a2u,(%a3),%a7 + mac.w %a5l,%a2u,(%a3)&,%d1 + mac.w %a5l,%a2u,(%a3)&,%a3 + mac.w %a5l,%a2u,(%a3)&,%d2 + mac.w %a5l,%a2u,(%a3)&,%a7 + mac.w %a5l,%a2u,(%a2)+,%d1 + mac.w %a5l,%a2u,(%a2)+,%a3 + mac.w %a5l,%a2u,(%a2)+,%d2 + mac.w %a5l,%a2u,(%a2)+,%a7 + mac.w %a5l,%a2u,(%a2)+&,%d1 + mac.w %a5l,%a2u,(%a2)+&,%a3 + mac.w %a5l,%a2u,(%a2)+&,%d2 + mac.w %a5l,%a2u,(%a2)+&,%a7 + mac.w %a5l,%a2u,10(%a6),%d1 + mac.w %a5l,%a2u,10(%a6),%a3 + mac.w %a5l,%a2u,10(%a6),%d2 + mac.w %a5l,%a2u,10(%a6),%a7 + mac.w %a5l,%a2u,10(%a6)&,%d1 + mac.w %a5l,%a2u,10(%a6)&,%a3 + mac.w %a5l,%a2u,10(%a6)&,%d2 + mac.w %a5l,%a2u,10(%a6)&,%a7 + mac.w %a5l,%a2u,-(%a1),%d1 + mac.w %a5l,%a2u,-(%a1),%a3 + mac.w %a5l,%a2u,-(%a1),%d2 + mac.w %a5l,%a2u,-(%a1),%a7 + mac.w %a5l,%a2u,-(%a1)&,%d1 + mac.w %a5l,%a2u,-(%a1)&,%a3 + mac.w %a5l,%a2u,-(%a1)&,%d2 + mac.w %a5l,%a2u,-(%a1)&,%a7 + mac.w %a5l,%a2u,<<,(%a3),%d1 + mac.w %a5l,%a2u,<<,(%a3),%a3 + mac.w %a5l,%a2u,<<,(%a3),%d2 + mac.w %a5l,%a2u,<<,(%a3),%a7 + mac.w %a5l,%a2u,<<,(%a3)&,%d1 + mac.w %a5l,%a2u,<<,(%a3)&,%a3 + mac.w %a5l,%a2u,<<,(%a3)&,%d2 + mac.w %a5l,%a2u,<<,(%a3)&,%a7 + mac.w %a5l,%a2u,<<,(%a2)+,%d1 + mac.w %a5l,%a2u,<<,(%a2)+,%a3 + mac.w %a5l,%a2u,<<,(%a2)+,%d2 + mac.w %a5l,%a2u,<<,(%a2)+,%a7 + mac.w %a5l,%a2u,<<,(%a2)+&,%d1 + mac.w %a5l,%a2u,<<,(%a2)+&,%a3 + mac.w %a5l,%a2u,<<,(%a2)+&,%d2 + mac.w %a5l,%a2u,<<,(%a2)+&,%a7 + mac.w %a5l,%a2u,<<,10(%a6),%d1 + mac.w %a5l,%a2u,<<,10(%a6),%a3 + mac.w %a5l,%a2u,<<,10(%a6),%d2 + mac.w %a5l,%a2u,<<,10(%a6),%a7 + mac.w %a5l,%a2u,<<,10(%a6)&,%d1 + mac.w %a5l,%a2u,<<,10(%a6)&,%a3 + mac.w %a5l,%a2u,<<,10(%a6)&,%d2 + mac.w %a5l,%a2u,<<,10(%a6)&,%a7 + mac.w %a5l,%a2u,<<,-(%a1),%d1 + mac.w %a5l,%a2u,<<,-(%a1),%a3 + mac.w %a5l,%a2u,<<,-(%a1),%d2 + mac.w %a5l,%a2u,<<,-(%a1),%a7 + mac.w %a5l,%a2u,<<,-(%a1)&,%d1 + mac.w %a5l,%a2u,<<,-(%a1)&,%a3 + mac.w %a5l,%a2u,<<,-(%a1)&,%d2 + mac.w %a5l,%a2u,<<,-(%a1)&,%a7 + mac.w %a5l,%a2u,>>,(%a3),%d1 + mac.w %a5l,%a2u,>>,(%a3),%a3 + mac.w %a5l,%a2u,>>,(%a3),%d2 + mac.w %a5l,%a2u,>>,(%a3),%a7 + mac.w %a5l,%a2u,>>,(%a3)&,%d1 + mac.w %a5l,%a2u,>>,(%a3)&,%a3 + mac.w %a5l,%a2u,>>,(%a3)&,%d2 + mac.w %a5l,%a2u,>>,(%a3)&,%a7 + mac.w %a5l,%a2u,>>,(%a2)+,%d1 + mac.w %a5l,%a2u,>>,(%a2)+,%a3 + mac.w %a5l,%a2u,>>,(%a2)+,%d2 + mac.w %a5l,%a2u,>>,(%a2)+,%a7 + mac.w %a5l,%a2u,>>,(%a2)+&,%d1 + mac.w %a5l,%a2u,>>,(%a2)+&,%a3 + mac.w %a5l,%a2u,>>,(%a2)+&,%d2 + mac.w %a5l,%a2u,>>,(%a2)+&,%a7 + mac.w %a5l,%a2u,>>,10(%a6),%d1 + mac.w %a5l,%a2u,>>,10(%a6),%a3 + mac.w %a5l,%a2u,>>,10(%a6),%d2 + mac.w %a5l,%a2u,>>,10(%a6),%a7 + mac.w %a5l,%a2u,>>,10(%a6)&,%d1 + mac.w %a5l,%a2u,>>,10(%a6)&,%a3 + mac.w %a5l,%a2u,>>,10(%a6)&,%d2 + mac.w %a5l,%a2u,>>,10(%a6)&,%a7 + mac.w %a5l,%a2u,>>,-(%a1),%d1 + mac.w %a5l,%a2u,>>,-(%a1),%a3 + mac.w %a5l,%a2u,>>,-(%a1),%d2 + mac.w %a5l,%a2u,>>,-(%a1),%a7 + mac.w %a5l,%a2u,>>,-(%a1)&,%d1 + mac.w %a5l,%a2u,>>,-(%a1)&,%a3 + mac.w %a5l,%a2u,>>,-(%a1)&,%d2 + mac.w %a5l,%a2u,>>,-(%a1)&,%a7 + mac.w %a5l,%a2u,#1,(%a3),%d1 + mac.w %a5l,%a2u,#1,(%a3),%a3 + mac.w %a5l,%a2u,#1,(%a3),%d2 + mac.w %a5l,%a2u,#1,(%a3),%a7 + mac.w %a5l,%a2u,#1,(%a3)&,%d1 + mac.w %a5l,%a2u,#1,(%a3)&,%a3 + mac.w %a5l,%a2u,#1,(%a3)&,%d2 + mac.w %a5l,%a2u,#1,(%a3)&,%a7 + mac.w %a5l,%a2u,#1,(%a2)+,%d1 + mac.w %a5l,%a2u,#1,(%a2)+,%a3 + mac.w %a5l,%a2u,#1,(%a2)+,%d2 + mac.w %a5l,%a2u,#1,(%a2)+,%a7 + mac.w %a5l,%a2u,#1,(%a2)+&,%d1 + mac.w %a5l,%a2u,#1,(%a2)+&,%a3 + mac.w %a5l,%a2u,#1,(%a2)+&,%d2 + mac.w %a5l,%a2u,#1,(%a2)+&,%a7 + mac.w %a5l,%a2u,#1,10(%a6),%d1 + mac.w %a5l,%a2u,#1,10(%a6),%a3 + mac.w %a5l,%a2u,#1,10(%a6),%d2 + mac.w %a5l,%a2u,#1,10(%a6),%a7 + mac.w %a5l,%a2u,#1,10(%a6)&,%d1 + mac.w %a5l,%a2u,#1,10(%a6)&,%a3 + mac.w %a5l,%a2u,#1,10(%a6)&,%d2 + mac.w %a5l,%a2u,#1,10(%a6)&,%a7 + mac.w %a5l,%a2u,#1,-(%a1),%d1 + mac.w %a5l,%a2u,#1,-(%a1),%a3 + mac.w %a5l,%a2u,#1,-(%a1),%d2 + mac.w %a5l,%a2u,#1,-(%a1),%a7 + mac.w %a5l,%a2u,#1,-(%a1)&,%d1 + mac.w %a5l,%a2u,#1,-(%a1)&,%a3 + mac.w %a5l,%a2u,#1,-(%a1)&,%d2 + mac.w %a5l,%a2u,#1,-(%a1)&,%a7 + mac.w %a5l,%a2u,#-1,(%a3),%d1 + mac.w %a5l,%a2u,#-1,(%a3),%a3 + mac.w %a5l,%a2u,#-1,(%a3),%d2 + mac.w %a5l,%a2u,#-1,(%a3),%a7 + mac.w %a5l,%a2u,#-1,(%a3)&,%d1 + mac.w %a5l,%a2u,#-1,(%a3)&,%a3 + mac.w %a5l,%a2u,#-1,(%a3)&,%d2 + mac.w %a5l,%a2u,#-1,(%a3)&,%a7 + mac.w %a5l,%a2u,#-1,(%a2)+,%d1 + mac.w %a5l,%a2u,#-1,(%a2)+,%a3 + mac.w %a5l,%a2u,#-1,(%a2)+,%d2 + mac.w %a5l,%a2u,#-1,(%a2)+,%a7 + mac.w %a5l,%a2u,#-1,(%a2)+&,%d1 + mac.w %a5l,%a2u,#-1,(%a2)+&,%a3 + mac.w %a5l,%a2u,#-1,(%a2)+&,%d2 + mac.w %a5l,%a2u,#-1,(%a2)+&,%a7 + mac.w %a5l,%a2u,#-1,10(%a6),%d1 + mac.w %a5l,%a2u,#-1,10(%a6),%a3 + mac.w %a5l,%a2u,#-1,10(%a6),%d2 + mac.w %a5l,%a2u,#-1,10(%a6),%a7 + mac.w %a5l,%a2u,#-1,10(%a6)&,%d1 + mac.w %a5l,%a2u,#-1,10(%a6)&,%a3 + mac.w %a5l,%a2u,#-1,10(%a6)&,%d2 + mac.w %a5l,%a2u,#-1,10(%a6)&,%a7 + mac.w %a5l,%a2u,#-1,-(%a1),%d1 + mac.w %a5l,%a2u,#-1,-(%a1),%a3 + mac.w %a5l,%a2u,#-1,-(%a1),%d2 + mac.w %a5l,%a2u,#-1,-(%a1),%a7 + mac.w %a5l,%a2u,#-1,-(%a1)&,%d1 + mac.w %a5l,%a2u,#-1,-(%a1)&,%a3 + mac.w %a5l,%a2u,#-1,-(%a1)&,%d2 + mac.w %a5l,%a2u,#-1,-(%a1)&,%a7 + mac.w %a5l,%d3l,(%a3),%d1 + mac.w %a5l,%d3l,(%a3),%a3 + mac.w %a5l,%d3l,(%a3),%d2 + mac.w %a5l,%d3l,(%a3),%a7 + mac.w %a5l,%d3l,(%a3)&,%d1 + mac.w %a5l,%d3l,(%a3)&,%a3 + mac.w %a5l,%d3l,(%a3)&,%d2 + mac.w %a5l,%d3l,(%a3)&,%a7 + mac.w %a5l,%d3l,(%a2)+,%d1 + mac.w %a5l,%d3l,(%a2)+,%a3 + mac.w %a5l,%d3l,(%a2)+,%d2 + mac.w %a5l,%d3l,(%a2)+,%a7 + mac.w %a5l,%d3l,(%a2)+&,%d1 + mac.w %a5l,%d3l,(%a2)+&,%a3 + mac.w %a5l,%d3l,(%a2)+&,%d2 + mac.w %a5l,%d3l,(%a2)+&,%a7 + mac.w %a5l,%d3l,10(%a6),%d1 + mac.w %a5l,%d3l,10(%a6),%a3 + mac.w %a5l,%d3l,10(%a6),%d2 + mac.w %a5l,%d3l,10(%a6),%a7 + mac.w %a5l,%d3l,10(%a6)&,%d1 + mac.w %a5l,%d3l,10(%a6)&,%a3 + mac.w %a5l,%d3l,10(%a6)&,%d2 + mac.w %a5l,%d3l,10(%a6)&,%a7 + mac.w %a5l,%d3l,-(%a1),%d1 + mac.w %a5l,%d3l,-(%a1),%a3 + mac.w %a5l,%d3l,-(%a1),%d2 + mac.w %a5l,%d3l,-(%a1),%a7 + mac.w %a5l,%d3l,-(%a1)&,%d1 + mac.w %a5l,%d3l,-(%a1)&,%a3 + mac.w %a5l,%d3l,-(%a1)&,%d2 + mac.w %a5l,%d3l,-(%a1)&,%a7 + mac.w %a5l,%d3l,<<,(%a3),%d1 + mac.w %a5l,%d3l,<<,(%a3),%a3 + mac.w %a5l,%d3l,<<,(%a3),%d2 + mac.w %a5l,%d3l,<<,(%a3),%a7 + mac.w %a5l,%d3l,<<,(%a3)&,%d1 + mac.w %a5l,%d3l,<<,(%a3)&,%a3 + mac.w %a5l,%d3l,<<,(%a3)&,%d2 + mac.w %a5l,%d3l,<<,(%a3)&,%a7 + mac.w %a5l,%d3l,<<,(%a2)+,%d1 + mac.w %a5l,%d3l,<<,(%a2)+,%a3 + mac.w %a5l,%d3l,<<,(%a2)+,%d2 + mac.w %a5l,%d3l,<<,(%a2)+,%a7 + mac.w %a5l,%d3l,<<,(%a2)+&,%d1 + mac.w %a5l,%d3l,<<,(%a2)+&,%a3 + mac.w %a5l,%d3l,<<,(%a2)+&,%d2 + mac.w %a5l,%d3l,<<,(%a2)+&,%a7 + mac.w %a5l,%d3l,<<,10(%a6),%d1 + mac.w %a5l,%d3l,<<,10(%a6),%a3 + mac.w %a5l,%d3l,<<,10(%a6),%d2 + mac.w %a5l,%d3l,<<,10(%a6),%a7 + mac.w %a5l,%d3l,<<,10(%a6)&,%d1 + mac.w %a5l,%d3l,<<,10(%a6)&,%a3 + mac.w %a5l,%d3l,<<,10(%a6)&,%d2 + mac.w %a5l,%d3l,<<,10(%a6)&,%a7 + mac.w %a5l,%d3l,<<,-(%a1),%d1 + mac.w %a5l,%d3l,<<,-(%a1),%a3 + mac.w %a5l,%d3l,<<,-(%a1),%d2 + mac.w %a5l,%d3l,<<,-(%a1),%a7 + mac.w %a5l,%d3l,<<,-(%a1)&,%d1 + mac.w %a5l,%d3l,<<,-(%a1)&,%a3 + mac.w %a5l,%d3l,<<,-(%a1)&,%d2 + mac.w %a5l,%d3l,<<,-(%a1)&,%a7 + mac.w %a5l,%d3l,>>,(%a3),%d1 + mac.w %a5l,%d3l,>>,(%a3),%a3 + mac.w %a5l,%d3l,>>,(%a3),%d2 + mac.w %a5l,%d3l,>>,(%a3),%a7 + mac.w %a5l,%d3l,>>,(%a3)&,%d1 + mac.w %a5l,%d3l,>>,(%a3)&,%a3 + mac.w %a5l,%d3l,>>,(%a3)&,%d2 + mac.w %a5l,%d3l,>>,(%a3)&,%a7 + mac.w %a5l,%d3l,>>,(%a2)+,%d1 + mac.w %a5l,%d3l,>>,(%a2)+,%a3 + mac.w %a5l,%d3l,>>,(%a2)+,%d2 + mac.w %a5l,%d3l,>>,(%a2)+,%a7 + mac.w %a5l,%d3l,>>,(%a2)+&,%d1 + mac.w %a5l,%d3l,>>,(%a2)+&,%a3 + mac.w %a5l,%d3l,>>,(%a2)+&,%d2 + mac.w %a5l,%d3l,>>,(%a2)+&,%a7 + mac.w %a5l,%d3l,>>,10(%a6),%d1 + mac.w %a5l,%d3l,>>,10(%a6),%a3 + mac.w %a5l,%d3l,>>,10(%a6),%d2 + mac.w %a5l,%d3l,>>,10(%a6),%a7 + mac.w %a5l,%d3l,>>,10(%a6)&,%d1 + mac.w %a5l,%d3l,>>,10(%a6)&,%a3 + mac.w %a5l,%d3l,>>,10(%a6)&,%d2 + mac.w %a5l,%d3l,>>,10(%a6)&,%a7 + mac.w %a5l,%d3l,>>,-(%a1),%d1 + mac.w %a5l,%d3l,>>,-(%a1),%a3 + mac.w %a5l,%d3l,>>,-(%a1),%d2 + mac.w %a5l,%d3l,>>,-(%a1),%a7 + mac.w %a5l,%d3l,>>,-(%a1)&,%d1 + mac.w %a5l,%d3l,>>,-(%a1)&,%a3 + mac.w %a5l,%d3l,>>,-(%a1)&,%d2 + mac.w %a5l,%d3l,>>,-(%a1)&,%a7 + mac.w %a5l,%d3l,#1,(%a3),%d1 + mac.w %a5l,%d3l,#1,(%a3),%a3 + mac.w %a5l,%d3l,#1,(%a3),%d2 + mac.w %a5l,%d3l,#1,(%a3),%a7 + mac.w %a5l,%d3l,#1,(%a3)&,%d1 + mac.w %a5l,%d3l,#1,(%a3)&,%a3 + mac.w %a5l,%d3l,#1,(%a3)&,%d2 + mac.w %a5l,%d3l,#1,(%a3)&,%a7 + mac.w %a5l,%d3l,#1,(%a2)+,%d1 + mac.w %a5l,%d3l,#1,(%a2)+,%a3 + mac.w %a5l,%d3l,#1,(%a2)+,%d2 + mac.w %a5l,%d3l,#1,(%a2)+,%a7 + mac.w %a5l,%d3l,#1,(%a2)+&,%d1 + mac.w %a5l,%d3l,#1,(%a2)+&,%a3 + mac.w %a5l,%d3l,#1,(%a2)+&,%d2 + mac.w %a5l,%d3l,#1,(%a2)+&,%a7 + mac.w %a5l,%d3l,#1,10(%a6),%d1 + mac.w %a5l,%d3l,#1,10(%a6),%a3 + mac.w %a5l,%d3l,#1,10(%a6),%d2 + mac.w %a5l,%d3l,#1,10(%a6),%a7 + mac.w %a5l,%d3l,#1,10(%a6)&,%d1 + mac.w %a5l,%d3l,#1,10(%a6)&,%a3 + mac.w %a5l,%d3l,#1,10(%a6)&,%d2 + mac.w %a5l,%d3l,#1,10(%a6)&,%a7 + mac.w %a5l,%d3l,#1,-(%a1),%d1 + mac.w %a5l,%d3l,#1,-(%a1),%a3 + mac.w %a5l,%d3l,#1,-(%a1),%d2 + mac.w %a5l,%d3l,#1,-(%a1),%a7 + mac.w %a5l,%d3l,#1,-(%a1)&,%d1 + mac.w %a5l,%d3l,#1,-(%a1)&,%a3 + mac.w %a5l,%d3l,#1,-(%a1)&,%d2 + mac.w %a5l,%d3l,#1,-(%a1)&,%a7 + mac.w %a5l,%d3l,#-1,(%a3),%d1 + mac.w %a5l,%d3l,#-1,(%a3),%a3 + mac.w %a5l,%d3l,#-1,(%a3),%d2 + mac.w %a5l,%d3l,#-1,(%a3),%a7 + mac.w %a5l,%d3l,#-1,(%a3)&,%d1 + mac.w %a5l,%d3l,#-1,(%a3)&,%a3 + mac.w %a5l,%d3l,#-1,(%a3)&,%d2 + mac.w %a5l,%d3l,#-1,(%a3)&,%a7 + mac.w %a5l,%d3l,#-1,(%a2)+,%d1 + mac.w %a5l,%d3l,#-1,(%a2)+,%a3 + mac.w %a5l,%d3l,#-1,(%a2)+,%d2 + mac.w %a5l,%d3l,#-1,(%a2)+,%a7 + mac.w %a5l,%d3l,#-1,(%a2)+&,%d1 + mac.w %a5l,%d3l,#-1,(%a2)+&,%a3 + mac.w %a5l,%d3l,#-1,(%a2)+&,%d2 + mac.w %a5l,%d3l,#-1,(%a2)+&,%a7 + mac.w %a5l,%d3l,#-1,10(%a6),%d1 + mac.w %a5l,%d3l,#-1,10(%a6),%a3 + mac.w %a5l,%d3l,#-1,10(%a6),%d2 + mac.w %a5l,%d3l,#-1,10(%a6),%a7 + mac.w %a5l,%d3l,#-1,10(%a6)&,%d1 + mac.w %a5l,%d3l,#-1,10(%a6)&,%a3 + mac.w %a5l,%d3l,#-1,10(%a6)&,%d2 + mac.w %a5l,%d3l,#-1,10(%a6)&,%a7 + mac.w %a5l,%d3l,#-1,-(%a1),%d1 + mac.w %a5l,%d3l,#-1,-(%a1),%a3 + mac.w %a5l,%d3l,#-1,-(%a1),%d2 + mac.w %a5l,%d3l,#-1,-(%a1),%a7 + mac.w %a5l,%d3l,#-1,-(%a1)&,%d1 + mac.w %a5l,%d3l,#-1,-(%a1)&,%a3 + mac.w %a5l,%d3l,#-1,-(%a1)&,%d2 + mac.w %a5l,%d3l,#-1,-(%a1)&,%a7 + mac.w %a5l,%a7u,(%a3),%d1 + mac.w %a5l,%a7u,(%a3),%a3 + mac.w %a5l,%a7u,(%a3),%d2 + mac.w %a5l,%a7u,(%a3),%a7 + mac.w %a5l,%a7u,(%a3)&,%d1 + mac.w %a5l,%a7u,(%a3)&,%a3 + mac.w %a5l,%a7u,(%a3)&,%d2 + mac.w %a5l,%a7u,(%a3)&,%a7 + mac.w %a5l,%a7u,(%a2)+,%d1 + mac.w %a5l,%a7u,(%a2)+,%a3 + mac.w %a5l,%a7u,(%a2)+,%d2 + mac.w %a5l,%a7u,(%a2)+,%a7 + mac.w %a5l,%a7u,(%a2)+&,%d1 + mac.w %a5l,%a7u,(%a2)+&,%a3 + mac.w %a5l,%a7u,(%a2)+&,%d2 + mac.w %a5l,%a7u,(%a2)+&,%a7 + mac.w %a5l,%a7u,10(%a6),%d1 + mac.w %a5l,%a7u,10(%a6),%a3 + mac.w %a5l,%a7u,10(%a6),%d2 + mac.w %a5l,%a7u,10(%a6),%a7 + mac.w %a5l,%a7u,10(%a6)&,%d1 + mac.w %a5l,%a7u,10(%a6)&,%a3 + mac.w %a5l,%a7u,10(%a6)&,%d2 + mac.w %a5l,%a7u,10(%a6)&,%a7 + mac.w %a5l,%a7u,-(%a1),%d1 + mac.w %a5l,%a7u,-(%a1),%a3 + mac.w %a5l,%a7u,-(%a1),%d2 + mac.w %a5l,%a7u,-(%a1),%a7 + mac.w %a5l,%a7u,-(%a1)&,%d1 + mac.w %a5l,%a7u,-(%a1)&,%a3 + mac.w %a5l,%a7u,-(%a1)&,%d2 + mac.w %a5l,%a7u,-(%a1)&,%a7 + mac.w %a5l,%a7u,<<,(%a3),%d1 + mac.w %a5l,%a7u,<<,(%a3),%a3 + mac.w %a5l,%a7u,<<,(%a3),%d2 + mac.w %a5l,%a7u,<<,(%a3),%a7 + mac.w %a5l,%a7u,<<,(%a3)&,%d1 + mac.w %a5l,%a7u,<<,(%a3)&,%a3 + mac.w %a5l,%a7u,<<,(%a3)&,%d2 + mac.w %a5l,%a7u,<<,(%a3)&,%a7 + mac.w %a5l,%a7u,<<,(%a2)+,%d1 + mac.w %a5l,%a7u,<<,(%a2)+,%a3 + mac.w %a5l,%a7u,<<,(%a2)+,%d2 + mac.w %a5l,%a7u,<<,(%a2)+,%a7 + mac.w %a5l,%a7u,<<,(%a2)+&,%d1 + mac.w %a5l,%a7u,<<,(%a2)+&,%a3 + mac.w %a5l,%a7u,<<,(%a2)+&,%d2 + mac.w %a5l,%a7u,<<,(%a2)+&,%a7 + mac.w %a5l,%a7u,<<,10(%a6),%d1 + mac.w %a5l,%a7u,<<,10(%a6),%a3 + mac.w %a5l,%a7u,<<,10(%a6),%d2 + mac.w %a5l,%a7u,<<,10(%a6),%a7 + mac.w %a5l,%a7u,<<,10(%a6)&,%d1 + mac.w %a5l,%a7u,<<,10(%a6)&,%a3 + mac.w %a5l,%a7u,<<,10(%a6)&,%d2 + mac.w %a5l,%a7u,<<,10(%a6)&,%a7 + mac.w %a5l,%a7u,<<,-(%a1),%d1 + mac.w %a5l,%a7u,<<,-(%a1),%a3 + mac.w %a5l,%a7u,<<,-(%a1),%d2 + mac.w %a5l,%a7u,<<,-(%a1),%a7 + mac.w %a5l,%a7u,<<,-(%a1)&,%d1 + mac.w %a5l,%a7u,<<,-(%a1)&,%a3 + mac.w %a5l,%a7u,<<,-(%a1)&,%d2 + mac.w %a5l,%a7u,<<,-(%a1)&,%a7 + mac.w %a5l,%a7u,>>,(%a3),%d1 + mac.w %a5l,%a7u,>>,(%a3),%a3 + mac.w %a5l,%a7u,>>,(%a3),%d2 + mac.w %a5l,%a7u,>>,(%a3),%a7 + mac.w %a5l,%a7u,>>,(%a3)&,%d1 + mac.w %a5l,%a7u,>>,(%a3)&,%a3 + mac.w %a5l,%a7u,>>,(%a3)&,%d2 + mac.w %a5l,%a7u,>>,(%a3)&,%a7 + mac.w %a5l,%a7u,>>,(%a2)+,%d1 + mac.w %a5l,%a7u,>>,(%a2)+,%a3 + mac.w %a5l,%a7u,>>,(%a2)+,%d2 + mac.w %a5l,%a7u,>>,(%a2)+,%a7 + mac.w %a5l,%a7u,>>,(%a2)+&,%d1 + mac.w %a5l,%a7u,>>,(%a2)+&,%a3 + mac.w %a5l,%a7u,>>,(%a2)+&,%d2 + mac.w %a5l,%a7u,>>,(%a2)+&,%a7 + mac.w %a5l,%a7u,>>,10(%a6),%d1 + mac.w %a5l,%a7u,>>,10(%a6),%a3 + mac.w %a5l,%a7u,>>,10(%a6),%d2 + mac.w %a5l,%a7u,>>,10(%a6),%a7 + mac.w %a5l,%a7u,>>,10(%a6)&,%d1 + mac.w %a5l,%a7u,>>,10(%a6)&,%a3 + mac.w %a5l,%a7u,>>,10(%a6)&,%d2 + mac.w %a5l,%a7u,>>,10(%a6)&,%a7 + mac.w %a5l,%a7u,>>,-(%a1),%d1 + mac.w %a5l,%a7u,>>,-(%a1),%a3 + mac.w %a5l,%a7u,>>,-(%a1),%d2 + mac.w %a5l,%a7u,>>,-(%a1),%a7 + mac.w %a5l,%a7u,>>,-(%a1)&,%d1 + mac.w %a5l,%a7u,>>,-(%a1)&,%a3 + mac.w %a5l,%a7u,>>,-(%a1)&,%d2 + mac.w %a5l,%a7u,>>,-(%a1)&,%a7 + mac.w %a5l,%a7u,#1,(%a3),%d1 + mac.w %a5l,%a7u,#1,(%a3),%a3 + mac.w %a5l,%a7u,#1,(%a3),%d2 + mac.w %a5l,%a7u,#1,(%a3),%a7 + mac.w %a5l,%a7u,#1,(%a3)&,%d1 + mac.w %a5l,%a7u,#1,(%a3)&,%a3 + mac.w %a5l,%a7u,#1,(%a3)&,%d2 + mac.w %a5l,%a7u,#1,(%a3)&,%a7 + mac.w %a5l,%a7u,#1,(%a2)+,%d1 + mac.w %a5l,%a7u,#1,(%a2)+,%a3 + mac.w %a5l,%a7u,#1,(%a2)+,%d2 + mac.w %a5l,%a7u,#1,(%a2)+,%a7 + mac.w %a5l,%a7u,#1,(%a2)+&,%d1 + mac.w %a5l,%a7u,#1,(%a2)+&,%a3 + mac.w %a5l,%a7u,#1,(%a2)+&,%d2 + mac.w %a5l,%a7u,#1,(%a2)+&,%a7 + mac.w %a5l,%a7u,#1,10(%a6),%d1 + mac.w %a5l,%a7u,#1,10(%a6),%a3 + mac.w %a5l,%a7u,#1,10(%a6),%d2 + mac.w %a5l,%a7u,#1,10(%a6),%a7 + mac.w %a5l,%a7u,#1,10(%a6)&,%d1 + mac.w %a5l,%a7u,#1,10(%a6)&,%a3 + mac.w %a5l,%a7u,#1,10(%a6)&,%d2 + mac.w %a5l,%a7u,#1,10(%a6)&,%a7 + mac.w %a5l,%a7u,#1,-(%a1),%d1 + mac.w %a5l,%a7u,#1,-(%a1),%a3 + mac.w %a5l,%a7u,#1,-(%a1),%d2 + mac.w %a5l,%a7u,#1,-(%a1),%a7 + mac.w %a5l,%a7u,#1,-(%a1)&,%d1 + mac.w %a5l,%a7u,#1,-(%a1)&,%a3 + mac.w %a5l,%a7u,#1,-(%a1)&,%d2 + mac.w %a5l,%a7u,#1,-(%a1)&,%a7 + mac.w %a5l,%a7u,#-1,(%a3),%d1 + mac.w %a5l,%a7u,#-1,(%a3),%a3 + mac.w %a5l,%a7u,#-1,(%a3),%d2 + mac.w %a5l,%a7u,#-1,(%a3),%a7 + mac.w %a5l,%a7u,#-1,(%a3)&,%d1 + mac.w %a5l,%a7u,#-1,(%a3)&,%a3 + mac.w %a5l,%a7u,#-1,(%a3)&,%d2 + mac.w %a5l,%a7u,#-1,(%a3)&,%a7 + mac.w %a5l,%a7u,#-1,(%a2)+,%d1 + mac.w %a5l,%a7u,#-1,(%a2)+,%a3 + mac.w %a5l,%a7u,#-1,(%a2)+,%d2 + mac.w %a5l,%a7u,#-1,(%a2)+,%a7 + mac.w %a5l,%a7u,#-1,(%a2)+&,%d1 + mac.w %a5l,%a7u,#-1,(%a2)+&,%a3 + mac.w %a5l,%a7u,#-1,(%a2)+&,%d2 + mac.w %a5l,%a7u,#-1,(%a2)+&,%a7 + mac.w %a5l,%a7u,#-1,10(%a6),%d1 + mac.w %a5l,%a7u,#-1,10(%a6),%a3 + mac.w %a5l,%a7u,#-1,10(%a6),%d2 + mac.w %a5l,%a7u,#-1,10(%a6),%a7 + mac.w %a5l,%a7u,#-1,10(%a6)&,%d1 + mac.w %a5l,%a7u,#-1,10(%a6)&,%a3 + mac.w %a5l,%a7u,#-1,10(%a6)&,%d2 + mac.w %a5l,%a7u,#-1,10(%a6)&,%a7 + mac.w %a5l,%a7u,#-1,-(%a1),%d1 + mac.w %a5l,%a7u,#-1,-(%a1),%a3 + mac.w %a5l,%a7u,#-1,-(%a1),%d2 + mac.w %a5l,%a7u,#-1,-(%a1),%a7 + mac.w %a5l,%a7u,#-1,-(%a1)&,%d1 + mac.w %a5l,%a7u,#-1,-(%a1)&,%a3 + mac.w %a5l,%a7u,#-1,-(%a1)&,%d2 + mac.w %a5l,%a7u,#-1,-(%a1)&,%a7 + mac.w %a5l,%d1l,(%a3),%d1 + mac.w %a5l,%d1l,(%a3),%a3 + mac.w %a5l,%d1l,(%a3),%d2 + mac.w %a5l,%d1l,(%a3),%a7 + mac.w %a5l,%d1l,(%a3)&,%d1 + mac.w %a5l,%d1l,(%a3)&,%a3 + mac.w %a5l,%d1l,(%a3)&,%d2 + mac.w %a5l,%d1l,(%a3)&,%a7 + mac.w %a5l,%d1l,(%a2)+,%d1 + mac.w %a5l,%d1l,(%a2)+,%a3 + mac.w %a5l,%d1l,(%a2)+,%d2 + mac.w %a5l,%d1l,(%a2)+,%a7 + mac.w %a5l,%d1l,(%a2)+&,%d1 + mac.w %a5l,%d1l,(%a2)+&,%a3 + mac.w %a5l,%d1l,(%a2)+&,%d2 + mac.w %a5l,%d1l,(%a2)+&,%a7 + mac.w %a5l,%d1l,10(%a6),%d1 + mac.w %a5l,%d1l,10(%a6),%a3 + mac.w %a5l,%d1l,10(%a6),%d2 + mac.w %a5l,%d1l,10(%a6),%a7 + mac.w %a5l,%d1l,10(%a6)&,%d1 + mac.w %a5l,%d1l,10(%a6)&,%a3 + mac.w %a5l,%d1l,10(%a6)&,%d2 + mac.w %a5l,%d1l,10(%a6)&,%a7 + mac.w %a5l,%d1l,-(%a1),%d1 + mac.w %a5l,%d1l,-(%a1),%a3 + mac.w %a5l,%d1l,-(%a1),%d2 + mac.w %a5l,%d1l,-(%a1),%a7 + mac.w %a5l,%d1l,-(%a1)&,%d1 + mac.w %a5l,%d1l,-(%a1)&,%a3 + mac.w %a5l,%d1l,-(%a1)&,%d2 + mac.w %a5l,%d1l,-(%a1)&,%a7 + mac.w %a5l,%d1l,<<,(%a3),%d1 + mac.w %a5l,%d1l,<<,(%a3),%a3 + mac.w %a5l,%d1l,<<,(%a3),%d2 + mac.w %a5l,%d1l,<<,(%a3),%a7 + mac.w %a5l,%d1l,<<,(%a3)&,%d1 + mac.w %a5l,%d1l,<<,(%a3)&,%a3 + mac.w %a5l,%d1l,<<,(%a3)&,%d2 + mac.w %a5l,%d1l,<<,(%a3)&,%a7 + mac.w %a5l,%d1l,<<,(%a2)+,%d1 + mac.w %a5l,%d1l,<<,(%a2)+,%a3 + mac.w %a5l,%d1l,<<,(%a2)+,%d2 + mac.w %a5l,%d1l,<<,(%a2)+,%a7 + mac.w %a5l,%d1l,<<,(%a2)+&,%d1 + mac.w %a5l,%d1l,<<,(%a2)+&,%a3 + mac.w %a5l,%d1l,<<,(%a2)+&,%d2 + mac.w %a5l,%d1l,<<,(%a2)+&,%a7 + mac.w %a5l,%d1l,<<,10(%a6),%d1 + mac.w %a5l,%d1l,<<,10(%a6),%a3 + mac.w %a5l,%d1l,<<,10(%a6),%d2 + mac.w %a5l,%d1l,<<,10(%a6),%a7 + mac.w %a5l,%d1l,<<,10(%a6)&,%d1 + mac.w %a5l,%d1l,<<,10(%a6)&,%a3 + mac.w %a5l,%d1l,<<,10(%a6)&,%d2 + mac.w %a5l,%d1l,<<,10(%a6)&,%a7 + mac.w %a5l,%d1l,<<,-(%a1),%d1 + mac.w %a5l,%d1l,<<,-(%a1),%a3 + mac.w %a5l,%d1l,<<,-(%a1),%d2 + mac.w %a5l,%d1l,<<,-(%a1),%a7 + mac.w %a5l,%d1l,<<,-(%a1)&,%d1 + mac.w %a5l,%d1l,<<,-(%a1)&,%a3 + mac.w %a5l,%d1l,<<,-(%a1)&,%d2 + mac.w %a5l,%d1l,<<,-(%a1)&,%a7 + mac.w %a5l,%d1l,>>,(%a3),%d1 + mac.w %a5l,%d1l,>>,(%a3),%a3 + mac.w %a5l,%d1l,>>,(%a3),%d2 + mac.w %a5l,%d1l,>>,(%a3),%a7 + mac.w %a5l,%d1l,>>,(%a3)&,%d1 + mac.w %a5l,%d1l,>>,(%a3)&,%a3 + mac.w %a5l,%d1l,>>,(%a3)&,%d2 + mac.w %a5l,%d1l,>>,(%a3)&,%a7 + mac.w %a5l,%d1l,>>,(%a2)+,%d1 + mac.w %a5l,%d1l,>>,(%a2)+,%a3 + mac.w %a5l,%d1l,>>,(%a2)+,%d2 + mac.w %a5l,%d1l,>>,(%a2)+,%a7 + mac.w %a5l,%d1l,>>,(%a2)+&,%d1 + mac.w %a5l,%d1l,>>,(%a2)+&,%a3 + mac.w %a5l,%d1l,>>,(%a2)+&,%d2 + mac.w %a5l,%d1l,>>,(%a2)+&,%a7 + mac.w %a5l,%d1l,>>,10(%a6),%d1 + mac.w %a5l,%d1l,>>,10(%a6),%a3 + mac.w %a5l,%d1l,>>,10(%a6),%d2 + mac.w %a5l,%d1l,>>,10(%a6),%a7 + mac.w %a5l,%d1l,>>,10(%a6)&,%d1 + mac.w %a5l,%d1l,>>,10(%a6)&,%a3 + mac.w %a5l,%d1l,>>,10(%a6)&,%d2 + mac.w %a5l,%d1l,>>,10(%a6)&,%a7 + mac.w %a5l,%d1l,>>,-(%a1),%d1 + mac.w %a5l,%d1l,>>,-(%a1),%a3 + mac.w %a5l,%d1l,>>,-(%a1),%d2 + mac.w %a5l,%d1l,>>,-(%a1),%a7 + mac.w %a5l,%d1l,>>,-(%a1)&,%d1 + mac.w %a5l,%d1l,>>,-(%a1)&,%a3 + mac.w %a5l,%d1l,>>,-(%a1)&,%d2 + mac.w %a5l,%d1l,>>,-(%a1)&,%a7 + mac.w %a5l,%d1l,#1,(%a3),%d1 + mac.w %a5l,%d1l,#1,(%a3),%a3 + mac.w %a5l,%d1l,#1,(%a3),%d2 + mac.w %a5l,%d1l,#1,(%a3),%a7 + mac.w %a5l,%d1l,#1,(%a3)&,%d1 + mac.w %a5l,%d1l,#1,(%a3)&,%a3 + mac.w %a5l,%d1l,#1,(%a3)&,%d2 + mac.w %a5l,%d1l,#1,(%a3)&,%a7 + mac.w %a5l,%d1l,#1,(%a2)+,%d1 + mac.w %a5l,%d1l,#1,(%a2)+,%a3 + mac.w %a5l,%d1l,#1,(%a2)+,%d2 + mac.w %a5l,%d1l,#1,(%a2)+,%a7 + mac.w %a5l,%d1l,#1,(%a2)+&,%d1 + mac.w %a5l,%d1l,#1,(%a2)+&,%a3 + mac.w %a5l,%d1l,#1,(%a2)+&,%d2 + mac.w %a5l,%d1l,#1,(%a2)+&,%a7 + mac.w %a5l,%d1l,#1,10(%a6),%d1 + mac.w %a5l,%d1l,#1,10(%a6),%a3 + mac.w %a5l,%d1l,#1,10(%a6),%d2 + mac.w %a5l,%d1l,#1,10(%a6),%a7 + mac.w %a5l,%d1l,#1,10(%a6)&,%d1 + mac.w %a5l,%d1l,#1,10(%a6)&,%a3 + mac.w %a5l,%d1l,#1,10(%a6)&,%d2 + mac.w %a5l,%d1l,#1,10(%a6)&,%a7 + mac.w %a5l,%d1l,#1,-(%a1),%d1 + mac.w %a5l,%d1l,#1,-(%a1),%a3 + mac.w %a5l,%d1l,#1,-(%a1),%d2 + mac.w %a5l,%d1l,#1,-(%a1),%a7 + mac.w %a5l,%d1l,#1,-(%a1)&,%d1 + mac.w %a5l,%d1l,#1,-(%a1)&,%a3 + mac.w %a5l,%d1l,#1,-(%a1)&,%d2 + mac.w %a5l,%d1l,#1,-(%a1)&,%a7 + mac.w %a5l,%d1l,#-1,(%a3),%d1 + mac.w %a5l,%d1l,#-1,(%a3),%a3 + mac.w %a5l,%d1l,#-1,(%a3),%d2 + mac.w %a5l,%d1l,#-1,(%a3),%a7 + mac.w %a5l,%d1l,#-1,(%a3)&,%d1 + mac.w %a5l,%d1l,#-1,(%a3)&,%a3 + mac.w %a5l,%d1l,#-1,(%a3)&,%d2 + mac.w %a5l,%d1l,#-1,(%a3)&,%a7 + mac.w %a5l,%d1l,#-1,(%a2)+,%d1 + mac.w %a5l,%d1l,#-1,(%a2)+,%a3 + mac.w %a5l,%d1l,#-1,(%a2)+,%d2 + mac.w %a5l,%d1l,#-1,(%a2)+,%a7 + mac.w %a5l,%d1l,#-1,(%a2)+&,%d1 + mac.w %a5l,%d1l,#-1,(%a2)+&,%a3 + mac.w %a5l,%d1l,#-1,(%a2)+&,%d2 + mac.w %a5l,%d1l,#-1,(%a2)+&,%a7 + mac.w %a5l,%d1l,#-1,10(%a6),%d1 + mac.w %a5l,%d1l,#-1,10(%a6),%a3 + mac.w %a5l,%d1l,#-1,10(%a6),%d2 + mac.w %a5l,%d1l,#-1,10(%a6),%a7 + mac.w %a5l,%d1l,#-1,10(%a6)&,%d1 + mac.w %a5l,%d1l,#-1,10(%a6)&,%a3 + mac.w %a5l,%d1l,#-1,10(%a6)&,%d2 + mac.w %a5l,%d1l,#-1,10(%a6)&,%a7 + mac.w %a5l,%d1l,#-1,-(%a1),%d1 + mac.w %a5l,%d1l,#-1,-(%a1),%a3 + mac.w %a5l,%d1l,#-1,-(%a1),%d2 + mac.w %a5l,%d1l,#-1,-(%a1),%a7 + mac.w %a5l,%d1l,#-1,-(%a1)&,%d1 + mac.w %a5l,%d1l,#-1,-(%a1)&,%a3 + mac.w %a5l,%d1l,#-1,-(%a1)&,%d2 + mac.w %a5l,%d1l,#-1,-(%a1)&,%a7 + mac.w %d6u,%a2u,(%a3),%d1 + mac.w %d6u,%a2u,(%a3),%a3 + mac.w %d6u,%a2u,(%a3),%d2 + mac.w %d6u,%a2u,(%a3),%a7 + mac.w %d6u,%a2u,(%a3)&,%d1 + mac.w %d6u,%a2u,(%a3)&,%a3 + mac.w %d6u,%a2u,(%a3)&,%d2 + mac.w %d6u,%a2u,(%a3)&,%a7 + mac.w %d6u,%a2u,(%a2)+,%d1 + mac.w %d6u,%a2u,(%a2)+,%a3 + mac.w %d6u,%a2u,(%a2)+,%d2 + mac.w %d6u,%a2u,(%a2)+,%a7 + mac.w %d6u,%a2u,(%a2)+&,%d1 + mac.w %d6u,%a2u,(%a2)+&,%a3 + mac.w %d6u,%a2u,(%a2)+&,%d2 + mac.w %d6u,%a2u,(%a2)+&,%a7 + mac.w %d6u,%a2u,10(%a6),%d1 + mac.w %d6u,%a2u,10(%a6),%a3 + mac.w %d6u,%a2u,10(%a6),%d2 + mac.w %d6u,%a2u,10(%a6),%a7 + mac.w %d6u,%a2u,10(%a6)&,%d1 + mac.w %d6u,%a2u,10(%a6)&,%a3 + mac.w %d6u,%a2u,10(%a6)&,%d2 + mac.w %d6u,%a2u,10(%a6)&,%a7 + mac.w %d6u,%a2u,-(%a1),%d1 + mac.w %d6u,%a2u,-(%a1),%a3 + mac.w %d6u,%a2u,-(%a1),%d2 + mac.w %d6u,%a2u,-(%a1),%a7 + mac.w %d6u,%a2u,-(%a1)&,%d1 + mac.w %d6u,%a2u,-(%a1)&,%a3 + mac.w %d6u,%a2u,-(%a1)&,%d2 + mac.w %d6u,%a2u,-(%a1)&,%a7 + mac.w %d6u,%a2u,<<,(%a3),%d1 + mac.w %d6u,%a2u,<<,(%a3),%a3 + mac.w %d6u,%a2u,<<,(%a3),%d2 + mac.w %d6u,%a2u,<<,(%a3),%a7 + mac.w %d6u,%a2u,<<,(%a3)&,%d1 + mac.w %d6u,%a2u,<<,(%a3)&,%a3 + mac.w %d6u,%a2u,<<,(%a3)&,%d2 + mac.w %d6u,%a2u,<<,(%a3)&,%a7 + mac.w %d6u,%a2u,<<,(%a2)+,%d1 + mac.w %d6u,%a2u,<<,(%a2)+,%a3 + mac.w %d6u,%a2u,<<,(%a2)+,%d2 + mac.w %d6u,%a2u,<<,(%a2)+,%a7 + mac.w %d6u,%a2u,<<,(%a2)+&,%d1 + mac.w %d6u,%a2u,<<,(%a2)+&,%a3 + mac.w %d6u,%a2u,<<,(%a2)+&,%d2 + mac.w %d6u,%a2u,<<,(%a2)+&,%a7 + mac.w %d6u,%a2u,<<,10(%a6),%d1 + mac.w %d6u,%a2u,<<,10(%a6),%a3 + mac.w %d6u,%a2u,<<,10(%a6),%d2 + mac.w %d6u,%a2u,<<,10(%a6),%a7 + mac.w %d6u,%a2u,<<,10(%a6)&,%d1 + mac.w %d6u,%a2u,<<,10(%a6)&,%a3 + mac.w %d6u,%a2u,<<,10(%a6)&,%d2 + mac.w %d6u,%a2u,<<,10(%a6)&,%a7 + mac.w %d6u,%a2u,<<,-(%a1),%d1 + mac.w %d6u,%a2u,<<,-(%a1),%a3 + mac.w %d6u,%a2u,<<,-(%a1),%d2 + mac.w %d6u,%a2u,<<,-(%a1),%a7 + mac.w %d6u,%a2u,<<,-(%a1)&,%d1 + mac.w %d6u,%a2u,<<,-(%a1)&,%a3 + mac.w %d6u,%a2u,<<,-(%a1)&,%d2 + mac.w %d6u,%a2u,<<,-(%a1)&,%a7 + mac.w %d6u,%a2u,>>,(%a3),%d1 + mac.w %d6u,%a2u,>>,(%a3),%a3 + mac.w %d6u,%a2u,>>,(%a3),%d2 + mac.w %d6u,%a2u,>>,(%a3),%a7 + mac.w %d6u,%a2u,>>,(%a3)&,%d1 + mac.w %d6u,%a2u,>>,(%a3)&,%a3 + mac.w %d6u,%a2u,>>,(%a3)&,%d2 + mac.w %d6u,%a2u,>>,(%a3)&,%a7 + mac.w %d6u,%a2u,>>,(%a2)+,%d1 + mac.w %d6u,%a2u,>>,(%a2)+,%a3 + mac.w %d6u,%a2u,>>,(%a2)+,%d2 + mac.w %d6u,%a2u,>>,(%a2)+,%a7 + mac.w %d6u,%a2u,>>,(%a2)+&,%d1 + mac.w %d6u,%a2u,>>,(%a2)+&,%a3 + mac.w %d6u,%a2u,>>,(%a2)+&,%d2 + mac.w %d6u,%a2u,>>,(%a2)+&,%a7 + mac.w %d6u,%a2u,>>,10(%a6),%d1 + mac.w %d6u,%a2u,>>,10(%a6),%a3 + mac.w %d6u,%a2u,>>,10(%a6),%d2 + mac.w %d6u,%a2u,>>,10(%a6),%a7 + mac.w %d6u,%a2u,>>,10(%a6)&,%d1 + mac.w %d6u,%a2u,>>,10(%a6)&,%a3 + mac.w %d6u,%a2u,>>,10(%a6)&,%d2 + mac.w %d6u,%a2u,>>,10(%a6)&,%a7 + mac.w %d6u,%a2u,>>,-(%a1),%d1 + mac.w %d6u,%a2u,>>,-(%a1),%a3 + mac.w %d6u,%a2u,>>,-(%a1),%d2 + mac.w %d6u,%a2u,>>,-(%a1),%a7 + mac.w %d6u,%a2u,>>,-(%a1)&,%d1 + mac.w %d6u,%a2u,>>,-(%a1)&,%a3 + mac.w %d6u,%a2u,>>,-(%a1)&,%d2 + mac.w %d6u,%a2u,>>,-(%a1)&,%a7 + mac.w %d6u,%a2u,#1,(%a3),%d1 + mac.w %d6u,%a2u,#1,(%a3),%a3 + mac.w %d6u,%a2u,#1,(%a3),%d2 + mac.w %d6u,%a2u,#1,(%a3),%a7 + mac.w %d6u,%a2u,#1,(%a3)&,%d1 + mac.w %d6u,%a2u,#1,(%a3)&,%a3 + mac.w %d6u,%a2u,#1,(%a3)&,%d2 + mac.w %d6u,%a2u,#1,(%a3)&,%a7 + mac.w %d6u,%a2u,#1,(%a2)+,%d1 + mac.w %d6u,%a2u,#1,(%a2)+,%a3 + mac.w %d6u,%a2u,#1,(%a2)+,%d2 + mac.w %d6u,%a2u,#1,(%a2)+,%a7 + mac.w %d6u,%a2u,#1,(%a2)+&,%d1 + mac.w %d6u,%a2u,#1,(%a2)+&,%a3 + mac.w %d6u,%a2u,#1,(%a2)+&,%d2 + mac.w %d6u,%a2u,#1,(%a2)+&,%a7 + mac.w %d6u,%a2u,#1,10(%a6),%d1 + mac.w %d6u,%a2u,#1,10(%a6),%a3 + mac.w %d6u,%a2u,#1,10(%a6),%d2 + mac.w %d6u,%a2u,#1,10(%a6),%a7 + mac.w %d6u,%a2u,#1,10(%a6)&,%d1 + mac.w %d6u,%a2u,#1,10(%a6)&,%a3 + mac.w %d6u,%a2u,#1,10(%a6)&,%d2 + mac.w %d6u,%a2u,#1,10(%a6)&,%a7 + mac.w %d6u,%a2u,#1,-(%a1),%d1 + mac.w %d6u,%a2u,#1,-(%a1),%a3 + mac.w %d6u,%a2u,#1,-(%a1),%d2 + mac.w %d6u,%a2u,#1,-(%a1),%a7 + mac.w %d6u,%a2u,#1,-(%a1)&,%d1 + mac.w %d6u,%a2u,#1,-(%a1)&,%a3 + mac.w %d6u,%a2u,#1,-(%a1)&,%d2 + mac.w %d6u,%a2u,#1,-(%a1)&,%a7 + mac.w %d6u,%a2u,#-1,(%a3),%d1 + mac.w %d6u,%a2u,#-1,(%a3),%a3 + mac.w %d6u,%a2u,#-1,(%a3),%d2 + mac.w %d6u,%a2u,#-1,(%a3),%a7 + mac.w %d6u,%a2u,#-1,(%a3)&,%d1 + mac.w %d6u,%a2u,#-1,(%a3)&,%a3 + mac.w %d6u,%a2u,#-1,(%a3)&,%d2 + mac.w %d6u,%a2u,#-1,(%a3)&,%a7 + mac.w %d6u,%a2u,#-1,(%a2)+,%d1 + mac.w %d6u,%a2u,#-1,(%a2)+,%a3 + mac.w %d6u,%a2u,#-1,(%a2)+,%d2 + mac.w %d6u,%a2u,#-1,(%a2)+,%a7 + mac.w %d6u,%a2u,#-1,(%a2)+&,%d1 + mac.w %d6u,%a2u,#-1,(%a2)+&,%a3 + mac.w %d6u,%a2u,#-1,(%a2)+&,%d2 + mac.w %d6u,%a2u,#-1,(%a2)+&,%a7 + mac.w %d6u,%a2u,#-1,10(%a6),%d1 + mac.w %d6u,%a2u,#-1,10(%a6),%a3 + mac.w %d6u,%a2u,#-1,10(%a6),%d2 + mac.w %d6u,%a2u,#-1,10(%a6),%a7 + mac.w %d6u,%a2u,#-1,10(%a6)&,%d1 + mac.w %d6u,%a2u,#-1,10(%a6)&,%a3 + mac.w %d6u,%a2u,#-1,10(%a6)&,%d2 + mac.w %d6u,%a2u,#-1,10(%a6)&,%a7 + mac.w %d6u,%a2u,#-1,-(%a1),%d1 + mac.w %d6u,%a2u,#-1,-(%a1),%a3 + mac.w %d6u,%a2u,#-1,-(%a1),%d2 + mac.w %d6u,%a2u,#-1,-(%a1),%a7 + mac.w %d6u,%a2u,#-1,-(%a1)&,%d1 + mac.w %d6u,%a2u,#-1,-(%a1)&,%a3 + mac.w %d6u,%a2u,#-1,-(%a1)&,%d2 + mac.w %d6u,%a2u,#-1,-(%a1)&,%a7 + mac.w %d6u,%d3l,(%a3),%d1 + mac.w %d6u,%d3l,(%a3),%a3 + mac.w %d6u,%d3l,(%a3),%d2 + mac.w %d6u,%d3l,(%a3),%a7 + mac.w %d6u,%d3l,(%a3)&,%d1 + mac.w %d6u,%d3l,(%a3)&,%a3 + mac.w %d6u,%d3l,(%a3)&,%d2 + mac.w %d6u,%d3l,(%a3)&,%a7 + mac.w %d6u,%d3l,(%a2)+,%d1 + mac.w %d6u,%d3l,(%a2)+,%a3 + mac.w %d6u,%d3l,(%a2)+,%d2 + mac.w %d6u,%d3l,(%a2)+,%a7 + mac.w %d6u,%d3l,(%a2)+&,%d1 + mac.w %d6u,%d3l,(%a2)+&,%a3 + mac.w %d6u,%d3l,(%a2)+&,%d2 + mac.w %d6u,%d3l,(%a2)+&,%a7 + mac.w %d6u,%d3l,10(%a6),%d1 + mac.w %d6u,%d3l,10(%a6),%a3 + mac.w %d6u,%d3l,10(%a6),%d2 + mac.w %d6u,%d3l,10(%a6),%a7 + mac.w %d6u,%d3l,10(%a6)&,%d1 + mac.w %d6u,%d3l,10(%a6)&,%a3 + mac.w %d6u,%d3l,10(%a6)&,%d2 + mac.w %d6u,%d3l,10(%a6)&,%a7 + mac.w %d6u,%d3l,-(%a1),%d1 + mac.w %d6u,%d3l,-(%a1),%a3 + mac.w %d6u,%d3l,-(%a1),%d2 + mac.w %d6u,%d3l,-(%a1),%a7 + mac.w %d6u,%d3l,-(%a1)&,%d1 + mac.w %d6u,%d3l,-(%a1)&,%a3 + mac.w %d6u,%d3l,-(%a1)&,%d2 + mac.w %d6u,%d3l,-(%a1)&,%a7 + mac.w %d6u,%d3l,<<,(%a3),%d1 + mac.w %d6u,%d3l,<<,(%a3),%a3 + mac.w %d6u,%d3l,<<,(%a3),%d2 + mac.w %d6u,%d3l,<<,(%a3),%a7 + mac.w %d6u,%d3l,<<,(%a3)&,%d1 + mac.w %d6u,%d3l,<<,(%a3)&,%a3 + mac.w %d6u,%d3l,<<,(%a3)&,%d2 + mac.w %d6u,%d3l,<<,(%a3)&,%a7 + mac.w %d6u,%d3l,<<,(%a2)+,%d1 + mac.w %d6u,%d3l,<<,(%a2)+,%a3 + mac.w %d6u,%d3l,<<,(%a2)+,%d2 + mac.w %d6u,%d3l,<<,(%a2)+,%a7 + mac.w %d6u,%d3l,<<,(%a2)+&,%d1 + mac.w %d6u,%d3l,<<,(%a2)+&,%a3 + mac.w %d6u,%d3l,<<,(%a2)+&,%d2 + mac.w %d6u,%d3l,<<,(%a2)+&,%a7 + mac.w %d6u,%d3l,<<,10(%a6),%d1 + mac.w %d6u,%d3l,<<,10(%a6),%a3 + mac.w %d6u,%d3l,<<,10(%a6),%d2 + mac.w %d6u,%d3l,<<,10(%a6),%a7 + mac.w %d6u,%d3l,<<,10(%a6)&,%d1 + mac.w %d6u,%d3l,<<,10(%a6)&,%a3 + mac.w %d6u,%d3l,<<,10(%a6)&,%d2 + mac.w %d6u,%d3l,<<,10(%a6)&,%a7 + mac.w %d6u,%d3l,<<,-(%a1),%d1 + mac.w %d6u,%d3l,<<,-(%a1),%a3 + mac.w %d6u,%d3l,<<,-(%a1),%d2 + mac.w %d6u,%d3l,<<,-(%a1),%a7 + mac.w %d6u,%d3l,<<,-(%a1)&,%d1 + mac.w %d6u,%d3l,<<,-(%a1)&,%a3 + mac.w %d6u,%d3l,<<,-(%a1)&,%d2 + mac.w %d6u,%d3l,<<,-(%a1)&,%a7 + mac.w %d6u,%d3l,>>,(%a3),%d1 + mac.w %d6u,%d3l,>>,(%a3),%a3 + mac.w %d6u,%d3l,>>,(%a3),%d2 + mac.w %d6u,%d3l,>>,(%a3),%a7 + mac.w %d6u,%d3l,>>,(%a3)&,%d1 + mac.w %d6u,%d3l,>>,(%a3)&,%a3 + mac.w %d6u,%d3l,>>,(%a3)&,%d2 + mac.w %d6u,%d3l,>>,(%a3)&,%a7 + mac.w %d6u,%d3l,>>,(%a2)+,%d1 + mac.w %d6u,%d3l,>>,(%a2)+,%a3 + mac.w %d6u,%d3l,>>,(%a2)+,%d2 + mac.w %d6u,%d3l,>>,(%a2)+,%a7 + mac.w %d6u,%d3l,>>,(%a2)+&,%d1 + mac.w %d6u,%d3l,>>,(%a2)+&,%a3 + mac.w %d6u,%d3l,>>,(%a2)+&,%d2 + mac.w %d6u,%d3l,>>,(%a2)+&,%a7 + mac.w %d6u,%d3l,>>,10(%a6),%d1 + mac.w %d6u,%d3l,>>,10(%a6),%a3 + mac.w %d6u,%d3l,>>,10(%a6),%d2 + mac.w %d6u,%d3l,>>,10(%a6),%a7 + mac.w %d6u,%d3l,>>,10(%a6)&,%d1 + mac.w %d6u,%d3l,>>,10(%a6)&,%a3 + mac.w %d6u,%d3l,>>,10(%a6)&,%d2 + mac.w %d6u,%d3l,>>,10(%a6)&,%a7 + mac.w %d6u,%d3l,>>,-(%a1),%d1 + mac.w %d6u,%d3l,>>,-(%a1),%a3 + mac.w %d6u,%d3l,>>,-(%a1),%d2 + mac.w %d6u,%d3l,>>,-(%a1),%a7 + mac.w %d6u,%d3l,>>,-(%a1)&,%d1 + mac.w %d6u,%d3l,>>,-(%a1)&,%a3 + mac.w %d6u,%d3l,>>,-(%a1)&,%d2 + mac.w %d6u,%d3l,>>,-(%a1)&,%a7 + mac.w %d6u,%d3l,#1,(%a3),%d1 + mac.w %d6u,%d3l,#1,(%a3),%a3 + mac.w %d6u,%d3l,#1,(%a3),%d2 + mac.w %d6u,%d3l,#1,(%a3),%a7 + mac.w %d6u,%d3l,#1,(%a3)&,%d1 + mac.w %d6u,%d3l,#1,(%a3)&,%a3 + mac.w %d6u,%d3l,#1,(%a3)&,%d2 + mac.w %d6u,%d3l,#1,(%a3)&,%a7 + mac.w %d6u,%d3l,#1,(%a2)+,%d1 + mac.w %d6u,%d3l,#1,(%a2)+,%a3 + mac.w %d6u,%d3l,#1,(%a2)+,%d2 + mac.w %d6u,%d3l,#1,(%a2)+,%a7 + mac.w %d6u,%d3l,#1,(%a2)+&,%d1 + mac.w %d6u,%d3l,#1,(%a2)+&,%a3 + mac.w %d6u,%d3l,#1,(%a2)+&,%d2 + mac.w %d6u,%d3l,#1,(%a2)+&,%a7 + mac.w %d6u,%d3l,#1,10(%a6),%d1 + mac.w %d6u,%d3l,#1,10(%a6),%a3 + mac.w %d6u,%d3l,#1,10(%a6),%d2 + mac.w %d6u,%d3l,#1,10(%a6),%a7 + mac.w %d6u,%d3l,#1,10(%a6)&,%d1 + mac.w %d6u,%d3l,#1,10(%a6)&,%a3 + mac.w %d6u,%d3l,#1,10(%a6)&,%d2 + mac.w %d6u,%d3l,#1,10(%a6)&,%a7 + mac.w %d6u,%d3l,#1,-(%a1),%d1 + mac.w %d6u,%d3l,#1,-(%a1),%a3 + mac.w %d6u,%d3l,#1,-(%a1),%d2 + mac.w %d6u,%d3l,#1,-(%a1),%a7 + mac.w %d6u,%d3l,#1,-(%a1)&,%d1 + mac.w %d6u,%d3l,#1,-(%a1)&,%a3 + mac.w %d6u,%d3l,#1,-(%a1)&,%d2 + mac.w %d6u,%d3l,#1,-(%a1)&,%a7 + mac.w %d6u,%d3l,#-1,(%a3),%d1 + mac.w %d6u,%d3l,#-1,(%a3),%a3 + mac.w %d6u,%d3l,#-1,(%a3),%d2 + mac.w %d6u,%d3l,#-1,(%a3),%a7 + mac.w %d6u,%d3l,#-1,(%a3)&,%d1 + mac.w %d6u,%d3l,#-1,(%a3)&,%a3 + mac.w %d6u,%d3l,#-1,(%a3)&,%d2 + mac.w %d6u,%d3l,#-1,(%a3)&,%a7 + mac.w %d6u,%d3l,#-1,(%a2)+,%d1 + mac.w %d6u,%d3l,#-1,(%a2)+,%a3 + mac.w %d6u,%d3l,#-1,(%a2)+,%d2 + mac.w %d6u,%d3l,#-1,(%a2)+,%a7 + mac.w %d6u,%d3l,#-1,(%a2)+&,%d1 + mac.w %d6u,%d3l,#-1,(%a2)+&,%a3 + mac.w %d6u,%d3l,#-1,(%a2)+&,%d2 + mac.w %d6u,%d3l,#-1,(%a2)+&,%a7 + mac.w %d6u,%d3l,#-1,10(%a6),%d1 + mac.w %d6u,%d3l,#-1,10(%a6),%a3 + mac.w %d6u,%d3l,#-1,10(%a6),%d2 + mac.w %d6u,%d3l,#-1,10(%a6),%a7 + mac.w %d6u,%d3l,#-1,10(%a6)&,%d1 + mac.w %d6u,%d3l,#-1,10(%a6)&,%a3 + mac.w %d6u,%d3l,#-1,10(%a6)&,%d2 + mac.w %d6u,%d3l,#-1,10(%a6)&,%a7 + mac.w %d6u,%d3l,#-1,-(%a1),%d1 + mac.w %d6u,%d3l,#-1,-(%a1),%a3 + mac.w %d6u,%d3l,#-1,-(%a1),%d2 + mac.w %d6u,%d3l,#-1,-(%a1),%a7 + mac.w %d6u,%d3l,#-1,-(%a1)&,%d1 + mac.w %d6u,%d3l,#-1,-(%a1)&,%a3 + mac.w %d6u,%d3l,#-1,-(%a1)&,%d2 + mac.w %d6u,%d3l,#-1,-(%a1)&,%a7 + mac.w %d6u,%a7u,(%a3),%d1 + mac.w %d6u,%a7u,(%a3),%a3 + mac.w %d6u,%a7u,(%a3),%d2 + mac.w %d6u,%a7u,(%a3),%a7 + mac.w %d6u,%a7u,(%a3)&,%d1 + mac.w %d6u,%a7u,(%a3)&,%a3 + mac.w %d6u,%a7u,(%a3)&,%d2 + mac.w %d6u,%a7u,(%a3)&,%a7 + mac.w %d6u,%a7u,(%a2)+,%d1 + mac.w %d6u,%a7u,(%a2)+,%a3 + mac.w %d6u,%a7u,(%a2)+,%d2 + mac.w %d6u,%a7u,(%a2)+,%a7 + mac.w %d6u,%a7u,(%a2)+&,%d1 + mac.w %d6u,%a7u,(%a2)+&,%a3 + mac.w %d6u,%a7u,(%a2)+&,%d2 + mac.w %d6u,%a7u,(%a2)+&,%a7 + mac.w %d6u,%a7u,10(%a6),%d1 + mac.w %d6u,%a7u,10(%a6),%a3 + mac.w %d6u,%a7u,10(%a6),%d2 + mac.w %d6u,%a7u,10(%a6),%a7 + mac.w %d6u,%a7u,10(%a6)&,%d1 + mac.w %d6u,%a7u,10(%a6)&,%a3 + mac.w %d6u,%a7u,10(%a6)&,%d2 + mac.w %d6u,%a7u,10(%a6)&,%a7 + mac.w %d6u,%a7u,-(%a1),%d1 + mac.w %d6u,%a7u,-(%a1),%a3 + mac.w %d6u,%a7u,-(%a1),%d2 + mac.w %d6u,%a7u,-(%a1),%a7 + mac.w %d6u,%a7u,-(%a1)&,%d1 + mac.w %d6u,%a7u,-(%a1)&,%a3 + mac.w %d6u,%a7u,-(%a1)&,%d2 + mac.w %d6u,%a7u,-(%a1)&,%a7 + mac.w %d6u,%a7u,<<,(%a3),%d1 + mac.w %d6u,%a7u,<<,(%a3),%a3 + mac.w %d6u,%a7u,<<,(%a3),%d2 + mac.w %d6u,%a7u,<<,(%a3),%a7 + mac.w %d6u,%a7u,<<,(%a3)&,%d1 + mac.w %d6u,%a7u,<<,(%a3)&,%a3 + mac.w %d6u,%a7u,<<,(%a3)&,%d2 + mac.w %d6u,%a7u,<<,(%a3)&,%a7 + mac.w %d6u,%a7u,<<,(%a2)+,%d1 + mac.w %d6u,%a7u,<<,(%a2)+,%a3 + mac.w %d6u,%a7u,<<,(%a2)+,%d2 + mac.w %d6u,%a7u,<<,(%a2)+,%a7 + mac.w %d6u,%a7u,<<,(%a2)+&,%d1 + mac.w %d6u,%a7u,<<,(%a2)+&,%a3 + mac.w %d6u,%a7u,<<,(%a2)+&,%d2 + mac.w %d6u,%a7u,<<,(%a2)+&,%a7 + mac.w %d6u,%a7u,<<,10(%a6),%d1 + mac.w %d6u,%a7u,<<,10(%a6),%a3 + mac.w %d6u,%a7u,<<,10(%a6),%d2 + mac.w %d6u,%a7u,<<,10(%a6),%a7 + mac.w %d6u,%a7u,<<,10(%a6)&,%d1 + mac.w %d6u,%a7u,<<,10(%a6)&,%a3 + mac.w %d6u,%a7u,<<,10(%a6)&,%d2 + mac.w %d6u,%a7u,<<,10(%a6)&,%a7 + mac.w %d6u,%a7u,<<,-(%a1),%d1 + mac.w %d6u,%a7u,<<,-(%a1),%a3 + mac.w %d6u,%a7u,<<,-(%a1),%d2 + mac.w %d6u,%a7u,<<,-(%a1),%a7 + mac.w %d6u,%a7u,<<,-(%a1)&,%d1 + mac.w %d6u,%a7u,<<,-(%a1)&,%a3 + mac.w %d6u,%a7u,<<,-(%a1)&,%d2 + mac.w %d6u,%a7u,<<,-(%a1)&,%a7 + mac.w %d6u,%a7u,>>,(%a3),%d1 + mac.w %d6u,%a7u,>>,(%a3),%a3 + mac.w %d6u,%a7u,>>,(%a3),%d2 + mac.w %d6u,%a7u,>>,(%a3),%a7 + mac.w %d6u,%a7u,>>,(%a3)&,%d1 + mac.w %d6u,%a7u,>>,(%a3)&,%a3 + mac.w %d6u,%a7u,>>,(%a3)&,%d2 + mac.w %d6u,%a7u,>>,(%a3)&,%a7 + mac.w %d6u,%a7u,>>,(%a2)+,%d1 + mac.w %d6u,%a7u,>>,(%a2)+,%a3 + mac.w %d6u,%a7u,>>,(%a2)+,%d2 + mac.w %d6u,%a7u,>>,(%a2)+,%a7 + mac.w %d6u,%a7u,>>,(%a2)+&,%d1 + mac.w %d6u,%a7u,>>,(%a2)+&,%a3 + mac.w %d6u,%a7u,>>,(%a2)+&,%d2 + mac.w %d6u,%a7u,>>,(%a2)+&,%a7 + mac.w %d6u,%a7u,>>,10(%a6),%d1 + mac.w %d6u,%a7u,>>,10(%a6),%a3 + mac.w %d6u,%a7u,>>,10(%a6),%d2 + mac.w %d6u,%a7u,>>,10(%a6),%a7 + mac.w %d6u,%a7u,>>,10(%a6)&,%d1 + mac.w %d6u,%a7u,>>,10(%a6)&,%a3 + mac.w %d6u,%a7u,>>,10(%a6)&,%d2 + mac.w %d6u,%a7u,>>,10(%a6)&,%a7 + mac.w %d6u,%a7u,>>,-(%a1),%d1 + mac.w %d6u,%a7u,>>,-(%a1),%a3 + mac.w %d6u,%a7u,>>,-(%a1),%d2 + mac.w %d6u,%a7u,>>,-(%a1),%a7 + mac.w %d6u,%a7u,>>,-(%a1)&,%d1 + mac.w %d6u,%a7u,>>,-(%a1)&,%a3 + mac.w %d6u,%a7u,>>,-(%a1)&,%d2 + mac.w %d6u,%a7u,>>,-(%a1)&,%a7 + mac.w %d6u,%a7u,#1,(%a3),%d1 + mac.w %d6u,%a7u,#1,(%a3),%a3 + mac.w %d6u,%a7u,#1,(%a3),%d2 + mac.w %d6u,%a7u,#1,(%a3),%a7 + mac.w %d6u,%a7u,#1,(%a3)&,%d1 + mac.w %d6u,%a7u,#1,(%a3)&,%a3 + mac.w %d6u,%a7u,#1,(%a3)&,%d2 + mac.w %d6u,%a7u,#1,(%a3)&,%a7 + mac.w %d6u,%a7u,#1,(%a2)+,%d1 + mac.w %d6u,%a7u,#1,(%a2)+,%a3 + mac.w %d6u,%a7u,#1,(%a2)+,%d2 + mac.w %d6u,%a7u,#1,(%a2)+,%a7 + mac.w %d6u,%a7u,#1,(%a2)+&,%d1 + mac.w %d6u,%a7u,#1,(%a2)+&,%a3 + mac.w %d6u,%a7u,#1,(%a2)+&,%d2 + mac.w %d6u,%a7u,#1,(%a2)+&,%a7 + mac.w %d6u,%a7u,#1,10(%a6),%d1 + mac.w %d6u,%a7u,#1,10(%a6),%a3 + mac.w %d6u,%a7u,#1,10(%a6),%d2 + mac.w %d6u,%a7u,#1,10(%a6),%a7 + mac.w %d6u,%a7u,#1,10(%a6)&,%d1 + mac.w %d6u,%a7u,#1,10(%a6)&,%a3 + mac.w %d6u,%a7u,#1,10(%a6)&,%d2 + mac.w %d6u,%a7u,#1,10(%a6)&,%a7 + mac.w %d6u,%a7u,#1,-(%a1),%d1 + mac.w %d6u,%a7u,#1,-(%a1),%a3 + mac.w %d6u,%a7u,#1,-(%a1),%d2 + mac.w %d6u,%a7u,#1,-(%a1),%a7 + mac.w %d6u,%a7u,#1,-(%a1)&,%d1 + mac.w %d6u,%a7u,#1,-(%a1)&,%a3 + mac.w %d6u,%a7u,#1,-(%a1)&,%d2 + mac.w %d6u,%a7u,#1,-(%a1)&,%a7 + mac.w %d6u,%a7u,#-1,(%a3),%d1 + mac.w %d6u,%a7u,#-1,(%a3),%a3 + mac.w %d6u,%a7u,#-1,(%a3),%d2 + mac.w %d6u,%a7u,#-1,(%a3),%a7 + mac.w %d6u,%a7u,#-1,(%a3)&,%d1 + mac.w %d6u,%a7u,#-1,(%a3)&,%a3 + mac.w %d6u,%a7u,#-1,(%a3)&,%d2 + mac.w %d6u,%a7u,#-1,(%a3)&,%a7 + mac.w %d6u,%a7u,#-1,(%a2)+,%d1 + mac.w %d6u,%a7u,#-1,(%a2)+,%a3 + mac.w %d6u,%a7u,#-1,(%a2)+,%d2 + mac.w %d6u,%a7u,#-1,(%a2)+,%a7 + mac.w %d6u,%a7u,#-1,(%a2)+&,%d1 + mac.w %d6u,%a7u,#-1,(%a2)+&,%a3 + mac.w %d6u,%a7u,#-1,(%a2)+&,%d2 + mac.w %d6u,%a7u,#-1,(%a2)+&,%a7 + mac.w %d6u,%a7u,#-1,10(%a6),%d1 + mac.w %d6u,%a7u,#-1,10(%a6),%a3 + mac.w %d6u,%a7u,#-1,10(%a6),%d2 + mac.w %d6u,%a7u,#-1,10(%a6),%a7 + mac.w %d6u,%a7u,#-1,10(%a6)&,%d1 + mac.w %d6u,%a7u,#-1,10(%a6)&,%a3 + mac.w %d6u,%a7u,#-1,10(%a6)&,%d2 + mac.w %d6u,%a7u,#-1,10(%a6)&,%a7 + mac.w %d6u,%a7u,#-1,-(%a1),%d1 + mac.w %d6u,%a7u,#-1,-(%a1),%a3 + mac.w %d6u,%a7u,#-1,-(%a1),%d2 + mac.w %d6u,%a7u,#-1,-(%a1),%a7 + mac.w %d6u,%a7u,#-1,-(%a1)&,%d1 + mac.w %d6u,%a7u,#-1,-(%a1)&,%a3 + mac.w %d6u,%a7u,#-1,-(%a1)&,%d2 + mac.w %d6u,%a7u,#-1,-(%a1)&,%a7 + mac.w %d6u,%d1l,(%a3),%d1 + mac.w %d6u,%d1l,(%a3),%a3 + mac.w %d6u,%d1l,(%a3),%d2 + mac.w %d6u,%d1l,(%a3),%a7 + mac.w %d6u,%d1l,(%a3)&,%d1 + mac.w %d6u,%d1l,(%a3)&,%a3 + mac.w %d6u,%d1l,(%a3)&,%d2 + mac.w %d6u,%d1l,(%a3)&,%a7 + mac.w %d6u,%d1l,(%a2)+,%d1 + mac.w %d6u,%d1l,(%a2)+,%a3 + mac.w %d6u,%d1l,(%a2)+,%d2 + mac.w %d6u,%d1l,(%a2)+,%a7 + mac.w %d6u,%d1l,(%a2)+&,%d1 + mac.w %d6u,%d1l,(%a2)+&,%a3 + mac.w %d6u,%d1l,(%a2)+&,%d2 + mac.w %d6u,%d1l,(%a2)+&,%a7 + mac.w %d6u,%d1l,10(%a6),%d1 + mac.w %d6u,%d1l,10(%a6),%a3 + mac.w %d6u,%d1l,10(%a6),%d2 + mac.w %d6u,%d1l,10(%a6),%a7 + mac.w %d6u,%d1l,10(%a6)&,%d1 + mac.w %d6u,%d1l,10(%a6)&,%a3 + mac.w %d6u,%d1l,10(%a6)&,%d2 + mac.w %d6u,%d1l,10(%a6)&,%a7 + mac.w %d6u,%d1l,-(%a1),%d1 + mac.w %d6u,%d1l,-(%a1),%a3 + mac.w %d6u,%d1l,-(%a1),%d2 + mac.w %d6u,%d1l,-(%a1),%a7 + mac.w %d6u,%d1l,-(%a1)&,%d1 + mac.w %d6u,%d1l,-(%a1)&,%a3 + mac.w %d6u,%d1l,-(%a1)&,%d2 + mac.w %d6u,%d1l,-(%a1)&,%a7 + mac.w %d6u,%d1l,<<,(%a3),%d1 + mac.w %d6u,%d1l,<<,(%a3),%a3 + mac.w %d6u,%d1l,<<,(%a3),%d2 + mac.w %d6u,%d1l,<<,(%a3),%a7 + mac.w %d6u,%d1l,<<,(%a3)&,%d1 + mac.w %d6u,%d1l,<<,(%a3)&,%a3 + mac.w %d6u,%d1l,<<,(%a3)&,%d2 + mac.w %d6u,%d1l,<<,(%a3)&,%a7 + mac.w %d6u,%d1l,<<,(%a2)+,%d1 + mac.w %d6u,%d1l,<<,(%a2)+,%a3 + mac.w %d6u,%d1l,<<,(%a2)+,%d2 + mac.w %d6u,%d1l,<<,(%a2)+,%a7 + mac.w %d6u,%d1l,<<,(%a2)+&,%d1 + mac.w %d6u,%d1l,<<,(%a2)+&,%a3 + mac.w %d6u,%d1l,<<,(%a2)+&,%d2 + mac.w %d6u,%d1l,<<,(%a2)+&,%a7 + mac.w %d6u,%d1l,<<,10(%a6),%d1 + mac.w %d6u,%d1l,<<,10(%a6),%a3 + mac.w %d6u,%d1l,<<,10(%a6),%d2 + mac.w %d6u,%d1l,<<,10(%a6),%a7 + mac.w %d6u,%d1l,<<,10(%a6)&,%d1 + mac.w %d6u,%d1l,<<,10(%a6)&,%a3 + mac.w %d6u,%d1l,<<,10(%a6)&,%d2 + mac.w %d6u,%d1l,<<,10(%a6)&,%a7 + mac.w %d6u,%d1l,<<,-(%a1),%d1 + mac.w %d6u,%d1l,<<,-(%a1),%a3 + mac.w %d6u,%d1l,<<,-(%a1),%d2 + mac.w %d6u,%d1l,<<,-(%a1),%a7 + mac.w %d6u,%d1l,<<,-(%a1)&,%d1 + mac.w %d6u,%d1l,<<,-(%a1)&,%a3 + mac.w %d6u,%d1l,<<,-(%a1)&,%d2 + mac.w %d6u,%d1l,<<,-(%a1)&,%a7 + mac.w %d6u,%d1l,>>,(%a3),%d1 + mac.w %d6u,%d1l,>>,(%a3),%a3 + mac.w %d6u,%d1l,>>,(%a3),%d2 + mac.w %d6u,%d1l,>>,(%a3),%a7 + mac.w %d6u,%d1l,>>,(%a3)&,%d1 + mac.w %d6u,%d1l,>>,(%a3)&,%a3 + mac.w %d6u,%d1l,>>,(%a3)&,%d2 + mac.w %d6u,%d1l,>>,(%a3)&,%a7 + mac.w %d6u,%d1l,>>,(%a2)+,%d1 + mac.w %d6u,%d1l,>>,(%a2)+,%a3 + mac.w %d6u,%d1l,>>,(%a2)+,%d2 + mac.w %d6u,%d1l,>>,(%a2)+,%a7 + mac.w %d6u,%d1l,>>,(%a2)+&,%d1 + mac.w %d6u,%d1l,>>,(%a2)+&,%a3 + mac.w %d6u,%d1l,>>,(%a2)+&,%d2 + mac.w %d6u,%d1l,>>,(%a2)+&,%a7 + mac.w %d6u,%d1l,>>,10(%a6),%d1 + mac.w %d6u,%d1l,>>,10(%a6),%a3 + mac.w %d6u,%d1l,>>,10(%a6),%d2 + mac.w %d6u,%d1l,>>,10(%a6),%a7 + mac.w %d6u,%d1l,>>,10(%a6)&,%d1 + mac.w %d6u,%d1l,>>,10(%a6)&,%a3 + mac.w %d6u,%d1l,>>,10(%a6)&,%d2 + mac.w %d6u,%d1l,>>,10(%a6)&,%a7 + mac.w %d6u,%d1l,>>,-(%a1),%d1 + mac.w %d6u,%d1l,>>,-(%a1),%a3 + mac.w %d6u,%d1l,>>,-(%a1),%d2 + mac.w %d6u,%d1l,>>,-(%a1),%a7 + mac.w %d6u,%d1l,>>,-(%a1)&,%d1 + mac.w %d6u,%d1l,>>,-(%a1)&,%a3 + mac.w %d6u,%d1l,>>,-(%a1)&,%d2 + mac.w %d6u,%d1l,>>,-(%a1)&,%a7 + mac.w %d6u,%d1l,#1,(%a3),%d1 + mac.w %d6u,%d1l,#1,(%a3),%a3 + mac.w %d6u,%d1l,#1,(%a3),%d2 + mac.w %d6u,%d1l,#1,(%a3),%a7 + mac.w %d6u,%d1l,#1,(%a3)&,%d1 + mac.w %d6u,%d1l,#1,(%a3)&,%a3 + mac.w %d6u,%d1l,#1,(%a3)&,%d2 + mac.w %d6u,%d1l,#1,(%a3)&,%a7 + mac.w %d6u,%d1l,#1,(%a2)+,%d1 + mac.w %d6u,%d1l,#1,(%a2)+,%a3 + mac.w %d6u,%d1l,#1,(%a2)+,%d2 + mac.w %d6u,%d1l,#1,(%a2)+,%a7 + mac.w %d6u,%d1l,#1,(%a2)+&,%d1 + mac.w %d6u,%d1l,#1,(%a2)+&,%a3 + mac.w %d6u,%d1l,#1,(%a2)+&,%d2 + mac.w %d6u,%d1l,#1,(%a2)+&,%a7 + mac.w %d6u,%d1l,#1,10(%a6),%d1 + mac.w %d6u,%d1l,#1,10(%a6),%a3 + mac.w %d6u,%d1l,#1,10(%a6),%d2 + mac.w %d6u,%d1l,#1,10(%a6),%a7 + mac.w %d6u,%d1l,#1,10(%a6)&,%d1 + mac.w %d6u,%d1l,#1,10(%a6)&,%a3 + mac.w %d6u,%d1l,#1,10(%a6)&,%d2 + mac.w %d6u,%d1l,#1,10(%a6)&,%a7 + mac.w %d6u,%d1l,#1,-(%a1),%d1 + mac.w %d6u,%d1l,#1,-(%a1),%a3 + mac.w %d6u,%d1l,#1,-(%a1),%d2 + mac.w %d6u,%d1l,#1,-(%a1),%a7 + mac.w %d6u,%d1l,#1,-(%a1)&,%d1 + mac.w %d6u,%d1l,#1,-(%a1)&,%a3 + mac.w %d6u,%d1l,#1,-(%a1)&,%d2 + mac.w %d6u,%d1l,#1,-(%a1)&,%a7 + mac.w %d6u,%d1l,#-1,(%a3),%d1 + mac.w %d6u,%d1l,#-1,(%a3),%a3 + mac.w %d6u,%d1l,#-1,(%a3),%d2 + mac.w %d6u,%d1l,#-1,(%a3),%a7 + mac.w %d6u,%d1l,#-1,(%a3)&,%d1 + mac.w %d6u,%d1l,#-1,(%a3)&,%a3 + mac.w %d6u,%d1l,#-1,(%a3)&,%d2 + mac.w %d6u,%d1l,#-1,(%a3)&,%a7 + mac.w %d6u,%d1l,#-1,(%a2)+,%d1 + mac.w %d6u,%d1l,#-1,(%a2)+,%a3 + mac.w %d6u,%d1l,#-1,(%a2)+,%d2 + mac.w %d6u,%d1l,#-1,(%a2)+,%a7 + mac.w %d6u,%d1l,#-1,(%a2)+&,%d1 + mac.w %d6u,%d1l,#-1,(%a2)+&,%a3 + mac.w %d6u,%d1l,#-1,(%a2)+&,%d2 + mac.w %d6u,%d1l,#-1,(%a2)+&,%a7 + mac.w %d6u,%d1l,#-1,10(%a6),%d1 + mac.w %d6u,%d1l,#-1,10(%a6),%a3 + mac.w %d6u,%d1l,#-1,10(%a6),%d2 + mac.w %d6u,%d1l,#-1,10(%a6),%a7 + mac.w %d6u,%d1l,#-1,10(%a6)&,%d1 + mac.w %d6u,%d1l,#-1,10(%a6)&,%a3 + mac.w %d6u,%d1l,#-1,10(%a6)&,%d2 + mac.w %d6u,%d1l,#-1,10(%a6)&,%a7 + mac.w %d6u,%d1l,#-1,-(%a1),%d1 + mac.w %d6u,%d1l,#-1,-(%a1),%a3 + mac.w %d6u,%d1l,#-1,-(%a1),%d2 + mac.w %d6u,%d1l,#-1,-(%a1),%a7 + mac.w %d6u,%d1l,#-1,-(%a1)&,%d1 + mac.w %d6u,%d1l,#-1,-(%a1)&,%a3 + mac.w %d6u,%d1l,#-1,-(%a1)&,%d2 + mac.w %d6u,%d1l,#-1,-(%a1)&,%a7 + + mac.l %a1,%a3 + mac.l %a1,%a3,<< + mac.l %a1,%a3,>> + mac.l %a1,%a3,#1 + mac.l %a1,%a3,#-1 + mac.l %a1,%d4 + mac.l %a1,%d4,<< + mac.l %a1,%d4,>> + mac.l %a1,%d4,#1 + mac.l %a1,%d4,#-1 + mac.l %d6,%a3 + mac.l %d6,%a3,<< + mac.l %d6,%a3,>> + mac.l %d6,%a3,#1 + mac.l %d6,%a3,#-1 + mac.l %d6,%d4 + mac.l %d6,%d4,<< + mac.l %d6,%d4,>> + mac.l %d6,%d4,#1 + mac.l %d6,%d4,#-1 + + mac.l %a1,%a3,(%a3),%d1 + mac.l %a1,%a3,(%a3),%a3 + mac.l %a1,%a3,(%a3),%d2 + mac.l %a1,%a3,(%a3),%a7 + mac.l %a1,%a3,(%a3)&,%d1 + mac.l %a1,%a3,(%a3)&,%a3 + mac.l %a1,%a3,(%a3)&,%d2 + mac.l %a1,%a3,(%a3)&,%a7 + mac.l %a1,%a3,(%a2)+,%d1 + mac.l %a1,%a3,(%a2)+,%a3 + mac.l %a1,%a3,(%a2)+,%d2 + mac.l %a1,%a3,(%a2)+,%a7 + mac.l %a1,%a3,(%a2)+&,%d1 + mac.l %a1,%a3,(%a2)+&,%a3 + mac.l %a1,%a3,(%a2)+&,%d2 + mac.l %a1,%a3,(%a2)+&,%a7 + mac.l %a1,%a3,10(%a6),%d1 + mac.l %a1,%a3,10(%a6),%a3 + mac.l %a1,%a3,10(%a6),%d2 + mac.l %a1,%a3,10(%a6),%a7 + mac.l %a1,%a3,10(%a6)&,%d1 + mac.l %a1,%a3,10(%a6)&,%a3 + mac.l %a1,%a3,10(%a6)&,%d2 + mac.l %a1,%a3,10(%a6)&,%a7 + mac.l %a1,%a3,-(%a1),%d1 + mac.l %a1,%a3,-(%a1),%a3 + mac.l %a1,%a3,-(%a1),%d2 + mac.l %a1,%a3,-(%a1),%a7 + mac.l %a1,%a3,-(%a1)&,%d1 + mac.l %a1,%a3,-(%a1)&,%a3 + mac.l %a1,%a3,-(%a1)&,%d2 + mac.l %a1,%a3,-(%a1)&,%a7 + mac.l %a1,%a3,<<,(%a3),%d1 + mac.l %a1,%a3,<<,(%a3),%a3 + mac.l %a1,%a3,<<,(%a3),%d2 + mac.l %a1,%a3,<<,(%a3),%a7 + mac.l %a1,%a3,<<,(%a3)&,%d1 + mac.l %a1,%a3,<<,(%a3)&,%a3 + mac.l %a1,%a3,<<,(%a3)&,%d2 + mac.l %a1,%a3,<<,(%a3)&,%a7 + mac.l %a1,%a3,<<,(%a2)+,%d1 + mac.l %a1,%a3,<<,(%a2)+,%a3 + mac.l %a1,%a3,<<,(%a2)+,%d2 + mac.l %a1,%a3,<<,(%a2)+,%a7 + mac.l %a1,%a3,<<,(%a2)+&,%d1 + mac.l %a1,%a3,<<,(%a2)+&,%a3 + mac.l %a1,%a3,<<,(%a2)+&,%d2 + mac.l %a1,%a3,<<,(%a2)+&,%a7 + mac.l %a1,%a3,<<,10(%a6),%d1 + mac.l %a1,%a3,<<,10(%a6),%a3 + mac.l %a1,%a3,<<,10(%a6),%d2 + mac.l %a1,%a3,<<,10(%a6),%a7 + mac.l %a1,%a3,<<,10(%a6)&,%d1 + mac.l %a1,%a3,<<,10(%a6)&,%a3 + mac.l %a1,%a3,<<,10(%a6)&,%d2 + mac.l %a1,%a3,<<,10(%a6)&,%a7 + mac.l %a1,%a3,<<,-(%a1),%d1 + mac.l %a1,%a3,<<,-(%a1),%a3 + mac.l %a1,%a3,<<,-(%a1),%d2 + mac.l %a1,%a3,<<,-(%a1),%a7 + mac.l %a1,%a3,<<,-(%a1)&,%d1 + mac.l %a1,%a3,<<,-(%a1)&,%a3 + mac.l %a1,%a3,<<,-(%a1)&,%d2 + mac.l %a1,%a3,<<,-(%a1)&,%a7 + mac.l %a1,%a3,>>,(%a3),%d1 + mac.l %a1,%a3,>>,(%a3),%a3 + mac.l %a1,%a3,>>,(%a3),%d2 + mac.l %a1,%a3,>>,(%a3),%a7 + mac.l %a1,%a3,>>,(%a3)&,%d1 + mac.l %a1,%a3,>>,(%a3)&,%a3 + mac.l %a1,%a3,>>,(%a3)&,%d2 + mac.l %a1,%a3,>>,(%a3)&,%a7 + mac.l %a1,%a3,>>,(%a2)+,%d1 + mac.l %a1,%a3,>>,(%a2)+,%a3 + mac.l %a1,%a3,>>,(%a2)+,%d2 + mac.l %a1,%a3,>>,(%a2)+,%a7 + mac.l %a1,%a3,>>,(%a2)+&,%d1 + mac.l %a1,%a3,>>,(%a2)+&,%a3 + mac.l %a1,%a3,>>,(%a2)+&,%d2 + mac.l %a1,%a3,>>,(%a2)+&,%a7 + mac.l %a1,%a3,>>,10(%a6),%d1 + mac.l %a1,%a3,>>,10(%a6),%a3 + mac.l %a1,%a3,>>,10(%a6),%d2 + mac.l %a1,%a3,>>,10(%a6),%a7 + mac.l %a1,%a3,>>,10(%a6)&,%d1 + mac.l %a1,%a3,>>,10(%a6)&,%a3 + mac.l %a1,%a3,>>,10(%a6)&,%d2 + mac.l %a1,%a3,>>,10(%a6)&,%a7 + mac.l %a1,%a3,>>,-(%a1),%d1 + mac.l %a1,%a3,>>,-(%a1),%a3 + mac.l %a1,%a3,>>,-(%a1),%d2 + mac.l %a1,%a3,>>,-(%a1),%a7 + mac.l %a1,%a3,>>,-(%a1)&,%d1 + mac.l %a1,%a3,>>,-(%a1)&,%a3 + mac.l %a1,%a3,>>,-(%a1)&,%d2 + mac.l %a1,%a3,>>,-(%a1)&,%a7 + mac.l %a1,%a3,#1,(%a3),%d1 + mac.l %a1,%a3,#1,(%a3),%a3 + mac.l %a1,%a3,#1,(%a3),%d2 + mac.l %a1,%a3,#1,(%a3),%a7 + mac.l %a1,%a3,#1,(%a3)&,%d1 + mac.l %a1,%a3,#1,(%a3)&,%a3 + mac.l %a1,%a3,#1,(%a3)&,%d2 + mac.l %a1,%a3,#1,(%a3)&,%a7 + mac.l %a1,%a3,#1,(%a2)+,%d1 + mac.l %a1,%a3,#1,(%a2)+,%a3 + mac.l %a1,%a3,#1,(%a2)+,%d2 + mac.l %a1,%a3,#1,(%a2)+,%a7 + mac.l %a1,%a3,#1,(%a2)+&,%d1 + mac.l %a1,%a3,#1,(%a2)+&,%a3 + mac.l %a1,%a3,#1,(%a2)+&,%d2 + mac.l %a1,%a3,#1,(%a2)+&,%a7 + mac.l %a1,%a3,#1,10(%a6),%d1 + mac.l %a1,%a3,#1,10(%a6),%a3 + mac.l %a1,%a3,#1,10(%a6),%d2 + mac.l %a1,%a3,#1,10(%a6),%a7 + mac.l %a1,%a3,#1,10(%a6)&,%d1 + mac.l %a1,%a3,#1,10(%a6)&,%a3 + mac.l %a1,%a3,#1,10(%a6)&,%d2 + mac.l %a1,%a3,#1,10(%a6)&,%a7 + mac.l %a1,%a3,#1,-(%a1),%d1 + mac.l %a1,%a3,#1,-(%a1),%a3 + mac.l %a1,%a3,#1,-(%a1),%d2 + mac.l %a1,%a3,#1,-(%a1),%a7 + mac.l %a1,%a3,#1,-(%a1)&,%d1 + mac.l %a1,%a3,#1,-(%a1)&,%a3 + mac.l %a1,%a3,#1,-(%a1)&,%d2 + mac.l %a1,%a3,#1,-(%a1)&,%a7 + mac.l %a1,%a3,#-1,(%a3),%d1 + mac.l %a1,%a3,#-1,(%a3),%a3 + mac.l %a1,%a3,#-1,(%a3),%d2 + mac.l %a1,%a3,#-1,(%a3),%a7 + mac.l %a1,%a3,#-1,(%a3)&,%d1 + mac.l %a1,%a3,#-1,(%a3)&,%a3 + mac.l %a1,%a3,#-1,(%a3)&,%d2 + mac.l %a1,%a3,#-1,(%a3)&,%a7 + mac.l %a1,%a3,#-1,(%a2)+,%d1 + mac.l %a1,%a3,#-1,(%a2)+,%a3 + mac.l %a1,%a3,#-1,(%a2)+,%d2 + mac.l %a1,%a3,#-1,(%a2)+,%a7 + mac.l %a1,%a3,#-1,(%a2)+&,%d1 + mac.l %a1,%a3,#-1,(%a2)+&,%a3 + mac.l %a1,%a3,#-1,(%a2)+&,%d2 + mac.l %a1,%a3,#-1,(%a2)+&,%a7 + mac.l %a1,%a3,#-1,10(%a6),%d1 + mac.l %a1,%a3,#-1,10(%a6),%a3 + mac.l %a1,%a3,#-1,10(%a6),%d2 + mac.l %a1,%a3,#-1,10(%a6),%a7 + mac.l %a1,%a3,#-1,10(%a6)&,%d1 + mac.l %a1,%a3,#-1,10(%a6)&,%a3 + mac.l %a1,%a3,#-1,10(%a6)&,%d2 + mac.l %a1,%a3,#-1,10(%a6)&,%a7 + mac.l %a1,%a3,#-1,-(%a1),%d1 + mac.l %a1,%a3,#-1,-(%a1),%a3 + mac.l %a1,%a3,#-1,-(%a1),%d2 + mac.l %a1,%a3,#-1,-(%a1),%a7 + mac.l %a1,%a3,#-1,-(%a1)&,%d1 + mac.l %a1,%a3,#-1,-(%a1)&,%a3 + mac.l %a1,%a3,#-1,-(%a1)&,%d2 + mac.l %a1,%a3,#-1,-(%a1)&,%a7 + mac.l %a1,%d4,(%a3),%d1 + mac.l %a1,%d4,(%a3),%a3 + mac.l %a1,%d4,(%a3),%d2 + mac.l %a1,%d4,(%a3),%a7 + mac.l %a1,%d4,(%a3)&,%d1 + mac.l %a1,%d4,(%a3)&,%a3 + mac.l %a1,%d4,(%a3)&,%d2 + mac.l %a1,%d4,(%a3)&,%a7 + mac.l %a1,%d4,(%a2)+,%d1 + mac.l %a1,%d4,(%a2)+,%a3 + mac.l %a1,%d4,(%a2)+,%d2 + mac.l %a1,%d4,(%a2)+,%a7 + mac.l %a1,%d4,(%a2)+&,%d1 + mac.l %a1,%d4,(%a2)+&,%a3 + mac.l %a1,%d4,(%a2)+&,%d2 + mac.l %a1,%d4,(%a2)+&,%a7 + mac.l %a1,%d4,10(%a6),%d1 + mac.l %a1,%d4,10(%a6),%a3 + mac.l %a1,%d4,10(%a6),%d2 + mac.l %a1,%d4,10(%a6),%a7 + mac.l %a1,%d4,10(%a6)&,%d1 + mac.l %a1,%d4,10(%a6)&,%a3 + mac.l %a1,%d4,10(%a6)&,%d2 + mac.l %a1,%d4,10(%a6)&,%a7 + mac.l %a1,%d4,-(%a1),%d1 + mac.l %a1,%d4,-(%a1),%a3 + mac.l %a1,%d4,-(%a1),%d2 + mac.l %a1,%d4,-(%a1),%a7 + mac.l %a1,%d4,-(%a1)&,%d1 + mac.l %a1,%d4,-(%a1)&,%a3 + mac.l %a1,%d4,-(%a1)&,%d2 + mac.l %a1,%d4,-(%a1)&,%a7 + mac.l %a1,%d4,<<,(%a3),%d1 + mac.l %a1,%d4,<<,(%a3),%a3 + mac.l %a1,%d4,<<,(%a3),%d2 + mac.l %a1,%d4,<<,(%a3),%a7 + mac.l %a1,%d4,<<,(%a3)&,%d1 + mac.l %a1,%d4,<<,(%a3)&,%a3 + mac.l %a1,%d4,<<,(%a3)&,%d2 + mac.l %a1,%d4,<<,(%a3)&,%a7 + mac.l %a1,%d4,<<,(%a2)+,%d1 + mac.l %a1,%d4,<<,(%a2)+,%a3 + mac.l %a1,%d4,<<,(%a2)+,%d2 + mac.l %a1,%d4,<<,(%a2)+,%a7 + mac.l %a1,%d4,<<,(%a2)+&,%d1 + mac.l %a1,%d4,<<,(%a2)+&,%a3 + mac.l %a1,%d4,<<,(%a2)+&,%d2 + mac.l %a1,%d4,<<,(%a2)+&,%a7 + mac.l %a1,%d4,<<,10(%a6),%d1 + mac.l %a1,%d4,<<,10(%a6),%a3 + mac.l %a1,%d4,<<,10(%a6),%d2 + mac.l %a1,%d4,<<,10(%a6),%a7 + mac.l %a1,%d4,<<,10(%a6)&,%d1 + mac.l %a1,%d4,<<,10(%a6)&,%a3 + mac.l %a1,%d4,<<,10(%a6)&,%d2 + mac.l %a1,%d4,<<,10(%a6)&,%a7 + mac.l %a1,%d4,<<,-(%a1),%d1 + mac.l %a1,%d4,<<,-(%a1),%a3 + mac.l %a1,%d4,<<,-(%a1),%d2 + mac.l %a1,%d4,<<,-(%a1),%a7 + mac.l %a1,%d4,<<,-(%a1)&,%d1 + mac.l %a1,%d4,<<,-(%a1)&,%a3 + mac.l %a1,%d4,<<,-(%a1)&,%d2 + mac.l %a1,%d4,<<,-(%a1)&,%a7 + mac.l %a1,%d4,>>,(%a3),%d1 + mac.l %a1,%d4,>>,(%a3),%a3 + mac.l %a1,%d4,>>,(%a3),%d2 + mac.l %a1,%d4,>>,(%a3),%a7 + mac.l %a1,%d4,>>,(%a3)&,%d1 + mac.l %a1,%d4,>>,(%a3)&,%a3 + mac.l %a1,%d4,>>,(%a3)&,%d2 + mac.l %a1,%d4,>>,(%a3)&,%a7 + mac.l %a1,%d4,>>,(%a2)+,%d1 + mac.l %a1,%d4,>>,(%a2)+,%a3 + mac.l %a1,%d4,>>,(%a2)+,%d2 + mac.l %a1,%d4,>>,(%a2)+,%a7 + mac.l %a1,%d4,>>,(%a2)+&,%d1 + mac.l %a1,%d4,>>,(%a2)+&,%a3 + mac.l %a1,%d4,>>,(%a2)+&,%d2 + mac.l %a1,%d4,>>,(%a2)+&,%a7 + mac.l %a1,%d4,>>,10(%a6),%d1 + mac.l %a1,%d4,>>,10(%a6),%a3 + mac.l %a1,%d4,>>,10(%a6),%d2 + mac.l %a1,%d4,>>,10(%a6),%a7 + mac.l %a1,%d4,>>,10(%a6)&,%d1 + mac.l %a1,%d4,>>,10(%a6)&,%a3 + mac.l %a1,%d4,>>,10(%a6)&,%d2 + mac.l %a1,%d4,>>,10(%a6)&,%a7 + mac.l %a1,%d4,>>,-(%a1),%d1 + mac.l %a1,%d4,>>,-(%a1),%a3 + mac.l %a1,%d4,>>,-(%a1),%d2 + mac.l %a1,%d4,>>,-(%a1),%a7 + mac.l %a1,%d4,>>,-(%a1)&,%d1 + mac.l %a1,%d4,>>,-(%a1)&,%a3 + mac.l %a1,%d4,>>,-(%a1)&,%d2 + mac.l %a1,%d4,>>,-(%a1)&,%a7 + mac.l %a1,%d4,#1,(%a3),%d1 + mac.l %a1,%d4,#1,(%a3),%a3 + mac.l %a1,%d4,#1,(%a3),%d2 + mac.l %a1,%d4,#1,(%a3),%a7 + mac.l %a1,%d4,#1,(%a3)&,%d1 + mac.l %a1,%d4,#1,(%a3)&,%a3 + mac.l %a1,%d4,#1,(%a3)&,%d2 + mac.l %a1,%d4,#1,(%a3)&,%a7 + mac.l %a1,%d4,#1,(%a2)+,%d1 + mac.l %a1,%d4,#1,(%a2)+,%a3 + mac.l %a1,%d4,#1,(%a2)+,%d2 + mac.l %a1,%d4,#1,(%a2)+,%a7 + mac.l %a1,%d4,#1,(%a2)+&,%d1 + mac.l %a1,%d4,#1,(%a2)+&,%a3 + mac.l %a1,%d4,#1,(%a2)+&,%d2 + mac.l %a1,%d4,#1,(%a2)+&,%a7 + mac.l %a1,%d4,#1,10(%a6),%d1 + mac.l %a1,%d4,#1,10(%a6),%a3 + mac.l %a1,%d4,#1,10(%a6),%d2 + mac.l %a1,%d4,#1,10(%a6),%a7 + mac.l %a1,%d4,#1,10(%a6)&,%d1 + mac.l %a1,%d4,#1,10(%a6)&,%a3 + mac.l %a1,%d4,#1,10(%a6)&,%d2 + mac.l %a1,%d4,#1,10(%a6)&,%a7 + mac.l %a1,%d4,#1,-(%a1),%d1 + mac.l %a1,%d4,#1,-(%a1),%a3 + mac.l %a1,%d4,#1,-(%a1),%d2 + mac.l %a1,%d4,#1,-(%a1),%a7 + mac.l %a1,%d4,#1,-(%a1)&,%d1 + mac.l %a1,%d4,#1,-(%a1)&,%a3 + mac.l %a1,%d4,#1,-(%a1)&,%d2 + mac.l %a1,%d4,#1,-(%a1)&,%a7 + mac.l %a1,%d4,#-1,(%a3),%d1 + mac.l %a1,%d4,#-1,(%a3),%a3 + mac.l %a1,%d4,#-1,(%a3),%d2 + mac.l %a1,%d4,#-1,(%a3),%a7 + mac.l %a1,%d4,#-1,(%a3)&,%d1 + mac.l %a1,%d4,#-1,(%a3)&,%a3 + mac.l %a1,%d4,#-1,(%a3)&,%d2 + mac.l %a1,%d4,#-1,(%a3)&,%a7 + mac.l %a1,%d4,#-1,(%a2)+,%d1 + mac.l %a1,%d4,#-1,(%a2)+,%a3 + mac.l %a1,%d4,#-1,(%a2)+,%d2 + mac.l %a1,%d4,#-1,(%a2)+,%a7 + mac.l %a1,%d4,#-1,(%a2)+&,%d1 + mac.l %a1,%d4,#-1,(%a2)+&,%a3 + mac.l %a1,%d4,#-1,(%a2)+&,%d2 + mac.l %a1,%d4,#-1,(%a2)+&,%a7 + mac.l %a1,%d4,#-1,10(%a6),%d1 + mac.l %a1,%d4,#-1,10(%a6),%a3 + mac.l %a1,%d4,#-1,10(%a6),%d2 + mac.l %a1,%d4,#-1,10(%a6),%a7 + mac.l %a1,%d4,#-1,10(%a6)&,%d1 + mac.l %a1,%d4,#-1,10(%a6)&,%a3 + mac.l %a1,%d4,#-1,10(%a6)&,%d2 + mac.l %a1,%d4,#-1,10(%a6)&,%a7 + mac.l %a1,%d4,#-1,-(%a1),%d1 + mac.l %a1,%d4,#-1,-(%a1),%a3 + mac.l %a1,%d4,#-1,-(%a1),%d2 + mac.l %a1,%d4,#-1,-(%a1),%a7 + mac.l %a1,%d4,#-1,-(%a1)&,%d1 + mac.l %a1,%d4,#-1,-(%a1)&,%a3 + mac.l %a1,%d4,#-1,-(%a1)&,%d2 + mac.l %a1,%d4,#-1,-(%a1)&,%a7 + mac.l %d6,%a3,(%a3),%d1 + mac.l %d6,%a3,(%a3),%a3 + mac.l %d6,%a3,(%a3),%d2 + mac.l %d6,%a3,(%a3),%a7 + mac.l %d6,%a3,(%a3)&,%d1 + mac.l %d6,%a3,(%a3)&,%a3 + mac.l %d6,%a3,(%a3)&,%d2 + mac.l %d6,%a3,(%a3)&,%a7 + mac.l %d6,%a3,(%a2)+,%d1 + mac.l %d6,%a3,(%a2)+,%a3 + mac.l %d6,%a3,(%a2)+,%d2 + mac.l %d6,%a3,(%a2)+,%a7 + mac.l %d6,%a3,(%a2)+&,%d1 + mac.l %d6,%a3,(%a2)+&,%a3 + mac.l %d6,%a3,(%a2)+&,%d2 + mac.l %d6,%a3,(%a2)+&,%a7 + mac.l %d6,%a3,10(%a6),%d1 + mac.l %d6,%a3,10(%a6),%a3 + mac.l %d6,%a3,10(%a6),%d2 + mac.l %d6,%a3,10(%a6),%a7 + mac.l %d6,%a3,10(%a6)&,%d1 + mac.l %d6,%a3,10(%a6)&,%a3 + mac.l %d6,%a3,10(%a6)&,%d2 + mac.l %d6,%a3,10(%a6)&,%a7 + mac.l %d6,%a3,-(%a1),%d1 + mac.l %d6,%a3,-(%a1),%a3 + mac.l %d6,%a3,-(%a1),%d2 + mac.l %d6,%a3,-(%a1),%a7 + mac.l %d6,%a3,-(%a1)&,%d1 + mac.l %d6,%a3,-(%a1)&,%a3 + mac.l %d6,%a3,-(%a1)&,%d2 + mac.l %d6,%a3,-(%a1)&,%a7 + mac.l %d6,%a3,<<,(%a3),%d1 + mac.l %d6,%a3,<<,(%a3),%a3 + mac.l %d6,%a3,<<,(%a3),%d2 + mac.l %d6,%a3,<<,(%a3),%a7 + mac.l %d6,%a3,<<,(%a3)&,%d1 + mac.l %d6,%a3,<<,(%a3)&,%a3 + mac.l %d6,%a3,<<,(%a3)&,%d2 + mac.l %d6,%a3,<<,(%a3)&,%a7 + mac.l %d6,%a3,<<,(%a2)+,%d1 + mac.l %d6,%a3,<<,(%a2)+,%a3 + mac.l %d6,%a3,<<,(%a2)+,%d2 + mac.l %d6,%a3,<<,(%a2)+,%a7 + mac.l %d6,%a3,<<,(%a2)+&,%d1 + mac.l %d6,%a3,<<,(%a2)+&,%a3 + mac.l %d6,%a3,<<,(%a2)+&,%d2 + mac.l %d6,%a3,<<,(%a2)+&,%a7 + mac.l %d6,%a3,<<,10(%a6),%d1 + mac.l %d6,%a3,<<,10(%a6),%a3 + mac.l %d6,%a3,<<,10(%a6),%d2 + mac.l %d6,%a3,<<,10(%a6),%a7 + mac.l %d6,%a3,<<,10(%a6)&,%d1 + mac.l %d6,%a3,<<,10(%a6)&,%a3 + mac.l %d6,%a3,<<,10(%a6)&,%d2 + mac.l %d6,%a3,<<,10(%a6)&,%a7 + mac.l %d6,%a3,<<,-(%a1),%d1 + mac.l %d6,%a3,<<,-(%a1),%a3 + mac.l %d6,%a3,<<,-(%a1),%d2 + mac.l %d6,%a3,<<,-(%a1),%a7 + mac.l %d6,%a3,<<,-(%a1)&,%d1 + mac.l %d6,%a3,<<,-(%a1)&,%a3 + mac.l %d6,%a3,<<,-(%a1)&,%d2 + mac.l %d6,%a3,<<,-(%a1)&,%a7 + mac.l %d6,%a3,>>,(%a3),%d1 + mac.l %d6,%a3,>>,(%a3),%a3 + mac.l %d6,%a3,>>,(%a3),%d2 + mac.l %d6,%a3,>>,(%a3),%a7 + mac.l %d6,%a3,>>,(%a3)&,%d1 + mac.l %d6,%a3,>>,(%a3)&,%a3 + mac.l %d6,%a3,>>,(%a3)&,%d2 + mac.l %d6,%a3,>>,(%a3)&,%a7 + mac.l %d6,%a3,>>,(%a2)+,%d1 + mac.l %d6,%a3,>>,(%a2)+,%a3 + mac.l %d6,%a3,>>,(%a2)+,%d2 + mac.l %d6,%a3,>>,(%a2)+,%a7 + mac.l %d6,%a3,>>,(%a2)+&,%d1 + mac.l %d6,%a3,>>,(%a2)+&,%a3 + mac.l %d6,%a3,>>,(%a2)+&,%d2 + mac.l %d6,%a3,>>,(%a2)+&,%a7 + mac.l %d6,%a3,>>,10(%a6),%d1 + mac.l %d6,%a3,>>,10(%a6),%a3 + mac.l %d6,%a3,>>,10(%a6),%d2 + mac.l %d6,%a3,>>,10(%a6),%a7 + mac.l %d6,%a3,>>,10(%a6)&,%d1 + mac.l %d6,%a3,>>,10(%a6)&,%a3 + mac.l %d6,%a3,>>,10(%a6)&,%d2 + mac.l %d6,%a3,>>,10(%a6)&,%a7 + mac.l %d6,%a3,>>,-(%a1),%d1 + mac.l %d6,%a3,>>,-(%a1),%a3 + mac.l %d6,%a3,>>,-(%a1),%d2 + mac.l %d6,%a3,>>,-(%a1),%a7 + mac.l %d6,%a3,>>,-(%a1)&,%d1 + mac.l %d6,%a3,>>,-(%a1)&,%a3 + mac.l %d6,%a3,>>,-(%a1)&,%d2 + mac.l %d6,%a3,>>,-(%a1)&,%a7 + mac.l %d6,%a3,#1,(%a3),%d1 + mac.l %d6,%a3,#1,(%a3),%a3 + mac.l %d6,%a3,#1,(%a3),%d2 + mac.l %d6,%a3,#1,(%a3),%a7 + mac.l %d6,%a3,#1,(%a3)&,%d1 + mac.l %d6,%a3,#1,(%a3)&,%a3 + mac.l %d6,%a3,#1,(%a3)&,%d2 + mac.l %d6,%a3,#1,(%a3)&,%a7 + mac.l %d6,%a3,#1,(%a2)+,%d1 + mac.l %d6,%a3,#1,(%a2)+,%a3 + mac.l %d6,%a3,#1,(%a2)+,%d2 + mac.l %d6,%a3,#1,(%a2)+,%a7 + mac.l %d6,%a3,#1,(%a2)+&,%d1 + mac.l %d6,%a3,#1,(%a2)+&,%a3 + mac.l %d6,%a3,#1,(%a2)+&,%d2 + mac.l %d6,%a3,#1,(%a2)+&,%a7 + mac.l %d6,%a3,#1,10(%a6),%d1 + mac.l %d6,%a3,#1,10(%a6),%a3 + mac.l %d6,%a3,#1,10(%a6),%d2 + mac.l %d6,%a3,#1,10(%a6),%a7 + mac.l %d6,%a3,#1,10(%a6)&,%d1 + mac.l %d6,%a3,#1,10(%a6)&,%a3 + mac.l %d6,%a3,#1,10(%a6)&,%d2 + mac.l %d6,%a3,#1,10(%a6)&,%a7 + mac.l %d6,%a3,#1,-(%a1),%d1 + mac.l %d6,%a3,#1,-(%a1),%a3 + mac.l %d6,%a3,#1,-(%a1),%d2 + mac.l %d6,%a3,#1,-(%a1),%a7 + mac.l %d6,%a3,#1,-(%a1)&,%d1 + mac.l %d6,%a3,#1,-(%a1)&,%a3 + mac.l %d6,%a3,#1,-(%a1)&,%d2 + mac.l %d6,%a3,#1,-(%a1)&,%a7 + mac.l %d6,%a3,#-1,(%a3),%d1 + mac.l %d6,%a3,#-1,(%a3),%a3 + mac.l %d6,%a3,#-1,(%a3),%d2 + mac.l %d6,%a3,#-1,(%a3),%a7 + mac.l %d6,%a3,#-1,(%a3)&,%d1 + mac.l %d6,%a3,#-1,(%a3)&,%a3 + mac.l %d6,%a3,#-1,(%a3)&,%d2 + mac.l %d6,%a3,#-1,(%a3)&,%a7 + mac.l %d6,%a3,#-1,(%a2)+,%d1 + mac.l %d6,%a3,#-1,(%a2)+,%a3 + mac.l %d6,%a3,#-1,(%a2)+,%d2 + mac.l %d6,%a3,#-1,(%a2)+,%a7 + mac.l %d6,%a3,#-1,(%a2)+&,%d1 + mac.l %d6,%a3,#-1,(%a2)+&,%a3 + mac.l %d6,%a3,#-1,(%a2)+&,%d2 + mac.l %d6,%a3,#-1,(%a2)+&,%a7 + mac.l %d6,%a3,#-1,10(%a6),%d1 + mac.l %d6,%a3,#-1,10(%a6),%a3 + mac.l %d6,%a3,#-1,10(%a6),%d2 + mac.l %d6,%a3,#-1,10(%a6),%a7 + mac.l %d6,%a3,#-1,10(%a6)&,%d1 + mac.l %d6,%a3,#-1,10(%a6)&,%a3 + mac.l %d6,%a3,#-1,10(%a6)&,%d2 + mac.l %d6,%a3,#-1,10(%a6)&,%a7 + mac.l %d6,%a3,#-1,-(%a1),%d1 + mac.l %d6,%a3,#-1,-(%a1),%a3 + mac.l %d6,%a3,#-1,-(%a1),%d2 + mac.l %d6,%a3,#-1,-(%a1),%a7 + mac.l %d6,%a3,#-1,-(%a1)&,%d1 + mac.l %d6,%a3,#-1,-(%a1)&,%a3 + mac.l %d6,%a3,#-1,-(%a1)&,%d2 + mac.l %d6,%a3,#-1,-(%a1)&,%a7 + mac.l %d6,%d4,(%a3),%d1 + mac.l %d6,%d4,(%a3),%a3 + mac.l %d6,%d4,(%a3),%d2 + mac.l %d6,%d4,(%a3),%a7 + mac.l %d6,%d4,(%a3)&,%d1 + mac.l %d6,%d4,(%a3)&,%a3 + mac.l %d6,%d4,(%a3)&,%d2 + mac.l %d6,%d4,(%a3)&,%a7 + mac.l %d6,%d4,(%a2)+,%d1 + mac.l %d6,%d4,(%a2)+,%a3 + mac.l %d6,%d4,(%a2)+,%d2 + mac.l %d6,%d4,(%a2)+,%a7 + mac.l %d6,%d4,(%a2)+&,%d1 + mac.l %d6,%d4,(%a2)+&,%a3 + mac.l %d6,%d4,(%a2)+&,%d2 + mac.l %d6,%d4,(%a2)+&,%a7 + mac.l %d6,%d4,10(%a6),%d1 + mac.l %d6,%d4,10(%a6),%a3 + mac.l %d6,%d4,10(%a6),%d2 + mac.l %d6,%d4,10(%a6),%a7 + mac.l %d6,%d4,10(%a6)&,%d1 + mac.l %d6,%d4,10(%a6)&,%a3 + mac.l %d6,%d4,10(%a6)&,%d2 + mac.l %d6,%d4,10(%a6)&,%a7 + mac.l %d6,%d4,-(%a1),%d1 + mac.l %d6,%d4,-(%a1),%a3 + mac.l %d6,%d4,-(%a1),%d2 + mac.l %d6,%d4,-(%a1),%a7 + mac.l %d6,%d4,-(%a1)&,%d1 + mac.l %d6,%d4,-(%a1)&,%a3 + mac.l %d6,%d4,-(%a1)&,%d2 + mac.l %d6,%d4,-(%a1)&,%a7 + mac.l %d6,%d4,<<,(%a3),%d1 + mac.l %d6,%d4,<<,(%a3),%a3 + mac.l %d6,%d4,<<,(%a3),%d2 + mac.l %d6,%d4,<<,(%a3),%a7 + mac.l %d6,%d4,<<,(%a3)&,%d1 + mac.l %d6,%d4,<<,(%a3)&,%a3 + mac.l %d6,%d4,<<,(%a3)&,%d2 + mac.l %d6,%d4,<<,(%a3)&,%a7 + mac.l %d6,%d4,<<,(%a2)+,%d1 + mac.l %d6,%d4,<<,(%a2)+,%a3 + mac.l %d6,%d4,<<,(%a2)+,%d2 + mac.l %d6,%d4,<<,(%a2)+,%a7 + mac.l %d6,%d4,<<,(%a2)+&,%d1 + mac.l %d6,%d4,<<,(%a2)+&,%a3 + mac.l %d6,%d4,<<,(%a2)+&,%d2 + mac.l %d6,%d4,<<,(%a2)+&,%a7 + mac.l %d6,%d4,<<,10(%a6),%d1 + mac.l %d6,%d4,<<,10(%a6),%a3 + mac.l %d6,%d4,<<,10(%a6),%d2 + mac.l %d6,%d4,<<,10(%a6),%a7 + mac.l %d6,%d4,<<,10(%a6)&,%d1 + mac.l %d6,%d4,<<,10(%a6)&,%a3 + mac.l %d6,%d4,<<,10(%a6)&,%d2 + mac.l %d6,%d4,<<,10(%a6)&,%a7 + mac.l %d6,%d4,<<,-(%a1),%d1 + mac.l %d6,%d4,<<,-(%a1),%a3 + mac.l %d6,%d4,<<,-(%a1),%d2 + mac.l %d6,%d4,<<,-(%a1),%a7 + mac.l %d6,%d4,<<,-(%a1)&,%d1 + mac.l %d6,%d4,<<,-(%a1)&,%a3 + mac.l %d6,%d4,<<,-(%a1)&,%d2 + mac.l %d6,%d4,<<,-(%a1)&,%a7 + mac.l %d6,%d4,>>,(%a3),%d1 + mac.l %d6,%d4,>>,(%a3),%a3 + mac.l %d6,%d4,>>,(%a3),%d2 + mac.l %d6,%d4,>>,(%a3),%a7 + mac.l %d6,%d4,>>,(%a3)&,%d1 + mac.l %d6,%d4,>>,(%a3)&,%a3 + mac.l %d6,%d4,>>,(%a3)&,%d2 + mac.l %d6,%d4,>>,(%a3)&,%a7 + mac.l %d6,%d4,>>,(%a2)+,%d1 + mac.l %d6,%d4,>>,(%a2)+,%a3 + mac.l %d6,%d4,>>,(%a2)+,%d2 + mac.l %d6,%d4,>>,(%a2)+,%a7 + mac.l %d6,%d4,>>,(%a2)+&,%d1 + mac.l %d6,%d4,>>,(%a2)+&,%a3 + mac.l %d6,%d4,>>,(%a2)+&,%d2 + mac.l %d6,%d4,>>,(%a2)+&,%a7 + mac.l %d6,%d4,>>,10(%a6),%d1 + mac.l %d6,%d4,>>,10(%a6),%a3 + mac.l %d6,%d4,>>,10(%a6),%d2 + mac.l %d6,%d4,>>,10(%a6),%a7 + mac.l %d6,%d4,>>,10(%a6)&,%d1 + mac.l %d6,%d4,>>,10(%a6)&,%a3 + mac.l %d6,%d4,>>,10(%a6)&,%d2 + mac.l %d6,%d4,>>,10(%a6)&,%a7 + mac.l %d6,%d4,>>,-(%a1),%d1 + mac.l %d6,%d4,>>,-(%a1),%a3 + mac.l %d6,%d4,>>,-(%a1),%d2 + mac.l %d6,%d4,>>,-(%a1),%a7 + mac.l %d6,%d4,>>,-(%a1)&,%d1 + mac.l %d6,%d4,>>,-(%a1)&,%a3 + mac.l %d6,%d4,>>,-(%a1)&,%d2 + mac.l %d6,%d4,>>,-(%a1)&,%a7 + mac.l %d6,%d4,#1,(%a3),%d1 + mac.l %d6,%d4,#1,(%a3),%a3 + mac.l %d6,%d4,#1,(%a3),%d2 + mac.l %d6,%d4,#1,(%a3),%a7 + mac.l %d6,%d4,#1,(%a3)&,%d1 + mac.l %d6,%d4,#1,(%a3)&,%a3 + mac.l %d6,%d4,#1,(%a3)&,%d2 + mac.l %d6,%d4,#1,(%a3)&,%a7 + mac.l %d6,%d4,#1,(%a2)+,%d1 + mac.l %d6,%d4,#1,(%a2)+,%a3 + mac.l %d6,%d4,#1,(%a2)+,%d2 + mac.l %d6,%d4,#1,(%a2)+,%a7 + mac.l %d6,%d4,#1,(%a2)+&,%d1 + mac.l %d6,%d4,#1,(%a2)+&,%a3 + mac.l %d6,%d4,#1,(%a2)+&,%d2 + mac.l %d6,%d4,#1,(%a2)+&,%a7 + mac.l %d6,%d4,#1,10(%a6),%d1 + mac.l %d6,%d4,#1,10(%a6),%a3 + mac.l %d6,%d4,#1,10(%a6),%d2 + mac.l %d6,%d4,#1,10(%a6),%a7 + mac.l %d6,%d4,#1,10(%a6)&,%d1 + mac.l %d6,%d4,#1,10(%a6)&,%a3 + mac.l %d6,%d4,#1,10(%a6)&,%d2 + mac.l %d6,%d4,#1,10(%a6)&,%a7 + mac.l %d6,%d4,#1,-(%a1),%d1 + mac.l %d6,%d4,#1,-(%a1),%a3 + mac.l %d6,%d4,#1,-(%a1),%d2 + mac.l %d6,%d4,#1,-(%a1),%a7 + mac.l %d6,%d4,#1,-(%a1)&,%d1 + mac.l %d6,%d4,#1,-(%a1)&,%a3 + mac.l %d6,%d4,#1,-(%a1)&,%d2 + mac.l %d6,%d4,#1,-(%a1)&,%a7 + mac.l %d6,%d4,#-1,(%a3),%d1 + mac.l %d6,%d4,#-1,(%a3),%a3 + mac.l %d6,%d4,#-1,(%a3),%d2 + mac.l %d6,%d4,#-1,(%a3),%a7 + mac.l %d6,%d4,#-1,(%a3)&,%d1 + mac.l %d6,%d4,#-1,(%a3)&,%a3 + mac.l %d6,%d4,#-1,(%a3)&,%d2 + mac.l %d6,%d4,#-1,(%a3)&,%a7 + mac.l %d6,%d4,#-1,(%a2)+,%d1 + mac.l %d6,%d4,#-1,(%a2)+,%a3 + mac.l %d6,%d4,#-1,(%a2)+,%d2 + mac.l %d6,%d4,#-1,(%a2)+,%a7 + mac.l %d6,%d4,#-1,(%a2)+&,%d1 + mac.l %d6,%d4,#-1,(%a2)+&,%a3 + mac.l %d6,%d4,#-1,(%a2)+&,%d2 + mac.l %d6,%d4,#-1,(%a2)+&,%a7 + mac.l %d6,%d4,#-1,10(%a6),%d1 + mac.l %d6,%d4,#-1,10(%a6),%a3 + mac.l %d6,%d4,#-1,10(%a6),%d2 + mac.l %d6,%d4,#-1,10(%a6),%a7 + mac.l %d6,%d4,#-1,10(%a6)&,%d1 + mac.l %d6,%d4,#-1,10(%a6)&,%a3 + mac.l %d6,%d4,#-1,10(%a6)&,%d2 + mac.l %d6,%d4,#-1,10(%a6)&,%a7 + mac.l %d6,%d4,#-1,-(%a1),%d1 + mac.l %d6,%d4,#-1,-(%a1),%a3 + mac.l %d6,%d4,#-1,-(%a1),%d2 + mac.l %d6,%d4,#-1,-(%a1),%a7 + mac.l %d6,%d4,#-1,-(%a1)&,%d1 + mac.l %d6,%d4,#-1,-(%a1)&,%a3 + mac.l %d6,%d4,#-1,-(%a1)&,%d2 + mac.l %d6,%d4,#-1,-(%a1)&,%a7 diff --git a/gas/testsuite/gas/macros/macros.exp b/gas/testsuite/gas/macros/macros.exp index 19568d90120..83dc4cf9f50 100644 --- a/gas/testsuite/gas/macros/macros.exp +++ b/gas/testsuite/gas/macros/macros.exp @@ -35,7 +35,7 @@ if { ![istarget hppa*-*-*] || [istarget *-*-linux*] } { # These fail due to NO_STRING_ESCAPES setup_xfail "powerpc*-*-aix*" "powerpc*-*-beos*" "powerpc*-*-macos*" - setup_xfail "powerpc*-*-mpw*" "powerpc*-*-pe" "powerpc*-*-*win*" + setup_xfail "powerpc*-*-pe" "powerpc*-*-*win*" setup_xfail "rs6000-*-*" # FIXME: Due to difference in what "consecutive octets" means. diff --git a/gas/testsuite/gas/mips/elempic.d b/gas/testsuite/gas/mips/elempic.d deleted file mode 100644 index d40d5fde4f9..00000000000 --- a/gas/testsuite/gas/mips/elempic.d +++ /dev/null @@ -1,154 +0,0 @@ -#objdump: -rst -mmips:4000 -#name: MIPS empic -#as: -mabi=o64 -membedded-pic -mips3 -#source: empic.s -#stderr: empic.l - -# Check GNU-specific embedded relocs, for ELF. - -.*: +file format elf.*mips.* - -SYMBOL TABLE: -0+0000000 l d \.text 0+0000000 -0+0000000 l d \.data 0+0000000 -0+0000000 l d \.bss 0+0000000 -0+0000000 l d \.foo 0+0000000 -0+0000000 l d \.reginfo 0+0000000 -0+0000000 l d \.(mdebug|pdr) 0+0000000 -0+0000004 l \.text 0+0000000 l2 -0+0000000 \*UND\* 0+0000000 g1 -0+0000000 \*UND\* 0+0000000 g2 -0+0000100 l \.foo 0+0000000 l1 -0+0000034 l \.text 0+0000000 l3 -0+0000098 l \.text 0+0000000 l5 -0+0000004 l \.foo 0+0000000 l4 - - -RELOCATION RECORDS FOR \[\.text\]: -OFFSET [ ]+ TYPE VALUE -0+0000004 R_MIPS_GNU_REL16_S2 g1 -0+000000c R_MIPS_GNU_REL16_S2 g2 -0+0000014 R_MIPS_GNU_REL16_S2 g2 -0+000001c R_MIPS_GNU_REL16_S2 \.foo -0+0000024 R_MIPS_GNU_REL16_S2 \.text -0+000002c R_MIPS_GNU_REL16_S2 \.foo -0+0000034 R_MIPS_GNU_REL16_S2 \.text -0+000003c R_MIPS_GNU_REL_HI16 g1 -0+0000040 R_MIPS_GNU_REL_LO16 g1 -0+0000044 R_MIPS_GNU_REL_HI16 \.foo -0+0000048 R_MIPS_GNU_REL_LO16 \.foo -0+0000050 R_MIPS_32 g1 -0+0000054 R_MIPS_32 \.foo -0+0000058 R_MIPS_32 \.text -0+000005c R_MIPS_PC32 g1 -0+0000060 R_MIPS_PC32 \.foo -0+0000068 R_MIPS_64 g1 -0+0000070 R_MIPS_64 \.foo -0+0000078 R_MIPS_64 \.text -0+0000080 R_MIPS_PC64 g1 -0+0000088 R_MIPS_PC64 \.foo -0+0000098 R_MIPS_GNU_REL16_S2 \.text -0+000009c R_MIPS_GNU_REL16_S2 \.text -0+00000a0 R_MIPS_GNU_REL_HI16 \.text -0+00000a4 R_MIPS_GNU_REL_LO16 \.text -0+00000a8 R_MIPS_GNU_REL_HI16 \.text -0+00000ac R_MIPS_GNU_REL_LO16 \.text -0+00000b0 R_MIPS_32 \.text -0+00000b8 R_MIPS_64 \.text -0+00000cc R_MIPS_GNU_REL16_S2 \.text -0+00000d0 R_MIPS_GNU_REL16_S2 \.text -0+00000d4 R_MIPS_GNU_REL_HI16 \.text -0+00000d8 R_MIPS_GNU_REL_LO16 \.text -0+00000dc R_MIPS_GNU_REL_HI16 \.text -0+00000e0 R_MIPS_GNU_REL_LO16 \.text -0+00000e4 R_MIPS_32 \.text -0+00000f0 R_MIPS_64 \.text - - -RELOCATION RECORDS FOR \[\.foo\]: -OFFSET [ ]+ TYPE VALUE -0+0000004 R_MIPS_GNU_REL_HI16 g1 -0+0000008 R_MIPS_GNU_REL_LO16 g1 -0+000000c R_MIPS_GNU_REL_HI16 \.foo -0+0000010 R_MIPS_GNU_REL_LO16 \.foo -0+0000014 R_MIPS_GNU_REL_HI16 \.text -0+0000018 R_MIPS_GNU_REL_LO16 \.text -0+000001c R_MIPS_GNU_REL_HI16 g1 -0+0000020 R_MIPS_GNU_REL_LO16 g1 -0+0000024 R_MIPS_GNU_REL_HI16 g1 -0+0000028 R_MIPS_GNU_REL_LO16 g1 -0+000002c R_MIPS_GNU_REL_HI16 \.foo -0+0000030 R_MIPS_GNU_REL_LO16 \.foo -0+0000034 R_MIPS_GNU_REL_HI16 \.text -0+0000038 R_MIPS_GNU_REL_LO16 \.text -0+000003c R_MIPS_32 g1 -0+0000040 R_MIPS_32 \.foo -0+0000044 R_MIPS_32 \.text -0+0000048 R_MIPS_PC32 g1 -0+0000050 R_MIPS_PC32 \.text -0+0000058 R_MIPS_64 g1 -0+0000060 R_MIPS_64 \.foo -0+0000068 R_MIPS_64 \.text -0+0000070 R_MIPS_PC64 g1 -0+0000080 R_MIPS_PC64 \.text -0+0000088 R_MIPS_GNU_REL_HI16 g1 -0+000008c R_MIPS_GNU_REL_LO16 g1 -0+0000090 R_MIPS_GNU_REL_HI16 \.foo -0+0000094 R_MIPS_GNU_REL_LO16 \.foo -0+0000098 R_MIPS_GNU_REL_HI16 \.text -0+000009c R_MIPS_GNU_REL_LO16 \.text -0+00000a0 R_MIPS_GNU_REL_HI16 g1 -0+00000a4 R_MIPS_GNU_REL_LO16 g1 -0+00000a8 R_MIPS_GNU_REL_HI16 \.foo -0+00000ac R_MIPS_GNU_REL_LO16 \.foo -0+00000b0 R_MIPS_GNU_REL_HI16 \.text -0+00000b4 R_MIPS_GNU_REL_LO16 \.text -0+00000b8 R_MIPS_32 g1 -0+00000bc R_MIPS_32 \.foo -0+00000c0 R_MIPS_32 \.text -0+00000c4 R_MIPS_PC32 g1 -0+00000cc R_MIPS_PC32 \.text -0+00000d0 R_MIPS_64 g1 -0+00000d8 R_MIPS_64 \.foo -0+00000e0 R_MIPS_64 \.text -0+00000e8 R_MIPS_PC64 g1 -0+00000f8 R_MIPS_PC64 \.text - -Contents of section \.text: - 0000 00000000 ffff1104 00000000 ffff0010 .* - 0010 00000000 ffff0010 00000000 3f001104 .* - 0020 00000000 00001104 00000000 41000010 .* - 0030 00000000 00000010 00000000 0000033c .* - 0040 0c0063[26]4 0000033c 140163[26]4 d0ff03[26]4 .* - 0050 00000000 00010000 04000000 28000000 .* - 0060 2c010000 d0ffffff 00000000 00000000 .* - 0070 00010000 00000000 04000000 00000000 .* - 0080 4c000000 00000000 54010000 00000000 .* - 0090 d0ffffff ffffffff 32000010 33000010 .* - 00a0 0000033c d80063[26]4 0000033c e80063[26]4 .* - 00b0 cc000000 34000000 cc000000 00000000 .* - 00c0 34000000 00000000 00000000 32000010 .* - 00d0 33000010 0000033c 0c0163[26]4 0000033c .* - 00e0 1c0163[26]4 cc000000 34000000 00000000 .* - 00f0 cc000000 00000000 34000000 00000000 .* -Contents of section \.reginfo: - 0000 08000080 00000000 00000000 00000000 .* - 0010 00000000 00000000 .* -Contents of section \.foo: - 0000 00000000 0000033c 040063[26]4 0000033c .* - 0010 0c0163[26]4 0000033c 180063[26]4 0000033c .* - 0020 1c0063[26]4 0000033c 240063[26]4 0000033c .* - 0030 2c0163[26]4 0000033c 380063[26]4 00000000 .* - 0040 00010000 04000000 44000000 fc000000 .* - 0050 50000000 00000000 00000000 00000000 .* - 0060 00010000 00000000 04000000 00000000 .* - 0070 6c000000 00000000 fc000000 00000000 .* - 0080 80000000 00000000 0000033c 8c0063[26]4 .* - 0090 0000033c 940163[26]4 0000033c a00063[26]4 .* - 00a0 0000033c a40063[26]4 0000033c ac0163[26]4 .* - 00b0 0000033c b80063[26]4 04000000 04010000 .* - 00c0 08000000 c4000000 00010000 d0000000 .* - 00d0 04000000 00000000 04010000 00000000 .* - 00e0 08000000 00000000 e8000000 00000000 .* - 00f0 00010000 00000000 fc000000 00000000 .* - 0100 00000000 00000000 00000000 00000000 .* diff --git a/gas/testsuite/gas/mips/empic.d b/gas/testsuite/gas/mips/empic.d deleted file mode 100644 index 6c3c93a98cb..00000000000 --- a/gas/testsuite/gas/mips/empic.d +++ /dev/null @@ -1,154 +0,0 @@ -#objdump: -rst -mmips:4000 -#name: MIPS empic -#as: -mabi=o64 -membedded-pic -mips3 -#stderr: empic.l - -# Check GNU-specific embedded relocs, for ELF. - -.*: +file format elf.*mips.* - -SYMBOL TABLE: -0+0000000 l d \.text 0+0000000 -0+0000000 l d \.data 0+0000000 -0+0000000 l d \.bss 0+0000000 -0+0000000 l d \.foo 0+0000000 -0+0000000 l d \.reginfo 0+0000000 -0+0000000 l d \.(mdebug|pdr) 0+0000000 -0+0000004 l \.text 0+0000000 l2 -0+0000000 \*UND\* 0+0000000 g1 -0+0000000 \*UND\* 0+0000000 g2 -0+0000100 l \.foo 0+0000000 l1 -0+0000034 l \.text 0+0000000 l3 -0+0000098 l \.text 0+0000000 l5 -0+0000004 l \.foo 0+0000000 l4 - - -RELOCATION RECORDS FOR \[\.text\]: -OFFSET [ ]+ TYPE VALUE -0+0000004 R_MIPS_GNU_REL16_S2 g1 -0+000000c R_MIPS_GNU_REL16_S2 g2 -0+0000014 R_MIPS_GNU_REL16_S2 g2 -0+000001c R_MIPS_GNU_REL16_S2 \.foo -0+0000024 R_MIPS_GNU_REL16_S2 \.text -0+000002c R_MIPS_GNU_REL16_S2 \.foo -0+0000034 R_MIPS_GNU_REL16_S2 \.text -0+000003c R_MIPS_GNU_REL_HI16 g1 -0+0000040 R_MIPS_GNU_REL_LO16 g1 -0+0000044 R_MIPS_GNU_REL_HI16 \.foo -0+0000048 R_MIPS_GNU_REL_LO16 \.foo -0+0000050 R_MIPS_32 g1 -0+0000054 R_MIPS_32 \.foo -0+0000058 R_MIPS_32 \.text -0+000005c R_MIPS_PC32 g1 -0+0000060 R_MIPS_PC32 \.foo -0+0000068 R_MIPS_64 g1 -0+0000070 R_MIPS_64 \.foo -0+0000078 R_MIPS_64 \.text -0+0000080 R_MIPS_PC64 g1 -0+0000088 R_MIPS_PC64 \.foo -0+0000098 R_MIPS_GNU_REL16_S2 \.text -0+000009c R_MIPS_GNU_REL16_S2 \.text -0+00000a0 R_MIPS_GNU_REL_HI16 \.text -0+00000a4 R_MIPS_GNU_REL_LO16 \.text -0+00000a8 R_MIPS_GNU_REL_HI16 \.text -0+00000ac R_MIPS_GNU_REL_LO16 \.text -0+00000b0 R_MIPS_32 \.text -0+00000b8 R_MIPS_64 \.text -0+00000cc R_MIPS_GNU_REL16_S2 \.text -0+00000d0 R_MIPS_GNU_REL16_S2 \.text -0+00000d4 R_MIPS_GNU_REL_HI16 \.text -0+00000d8 R_MIPS_GNU_REL_LO16 \.text -0+00000dc R_MIPS_GNU_REL_HI16 \.text -0+00000e0 R_MIPS_GNU_REL_LO16 \.text -0+00000e4 R_MIPS_32 \.text -0+00000f0 R_MIPS_64 \.text - - -RELOCATION RECORDS FOR \[\.foo\]: -OFFSET [ ]+ TYPE VALUE -0+0000004 R_MIPS_GNU_REL_HI16 g1 -0+0000008 R_MIPS_GNU_REL_LO16 g1 -0+000000c R_MIPS_GNU_REL_HI16 \.foo -0+0000010 R_MIPS_GNU_REL_LO16 \.foo -0+0000014 R_MIPS_GNU_REL_HI16 \.text -0+0000018 R_MIPS_GNU_REL_LO16 \.text -0+000001c R_MIPS_GNU_REL_HI16 g1 -0+0000020 R_MIPS_GNU_REL_LO16 g1 -0+0000024 R_MIPS_GNU_REL_HI16 g1 -0+0000028 R_MIPS_GNU_REL_LO16 g1 -0+000002c R_MIPS_GNU_REL_HI16 \.foo -0+0000030 R_MIPS_GNU_REL_LO16 \.foo -0+0000034 R_MIPS_GNU_REL_HI16 \.text -0+0000038 R_MIPS_GNU_REL_LO16 \.text -0+000003c R_MIPS_32 g1 -0+0000040 R_MIPS_32 \.foo -0+0000044 R_MIPS_32 \.text -0+0000048 R_MIPS_PC32 g1 -0+0000050 R_MIPS_PC32 \.text -0+0000058 R_MIPS_64 g1 -0+0000060 R_MIPS_64 \.foo -0+0000068 R_MIPS_64 \.text -0+0000070 R_MIPS_PC64 g1 -0+0000080 R_MIPS_PC64 \.text -0+0000088 R_MIPS_GNU_REL_HI16 g1 -0+000008c R_MIPS_GNU_REL_LO16 g1 -0+0000090 R_MIPS_GNU_REL_HI16 \.foo -0+0000094 R_MIPS_GNU_REL_LO16 \.foo -0+0000098 R_MIPS_GNU_REL_HI16 \.text -0+000009c R_MIPS_GNU_REL_LO16 \.text -0+00000a0 R_MIPS_GNU_REL_HI16 g1 -0+00000a4 R_MIPS_GNU_REL_LO16 g1 -0+00000a8 R_MIPS_GNU_REL_HI16 \.foo -0+00000ac R_MIPS_GNU_REL_LO16 \.foo -0+00000b0 R_MIPS_GNU_REL_HI16 \.text -0+00000b4 R_MIPS_GNU_REL_LO16 \.text -0+00000b8 R_MIPS_32 g1 -0+00000bc R_MIPS_32 \.foo -0+00000c0 R_MIPS_32 \.text -0+00000c4 R_MIPS_PC32 g1 -0+00000cc R_MIPS_PC32 \.text -0+00000d0 R_MIPS_64 g1 -0+00000d8 R_MIPS_64 \.foo -0+00000e0 R_MIPS_64 \.text -0+00000e8 R_MIPS_PC64 g1 -0+00000f8 R_MIPS_PC64 \.text - -Contents of section \.text: - 0000 00000000 0411ffff 00000000 1000ffff .* - 0010 00000000 1000ffff 00000000 0411003f .* - 0020 00000000 04110000 00000000 10000041 .* - 0030 00000000 10000000 00000000 3c030000 .* - 0040 [26]463000c 3c030000 [26]4630114 [26]403ffd0 .* - 0050 00000000 00000100 00000004 00000028 .* - 0060 0000012c ffffffd0 00000000 00000000 .* - 0070 00000000 00000100 00000000 00000004 .* - 0080 00000000 0000004c 00000000 00000154 .* - 0090 ffffffff ffffffd0 10000032 10000033 .* - 00a0 3c030000 [26]46300d8 3c030000 [26]46300e8 .* - 00b0 000000cc 00000034 00000000 000000cc .* - 00c0 00000000 00000034 00000000 10000032 .* - 00d0 10000033 3c030000 [26]463010c 3c030000 .* - 00e0 [26]463011c 000000cc 00000034 00000000 .* - 00f0 00000000 000000cc 00000000 00000034 .* -Contents of section \.reginfo: - 0000 80000008 00000000 00000000 00000000 .* - 0010 00000000 00000000 .* -Contents of section \.foo: - 0000 00000000 3c030000 [26]4630004 3c030000 .* - 0010 [26]463010c 3c030000 [26]4630018 3c030000 .* - 0020 [26]463001c 3c030000 [26]4630024 3c030000 .* - 0030 [26]463012c 3c030000 [26]4630038 00000000 .* - 0040 00000100 00000004 00000044 000000fc .* - 0050 00000050 00000000 00000000 00000000 .* - 0060 00000000 00000100 00000000 00000004 .* - 0070 00000000 0000006c 00000000 000000fc .* - 0080 00000000 00000080 3c030000 [26]463008c .* - 0090 3c030000 [26]4630194 3c030000 [26]46300a0 .* - 00a0 3c030000 [26]46300a4 3c030000 [26]46301ac .* - 00b0 3c030000 [26]46300b8 00000004 00000104 .* - 00c0 00000008 000000c4 00000100 000000d0 .* - 00d0 00000000 00000004 00000000 00000104 .* - 00e0 00000000 00000008 00000000 000000e8 .* - 00f0 00000000 00000100 00000000 000000fc .* - 0100 00000000 00000000 00000000 00000000 .* - diff --git a/gas/testsuite/gas/mips/empic.l b/gas/testsuite/gas/mips/empic.l deleted file mode 100644 index e53d4f230e2..00000000000 --- a/gas/testsuite/gas/mips/empic.l +++ /dev/null @@ -1,3 +0,0 @@ -.*: Assembler messages: -.*:42: Warning: Macro instruction expanded into multiple instructions in a branch delay slot -.*:56: Warning: Macro instruction expanded into multiple instructions in a branch delay slot diff --git a/gas/testsuite/gas/mips/empic.s b/gas/testsuite/gas/mips/empic.s deleted file mode 100644 index cfb4b94cda5..00000000000 --- a/gas/testsuite/gas/mips/empic.s +++ /dev/null @@ -1,119 +0,0 @@ -# Check GNU-specific embedded relocs, for ELF. - - .text - .set noreorder - nop -l2: jal g1 # R_MIPS_GNU_REL16_S2 g1 -1 - nop - b g2 # R_MIPS_GNU_REL16_S2 g2 -1 - nop - b g2 # R_MIPS_GNU_REL16_S2 g2 -1 - nop - jal l1 # R_MIPS_GNU_REL16_S2 .foo 3F - nop - jal l2 # R_MIPS_GNU_REL16_S2 .text 0 or -9 - nop - b l1+8 # R_MIPS_GNU_REL16_S2 .foo 41 - nop -l3: - b l2 # R_MIPS_GNU_REL16_S2 .text 0 or -D - nop - la $3,g1-l3 # R_MIPS_GNU_REL_HI16 g1 0 - # R_MIPS_GNU_REL_LO16 g1 C - la $3,l1-l3 # R_MIPS_GNU_REL_HI16 .foo 0 - # R_MIPS_GNU_REL_LO16 .foo 114 - la $3,l2-l3 # -30 - .word g1 # R_MIPS_32 g1 0 - .word l1 # R_MIPS_32 .foo 100 - .word l2 # R_MIPS_32 .text 4 - .word g1-l3 # R_MIPS_PC32 g1 28 - .word l1-l3 # R_MIPS_PC32 .foo 12C - .word l2-l3 # -30 - .align 3 - .dword g1 # R_MIPS_64 g1 0 - .dword l1 # R_MIPS_64 .foo 100 - .dword l2 # R_MIPS_64 .text 4 - .dword g1-l3 # R_MIPS_PC64 g1 4C - .dword l1-l3 # R_MIPS_PC64 .foo 154 - .dword l2-l3 # -30 -l5: - b 2f # R_MIPS_GNU_REL16_S2 .text 32 - b 2f+4 # R_MIPS_GNU_REL16_S2 .text 33 - la $3,2f-l5 # R_MIPS_GNU_REL_HI16 .text 0 - # R_MIPS_GNU_REL_LO16 .text D8 - la $3,2f+8-l5 # R_MIPS_GNU_REL_HI16 .text 0 - # R_MIPS_GNU_REL_LO16 .text E8 - - - .word 2f # R_MIPS_32 .text CC - .word 2f-l5 # R_MIPS_PC32 .text EC or 34 - .dword 2f # R_MIPS_64 .text CC - .dword 2f-l5 # R_MIPS_PC64 .text F8 or 34 - nop -2: # at address 0xCC. - b 2b # R_MIPS_GNU_REL16_S2 .text 32 - b 2b+4 # R_MIPS_GNU_REL16_S2 .text 33 - la $3,2b-l5 # R_MIPS_GNU_REL_HI16 .text 0 - # R_MIPS_GNU_REL_LO16 .text 10C - la $3,2b+8-l5 # R_MIPS_GNU_REL_HI16 .text 0 - # R_MIPS_GNU_REL_LO16 .text 11C - .word 2b # R_MIPS_32 .text CC - .word 2b-l5 # R_MIPS_PC32 .text 11C or 34 - nop - .dword 2b # R_MIPS_64 .text CC - .dword 2b-l5 # R_MIPS_PC64 .text 98 or 34 - -# align section end to 16-byte boundary for easier testing on multiple targets - .p2align 4 - - .section ".foo","ax",@progbits - nop -l4: - la $3,g1-l4 - la $3,l1-l4 - la $3,l2-l4 - la $3,g1-l4 - - dla $3,g1-l4 - dla $3,l1-l4 - dla $3,l2-l4 - - .word g1 - .word l1 - .word l2 - .word g1-l4 - .word l1-l4 - .word l2-l4 - .dword g1 - .dword l1 - .dword l2 - .dword g1-l4 - .dword l1-l4 - .dword l2-l4 - - la $3,g1-l4+4 - la $3,l1-l4+4 - la $3,l2-l4+4 - - dla $3,g1-l4+4 - dla $3,l1-l4+4 - dla $3,l2-l4+4 - - .word g1+4 - .word l1+4 - .word l2+4 - .word g1-l4+4 - .word l1-l4+4 - .word l2-l4+4 - .dword g1+4 - .dword l1+4 - .dword l2+4 - .dword g1-l4+4 - .dword l1-l4+4 - .dword l2-l4+4 -l1: - - nop - -# align section end to 16-byte boundary for easier testing on multiple targets - .p2align 4 diff --git a/gas/testsuite/gas/mips/empic2.d b/gas/testsuite/gas/mips/empic2.d deleted file mode 100644 index de691b1be5d..00000000000 --- a/gas/testsuite/gas/mips/empic2.d +++ /dev/null @@ -1,279 +0,0 @@ -#objdump: --prefix-addresses -dr --show-raw-insn -mmips:4000 -#name: MIPS empic2 -#as: -mabi=o64 -membedded-pic -mips3 - -# Check assembly of and relocs for -membedded-pic la, lw, ld, sw, sd macros. - -.*: +file format elf.*mips.* - -Disassembly of section .text: -0+000000 <[^>]*> 00000000 nop - ... - ... -0+01000c <[^>]*> 3c020000 lui v0,0x0 -[ ]*1000c: R_MIPS_GNU_REL_HI16 .text -0+010010 <[^>]*> 0044102d daddu v0,v0,a0 -0+010014 <[^>]*> 6442000c daddiu v0,v0,12 -[ ]*10014: R_MIPS_GNU_REL_LO16 .text -0+010018 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10018: R_MIPS_GNU_REL_HI16 .text -0+01001c <[^>]*> 0044102d daddu v0,v0,a0 -0+010020 <[^>]*> 64420018 daddiu v0,v0,24 -[ ]*10020: R_MIPS_GNU_REL_LO16 .text -0+010024 <[^>]*> 3c020001 lui v0,0x1 -[ ]*10024: R_MIPS_GNU_REL_HI16 .text -0+010028 <[^>]*> 0044102d daddu v0,v0,a0 -0+01002c <[^>]*> 64428028 daddiu v0,v0,-32728 -[ ]*1002c: R_MIPS_GNU_REL_LO16 .text -0+010030 <[^>]*> 3c020001 lui v0,0x1 -[ ]*10030: R_MIPS_GNU_REL_HI16 .text -0+010034 <[^>]*> 0044102d daddu v0,v0,a0 -0+010038 <[^>]*> 64428034 daddiu v0,v0,-32716 -[ ]*10038: R_MIPS_GNU_REL_LO16 .text -0+01003c <[^>]*> 3c020001 lui v0,0x1 -[ ]*1003c: R_MIPS_GNU_REL_HI16 .text -0+010040 <[^>]*> 0044102d daddu v0,v0,a0 -0+010044 <[^>]*> 644202ac daddiu v0,v0,684 -[ ]*10044: R_MIPS_GNU_REL_LO16 .text -0+010048 <[^>]*> 3c020001 lui v0,0x1 -[ ]*10048: R_MIPS_GNU_REL_HI16 .text -0+01004c <[^>]*> 0044102d daddu v0,v0,a0 -0+010050 <[^>]*> 644202b8 daddiu v0,v0,696 -[ ]*10050: R_MIPS_GNU_REL_LO16 .text -0+010054 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10054: R_MIPS_GNU_REL_HI16 e -0+010058 <[^>]*> 0044102d daddu v0,v0,a0 -0+01005c <[^>]*> 64420050 daddiu v0,v0,80 -[ ]*1005c: R_MIPS_GNU_REL_LO16 e -0+010060 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10060: R_MIPS_GNU_REL_HI16 .text -0+010064 <[^>]*> 0044102d daddu v0,v0,a0 -0+010068 <[^>]*> 64420060 daddiu v0,v0,96 -[ ]*10068: R_MIPS_GNU_REL_LO16 .text -0+01006c <[^>]*> 3c020000 lui v0,0x0 -[ ]*1006c: R_MIPS_GNU_REL_HI16 .text -0+010070 <[^>]*> 0044102d daddu v0,v0,a0 -0+010074 <[^>]*> 6442006c daddiu v0,v0,108 -[ ]*10074: R_MIPS_GNU_REL_LO16 .text -0+010078 <[^>]*> 3c020001 lui v0,0x1 -[ ]*10078: R_MIPS_GNU_REL_HI16 .text -0+01007c <[^>]*> 0044102d daddu v0,v0,a0 -0+010080 <[^>]*> 6442807c daddiu v0,v0,-32644 -[ ]*10080: R_MIPS_GNU_REL_LO16 .text -0+010084 <[^>]*> 3c020001 lui v0,0x1 -[ ]*10084: R_MIPS_GNU_REL_HI16 .text -0+010088 <[^>]*> 0044102d daddu v0,v0,a0 -0+01008c <[^>]*> 64428088 daddiu v0,v0,-32632 -[ ]*1008c: R_MIPS_GNU_REL_LO16 .text -0+010090 <[^>]*> 3c020001 lui v0,0x1 -[ ]*10090: R_MIPS_GNU_REL_HI16 .text -0+010094 <[^>]*> 0044102d daddu v0,v0,a0 -0+010098 <[^>]*> 64420300 daddiu v0,v0,768 -[ ]*10098: R_MIPS_GNU_REL_LO16 .text -0+01009c <[^>]*> 3c020001 lui v0,0x1 -[ ]*1009c: R_MIPS_GNU_REL_HI16 .text -0+0100a0 <[^>]*> 0044102d daddu v0,v0,a0 -0+0100a4 <[^>]*> 6442030c daddiu v0,v0,780 -[ ]*100a4: R_MIPS_GNU_REL_LO16 .text -0+0100a8 <[^>]*> 3c020000 lui v0,0x0 -[ ]*100a8: R_MIPS_GNU_REL_HI16 e -0+0100ac <[^>]*> 0044102d daddu v0,v0,a0 -0+0100b0 <[^>]*> 644200a4 daddiu v0,v0,164 -[ ]*100b0: R_MIPS_GNU_REL_LO16 e -0+0100b4 <[^>]*> 3c020000 lui v0,0x0 -[ ]*100b4: R_MIPS_GNU_REL_HI16 .text -0+0100b8 <[^>]*> 644200b0 daddiu v0,v0,176 -[ ]*100b8: R_MIPS_GNU_REL_LO16 .text -0+0100bc <[^>]*> 3c020000 lui v0,0x0 -[ ]*100bc: R_MIPS_GNU_REL_HI16 .text -0+0100c0 <[^>]*> 644200b8 daddiu v0,v0,184 -[ ]*100c0: R_MIPS_GNU_REL_LO16 .text -0+0100c4 <[^>]*> 3c020001 lui v0,0x1 -[ ]*100c4: R_MIPS_GNU_REL_HI16 .text -0+0100c8 <[^>]*> 644280c4 daddiu v0,v0,-32572 -[ ]*100c8: R_MIPS_GNU_REL_LO16 .text -0+0100cc <[^>]*> 3c020001 lui v0,0x1 -[ ]*100cc: R_MIPS_GNU_REL_HI16 .text -0+0100d0 <[^>]*> 644280cc daddiu v0,v0,-32564 -[ ]*100d0: R_MIPS_GNU_REL_LO16 .text -0+0100d4 <[^>]*> 3c020001 lui v0,0x1 -[ ]*100d4: R_MIPS_GNU_REL_HI16 .text -0+0100d8 <[^>]*> 64420340 daddiu v0,v0,832 -[ ]*100d8: R_MIPS_GNU_REL_LO16 .text -0+0100dc <[^>]*> 3c020001 lui v0,0x1 -[ ]*100dc: R_MIPS_GNU_REL_HI16 .text -0+0100e0 <[^>]*> 64420348 daddiu v0,v0,840 -[ ]*100e0: R_MIPS_GNU_REL_LO16 .text -0+0100e4 <[^>]*> 3c020000 lui v0,0x0 -[ ]*100e4: R_MIPS_GNU_REL_HI16 e -0+0100e8 <[^>]*> 644200dc daddiu v0,v0,220 -[ ]*100e8: R_MIPS_GNU_REL_LO16 e -0+0100ec <[^>]*> 3c020000 lui v0,0x0 -[ ]*100ec: R_MIPS_GNU_REL_HI16 .text -0+0100f0 <[^>]*> 644200e8 daddiu v0,v0,232 -[ ]*100f0: R_MIPS_GNU_REL_LO16 .text -0+0100f4 <[^>]*> 3c020000 lui v0,0x0 -[ ]*100f4: R_MIPS_GNU_REL_HI16 .text -0+0100f8 <[^>]*> 644200f0 daddiu v0,v0,240 -[ ]*100f8: R_MIPS_GNU_REL_LO16 .text -0+0100fc <[^>]*> 3c020001 lui v0,0x1 -[ ]*100fc: R_MIPS_GNU_REL_HI16 .text -0+010100 <[^>]*> 644280fc daddiu v0,v0,-32516 -[ ]*10100: R_MIPS_GNU_REL_LO16 .text -0+010104 <[^>]*> 3c020001 lui v0,0x1 -[ ]*10104: R_MIPS_GNU_REL_HI16 .text -0+010108 <[^>]*> 64428104 daddiu v0,v0,-32508 -[ ]*10108: R_MIPS_GNU_REL_LO16 .text -0+01010c <[^>]*> 3c020001 lui v0,0x1 -[ ]*1010c: R_MIPS_GNU_REL_HI16 .text -0+010110 <[^>]*> 64420378 daddiu v0,v0,888 -[ ]*10110: R_MIPS_GNU_REL_LO16 .text -0+010114 <[^>]*> 3c020001 lui v0,0x1 -[ ]*10114: R_MIPS_GNU_REL_HI16 .text -0+010118 <[^>]*> 64420380 daddiu v0,v0,896 -[ ]*10118: R_MIPS_GNU_REL_LO16 .text -0+01011c <[^>]*> 3c020000 lui v0,0x0 -[ ]*1011c: R_MIPS_GNU_REL_HI16 e -0+010120 <[^>]*> 64420114 daddiu v0,v0,276 -[ ]*10120: R_MIPS_GNU_REL_LO16 e -0+010124 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10124: R_MIPS_GNU_REL_HI16 .text -0+010128 <[^>]*> 0044102d daddu v0,v0,a0 -0+01012c <[^>]*> 8c420124 lw v0,292\(v0\) -[ ]*1012c: R_MIPS_GNU_REL_LO16 .text -0+010130 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10130: R_MIPS_GNU_REL_HI16 .text -0+010134 <[^>]*> 0044102d daddu v0,v0,a0 -0+010138 <[^>]*> 8c420130 lw v0,304\(v0\) -[ ]*10138: R_MIPS_GNU_REL_LO16 .text -0+01013c <[^>]*> 3c020001 lui v0,0x1 -[ ]*1013c: R_MIPS_GNU_REL_HI16 .text -0+010140 <[^>]*> 0044102d daddu v0,v0,a0 -0+010144 <[^>]*> 8c428140 lw v0,-32448\(v0\) -[ ]*10144: R_MIPS_GNU_REL_LO16 .text -0+010148 <[^>]*> 3c020001 lui v0,0x1 -[ ]*10148: R_MIPS_GNU_REL_HI16 .text -0+01014c <[^>]*> 0044102d daddu v0,v0,a0 -0+010150 <[^>]*> 8c42814c lw v0,-32436\(v0\) -[ ]*10150: R_MIPS_GNU_REL_LO16 .text -0+010154 <[^>]*> 3c020001 lui v0,0x1 -[ ]*10154: R_MIPS_GNU_REL_HI16 .text -0+010158 <[^>]*> 0044102d daddu v0,v0,a0 -0+01015c <[^>]*> 8c4203c4 lw v0,964\(v0\) -[ ]*1015c: R_MIPS_GNU_REL_LO16 .text -0+010160 <[^>]*> 3c020001 lui v0,0x1 -[ ]*10160: R_MIPS_GNU_REL_HI16 .text -0+010164 <[^>]*> 0044102d daddu v0,v0,a0 -0+010168 <[^>]*> 8c4203d0 lw v0,976\(v0\) -[ ]*10168: R_MIPS_GNU_REL_LO16 .text -0+01016c <[^>]*> 3c020000 lui v0,0x0 -[ ]*1016c: R_MIPS_GNU_REL_HI16 e -0+010170 <[^>]*> 0044102d daddu v0,v0,a0 -0+010174 <[^>]*> 8c420168 lw v0,360\(v0\) -[ ]*10174: R_MIPS_GNU_REL_LO16 e -0+010178 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10178: R_MIPS_GNU_REL_HI16 .text -0+01017c <[^>]*> 0044102d daddu v0,v0,a0 -0+010180 <[^>]*> dc420178 ld v0,376\(v0\) -[ ]*10180: R_MIPS_GNU_REL_LO16 .text -0+010184 <[^>]*> 3c020000 lui v0,0x0 -[ ]*10184: R_MIPS_GNU_REL_HI16 .text -0+010188 <[^>]*> 0044102d daddu v0,v0,a0 -0+01018c <[^>]*> dc420184 ld v0,388\(v0\) -[ ]*1018c: R_MIPS_GNU_REL_LO16 .text -0+010190 <[^>]*> 3c020001 lui v0,0x1 -[ ]*10190: R_MIPS_GNU_REL_HI16 .text -0+010194 <[^>]*> 0044102d daddu v0,v0,a0 -0+010198 <[^>]*> dc428194 ld v0,-32364\(v0\) -[ ]*10198: R_MIPS_GNU_REL_LO16 .text -0+01019c <[^>]*> 3c020001 lui v0,0x1 -[ ]*1019c: R_MIPS_GNU_REL_HI16 .text -0+0101a0 <[^>]*> 0044102d daddu v0,v0,a0 -0+0101a4 <[^>]*> dc4281a0 ld v0,-32352\(v0\) -[ ]*101a4: R_MIPS_GNU_REL_LO16 .text -0+0101a8 <[^>]*> 3c020001 lui v0,0x1 -[ ]*101a8: R_MIPS_GNU_REL_HI16 .text -0+0101ac <[^>]*> 0044102d daddu v0,v0,a0 -0+0101b0 <[^>]*> dc420418 ld v0,1048\(v0\) -[ ]*101b0: R_MIPS_GNU_REL_LO16 .text -0+0101b4 <[^>]*> 3c020001 lui v0,0x1 -[ ]*101b4: R_MIPS_GNU_REL_HI16 .text -0+0101b8 <[^>]*> 0044102d daddu v0,v0,a0 -0+0101bc <[^>]*> dc420424 ld v0,1060\(v0\) -[ ]*101bc: R_MIPS_GNU_REL_LO16 .text -0+0101c0 <[^>]*> 3c020000 lui v0,0x0 -[ ]*101c0: R_MIPS_GNU_REL_HI16 e -0+0101c4 <[^>]*> 0044102d daddu v0,v0,a0 -0+0101c8 <[^>]*> dc4201bc ld v0,444\(v0\) -[ ]*101c8: R_MIPS_GNU_REL_LO16 e -0+0101cc <[^>]*> 3c010000 lui at,0x0 -[ ]*101cc: R_MIPS_GNU_REL_HI16 .text -0+0101d0 <[^>]*> 0024082d daddu at,at,a0 -0+0101d4 <[^>]*> ac2201cc sw v0,460\(at\) -[ ]*101d4: R_MIPS_GNU_REL_LO16 .text -0+0101d8 <[^>]*> 3c010000 lui at,0x0 -[ ]*101d8: R_MIPS_GNU_REL_HI16 .text -0+0101dc <[^>]*> 0024082d daddu at,at,a0 -0+0101e0 <[^>]*> ac2201d8 sw v0,472\(at\) -[ ]*101e0: R_MIPS_GNU_REL_LO16 .text -0+0101e4 <[^>]*> 3c010001 lui at,0x1 -[ ]*101e4: R_MIPS_GNU_REL_HI16 .text -0+0101e8 <[^>]*> 0024082d daddu at,at,a0 -0+0101ec <[^>]*> ac2281e8 sw v0,-32280\(at\) -[ ]*101ec: R_MIPS_GNU_REL_LO16 .text -0+0101f0 <[^>]*> 3c010001 lui at,0x1 -[ ]*101f0: R_MIPS_GNU_REL_HI16 .text -0+0101f4 <[^>]*> 0024082d daddu at,at,a0 -0+0101f8 <[^>]*> ac2281f4 sw v0,-32268\(at\) -[ ]*101f8: R_MIPS_GNU_REL_LO16 .text -0+0101fc <[^>]*> 3c010001 lui at,0x1 -[ ]*101fc: R_MIPS_GNU_REL_HI16 .text -0+010200 <[^>]*> 0024082d daddu at,at,a0 -0+010204 <[^>]*> ac22046c sw v0,1132\(at\) -[ ]*10204: R_MIPS_GNU_REL_LO16 .text -0+010208 <[^>]*> 3c010001 lui at,0x1 -[ ]*10208: R_MIPS_GNU_REL_HI16 .text -0+01020c <[^>]*> 0024082d daddu at,at,a0 -0+010210 <[^>]*> ac220478 sw v0,1144\(at\) -[ ]*10210: R_MIPS_GNU_REL_LO16 .text -0+010214 <[^>]*> 3c010000 lui at,0x0 -[ ]*10214: R_MIPS_GNU_REL_HI16 e -0+010218 <[^>]*> 0024082d daddu at,at,a0 -0+01021c <[^>]*> ac220210 sw v0,528\(at\) -[ ]*1021c: R_MIPS_GNU_REL_LO16 e -0+010220 <[^>]*> 3c010000 lui at,0x0 -[ ]*10220: R_MIPS_GNU_REL_HI16 .text -0+010224 <[^>]*> 0024082d daddu at,at,a0 -0+010228 <[^>]*> fc220220 sd v0,544\(at\) -[ ]*10228: R_MIPS_GNU_REL_LO16 .text -0+01022c <[^>]*> 3c010000 lui at,0x0 -[ ]*1022c: R_MIPS_GNU_REL_HI16 .text -0+010230 <[^>]*> 0024082d daddu at,at,a0 -0+010234 <[^>]*> fc22022c sd v0,556\(at\) -[ ]*10234: R_MIPS_GNU_REL_LO16 .text -0+010238 <[^>]*> 3c010001 lui at,0x1 -[ ]*10238: R_MIPS_GNU_REL_HI16 .text -0+01023c <[^>]*> 0024082d daddu at,at,a0 -0+010240 <[^>]*> fc22823c sd v0,-32196\(at\) -[ ]*10240: R_MIPS_GNU_REL_LO16 .text -0+010244 <[^>]*> 3c010001 lui at,0x1 -[ ]*10244: R_MIPS_GNU_REL_HI16 .text -0+010248 <[^>]*> 0024082d daddu at,at,a0 -0+01024c <[^>]*> fc228248 sd v0,-32184\(at\) -[ ]*1024c: R_MIPS_GNU_REL_LO16 .text -0+010250 <[^>]*> 3c010001 lui at,0x1 -[ ]*10250: R_MIPS_GNU_REL_HI16 .text -0+010254 <[^>]*> 0024082d daddu at,at,a0 -0+010258 <[^>]*> fc2204c0 sd v0,1216\(at\) -[ ]*10258: R_MIPS_GNU_REL_LO16 .text -0+01025c <[^>]*> 3c010001 lui at,0x1 -[ ]*1025c: R_MIPS_GNU_REL_HI16 .text -0+010260 <[^>]*> 0024082d daddu at,at,a0 -0+010264 <[^>]*> fc2204cc sd v0,1228\(at\) -[ ]*10264: R_MIPS_GNU_REL_LO16 .text -0+010268 <[^>]*> 3c010000 lui at,0x0 -[ ]*10268: R_MIPS_GNU_REL_HI16 e -0+01026c <[^>]*> 0024082d daddu at,at,a0 -0+010270 <[^>]*> fc220264 sd v0,612\(at\) -[ ]*10270: R_MIPS_GNU_REL_LO16 e - ... diff --git a/gas/testsuite/gas/mips/empic2.s b/gas/testsuite/gas/mips/empic2.s deleted file mode 100644 index e63e02b2edb..00000000000 --- a/gas/testsuite/gas/mips/empic2.s +++ /dev/null @@ -1,100 +0,0 @@ -# Check assembly of and relocs for -membedded-pic la, lw, ld, sw, sd macros. - - .text - .set noreorder - -start: - nop - - .globl g1 - .ent g1 -i1: # 0x00004 -g1: - .space 0x8000 - nop - .end g1 - - .globl g2 - .ent g2 -i2: # 0x08008 -g2: - .space 0x8000 - nop - .end g2 - - .globl g3 - .ent g3 -i3: # 0x1000c -g3: - - la $2, (i1 - i3)($4) - la $2, (g1 - i3)($4) - la $2, (i2 - i3)($4) - la $2, (g2 - i3)($4) - la $2, (if - i3)($4) - la $2, (gf - i3)($4) - la $2, (e - i3)($4) - la $2, (i1 - g3)($4) - la $2, (g1 - g3)($4) - la $2, (i2 - g3)($4) - la $2, (g2 - g3)($4) - la $2, (if - g3)($4) - la $2, (gf - g3)($4) - la $2, (e - g3)($4) - - la $2, (i1 - i3) - la $2, (g1 - i3) - la $2, (i2 - i3) - la $2, (g2 - i3) - la $2, (if - i3) - la $2, (gf - i3) - la $2, (e - i3) - la $2, (i1 - g3) - la $2, (g1 - g3) - la $2, (i2 - g3) - la $2, (g2 - g3) - la $2, (if - g3) - la $2, (gf - g3) - la $2, (e - g3) - - lw $2, (i1 - i3)($4) - lw $2, (g1 - i3)($4) - lw $2, (i2 - i3)($4) - lw $2, (g2 - i3)($4) - lw $2, (if - i3)($4) - lw $2, (gf - i3)($4) - lw $2, (e - i3)($4) - ld $2, (i1 - g3)($4) - ld $2, (g1 - g3)($4) - ld $2, (i2 - g3)($4) - ld $2, (g2 - g3)($4) - ld $2, (if - g3)($4) - ld $2, (gf - g3)($4) - ld $2, (e - g3)($4) - - sw $2, (i1 - i3)($4) - sw $2, (g1 - i3)($4) - sw $2, (i2 - i3)($4) - sw $2, (g2 - i3)($4) - sw $2, (if - i3)($4) - sw $2, (gf - i3)($4) - sw $2, (e - i3)($4) - sd $2, (i1 - g3)($4) - sd $2, (g1 - g3)($4) - sd $2, (i2 - g3)($4) - sd $2, (g2 - g3)($4) - sd $2, (if - g3)($4) - sd $2, (gf - g3)($4) - sd $2, (e - g3)($4) - - .end g3 - - .globl gf - .ent gf -if: -gf: - nop - .end gf - -# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... - .space 8 diff --git a/gas/testsuite/gas/mips/empic3_e.d b/gas/testsuite/gas/mips/empic3_e.d deleted file mode 100644 index d491e47e6e6..00000000000 --- a/gas/testsuite/gas/mips/empic3_e.d +++ /dev/null @@ -1,47 +0,0 @@ -#objdump: --prefix-addresses -dr --show-raw-insn -mmips:4000 -#name: MIPS empic3 (external) -#as: -mabi=o64 -membedded-pic -mips3 - -# Check PC-relative HI/LO relocs relocs for -membedded-pic when HI and -# LO are split over a 32K boundary. - -.*: +file format elf.*mips.* - -Disassembly of section .text: - ... - ... -0000fffc <[^>]*> 3c020001 lui v0,0x1 -[ ]*fffc: R_MIPS_GNU_REL_HI16 ext -00010000 <[^>]*> 64428000 daddiu v0,v0,-32768 -[ ]*10000: R_MIPS_GNU_REL_LO16 ext - ... -00017ffc <[^>]*> 3c020001 lui v0,0x1 -[ ]*17ffc: R_MIPS_GNU_REL_HI16 ext -00018000 <[^>]*> 64420000 daddiu v0,v0,0 -[ ]*18000: R_MIPS_GNU_REL_LO16 ext - ... -0001fffc <[^>]*> 3c020002 lui v0,0x2 -[ ]*1fffc: R_MIPS_GNU_REL_HI16 ext -00020000 <[^>]*> 0043102d daddu v0,v0,v1 -00020004 <[^>]*> 64428004 daddiu v0,v0,-32764 -[ ]*20004: R_MIPS_GNU_REL_LO16 ext - ... -00027ffc <[^>]*> 3c020002 lui v0,0x2 -[ ]*27ffc: R_MIPS_GNU_REL_HI16 ext -00028000 <[^>]*> 0043102d daddu v0,v0,v1 -00028004 <[^>]*> 64420004 daddiu v0,v0,4 -[ ]*28004: R_MIPS_GNU_REL_LO16 ext - ... -0002fff8 <[^>]*> 3c020003 lui v0,0x3 -[ ]*2fff8: R_MIPS_GNU_REL_HI16 ext -0002fffc <[^>]*> 0043102d daddu v0,v0,v1 -00030000 <[^>]*> 64428000 daddiu v0,v0,-32768 -[ ]*30000: R_MIPS_GNU_REL_LO16 ext - ... -00037ff8 <[^>]*> 3c020003 lui v0,0x3 -[ ]*37ff8: R_MIPS_GNU_REL_HI16 ext -00037ffc <[^>]*> 0043102d daddu v0,v0,v1 -00038000 <[^>]*> 64420000 daddiu v0,v0,0 -[ ]*38000: R_MIPS_GNU_REL_LO16 ext - ... - ... diff --git a/gas/testsuite/gas/mips/empic3_e.s b/gas/testsuite/gas/mips/empic3_e.s deleted file mode 100644 index 427e8c8b107..00000000000 --- a/gas/testsuite/gas/mips/empic3_e.s +++ /dev/null @@ -1,46 +0,0 @@ -# Check PC-relative HI/LO relocs for -membedded-pic when HI and LO are -# split over a 32K boundary. - - .text - .set noreorder - - SYM_TO_TEST = ext - - .globl ext - - .org 0x00000 - .globl g1 -g1: -l1: - - .org 0x08000 - .globl fn - .ent fn -fn: - .org (0x10000 - 4) - la $2, SYM_TO_TEST - fn # expands to 2 instructions - - .org (0x18000 - 4) - la $2, SYM_TO_TEST - fn # expands to 2 instructions - - .org (0x20000 - 4) - la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions - - .org (0x28000 - 4) - la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions - - .org (0x30000 - 8) - la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions - - .org (0x38000 - 8) - la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions - - .end fn - - .org 0x40000 - .globl g2 -g2: -l2: - -# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... - .space 8 diff --git a/gas/testsuite/gas/mips/empic3_g1.d b/gas/testsuite/gas/mips/empic3_g1.d deleted file mode 100644 index fde87e05877..00000000000 --- a/gas/testsuite/gas/mips/empic3_g1.d +++ /dev/null @@ -1,47 +0,0 @@ -#objdump: --prefix-addresses -dr --show-raw-insn -mmips:4000 -#name: MIPS empic3 (global, negative) -#as: -mabi=o64 -membedded-pic -mips3 - -# Check PC-relative HI/LO relocs relocs for -membedded-pic when HI and -# LO are split over a 32K boundary. - -.*: +file format elf.*mips.* - -Disassembly of section .text: - ... - ... -0000fffc <[^>]*> 3c020001 lui v0,0x1 -[ ]*fffc: R_MIPS_GNU_REL_HI16 .text -00010000 <[^>]*> 64428000 daddiu v0,v0,-32768 -[ ]*10000: R_MIPS_GNU_REL_LO16 .text - ... -00017ffc <[^>]*> 3c020001 lui v0,0x1 -[ ]*17ffc: R_MIPS_GNU_REL_HI16 .text -00018000 <[^>]*> 64420000 daddiu v0,v0,0 -[ ]*18000: R_MIPS_GNU_REL_LO16 .text - ... -0001fffc <[^>]*> 3c020002 lui v0,0x2 -[ ]*1fffc: R_MIPS_GNU_REL_HI16 .text -00020000 <[^>]*> 0043102d daddu v0,v0,v1 -00020004 <[^>]*> 64428004 daddiu v0,v0,-32764 -[ ]*20004: R_MIPS_GNU_REL_LO16 .text - ... -00027ffc <[^>]*> 3c020002 lui v0,0x2 -[ ]*27ffc: R_MIPS_GNU_REL_HI16 .text -00028000 <[^>]*> 0043102d daddu v0,v0,v1 -00028004 <[^>]*> 64420004 daddiu v0,v0,4 -[ ]*28004: R_MIPS_GNU_REL_LO16 .text - ... -0002fff8 <[^>]*> 3c020003 lui v0,0x3 -[ ]*2fff8: R_MIPS_GNU_REL_HI16 .text -0002fffc <[^>]*> 0043102d daddu v0,v0,v1 -00030000 <[^>]*> 64428000 daddiu v0,v0,-32768 -[ ]*30000: R_MIPS_GNU_REL_LO16 .text - ... -00037ff8 <[^>]*> 3c020003 lui v0,0x3 -[ ]*37ff8: R_MIPS_GNU_REL_HI16 .text -00037ffc <[^>]*> 0043102d daddu v0,v0,v1 -00038000 <[^>]*> 64420000 daddiu v0,v0,0 -[ ]*38000: R_MIPS_GNU_REL_LO16 .text - ... - ... diff --git a/gas/testsuite/gas/mips/empic3_g1.s b/gas/testsuite/gas/mips/empic3_g1.s deleted file mode 100644 index cf1df44a8cf..00000000000 --- a/gas/testsuite/gas/mips/empic3_g1.s +++ /dev/null @@ -1,46 +0,0 @@ -# Check PC-relative HI/LO relocs relocs for -membedded-pic when HI and -# LO are split over a 32K boundary. - - .text - .set noreorder - - SYM_TO_TEST = g1 - - .globl ext - - .org 0x00000 - .globl g1 -g1: -l1: - - .org 0x08000 - .globl fn - .ent fn -fn: - .org (0x10000 - 4) - la $2, SYM_TO_TEST - fn # expands to 2 instructions - - .org (0x18000 - 4) - la $2, SYM_TO_TEST - fn # expands to 2 instructions - - .org (0x20000 - 4) - la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions - - .org (0x28000 - 4) - la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions - - .org (0x30000 - 8) - la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions - - .org (0x38000 - 8) - la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions - - .end fn - - .org 0x40000 - .globl g2 -g2: -l2: - -# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... - .space 8 diff --git a/gas/testsuite/gas/mips/empic3_g2.d b/gas/testsuite/gas/mips/empic3_g2.d deleted file mode 100644 index 08b5e4beb07..00000000000 --- a/gas/testsuite/gas/mips/empic3_g2.d +++ /dev/null @@ -1,47 +0,0 @@ -#objdump: --prefix-addresses -dr --show-raw-insn -mmips:4000 -#name: MIPS empic3 (global, positive) -#as: -mabi=o64 -membedded-pic -mips3 - -# Check PC-relative HI/LO relocs relocs for -membedded-pic when HI and -# LO are split over a 32K boundary. - -.*: +file format elf.*mips.* - -Disassembly of section .text: - ... - ... -0000fffc <[^>]*> 3c020005 lui v0,0x5 -[ ]*fffc: R_MIPS_GNU_REL_HI16 .text -00010000 <[^>]*> 64428000 daddiu v0,v0,-32768 -[ ]*10000: R_MIPS_GNU_REL_LO16 .text - ... -00017ffc <[^>]*> 3c020005 lui v0,0x5 -[ ]*17ffc: R_MIPS_GNU_REL_HI16 .text -00018000 <[^>]*> 64420000 daddiu v0,v0,0 -[ ]*18000: R_MIPS_GNU_REL_LO16 .text - ... -0001fffc <[^>]*> 3c020006 lui v0,0x6 -[ ]*1fffc: R_MIPS_GNU_REL_HI16 .text -00020000 <[^>]*> 0043102d daddu v0,v0,v1 -00020004 <[^>]*> 64428004 daddiu v0,v0,-32764 -[ ]*20004: R_MIPS_GNU_REL_LO16 .text - ... -00027ffc <[^>]*> 3c020006 lui v0,0x6 -[ ]*27ffc: R_MIPS_GNU_REL_HI16 .text -00028000 <[^>]*> 0043102d daddu v0,v0,v1 -00028004 <[^>]*> 64420004 daddiu v0,v0,4 -[ ]*28004: R_MIPS_GNU_REL_LO16 .text - ... -0002fff8 <[^>]*> 3c020007 lui v0,0x7 -[ ]*2fff8: R_MIPS_GNU_REL_HI16 .text -0002fffc <[^>]*> 0043102d daddu v0,v0,v1 -00030000 <[^>]*> 64428000 daddiu v0,v0,-32768 -[ ]*30000: R_MIPS_GNU_REL_LO16 .text - ... -00037ff8 <[^>]*> 3c020007 lui v0,0x7 -[ ]*37ff8: R_MIPS_GNU_REL_HI16 .text -00037ffc <[^>]*> 0043102d daddu v0,v0,v1 -00038000 <[^>]*> 64420000 daddiu v0,v0,0 -[ ]*38000: R_MIPS_GNU_REL_LO16 .text - ... - ... diff --git a/gas/testsuite/gas/mips/empic3_g2.s b/gas/testsuite/gas/mips/empic3_g2.s deleted file mode 100644 index 4c070ee04ad..00000000000 --- a/gas/testsuite/gas/mips/empic3_g2.s +++ /dev/null @@ -1,46 +0,0 @@ -# Check PC-relative HI/LO relocs relocs for -membedded-pic when HI and -# LO are split over a 32K boundary. - - .text - .set noreorder - - SYM_TO_TEST = g2 - - .globl ext - - .org 0x00000 - .globl g1 -g1: -l1: - - .org 0x08000 - .globl fn - .ent fn -fn: - .org (0x10000 - 4) - la $2, SYM_TO_TEST - fn # expands to 2 instructions - - .org (0x18000 - 4) - la $2, SYM_TO_TEST - fn # expands to 2 instructions - - .org (0x20000 - 4) - la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions - - .org (0x28000 - 4) - la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions - - .org (0x30000 - 8) - la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions - - .org (0x38000 - 8) - la $2, (SYM_TO_TEST - fn)($3) # expands to 3 instructions - - .end fn - - .org 0x40000 - .globl g2 -g2: -l2: - -# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... - .space 8 diff --git a/gas/testsuite/gas/mips/jal-empic-elf-2.d b/gas/testsuite/gas/mips/jal-empic-elf-2.d deleted file mode 100644 index 7e9623e5b1b..00000000000 --- a/gas/testsuite/gas/mips/jal-empic-elf-2.d +++ /dev/null @@ -1,48 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: MIPS jal-empic-elf-2 -#as: -32 -membedded-pic - -# Test the jal macro harder with -membedded-pic. - -.*: +file format .*mips.* - -Disassembly of section .text: - \.\.\. - \.\.\. -0+0018 <[^>]*> 04110002 bal 0+0024 <g1\+0x18> -[ ]*18: R_MIPS_GNU_REL16_S2 .text -0+001c <[^>]*> 00000000 nop -0+0020 <[^>]*> 04110002 bal 0+002c <g1\+0x20> -[ ]*20: R_MIPS_GNU_REL16_S2 .text -0+0024 <[^>]*> 00000000 nop -0+0028 <[^>]*> 0411ffff bal 0+0028 <g1\+0x1c> -[ ]*28: R_MIPS_GNU_REL16_S2 e1 -0+002c <[^>]*> 00000000 nop -0+0030 <[^>]*> 10000002 b 0+003c <g1\+0x30> -[ ]*30: R_MIPS_GNU_REL16_S2 .text -0+0034 <[^>]*> 00000000 nop -0+0038 <[^>]*> 10000002 b 0+0044 <g1\+0x38> -[ ]*38: R_MIPS_GNU_REL16_S2 .text -0+003c <[^>]*> 00000000 nop -0+0040 <[^>]*> 1000ffff b 0+0040 <g1\+0x34> -[ ]*40: R_MIPS_GNU_REL16_S2 e1 -0+0044 <[^>]*> 00000000 nop -0+0048 <[^>]*> 0411ffff bal 0+0048 <g1\+0x3c> -[ ]*48: R_MIPS_GNU_REL16_S2 .text -0+004c <[^>]*> 00000000 nop -0+0050 <[^>]*> 0411ffff bal 0+0050 <g1\+0x44> -[ ]*50: R_MIPS_GNU_REL16_S2 .text -0+0054 <[^>]*> 00000000 nop -0+0058 <[^>]*> 0411fffc bal 0+004c <g1\+0x40> -[ ]*58: R_MIPS_GNU_REL16_S2 e1 -0+005c <[^>]*> 00000000 nop -0+0060 <[^>]*> 04110005 bal 0+0078 <g1\+0x6c> -[ ]*60: R_MIPS_GNU_REL16_S2 .text -0+0064 <[^>]*> 00000000 nop -0+0068 <[^>]*> 04110005 bal 0+0080 <g1\+0x74> -[ ]*68: R_MIPS_GNU_REL16_S2 .text -0+006c <[^>]*> 00000000 nop -0+0070 <[^>]*> 04110002 bal 0+007c <g1\+0x70> -[ ]*70: R_MIPS_GNU_REL16_S2 e1 -0+0074 <[^>]*> 00000000 nop - \.\.\. diff --git a/gas/testsuite/gas/mips/jal-empic-elf-2.s b/gas/testsuite/gas/mips/jal-empic-elf-2.s deleted file mode 100644 index 3a175552761..00000000000 --- a/gas/testsuite/gas/mips/jal-empic-elf-2.s +++ /dev/null @@ -1,28 +0,0 @@ -# Source file used to test the jal macro even harder - # some space so offets won't be 0. - .space 0xc - - .globl g1 .text -g1: -l1: - # some more space, so offset from label won't be 0. - .space 0xc - - jal g1 # 0x18 - jal l1 # 0x20 - jal e1 # 0x28 - - j g1 # 0x30 - j l1 # 0x38 - j e1 # 0x40 - - jal g1 - 0xc # 0x48 - jal l1 - 0xc # 0x50 - jal e1 - 0xc # 0x58 - - jal g1 + 0xc # 0x60 - jal l1 + 0xc # 0x68 - jal e1 + 0xc # 0x70 - -# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... - .space 8 diff --git a/gas/testsuite/gas/mips/jal-empic-elf-3.d b/gas/testsuite/gas/mips/jal-empic-elf-3.d deleted file mode 100644 index 0f6a11a0a6a..00000000000 --- a/gas/testsuite/gas/mips/jal-empic-elf-3.d +++ /dev/null @@ -1,24 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: MIPS jal-empic-elf-3 -#as: -32 -membedded-pic - -# Test the jal macro harder with -membedded-pic. - -.*: +file format .*mips.* - -Disassembly of section .text: - \.\.\. - \.\.\. -0+0018 <[^>]*> 0411fffa bal 0+0004 <g1\-0x8> -[ ]*18: R_MIPS_GNU_REL16_S2 .text -0+001c <[^>]*> 00000000 nop -0+0020 <[^>]*> 0411fff8 bal 0+0004 <g1\-0x8> -[ ]*20: R_MIPS_GNU_REL16_S2 .text -0+0024 <[^>]*> 00000000 nop -0+0028 <[^>]*> 0411fff6 bal 0+0004 <g1\-0x8> -[ ]*28: R_MIPS_GNU_REL16_S2 e1 -0+002c <[^>]*> 00000000 nop -0+0030 <[^>]*> 0411fff4 bal 0+0004 <g1\-0x8> -[ ]*30: R_MIPS_GNU_REL16_S2 e2 -0+0034 <[^>]*> 00000000 nop - \.\.\. diff --git a/gas/testsuite/gas/mips/jal-empic-elf-3.s b/gas/testsuite/gas/mips/jal-empic-elf-3.s deleted file mode 100644 index 7043d527f8d..00000000000 --- a/gas/testsuite/gas/mips/jal-empic-elf-3.s +++ /dev/null @@ -1,20 +0,0 @@ -# Source file used to test the jal macro even harder - # some space so offets won't be 0. - .space 0xc - - .globl g1 .text - .globl e2 .text -g1: -l1: - # some more space, so offset from label won't be 0. - .space 0xc - - # Hit the case where 'value == 0' in the BFD_RELOC_16_PCREL_S2 - # handling in tc-mips.c:md_apply_fix3(). - jal g1 - 0x20 # 0x18 - jal l1 - 0x28 # 0x20 - jal e1 - 0x24 # 0x28 - jal e2 - 0x2c # 0x30 - -# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... - .space 8 diff --git a/gas/testsuite/gas/mips/jal-empic-elf.d b/gas/testsuite/gas/mips/jal-empic-elf.d deleted file mode 100644 index 25022233f12..00000000000 --- a/gas/testsuite/gas/mips/jal-empic-elf.d +++ /dev/null @@ -1,26 +0,0 @@ -#objdump: -dr --prefix-addresses --show-raw-insn -#name: MIPS jal-empic-elf -#as: -32 -membedded-pic -#source: jal.s - -# Test the jal macro with -membedded-pic. - -.*: +file format .*mips.* - -Disassembly of section .text: -0+0000 <[^>]*> 0320f809 jalr t9 -0+0004 <[^>]*> 00000000 nop -0+0008 <[^>]*> 03202009 jalr a0,t9 -0+000c <[^>]*> 00000000 nop -0+0010 <[^>]*> 0411ffff bal 0+0010 <text_label\+0x10> -[ ]*10: R_MIPS_GNU_REL16_S2 .text -0+0014 <[^>]*> 00000000 nop -0+0018 <[^>]*> 0411ffff bal 0+0018 <text_label\+0x18> -[ ]*18: R_MIPS_GNU_REL16_S2 external_text_label -0+001c <[^>]*> 00000000 nop -0+0020 <[^>]*> 1000ffff b 0+0020 <text_label\+0x20> -[ ]*20: R_MIPS_GNU_REL16_S2 .text -0+0024 <[^>]*> 00000000 nop -0+0028 <[^>]*> 1000ffff b 0+0028 <text_label\+0x28> -[ ]*28: R_MIPS_GNU_REL16_S2 external_text_label -0+002c <[^>]*> 00000000 nop diff --git a/gas/testsuite/gas/mips/jal-empic.d b/gas/testsuite/gas/mips/jal-empic.d deleted file mode 100644 index 55e71500e1c..00000000000 --- a/gas/testsuite/gas/mips/jal-empic.d +++ /dev/null @@ -1,26 +0,0 @@ -#objdump: -dr --prefix-addresses -mmips:3000 -#name: MIPS jal-empic -#as: -mips1 -membedded-pic -#source: jal.s - -# Test the jal macro with -membedded-pic. - -.*: +file format .*mips.* - -Disassembly of section .text: -0+0000 <[^>]*> jalr t9 -0+0004 <[^>]*> nop -0+0008 <[^>]*> jalr a0,t9 -0+000c <[^>]*> nop -0+0010 <[^>]*> bal 0+0000 <text_label> -[ ]*10: PCREL16 .text -0+0014 <[^>]*> nop -0+0018 <[^>]*> bal 0+0018 <text_label\+(0x|)18> -[ ]*18: PCREL16 external_text_label -0+001c <[^>]*> nop -0+0020 <[^>]*> b 0+0000 <text_label> -[ ]*20: PCREL16 .text -0+0024 <[^>]*> nop -0+0028 <[^>]*> b 0+0028 <text_label\+(0x|)28> -[ ]*28: PCREL16 external_text_label -0+002c <[^>]*> nop diff --git a/gas/testsuite/gas/mips/la-empic.d b/gas/testsuite/gas/mips/la-empic.d deleted file mode 100644 index 3bee77783ad..00000000000 --- a/gas/testsuite/gas/mips/la-empic.d +++ /dev/null @@ -1,105 +0,0 @@ -#objdump: -dr --prefix-addresses -mmips:3000 -#name: MIPS la-empic -#as: -32 -mips1 -membedded-pic - -# Test the la macro with -membedded-pic. - -.*: +file format .*mips.* - -Disassembly of section .text: -0+0000 <[^>]*> li a0,0 -0+0004 <[^>]*> li a0,1 -0+0008 <[^>]*> li a0,0x8000 -0+000c <[^>]*> li a0,-32768 -0+0010 <[^>]*> lui a0,0x1 -0+0014 <[^>]*> lui a0,0x1 -0+0018 <[^>]*> ori a0,a0,0xa5a5 -0+001c <[^>]*> li a0,0 -0+0020 <[^>]*> addu a0,a0,a1 -0+0024 <[^>]*> li a0,1 -0+0028 <[^>]*> addu a0,a0,a1 -0+002c <[^>]*> li a0,0x8000 -0+0030 <[^>]*> addu a0,a0,a1 -0+0034 <[^>]*> li a0,-32768 -0+0038 <[^>]*> addu a0,a0,a1 -0+003c <[^>]*> lui a0,0x1 -0+0040 <[^>]*> addu a0,a0,a1 -0+0044 <[^>]*> lui a0,0x1 -0+0048 <[^>]*> ori a0,a0,0xa5a5 -0+004c <[^>]*> addu a0,a0,a1 -0+0050 <[^>]*> addiu a0,gp,-16384 -[ ]*50: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+0054 <[^>]*> addiu a0,gp,0 -[ ]*54: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+0058 <[^>]*> addiu a0,gp,0 -[ ]*58: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+005c <[^>]*> addiu a0,gp,0 -[ ]*5c: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+0060 <[^>]*> addiu a0,gp,0 -[ ]*60: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+0064 <[^>]*> addiu a0,gp,-16384 -[ ]*64: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+0068 <[^>]*> addiu a0,gp,-15384 -[ ]*68: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+006c <[^>]*> addiu a0,gp,-16383 -[ ]*6c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+0070 <[^>]*> addiu a0,gp,1 -[ ]*70: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+0074 <[^>]*> addiu a0,gp,1 -[ ]*74: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+0078 <[^>]*> addiu a0,gp,1 -[ ]*78: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+007c <[^>]*> addiu a0,gp,1 -[ ]*7c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+0080 <[^>]*> addiu a0,gp,-16383 -[ ]*80: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+0084 <[^>]*> addiu a0,gp,-15383 -[ ]*84: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+0088 <[^>]*> addiu a0,gp,-16384 -[ ]*88: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+008c <[^>]*> addu a0,a0,a1 -0+0090 <[^>]*> addiu a0,gp,0 -[ ]*90: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+0094 <[^>]*> addu a0,a0,a1 -0+0098 <[^>]*> addiu a0,gp,0 -[ ]*98: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+009c <[^>]*> addu a0,a0,a1 -0+00a0 <[^>]*> addiu a0,gp,0 -[ ]*a0: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+00a4 <[^>]*> addu a0,a0,a1 -0+00a8 <[^>]*> addiu a0,gp,0 -[ ]*a8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+00ac <[^>]*> addu a0,a0,a1 -0+00b0 <[^>]*> addiu a0,gp,-16384 -[ ]*b0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00b4 <[^>]*> addu a0,a0,a1 -0+00b8 <[^>]*> addiu a0,gp,-15384 -[ ]*b8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00bc <[^>]*> addu a0,a0,a1 -0+00c0 <[^>]*> addiu a0,gp,-16383 -[ ]*c0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+00c4 <[^>]*> addu a0,a0,a1 -0+00c8 <[^>]*> addiu a0,gp,1 -[ ]*c8: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+00cc <[^>]*> addu a0,a0,a1 -0+00d0 <[^>]*> addiu a0,gp,1 -[ ]*d0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+00d4 <[^>]*> addu a0,a0,a1 -0+00d8 <[^>]*> addiu a0,gp,1 -[ ]*d8: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+00dc <[^>]*> addu a0,a0,a1 -0+00e0 <[^>]*> addiu a0,gp,1 -[ ]*e0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+00e4 <[^>]*> addu a0,a0,a1 -0+00e8 <[^>]*> addiu a0,gp,-16383 -[ ]*e8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00ec <[^>]*> addu a0,a0,a1 -0+00f0 <[^>]*> addiu a0,gp,-15383 -[ ]*f0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00f4 <[^>]*> addu a0,a0,a1 -0+00f8 <[^>]*> lui a0,0x0 -[ ]*f8: RELHI external_text_label -0+00fc <[^>]*> addiu a0,a0,252 -[ ]*fc: RELLO external_text_label -0+0100 <[^>]*> li a0,248 - ... diff --git a/gas/testsuite/gas/mips/la-empic.s b/gas/testsuite/gas/mips/la-empic.s deleted file mode 100644 index c6df5e3b586..00000000000 --- a/gas/testsuite/gas/mips/la-empic.s +++ /dev/null @@ -1,57 +0,0 @@ -# Source file used to test the la macro with -membedded-pic - - .data -data_label: - .extern big_external_data_label,1000 - .extern small_external_data_label,1 - .comm big_external_common,1000 - .comm small_external_common,1 - .lcomm big_local_common,1000 - .lcomm small_local_common,1 - - .text -text_label: - la $4,0 - la $4,1 - la $4,0x8000 - la $4,-0x8000 - la $4,0x10000 - la $4,0x1a5a5 - la $4,0($5) - la $4,1($5) - la $4,0x8000($5) - la $4,-0x8000($5) - la $4,0x10000($5) - la $4,0x1a5a5($5) - la $4,data_label - la $4,big_external_data_label - la $4,small_external_data_label - la $4,big_external_common - la $4,small_external_common - la $4,big_local_common - la $4,small_local_common - la $4,data_label+1 - la $4,big_external_data_label+1 - la $4,small_external_data_label+1 - la $4,big_external_common+1 - la $4,small_external_common+1 - la $4,big_local_common+1 - la $4,small_local_common+1 - la $4,data_label($5) - la $4,big_external_data_label($5) - la $4,small_external_data_label($5) - la $4,big_external_common($5) - la $4,small_external_common($5) - la $4,big_local_common($5) - la $4,small_local_common($5) - la $4,data_label+1($5) - la $4,big_external_data_label+1($5) - la $4,small_external_data_label+1($5) - la $4,big_external_common+1($5) - la $4,small_external_common+1($5) - la $4,big_local_common+1($5) - la $4,small_local_common+1($5) - -second_text_label: - la $4,external_text_label - text_label - la $4,second_text_label - text_label diff --git a/gas/testsuite/gas/mips/lb-empic.d b/gas/testsuite/gas/mips/lb-empic.d deleted file mode 100644 index 75cbeb345b8..00000000000 --- a/gas/testsuite/gas/mips/lb-empic.d +++ /dev/null @@ -1,102 +0,0 @@ -#objdump: -dr --prefix-addresses -mmips:3000 -#name: MIPS lb-empic -#as: -32 -mips1 -membedded-pic -#source: lb-pic.s - -# Test the lb macro with -membedded-pic. - -.*: +file format .*mips.* - -Disassembly of section .text: -0+0000 <[^>]*> lb a0,0\(zero\) -0+0004 <[^>]*> lb a0,1\(zero\) -0+0008 <[^>]*> lui a0,0x1 -0+000c <[^>]*> lb a0,-32768\(a0\) -0+0010 <[^>]*> lb a0,-32768\(zero\) -0+0014 <[^>]*> lui a0,0x1 -0+0018 <[^>]*> lb a0,0\(a0\) -0+001c <[^>]*> lui a0,0x2 -0+0020 <[^>]*> lb a0,-23131\(a0\) -0+0024 <[^>]*> lb a0,0\(a1\) -0+0028 <[^>]*> lb a0,1\(a1\) -0+002c <[^>]*> lui a0,0x1 -0+0030 <[^>]*> addu a0,a0,a1 -0+0034 <[^>]*> lb a0,-32768\(a0\) -0+0038 <[^>]*> lb a0,-32768\(a1\) -0+003c <[^>]*> lui a0,0x1 -0+0040 <[^>]*> addu a0,a0,a1 -0+0044 <[^>]*> lb a0,0\(a0\) -0+0048 <[^>]*> lui a0,0x2 -0+004c <[^>]*> addu a0,a0,a1 -0+0050 <[^>]*> lb a0,-23131\(a0\) -0+0054 <[^>]*> lb a0,-16384\(gp\) -[ ]*54: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+0058 <[^>]*> lb a0,0\(gp\) -[ ]*58: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+005c <[^>]*> lb a0,0\(gp\) -[ ]*5c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+0060 <[^>]*> lb a0,0\(gp\) -[ ]*60: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+0064 <[^>]*> lb a0,0\(gp\) -[ ]*64: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+0068 <[^>]*> lb a0,-16384\(gp\) -[ ]*68: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+006c <[^>]*> lb a0,-15384\(gp\) -[ ]*6c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+0070 <[^>]*> lb a0,-16383\(gp\) -[ ]*70: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+0074 <[^>]*> lb a0,1\(gp\) -[ ]*74: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+0078 <[^>]*> lb a0,1\(gp\) -[ ]*78: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+007c <[^>]*> lb a0,1\(gp\) -[ ]*7c: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+0080 <[^>]*> lb a0,1\(gp\) -[ ]*80: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+0084 <[^>]*> lb a0,-16383\(gp\) -[ ]*84: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+0088 <[^>]*> lb a0,-15383\(gp\) -[ ]*88: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+008c <[^>]*> addu a0,a1,gp -0+0090 <[^>]*> lb a0,-16384\(a0\) -[ ]*90: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+0094 <[^>]*> addu a0,a1,gp -0+0098 <[^>]*> lb a0,0\(a0\) -[ ]*98: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+009c <[^>]*> addu a0,a1,gp -0+00a0 <[^>]*> lb a0,0\(a0\) -[ ]*a0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+00a4 <[^>]*> addu a0,a1,gp -0+00a8 <[^>]*> lb a0,0\(a0\) -[ ]*a8: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+00ac <[^>]*> addu a0,a1,gp -0+00b0 <[^>]*> lb a0,0\(a0\) -[ ]*b0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+00b4 <[^>]*> addu a0,a1,gp -0+00b8 <[^>]*> lb a0,-16384\(a0\) -[ ]*b8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00bc <[^>]*> addu a0,a1,gp -0+00c0 <[^>]*> lb a0,-15384\(a0\) -[ ]*c0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00c4 <[^>]*> addu a0,a1,gp -0+00c8 <[^>]*> lb a0,-16383\(a0\) -[ ]*c8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+00cc <[^>]*> addu a0,a1,gp -0+00d0 <[^>]*> lb a0,1\(a0\) -[ ]*d0: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+00d4 <[^>]*> addu a0,a1,gp -0+00d8 <[^>]*> lb a0,1\(a0\) -[ ]*d8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+00dc <[^>]*> addu a0,a1,gp -0+00e0 <[^>]*> lb a0,1\(a0\) -[ ]*e0: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+00e4 <[^>]*> addu a0,a1,gp -0+00e8 <[^>]*> lb a0,1\(a0\) -[ ]*e8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+00ec <[^>]*> addu a0,a1,gp -0+00f0 <[^>]*> lb a0,-16383\(a0\) -[ ]*f0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00f4 <[^>]*> addu a0,a1,gp -0+00f8 <[^>]*> lb a0,-15383\(a0\) -[ ]*f8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00fc <[^>]*> nop diff --git a/gas/testsuite/gas/mips/lb-svr4pic-ilocks.d b/gas/testsuite/gas/mips/lb-svr4pic-ilocks.d new file mode 100644 index 00000000000..0d7df1ce9d8 --- /dev/null +++ b/gas/testsuite/gas/mips/lb-svr4pic-ilocks.d @@ -0,0 +1,154 @@ +#objdump: -dr --prefix-addresses +#name: MIPS lb-svr4pic-ilocks +#as: -32 -KPIC +#source: lb-pic.s + +# Test the lb macro with -KPIC. + +.*: +file format .*mips.* + +Disassembly of section .text: +0+0000 <[^>]*> lb a0,0\(zero\) +0+0004 <[^>]*> lb a0,1\(zero\) +0+0008 <[^>]*> lui a0,0x1 +0+000c <[^>]*> lb a0,-32768\(a0\) +0+0010 <[^>]*> lb a0,-32768\(zero\) +0+0014 <[^>]*> lui a0,0x1 +0+0018 <[^>]*> lb a0,0\(a0\) +0+001c <[^>]*> lui a0,0x2 +0+0020 <[^>]*> lb a0,-23131\(a0\) +0+0024 <[^>]*> lb a0,0\(a1\) +0+0028 <[^>]*> lb a0,1\(a1\) +0+002c <[^>]*> lui a0,0x1 +0+0030 <[^>]*> addu a0,a0,a1 +0+0034 <[^>]*> lb a0,-32768\(a0\) +0+0038 <[^>]*> lb a0,-32768\(a1\) +0+003c <[^>]*> lui a0,0x1 +0+0040 <[^>]*> addu a0,a0,a1 +0+0044 <[^>]*> lb a0,0\(a0\) +0+0048 <[^>]*> lui a0,0x2 +0+004c <[^>]*> addu a0,a0,a1 +0+0050 <[^>]*> lb a0,-23131\(a0\) +0+0054 <[^>]*> lw a0,0\(gp\) +[ ]*54: R_MIPS_GOT16 .data +0+0058 <[^>]*> addiu a0,a0,0 +[ ]*58: R_MIPS_LO16 .data +0+005c <[^>]*> lb a0,0\(a0\) +0+0060 <[^>]*> lw a0,0\(gp\) +[ ]*60: R_MIPS_GOT16 big_external_data_label +0+0064 <[^>]*> lb a0,0\(a0\) +0+0068 <[^>]*> lw a0,0\(gp\) +[ ]*68: R_MIPS_GOT16 small_external_data_label +0+006c <[^>]*> lb a0,0\(a0\) +0+0070 <[^>]*> lw a0,0\(gp\) +[ ]*70: R_MIPS_GOT16 big_external_common +0+0074 <[^>]*> lb a0,0\(a0\) +0+0078 <[^>]*> lw a0,0\(gp\) +[ ]*78: R_MIPS_GOT16 small_external_common +0+007c <[^>]*> lb a0,0\(a0\) +0+0080 <[^>]*> lw a0,0\(gp\) +[ ]*80: R_MIPS_GOT16 .bss +0+0084 <[^>]*> addiu a0,a0,0 +[ ]*84: R_MIPS_LO16 .bss +0+0088 <[^>]*> lb a0,0\(a0\) +0+008c <[^>]*> lw a0,0\(gp\) +[ ]*8c: R_MIPS_GOT16 .bss +0+0090 <[^>]*> addiu a0,a0,1000 +[ ]*90: R_MIPS_LO16 .bss +0+0094 <[^>]*> lb a0,0\(a0\) +0+0098 <[^>]*> lw a0,0\(gp\) +[ ]*98: R_MIPS_GOT16 .data +0+009c <[^>]*> addiu a0,a0,0 +[ ]*9c: R_MIPS_LO16 .data +0+00a0 <[^>]*> lb a0,1\(a0\) +0+00a4 <[^>]*> lw a0,0\(gp\) +[ ]*a4: R_MIPS_GOT16 big_external_data_label +0+00a8 <[^>]*> lb a0,1\(a0\) +0+00ac <[^>]*> lw a0,0\(gp\) +[ ]*ac: R_MIPS_GOT16 small_external_data_label +0+00b0 <[^>]*> lb a0,1\(a0\) +0+00b4 <[^>]*> lw a0,0\(gp\) +[ ]*b4: R_MIPS_GOT16 big_external_common +0+00b8 <[^>]*> lb a0,1\(a0\) +0+00bc <[^>]*> lw a0,0\(gp\) +[ ]*bc: R_MIPS_GOT16 small_external_common +0+00c0 <[^>]*> lb a0,1\(a0\) +0+00c4 <[^>]*> lw a0,0\(gp\) +[ ]*c4: R_MIPS_GOT16 .bss +0+00c8 <[^>]*> addiu a0,a0,0 +[ ]*c8: R_MIPS_LO16 .bss +0+00cc <[^>]*> lb a0,1\(a0\) +0+00d0 <[^>]*> lw a0,0\(gp\) +[ ]*d0: R_MIPS_GOT16 .bss +0+00d4 <[^>]*> addiu a0,a0,1000 +[ ]*d4: R_MIPS_LO16 .bss +0+00d8 <[^>]*> lb a0,1\(a0\) +0+00dc <[^>]*> lw a0,0\(gp\) +[ ]*dc: R_MIPS_GOT16 .data +0+00e0 <[^>]*> addiu a0,a0,0 +[ ]*e0: R_MIPS_LO16 .data +0+00e4 <[^>]*> addu a0,a0,a1 +0+00e8 <[^>]*> lb a0,0\(a0\) +0+00ec <[^>]*> lw a0,0\(gp\) +[ ]*ec: R_MIPS_GOT16 big_external_data_label +0+00f0 <[^>]*> addu a0,a0,a1 +0+00f4 <[^>]*> lb a0,0\(a0\) +0+00f8 <[^>]*> lw a0,0\(gp\) +[ ]*f8: R_MIPS_GOT16 small_external_data_label +0+00fc <[^>]*> addu a0,a0,a1 +0+0100 <[^>]*> lb a0,0\(a0\) +0+0104 <[^>]*> lw a0,0\(gp\) +[ ]*104: R_MIPS_GOT16 big_external_common +0+0108 <[^>]*> addu a0,a0,a1 +0+010c <[^>]*> lb a0,0\(a0\) +0+0110 <[^>]*> lw a0,0\(gp\) +[ ]*110: R_MIPS_GOT16 small_external_common +0+0114 <[^>]*> addu a0,a0,a1 +0+0118 <[^>]*> lb a0,0\(a0\) +0+011c <[^>]*> lw a0,0\(gp\) +[ ]*11c: R_MIPS_GOT16 .bss +0+0120 <[^>]*> addiu a0,a0,0 +[ ]*120: R_MIPS_LO16 .bss +0+0124 <[^>]*> addu a0,a0,a1 +0+0128 <[^>]*> lb a0,0\(a0\) +0+012c <[^>]*> lw a0,0\(gp\) +[ ]*12c: R_MIPS_GOT16 .bss +0+0130 <[^>]*> addiu a0,a0,1000 +[ ]*130: R_MIPS_LO16 .bss +0+0134 <[^>]*> addu a0,a0,a1 +0+0138 <[^>]*> lb a0,0\(a0\) +0+013c <[^>]*> lw a0,0\(gp\) +[ ]*13c: R_MIPS_GOT16 .data +0+0140 <[^>]*> addiu a0,a0,0 +[ ]*140: R_MIPS_LO16 .data +0+0144 <[^>]*> addu a0,a0,a1 +0+0148 <[^>]*> lb a0,1\(a0\) +0+014c <[^>]*> lw a0,0\(gp\) +[ ]*14c: R_MIPS_GOT16 big_external_data_label +0+0150 <[^>]*> addu a0,a0,a1 +0+0154 <[^>]*> lb a0,1\(a0\) +0+0158 <[^>]*> lw a0,0\(gp\) +[ ]*158: R_MIPS_GOT16 small_external_data_label +0+015c <[^>]*> addu a0,a0,a1 +0+0160 <[^>]*> lb a0,1\(a0\) +0+0164 <[^>]*> lw a0,0\(gp\) +[ ]*164: R_MIPS_GOT16 big_external_common +0+0168 <[^>]*> addu a0,a0,a1 +0+016c <[^>]*> lb a0,1\(a0\) +0+0170 <[^>]*> lw a0,0\(gp\) +[ ]*170: R_MIPS_GOT16 small_external_common +0+0174 <[^>]*> addu a0,a0,a1 +0+0178 <[^>]*> lb a0,1\(a0\) +0+017c <[^>]*> lw a0,0\(gp\) +[ ]*17c: R_MIPS_GOT16 .bss +0+0180 <[^>]*> addiu a0,a0,0 +[ ]*180: R_MIPS_LO16 .bss +0+0184 <[^>]*> addu a0,a0,a1 +0+0188 <[^>]*> lb a0,1\(a0\) +0+018c <[^>]*> lw a0,0\(gp\) +[ ]*18c: R_MIPS_GOT16 .bss +0+0190 <[^>]*> addiu a0,a0,1000 +[ ]*190: R_MIPS_LO16 .bss +0+0194 <[^>]*> addu a0,a0,a1 +0+0198 <[^>]*> lb a0,1\(a0\) +0+019c <[^>]*> nop diff --git a/gas/testsuite/gas/mips/lb-xgot-ilocks.d b/gas/testsuite/gas/mips/lb-xgot-ilocks.d index b2632bc4fca..18e561f0be5 100644 --- a/gas/testsuite/gas/mips/lb-xgot-ilocks.d +++ b/gas/testsuite/gas/mips/lb-xgot-ilocks.d @@ -31,184 +31,172 @@ Disassembly of section \.text: 0+0050 <.*> lb a0,-23131\(a0\) 0+0054 <.*> lw a0,0\(gp\) 54: R_MIPS_GOT16 \.data -0+0058 <.*> nop -0+005c <.*> addiu a0,a0,0 - 5c: R_MIPS_LO16 \.data -0+0060 <.*> lb a0,0\(a0\) -0+0064 <.*> lui a0,0x0 - 64: R_MIPS_GOT_HI16 big_external_data_label -0+0068 <.*> addu a0,a0,gp -0+006c <.*> lw a0,0\(a0\) - 6c: R_MIPS_GOT_LO16 big_external_data_label -0+0070 <.*> lb a0,0\(a0\) -0+0074 <.*> lui a0,0x0 - 74: R_MIPS_GOT_HI16 small_external_data_label -0+0078 <.*> addu a0,a0,gp -0+007c <.*> lw a0,0\(a0\) - 7c: R_MIPS_GOT_LO16 small_external_data_label -0+0080 <.*> lb a0,0\(a0\) -0+0084 <.*> lui a0,0x0 - 84: R_MIPS_GOT_HI16 big_external_common -0+0088 <.*> addu a0,a0,gp -0+008c <.*> lw a0,0\(a0\) - 8c: R_MIPS_GOT_LO16 big_external_common -0+0090 <.*> lb a0,0\(a0\) -0+0094 <.*> lui a0,0x0 - 94: R_MIPS_GOT_HI16 small_external_common -0+0098 <.*> addu a0,a0,gp -0+009c <.*> lw a0,0\(a0\) - 9c: R_MIPS_GOT_LO16 small_external_common -0+00a0 <.*> lb a0,0\(a0\) -0+00a4 <.*> lw a0,0\(gp\) - a4: R_MIPS_GOT16 \.bss -0+00a8 <.*> nop -0+00ac <.*> addiu a0,a0,0 - ac: R_MIPS_LO16 \.bss -0+00b0 <.*> lb a0,0\(a0\) -0+00b4 <.*> lw a0,0\(gp\) - b4: R_MIPS_GOT16 \.bss -0+00b8 <.*> nop -0+00bc <.*> addiu a0,a0,1000 - bc: R_MIPS_LO16 \.bss -0+00c0 <.*> lb a0,0\(a0\) -0+00c4 <.*> lw a0,0\(gp\) - c4: R_MIPS_GOT16 \.data -0+00c8 <.*> nop -0+00cc <.*> addiu a0,a0,0 - cc: R_MIPS_LO16 \.data +0+0058 <.*> addiu a0,a0,0 + 58: R_MIPS_LO16 \.data +0+005c <.*> lb a0,0\(a0\) +0+0060 <.*> lui a0,0x0 + 60: R_MIPS_GOT_HI16 big_external_data_label +0+0064 <.*> addu a0,a0,gp +0+0068 <.*> lw a0,0\(a0\) + 68: R_MIPS_GOT_LO16 big_external_data_label +0+006c <.*> lb a0,0\(a0\) +0+0070 <.*> lui a0,0x0 + 70: R_MIPS_GOT_HI16 small_external_data_label +0+0074 <.*> addu a0,a0,gp +0+0078 <.*> lw a0,0\(a0\) + 78: R_MIPS_GOT_LO16 small_external_data_label +0+007c <.*> lb a0,0\(a0\) +0+0080 <.*> lui a0,0x0 + 80: R_MIPS_GOT_HI16 big_external_common +0+0084 <.*> addu a0,a0,gp +0+0088 <.*> lw a0,0\(a0\) + 88: R_MIPS_GOT_LO16 big_external_common +0+008c <.*> lb a0,0\(a0\) +0+0090 <.*> lui a0,0x0 + 90: R_MIPS_GOT_HI16 small_external_common +0+0094 <.*> addu a0,a0,gp +0+0098 <.*> lw a0,0\(a0\) + 98: R_MIPS_GOT_LO16 small_external_common +0+009c <.*> lb a0,0\(a0\) +0+00a0 <.*> lw a0,0\(gp\) + a0: R_MIPS_GOT16 \.bss +0+00a4 <.*> addiu a0,a0,0 + a4: R_MIPS_LO16 \.bss +0+00a8 <.*> lb a0,0\(a0\) +0+00ac <.*> lw a0,0\(gp\) + ac: R_MIPS_GOT16 \.bss +0+00b0 <.*> addiu a0,a0,1000 + b0: R_MIPS_LO16 \.bss +0+00b4 <.*> lb a0,0\(a0\) +0+00b8 <.*> lw a0,0\(gp\) + b8: R_MIPS_GOT16 \.data +0+00bc <.*> addiu a0,a0,0 + bc: R_MIPS_LO16 \.data +0+00c0 <.*> lb a0,1\(a0\) +0+00c4 <.*> lui a0,0x0 + c4: R_MIPS_GOT_HI16 big_external_data_label +0+00c8 <.*> addu a0,a0,gp +0+00cc <.*> lw a0,0\(a0\) + cc: R_MIPS_GOT_LO16 big_external_data_label 0+00d0 <.*> lb a0,1\(a0\) 0+00d4 <.*> lui a0,0x0 - d4: R_MIPS_GOT_HI16 big_external_data_label + d4: R_MIPS_GOT_HI16 small_external_data_label 0+00d8 <.*> addu a0,a0,gp 0+00dc <.*> lw a0,0\(a0\) - dc: R_MIPS_GOT_LO16 big_external_data_label + dc: R_MIPS_GOT_LO16 small_external_data_label 0+00e0 <.*> lb a0,1\(a0\) 0+00e4 <.*> lui a0,0x0 - e4: R_MIPS_GOT_HI16 small_external_data_label + e4: R_MIPS_GOT_HI16 big_external_common 0+00e8 <.*> addu a0,a0,gp 0+00ec <.*> lw a0,0\(a0\) - ec: R_MIPS_GOT_LO16 small_external_data_label + ec: R_MIPS_GOT_LO16 big_external_common 0+00f0 <.*> lb a0,1\(a0\) 0+00f4 <.*> lui a0,0x0 - f4: R_MIPS_GOT_HI16 big_external_common + f4: R_MIPS_GOT_HI16 small_external_common 0+00f8 <.*> addu a0,a0,gp 0+00fc <.*> lw a0,0\(a0\) - fc: R_MIPS_GOT_LO16 big_external_common + fc: R_MIPS_GOT_LO16 small_external_common 0+0100 <.*> lb a0,1\(a0\) -0+0104 <.*> lui a0,0x0 - 104: R_MIPS_GOT_HI16 small_external_common -0+0108 <.*> addu a0,a0,gp -0+010c <.*> lw a0,0\(a0\) - 10c: R_MIPS_GOT_LO16 small_external_common -0+0110 <.*> lb a0,1\(a0\) -0+0114 <.*> lw a0,0\(gp\) - 114: R_MIPS_GOT16 \.bss -0+0118 <.*> nop -0+011c <.*> addiu a0,a0,0 - 11c: R_MIPS_LO16 \.bss -0+0120 <.*> lb a0,1\(a0\) -0+0124 <.*> lw a0,0\(gp\) - 124: R_MIPS_GOT16 \.bss -0+0128 <.*> nop -0+012c <.*> addiu a0,a0,1000 - 12c: R_MIPS_LO16 \.bss -0+0130 <.*> lb a0,1\(a0\) -0+0134 <.*> lw a0,0\(gp\) - 134: R_MIPS_GOT16 \.data -0+0138 <.*> nop -0+013c <.*> addiu a0,a0,0 - 13c: R_MIPS_LO16 \.data -0+0140 <.*> addu a0,a0,a1 -0+0144 <.*> lb a0,0\(a0\) -0+0148 <.*> lui a0,0x0 - 148: R_MIPS_GOT_HI16 big_external_data_label -0+014c <.*> addu a0,a0,gp -0+0150 <.*> lw a0,0\(a0\) - 150: R_MIPS_GOT_LO16 big_external_data_label -0+0154 <.*> addu a0,a0,a1 -0+0158 <.*> lb a0,0\(a0\) -0+015c <.*> lui a0,0x0 - 15c: R_MIPS_GOT_HI16 small_external_data_label -0+0160 <.*> addu a0,a0,gp -0+0164 <.*> lw a0,0\(a0\) - 164: R_MIPS_GOT_LO16 small_external_data_label -0+0168 <.*> addu a0,a0,a1 -0+016c <.*> lb a0,0\(a0\) -0+0170 <.*> lui a0,0x0 - 170: R_MIPS_GOT_HI16 big_external_common -0+0174 <.*> addu a0,a0,gp -0+0178 <.*> lw a0,0\(a0\) - 178: R_MIPS_GOT_LO16 big_external_common -0+017c <.*> addu a0,a0,a1 -0+0180 <.*> lb a0,0\(a0\) -0+0184 <.*> lui a0,0x0 - 184: R_MIPS_GOT_HI16 small_external_common -0+0188 <.*> addu a0,a0,gp -0+018c <.*> lw a0,0\(a0\) - 18c: R_MIPS_GOT_LO16 small_external_common -0+0190 <.*> addu a0,a0,a1 -0+0194 <.*> lb a0,0\(a0\) -0+0198 <.*> lw a0,0\(gp\) - 198: R_MIPS_GOT16 \.bss -0+019c <.*> nop +0+0104 <.*> lw a0,0\(gp\) + 104: R_MIPS_GOT16 \.bss +0+0108 <.*> addiu a0,a0,0 + 108: R_MIPS_LO16 \.bss +0+010c <.*> lb a0,1\(a0\) +0+0110 <.*> lw a0,0\(gp\) + 110: R_MIPS_GOT16 \.bss +0+0114 <.*> addiu a0,a0,1000 + 114: R_MIPS_LO16 \.bss +0+0118 <.*> lb a0,1\(a0\) +0+011c <.*> lw a0,0\(gp\) + 11c: R_MIPS_GOT16 \.data +0+0120 <.*> addiu a0,a0,0 + 120: R_MIPS_LO16 \.data +0+0124 <.*> addu a0,a0,a1 +0+0128 <.*> lb a0,0\(a0\) +0+012c <.*> lui a0,0x0 + 12c: R_MIPS_GOT_HI16 big_external_data_label +0+0130 <.*> addu a0,a0,gp +0+0134 <.*> lw a0,0\(a0\) + 134: R_MIPS_GOT_LO16 big_external_data_label +0+0138 <.*> addu a0,a0,a1 +0+013c <.*> lb a0,0\(a0\) +0+0140 <.*> lui a0,0x0 + 140: R_MIPS_GOT_HI16 small_external_data_label +0+0144 <.*> addu a0,a0,gp +0+0148 <.*> lw a0,0\(a0\) + 148: R_MIPS_GOT_LO16 small_external_data_label +0+014c <.*> addu a0,a0,a1 +0+0150 <.*> lb a0,0\(a0\) +0+0154 <.*> lui a0,0x0 + 154: R_MIPS_GOT_HI16 big_external_common +0+0158 <.*> addu a0,a0,gp +0+015c <.*> lw a0,0\(a0\) + 15c: R_MIPS_GOT_LO16 big_external_common +0+0160 <.*> addu a0,a0,a1 +0+0164 <.*> lb a0,0\(a0\) +0+0168 <.*> lui a0,0x0 + 168: R_MIPS_GOT_HI16 small_external_common +0+016c <.*> addu a0,a0,gp +0+0170 <.*> lw a0,0\(a0\) + 170: R_MIPS_GOT_LO16 small_external_common +0+0174 <.*> addu a0,a0,a1 +0+0178 <.*> lb a0,0\(a0\) +0+017c <.*> lw a0,0\(gp\) + 17c: R_MIPS_GOT16 \.bss +0+0180 <.*> addiu a0,a0,0 + 180: R_MIPS_LO16 \.bss +0+0184 <.*> addu a0,a0,a1 +0+0188 <.*> lb a0,0\(a0\) +0+018c <.*> lw a0,0\(gp\) + 18c: R_MIPS_GOT16 \.bss +0+0190 <.*> addiu a0,a0,1000 + 190: R_MIPS_LO16 \.bss +0+0194 <.*> addu a0,a0,a1 +0+0198 <.*> lb a0,0\(a0\) +0+019c <.*> lw a0,0\(gp\) + 19c: R_MIPS_GOT16 \.data 0+01a0 <.*> addiu a0,a0,0 - 1a0: R_MIPS_LO16 \.bss + 1a0: R_MIPS_LO16 \.data 0+01a4 <.*> addu a0,a0,a1 -0+01a8 <.*> lb a0,0\(a0\) -0+01ac <.*> lw a0,0\(gp\) - 1ac: R_MIPS_GOT16 \.bss -0+01b0 <.*> nop -0+01b4 <.*> addiu a0,a0,1000 - 1b4: R_MIPS_LO16 \.bss +0+01a8 <.*> lb a0,1\(a0\) +0+01ac <.*> lui a0,0x0 + 1ac: R_MIPS_GOT_HI16 big_external_data_label +0+01b0 <.*> addu a0,a0,gp +0+01b4 <.*> lw a0,0\(a0\) + 1b4: R_MIPS_GOT_LO16 big_external_data_label 0+01b8 <.*> addu a0,a0,a1 -0+01bc <.*> lb a0,0\(a0\) -0+01c0 <.*> lw a0,0\(gp\) - 1c0: R_MIPS_GOT16 \.data -0+01c4 <.*> nop -0+01c8 <.*> addiu a0,a0,0 - 1c8: R_MIPS_LO16 \.data +0+01bc <.*> lb a0,1\(a0\) +0+01c0 <.*> lui a0,0x0 + 1c0: R_MIPS_GOT_HI16 small_external_data_label +0+01c4 <.*> addu a0,a0,gp +0+01c8 <.*> lw a0,0\(a0\) + 1c8: R_MIPS_GOT_LO16 small_external_data_label 0+01cc <.*> addu a0,a0,a1 0+01d0 <.*> lb a0,1\(a0\) 0+01d4 <.*> lui a0,0x0 - 1d4: R_MIPS_GOT_HI16 big_external_data_label + 1d4: R_MIPS_GOT_HI16 big_external_common 0+01d8 <.*> addu a0,a0,gp 0+01dc <.*> lw a0,0\(a0\) - 1dc: R_MIPS_GOT_LO16 big_external_data_label + 1dc: R_MIPS_GOT_LO16 big_external_common 0+01e0 <.*> addu a0,a0,a1 0+01e4 <.*> lb a0,1\(a0\) 0+01e8 <.*> lui a0,0x0 - 1e8: R_MIPS_GOT_HI16 small_external_data_label + 1e8: R_MIPS_GOT_HI16 small_external_common 0+01ec <.*> addu a0,a0,gp 0+01f0 <.*> lw a0,0\(a0\) - 1f0: R_MIPS_GOT_LO16 small_external_data_label + 1f0: R_MIPS_GOT_LO16 small_external_common 0+01f4 <.*> addu a0,a0,a1 0+01f8 <.*> lb a0,1\(a0\) -0+01fc <.*> lui a0,0x0 - 1fc: R_MIPS_GOT_HI16 big_external_common -0+0200 <.*> addu a0,a0,gp -0+0204 <.*> lw a0,0\(a0\) - 204: R_MIPS_GOT_LO16 big_external_common -0+0208 <.*> addu a0,a0,a1 -0+020c <.*> lb a0,1\(a0\) -0+0210 <.*> lui a0,0x0 - 210: R_MIPS_GOT_HI16 small_external_common -0+0214 <.*> addu a0,a0,gp -0+0218 <.*> lw a0,0\(a0\) - 218: R_MIPS_GOT_LO16 small_external_common -0+021c <.*> addu a0,a0,a1 -0+0220 <.*> lb a0,1\(a0\) -0+0224 <.*> lw a0,0\(gp\) - 224: R_MIPS_GOT16 \.bss -0+0228 <.*> nop -0+022c <.*> addiu a0,a0,0 - 22c: R_MIPS_LO16 \.bss -0+0230 <.*> addu a0,a0,a1 -0+0234 <.*> lb a0,1\(a0\) -0+0238 <.*> lw a0,0\(gp\) - 238: R_MIPS_GOT16 \.bss -0+023c <.*> nop -0+0240 <.*> addiu a0,a0,1000 - 240: R_MIPS_LO16 \.bss -0+0244 <.*> addu a0,a0,a1 -0+0248 <.*> lb a0,1\(a0\) -0+024c <.*> nop +0+01fc <.*> lw a0,0\(gp\) + 1fc: R_MIPS_GOT16 \.bss +0+0200 <.*> addiu a0,a0,0 + 200: R_MIPS_LO16 \.bss +0+0204 <.*> addu a0,a0,a1 +0+0208 <.*> lb a0,1\(a0\) +0+020c <.*> lw a0,0\(gp\) + 20c: R_MIPS_GOT16 \.bss +0+0210 <.*> addiu a0,a0,1000 + 210: R_MIPS_LO16 \.bss +0+0214 <.*> addu a0,a0,a1 +0+0218 <.*> lb a0,1\(a0\) +0+021c <.*> nop diff --git a/gas/testsuite/gas/mips/ld-empic.d b/gas/testsuite/gas/mips/ld-empic.d deleted file mode 100644 index 85c8358ece5..00000000000 --- a/gas/testsuite/gas/mips/ld-empic.d +++ /dev/null @@ -1,186 +0,0 @@ -#objdump: -dr --prefix-addresses -mmips:3000 -#name: MIPS ld-empic -#as: -32 -mips1 -membedded-pic --defsym EMPIC=1 -#source: ld-pic.s - -# Test the ld macro with -membedded-pic. - -.*: +file format .*mips.* - -Disassembly of section .text: -0+0000 <[^>]*> lw a0,0\(zero\) -0+0004 <[^>]*> lw a1,4\(zero\) -0+0008 <[^>]*> lw a0,1\(zero\) -0+000c <[^>]*> lw a1,5\(zero\) -0+0010 <[^>]*> lui at,0x1 -0+0014 <[^>]*> lw a0,-32768\(at\) -0+0018 <[^>]*> lw a1,-32764\(at\) -0+001c <[^>]*> lw a0,-32768\(zero\) -0+0020 <[^>]*> lw a1,-32764\(zero\) -0+0024 <[^>]*> lui at,0x1 -0+0028 <[^>]*> lw a0,0\(at\) -0+002c <[^>]*> lw a1,4\(at\) -0+0030 <[^>]*> lui at,0x2 -0+0034 <[^>]*> lw a0,-23131\(at\) -0+0038 <[^>]*> lw a1,-23127\(at\) -0+003c <[^>]*> nop -0+0040 <[^>]*> lw a0,0\(a1\) -0+0044 <[^>]*> lw a1,4\(a1\) -0+0048 <[^>]*> nop -0+004c <[^>]*> lw a0,1\(a1\) -0+0050 <[^>]*> lw a1,5\(a1\) -0+0054 <[^>]*> lui at,0x1 -0+0058 <[^>]*> addu at,a1,at -0+005c <[^>]*> lw a0,-32768\(at\) -0+0060 <[^>]*> lw a1,-32764\(at\) -0+0064 <[^>]*> nop -0+0068 <[^>]*> lw a0,-32768\(a1\) -0+006c <[^>]*> lw a1,-32764\(a1\) -0+0070 <[^>]*> lui at,0x1 -0+0074 <[^>]*> addu at,a1,at -0+0078 <[^>]*> lw a0,0\(at\) -0+007c <[^>]*> lw a1,4\(at\) -0+0080 <[^>]*> lui at,0x2 -0+0084 <[^>]*> addu at,a1,at -0+0088 <[^>]*> lw a0,-23131\(at\) -0+008c <[^>]*> lw a1,-23127\(at\) -0+0090 <[^>]*> lw a0,-16384\(gp\) -[ ]*90: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+0094 <[^>]*> lw a1,-16380\(gp\) -[ ]*94: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+0098 <[^>]*> lw a0,0\(gp\) -[ ]*98: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+009c <[^>]*> lw a1,4\(gp\) -[ ]*9c: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+00a0 <[^>]*> lw a0,0\(gp\) -[ ]*a0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+00a4 <[^>]*> lw a1,4\(gp\) -[ ]*a4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+00a8 <[^>]*> lw a0,0\(gp\) -[ ]*a8: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+00ac <[^>]*> lw a1,4\(gp\) -[ ]*ac: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+00b0 <[^>]*> lw a0,0\(gp\) -[ ]*b0: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+00b4 <[^>]*> lw a1,4\(gp\) -[ ]*b4: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+00b8 <[^>]*> lw a0,-16384\(gp\) -[ ]*b8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00bc <[^>]*> lw a1,-16380\(gp\) -[ ]*bc: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00c0 <[^>]*> lw a0,-15384\(gp\) -[ ]*c0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00c4 <[^>]*> lw a1,-15380\(gp\) -[ ]*c4: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00c8 <[^>]*> lw a0,-16383\(gp\) -[ ]*c8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+00cc <[^>]*> lw a1,-16379\(gp\) -[ ]*cc: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+00d0 <[^>]*> lw a0,1\(gp\) -[ ]*d0: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+00d4 <[^>]*> lw a1,5\(gp\) -[ ]*d4: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+00d8 <[^>]*> lw a0,1\(gp\) -[ ]*d8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+00dc <[^>]*> lw a1,5\(gp\) -[ ]*dc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+00e0 <[^>]*> lw a0,1\(gp\) -[ ]*e0: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+00e4 <[^>]*> lw a1,5\(gp\) -[ ]*e4: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+00e8 <[^>]*> lw a0,1\(gp\) -[ ]*e8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+00ec <[^>]*> lw a1,5\(gp\) -[ ]*ec: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+00f0 <[^>]*> lw a0,-16383\(gp\) -[ ]*f0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00f4 <[^>]*> lw a1,-16379\(gp\) -[ ]*f4: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00f8 <[^>]*> lw a0,-15383\(gp\) -[ ]*f8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00fc <[^>]*> lw a1,-15379\(gp\) -[ ]*fc: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+0100 <[^>]*> nop -0+0104 <[^>]*> addu at,a1,gp -0+0108 <[^>]*> lw a0,-16384\(at\) -[ ]*108: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+010c <[^>]*> lw a1,-16380\(at\) -[ ]*10c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+0110 <[^>]*> nop -0+0114 <[^>]*> addu at,a1,gp -0+0118 <[^>]*> lw a0,0\(at\) -[ ]*118: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+011c <[^>]*> lw a1,4\(at\) -[ ]*11c: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+0120 <[^>]*> nop -0+0124 <[^>]*> addu at,a1,gp -0+0128 <[^>]*> lw a0,0\(at\) -[ ]*128: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+012c <[^>]*> lw a1,4\(at\) -[ ]*12c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+0130 <[^>]*> nop -0+0134 <[^>]*> addu at,a1,gp -0+0138 <[^>]*> lw a0,0\(at\) -[ ]*138: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+013c <[^>]*> lw a1,4\(at\) -[ ]*13c: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+0140 <[^>]*> nop -0+0144 <[^>]*> addu at,a1,gp -0+0148 <[^>]*> lw a0,0\(at\) -[ ]*148: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+014c <[^>]*> lw a1,4\(at\) -[ ]*14c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+0150 <[^>]*> nop -0+0154 <[^>]*> addu at,a1,gp -0+0158 <[^>]*> lw a0,-16384\(at\) -[ ]*158: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+015c <[^>]*> lw a1,-16380\(at\) -[ ]*15c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+0160 <[^>]*> nop -0+0164 <[^>]*> addu at,a1,gp -0+0168 <[^>]*> lw a0,-15384\(at\) -[ ]*168: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+016c <[^>]*> lw a1,-15380\(at\) -[ ]*16c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+0170 <[^>]*> nop -0+0174 <[^>]*> addu at,a1,gp -0+0178 <[^>]*> lw a0,-16383\(at\) -[ ]*178: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+017c <[^>]*> lw a1,-16379\(at\) -[ ]*17c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+0180 <[^>]*> nop -0+0184 <[^>]*> addu at,a1,gp -0+0188 <[^>]*> lw a0,1\(at\) -[ ]*188: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+018c <[^>]*> lw a1,5\(at\) -[ ]*18c: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+0190 <[^>]*> nop -0+0194 <[^>]*> addu at,a1,gp -0+0198 <[^>]*> lw a0,1\(at\) -[ ]*198: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+019c <[^>]*> lw a1,5\(at\) -[ ]*19c: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+01a0 <[^>]*> nop -0+01a4 <[^>]*> addu at,a1,gp -0+01a8 <[^>]*> lw a0,1\(at\) -[ ]*1a8: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+01ac <[^>]*> lw a1,5\(at\) -[ ]*1ac: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+01b0 <[^>]*> nop -0+01b4 <[^>]*> addu at,a1,gp -0+01b8 <[^>]*> lw a0,1\(at\) -[ ]*1b8: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+01bc <[^>]*> lw a1,5\(at\) -[ ]*1bc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+01c0 <[^>]*> nop -0+01c4 <[^>]*> addu at,a1,gp -0+01c8 <[^>]*> lw a0,-16383\(at\) -[ ]*1c8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+01cc <[^>]*> lw a1,-16379\(at\) -[ ]*1cc: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+01d0 <[^>]*> nop -0+01d4 <[^>]*> addu at,a1,gp -0+01d8 <[^>]*> lw a0,-15383\(at\) -[ ]*1d8: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+01dc <[^>]*> lw a1,-15379\(at\) -[ ]*1dc: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* diff --git a/gas/testsuite/gas/mips/ld-pic.s b/gas/testsuite/gas/mips/ld-pic.s index ccf52dfcb48..994561fd74d 100644 --- a/gas/testsuite/gas/mips/ld-pic.s +++ b/gas/testsuite/gas/mips/ld-pic.s @@ -54,7 +54,5 @@ data_label: ld $4,small_local_common+1($5) # Round to a 16 byte boundary, for ease in testing multiple targets. - .ifndef EMPIC nop nop - .endif diff --git a/gas/testsuite/gas/mips/lif-empic.d b/gas/testsuite/gas/mips/lif-empic.d deleted file mode 100644 index f81b68d4737..00000000000 --- a/gas/testsuite/gas/mips/lif-empic.d +++ /dev/null @@ -1,24 +0,0 @@ -#objdump: -dr --prefix-addresses -mmips:3000 -#name: MIPS lifloat-empic -#as: -32 -mips1 -membedded-pic --defsym EMPIC=1 -#source: lifloat.s - -# Test the li.d and li.s macros with -membedded-pic. - -.*: +file format .*mips.* - -Disassembly of section .text: -0+0000 <[^>]*> addiu at,gp,-16384 -[ ]*0: [A-Z0-9_]*GPREL[A-Z0-9_]* .rdata.* -0+0004 <[^>]*> lw a0,0\(at\) -0+0008 <[^>]*> lw a1,4\(at\) -0+000c <[^>]*> lwc1 \$f[45],-16368\(gp\) -[ ]*c: [A-Z0-9_]*LITERAL[A-Z0-9_]* .lit8.* -0+0010 <[^>]*> lwc1 \$f[45],-16364\(gp\) -[ ]*10: [A-Z0-9_]*LITERAL[A-Z0-9_]* .lit8.* -0+0014 <[^>]*> lui a0,0x3f8f -0+0018 <[^>]*> ori a0,a0,0xcd36 -0+001c <[^>]*> lui at,0x3f8f -0+0020 <[^>]*> ori at,at,0xcd36 -0+0024 <[^>]*> mtc1 at,\$f4 - ... diff --git a/gas/testsuite/gas/mips/lifloat.s b/gas/testsuite/gas/mips/lifloat.s index 3977f0e7d4e..0760b86d3ef 100644 --- a/gas/testsuite/gas/mips/lifloat.s +++ b/gas/testsuite/gas/mips/lifloat.s @@ -18,7 +18,3 @@ foo: nop nop .endif - .ifdef EMPIC - nop - nop - .endif diff --git a/gas/testsuite/gas/mips/mips-abi32-pic.d b/gas/testsuite/gas/mips/mips-abi32-pic.d index e1ed67790da..fd18bf81e9a 100644 --- a/gas/testsuite/gas/mips/mips-abi32-pic.d +++ b/gas/testsuite/gas/mips/mips-abi32-pic.d @@ -15,103 +15,85 @@ Disassembly of section .text: 14: 3c041234 lui a0,0x1234 18: 34845678 ori a0,a0,0x5678 1c: 8f840000 lw a0,0\(gp\) - 20: 00000000 nop - 24: 24840000 addiu a0,a0,0 - 28: 8f840000 lw a0,0\(gp\) - 2c: 00000000 nop - 30: 24840000 addiu a0,a0,0 - 34: 8f840000 lw a0,0\(gp\) + 20: 24840000 addiu a0,a0,0 + 24: 8f840000 lw a0,0\(gp\) + 28: 24840000 addiu a0,a0,0 + 2c: 8f840000 lw a0,0\(gp\) + 30: 2484015c addiu a0,a0,348 + 34: 10000049 b 15c <[^>]*> 38: 00000000 nop - 3c: 248401a4 addiu a0,a0,420 - 40: 10000058 b 1a4 <[^>]*> - 44: 00000000 nop - 48: 8f990000 lw t9,0\(gp\) - 4c: 00000000 nop - 50: 273901a4 addiu t9,t9,420 - 54: 0320f809 jalr t9 - 58: 00000000 nop - 5c: 8fbc0008 lw gp,8\(sp\) - 60: 8f840000 lw a0,0\(gp\) - 64: 00000000 nop - 68: 24840000 addiu a0,a0,0 - 6c: 8c840000 lw a0,0\(a0\) - 70: 8f840000 lw a0,0\(gp\) - 74: 00000000 nop - 78: 24840000 addiu a0,a0,0 - 7c: 8c840000 lw a0,0\(a0\) - 80: 8f840000 lw a0,0\(gp\) - 84: 00000000 nop - 88: 248401a4 addiu a0,a0,420 - 8c: 8c840000 lw a0,0\(a0\) - 90: 8f810000 lw at,0\(gp\) - 94: 00000000 nop - 98: 8c240000 lw a0,0\(at\) - 9c: 8c250004 lw a1,4\(at\) - a0: 8f810000 lw at,0\(gp\) - a4: 00000000 nop - a8: 8c240000 lw a0,0\(at\) - ac: 8c250004 lw a1,4\(at\) + 3c: 8f990000 lw t9,0\(gp\) + 40: 2739015c addiu t9,t9,348 + 44: 0320f809 jalr t9 + 48: 00000000 nop + 4c: 8fbc0008 lw gp,8\(sp\) + 50: 8f840000 lw a0,0\(gp\) + 54: 24840000 addiu a0,a0,0 + 58: 8c840000 lw a0,0\(a0\) + 5c: 8f840000 lw a0,0\(gp\) + 60: 24840000 addiu a0,a0,0 + 64: 8c840000 lw a0,0\(a0\) + 68: 8f840000 lw a0,0\(gp\) + 6c: 2484015c addiu a0,a0,348 + 70: 8c840000 lw a0,0\(a0\) + 74: 8f810000 lw at,0\(gp\) + 78: 8c240000 lw a0,0\(at\) + 7c: 8c250004 lw a1,4\(at\) + 80: 8f810000 lw at,0\(gp\) + 84: 8c240000 lw a0,0\(at\) + 88: 8c250004 lw a1,4\(at\) + 8c: 8f810000 lw at,0\(gp\) + 90: 8c24015c lw a0,348\(at\) + 94: 8c250160 lw a1,352\(at\) + 98: 8f810000 lw at,0\(gp\) + 9c: 24210000 addiu at,at,0 + a0: ac240000 sw a0,0\(at\) + a4: 8f810000 lw at,0\(gp\) + a8: 24210000 addiu at,at,0 + ac: ac240000 sw a0,0\(at\) b0: 8f810000 lw at,0\(gp\) - b4: 00000000 nop - b8: 8c2401a4 lw a0,420\(at\) - bc: 8c2501a8 lw a1,424\(at\) - c0: 8f810000 lw at,0\(gp\) - c4: 00000000 nop - c8: 24210000 addiu at,at,0 - cc: ac240000 sw a0,0\(at\) - d0: 8f810000 lw at,0\(gp\) - d4: 00000000 nop - d8: 24210000 addiu at,at,0 - dc: ac240000 sw a0,0\(at\) + b4: ac240000 sw a0,0\(at\) + b8: ac250004 sw a1,4\(at\) + bc: 8f810000 lw at,0\(gp\) + c0: ac240000 sw a0,0\(at\) + c4: ac250004 sw a1,4\(at\) + c8: 8f810000 lw at,0\(gp\) + cc: 24210000 addiu at,at,0 + d0: 80240000 lb a0,0\(at\) + d4: 90210001 lbu at,1\(at\) + d8: 00042200 sll a0,a0,0x8 + dc: 00812025 or a0,a0,at e0: 8f810000 lw at,0\(gp\) - e4: 00000000 nop - e8: ac240000 sw a0,0\(at\) - ec: ac250004 sw a1,4\(at\) - f0: 8f810000 lw at,0\(gp\) - f4: 00000000 nop - f8: ac240000 sw a0,0\(at\) - fc: ac250004 sw a1,4\(at\) + e4: 24210000 addiu at,at,0 + e8: a0240001 sb a0,1\(at\) + ec: 00042202 srl a0,a0,0x8 + f0: a0240000 sb a0,0\(at\) + f4: 90210001 lbu at,1\(at\) + f8: 00042200 sll a0,a0,0x8 + fc: 00812025 or a0,a0,at 100: 8f810000 lw at,0\(gp\) - 104: 00000000 nop - 108: 24210000 addiu at,at,0 - 10c: 80240000 lb a0,0\(at\) - 110: 90210001 lbu at,1\(at\) - 114: 00042200 sll a0,a0,0x8 - 118: 00812025 or a0,a0,at - 11c: 8f810000 lw at,0\(gp\) - 120: 00000000 nop - 124: 24210000 addiu at,at,0 - 128: a0240001 sb a0,1\(at\) - 12c: 00042202 srl a0,a0,0x8 - 130: a0240000 sb a0,0\(at\) - 134: 90210001 lbu at,1\(at\) - 138: 00042200 sll a0,a0,0x8 - 13c: 00812025 or a0,a0,at + 104: 24210000 addiu at,at,0 + 108: 88240000 lwl a0,0\(at\) + 10c: 98240003 lwr a0,3\(at\) + 110: 8f810000 lw at,0\(gp\) + 114: 24210000 addiu at,at,0 + 118: a8240000 swl a0,0\(at\) + 11c: b8240003 swr a0,3\(at\) + 120: 3c043ff0 lui a0,0x3ff0 + 124: 00002821 move a1,zero + 128: 8f810000 lw at,0\(gp\) + 12c: 8c240000 lw a0,0\(at\) + 130: 8c250004 lw a1,4\(at\) + 134: 3c013ff0 lui at,0x3ff0 + 138: 44810800 mtc1 at,\$f1 + 13c: 44800000 mtc1 zero,\$f0 140: 8f810000 lw at,0\(gp\) - 144: 00000000 nop - 148: 24210000 addiu at,at,0 - 14c: 88240000 lwl a0,0\(at\) - 150: 98240003 lwr a0,3\(at\) - 154: 8f810000 lw at,0\(gp\) - 158: 00000000 nop - 15c: 24210000 addiu at,at,0 - 160: a8240000 swl a0,0\(at\) - 164: b8240003 swr a0,3\(at\) - 168: 3c043ff0 lui a0,0x3ff0 - 16c: 00002821 move a1,zero - 170: 8f810000 lw at,0\(gp\) - 174: 8c240000 lw a0,0\(at\) - 178: 8c250004 lw a1,4\(at\) - 17c: 3c013ff0 lui at,0x3ff0 - 180: 44810800 mtc1 at,\$f1 - 184: 44800000 mtc1 zero,\$f0 - 188: 8f810000 lw at,0\(gp\) - 18c: d4200008 ldc1 \$f0,8\(at\) - 190: 24a40064 addiu a0,a1,100 - 194: 2c840001 sltiu a0,a0,1 - 198: 24a40064 addiu a0,a1,100 - 19c: 0004202b sltu a0,zero,a0 - 1a0: 00a02021 move a0,a1 + 144: d4200008 ldc1 \$f0,8\(at\) + 148: 24a40064 addiu a0,a1,100 + 14c: 2c840001 sltiu a0,a0,1 + 150: 24a40064 addiu a0,a1,100 + 154: 0004202b sltu a0,zero,a0 + 158: 00a02021 move a0,a1 -0+01a4 <[^>]*>: +0+015c <[^>]*>: ... diff --git a/gas/testsuite/gas/mips/mips-abi32-pic2.d b/gas/testsuite/gas/mips/mips-abi32-pic2.d index 1f3811eb3be..412416e4f4b 100644 --- a/gas/testsuite/gas/mips/mips-abi32-pic2.d +++ b/gas/testsuite/gas/mips/mips-abi32-pic2.d @@ -13,62 +13,59 @@ Disassembly of section \.text: 0+00c <[^>]*> afbc0008 sw gp,8\(sp\) 0+010 <[^>]*> 8f990000 lw t9,0\(gp\) 10: R_MIPS_GOT16 \.text -0+014 <[^>]*> 00000000 nop -0+018 <[^>]*> 273900d8 addiu t9,t9,216 - 18: R_MIPS_LO16 \.text -0+01c <[^>]*> 0320f809 jalr t9 -0+020 <[^>]*> 00000000 nop -0+024 <[^>]*> 8fbc0008 lw gp,8\(sp\) -0+028 <[^>]*> 00000000 nop -0+02c <[^>]*> 0320f809 jalr t9 -0+030 <[^>]*> 00000000 nop -0+034 <[^>]*> 8fbc0008 lw gp,8\(sp\) -0+038 <[^>]*> 3c1c0000 lui gp,0x0 - 38: R_MIPS_HI16 _gp_disp -0+03c <[^>]*> 279c0000 addiu gp,gp,0 - 3c: R_MIPS_LO16 _gp_disp -0+040 <[^>]*> 0399e021 addu gp,gp,t9 -0+044 <[^>]*> 3c010001 lui at,0x1 -0+048 <[^>]*> 003d0821 addu at,at,sp -0+04c <[^>]*> ac3c8000 sw gp,-32768\(at\) -0+050 <[^>]*> 8f990000 lw t9,0\(gp\) - 50: R_MIPS_GOT16 \.text -0+054 <[^>]*> 00000000 nop -0+058 <[^>]*> 273900d8 addiu t9,t9,216 - 58: R_MIPS_LO16 \.text -0+05c <[^>]*> 0320f809 jalr t9 -0+060 <[^>]*> 00000000 nop -0+064 <[^>]*> 3c010001 lui at,0x1 -0+068 <[^>]*> 003d0821 addu at,at,sp -0+06c <[^>]*> 8c3c8000 lw gp,-32768\(at\) +0+014 <[^>]*> 273900cc addiu t9,t9,204 + 14: R_MIPS_LO16 \.text +0+018 <[^>]*> 0320f809 jalr t9 +0+01c <[^>]*> 00000000 nop +0+020 <[^>]*> 8fbc0008 lw gp,8\(sp\) +0+024 <[^>]*> 00000000 nop +0+028 <[^>]*> 0320f809 jalr t9 +0+02c <[^>]*> 00000000 nop +0+030 <[^>]*> 8fbc0008 lw gp,8\(sp\) +0+034 <[^>]*> 3c1c0000 lui gp,0x0 + 34: R_MIPS_HI16 _gp_disp +0+038 <[^>]*> 279c0000 addiu gp,gp,0 + 38: R_MIPS_LO16 _gp_disp +0+03c <[^>]*> 0399e021 addu gp,gp,t9 +0+040 <[^>]*> 3c010001 lui at,0x1 +0+044 <[^>]*> 003d0821 addu at,at,sp +0+048 <[^>]*> ac3c8000 sw gp,-32768\(at\) +0+04c <[^>]*> 8f990000 lw t9,0\(gp\) + 4c: R_MIPS_GOT16 \.text +0+050 <[^>]*> 273900cc addiu t9,t9,204 + 50: R_MIPS_LO16 \.text +0+054 <[^>]*> 0320f809 jalr t9 +0+058 <[^>]*> 00000000 nop +0+05c <[^>]*> 3c010001 lui at,0x1 +0+060 <[^>]*> 003d0821 addu at,at,sp +0+064 <[^>]*> 8c3c8000 lw gp,-32768\(at\) +0+068 <[^>]*> 00000000 nop +0+06c <[^>]*> 0320f809 jalr t9 0+070 <[^>]*> 00000000 nop -0+074 <[^>]*> 0320f809 jalr t9 -0+078 <[^>]*> 00000000 nop -0+07c <[^>]*> 3c010001 lui at,0x1 -0+080 <[^>]*> 003d0821 addu at,at,sp -0+084 <[^>]*> 8c3c8000 lw gp,-32768\(at\) -0+088 <[^>]*> 3c1c0000 lui gp,0x0 - 88: R_MIPS_HI16 _gp_disp -0+08c <[^>]*> 279c0000 addiu gp,gp,0 - 8c: R_MIPS_LO16 _gp_disp -0+090 <[^>]*> 0399e021 addu gp,gp,t9 -0+094 <[^>]*> 3c010001 lui at,0x1 -0+098 <[^>]*> 003d0821 addu at,at,sp -0+09c <[^>]*> ac3c0000 sw gp,0\(at\) -0+0a0 <[^>]*> 8f990000 lw t9,0\(gp\) - a0: R_MIPS_GOT16 \.text +0+074 <[^>]*> 3c010001 lui at,0x1 +0+078 <[^>]*> 003d0821 addu at,at,sp +0+07c <[^>]*> 8c3c8000 lw gp,-32768\(at\) +0+080 <[^>]*> 3c1c0000 lui gp,0x0 + 80: R_MIPS_HI16 _gp_disp +0+084 <[^>]*> 279c0000 addiu gp,gp,0 + 84: R_MIPS_LO16 _gp_disp +0+088 <[^>]*> 0399e021 addu gp,gp,t9 +0+08c <[^>]*> 3c010001 lui at,0x1 +0+090 <[^>]*> 003d0821 addu at,at,sp +0+094 <[^>]*> ac3c0000 sw gp,0\(at\) +0+098 <[^>]*> 8f990000 lw t9,0\(gp\) + 98: R_MIPS_GOT16 \.text +0+09c <[^>]*> 273900cc addiu t9,t9,204 + 9c: R_MIPS_LO16 \.text +0+0a0 <[^>]*> 0320f809 jalr t9 0+0a4 <[^>]*> 00000000 nop -0+0a8 <[^>]*> 273900d8 addiu t9,t9,216 - a8: R_MIPS_LO16 \.text -0+0ac <[^>]*> 0320f809 jalr t9 -0+0b0 <[^>]*> 00000000 nop -0+0b4 <[^>]*> 3c010001 lui at,0x1 -0+0b8 <[^>]*> 003d0821 addu at,at,sp -0+0bc <[^>]*> 8c3c0000 lw gp,0\(at\) -0+0c0 <[^>]*> 00000000 nop -0+0c4 <[^>]*> 0320f809 jalr t9 -0+0c8 <[^>]*> 00000000 nop -0+0cc <[^>]*> 3c010001 lui at,0x1 -0+0d0 <[^>]*> 003d0821 addu at,at,sp -0+0d4 <[^>]*> 8c3c0000 lw gp,0\(at\) +0+0a8 <[^>]*> 3c010001 lui at,0x1 +0+0ac <[^>]*> 003d0821 addu at,at,sp +0+0b0 <[^>]*> 8c3c0000 lw gp,0\(at\) +0+0b4 <[^>]*> 00000000 nop +0+0b8 <[^>]*> 0320f809 jalr t9 +0+0bc <[^>]*> 00000000 nop +0+0c0 <[^>]*> 3c010001 lui at,0x1 +0+0c4 <[^>]*> 003d0821 addu at,at,sp +0+0c8 <[^>]*> 8c3c0000 lw gp,0\(at\) \.\.\. diff --git a/gas/testsuite/gas/mips/mips-gp32-fp32-pic.d b/gas/testsuite/gas/mips/mips-gp32-fp32-pic.d index 05302463161..3fb84e98587 100644 --- a/gas/testsuite/gas/mips/mips-gp32-fp32-pic.d +++ b/gas/testsuite/gas/mips/mips-gp32-fp32-pic.d @@ -15,103 +15,85 @@ Disassembly of section .text: 14: 3c041234 lui a0,0x1234 18: 34845678 ori a0,a0,0x5678 1c: 8f840000 lw a0,0\(gp\) - 20: 00000000 nop - 24: 24840000 addiu a0,a0,0 - 28: 8f840000 lw a0,0\(gp\) - 2c: 00000000 nop - 30: 24840000 addiu a0,a0,0 - 34: 8f840000 lw a0,0\(gp\) + 20: 24840000 addiu a0,a0,0 + 24: 8f840000 lw a0,0\(gp\) + 28: 24840000 addiu a0,a0,0 + 2c: 8f840000 lw a0,0\(gp\) + 30: 2484015c addiu a0,a0,348 + 34: 10000049 b 15c <[^>]*> 38: 00000000 nop - 3c: 248401a4 addiu a0,a0,420 - 40: 10000058 b 1a4 <[^>]*> - 44: 00000000 nop - 48: 8f990000 lw t9,0\(gp\) - 4c: 00000000 nop - 50: 273901a4 addiu t9,t9,420 - 54: 0320f809 jalr t9 - 58: 00000000 nop - 5c: 8fbc0008 lw gp,8\(sp\) - 60: 8f840000 lw a0,0\(gp\) - 64: 00000000 nop - 68: 24840000 addiu a0,a0,0 - 6c: 8c840000 lw a0,0\(a0\) - 70: 8f840000 lw a0,0\(gp\) - 74: 00000000 nop - 78: 24840000 addiu a0,a0,0 - 7c: 8c840000 lw a0,0\(a0\) - 80: 8f840000 lw a0,0\(gp\) - 84: 00000000 nop - 88: 248401a4 addiu a0,a0,420 - 8c: 8c840000 lw a0,0\(a0\) - 90: 8f810000 lw at,0\(gp\) - 94: 00000000 nop - 98: 8c240000 lw a0,0\(at\) - 9c: 8c250004 lw a1,4\(at\) - a0: 8f810000 lw at,0\(gp\) - a4: 00000000 nop - a8: 8c240000 lw a0,0\(at\) - ac: 8c250004 lw a1,4\(at\) + 3c: 8f990000 lw t9,0\(gp\) + 40: 2739015c addiu t9,t9,348 + 44: 0320f809 jalr t9 + 48: 00000000 nop + 4c: 8fbc0008 lw gp,8\(sp\) + 50: 8f840000 lw a0,0\(gp\) + 54: 24840000 addiu a0,a0,0 + 58: 8c840000 lw a0,0\(a0\) + 5c: 8f840000 lw a0,0\(gp\) + 60: 24840000 addiu a0,a0,0 + 64: 8c840000 lw a0,0\(a0\) + 68: 8f840000 lw a0,0\(gp\) + 6c: 2484015c addiu a0,a0,348 + 70: 8c840000 lw a0,0\(a0\) + 74: 8f810000 lw at,0\(gp\) + 78: 8c240000 lw a0,0\(at\) + 7c: 8c250004 lw a1,4\(at\) + 80: 8f810000 lw at,0\(gp\) + 84: 8c240000 lw a0,0\(at\) + 88: 8c250004 lw a1,4\(at\) + 8c: 8f810000 lw at,0\(gp\) + 90: 8c24015c lw a0,348\(at\) + 94: 8c250160 lw a1,352\(at\) + 98: 8f810000 lw at,0\(gp\) + 9c: 24210000 addiu at,at,0 + a0: ac240000 sw a0,0\(at\) + a4: 8f810000 lw at,0\(gp\) + a8: 24210000 addiu at,at,0 + ac: ac240000 sw a0,0\(at\) b0: 8f810000 lw at,0\(gp\) - b4: 00000000 nop - b8: 8c2401a4 lw a0,420\(at\) - bc: 8c2501a8 lw a1,424\(at\) - c0: 8f810000 lw at,0\(gp\) - c4: 00000000 nop - c8: 24210000 addiu at,at,0 - cc: ac240000 sw a0,0\(at\) - d0: 8f810000 lw at,0\(gp\) - d4: 00000000 nop - d8: 24210000 addiu at,at,0 - dc: ac240000 sw a0,0\(at\) + b4: ac240000 sw a0,0\(at\) + b8: ac250004 sw a1,4\(at\) + bc: 8f810000 lw at,0\(gp\) + c0: ac240000 sw a0,0\(at\) + c4: ac250004 sw a1,4\(at\) + c8: 8f810000 lw at,0\(gp\) + cc: 24210000 addiu at,at,0 + d0: 80240000 lb a0,0\(at\) + d4: 90210001 lbu at,1\(at\) + d8: 00042200 sll a0,a0,0x8 + dc: 00812025 or a0,a0,at e0: 8f810000 lw at,0\(gp\) - e4: 00000000 nop - e8: ac240000 sw a0,0\(at\) - ec: ac250004 sw a1,4\(at\) - f0: 8f810000 lw at,0\(gp\) - f4: 00000000 nop - f8: ac240000 sw a0,0\(at\) - fc: ac250004 sw a1,4\(at\) + e4: 24210000 addiu at,at,0 + e8: a0240001 sb a0,1\(at\) + ec: 00042202 srl a0,a0,0x8 + f0: a0240000 sb a0,0\(at\) + f4: 90210001 lbu at,1\(at\) + f8: 00042200 sll a0,a0,0x8 + fc: 00812025 or a0,a0,at 100: 8f810000 lw at,0\(gp\) - 104: 00000000 nop - 108: 24210000 addiu at,at,0 - 10c: 80240000 lb a0,0\(at\) - 110: 90210001 lbu at,1\(at\) - 114: 00042200 sll a0,a0,0x8 - 118: 00812025 or a0,a0,at - 11c: 8f810000 lw at,0\(gp\) - 120: 00000000 nop - 124: 24210000 addiu at,at,0 - 128: a0240001 sb a0,1\(at\) - 12c: 00042202 srl a0,a0,0x8 - 130: a0240000 sb a0,0\(at\) - 134: 90210001 lbu at,1\(at\) - 138: 00042200 sll a0,a0,0x8 - 13c: 00812025 or a0,a0,at + 104: 24210000 addiu at,at,0 + 108: 88240000 lwl a0,0\(at\) + 10c: 98240003 lwr a0,3\(at\) + 110: 8f810000 lw at,0\(gp\) + 114: 24210000 addiu at,at,0 + 118: a8240000 swl a0,0\(at\) + 11c: b8240003 swr a0,3\(at\) + 120: 3c043ff0 lui a0,0x3ff0 + 124: 00002821 move a1,zero + 128: 8f810000 lw at,0\(gp\) + 12c: 8c240000 lw a0,0\(at\) + 130: 8c250004 lw a1,4\(at\) + 134: 3c013ff0 lui at,0x3ff0 + 138: 44810800 mtc1 at,\$f1 + 13c: 44800000 mtc1 zero,\$f0 140: 8f810000 lw at,0\(gp\) - 144: 00000000 nop - 148: 24210000 addiu at,at,0 - 14c: 88240000 lwl a0,0\(at\) - 150: 98240003 lwr a0,3\(at\) - 154: 8f810000 lw at,0\(gp\) - 158: 00000000 nop - 15c: 24210000 addiu at,at,0 - 160: a8240000 swl a0,0\(at\) - 164: b8240003 swr a0,3\(at\) - 168: 3c043ff0 lui a0,0x3ff0 - 16c: 00002821 move a1,zero - 170: 8f810000 lw at,0\(gp\) - 174: 8c240000 lw a0,0\(at\) - 178: 8c250004 lw a1,4\(at\) - 17c: 3c013ff0 lui at,0x3ff0 - 180: 44810800 mtc1 at,\$f1 - 184: 44800000 mtc1 zero,\$f0 - 188: 8f810000 lw at,0\(gp\) - 18c: d4200008 ldc1 \$f0,8\(at\) - 190: 24a40064 addiu a0,a1,100 - 194: 2c840001 sltiu a0,a0,1 - 198: 24a40064 addiu a0,a1,100 - 19c: 0004202b sltu a0,zero,a0 - 1a0: 00a02021 move a0,a1 + 144: d4200008 ldc1 \$f0,8\(at\) + 148: 24a40064 addiu a0,a1,100 + 14c: 2c840001 sltiu a0,a0,1 + 150: 24a40064 addiu a0,a1,100 + 154: 0004202b sltu a0,zero,a0 + 158: 00a02021 move a0,a1 -0+01a4 <[^>]*>: +0+015c <[^>]*>: ... diff --git a/gas/testsuite/gas/mips/mips-gp32-fp64-pic.d b/gas/testsuite/gas/mips/mips-gp32-fp64-pic.d index 5ed7df07e4a..52c1701bd41 100644 --- a/gas/testsuite/gas/mips/mips-gp32-fp64-pic.d +++ b/gas/testsuite/gas/mips/mips-gp32-fp64-pic.d @@ -15,103 +15,85 @@ Disassembly of section .text: 14: 3c041234 lui a0,0x1234 18: 34845678 ori a0,a0,0x5678 1c: 8f840000 lw a0,0\(gp\) - 20: 00000000 nop - 24: 24840000 addiu a0,a0,0 - 28: 8f840000 lw a0,0\(gp\) - 2c: 00000000 nop - 30: 24840000 addiu a0,a0,0 - 34: 8f840000 lw a0,0\(gp\) + 20: 24840000 addiu a0,a0,0 + 24: 8f840000 lw a0,0\(gp\) + 28: 24840000 addiu a0,a0,0 + 2c: 8f840000 lw a0,0\(gp\) + 30: 2484015c addiu a0,a0,348 + 34: 10000049 b 15c <[^>]*> 38: 00000000 nop - 3c: 248401a4 addiu a0,a0,420 - 40: 10000058 b 1a4 <[^>]*> - 44: 00000000 nop - 48: 8f990000 lw t9,0\(gp\) - 4c: 00000000 nop - 50: 273901a4 addiu t9,t9,420 - 54: 0320f809 jalr t9 - 58: 00000000 nop - 5c: 8fbc0008 lw gp,8\(sp\) - 60: 8f840000 lw a0,0\(gp\) - 64: 00000000 nop - 68: 24840000 addiu a0,a0,0 - 6c: 8c840000 lw a0,0\(a0\) - 70: 8f840000 lw a0,0\(gp\) - 74: 00000000 nop - 78: 24840000 addiu a0,a0,0 - 7c: 8c840000 lw a0,0\(a0\) - 80: 8f840000 lw a0,0\(gp\) - 84: 00000000 nop - 88: 248401a4 addiu a0,a0,420 - 8c: 8c840000 lw a0,0\(a0\) - 90: 8f810000 lw at,0\(gp\) - 94: 00000000 nop - 98: 8c240000 lw a0,0\(at\) - 9c: 8c250004 lw a1,4\(at\) - a0: 8f810000 lw at,0\(gp\) - a4: 00000000 nop - a8: 8c240000 lw a0,0\(at\) - ac: 8c250004 lw a1,4\(at\) + 3c: 8f990000 lw t9,0\(gp\) + 40: 2739015c addiu t9,t9,348 + 44: 0320f809 jalr t9 + 48: 00000000 nop + 4c: 8fbc0008 lw gp,8\(sp\) + 50: 8f840000 lw a0,0\(gp\) + 54: 24840000 addiu a0,a0,0 + 58: 8c840000 lw a0,0\(a0\) + 5c: 8f840000 lw a0,0\(gp\) + 60: 24840000 addiu a0,a0,0 + 64: 8c840000 lw a0,0\(a0\) + 68: 8f840000 lw a0,0\(gp\) + 6c: 2484015c addiu a0,a0,348 + 70: 8c840000 lw a0,0\(a0\) + 74: 8f810000 lw at,0\(gp\) + 78: 8c240000 lw a0,0\(at\) + 7c: 8c250004 lw a1,4\(at\) + 80: 8f810000 lw at,0\(gp\) + 84: 8c240000 lw a0,0\(at\) + 88: 8c250004 lw a1,4\(at\) + 8c: 8f810000 lw at,0\(gp\) + 90: 8c24015c lw a0,348\(at\) + 94: 8c250160 lw a1,352\(at\) + 98: 8f810000 lw at,0\(gp\) + 9c: 24210000 addiu at,at,0 + a0: ac240000 sw a0,0\(at\) + a4: 8f810000 lw at,0\(gp\) + a8: 24210000 addiu at,at,0 + ac: ac240000 sw a0,0\(at\) b0: 8f810000 lw at,0\(gp\) - b4: 00000000 nop - b8: 8c2401a4 lw a0,420\(at\) - bc: 8c2501a8 lw a1,424\(at\) - c0: 8f810000 lw at,0\(gp\) - c4: 00000000 nop - c8: 24210000 addiu at,at,0 - cc: ac240000 sw a0,0\(at\) - d0: 8f810000 lw at,0\(gp\) - d4: 00000000 nop - d8: 24210000 addiu at,at,0 - dc: ac240000 sw a0,0\(at\) + b4: ac240000 sw a0,0\(at\) + b8: ac250004 sw a1,4\(at\) + bc: 8f810000 lw at,0\(gp\) + c0: ac240000 sw a0,0\(at\) + c4: ac250004 sw a1,4\(at\) + c8: 8f810000 lw at,0\(gp\) + cc: 24210000 addiu at,at,0 + d0: 80240000 lb a0,0\(at\) + d4: 90210001 lbu at,1\(at\) + d8: 00042200 sll a0,a0,0x8 + dc: 00812025 or a0,a0,at e0: 8f810000 lw at,0\(gp\) - e4: 00000000 nop - e8: ac240000 sw a0,0\(at\) - ec: ac250004 sw a1,4\(at\) - f0: 8f810000 lw at,0\(gp\) - f4: 00000000 nop - f8: ac240000 sw a0,0\(at\) - fc: ac250004 sw a1,4\(at\) + e4: 24210000 addiu at,at,0 + e8: a0240001 sb a0,1\(at\) + ec: 00042202 srl a0,a0,0x8 + f0: a0240000 sb a0,0\(at\) + f4: 90210001 lbu at,1\(at\) + f8: 00042200 sll a0,a0,0x8 + fc: 00812025 or a0,a0,at 100: 8f810000 lw at,0\(gp\) - 104: 00000000 nop - 108: 24210000 addiu at,at,0 - 10c: 80240000 lb a0,0\(at\) - 110: 90210001 lbu at,1\(at\) - 114: 00042200 sll a0,a0,0x8 - 118: 00812025 or a0,a0,at - 11c: 8f810000 lw at,0\(gp\) - 120: 00000000 nop - 124: 24210000 addiu at,at,0 - 128: a0240001 sb a0,1\(at\) - 12c: 00042202 srl a0,a0,0x8 - 130: a0240000 sb a0,0\(at\) - 134: 90210001 lbu at,1\(at\) - 138: 00042200 sll a0,a0,0x8 - 13c: 00812025 or a0,a0,at - 140: 8f810000 lw at,0\(gp\) - 144: 00000000 nop - 148: 24210000 addiu at,at,0 - 14c: 88240000 lwl a0,0\(at\) - 150: 98240003 lwr a0,3\(at\) - 154: 8f810000 lw at,0\(gp\) - 158: 00000000 nop - 15c: 24210000 addiu at,at,0 - 160: a8240000 swl a0,0\(at\) - 164: b8240003 swr a0,3\(at\) - 168: 3c043ff0 lui a0,0x3ff0 - 16c: 00002821 move a1,zero - 170: 8f810000 lw at,0\(gp\) - 174: 8c240000 lw a0,0\(at\) - 178: 8c250004 lw a1,4\(at\) - 17c: 8f810000 lw at,0\(gp\) - 180: d4200008 ldc1 \$f0,8\(at\) - 184: 8f810000 lw at,0\(gp\) - 188: d4200010 ldc1 \$f0,16\(at\) - 18c: 24a40064 addiu a0,a1,100 - 190: 2c840001 sltiu a0,a0,1 - 194: 24a40064 addiu a0,a1,100 - 198: 0004202b sltu a0,zero,a0 - 19c: 00a02021 move a0,a1 - 1a0: 46231040 add.d \$f1,\$f2,\$f3 + 104: 24210000 addiu at,at,0 + 108: 88240000 lwl a0,0\(at\) + 10c: 98240003 lwr a0,3\(at\) + 110: 8f810000 lw at,0\(gp\) + 114: 24210000 addiu at,at,0 + 118: a8240000 swl a0,0\(at\) + 11c: b8240003 swr a0,3\(at\) + 120: 3c043ff0 lui a0,0x3ff0 + 124: 00002821 move a1,zero + 128: 8f810000 lw at,0\(gp\) + 12c: 8c240000 lw a0,0\(at\) + 130: 8c250004 lw a1,4\(at\) + 134: 8f810000 lw at,0\(gp\) + 138: d4200008 ldc1 \$f0,8\(at\) + 13c: 8f810000 lw at,0\(gp\) + 140: d4200010 ldc1 \$f0,16\(at\) + 144: 24a40064 addiu a0,a1,100 + 148: 2c840001 sltiu a0,a0,1 + 14c: 24a40064 addiu a0,a1,100 + 150: 0004202b sltu a0,zero,a0 + 154: 00a02021 move a0,a1 + 158: 46231040 add.d \$f1,\$f2,\$f3 -0+01a4 <[^>]*>: +0+015c <[^>]*>: ... diff --git a/gas/testsuite/gas/mips/mips-gp64-fp32-pic.d b/gas/testsuite/gas/mips/mips-gp64-fp32-pic.d index db6c76b1e46..f5a8e896394 100644 --- a/gas/testsuite/gas/mips/mips-gp64-fp32-pic.d +++ b/gas/testsuite/gas/mips/mips-gp64-fp32-pic.d @@ -15,138 +15,116 @@ Disassembly of section .text: 14: 3c041234 lui a0,0x1234 18: 34845678 ori a0,a0,0x5678 1c: 8f840000 lw a0,0\(gp\) - 20: 00000000 nop - 24: 24840000 addiu a0,a0,0 - 28: 8f840000 lw a0,0\(gp\) - 2c: 00000000 nop - 30: 24840000 addiu a0,a0,0 - 34: 8f840000 lw a0,0\(gp\) + 20: 24840000 addiu a0,a0,0 + 24: 8f840000 lw a0,0\(gp\) + 28: 24840000 addiu a0,a0,0 + 2c: 8f840000 lw a0,0\(gp\) + 30: 248401d8 addiu a0,a0,472 + 34: 10000068 b 1d8 <[^>]*> 38: 00000000 nop - 3c: 24840230 addiu a0,a0,560 - 40: 1000007b b 230 <[^>]*> - 44: 00000000 nop - 48: 8f990000 lw t9,0\(gp\) - 4c: 00000000 nop - 50: 27390230 addiu t9,t9,560 - 54: 0320f809 jalr t9 - 58: 00000000 nop - 5c: 8fbc0008 lw gp,8\(sp\) - 60: 8f840000 lw a0,0\(gp\) - 64: 00000000 nop - 68: 24840000 addiu a0,a0,0 - 6c: 8c840000 lw a0,0\(a0\) - 70: 8f840000 lw a0,0\(gp\) - 74: 00000000 nop + 3c: 8f990000 lw t9,0\(gp\) + 40: 273901d8 addiu t9,t9,472 + 44: 0320f809 jalr t9 + 48: 00000000 nop + 4c: 8fbc0008 lw gp,8\(sp\) + 50: 8f840000 lw a0,0\(gp\) + 54: 24840000 addiu a0,a0,0 + 58: 8c840000 lw a0,0\(a0\) + 5c: 8f840000 lw a0,0\(gp\) + 60: 24840000 addiu a0,a0,0 + 64: 8c840000 lw a0,0\(a0\) + 68: 8f840000 lw a0,0\(gp\) + 6c: 248401d8 addiu a0,a0,472 + 70: 8c840000 lw a0,0\(a0\) + 74: 8f840000 lw a0,0\(gp\) 78: 24840000 addiu a0,a0,0 - 7c: 8c840000 lw a0,0\(a0\) + 7c: dc840000 ld a0,0\(a0\) 80: 8f840000 lw a0,0\(gp\) - 84: 00000000 nop - 88: 24840230 addiu a0,a0,560 - 8c: 8c840000 lw a0,0\(a0\) - 90: 8f840000 lw a0,0\(gp\) - 94: 00000000 nop - 98: 24840000 addiu a0,a0,0 - 9c: dc840000 ld a0,0\(a0\) - a0: 8f840000 lw a0,0\(gp\) - a4: 00000000 nop - a8: 24840000 addiu a0,a0,0 - ac: dc840000 ld a0,0\(a0\) - b0: 8f840000 lw a0,0\(gp\) - b4: 00000000 nop - b8: 24840230 addiu a0,a0,560 - bc: dc840000 ld a0,0\(a0\) - c0: 8f810000 lw at,0\(gp\) - c4: 00000000 nop - c8: 24210000 addiu at,at,0 - cc: ac240000 sw a0,0\(at\) - d0: 8f810000 lw at,0\(gp\) - d4: 00000000 nop - d8: 24210000 addiu at,at,0 - dc: ac240000 sw a0,0\(at\) + 84: 24840000 addiu a0,a0,0 + 88: dc840000 ld a0,0\(a0\) + 8c: 8f840000 lw a0,0\(gp\) + 90: 248401d8 addiu a0,a0,472 + 94: dc840000 ld a0,0\(a0\) + 98: 8f810000 lw at,0\(gp\) + 9c: 24210000 addiu at,at,0 + a0: ac240000 sw a0,0\(at\) + a4: 8f810000 lw at,0\(gp\) + a8: 24210000 addiu at,at,0 + ac: ac240000 sw a0,0\(at\) + b0: 8f810000 lw at,0\(gp\) + b4: 24210000 addiu at,at,0 + b8: fc240000 sd a0,0\(at\) + bc: 8f810000 lw at,0\(gp\) + c0: 24210000 addiu at,at,0 + c4: fc240000 sd a0,0\(at\) + c8: 8f810000 lw at,0\(gp\) + cc: 24210000 addiu at,at,0 + d0: 80240000 lb a0,0\(at\) + d4: 90210001 lbu at,1\(at\) + d8: 00042200 sll a0,a0,0x8 + dc: 00812025 or a0,a0,at e0: 8f810000 lw at,0\(gp\) - e4: 00000000 nop - e8: 24210000 addiu at,at,0 - ec: fc240000 sd a0,0\(at\) - f0: 8f810000 lw at,0\(gp\) - f4: 00000000 nop - f8: 24210000 addiu at,at,0 - fc: fc240000 sd a0,0\(at\) + e4: 24210000 addiu at,at,0 + e8: a0240001 sb a0,1\(at\) + ec: 00042202 srl a0,a0,0x8 + f0: a0240000 sb a0,0\(at\) + f4: 90210001 lbu at,1\(at\) + f8: 00042200 sll a0,a0,0x8 + fc: 00812025 or a0,a0,at 100: 8f810000 lw at,0\(gp\) - 104: 00000000 nop - 108: 24210000 addiu at,at,0 - 10c: 80240000 lb a0,0\(at\) - 110: 90210001 lbu at,1\(at\) - 114: 00042200 sll a0,a0,0x8 - 118: 00812025 or a0,a0,at - 11c: 8f810000 lw at,0\(gp\) - 120: 00000000 nop - 124: 24210000 addiu at,at,0 - 128: a0240001 sb a0,1\(at\) - 12c: 00042202 srl a0,a0,0x8 - 130: a0240000 sb a0,0\(at\) - 134: 90210001 lbu at,1\(at\) - 138: 00042200 sll a0,a0,0x8 - 13c: 00812025 or a0,a0,at - 140: 8f810000 lw at,0\(gp\) - 144: 00000000 nop - 148: 24210000 addiu at,at,0 - 14c: 88240000 lwl a0,0\(at\) - 150: 98240003 lwr a0,3\(at\) - 154: 8f810000 lw at,0\(gp\) - 158: 00000000 nop - 15c: 24210000 addiu at,at,0 - 160: a8240000 swl a0,0\(at\) - 164: b8240003 swr a0,3\(at\) - 168: 3404ffc0 li a0,0xffc0 - 16c: 000423bc dsll32 a0,a0,0xe - 170: 8f810000 lw at,0\(gp\) - 174: dc240000 ld a0,0\(at\) - 178: 3c013ff0 lui at,0x3ff0 - 17c: 44810800 mtc1 at,\$f1 - 180: 44800000 mtc1 zero,\$f0 - 184: 8f810000 lw at,0\(gp\) - 188: d4200008 ldc1 \$f0,8\(at\) - 18c: 64a40064 daddiu a0,a1,100 - 190: 2c840001 sltiu a0,a0,1 - 194: 64a40064 daddiu a0,a1,100 - 198: 0004202b sltu a0,zero,a0 - 19c: 00a0202d move a0,a1 - 1a0: 8f840000 lw a0,0\(gp\) - 1a4: 00000000 nop - 1a8: 24840000 addiu a0,a0,0 - 1ac: 8f840000 lw a0,0\(gp\) - 1b0: 00000000 nop - 1b4: 24840000 addiu a0,a0,0 - 1b8: 8f810000 lw at,0\(gp\) - 1bc: 00000000 nop - 1c0: 24210000 addiu at,at,0 - 1c4: 68240000 ldl a0,0\(at\) - 1c8: 6c240007 ldr a0,7\(at\) - 1cc: 8f810000 lw at,0\(gp\) - 1d0: 00000000 nop - 1d4: 24210000 addiu at,at,0 - 1d8: b0240000 sdl a0,0\(at\) - 1dc: b4240007 sdr a0,7\(at\) - 1e0: 34018000 li at,0x8000 - 1e4: 00010c38 dsll at,at,0x10 - 1e8: 0081082a slt at,a0,at - 1ec: 10200010 beqz at,230 <[^>]*> - 1f0: 00000000 nop - 1f4: 34018000 li at,0x8000 - 1f8: 00010c78 dsll at,at,0x11 - 1fc: 0081082b sltu at,a0,at - 200: 1020000b beqz at,230 <[^>]*> - 204: 00000000 nop - 208: 34018000 li at,0x8000 - 20c: 00010c38 dsll at,at,0x10 - 210: 0081082a slt at,a0,at - 214: 14200006 bnez at,230 <[^>]*> - 218: 00000000 nop - 21c: 34018000 li at,0x8000 - 220: 00010c78 dsll at,at,0x11 - 224: 0081082b sltu at,a0,at - 228: 14200001 bnez at,230 <[^>]*> - 22c: 00000000 nop + 104: 24210000 addiu at,at,0 + 108: 88240000 lwl a0,0\(at\) + 10c: 98240003 lwr a0,3\(at\) + 110: 8f810000 lw at,0\(gp\) + 114: 24210000 addiu at,at,0 + 118: a8240000 swl a0,0\(at\) + 11c: b8240003 swr a0,3\(at\) + 120: 3404ffc0 li a0,0xffc0 + 124: 000423bc dsll32 a0,a0,0xe + 128: 8f810000 lw at,0\(gp\) + 12c: dc240000 ld a0,0\(at\) + 130: 3c013ff0 lui at,0x3ff0 + 134: 44810800 mtc1 at,\$f1 + 138: 44800000 mtc1 zero,\$f0 + 13c: 8f810000 lw at,0\(gp\) + 140: d4200008 ldc1 \$f0,8\(at\) + 144: 64a40064 daddiu a0,a1,100 + 148: 2c840001 sltiu a0,a0,1 + 14c: 64a40064 daddiu a0,a1,100 + 150: 0004202b sltu a0,zero,a0 + 154: 00a0202d move a0,a1 + 158: 8f840000 lw a0,0\(gp\) + 15c: 24840000 addiu a0,a0,0 + 160: 8f840000 lw a0,0\(gp\) + 164: 24840000 addiu a0,a0,0 + 168: 8f810000 lw at,0\(gp\) + 16c: 24210000 addiu at,at,0 + 170: 68240000 ldl a0,0\(at\) + 174: 6c240007 ldr a0,7\(at\) + 178: 8f810000 lw at,0\(gp\) + 17c: 24210000 addiu at,at,0 + 180: b0240000 sdl a0,0\(at\) + 184: b4240007 sdr a0,7\(at\) + 188: 34018000 li at,0x8000 + 18c: 00010c38 dsll at,at,0x10 + 190: 0081082a slt at,a0,at + 194: 10200010 beqz at,1d8 <[^>]*> + 198: 00000000 nop + 19c: 34018000 li at,0x8000 + 1a0: 00010c78 dsll at,at,0x11 + 1a4: 0081082b sltu at,a0,at + 1a8: 1020000b beqz at,1d8 <[^>]*> + 1ac: 00000000 nop + 1b0: 34018000 li at,0x8000 + 1b4: 00010c38 dsll at,at,0x10 + 1b8: 0081082a slt at,a0,at + 1bc: 14200006 bnez at,1d8 <[^>]*> + 1c0: 00000000 nop + 1c4: 34018000 li at,0x8000 + 1c8: 00010c78 dsll at,at,0x11 + 1cc: 0081082b sltu at,a0,at + 1d0: 14200001 bnez at,1d8 <[^>]*> + 1d4: 00000000 nop -0+0230 <[^>]*>: +0+01d8 <[^>]*>: ... diff --git a/gas/testsuite/gas/mips/mips-gp64-fp64-pic.d b/gas/testsuite/gas/mips/mips-gp64-fp64-pic.d index f66ea4e0fac..2e37f6850bd 100644 --- a/gas/testsuite/gas/mips/mips-gp64-fp64-pic.d +++ b/gas/testsuite/gas/mips/mips-gp64-fp64-pic.d @@ -15,139 +15,117 @@ Disassembly of section .text: 14: 3c041234 lui a0,0x1234 18: 34845678 ori a0,a0,0x5678 1c: 8f840000 lw a0,0\(gp\) - 20: 00000000 nop - 24: 24840000 addiu a0,a0,0 - 28: 8f840000 lw a0,0\(gp\) - 2c: 00000000 nop - 30: 24840000 addiu a0,a0,0 - 34: 8f840000 lw a0,0\(gp\) + 20: 24840000 addiu a0,a0,0 + 24: 8f840000 lw a0,0\(gp\) + 28: 24840000 addiu a0,a0,0 + 2c: 8f840000 lw a0,0\(gp\) + 30: 248401dc addiu a0,a0,476 + 34: 10000069 b 1dc <[^>]*> 38: 00000000 nop - 3c: 24840234 addiu a0,a0,564 - 40: 1000007c b 234 <[^>]*> - 44: 00000000 nop - 48: 8f990000 lw t9,0\(gp\) - 4c: 00000000 nop - 50: 27390234 addiu t9,t9,564 - 54: 0320f809 jalr t9 - 58: 00000000 nop - 5c: 8fbc0008 lw gp,8\(sp\) - 60: 8f840000 lw a0,0\(gp\) - 64: 00000000 nop - 68: 24840000 addiu a0,a0,0 - 6c: 8c840000 lw a0,0\(a0\) - 70: 8f840000 lw a0,0\(gp\) - 74: 00000000 nop + 3c: 8f990000 lw t9,0\(gp\) + 40: 273901dc addiu t9,t9,476 + 44: 0320f809 jalr t9 + 48: 00000000 nop + 4c: 8fbc0008 lw gp,8\(sp\) + 50: 8f840000 lw a0,0\(gp\) + 54: 24840000 addiu a0,a0,0 + 58: 8c840000 lw a0,0\(a0\) + 5c: 8f840000 lw a0,0\(gp\) + 60: 24840000 addiu a0,a0,0 + 64: 8c840000 lw a0,0\(a0\) + 68: 8f840000 lw a0,0\(gp\) + 6c: 248401dc addiu a0,a0,476 + 70: 8c840000 lw a0,0\(a0\) + 74: 8f840000 lw a0,0\(gp\) 78: 24840000 addiu a0,a0,0 - 7c: 8c840000 lw a0,0\(a0\) + 7c: dc840000 ld a0,0\(a0\) 80: 8f840000 lw a0,0\(gp\) - 84: 00000000 nop - 88: 24840234 addiu a0,a0,564 - 8c: 8c840000 lw a0,0\(a0\) - 90: 8f840000 lw a0,0\(gp\) - 94: 00000000 nop - 98: 24840000 addiu a0,a0,0 - 9c: dc840000 ld a0,0\(a0\) - a0: 8f840000 lw a0,0\(gp\) - a4: 00000000 nop - a8: 24840000 addiu a0,a0,0 - ac: dc840000 ld a0,0\(a0\) - b0: 8f840000 lw a0,0\(gp\) - b4: 00000000 nop - b8: 24840234 addiu a0,a0,564 - bc: dc840000 ld a0,0\(a0\) - c0: 8f810000 lw at,0\(gp\) - c4: 00000000 nop - c8: 24210000 addiu at,at,0 - cc: ac240000 sw a0,0\(at\) - d0: 8f810000 lw at,0\(gp\) - d4: 00000000 nop - d8: 24210000 addiu at,at,0 - dc: ac240000 sw a0,0\(at\) + 84: 24840000 addiu a0,a0,0 + 88: dc840000 ld a0,0\(a0\) + 8c: 8f840000 lw a0,0\(gp\) + 90: 248401dc addiu a0,a0,476 + 94: dc840000 ld a0,0\(a0\) + 98: 8f810000 lw at,0\(gp\) + 9c: 24210000 addiu at,at,0 + a0: ac240000 sw a0,0\(at\) + a4: 8f810000 lw at,0\(gp\) + a8: 24210000 addiu at,at,0 + ac: ac240000 sw a0,0\(at\) + b0: 8f810000 lw at,0\(gp\) + b4: 24210000 addiu at,at,0 + b8: fc240000 sd a0,0\(at\) + bc: 8f810000 lw at,0\(gp\) + c0: 24210000 addiu at,at,0 + c4: fc240000 sd a0,0\(at\) + c8: 8f810000 lw at,0\(gp\) + cc: 24210000 addiu at,at,0 + d0: 80240000 lb a0,0\(at\) + d4: 90210001 lbu at,1\(at\) + d8: 00042200 sll a0,a0,0x8 + dc: 00812025 or a0,a0,at e0: 8f810000 lw at,0\(gp\) - e4: 00000000 nop - e8: 24210000 addiu at,at,0 - ec: fc240000 sd a0,0\(at\) - f0: 8f810000 lw at,0\(gp\) - f4: 00000000 nop - f8: 24210000 addiu at,at,0 - fc: fc240000 sd a0,0\(at\) + e4: 24210000 addiu at,at,0 + e8: a0240001 sb a0,1\(at\) + ec: 00042202 srl a0,a0,0x8 + f0: a0240000 sb a0,0\(at\) + f4: 90210001 lbu at,1\(at\) + f8: 00042200 sll a0,a0,0x8 + fc: 00812025 or a0,a0,at 100: 8f810000 lw at,0\(gp\) - 104: 00000000 nop - 108: 24210000 addiu at,at,0 - 10c: 80240000 lb a0,0\(at\) - 110: 90210001 lbu at,1\(at\) - 114: 00042200 sll a0,a0,0x8 - 118: 00812025 or a0,a0,at - 11c: 8f810000 lw at,0\(gp\) - 120: 00000000 nop - 124: 24210000 addiu at,at,0 - 128: a0240001 sb a0,1\(at\) - 12c: 00042202 srl a0,a0,0x8 - 130: a0240000 sb a0,0\(at\) - 134: 90210001 lbu at,1\(at\) - 138: 00042200 sll a0,a0,0x8 - 13c: 00812025 or a0,a0,at - 140: 8f810000 lw at,0\(gp\) - 144: 00000000 nop - 148: 24210000 addiu at,at,0 - 14c: 88240000 lwl a0,0\(at\) - 150: 98240003 lwr a0,3\(at\) - 154: 8f810000 lw at,0\(gp\) - 158: 00000000 nop - 15c: 24210000 addiu at,at,0 - 160: a8240000 swl a0,0\(at\) - 164: b8240003 swr a0,3\(at\) - 168: 3404ffc0 li a0,0xffc0 - 16c: 000423bc dsll32 a0,a0,0xe - 170: 8f810000 lw at,0\(gp\) - 174: dc240000 ld a0,0\(at\) - 178: 3401ffc0 li at,0xffc0 - 17c: 00010bbc dsll32 at,at,0xe - 180: 44a10000 dmtc1 at,\$f0 - 184: 8f810000 lw at,0\(gp\) - 188: d4200008 ldc1 \$f0,8\(at\) - 18c: 64a40064 daddiu a0,a1,100 - 190: 2c840001 sltiu a0,a0,1 - 194: 64a40064 daddiu a0,a1,100 - 198: 0004202b sltu a0,zero,a0 - 19c: 00a0202d move a0,a1 - 1a0: 8f840000 lw a0,0\(gp\) - 1a4: 00000000 nop - 1a8: 24840000 addiu a0,a0,0 - 1ac: 8f840000 lw a0,0\(gp\) - 1b0: 00000000 nop - 1b4: 24840000 addiu a0,a0,0 - 1b8: 8f810000 lw at,0\(gp\) - 1bc: 00000000 nop - 1c0: 24210000 addiu at,at,0 - 1c4: 68240000 ldl a0,0\(at\) - 1c8: 6c240007 ldr a0,7\(at\) - 1cc: 8f810000 lw at,0\(gp\) - 1d0: 00000000 nop - 1d4: 24210000 addiu at,at,0 - 1d8: b0240000 sdl a0,0\(at\) - 1dc: b4240007 sdr a0,7\(at\) - 1e0: 34018000 li at,0x8000 - 1e4: 00010c38 dsll at,at,0x10 - 1e8: 0081082a slt at,a0,at - 1ec: 10200011 beqz at,234 <[^>]*> - 1f0: 00000000 nop - 1f4: 34018000 li at,0x8000 - 1f8: 00010c78 dsll at,at,0x11 - 1fc: 0081082b sltu at,a0,at - 200: 1020000c beqz at,234 <[^>]*> - 204: 00000000 nop - 208: 34018000 li at,0x8000 - 20c: 00010c38 dsll at,at,0x10 - 210: 0081082a slt at,a0,at - 214: 14200007 bnez at,234 <[^>]*> - 218: 00000000 nop - 21c: 34018000 li at,0x8000 - 220: 00010c78 dsll at,at,0x11 - 224: 0081082b sltu at,a0,at - 228: 14200002 bnez at,234 <[^>]*> - 22c: 00000000 nop - 230: 46231040 add.d \$f1,\$f2,\$f3 + 104: 24210000 addiu at,at,0 + 108: 88240000 lwl a0,0\(at\) + 10c: 98240003 lwr a0,3\(at\) + 110: 8f810000 lw at,0\(gp\) + 114: 24210000 addiu at,at,0 + 118: a8240000 swl a0,0\(at\) + 11c: b8240003 swr a0,3\(at\) + 120: 3404ffc0 li a0,0xffc0 + 124: 000423bc dsll32 a0,a0,0xe + 128: 8f810000 lw at,0\(gp\) + 12c: dc240000 ld a0,0\(at\) + 130: 3401ffc0 li at,0xffc0 + 134: 00010bbc dsll32 at,at,0xe + 138: 44a10000 dmtc1 at,\$f0 + 13c: 8f810000 lw at,0\(gp\) + 140: d4200008 ldc1 \$f0,8\(at\) + 144: 64a40064 daddiu a0,a1,100 + 148: 2c840001 sltiu a0,a0,1 + 14c: 64a40064 daddiu a0,a1,100 + 150: 0004202b sltu a0,zero,a0 + 154: 00a0202d move a0,a1 + 158: 8f840000 lw a0,0\(gp\) + 15c: 24840000 addiu a0,a0,0 + 160: 8f840000 lw a0,0\(gp\) + 164: 24840000 addiu a0,a0,0 + 168: 8f810000 lw at,0\(gp\) + 16c: 24210000 addiu at,at,0 + 170: 68240000 ldl a0,0\(at\) + 174: 6c240007 ldr a0,7\(at\) + 178: 8f810000 lw at,0\(gp\) + 17c: 24210000 addiu at,at,0 + 180: b0240000 sdl a0,0\(at\) + 184: b4240007 sdr a0,7\(at\) + 188: 34018000 li at,0x8000 + 18c: 00010c38 dsll at,at,0x10 + 190: 0081082a slt at,a0,at + 194: 10200011 beqz at,1dc <[^>]*> + 198: 00000000 nop + 19c: 34018000 li at,0x8000 + 1a0: 00010c78 dsll at,at,0x11 + 1a4: 0081082b sltu at,a0,at + 1a8: 1020000c beqz at,1dc <[^>]*> + 1ac: 00000000 nop + 1b0: 34018000 li at,0x8000 + 1b4: 00010c38 dsll at,at,0x10 + 1b8: 0081082a slt at,a0,at + 1bc: 14200007 bnez at,1dc <[^>]*> + 1c0: 00000000 nop + 1c4: 34018000 li at,0x8000 + 1c8: 00010c78 dsll at,at,0x11 + 1cc: 0081082b sltu at,a0,at + 1d0: 14200002 bnez at,1dc <[^>]*> + 1d4: 00000000 nop + 1d8: 46231040 add.d \$f1,\$f2,\$f3 -0+0234 <[^>]*>: +0+01dc <[^>]*>: ... diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp index a641c9b0088..c1dd7a7d1ce 100644 --- a/gas/testsuite/gas/mips/mips.exp +++ b/gas/testsuite/gas/mips/mips.exp @@ -445,24 +445,11 @@ if { [istarget mips*-*-*] } then { } if $elf { run_dump_test "jal-svr4pic" } if $elf { run_dump_test "jal-xgot" } - # LOSE: As of 2002-02-08, the jal-empic test fails for target mips-ecoff. - # It appears that it broke between 2000-03-11 00:00UTC and - # 2000-03-12 00:00 UTC. - if $ecoff { run_dump_test "jal-empic" } - if $elf { - run_dump_test_arches "jal-empic-elf" [mips_arch_list_matching mips1] - run_dump_test_arches "jal-empic-elf-2" [mips_arch_list_matching mips1] - run_dump_test_arches "jal-empic-elf-3" [mips_arch_list_matching mips1] - } run_list_test_arches "jal-range" "-32" [mips_arch_list_matching mips1] if $has_newabi { run_dump_test "jal-newabi" } if !$aout { run_dump_test "la" } if $elf { run_dump_test "la-svr4pic" } if $elf { run_dump_test "la-xgot" } - # LOSE: As of 2002-02-08, the la-empic test fails for target mips-ecoff. - # Not sure when it first cropped up, but may be related to addition of - # "la" -> "addiu" pattern in MIPS opcode table long ago. - if $ecoff { run_dump_test "la-empic" } if $elf { run_dump_test "lca-svr4pic" } if $elf { run_dump_test "lca-xgot" } if !$aout { @@ -471,7 +458,8 @@ if { [istarget mips*-*-*] } then { run_dump_test_arches "lb" [mips_arch_list_matching !mips2] } if $elf { - run_dump_test_arches "lb-svr4pic" [mips_arch_list_matching mips1] + run_dump_test_arches "lb-svr4pic" [mips_arch_list_matching !gpr_ilocks] + run_dump_test_arches "lb-svr4pic-ilocks" [mips_arch_list_matching gpr_ilocks] } if $elf { # Both versions specify the cpu, so we can run both regardless of @@ -479,7 +467,6 @@ if { [istarget mips*-*-*] } then { run_dump_test "lb-xgot" run_dump_test "lb-xgot-ilocks" } - if $ecoff { run_dump_test "lb-empic" } if !$aout { if !$gpr_ilocks { run_dump_test "ld" @@ -493,15 +480,10 @@ if { [istarget mips*-*-*] } then { } if $elf { run_dump_test "ld-svr4pic" } if $elf { run_dump_test "ld-xgot" } - if $ecoff { run_dump_test "ld-empic" } run_dump_test_arches "li" [mips_arch_list_matching mips1] if !$aout { run_dump_test "lifloat" } if $elf { run_dump_test "lif-svr4pic" } if $elf { run_dump_test "lif-xgot" } - # LOSE: As of 2002-02-08, the lif-empic test fails for target mips-ecoff. - # It appears that it broke between 2000-03-11 00:00UTC and - # 2000-03-12 00:00 UTC. - if $ecoff { run_dump_test "lif-empic" } run_dump_test_arches "mips4" [mips_arch_list_matching mips4] run_dump_test_arches "mips5" [mips_arch_list_matching mips5] if $ilocks { @@ -523,7 +505,6 @@ if { [istarget mips*-*-*] } then { run_dump_test_arches "ulh2-el" [mips_arch_list_matching mips1] if $elf { run_dump_test "ulh-svr4pic" } if $elf { run_dump_test "ulh-xgot" } - if $ecoff { run_dump_test "ulh-empic" } if !$aout { run_dump_test "ulw" run_dump_test "uld" @@ -680,11 +661,6 @@ if { [istarget mips*-*-*] } then { } run_dump_test "elf-rel19" - run_dump_test "${tmips}${el}empic" - run_dump_test "empic2" - run_dump_test "empic3_e" - run_dump_test "empic3_g1" - run_dump_test "empic3_g2" if { !$no_mips16 } { run_dump_test "${tmips}mips${el}16-e" run_dump_test "${tmips}mips${el}16-f" diff --git a/gas/testsuite/gas/mips/mips16-e.d b/gas/testsuite/gas/mips/mips16-e.d index 2b2fe213c3b..553a6b36ac7 100644 --- a/gas/testsuite/gas/mips/mips16-e.d +++ b/gas/testsuite/gas/mips/mips16-e.d @@ -7,12 +7,12 @@ .*: +file format elf.*mips.* SYMBOL TABLE: -0+0000000 l d \.text 0+0000000 -0+0000000 l d \.data 0+0000000 -0+0000000 l d \.bss 0+0000000 -0+0000000 l d foo 0+0000000 -0+0000000 l d \.reginfo 0+0000000 -0+0000000 l d \.(mdebug|pdr) 0+0000000 +0+0000000 l d \.text 0+0000000 (|\.text) +0+0000000 l d \.data 0+0000000 (|\.data) +0+0000000 l d \.bss 0+0000000 (|\.bss) +0+0000000 l d foo 0+0000000 (|foo) +0+0000000 l d \.reginfo 0+0000000 (|\.reginfo) +0+0000000 l d \.(mdebug|pdr) 0+0000000 (|\.mdebug|\.pdr) 0+0000002 l \.text 0+0000000 0xf0 l1 0+0000004 l \.text 0+0000000 0xf0 L1.1 0+0000000 \*UND\* 0+0000000 g1 diff --git a/gas/testsuite/gas/mips/mips16-f.d b/gas/testsuite/gas/mips/mips16-f.d index 9339b6eee14..84deb36e9f5 100644 --- a/gas/testsuite/gas/mips/mips16-f.d +++ b/gas/testsuite/gas/mips/mips16-f.d @@ -7,12 +7,12 @@ .*: +file format elf.*mips.* SYMBOL TABLE: -0+0000000 l d \.text 0+0000000 -0+0000000 l d \.data 0+0000000 -0+0000000 l d \.bss 0+0000000 -0+0000000 l d foo 0+0000000 -0+0000000 l d \.reginfo 0+0000000 -0+0000000 l d \.(mdebug|pdr) 0+0000000 +0+0000000 l d \.text 0+0000000 (|\.text) +0+0000000 l d \.data 0+0000000 (|\.data) +0+0000000 l d \.bss 0+0000000 (|\.bss) +0+0000000 l d foo 0+0000000 (|foo) +0+0000000 l d \.reginfo 0+0000000 (|\.reginfo) +0+0000000 l d \.(mdebug|pdr) 0+0000000 (|\.mdebug|\.pdr) 0+0000002 l \.text 0+0000000 0xf0 l1 diff --git a/gas/testsuite/gas/mips/mipsel16-e.d b/gas/testsuite/gas/mips/mipsel16-e.d index ad8c990cf16..2e20a1a196b 100644 --- a/gas/testsuite/gas/mips/mipsel16-e.d +++ b/gas/testsuite/gas/mips/mipsel16-e.d @@ -8,12 +8,12 @@ .*: +file format elf.*mips.* SYMBOL TABLE: -0+0000000 l d \.text 0+0000000 -0+0000000 l d \.data 0+0000000 -0+0000000 l d \.bss 0+0000000 -0+0000000 l d foo 0+0000000 -0+0000000 l d \.reginfo 0+0000000 -0+0000000 l d \.(mdebug|pdr) 0+0000000 +0+0000000 l d \.text 0+0000000 (|\.text) +0+0000000 l d \.data 0+0000000 (|\.data) +0+0000000 l d \.bss 0+0000000 (|\.bss) +0+0000000 l d foo 0+0000000 (|foo) +0+0000000 l d \.reginfo 0+0000000 (|\.reginfo) +0+0000000 l d \.(mdebug|pdr) 0+0000000 (|\.mdebug|\.pdr) 0+0000002 l \.text 0+0000000 0xf0 l1 0+0000004 l \.text 0+0000000 0xf0 L1.1 0+0000000 \*UND\* 0+0000000 g1 diff --git a/gas/testsuite/gas/mips/mipsel16-f.d b/gas/testsuite/gas/mips/mipsel16-f.d index 0e65842ed7b..9331f10ad01 100644 --- a/gas/testsuite/gas/mips/mipsel16-f.d +++ b/gas/testsuite/gas/mips/mipsel16-f.d @@ -8,12 +8,12 @@ .*: +file format elf.*mips.* SYMBOL TABLE: -0+0000000 l d \.text 0+0000000 -0+0000000 l d \.data 0+0000000 -0+0000000 l d \.bss 0+0000000 -0+0000000 l d foo 0+0000000 -0+0000000 l d \.reginfo 0+0000000 -0+0000000 l d \.(mdebug|pdr) 0+0000000 +0+0000000 l d \.text 0+0000000 (|\.text) +0+0000000 l d \.data 0+0000000 (|\.data) +0+0000000 l d \.bss 0+0000000 (|\.bss) +0+0000000 l d foo 0+0000000 (|foo) +0+0000000 l d \.reginfo 0+0000000 (|\.reginfo) +0+0000000 l d \.(mdebug|pdr) 0+0000000 (|\.mdebug|\.pdr) 0+0000002 l \.text 0+0000000 0xf0 l1 diff --git a/gas/testsuite/gas/mips/relax-swap1-mips2.d b/gas/testsuite/gas/mips/relax-swap1-mips2.d index 7297dd0031d..070ea3af1c6 100644 --- a/gas/testsuite/gas/mips/relax-swap1-mips2.d +++ b/gas/testsuite/gas/mips/relax-swap1-mips2.d @@ -11,7 +11,7 @@ Disassembly of section \.text: 0+0004 <[^>]*> move v0,a0 0+0008 <[^>]*> lw at,2\(gp\) [ ]*8: R_MIPS_GOT16 \.text -0+000c <[^>]*> addiu at,at,876 +0+000c <[^>]*> addiu at,at,868 [ ]*c: R_MIPS_LO16 \.text 0+0010 <[^>]*> jr at 0+0014 <[^>]*> move v0,a0 @@ -19,7 +19,7 @@ Disassembly of section \.text: 0+001c <[^>]*> lw v0,0\(a0\) 0+0020 <[^>]*> lw at,2\(gp\) [ ]*20: R_MIPS_GOT16 \.text -0+0024 <[^>]*> addiu at,at,876 +0+0024 <[^>]*> addiu at,at,868 [ ]*24: R_MIPS_LO16 \.text 0+0028 <[^>]*> jr at 0+002c <[^>]*> lw v0,0\(a0\) @@ -27,7 +27,7 @@ Disassembly of section \.text: 0+0034 <[^>]*> sw v0,0\(a0\) 0+0038 <[^>]*> lw at,2\(gp\) [ ]*38: R_MIPS_GOT16 \.text -0+003c <[^>]*> addiu at,at,876 +0+003c <[^>]*> addiu at,at,868 [ ]*3c: R_MIPS_LO16 \.text 0+0040 <[^>]*> jr at 0+0044 <[^>]*> sw v0,0\(a0\) @@ -39,7 +39,7 @@ Disassembly of section \.text: 0+005c <[^>]*> nop 0+0060 <[^>]*> lw at,2\(gp\) [ ]*60: R_MIPS_GOT16 \.text -0+0064 <[^>]*> addiu at,at,876 +0+0064 <[^>]*> addiu at,at,868 [ ]*64: R_MIPS_LO16 \.text 0+0068 <[^>]*> jr at 0+006c <[^>]*> nop @@ -49,7 +49,7 @@ Disassembly of section \.text: 0+007c <[^>]*> nop 0+0080 <[^>]*> lw at,2\(gp\) [ ]*80: R_MIPS_GOT16 \.text -0+0084 <[^>]*> addiu at,at,876 +0+0084 <[^>]*> addiu at,at,868 [ ]*84: R_MIPS_LO16 \.text 0+0088 <[^>]*> jr at 0+008c <[^>]*> move v0,a0 @@ -61,7 +61,7 @@ Disassembly of section \.text: 0+00a4 <[^>]*> nop 0+00a8 <[^>]*> lw at,2\(gp\) [ ]*a8: R_MIPS_GOT16 \.text -0+00ac <[^>]*> addiu at,at,876 +0+00ac <[^>]*> addiu at,at,868 [ ]*ac: R_MIPS_LO16 \.text 0+00b0 <[^>]*> jr at 0+00b4 <[^>]*> nop @@ -71,7 +71,7 @@ Disassembly of section \.text: 0+00c4 <[^>]*> nop 0+00c8 <[^>]*> lw at,2\(gp\) [ ]*c8: R_MIPS_GOT16 \.text -0+00cc <[^>]*> addiu at,at,876 +0+00cc <[^>]*> addiu at,at,868 [ ]*cc: R_MIPS_LO16 \.text 0+00d0 <[^>]*> jr at 0+00d4 <[^>]*> addiu v0,a0,1 @@ -83,7 +83,7 @@ Disassembly of section \.text: 0+00ec <[^>]*> nop 0+00f0 <[^>]*> lw at,2\(gp\) [ ]*f0: R_MIPS_GOT16 \.text -0+00f4 <[^>]*> addiu at,at,876 +0+00f4 <[^>]*> addiu at,at,868 [ ]*f4: R_MIPS_LO16 \.text 0+00f8 <[^>]*> jr at 0+00fc <[^>]*> nop @@ -93,7 +93,7 @@ Disassembly of section \.text: 0+010c <[^>]*> nop 0+0110 <[^>]*> lw at,2\(gp\) [ ]*110: R_MIPS_GOT16 \.text -0+0114 <[^>]*> addiu at,at,876 +0+0114 <[^>]*> addiu at,at,868 [ ]*114: R_MIPS_LO16 \.text 0+0118 <[^>]*> jr at 0+011c <[^>]*> lw v0,0\(a0\) @@ -103,7 +103,7 @@ Disassembly of section \.text: 0+012c <[^>]*> nop 0+0130 <[^>]*> lw at,2\(gp\) [ ]*130: R_MIPS_GOT16 \.text -0+0134 <[^>]*> addiu at,at,876 +0+0134 <[^>]*> addiu at,at,868 [ ]*134: R_MIPS_LO16 \.text 0+0138 <[^>]*> jr at 0+013c <[^>]*> sw v0,0\(a0\) @@ -113,7 +113,7 @@ Disassembly of section \.text: 0+014c <[^>]*> nop 0+0150 <[^>]*> lw at,2\(gp\) [ ]*150: R_MIPS_GOT16 \.text -0+0154 <[^>]*> addiu at,at,876 +0+0154 <[^>]*> addiu at,at,868 [ ]*154: R_MIPS_LO16 \.text 0+0158 <[^>]*> jr at 0+015c <[^>]*> sw v0,0\(a0\) @@ -127,7 +127,7 @@ Disassembly of section \.text: 0+017c <[^>]*> nop 0+0180 <[^>]*> lw at,2\(gp\) [ ]*180: R_MIPS_GOT16 \.text -0+0184 <[^>]*> addiu at,at,876 +0+0184 <[^>]*> addiu at,at,868 [ ]*184: R_MIPS_LO16 \.text 0+0188 <[^>]*> jr at 0+018c <[^>]*> nop @@ -139,7 +139,7 @@ Disassembly of section \.text: 0+01a4 <[^>]*> nop 0+01a8 <[^>]*> lw at,2\(gp\) [ ]*1a8: R_MIPS_GOT16 \.text -0+01ac <[^>]*> addiu at,at,876 +0+01ac <[^>]*> addiu at,at,868 [ ]*1ac: R_MIPS_LO16 \.text 0+01b0 <[^>]*> jr at 0+01b4 <[^>]*> move a2,a3 @@ -151,7 +151,7 @@ Disassembly of section \.text: 0+01cc <[^>]*> nop 0+01d0 <[^>]*> lw at,2\(gp\) [ ]*1d0: R_MIPS_GOT16 \.text -0+01d4 <[^>]*> addiu at,at,876 +0+01d4 <[^>]*> addiu at,at,868 [ ]*1d4: R_MIPS_LO16 \.text 0+01d8 <[^>]*> jr at 0+01dc <[^>]*> nop @@ -161,7 +161,7 @@ Disassembly of section \.text: 0+01ec <[^>]*> move v0,a0 0+01f0 <[^>]*> lw at,2\(gp\) [ ]*1f0: R_MIPS_GOT16 \.text -0+01f4 <[^>]*> addiu at,at,876 +0+01f4 <[^>]*> addiu at,at,868 [ ]*1f4: R_MIPS_LO16 \.text 0+01f8 <[^>]*> jr at 0+01fc <[^>]*> nop @@ -171,7 +171,7 @@ Disassembly of section \.text: 0+020c <[^>]*> move v0,a0 0+0210 <[^>]*> lw at,2\(gp\) [ ]*210: R_MIPS_GOT16 \.text -0+0214 <[^>]*> addiu at,at,876 +0+0214 <[^>]*> addiu at,at,868 [ ]*214: R_MIPS_LO16 \.text 0+0218 <[^>]*> jr at 0+021c <[^>]*> nop @@ -183,98 +183,96 @@ Disassembly of section \.text: 0+0234 <[^>]*> move v0,a0 0+0238 <[^>]*> lw at,2\(gp\) [ ]*238: R_MIPS_GOT16 \.text -0+023c <[^>]*> addiu at,at,876 +0+023c <[^>]*> addiu at,at,868 [ ]*23c: R_MIPS_LO16 \.text 0+0240 <[^>]*> jr at 0+0244 <[^>]*> nop 0+0248 <[^>]*> lw at,0\(gp\) [ ]*248: R_MIPS_GOT16 \.text -0+024c <[^>]*> nop -0+0250 <[^>]*> addiu at,at,600 -[ ]*250: R_MIPS_LO16 \.text -0+0254 <[^>]*> sw v0,0\(at\) -0+0258 <[^>]*> b 00000000 <foo> -0+025c <[^>]*> nop -0+0260 <[^>]*> lw at,0\(gp\) -[ ]*260: R_MIPS_GOT16 \.text -0+0264 <[^>]*> nop -0+0268 <[^>]*> addiu at,at,624 -[ ]*268: R_MIPS_LO16 \.text -0+026c <[^>]*> sw v0,0\(at\) -0+0270 <[^>]*> lw at,2\(gp\) -[ ]*270: R_MIPS_GOT16 \.text -0+0274 <[^>]*> addiu at,at,876 -[ ]*274: R_MIPS_LO16 \.text -0+0278 <[^>]*> jr at -0+027c <[^>]*> nop -0+0280 <[^>]*> b 00000000 <foo> -0+0284 <[^>]*> lwc1 \$f0,0\(a0\) -0+0288 <[^>]*> lw at,2\(gp\) -[ ]*288: R_MIPS_GOT16 \.text -0+028c <[^>]*> addiu at,at,876 -[ ]*28c: R_MIPS_LO16 \.text -0+0290 <[^>]*> jr at -0+0294 <[^>]*> lwc1 \$f0,0\(a0\) -0+0298 <[^>]*> cfc1 v0,\$31 -0+029c <[^>]*> b 00000000 <foo> -0+02a0 <[^>]*> nop -0+02a4 <[^>]*> cfc1 v0,\$31 -0+02a8 <[^>]*> lw at,2\(gp\) -[ ]*2a8: R_MIPS_GOT16 \.text -0+02ac <[^>]*> addiu at,at,876 -[ ]*2ac: R_MIPS_LO16 \.text -0+02b0 <[^>]*> jr at -0+02b4 <[^>]*> nop -0+02b8 <[^>]*> ctc1 v0,\$31 -0+02bc <[^>]*> b 00000000 <foo> -0+02c0 <[^>]*> nop -0+02c4 <[^>]*> ctc1 v0,\$31 -0+02c8 <[^>]*> lw at,2\(gp\) -[ ]*2c8: R_MIPS_GOT16 \.text -0+02cc <[^>]*> addiu at,at,876 -[ ]*2cc: R_MIPS_LO16 \.text -0+02d0 <[^>]*> jr at -0+02d4 <[^>]*> nop -0+02d8 <[^>]*> mtc1 v0,\$f31 -0+02dc <[^>]*> b 00000000 <foo> -0+02e0 <[^>]*> nop -0+02e4 <[^>]*> mtc1 v0,\$f31 -0+02e8 <[^>]*> lw at,2\(gp\) -[ ]*2e8: R_MIPS_GOT16 \.text -0+02ec <[^>]*> addiu at,at,876 -[ ]*2ec: R_MIPS_LO16 \.text -0+02f0 <[^>]*> jr at -0+02f4 <[^>]*> nop -0+02f8 <[^>]*> mfhi v0 -0+02fc <[^>]*> b 00000000 <foo> -0+0300 <[^>]*> nop -0+0304 <[^>]*> mfhi v0 -0+0308 <[^>]*> lw at,2\(gp\) -[ ]*308: R_MIPS_GOT16 \.text -0+030c <[^>]*> addiu at,at,876 -[ ]*30c: R_MIPS_LO16 \.text -0+0310 <[^>]*> jr at -0+0314 <[^>]*> nop -0+0318 <[^>]*> move v0,a0 -0+031c <[^>]*> jr v0 -0+0320 <[^>]*> nop -0+0324 <[^>]*> jr a0 -0+0328 <[^>]*> move v0,a0 -0+032c <[^>]*> move v0,a0 -0+0330 <[^>]*> jalr v0 -0+0334 <[^>]*> nop -0+0338 <[^>]*> jalr a0 -0+033c <[^>]*> move v0,a0 -0+0340 <[^>]*> move v0,ra -0+0344 <[^>]*> jalr v1 -0+0348 <[^>]*> nop -0+034c <[^>]*> move ra,a0 -0+0350 <[^>]*> jalr a1 -0+0354 <[^>]*> nop -0+0358 <[^>]*> jalr v0,v1 -0+035c <[^>]*> move ra,a0 -0+0360 <[^>]*> move v0,ra -0+0364 <[^>]*> jalr v0,v1 -0+0368 <[^>]*> nop +0+024c <[^>]*> addiu at,at,596 +[ ]*24c: R_MIPS_LO16 \.text +0+0250 <[^>]*> sw v0,0\(at\) +0+0254 <[^>]*> b 00000000 <foo> +0+0258 <[^>]*> nop +0+025c <[^>]*> lw at,0\(gp\) +[ ]*25c: R_MIPS_GOT16 \.text +0+0260 <[^>]*> addiu at,at,616 +[ ]*260: R_MIPS_LO16 \.text +0+0264 <[^>]*> sw v0,0\(at\) +0+0268 <[^>]*> lw at,2\(gp\) +[ ]*268: R_MIPS_GOT16 \.text +0+026c <[^>]*> addiu at,at,868 +[ ]*26c: R_MIPS_LO16 \.text +0+0270 <[^>]*> jr at +0+0274 <[^>]*> nop +0+0278 <[^>]*> b 00000000 <foo> +0+027c <[^>]*> lwc1 \$f0,0\(a0\) +0+0280 <[^>]*> lw at,2\(gp\) +[ ]*280: R_MIPS_GOT16 \.text +0+0284 <[^>]*> addiu at,at,868 +[ ]*284: R_MIPS_LO16 \.text +0+0288 <[^>]*> jr at +0+028c <[^>]*> lwc1 \$f0,0\(a0\) +0+0290 <[^>]*> cfc1 v0,\$31 +0+0294 <[^>]*> b 00000000 <foo> +0+0298 <[^>]*> nop +0+029c <[^>]*> cfc1 v0,\$31 +0+02a0 <[^>]*> lw at,2\(gp\) +[ ]*2a0: R_MIPS_GOT16 \.text +0+02a4 <[^>]*> addiu at,at,868 +[ ]*2a4: R_MIPS_LO16 \.text +0+02a8 <[^>]*> jr at +0+02ac <[^>]*> nop +0+02b0 <[^>]*> ctc1 v0,\$31 +0+02b4 <[^>]*> b 00000000 <foo> +0+02b8 <[^>]*> nop +0+02bc <[^>]*> ctc1 v0,\$31 +0+02c0 <[^>]*> lw at,2\(gp\) +[ ]*2c0: R_MIPS_GOT16 \.text +0+02c4 <[^>]*> addiu at,at,868 +[ ]*2c4: R_MIPS_LO16 \.text +0+02c8 <[^>]*> jr at +0+02cc <[^>]*> nop +0+02d0 <[^>]*> mtc1 v0,\$f31 +0+02d4 <[^>]*> b 00000000 <foo> +0+02d8 <[^>]*> nop +0+02dc <[^>]*> mtc1 v0,\$f31 +0+02e0 <[^>]*> lw at,2\(gp\) +[ ]*2e0: R_MIPS_GOT16 \.text +0+02e4 <[^>]*> addiu at,at,868 +[ ]*2e4: R_MIPS_LO16 \.text +0+02e8 <[^>]*> jr at +0+02ec <[^>]*> nop +0+02f0 <[^>]*> mfhi v0 +0+02f4 <[^>]*> b 00000000 <foo> +0+02f8 <[^>]*> nop +0+02fc <[^>]*> mfhi v0 +0+0300 <[^>]*> lw at,2\(gp\) +[ ]*300: R_MIPS_GOT16 \.text +0+0304 <[^>]*> addiu at,at,868 +[ ]*304: R_MIPS_LO16 \.text +0+0308 <[^>]*> jr at +0+030c <[^>]*> nop +0+0310 <[^>]*> move v0,a0 +0+0314 <[^>]*> jr v0 +0+0318 <[^>]*> nop +0+031c <[^>]*> jr a0 +0+0320 <[^>]*> move v0,a0 +0+0324 <[^>]*> move v0,a0 +0+0328 <[^>]*> jalr v0 +0+032c <[^>]*> nop +0+0330 <[^>]*> jalr a0 +0+0334 <[^>]*> move v0,a0 +0+0338 <[^>]*> move v0,ra +0+033c <[^>]*> jalr v1 +0+0340 <[^>]*> nop +0+0344 <[^>]*> move ra,a0 +0+0348 <[^>]*> jalr a1 +0+034c <[^>]*> nop +0+0350 <[^>]*> jalr v0,v1 +0+0354 <[^>]*> move ra,a0 +0+0358 <[^>]*> move v0,ra +0+035c <[^>]*> jalr v0,v1 +0+0360 <[^>]*> nop \.\.\. \.\.\. diff --git a/gas/testsuite/gas/mips/telempic.d b/gas/testsuite/gas/mips/telempic.d deleted file mode 100644 index 96bc263b6b0..00000000000 --- a/gas/testsuite/gas/mips/telempic.d +++ /dev/null @@ -1,155 +0,0 @@ -#objdump: -rst -mmips:4000 -#name: MIPS empic -#as: -mabi=o64 -membedded-pic -mips3 -#source: empic.s -#stderr: empic.l - -# Check GNU-specific embedded relocs, for ELF. - -.*: +file format elf.*mips.* - -SYMBOL TABLE: -0+0000000 l d \.text 0+0000000 -0+0000000 l d \.data 0+0000000 -0+0000000 l d \.bss 0+0000000 -0+0000004 l \.text 0+0000000 l2 -0+0000100 l \.foo 0+0000000 l1 -0+0000034 l \.text 0+0000000 l3 -0+0000098 l \.text 0+0000000 l5 -0+0000000 l d \.foo 0+0000000 -0+0000004 l \.foo 0+0000000 l4 -0+0000000 l d \.reginfo 0+0000000 -0+0000000 l d \.(mdebug|pdr) 0+0000000 -0+0000000 \*UND\* 0+0000000 g1 -0+0000000 \*UND\* 0+0000000 g2 - - -RELOCATION RECORDS FOR \[\.text\]: -OFFSET [ ]+ TYPE VALUE -0+0000004 R_MIPS_GNU_REL16_S2 g1 -0+000000c R_MIPS_GNU_REL16_S2 g2 -0+0000014 R_MIPS_GNU_REL16_S2 g2 -0+000001c R_MIPS_GNU_REL16_S2 \.foo -0+0000024 R_MIPS_GNU_REL16_S2 \.text -0+000002c R_MIPS_GNU_REL16_S2 \.foo -0+0000034 R_MIPS_GNU_REL16_S2 \.text -0+000003c R_MIPS_GNU_REL_HI16 g1 -0+0000040 R_MIPS_GNU_REL_LO16 g1 -0+0000044 R_MIPS_GNU_REL_HI16 \.foo -0+0000048 R_MIPS_GNU_REL_LO16 \.foo -0+0000050 R_MIPS_32 g1 -0+0000054 R_MIPS_32 \.foo -0+0000058 R_MIPS_32 \.text -0+000005c R_MIPS_PC32 g1 -0+0000060 R_MIPS_PC32 \.foo -0+0000068 R_MIPS_64 g1 -0+0000070 R_MIPS_64 \.foo -0+0000078 R_MIPS_64 \.text -0+0000080 R_MIPS_PC64 g1 -0+0000088 R_MIPS_PC64 \.foo -0+0000098 R_MIPS_GNU_REL16_S2 \.text -0+000009c R_MIPS_GNU_REL16_S2 \.text -0+00000a0 R_MIPS_GNU_REL_HI16 \.text -0+00000a4 R_MIPS_GNU_REL_LO16 \.text -0+00000a8 R_MIPS_GNU_REL_HI16 \.text -0+00000ac R_MIPS_GNU_REL_LO16 \.text -0+00000b0 R_MIPS_32 \.text -0+00000b8 R_MIPS_64 \.text -0+00000cc R_MIPS_GNU_REL16_S2 \.text -0+00000d0 R_MIPS_GNU_REL16_S2 \.text -0+00000d4 R_MIPS_GNU_REL_HI16 \.text -0+00000d8 R_MIPS_GNU_REL_LO16 \.text -0+00000dc R_MIPS_GNU_REL_HI16 \.text -0+00000e0 R_MIPS_GNU_REL_LO16 \.text -0+00000e4 R_MIPS_32 \.text -0+00000f0 R_MIPS_64 \.text - - -RELOCATION RECORDS FOR \[\.foo\]: -OFFSET [ ]+ TYPE VALUE -0+0000004 R_MIPS_GNU_REL_HI16 g1 -0+0000008 R_MIPS_GNU_REL_LO16 g1 -0+000000c R_MIPS_GNU_REL_HI16 \.foo -0+0000010 R_MIPS_GNU_REL_LO16 \.foo -0+0000014 R_MIPS_GNU_REL_HI16 \.text -0+0000018 R_MIPS_GNU_REL_LO16 \.text -0+000001c R_MIPS_GNU_REL_HI16 g1 -0+0000020 R_MIPS_GNU_REL_LO16 g1 -0+0000024 R_MIPS_GNU_REL_HI16 g1 -0+0000028 R_MIPS_GNU_REL_LO16 g1 -0+000002c R_MIPS_GNU_REL_HI16 \.foo -0+0000030 R_MIPS_GNU_REL_LO16 \.foo -0+0000034 R_MIPS_GNU_REL_HI16 \.text -0+0000038 R_MIPS_GNU_REL_LO16 \.text -0+000003c R_MIPS_32 g1 -0+0000040 R_MIPS_32 \.foo -0+0000044 R_MIPS_32 \.text -0+0000048 R_MIPS_PC32 g1 -0+0000050 R_MIPS_PC32 \.text -0+0000058 R_MIPS_64 g1 -0+0000060 R_MIPS_64 \.foo -0+0000068 R_MIPS_64 \.text -0+0000070 R_MIPS_PC64 g1 -0+0000080 R_MIPS_PC64 \.text -0+0000088 R_MIPS_GNU_REL_HI16 g1 -0+000008c R_MIPS_GNU_REL_LO16 g1 -0+0000090 R_MIPS_GNU_REL_HI16 \.foo -0+0000094 R_MIPS_GNU_REL_LO16 \.foo -0+0000098 R_MIPS_GNU_REL_HI16 \.text -0+000009c R_MIPS_GNU_REL_LO16 \.text -0+00000a0 R_MIPS_GNU_REL_HI16 g1 -0+00000a4 R_MIPS_GNU_REL_LO16 g1 -0+00000a8 R_MIPS_GNU_REL_HI16 \.foo -0+00000ac R_MIPS_GNU_REL_LO16 \.foo -0+00000b0 R_MIPS_GNU_REL_HI16 \.text -0+00000b4 R_MIPS_GNU_REL_LO16 \.text -0+00000b8 R_MIPS_32 g1 -0+00000bc R_MIPS_32 \.foo -0+00000c0 R_MIPS_32 \.text -0+00000c4 R_MIPS_PC32 g1 -0+00000cc R_MIPS_PC32 \.text -0+00000d0 R_MIPS_64 g1 -0+00000d8 R_MIPS_64 \.foo -0+00000e0 R_MIPS_64 \.text -0+00000e8 R_MIPS_PC64 g1 -0+00000f8 R_MIPS_PC64 \.text - -Contents of section \.text: - 0000 00000000 ffff1104 00000000 ffff0010 .* - 0010 00000000 ffff0010 00000000 3f001104 .* - 0020 00000000 00001104 00000000 41000010 .* - 0030 00000000 00000010 00000000 0000033c .* - 0040 0c0063[26]4 0000033c 140163[26]4 d0ff03[26]4 .* - 0050 00000000 00010000 04000000 28000000 .* - 0060 2c010000 d0ffffff 00000000 00000000 .* - 0070 00010000 00000000 04000000 00000000 .* - 0080 4c000000 00000000 54010000 00000000 .* - 0090 d0ffffff ffffffff 32000010 33000010 .* - 00a0 0000033c d80063[26]4 0000033c e80063[26]4 .* - 00b0 cc000000 34000000 cc000000 00000000 .* - 00c0 34000000 00000000 00000000 32000010 .* - 00d0 33000010 0000033c 0c0163[26]4 0000033c .* - 00e0 1c0163[26]4 cc000000 34000000 00000000 .* - 00f0 cc000000 00000000 34000000 00000000 .* -Contents of section \.reginfo: - 0000 08000080 00000000 00000000 00000000 .* - 0010 00000000 00000000 .* -Contents of section \.foo: - 0000 00000000 0000033c 040063[26]4 0000033c .* - 0010 0c0163[26]4 0000033c 180063[26]4 0000033c .* - 0020 1c0063[26]4 0000033c 240063[26]4 0000033c .* - 0030 2c0163[26]4 0000033c 380063[26]4 00000000 .* - 0040 00010000 04000000 44000000 fc000000 .* - 0050 50000000 00000000 00000000 00000000 .* - 0060 00010000 00000000 04000000 00000000 .* - 0070 6c000000 00000000 fc000000 00000000 .* - 0080 80000000 00000000 0000033c 8c0063[26]4 .* - 0090 0000033c 940163[26]4 0000033c a00063[26]4 .* - 00a0 0000033c a40063[26]4 0000033c ac0163[26]4 .* - 00b0 0000033c b80063[26]4 04000000 04010000 .* - 00c0 08000000 c4000000 00010000 d0000000 .* - 00d0 04000000 00000000 04010000 00000000 .* - 00e0 08000000 00000000 e8000000 00000000 .* - 00f0 00010000 00000000 fc000000 00000000 .* - 0100 00000000 00000000 00000000 00000000 .* - diff --git a/gas/testsuite/gas/mips/tempic.d b/gas/testsuite/gas/mips/tempic.d deleted file mode 100644 index 07dbc966b19..00000000000 --- a/gas/testsuite/gas/mips/tempic.d +++ /dev/null @@ -1,155 +0,0 @@ -#objdump: -rst -mmips:4000 -#name: MIPS empic -#as: -mabi=o64 -membedded-pic -mips3 -#source: empic.s -#stderr: empic.l - -# Check GNU-specific embedded relocs, for ELF. - -.*: +file format elf.*mips.* - -SYMBOL TABLE: -0+0000000 l d \.text 0+0000000 -0+0000000 l d \.data 0+0000000 -0+0000000 l d \.bss 0+0000000 -0+0000004 l \.text 0+0000000 l2 -0+0000100 l \.foo 0+0000000 l1 -0+0000034 l \.text 0+0000000 l3 -0+0000098 l \.text 0+0000000 l5 -0+0000000 l d \.foo 0+0000000 -0+0000004 l \.foo 0+0000000 l4 -0+0000000 l d \.reginfo 0+0000000 -0+0000000 l d \.(mdebug|pdr) 0+0000000 -0+0000000 \*UND\* 0+0000000 g1 -0+0000000 \*UND\* 0+0000000 g2 - - -RELOCATION RECORDS FOR \[\.text\]: -OFFSET [ ]+ TYPE VALUE -0+0000004 R_MIPS_GNU_REL16_S2 g1 -0+000000c R_MIPS_GNU_REL16_S2 g2 -0+0000014 R_MIPS_GNU_REL16_S2 g2 -0+000001c R_MIPS_GNU_REL16_S2 \.foo -0+0000024 R_MIPS_GNU_REL16_S2 \.text -0+000002c R_MIPS_GNU_REL16_S2 \.foo -0+0000034 R_MIPS_GNU_REL16_S2 \.text -0+000003c R_MIPS_GNU_REL_HI16 g1 -0+0000040 R_MIPS_GNU_REL_LO16 g1 -0+0000044 R_MIPS_GNU_REL_HI16 \.foo -0+0000048 R_MIPS_GNU_REL_LO16 \.foo -0+0000050 R_MIPS_32 g1 -0+0000054 R_MIPS_32 \.foo -0+0000058 R_MIPS_32 \.text -0+000005c R_MIPS_PC32 g1 -0+0000060 R_MIPS_PC32 \.foo -0+0000068 R_MIPS_64 g1 -0+0000070 R_MIPS_64 \.foo -0+0000078 R_MIPS_64 \.text -0+0000080 R_MIPS_PC64 g1 -0+0000088 R_MIPS_PC64 \.foo -0+0000098 R_MIPS_GNU_REL16_S2 \.text -0+000009c R_MIPS_GNU_REL16_S2 \.text -0+00000a0 R_MIPS_GNU_REL_HI16 \.text -0+00000a4 R_MIPS_GNU_REL_LO16 \.text -0+00000a8 R_MIPS_GNU_REL_HI16 \.text -0+00000ac R_MIPS_GNU_REL_LO16 \.text -0+00000b0 R_MIPS_32 \.text -0+00000b8 R_MIPS_64 \.text -0+00000cc R_MIPS_GNU_REL16_S2 \.text -0+00000d0 R_MIPS_GNU_REL16_S2 \.text -0+00000d4 R_MIPS_GNU_REL_HI16 \.text -0+00000d8 R_MIPS_GNU_REL_LO16 \.text -0+00000dc R_MIPS_GNU_REL_HI16 \.text -0+00000e0 R_MIPS_GNU_REL_LO16 \.text -0+00000e4 R_MIPS_32 \.text -0+00000f0 R_MIPS_64 \.text - - -RELOCATION RECORDS FOR \[\.foo\]: -OFFSET [ ]+ TYPE VALUE -0+0000004 R_MIPS_GNU_REL_HI16 g1 -0+0000008 R_MIPS_GNU_REL_LO16 g1 -0+000000c R_MIPS_GNU_REL_HI16 \.foo -0+0000010 R_MIPS_GNU_REL_LO16 \.foo -0+0000014 R_MIPS_GNU_REL_HI16 \.text -0+0000018 R_MIPS_GNU_REL_LO16 \.text -0+000001c R_MIPS_GNU_REL_HI16 g1 -0+0000020 R_MIPS_GNU_REL_LO16 g1 -0+0000024 R_MIPS_GNU_REL_HI16 g1 -0+0000028 R_MIPS_GNU_REL_LO16 g1 -0+000002c R_MIPS_GNU_REL_HI16 \.foo -0+0000030 R_MIPS_GNU_REL_LO16 \.foo -0+0000034 R_MIPS_GNU_REL_HI16 \.text -0+0000038 R_MIPS_GNU_REL_LO16 \.text -0+000003c R_MIPS_32 g1 -0+0000040 R_MIPS_32 \.foo -0+0000044 R_MIPS_32 \.text -0+0000048 R_MIPS_PC32 g1 -0+0000050 R_MIPS_PC32 \.text -0+0000058 R_MIPS_64 g1 -0+0000060 R_MIPS_64 \.foo -0+0000068 R_MIPS_64 \.text -0+0000070 R_MIPS_PC64 g1 -0+0000080 R_MIPS_PC64 \.text -0+0000088 R_MIPS_GNU_REL_HI16 g1 -0+000008c R_MIPS_GNU_REL_LO16 g1 -0+0000090 R_MIPS_GNU_REL_HI16 \.foo -0+0000094 R_MIPS_GNU_REL_LO16 \.foo -0+0000098 R_MIPS_GNU_REL_HI16 \.text -0+000009c R_MIPS_GNU_REL_LO16 \.text -0+00000a0 R_MIPS_GNU_REL_HI16 g1 -0+00000a4 R_MIPS_GNU_REL_LO16 g1 -0+00000a8 R_MIPS_GNU_REL_HI16 \.foo -0+00000ac R_MIPS_GNU_REL_LO16 \.foo -0+00000b0 R_MIPS_GNU_REL_HI16 \.text -0+00000b4 R_MIPS_GNU_REL_LO16 \.text -0+00000b8 R_MIPS_32 g1 -0+00000bc R_MIPS_32 \.foo -0+00000c0 R_MIPS_32 \.text -0+00000c4 R_MIPS_PC32 g1 -0+00000cc R_MIPS_PC32 \.text -0+00000d0 R_MIPS_64 g1 -0+00000d8 R_MIPS_64 \.foo -0+00000e0 R_MIPS_64 \.text -0+00000e8 R_MIPS_PC64 g1 -0+00000f8 R_MIPS_PC64 \.text - -Contents of section \.text: - 0000 00000000 0411ffff 00000000 1000ffff .* - 0010 00000000 1000ffff 00000000 0411003f .* - 0020 00000000 04110000 00000000 10000041 .* - 0030 00000000 10000000 00000000 3c030000 .* - 0040 [26]463000c 3c030000 [26]4630114 [26]403ffd0 .* - 0050 00000000 00000100 00000004 00000028 .* - 0060 0000012c ffffffd0 00000000 00000000 .* - 0070 00000000 00000100 00000000 00000004 .* - 0080 00000000 0000004c 00000000 00000154 .* - 0090 ffffffff ffffffd0 10000032 10000033 .* - 00a0 3c030000 [26]46300d8 3c030000 [26]46300e8 .* - 00b0 000000cc 00000034 00000000 000000cc .* - 00c0 00000000 00000034 00000000 10000032 .* - 00d0 10000033 3c030000 [26]463010c 3c030000 .* - 00e0 [26]463011c 000000cc 00000034 00000000 .* - 00f0 00000000 000000cc 00000000 00000034 .* -Contents of section \.reginfo: - 0000 80000008 00000000 00000000 00000000 .* - 0010 00000000 00000000 .* -Contents of section \.foo: - 0000 00000000 3c030000 [26]4630004 3c030000 .* - 0010 [26]463010c 3c030000 [26]4630018 3c030000 .* - 0020 [26]463001c 3c030000 [26]4630024 3c030000 .* - 0030 [26]463012c 3c030000 [26]4630038 00000000 .* - 0040 00000100 00000004 00000044 000000fc .* - 0050 00000050 00000000 00000000 00000000 .* - 0060 00000000 00000100 00000000 00000004 .* - 0070 00000000 0000006c 00000000 000000fc .* - 0080 00000000 00000080 3c030000 [26]463008c .* - 0090 3c030000 [26]4630194 3c030000 [26]46300a0 .* - 00a0 3c030000 [26]46300a4 3c030000 [26]46301ac .* - 00b0 3c030000 [26]46300b8 00000004 00000104 .* - 00c0 00000008 000000c4 00000100 000000d0 .* - 00d0 00000000 00000004 00000000 00000104 .* - 00e0 00000000 00000008 00000000 000000e8 .* - 00f0 00000000 00000100 00000000 000000fc .* - 0100 00000000 00000000 00000000 00000000 .* - diff --git a/gas/testsuite/gas/mips/ulh-empic.d b/gas/testsuite/gas/mips/ulh-empic.d deleted file mode 100644 index 1f1a337d78c..00000000000 --- a/gas/testsuite/gas/mips/ulh-empic.d +++ /dev/null @@ -1,91 +0,0 @@ -#objdump: -dr --prefix-addresses -mmips:3000 -#name: MIPS ulh-empic -#as: -32 -mips1 -membedded-pic -#source: ulh-pic.s - -# Test the ulh macro with -membedded-pic. - -.*: +file format .*mips.* - -Disassembly of section .text: -0+0000 <[^>]*> addiu at,gp,-16384 -[ ]*0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+0004 <[^>]*> lb a0,[01]\(at\) -0+0008 <[^>]*> lbu at,[01]\(at\) -0+000c <[^>]*> sll a0,a0,0x8 -0+0010 <[^>]*> or a0,a0,at -0+0014 <[^>]*> addiu at,gp,0 -[ ]*14: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+0018 <[^>]*> lbu a0,[01]\(at\) -0+001c <[^>]*> lbu at,[01]\(at\) -0+0020 <[^>]*> sll a0,a0,0x8 -0+0024 <[^>]*> or a0,a0,at -0+0028 <[^>]*> addiu at,gp,0 -[ ]*28: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+002c <[^>]*> lwl a0,[03]\(at\) -0+0030 <[^>]*> lwr a0,[03]\(at\) -0+0034 <[^>]*> addiu at,gp,0 -[ ]*34: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+0038 <[^>]*> sb a0,[01]\(at\) -0+003c <[^>]*> srl a0,a0,0x8 -0+0040 <[^>]*> sb a0,[01]\(at\) -0+0044 <[^>]*> lbu at,[01]\(at\) -0+0048 <[^>]*> sll a0,a0,0x8 -0+004c <[^>]*> or a0,a0,at -0+0050 <[^>]*> addiu at,gp,0 -[ ]*50: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+0054 <[^>]*> swl a0,[03]\(at\) -0+0058 <[^>]*> swr a0,[03]\(at\) -0+005c <[^>]*> addiu at,gp,-16384 -[ ]*5c: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+0060 <[^>]*> lb a0,[01]\(at\) -0+0064 <[^>]*> lbu at,[01]\(at\) -0+0068 <[^>]*> sll a0,a0,0x8 -0+006c <[^>]*> or a0,a0,at -0+0070 <[^>]*> addiu at,gp,-15384 -[ ]*70: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+0074 <[^>]*> lbu a0,[01]\(at\) -0+0078 <[^>]*> lbu at,[01]\(at\) -0+007c <[^>]*> sll a0,a0,0x8 -0+0080 <[^>]*> or a0,a0,at -0+0084 <[^>]*> addiu at,gp,-16383 -[ ]*84: [A-Z0-9_]*GPREL[A-Z0-9_]* .sdata.* -0+0088 <[^>]*> lwl a0,[03]\(at\) -0+008c <[^>]*> lwr a0,[03]\(at\) -0+0090 <[^>]*> addiu at,gp,1 -[ ]*90: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_data_label -0+0094 <[^>]*> sb a0,[01]\(at\) -0+0098 <[^>]*> srl a0,a0,0x8 -0+009c <[^>]*> sb a0,[01]\(at\) -0+00a0 <[^>]*> lbu at,[01]\(at\) -0+00a4 <[^>]*> sll a0,a0,0x8 -0+00a8 <[^>]*> or a0,a0,at -0+00ac <[^>]*> addiu at,gp,1 -[ ]*ac: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_data_label -0+00b0 <[^>]*> swl a0,[03]\(at\) -0+00b4 <[^>]*> swr a0,[03]\(at\) -0+00b8 <[^>]*> addiu at,gp,1 -[ ]*b8: [A-Z0-9_]*GPREL[A-Z0-9_]* big_external_common -0+00bc <[^>]*> lb a0,[01]\(at\) -0+00c0 <[^>]*> lbu at,[01]\(at\) -0+00c4 <[^>]*> sll a0,a0,0x8 -0+00c8 <[^>]*> or a0,a0,at -0+00cc <[^>]*> addiu at,gp,1 -[ ]*cc: [A-Z0-9_]*GPREL[A-Z0-9_]* small_external_common -0+00d0 <[^>]*> lbu a0,[01]\(at\) -0+00d4 <[^>]*> lbu at,[01]\(at\) -0+00d8 <[^>]*> sll a0,a0,0x8 -0+00dc <[^>]*> or a0,a0,at -0+00e0 <[^>]*> addiu at,gp,-16383 -[ ]*e0: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00e4 <[^>]*> lwl a0,[03]\(at\) -0+00e8 <[^>]*> lwr a0,[03]\(at\) -0+00ec <[^>]*> addiu at,gp,-15383 -[ ]*ec: [A-Z0-9_]*GPREL[A-Z0-9_]* .sbss.* -0+00f0 <[^>]*> sb a0,[01]\(at\) -0+00f4 <[^>]*> srl a0,a0,0x8 -0+00f8 <[^>]*> sb a0,[01]\(at\) -0+00fc <[^>]*> lbu at,[01]\(at\) -0+0100 <[^>]*> sll a0,a0,0x8 -0+0104 <[^>]*> or a0,a0,at - ... diff --git a/gas/testsuite/gas/mips/vr4122.d b/gas/testsuite/gas/mips/vr4122.d index 9ff3b6d377a..99e0043dd2f 100644 --- a/gas/testsuite/gas/mips/vr4122.d +++ b/gas/testsuite/gas/mips/vr4122.d @@ -1,6 +1,6 @@ #objdump: -dz --prefix-addresses -m mips:4120 -#as: -32 -march=vr4120 -mtune=vr4120 -mfix-vr4122-bugs -#name: MIPS vr4122 workarounds +#as: -32 -march=vr4120 -mfix-vr4120 +#name: MIPS vr4120 workarounds .*: +file format .*mips.* diff --git a/gas/testsuite/gas/mips/vr4122.s b/gas/testsuite/gas/mips/vr4122.s index 6c38c885da1..4661e1a0ebd 100644 --- a/gas/testsuite/gas/mips/vr4122.s +++ b/gas/testsuite/gas/mips/vr4122.s @@ -1,4 +1,4 @@ -# Test that certain vr4122 hardware bugs are worked around. +# Test workarounds selected by -mfix-vr4120. # Note that we only work around bugs gcc may generate. r21: diff --git a/gas/testsuite/gas/ppc/power4.d b/gas/testsuite/gas/ppc/power4.d index 6094848ee5d..4a56a271382 100644 --- a/gas/testsuite/gas/ppc/power4.d +++ b/gas/testsuite/gas/ppc/power4.d @@ -10,7 +10,7 @@ start address 0x0+ Sections: Idx Name +Size +VMA +LMA +File off +Algn - +0 \.text +0+b8 +0+ +0+ +.* + +0 \.text +0+c4 +0+ +0+ +.* +CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE +1 \.data +0+10 +0+ +0+ +.* +CONTENTS, ALLOC, LOAD, DATA @@ -99,3 +99,6 @@ Disassembly of section \.text: +ac: 7c 72 00 26 mfcr r3,32 +b0: 7c 74 00 26 mfcr r3,64 +b4: 7c 78 00 26 mfcr r3,128 + +b8: 7c 01 17 ec dcbz r1,r2 + +bc: 7c 23 27 ec dcbzl r3,r4 + +c0: 7c 05 37 ec dcbz r5,r6 diff --git a/gas/testsuite/gas/ppc/power4.s b/gas/testsuite/gas/ppc/power4.s index 3514e63f17a..f2a162dc953 100644 --- a/gas/testsuite/gas/ppc/power4.s +++ b/gas/testsuite/gas/ppc/power4.s @@ -68,6 +68,10 @@ dsym1: mfcr 3,0x40 mfcr 3,0x80 + dcbz 1, 2 + dcbzl 3, 4 + dcbz 5, 6 + .section ".data" usym0: .llong 0xcafebabe usym1: diff --git a/gas/testsuite/gas/sh/basic.exp b/gas/testsuite/gas/sh/basic.exp index 9d16e0eddc7..1e72ff1fdac 100644 --- a/gas/testsuite/gas/sh/basic.exp +++ b/gas/testsuite/gas/sh/basic.exp @@ -157,6 +157,9 @@ if [istarget sh*-*-*] then { run_dump_test "tlspic" run_dump_test "tlsnopic" + + # Test -renesas. + run_dump_test "renesas-1" } } diff --git a/gas/testsuite/gas/sh/pcrel2.d b/gas/testsuite/gas/sh/pcrel2.d index 60a01df1cb7..21df0aa7d2f 100644 --- a/gas/testsuite/gas/sh/pcrel2.d +++ b/gas/testsuite/gas/sh/pcrel2.d @@ -8,8 +8,8 @@ Disassembly of section \.text: 00000000 <code>: 0: 8b 01 bf 6 <foo> - 2: d0 02 mov\.l c <bar>,r0 ! 0x6 - 4: 90 02 mov\.w c <bar>,r0 ! 0x0 + 2: d0 02 mov\.l c <bar>,r0 ! 0x6 .* + 4: 90 02 mov\.w c <bar>,r0 ! 0x0 .* 00000006 <foo>: 6: af fe bra 6 <foo> diff --git a/gas/testsuite/gas/sh/renesas-1.d b/gas/testsuite/gas/sh/renesas-1.d new file mode 100644 index 00000000000..e1c9247a3b4 --- /dev/null +++ b/gas/testsuite/gas/sh/renesas-1.d @@ -0,0 +1,11 @@ +#objdump: -dr +#as: -renesas + +.*: +file format .* + +Disassembly of section .text: + +00000000 <foo-0x4>: + 0: 00 00 [ ]*\.word 0x0000 +[ ]+0: R_SH_DIR32 foo + \.\.\. diff --git a/gas/testsuite/gas/sh/renesas-1.s b/gas/testsuite/gas/sh/renesas-1.s new file mode 100644 index 00000000000..974b5863d62 --- /dev/null +++ b/gas/testsuite/gas/sh/renesas-1.s @@ -0,0 +1,3 @@ + .text + .long foo +foo: diff --git a/gas/testsuite/gas/sh/sh64/err-dsp.s b/gas/testsuite/gas/sh/sh64/err-dsp.s index 52173a712c8..3cee009a01b 100644 --- a/gas/testsuite/gas/sh/sh64/err-dsp.s +++ b/gas/testsuite/gas/sh/sh64/err-dsp.s @@ -11,5 +11,5 @@ .text start: ldc r3,mod ! { dg-error "invalid operands" } - ldre @(16,pc) ! { dg-error "unknown opcode" } + ldre @(16,pc) ! { dg-error "opcode not valid for this cpu variant" } lds r4,a0 ! { dg-error "invalid operands" } diff --git a/gas/testsuite/gas/sh/tlsd.d b/gas/testsuite/gas/sh/tlsd.d index 5ca4ef58dbf..b4d75974c85 100644 --- a/gas/testsuite/gas/sh/tlsd.d +++ b/gas/testsuite/gas/sh/tlsd.d @@ -11,12 +11,12 @@ Disassembly of section .text: 2: 2f e6 [ ]*mov\.l r14,@-r15 4: 4f 22 [ ]*sts\.l pr,@-r15 6: c7 14 [ ]*mova 58 <fn\+0x58>,r0 - 8: dc 13 [ ]*mov\.l 58 <fn\+0x58>,r12[ ]+! 0x0 + 8: dc 13 [ ]*mov\.l 58 <fn\+0x58>,r12[ ]+! 0x0 .* a: 3c 0c [ ]*add r0,r12 c: 6e f3 [ ]*mov r15,r14 - e: d4 04 [ ]*mov\.l 20 <fn\+0x20>,r4[ ]+! 0x0 + e: d4 04 [ ]*mov\.l 20 <fn\+0x20>,r4[ ]+! 0x0 .* 10: c7 04 [ ]*mova 24 <fn\+0x24>,r0 - 12: d1 04 [ ]*mov\.l 24 <fn\+0x24>,r1[ ]+! 0x0 + 12: d1 04 [ ]*mov\.l 24 <fn\+0x24>,r1[ ]+! 0x0 .* 14: 31 0c [ ]*add r0,r1 16: 41 0b [ ]*jsr @r1 18: 34 cc [ ]*add r12,r4 @@ -26,9 +26,9 @@ Disassembly of section .text: \.\.\. [ ]+20: R_SH_TLS_GD_32 foo [ ]+24: R_SH_PLT32 __tls_get_addr - 28: d4 03 [ ]*mov\.l 38 <fn\+0x38>,r4[ ]+! 0x0 + 28: d4 03 [ ]*mov\.l 38 <fn\+0x38>,r4[ ]+! 0x0 .* 2a: c7 04 [ ]*mova 3c <fn\+0x3c>,r0 - 2c: d1 03 [ ]*mov\.l 3c <fn\+0x3c>,r1[ ]+! 0x0 + 2c: d1 03 [ ]*mov\.l 3c <fn\+0x3c>,r1[ ]+! 0x0 .* 2e: 31 0c [ ]*add r0,r1 30: 41 0b [ ]*jsr @r1 32: 34 cc [ ]*add r12,r4 @@ -38,10 +38,10 @@ Disassembly of section .text: [ ]+38: R_SH_TLS_LD_32 bar [ ]+3c: R_SH_PLT32 __tls_get_addr 40: e2 01 [ ]*mov #1,r2 - 42: d1 06 [ ]*mov\.l 5c <fn\+0x5c>,r1[ ]+! 0x0 + 42: d1 06 [ ]*mov\.l 5c <fn\+0x5c>,r1[ ]+! 0x0 .* 44: 30 1c [ ]*add r1,r0 46: 20 22 [ ]*mov\.l r2,@r0 - 48: d1 05 [ ]*mov\.l 60 <fn\+0x60>,r1[ ]+! 0x0 + 48: d1 05 [ ]*mov\.l 60 <fn\+0x60>,r1[ ]+! 0x0 .* 4a: 30 1c [ ]*add r1,r0 4c: 6f e3 [ ]*mov r14,r15 4e: 4f 26 [ ]*lds\.l @r15\+,pr diff --git a/gas/testsuite/gas/sh/tlsnopic.d b/gas/testsuite/gas/sh/tlsnopic.d index c987939c41c..69131276cce 100644 --- a/gas/testsuite/gas/sh/tlsnopic.d +++ b/gas/testsuite/gas/sh/tlsnopic.d @@ -10,7 +10,7 @@ Disassembly of section .text: 0: 2f e6 [ ]*mov\.l r14,@-r15 2: 6e f3 [ ]*mov r15,r14 4: 01 12 [ ]*stc gbr,r1 - 6: d0 02 [ ]*mov\.l 10 <fn\+0x10>,r0[ ]+! 0x0 + 6: d0 02 [ ]*mov\.l 10 <fn\+0x10>,r0[ ]+! 0x0 .* 8: 30 1c [ ]*add r1,r0 a: 6f e3 [ ]*mov r14,r15 c: 00 0b [ ]*rts diff --git a/gas/testsuite/gas/sh/tlspic.d b/gas/testsuite/gas/sh/tlspic.d index b15e0631854..207ab1a2f4b 100644 --- a/gas/testsuite/gas/sh/tlspic.d +++ b/gas/testsuite/gas/sh/tlspic.d @@ -11,9 +11,9 @@ Disassembly of section .text: 2: 2f e6 [ ]*mov\.l r14,@-r15 4: 6e f3 [ ]*mov r15,r14 6: c7 08 [ ]*mova 28 <fn\+0x28>,r0 - 8: dc 07 [ ]*mov\.l 28 <fn\+0x28>,r12[ ]+! 0x0 + 8: dc 07 [ ]*mov\.l 28 <fn\+0x28>,r12[ ]+! 0x0 .* a: 3c 0c [ ]*add r0,r12 - c: d0 02 [ ]*mov\.l 18 <fn\+0x18>,r0[ ]+! 0x0 + c: d0 02 [ ]*mov\.l 18 <fn\+0x18>,r0[ ]+! 0x0 .* e: 01 12 [ ]*stc gbr,r1 10: 00 ce [ ]*mov\.l @\(r0,r12\),r0 12: a0 03 [ ]*bra 1c <fn\+0x1c> diff --git a/gas/testsuite/gas/symver/symver0.d b/gas/testsuite/gas/symver/symver0.d index d318a30c319..9ad6c88e836 100644 --- a/gas/testsuite/gas/symver/symver0.d +++ b/gas/testsuite/gas/symver/symver0.d @@ -1,6 +1,10 @@ #nm: -n #name: symver symver0 +# +# The #... and #pass are there to match extra symbols inserted by +# some toolchains, eg arm-elf toolchain will add $d. [ ]+U foo@version1 +#... 0+0000000 D foo1 0+00000.. d L_foo1 diff --git a/gas/testsuite/gas/symver/symver1.d b/gas/testsuite/gas/symver/symver1.d index e1d80ea3e08..ab9b9495b18 100644 --- a/gas/testsuite/gas/symver/symver1.d +++ b/gas/testsuite/gas/symver/symver1.d @@ -1,7 +1,11 @@ #nm: -n #name: symver symver1 +# +# The #... and #pass are there to match extra symbols inserted by +# some toolchains, eg arm-elf toolchain will add $d. [ ]+U foo@version1 +#... 0+0000000 D foo1@@version1 0+00000.. d L_foo1 0+00000.. D foo2 diff --git a/gas/testsuite/lib/gas-defs.exp b/gas/testsuite/lib/gas-defs.exp index fec27789488..f0c6b8c91a1 100644 --- a/gas/testsuite/lib/gas-defs.exp +++ b/gas/testsuite/lib/gas-defs.exp @@ -197,6 +197,7 @@ proc is_elf_format {} { && ![istarget *-*-irix5*] \ && ![istarget *-*-irix6*] \ && ![istarget *-*-netbsd*] \ + && ![istarget *-*-openbsd*] \ && ![istarget *-*-solaris2*] } { return 0 } @@ -217,6 +218,18 @@ proc is_elf_format {} { || [istarget ns32k-*-netbsd*]) } { return 0 } + + if { [istarget arm-*-openbsd*] \ + || [istarget i386-*-openbsd\[0-2\].*] \ + || [istarget i386-*-openbsd3.\[0-3\]] \ + || [istarget m68*-*-openbsd*] \ + || [istarget ns32k-*-openbsd*] \ + || [istarget sparc-*-openbsd\[0-2\].*] \ + || [istarget sparc-*-openbsd3.\[0-1\]] \ + || [istarget vax-*-openbsd*] } { + return 0 + } + return 1 } |