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Diffstat (limited to 'ld/ChangeLog')
| -rw-r--r-- | ld/ChangeLog | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/ld/ChangeLog b/ld/ChangeLog index 205f6acb87c..3a9d3810984 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,60 @@ +2020-10-16 Nelson Chu <nelson.chu@sifive.com> + + * emulparams/elf32lriscv-defs.sh: Add IREL_IN_PLT. + * testsuite/ld-ifunc/ifunc.exp: Enable ifunc tests for RISC-V. + * testsuite/ld-riscv-elf/ld-riscv-elf.exp (run_dump_test_ifunc): + New dump test for ifunc. There are two arguments, 'target` and + `output`. The `target` is rv32 or rv64, and the `output` is used + to choose which output you want to test (exe, pie or .so). + * testsuite/ld-riscv-elf/ifunc-reloc-call-01.s: New testcase. + * testsuite/ld-riscv-elf/ifunc-reloc-call-01.d: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-call-01-exe.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-call-01-pic.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-call-01-pie.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-call-02.s: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-call-02.d: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-call-02-exe.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-call-02-pic.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-call-02-pie.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-data.s: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-data.d: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-data-exe.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-data-pic.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-data-pie.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-got.s: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-got.d: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-got-exe.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-got-pic.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-got-pie.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-pcrel.s: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-pcrel.d: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-pcrel-exe.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pic.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pie.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-nonplt.s: Likewise. + * testsuite/ld-riscv-elf/ifunc-nonplt.d: Likewise. + * testsuite/ld-riscv-elf/ifunc-nonplt-exe.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-nonplt-pic.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-nonplt-pie.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-plt-01.s: Likewise. + * testsuite/ld-riscv-elf/ifunc-plt-01.d: Likewise. + * testsuite/ld-riscv-elf/ifunc-plt-01-exe.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-plt-01-pic.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-plt-01-pie.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-plt-02.s: Likewise. + * testsuite/ld-riscv-elf/ifunc-plt-02.d: Likewise. + * testsuite/ld-riscv-elf/ifunc-plt-02-exe.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-plt-02-pic.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-plt-02-pie.rd: Likewise. + * testsuite/ld-riscv-elf/ifunc-seperate-resolver.s: Likewise. + * testsuite/ld-riscv-elf/ifunc-seperate-caller.s: Likewise. + * testsuite/ld-riscv-elf/ifunc-seperate-exe.d: Likewise. + * testsuite/ld-riscv-elf/ifunc-seperate-pic.d: Likewise. + * testsuite/ld-riscv-elf/ifunc-seperate-pie.d: Likewise. + * testsuite/ld-riscv-elf/ifunc-seperate-caller-pcrel.s: Likewise. + * testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pic.d: Likewise. + * testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pie.d: Likewise. + 2020-10-09 H.J. Lu <hongjiu.lu@intel.com> PR gas/26703 |