diff options
Diffstat (limited to 'opcodes/s390-opc.c')
| -rw-r--r-- | opcodes/s390-opc.c | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c index 7cd8231d95a..a2837833d74 100644 --- a/opcodes/s390-opc.c +++ b/opcodes/s390-opc.c @@ -293,23 +293,23 @@ const struct s390_operand s390_operands[] = const struct s390_opcode s390_opformats[] = { - { "e", OP8(0x00LL), MASK_E, INSTR_E, 3 }, - { "ri", OP8(0x00LL), MASK_RI_RI, INSTR_RI_RI, 3 }, - { "rie", OP8(0x00LL), MASK_RIE_RRP, INSTR_RIE_RRP, 3 }, - { "ril", OP8(0x00LL), MASK_RIL_RP, INSTR_RIL_RP, 3 }, - { "rr", OP8(0x00LL), MASK_RR_RR, INSTR_RR_RR, 3 }, - { "rre", OP8(0x00LL), MASK_RRE_RR, INSTR_RRE_RR, 3 }, - { "rrf", OP8(0x00LL), MASK_RRF_RURR, INSTR_RRF_RURR, 3 }, - { "rs", OP8(0x00LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3 }, - { "rse", OP8(0x00LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 3 }, - { "rsi", OP8(0x00LL), MASK_RSI_RRP, INSTR_RSI_RRP, 3 }, - { "rx", OP8(0x00LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3 }, - { "rxe", OP8(0x00LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3 }, - { "rxf", OP8(0x00LL), MASK_RXF_RRRDR, INSTR_RXF_RRRDR,3 }, - { "s", OP8(0x00LL), MASK_S_RD, INSTR_S_RD, 3 }, - { "si", OP8(0x00LL), MASK_SI_URD, INSTR_SI_URD, 3 }, - { "ss", OP8(0x00LL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD,3 }, - { "sse", OP8(0x00LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3 }, + { "e", OP8(0x00LL), MASK_E, INSTR_E, 3, 0 }, + { "ri", OP8(0x00LL), MASK_RI_RI, INSTR_RI_RI, 3, 0 }, + { "rie", OP8(0x00LL), MASK_RIE_RRP, INSTR_RIE_RRP, 3, 0 }, + { "ril", OP8(0x00LL), MASK_RIL_RP, INSTR_RIL_RP, 3, 0 }, + { "rr", OP8(0x00LL), MASK_RR_RR, INSTR_RR_RR, 3, 0 }, + { "rre", OP8(0x00LL), MASK_RRE_RR, INSTR_RRE_RR, 3, 0 }, + { "rrf", OP8(0x00LL), MASK_RRF_RURR, INSTR_RRF_RURR, 3, 0 }, + { "rs", OP8(0x00LL), MASK_RS_RRRD, INSTR_RS_RRRD, 3, 0 }, + { "rse", OP8(0x00LL), MASK_RSE_RRRD, INSTR_RSE_RRRD, 3, 0 }, + { "rsi", OP8(0x00LL), MASK_RSI_RRP, INSTR_RSI_RRP, 3, 0 }, + { "rx", OP8(0x00LL), MASK_RX_RRRD, INSTR_RX_RRRD, 3, 0 }, + { "rxe", OP8(0x00LL), MASK_RXE_RRRD, INSTR_RXE_RRRD, 3, 0 }, + { "rxf", OP8(0x00LL), MASK_RXF_RRRDR, INSTR_RXF_RRRDR,3, 0 }, + { "s", OP8(0x00LL), MASK_S_RD, INSTR_S_RD, 3, 0 }, + { "si", OP8(0x00LL), MASK_SI_URD, INSTR_SI_URD, 3, 0 }, + { "ss", OP8(0x00LL), MASK_SS_RRRDRD, INSTR_SS_RRRDRD,3, 0 }, + { "sse", OP8(0x00LL), MASK_SSE_RDRD, INSTR_SSE_RDRD, 3, 0 }, }; const int s390_num_opformats = |