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-rw-r--r--sim/testsuite/sim/h8300/shar.s24
1 files changed, 12 insertions, 12 deletions
diff --git a/sim/testsuite/sim/h8300/shar.s b/sim/testsuite/sim/h8300/shar.s
index b0ea6738623..9c9166be31b 100644
--- a/sim/testsuite/sim/h8300/shar.s
+++ b/sim/testsuite/sim/h8300/shar.s
@@ -847,8 +847,8 @@ shar_w_disp2_1:
set_grs_a5a5 ; Fill all general regs with a fixed pattern
set_ccr_zero
- mov #word_dest-2, er0
- shar.w @(2:2, er0) ; shift right arithmetic by one, disp2
+ mov #word_dest-4, er0
+ shar.w @(4:2, er0) ; shift right arithmetic by one, disp2
;;; .word 0x0156
;;; .word 0x6908
;;; .word 0x1190
@@ -858,7 +858,7 @@ shar_w_disp2_1:
test_ovf_clear
test_neg_set
- test_h_gr32 word_dest-2 er0
+ test_h_gr32 word_dest-4 er0
test_gr_a5a5 1 ; Make sure other general regs not disturbed
test_gr_a5a5 2
test_gr_a5a5 3
@@ -1170,8 +1170,8 @@ shar_w_disp2_2:
set_grs_a5a5 ; Fill all general regs with a fixed pattern
set_ccr_zero
- mov #word_dest-2, er0
- shar.w #2, @(2:2, er0) ; shift right arithmetic by two, disp2
+ mov #word_dest-4, er0
+ shar.w #2, @(4:2, er0) ; shift right arithmetic by two, disp2
;;; .word 0x0156
;;; .word 0x6908
;;; .word 0x11d0
@@ -1181,7 +1181,7 @@ shar_w_disp2_2:
test_ovf_clear
test_neg_set
- test_h_gr32 word_dest-2 er0
+ test_h_gr32 word_dest-4 er0
test_gr_a5a5 1 ; Make sure other general regs not disturbed
test_gr_a5a5 2
test_gr_a5a5 3
@@ -1501,8 +1501,8 @@ shar_l_disp2_1:
set_grs_a5a5 ; Fill all general regs with a fixed pattern
set_ccr_zero
- mov #long_dest-2, er0
- shar.l @(2:2, er0) ; shift right arithmetic by one, disp2
+ mov #long_dest-8, er0
+ shar.l @(8:2, er0) ; shift right arithmetic by one, disp2
;;; .word 0x0106
;;; .word 0x6908
;;; .word 0x11b0
@@ -1512,7 +1512,7 @@ shar_l_disp2_1:
test_ovf_clear
test_neg_set
- test_h_gr32 long_dest-2 er0
+ test_h_gr32 long_dest-8 er0
test_gr_a5a5 1 ; Make sure other general regs not disturbed
test_gr_a5a5 2
test_gr_a5a5 3
@@ -1839,8 +1839,8 @@ shar_l_disp2_2:
set_grs_a5a5 ; Fill all general regs with a fixed pattern
set_ccr_zero
- mov #long_dest-2, er0
- shar.l #2, @(2:2, er0) ; shift right arithmetic by two, disp2
+ mov #long_dest-8, er0
+ shar.l #2, @(8:2, er0) ; shift right arithmetic by two, disp2
;;; .word 0x0106
;;; .word 0x6908
;;; .word 0x11f0
@@ -1850,7 +1850,7 @@ shar_l_disp2_2:
test_ovf_clear
test_neg_set
- test_h_gr32 long_dest-2 er0
+ test_h_gr32 long_dest-8 er0
test_gr_a5a5 1 ; Make sure other general regs not disturbed
test_gr_a5a5 2
test_gr_a5a5 3