| Commit message (Collapse) | Author | Age | Files | Lines |
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The unit tests added by the previous patch revealed that this useful
use case doesn't work:
enum flag { FLAG1 = 1, FLAG2 = 2 };
enum_flags<flag> src = FLAG1;
enum_flags<flag> f1 = condition ? src : FLAG2;
It fails to compile because enum_flags<flag> and flag are convertible
to each other.
Turns out that making enum_flags be implicitly convertible to the
backing raw enum type was not a good idea.
If we make it convertible to the underlying type instead, we fix that
ternary operator use case, and, we find cases throughout the codebase
that should be using the enum_flags but were using the raw backing
enum instead. So it's a good change overall.
There's one case in compile/compile-c-types.c where we need to call a
function in a C API that expects the raw enum. To address cases like
that, this adds a "raw()" method to enum_flags. This way we can keep
using the safer enum_flags to construct the value, and then be
explicit when we need to get at the raw enum.
Tested with gcc 4.8, 4.9, 5.3, 7 (trunk) and clang 3.7.
gdb/ChangeLog:
yyyy-mm-dd Pedro Alves <palves@redhat.com>
* common/enum-flags.h (enum_flags::operator&=): Change parameter
type to enum_flags from enum_type and adjust.
(enum_flags::operator|=): Likewise.
(enum_flags::operator^=): Likewise.
(enum_flags::operator enum_type): Delete.
(enum_flags::raw): New method.
(ENUM_FLAGS_GEN_BINOP): Adjust operator functions.
* compile/compile-c-types.c (convert_qualified): Use
enum_flags::raw.
* enum-flags-selftests.c Adjust ternary operator CHECK_VALID
tests.
(selftests::enum_flags_tests::self_test): Add more ternary
operator tests.
* record-btrace.c (btrace_thread_flag_to_str): Change parameter's
type to btrace_thread_flags from btrace_thread_flag.
(record_btrace_cancel_resume, record_btrace_step_thread): Change
local's type to btrace_thread_flags from btrace_thread_flag. Add
cast in DEBUG call.
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This patch starts by adding comprehensive unit tests for enum_flags.
It adds:
- tests of normal expected uses of the API.
- checks that _invalid_ uses of the API would fail to compile. I.e.,
it validates that enum_flags really is a strong type, and that
incorrect mixing of enum types would be caught at compile time. It
pulls that off making use of SFINEA and C++11's decltype/constexpr.
This revealed many holes in the enum_flags API. For example, the f1
assignment below currently incorrectly fails to compile:
enum_flags<flags> f1 = FLAG1;
enum_flags<flags> f2 = FLAG2 | f1;
This hole and more are all plugged by this patch, by reworking how the
enum_flags operators are implemented, and making use of C++11's
feature of being able to delete methods/functions.
This makes most of the enum_flags operators constexpr. Beyond
enabling more compiler optimizations and enabling the new unit tests,
this has other advantages, like making it possible to use operator|
with enum_flags values in switch cases, where only compile-time
constants are allowed:
enum_flags<flags> f = FLAG1 | FLAG2;
switch (f)
{
case FLAG1 | FLAG2:
break;
}
Currently that fails to compile.
This adds a STATIC_SELF_TEST macro to selftest.h, which is a variant
of SELF_TEST, but uses C++11's static_assert to do checking at compile
time.
To avoid potential ODR violations, since the tests add enums with
short names that could easily conflict with other names, the new
selftests are placed in a namespace (selftests::enum_flags_tests). I
think that's a good practice that we should start following. This
required splitting the global operator overload enablement out of the
DEF_ENUM_FLAGS_TYPE macro into a separate macro, because
DEF_ENUM_FLAGS_TYPE wants to create the enum flags typedef in the
global namespace too.
Tested with gcc 4.8, 4.9, 5.3, 7 (trunk) and clang 3.7.
gdb/ChangeLog:
yyyy-mm-dd Pedro Alves <palves@redhat.com>
* Makefile.in (COMMON_OBS): Add enum-flags-selftests.o.
* common/enum-flags.h (ENABLE_ENUM_FLAGS_OPERATORS): New, factored
out from DEF_ENUM_FLAGS_TYPE.
(enum_flags::underlying_value): Delete.
(enum_flags::enum_flags): Use default.
(enum_flags::operator=): Delete.
(enum_flags::enum_flags(enum_type e)): Now constexpr.
(enum_flags::enum_flags(enum_flags::zero_type *zero)): Likewise.
(enum_flags::operator&=(enum_type e)): No longer implement in
terms of the underlying type here.
(enum_flags::operator|=(enum_type e)): Likewise.
(enum_flags::operator^=(enum_type e)): Likewise.
(enum_flags::enum_type ()): Now constexpr.
(enum_flags::enum_flags operator&(enum_type e)): Delete.
(enum_flags::operator|(enum_type e)): Delete.
(enum_flags::operator^(enum_type e)): Delete.
(enum_flags::operator~()): Now constexpr.
(operator&, operator|, operator^): Delete.
(ENUM_FLAGS_GEN_BINOP, ENUM_FLAGS_GEN_COMPOUND_ASSIGN): New,
reimplementing global operators.
(operator~): Now constexpr and reimplemented.
(operator<<, operator>>): New deleted functions.
* enum-flags-selftests.c: New file.
* go-exp.y (parse_string_or_char): Add cast to int.
* selftest.h (SC_STRINGIZE_1, SC_STRINGIZE)
(STATIC_SELF_CHECK_FAIL_MSG, STATIC_SELF_CHECK): New.
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Now that we can require C++11, we can use std::underlying_type instead
of rolling our own.
gdb/ChangeLog:
yyyy-mm-dd Pedro Alves <palves@redhat.com>
* common/enum-flags.h: Include <type_traits>.
(integer_for_size, enum_underlying_type): Delete.
(class enum_flags): Use std::underlying_type.
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2016-10-29 Manish Goregaokar <manish@mozilla.com>
gdb/ChangeLog:
* rust-exp.y: Parse `sizeof(exp)` as `UNOP_SIZEOF`
gdb/testsuite/ChangeLog:
* gdb.rust/simple.exp: Add tests for `sizeof(expr)`
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2016-10-28 Manish Goregaokar <manish@mozilla.com>
gdb/ChangeLog:
* rust-lang.c (rust_union_is_untagged): Add function to
check if a union is an untagged unioni
(rust_val_print): Handle printing of untagged union values
(rust_print_type): Handle printing of untagged union types
(rust_evaluate_subexp): Handle evaluating field
access on untagged unions
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encoded enums
2016-10-27 Manish Goregaokar <manish@mozilla.com>
gdb/ChangeLog:
* rust-lang.c (rust_get_disr_info): Treat univariant enums
without discriminants as encoded enums with a real field
* rust-lang.c (rust_evaluate_subexp): Handle field access
on encoded struct-like enums
gdb/testsuite/ChangeLog:
* simple.rs: Add test for univariant enums without discriminants
and for encoded struct-like enums
* simple.exp: Add test expectations
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The long immediate operand chosen for one of the ldbit tests is
equivalent to a small negative value that would fit inside an s9
operand, leading to the assembler to choose an unexpected (but
legitimate) encoding of the instruction on 32-bit systems, and
therefore causing the test to fail. This commit fixes the test by
changing the offending limm value so that it can no longer be
interpreted as an s9 operand.
gas/ChangeLog:
* testsuite/gas/arc/nps400-6.s: Change ldbit tests so that
limm operands are out of the range of an s9, in order to fix
the test.
* testsuite/gas/arc/nps400-6.d: Updated to match new expected
output.
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gas/ChangeLog:
* testsuite/gas/arc/nps-400-9.d: Added.
* testsuite/gas/arc/nps-400-9.s: Added.
include/ChangeLog:
* opcode/arc.h: Add PROTOCOL_DECODE to insn_class_t.
opcodes/ChangeLog:
* arc-dis.c (arc_insn_length): Return length 8 for instructions with
major opcode 0xa.
* arc-nps-400-tbl.h: Add dcmac instruction.
* arc-opc.c (arc_operands): Added operands for dcmac instruction.
(insert_nps_rbdouble_64): Added.
(extract_nps_rbdouble_64): Added.
(insert_nps_proto_size): Added.
(extract_nps_proto_size): Added.
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The current handling for arc instructions longer than 32-bits is all
handled as a special case in both the assembler and disassembler.
The problem with this approach is that it leads to code duplication,
selecting a long instruction is exactly the same process as selecting a
short instruction, except over more bits, in both cases we select based
on bit comparison, and initial operand insertion and extraction.
This commit unifies both the long and short instruction worlds,
converting the core opcodes library from being largely 32-bit focused,
to being largely 64-bit focused.
The changes are, on the whole, not too much. There's obviously a lot of
type changes but otherwise the bulk of the code just works. Most of the
actual functional changes are to code that previously handled the longer
48 or 64 bit instructions. The insert/extract handlers for these have
now been brought into line with the short instruction insert/extract
handlers.
All of the special case handling code that was previously added has now
been removed again. Overall, this commit reduces the amount of code in
the arc assembler and disassembler.
gas/ChangeLog:
* config/tc-arc.c (struct arc_insn): Change type of insn field.
(md_number_to_chars_midend): Support 6- and 8-byte values.
(emit_insn0): Update debug output.
(find_opcode_match): Likewise.
(build_fake_opcode_hash_entry): Delete.
(find_special_case_long_opcode): Delete.
(find_special_case): Remove long format special case handling.
(insert_operand): Change instruction type and update debug print
format.
(assemble_insn): Change instruction type, update debug print
formats, and remove unneeded assert.
include/ChangeLog:
* opcode/arc.h (struct arc_opcode): Change type of opcode and mask
fields.
(struct arc_long_opcode): Delete.
(struct arc_operand): Change types for insert and extract
handlers.
opcodes/ChangeLog:
* arc-dis.c (struct arc_operand_iterator): Remove all fields
relating to long instruction processing, add new limm field.
(OPCODE): Rename to...
(OPCODE_32BIT_INSN): ...this.
(OPCODE_AC): Delete.
(skip_this_opcode): Handle different instruction lengths, update
macro name.
(special_flag_p): Update parameter type.
(find_format_from_table): Update for more instruction lengths.
(find_format_long_instructions): Delete.
(find_format): Update for more instruction lengths.
(arc_insn_length): Likewise.
(extract_operand_value): Update for more instruction lengths.
(operand_iterator_next): Remove code relating to long
instructions.
(arc_opcode_to_insn_type): New function.
(print_insn_arc):Update for more instructions lengths.
* arc-ext.c (extInstruction_t): Change argument type.
* arc-ext.h (extInstruction_t): Change argument type.
* arc-fxi.h: Change type unsigned to unsigned long long
extensively throughout.
* arc-nps400-tbl.h: Add long instructions taken from
arc_long_opcodes table in arc-opc.c.
* arc-opc.c: Update parameter types on insert/extract handlers.
(arc_long_opcodes): Delete.
(arc_num_long_opcodes): Delete.
(arc_opcode_len): Update for more instruction lengths.
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highbyte and lowbyte actually refer to the low byte and the high
byte respectively, but are used consistently in this swapped
order. This commit swaps them round so that highbyte refers to the
high byte and lowbyte refers to the low byte.
There should be no functional change after this commit.
opcodes/ChangeLog:
* arc-dis.c (print_insn_arc): Swap highbyte and lowbyte.
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In preparation to moving to a world where arc instructions can be 2, 4,
6, or 8 bytes long, make some macros 64-bit safe.
There should be no functional change after this commit.
include/ChangeLog:
* opcode/arc.h: Make macros 64-bit safe.
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In preparation for moving to a world where arc instructions can be 2, 4,
6, or 8 bytes in length, replace the ARC_SHORT macro (which is either
true of false) with an arc_opcode_len function that returns a length in
bytes.
There should be no functional change after this commit.
gas/ChangeLog:
* config/tc-arc.c (assemble_insn): Replace use of ARC_SHORT with
arc_opcode_len.
include/ChangeLog:
* opcode/arc.h (arc_opcode_len): Declare.
(ARC_SHORT): Delete.
opcodes/ChangeLog:
* arc-dis.c (find_format_from_table): Replace use of ARC_SHORT
with arc_opcode_len.
(find_format_long_instructions): Likewise.
* arc-opc.c (arc_opcode_len): New function.
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When assembling an instruction replace the short_insn boolean flag with
an integer field for holding the instruction length. This is in
preparation for moving to a world where instructions can be 2, 4, 6, or
8 bytes in length.
gas/ChangeLog:
* config/tc-arc.c (struct arc_insn): Replace short_insn flag with
len field.
(apply_fixups): Update to use len field.
(emit_insn0): Simplify code, making use of len field.
(md_convert_frag): Update to use len field.
(assemble_insn): Update to use len field.
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A few masks were incorrect, there were opcode bits that lives outside of
the instruction mask, the effected instructions are decode1, zncv, and
efabgt.
Previously these instructions would assemble and disassemble correctly,
and a correctly encoded binary should behave no differently. The only
difference would be seen in a few incorrectly encoded binaries,
previously these would have decoded to the above instructions, while now
they will not.
opcodes/ChangeLog:
* arc-nps400-tbl.h: Fix some instruction masks.
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This adds an option for the Qualcomm falkor core, the corresponding
gcc patch is here:
https://gcc.gnu.org/ml/gcc-patches/2016-11/msg00262.html
This was tested with aarch64 and armhf builds and make check and also
by building and running SPEC2006.
* config/tc-aarch64.c (aarch64_cpus): Add falkor.
* config/tc-arm.c (arm_cpus): Likewise.
* doc/c-aarch64.texi: Likewise.
* doc/c-arm.texi: Likewise.
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Since opcode 0x82 is an alias of opcode 0x80, we can reuse opcode 0x80
decoder.
* i386-dis.c (REG_82): Removed.
(X86_64_82_REG_0): Likewise.
(X86_64_82_REG_1): Likewise.
(X86_64_82_REG_2): Likewise.
(X86_64_82_REG_3): Likewise.
(X86_64_82_REG_4): Likewise.
(X86_64_82_REG_5): Likewise.
(X86_64_82_REG_6): Likewise.
(X86_64_82_REG_7): Likewise.
(X86_64_82): New.
(dis386): Use X86_64_82 instead of REG_82.
(reg_table): Remove REG_82.
(x86_64_table): Add X86_64_82. Remove X86_64_82_REG_0,
X86_64_82_REG_1, X86_64_82_REG_2, X86_64_82_REG_3,
X86_64_82_REG_4, X86_64_82_REG_5, X86_64_82_REG_6 and
X86_64_82_REG_7.
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Update x86 disassembler to treat opcode 0x82 as an aliase of opcode 0x80
in 32-bit mode.
gas/
PR binutils/20754
* testsuite/gas/i386/opcode.s: Add tests for opcode 0x82.
* testsuite/gas/i386/opcode-intel.d: Updated.
* testsuite/gas/i386/opcode.d: Likewise.
opcodes/
PR binutils/20754
* i386-dis.c (REG_82): New.
(X86_64_82_REG_0): Likewise.
(X86_64_82_REG_1): Likewise.
(X86_64_82_REG_2): Likewise.
(X86_64_82_REG_3): Likewise.
(X86_64_82_REG_4): Likewise.
(X86_64_82_REG_5): Likewise.
(X86_64_82_REG_6): Likewise.
(X86_64_82_REG_7): Likewise.
(dis386): Use REG_82.
(reg_table): Add REG_82.
(x86_64_table): Add X86_64_82_REG_0, X86_64_82_REG_1,
X86_64_82_REG_2, X86_64_82_REG_3, X86_64_82_REG_4,
X86_64_82_REG_5, X86_64_82_REG_6 and X86_64_82_REG_7.
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As we require c++11, GDB fails to build if bison is not new enough.
I see the following error on the system (fedora 19) that bison is
2.6.4,
g++ -std=gnu++11 .... \
-c -o ada-exp.o -MT ada-exp.o -MMD -MP -MF .deps/ada-exp.Tpo 'if test -f ada-exp.c; then echo ada-exp.c; else echo ../../binutils-gdb/gdb/ada-exp.c; fi`
In file included from ../../binutils-gdb/gdb/ada-exp.y:731:0:
ada-lex.c:113:0: error: "YY_NULL" redefined [-Werror]
#define YY_NULL 0
^
ada-exp.c:158:0: note: this is the location of the previous definition
# define YY_NULL nullptr
^
cc1plus: all warnings being treated as errors
make: *** [ada-exp.o] Error 1
Both ada-exp.c and ada-lex.c has macro YY_NULL, like this,
$ cat 1.c
# ifndef YY_NULL
# if defined __cplusplus && 201103L <= __cplusplus
# define YY_NULL nullptr
# else
# define YY_NULL 0
# endif
# endif
#define YY_NULL 0
as we can see, YY_NULL is defined differently (nullptr vs 0)
$ g++ -std=c++11 -Wall 1.c -c
1.c:9:0: warning: "YY_NULL" redefined
#define YY_NULL 0
^
1.c:3:0: note: this is the location of the previous definition
# define YY_NULL nullptr
^
$ g++ -Wall 1.c -c
bison renames YY_NULL to YY_NULLPTR in 2013 Nov,
https://lists.gnu.org/archive/html/bison-patches/2013-11/msg00002.html
and bison released later than 2013 Nov have this patch. Bison 3.0.2,
released on 2013 Dec, is OK.
The fix is to replace YY_NULL with YY_NULLPTR via sed. With old bison,
YY_NULL becomes YY_NULLPTR; with new bison, YY_NULLPTR becomes
YY_NULLPTRPTR,
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* Makefile.in (.y.c): Replace YY_NULL with YY_NULLPTR.
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bfd/
* config.bfd: Deprecate many old triplets.
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The REG_82 entry in x86 disassembler is for opcode 0x83, not opcode
0x82.
* i386-dis.c (REG_82): Renamed to ...
(REG_83): This.
(dis386): Updated.
(reg_table): Likewise.
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Both of them are used in conversion. We can remove them since the
conversion is done.
There are many architectures only have one breakpoint instruction,
so their gdbarch methods breakpoint_kind_from_pc and
sw_breakpoint_from_kind look very similar. Instead of macro, we
use template "template <size_t, const gdb_byte *> struct bp_manipulation"
for these architectures. In order to use template, I also change
breakpoint instruction of type "static const gdb_byte[]" to
"constexpr gdb_byte[]", and rename them to ARCH_break_insn.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
Pedro Alves <palves@redhat.com>
* aarch64-tdep.c (aarch64_default_breakpoint): Change it to
constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(aarch64_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* alpha-tdep.c (break_insn): Rename to alpha_break_insn.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(alpha_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* arc-tdep.c (arc_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* arch-utils.h (GDBARCH_BREAKPOINT_MANIPULATION): Remove.
(struct bp_manipulation): New.
(SET_GDBARCH_BREAKPOINT_MANIPULATION): Remove.
(struct bp_manipulation_endian): New.
(BP_MANIPULATION): New.
(BP_MANIPULATION_ENDIAN): New.
* arm-tdep.c (arm_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* avr-tdep.c (avr_break_insn): Change it constexpr.
(avr_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* bfin-tdep.c (bfin_gdbarch_init): Likewise.
* cris-tdep.c (cris_gdbarch_init): Likewise.
* frv-tdep.c (breakpoint): Rename it to frv_break_insn, and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(frv_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* ft32-tdep.c (breakpoint): Rename it to ft32_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(ft32_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* h8300-tdep.c (breakpoint): Rename it to h8300_break_insn.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(h8300_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* hppa-tdep.c (breakpoint): Rename it to h8300_break_insn.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(hppa_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* i386-tdep.c (break_insn): Rename it to i386_break_insn.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(i386_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* iq2000-tdep.c (iq2000_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* lm32-tdep.c (breakpoint): Rename it to lm32_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(lm32_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* m32c-tdep.c (break_insn): Rename it to m32c_break_insn and change
its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(m32c_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* m32r-tdep.c (m32r_gdbarch_init): Likewise.
* m68hc11-tdep.c (breakpoint): Rename it to m68hc11_break_insn and
change its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(m68hc11_gdbarch_init): Don't use SET_GDBARCH_BREAKPOINT_MANIPULATION.
* m68k-tdep.c (break_insn): Rename it to m68k_break_insn and change
its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(m68k_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* m88k-tdep.c (break_insn): Rename it to m88k_break_insn and change
its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(m88k_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* mep-tdep.c (breakpoint): Rename it to mep_break_insn and change
its type to constexpr. Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(mep_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* microblaze-tdep.c (break_insn): Rename it to
microblaze_break_insn and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(microblaze_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* mips-tdep.c (mips_gdbarch_init): Likewise.
* mn10300-tdep.c (breakpoint): Rename it to mn10300_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(mn10300_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* moxie-tdep.c (breakpoint): Rename it to moxie_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(moxie_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* msp430-tdep.c (breakpoint): Rename it to msp430_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(msp430_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* mt-tdep.c (mt_gdbarch_init): Likewise.
* nds32-tdep.c (break_insn): Rename it to nds32_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(nds32_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* nios2-tdep.c (nios2_gdbarch_init): Likewise.
* rl78-tdep.c (breakpoint): Rename it to rl78_break_ins
and change its type to rl78_break_insn. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(rl78_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* rs6000-tdep.c (big_breakpoint): Change its type to
constexpr.
(little_breakpoint): Likewise.
Don't use GDBARCH_BREAKPOINT_MANIPULATION_ENDIAN.
(rs6000_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* rx-tdep.c (breakpoint): Rename it to rx_break_insn and
change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(rx_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* s390-linux-tdep.c (breakpoint): Rename it to s390_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION
(s390_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* score-tdep.c (score_gdbarch_init): Likewise.
* sh-tdep.c (sh_gdbarch_init): Likewise.
* sh64-tdep.c (sh64_gdbarch_init): Likewise.
* sparc-tdep.c (break_insn): Rename it to sparc_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(sparc32_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* spu-tdep.c (breakpoint): Rename it to spu_break_insn and change
its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(spu_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* tic6x-tdep.c (tic6x_gdbarch_init): Likewise.
* tilegx-tdep.c (breakpoint): Rename it to tilegx_break_insn
and change its type to constexpr. Don't use
GDBARCH_BREAKPOINT_MANIPULATION.
(tilegx_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* v850-tdep.c (v850_gdbarch_init): Likewise.
* vax-tdep.c (break_insn): Rename it to vax_break_insn and
change its type to constexpr.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(vax_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* xstormy16-tdep.c (breakpoint): Rename it to
xstormy16_break_insn and change its type to constexpr.
Don't use GDBARCH_BREAKPOINT_MANIPULATION.
(xstormy16_gdbarch_init): Don't use
SET_GDBARCH_BREAKPOINT_MANIPULATION.
* xtensa-tdep.c (xtensa_gdbarch_init): Likewise.
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GDB can determine the kind of single step breakpoint by gdbarch
breakpoint_kind_from_current_state, so global variable
arm_override_mode is no longer needed. This patch removes it.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* arm-tdep.c (arm_override_mode): Remove.
(arm_pc_is_thumb): Update.
(arm_insert_single_step_breakpoint): Update.
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This patch adds a new gdbarch method breakpoint_kind_from_current_state
for single step breakpoint, and uses it in breakpoint_kind.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* arch-utils.c (default_breakpoint_kind_from_current_state):
New function.
* arch-utils.h (default_breakpoint_kind_from_current_state):
Declare.
* arm-tdep.c (arm_breakpoint_kind_from_current_state): New
function.
(arm_gdbarch_init): Call
set_gdbarch_breakpoint_kind_from_current_state.
* breakpoint.c (breakpoint_kind): Call
gdbarch_breakpoint_kind_from_current_state for single step
breakpoint. Update comments.
* gdbarch.sh (breakpoint_kind_from_current_state): New.
* gdbarch.c, gdbarch.h: Regenerate.
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This patch adds the default implementation of gdbarch breakpoint_from_pc,
which is,
const gdb_byte *
default_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
int *lenptr)
{
int kind = gdbarch_breakpoint_kind_from_pc (gdbarch, pcptr);
return gdbarch_sw_breakpoint_from_kind (gdbarch, kind, lenptr);
}
so gdbarch can only defines sw_breakpoint_from_kind and
breakpoint_kind_from_pc.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* arch-utils.c (default_breakpoint_from_pc): New function.
* arch-utils.h (GDBARCH_BREAKPOINT_FROM_PC): Remove.
(GDBARCH_BREAKPOINT_MANIPULATION): Don't use
GDBARCH_BREAKPOINT_FROM_PC.
(SET_GDBARCH_BREAKPOINT_MANIPULATION): Don't call
set_gdbarch_breakpoint_from_pc.
(default_breakpoint_from_pc): Remove declaration.
* gdbarch.sh (breakpoint_from_pc): Add its default implementation.
* gdbarch.c, gdbarch.h: Regenerate.
* arm-tdep.c: Don't use GDBARCH_BREAKPOINT_FROM_PC.
* arc-tdep.c, bfin-tdep.c, cris-tdep.c, iq2000-tdep.c: Likewise.
* m32r-tdep.c, mips-tdep.c, mt-tdep.c: Likewise.
* nios2-tdep.c, score-tdep.c, sh-tdep.c: Likewise.
* sh64-tdep.c, tic6x-tdep.c, v850-tdep.c, xtensa-tdep.c: Likewise.
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This patch removes gdbarch method remote_breakpoint_from_pc, as it
is no longer used.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* arch-utils.c (default_remote_breakpoint_from_pc): Remove.
* arch-utils.h (default_remote_breakpoint_from_pc): Remove.
* arm-tdep.c (arm_remote_breakpoint_from_pc): Remove.
(arm_gdbarch_init): Don't call
set_gdbarch_remote_breakpoint_from_pc.
* gdbarch.sh (remote_breakpoint_from_pc): Remove.
* gdbarch.c, gdbarch.h: Regenerate.
* mips-tdep.c (mips_remote_breakpoint_from_pc): Remove.
(mips_gdbarch_init): Don't call
set_gdbarch_remote_breakpoint_from_pc.
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This patch renames placed_size to kind.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* breakpoint.h (struct bp_target_info) <placed_size>: Remove.
<kind>: New field.
Update all users.
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This patch adds two gdbarch methods breakpoint_kind_from_pc and
sw_breakpoint_from_kind, and uses target_info.placed_size as "kind"
of the breakpoint. This patch updates the usages of
target_info.placed_size.
The "kind" of a breakpoint is determined by gdbarch rather than
target, so we have gdbarch method breakpoint_kind_from_pc, and we
should set target_info.placed_size out of each implementation of
target to_insert_breakpoint. In this way, each target doesn't have
to set target_info.placed_size any more.
This patch also sets target_info.placed_address before
target_insert_breakpoint too, so that target to_insert_breakpoint
can use it, see record_full_insert_breakpoint.
Before we call target_insert_breakpoint, we set
target_info.placed_address and target_info.placed_size like this,
CORE_ADDR addr = bl->target_info.reqstd_address;
bl->target_info.placed_size = gdbarch_breakpoint_kind_from_pc (bl->gdbarch, &addr);
bl->target_info.placed_address = addr;
return target_insert_breakpoint (bl->gdbarch, &bl->target_info);
target_insert_breakpoint may fail, but it doesn't matter to the "kind"
and "placed_address" of a breakpoint. They should be determined by
gdbarch.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* arch-utils.h (GDBARCH_BREAKPOINT_MANIPULATION): Define
breakpoint_kind_from_pc and sw_breakpoint_from_kind.
(GDBARCH_BREAKPOINT_MANIPULATION_ENDIAN): Likewise.
(SET_GDBARCH_BREAKPOINT_MANIPULATION): Call
set_gdbarch_breakpoint_kind_from_pc and
set_gdbarch_sw_breakpoint_from_kind.
* arm-tdep.c: Add comments.
* bfin-tdep.c: Likewise.
* breakpoint.c (breakpoint_kind): New function.
(insert_bp_location): Set target_info.placed_size and
target_info.placed_address.
(bkpt_insert_location): Likewise.
* cris-tdep.c: Add comments.
* gdbarch.sh (breakpoint_kind_from_pc): New.
(sw_breakpoint_from_kind): New.
* gdbarch.c, gdbarch.h: Regenerated.
* ia64-tdep.c (ia64_memory_insert_breakpoint): Don't set
bp_tgt->placed_size.
(ia64_memory_remove_breakpoint): Don't assert
bp_tgt->placed_size.
(ia64_breakpoint_kind_from_pc): New function.
(ia64_gdbarch_init): Install ia64_breakpoint_kind_from_pc.
* m32r-tdep.c (m32r_memory_insert_breakpoint): Don't set
bp_tgt->placed_size.
* mem-break.c (default_memory_insert_breakpoint): Don't set
bp_tgt->placed_size. Call gdbarch_sw_breakpoint_from_kind.
(default_memory_remove_breakpoint): Call
gdbarch_sw_breakpoint_from_kind.
(memory_validate_breakpoint): Don't check bp_tgt->placed_size.
* mips-tdep.c: Add comments.
* mt-tdep.c: Likewise.
* nios2-tdep.c: Likewise.
* record-full.c (record_full_insert_breakpoint): Don't call
gdbarch_breakpoint_from_pc. Don't set bp_tgt->placed_address
and bp_tgt->placed_size.
* remote.c (remote_insert_breakpoint): Don't call
gdbarch_remote_breakpoint_from_pc. Use bp_tgt->placed_size.
Don't set bp_tgt->placed_address and bp_tgt->placed_size.
(remote_insert_hw_breakpoint): Likewise.
* score-tdep.c: Likewise.
* sh-tdep.c: Likewise.
* tic6x-tdep.c: Likewise.
* v850-tdep.c: Likewise.
* xtensa-tdep.c: Likewise.
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We convert each ARCH_breakpoint_from_pc to ARCH_breakpoint_kind_from_pc
and ARCH_sw_breakpoint_from_kind. Note that gdbarch doesn't have methods
breakpoint_kind_from_pc and sw_breakpoint_from_kind so far.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* arch-utils.h (GDBARCH_BREAKPOINT_FROM_PC): New macro.
(GDBARCH_BREAKPOINT_MANIPULATION_ENDIAN): New macro.
* arm-tdep.c (arm_breakpoint_from_pc): Remove.
(arm_breakpoint_kind_from_pc): New function.
(arm_sw_breakpoint_from_kind): New function.
(arm_breakpoint_from_pc): Call arm_breakpoint_kind_from_pc
and arm_sw_breakpoint_from_kind.
Use GDBARCH_BREAKPOINT_FROM_PC.
(arm_remote_breakpoint_from_pc): Call
arm_breakpoint_kind_from_pc.
(arm_gdbarch_init): Replace set_gdbarch_breakpoint_from_pc
with SET_GDBARCH_BREAKPOINT_MANIPULATION.
* arc-tdep.c: Likewise.
* bfin-tdep.c: Likewise.
* cris-tdep.c: Likewise.
* iq2000-tdep.c: Likewise.
* m32r-tdep.c: Likewise.
* mips-tdep.c: Likewise.
* mt-tdep.c: Likewise.
* nios2-tdep.c: Likewise.
* rs6000-tdep.c: Likewise.
* score-tdep.c: Likewise.
* sh-tdep.c: Likewise.
* sh64-tdep.c: Likewise.
* tic6x-tdep.c: Likewise.
* v850-tdep.c: Likewise.
* xtensa-tdep.c: Likewise.
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This patch adds an enum mips_breakpoint_kind to avoid using magic
numbers as much as possible.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* mips-tdep.c (mips_breakpoint_kind): New enum.
(mips_breakpoint_from_pc): Use it.
(mips_remote_breakpoint_from_pc): Likewise.
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Many archs have only one kind of breakpoint, so their breakpoint_from_pc
implementations are quite similar. This patch uses macro
GDBARCH_BREAKPOINT_MANIPULATION and SET_GDBARCH_BREAKPOINT_MANIPULATION
for breakpoint_from_pc, so that we can easily switch from
breakpoint_from_pc to breakpoint_kind_from_pc and sw_breakpoint_from_kind
later.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* arch-utils.h (GDBARCH_BREAKPOINT_MANIPULATION): New macro.
(SET_GDBARCH_BREAKPOINT_MANIPULATION): New macro.
aarch64-tdep.c (aarch64_breakpoint_from_pc): Remove. Use
GDBARCH_BREAKPOINT_MANIPULATION.
(aarch64_gdbarch_init): Replace set_gdbarch_breakpoint_from_pc
with SET_GDBARCH_BREAKPOINT_MANIPULATION.
* alpha-tdep.c: Likewise.
* avr-tdep.c: Likewise.
* frv-tdep.c: Likewise.
* ft32-tdep.c: Likewise.
* h8300-tdep.c: Likewise.
* hppa-tdep.c: Likewise.
* i386-tdep.c: Likewise.
* lm32-tdep.c: Likewise.
* m32c-tdep.c: Likewise.
* m68hc11-tdep.c: Likewise.
* m68k-tdep.c: Likewise.
* m88k-tdep.c: Likewise.
* mep-tdep.c: Likewise.
* microblaze-tdep.c: Likewise.
* mn10300-tdep.c: Likewise.
* moxie-tdep.c: Likewise.
* msp430-tdep.c: Likewise.
* rl78-tdep.c: Likewise.
* rx-tdep.c: Likewise.
* s390-linux-tdep.c: Likewise.
* sparc-tdep.c: Likewise.
* spu-tdep.c: Likewise.
* tilegx-tdep.c: Likewise.
* vax-tdep.c: Likewise.
* xstormy16-tdep.c: Likewise.
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gdbarch_breakpoint_from_pc doesn't return NULL except for
ia64_breakpoint_from_pc, and we checked its return value in three
places. In microblaze_linux_memory_remove_breakpoint and
ppc_linux_memory_remove_breakpoint, gdbarch_breakpoint_from_pc never
returns NULL, so we can remove the NULL checking. In
default_memory_insert_breakpoint, gdbarch_breakpoint_from_pc can't
returns NULL too because ia64 defines its own memory_insert_breakpoint.
gdb:
2016-11-03 Yao Qi <yao.qi@linaro.org>
* mem-break.c (default_memory_insert_breakpoint): Don't check
'bp' against NULL.
* microblaze-linux-tdep.c (microblaze_linux_memory_remove_breakpoint):
Likewise.
* ppc-linux-tdep.c (ppc_linux_memory_remove_breakpoint): Likewise.
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gas/
* config/tc-arm.c (SBIT_SHIFT): New.
(T2_SBIT_SHIFT): Likewise.
(t32_insn_ok): Return TRUE for MOV in ARMv8-M Baseline.
(md_apply_fix): Try UINT16 encoding when ARM/Thumb modified immediate
encoding failed.
* testsuite/gas/arm/archv6t2-bad.s: New error case.
* testsuite/gas/arm/archv6t2-bad.l: New error match.
* testsuite/gas/arm/archv6t2.s: New testcase.
* testsuite/gas/arm/archv6t2.d: New expected result.
* testsuite/gas/arm/archv8m.s: New testcase.
* testsuite/gas/arm/archv8m-base.d: New expected result.
* testsuite/gas/arm/archv8m-main.d: Likewise.
* testsuite/gas/arm/archv8m-main-dsp-1.d: Likewise.
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This fixes some regressions found in the patch to convert
dwarf_expr_context to use methods. Specifically:
* get_base_type could erroneously throw; this was rewritten to move
the size checks into the only spot needing them.
* Previously the "symbol needs frame" implementation reused th
"cfa" function for the get_frame_pc slot; this reimplements
it under the correct name.
* Not enough members were saved and restored in one implementation
of push_dwarf_reg_entry_value; this patch fixes this oversight
and also takes the opportunity to remove an extraneous structure
definition.
2016-11-02 Tom Tromey <tom@tromey.com>
* dwarf2loc.c (dwarf_evaluate_loc_desc::get_base_type): Rename
from impl_get_base_type. Rewrite.
(struct dwarf_expr_baton): Remove.
(dwarf_evaluate_loc_desc::push_dwarf_reg_entry_value): Save and
restore more fields.
(symbol_needs_eval_context::get_frame_pc): New method.
* dwarf2expr.h (dwarf_expr_context::get_base_type): Now public,
virtual.
(dwarf_expr_context::impl_get_base_type): Remove.
* dwarf2expr.c (dwarf_expr_context::get_base_type): Remove.
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gas/
* config/tc-i386.c: (cpu_arch) Add .avx512_4vnniw.
(cpu_noarch): Add noavx512_4vnniw.
* doc/c-i386.texi: Document avx512_4vnniw, noavx512_4vnniw.
* testsuite/gas/i386/i386.exp: Run AVX512_4VNNIW tests.
* testsuite/gas/i386/avx512_4vnniwd_vl-intel.d: New test.
* testsuite/gas/i386/avx512_4vnniwd_vl.d: Ditto.
* testsuite/gas/i386/avx512_4vnniwd_vl.s: Ditto.
* testsuite/gas/i386/avx512_4vnniwd-intel.d: Ditto.
* testsuite/gas/i386/avx512_4vnniwd.d: Ditto.
* testsuite/gas/i386/avx512_4vnniwd.s: Ditto.
* testsuite/gas/i386/x86-64-avx512_4vnniwd_vl-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx512_4vnniwd_vl.d: Ditto.
* testsuite/gas/i386/x86-64-avx512_4vnniwd_vl.s: Ditto.
* testsuite/gas/i386/x86-64-avx512_4vnniwd-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx512_4vnniwd.d: Ditto.
* testsuite/gas/i386/x86-64-avx512_4vnniwd.s: Ditto.
opcodes/
* i386-dis.c (enum): Add PREFIX_EVEX_0F3852, PREFIX_EVEX_0F3853.
* i386-dis-evex.h (evex_table): Updated.
* i386-gen.c (cpu_flag_init): Add CPU_AVX512_4VNNIW_FLAGS,
CPU_ANY_AVX512_4VNNIW_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
(cpu_flags): Add CpuAVX512_4VNNIW.
* i386-opc.h (enum): (AVX512_4VNNIW): New.
(i386_cpu_flags): Add cpuavx512_4vnniw.
* i386-opc.tbl: Add Intel AVX512_4VNNIW instructions.
* i386-init.h: Regenerate.
* i386-tbl.h: Ditto.
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gas/
* config/tc-i386.c (cpu_arch): Add .avx512_4fmaps.
(cpu_noarch): Add noavx512_4fmaps.
(process_operands): Handle implicit quad group.
* doc/c-i386.texi: Document avx512_4fmaps, noavx512_4fmaps.
* testsuite/gas/i386/i386.exp: Add AVX512_4FMAPS tests.
* testsuite/gas/i386/avx512_4fmaps_vl-intel.d: New test.
* testsuite/gas/i386/avx512_4fmaps_vl.d: Ditto.
* testsuite/gas/i386/avx512_4fmaps_vl.s: Ditto.
* testsuite/gas/i386/avx512_4fmaps-intel.d: Ditto.
* testsuite/gas/i386/avx512_4fmaps.d: Ditto.
* testsuite/gas/i386/avx512_4fmaps.s: Ditto.
* testsuite/gas/i386/avx512_4fmaps-warn.l: Ditto.
* testsuite/gas/i386/avx512_4fmaps-warn.s: Ditto.
* testsuite/gas/i386/avx512_4fmaps_vl-warn.l: Ditto.
* testsuite/gas/i386/avx512_4fmaps_vl-warn.s: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps_vl.d: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps_vl.s: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps.d: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps.s: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps-warn.l: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps-warn.s: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.l: Ditto.
* testsuite/gas/i386/x86-64-avx512_4fmaps_vl-warn.s: Ditto.
opcodes/
* i386-dis.c. (enum): Add PREFIX_EVEX_0F389A,
PREFIX_EVEX_0F389B, PREFIX_EVEX_0F38AA, PREFIX_EVEX_0F38AB.
* i386-dis-evex.h (evex_table): Updated.
* i386-gen.c (cpu_flag_init): Add CPU_AVX512_4FMAPS_FLAGS,
CPU_ANY_AVX512_4FMAPS_FLAGS. Update CPU_ANY_AVX512F_FLAGS.
(cpu_flags): Add CpuAVX512_4FMAPS.
(opcode_modifiers): Add ImplicitQuadGroup modifier.
* i386-opc.h (AVX512_4FMAP): New.
(i386_cpu_flags): Add cpuavx512_4fmaps.
(ImplicitQuadGroup): New.
(i386_opcode_modifier): Add implicitquadgroup.
* i386-opc.tbl: Add Intel AVX512_4FMAPS instructions.
* i386-init.h: Regenerate.
* i386-tbl.h: Ditto.
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Break out of the outer switch statement once the inner switch for the
BFD_RELOC_CTOR relocation has been processed, preventing double BFD_FAIL
calls from being made, once from the inner switch and then again from
the default case of the outer switch.
Noticed with a `-Wimplicit-fallthrough' build error reported by a recent
GCC version:
In file included from .../bfd/reloc.c:52:0:
.../bfd/reloc.c: In function 'bfd_default_reloc_type_lookup':
.../bfd/libbfd.h:779:8: error: this statement may fall through [-Werror=implicit-fallthrough=]
do { bfd_assert(__FILE__,__LINE__); } while (0)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
.../bfd/reloc.c:7780:4: note: in expansion of macro 'BFD_FAIL'
BFD_FAIL ();
^~~~~~~~
.../bfd/reloc.c:7782:5: note: here
default:
^~~~~~~
cc1: all warnings being treated as errors
make[4]: *** [reloc.lo] Error 1
bfd/
* reloc.c (bfd_default_reloc_type_lookup) <BFD_RELOC_CTOR>: Do
not fall through to the default case.
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bfd * Makefile.am: Add entries for riscv32-elf and riscv64-elf.
* config.bdf: Likewise.
* configure.ac: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* archures.c: Add bfd_riscv_arch.
* reloc.c: Add riscv relocs.
* targets.c: Add riscv_elf32_vec and riscv_elf64_vec.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf-bfd.h: Add RISCV_ELF_DATA to enum elf_target_id.
* elfnn-riscv.c: New file.
* elfxx-riscv.c: New file.
* elfxx-riscv.h: New file.
binutils* readelf.c (guess_is_rela): Add EM_RISCV.
(get_machine_name): Likewise.
(dump_relocations): Add support for riscv relocations.
(get_machine_flags): Add support for riscv flags.
(is_32bit_abs_reloc): Add R_RISCV_32.
(is_64bit_abs_reloc): Add R_RISCV_64.
(is_none_reloc): Add R_RISCV_NONE.
* testsuite/binutils-all/objdump.exp (cpus_expected): Add riscv.
Expect the debug_ranges test to fail.
gas * Makefile.am: Add riscv files.
* Makefile.in: Regenerate.
* NEWS: Mention the support for this architecture.
* configure.in: Define a default architecture.
* configure: Regenerate.
* configure.tgt: Add entries for riscv.
* doc/as.texinfo: Likewise.
* testsuite/gas/all/gas.exp: Expect the redef tests to fail.
* testsuite/gas/elf/elf.exp: Expect the groupauto tests to fail.
* config/tc-riscv.c: New file.
* config/tc-riscv.h: New file.
* doc/c-riscv.texi: New file.
* testsuite/gas/riscv: New directory.
* testsuite/gas/riscv/riscv.exp: New file.
* testsuite/gas/riscv/t_insns.d: New file.
* testsuite/gas/riscv/t_insns.s: New file.
ld * Makefile.am: Add riscv files.
* Makefile.in: Regenerate.
* NEWS: Mention the support for this target.
* configure.tgt: Add riscv entries.
* emulparams/elf32lriscv-defs.sh: New file.
* emulparams/elf32lriscv.sh: New file.
* emulparams/elf64lriscv-defs.sh: New file.
* emulparams/elf64lriscv.sh: New file.
* emultempl/riscvelf.em: New file.
opcodes * configure.ac: Add entry for bfd_riscv_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Add support for riscv.
(disassembler_usage): Likewise.
* riscv-dis.c: New file.
* riscv-opc.c: New file.
include * dis-asm.h: Add prototypes for print_insn_riscv and
print_riscv_disassembler_options.
* elf/riscv.h: New file.
* opcode/riscv-opc.h: New file.
* opcode/riscv.h: New file.
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Complement commit 3831839c089c ("Delete IRIX support") and remove the
IRIX 5 <sys/proc.h> _KMEMUSER workaround from the `configure' script, as
IRIX is no longer a supported host configuration.
gdb/
* configure.ac <mips-sgi-irix5*>: Remove <sys/proc.h> _KMEMUSER
workaround.
* configure: Regenerate.
* config.in: Regenerate.
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Complement commit f7c382926d78 ("Remove support for "target m32rsdi" and
"target mips/pmon/ddb/rockhopper/lsi"") and remove dead MIPS target code
which used to support these legacy remote targets.
gdb/
* mips-tdep.c (mips_r3041_reg_names): Remove.
(mips_breakpoint_from_pc): Remove IDT and PMON breakpoint
encodings.
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Complement commit 3831839c089c ("Delete IRIX support") and remove dead
MIPS target IRIX OS ABI support code.
gdb/
* defs.h (gdb_osabi): Remove GDB_OSABI_IRIX enum value.
* osabi.c (gdb_osabi_names): Remove "Irix" entry.
* mips-tdep.c (mips_irix_reg_names): Remove.
(mips_register_type): Remove GDB_OSABI_IRIX code.
(mips_pseudo_register_type): Likewise.
(mips_breakpoint_from_pc): Likewise.
(mips_gdbarch_init): Likewise.
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2016-10-31 Thomas Preud'homme <thomas.preudhomme@arm.com>
ld/
* ldmain.c (add_archive_element): Initialize input->header.type.
* plugin.c (plugin_maybe_claim): Assert the statement is an input
statement.
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PR 20748
* elf32-microblaze.c (microblaze_elf_finish_dynamic_sections): Revert
2016-05-13 change.
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gdb/ChangeLog:
2016-10-29 Pedro Alves <palves@redhat.com>
* NEWS: Clarify C++ requirement.
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gdb/ChangeLog:
2016-10-29 Pedro Alves <palves@redhat.com>
* NEWS: Adjust to mention C++11 requirement.
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