| Commit message (Collapse) | Author | Age | Files | Lines |
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2007-07-23 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Change i386 to PROCESSOR_I386.
(f32_15): Removed.
(jump_31): New.
(f32_patt): Remove f32_15.
(f16_patt): Likewise.
(i386_align_code): Updated to alt_long_patt for 64bit by
default.
* config/tc-i386.h (processor_type): Add PROCESSOR_I386.
2007-07-23 Evandro Menezes <evandro.menezes@amd.com>
* config/tc-i386.c (i386_align_code): Enable alignment up to
MAX_MEM_FOR_RS_ALIGN_CODE bytes. Remove special treatment
for K8.
* config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Changed to
31.
gas/testsuite/
2007-07-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run nops16-1, nops-1-i386-i686, nops-1-k8,
nops-3-i386, nops-4, nops-4-i386, x86-64-nops-2, x86-64-nops-3,
x86-64-nops-4, x86-64-nops-4-core2 and x86-64-nops-4-k8.
* gas/i386/nops-1-i386-i686.d: New.
* gas/i386/nops-1-k8.d: Likewise.
* gas/i386/nops-3-i386.d : Likewise.
* gas/i386/nops-3-i686.d: Likewise.
* gas/i386/nops-4-i386.d: Likewise.
* gas/i386/nops-4.d: Likewise.
* gas/i386/nops16-1.d: Likewise.
* gas/i386/nops16-1.s: Likewise.
* gas/i386/x86-64-nops-1-k8.d: Likewise.
* gas/i386/x86-64-nops-2.d: Likewise.
* gas/i386/x86-64-nops-3.d: Likewise.
* gas/i386/x86-64-nops-4-core2.d: Likewise.
* gas/i386/x86-64-nops-4-k8.d: Likewise.
* gas/i386/x86-64-nops-4.d: Likewise.
* gas/i386/nops-1-i386.d: Updated.
* gas/i386/nops-1-i686.d: Likewise.
* gas/i386/nops-1.d: Likewise.
* gas/i386/nops-2-i386.d: Likewise.
* gas/i386/nops-2-merom.d : Likewise.
* gas/i386/nops-2.d: Likewise.
* gas/i386/nops-3.d: Likewise.
* gas/i386/x86-64-nops-1-merom.d: Likewise.
* gas/i386/x86-64-nops-1-nocona.d: Likewise.
* gas/i386/x86-64-nops-1.d: Likewise.
* gas/i386/x86-64-nops-1.s: Removed.
2007-07-23 Evandro Menezes <evandro.menezes@amd.com>
H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Don't run x86-64-nops-1-k8. Run
nops-3-i686 and nops-4-i686.
* gas/i386/nops-3-i686.d: New.
* gas/i386/nops-4-i686.d: Likewise.
* gas/i386/nops-4.s: Likewise.
* gas/i386/x86-64-nops-1-k8.d: Removed.
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* Makefile.am: Run dep-am.
* Makefile.in: Regenerated.
* config/tc-i386.c: Don't include "opcodes/i386-opc.h".
* config/tc-i386.h: Include "opcodes/i386-opc.h".
(NOP_OPCODE): Removed.
(template): Likewise.
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2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerated.
* config/tc-i386.c: Include "opcodes/i386-opc.h" instead of
"opcode/i386.h".
(md_begin): Check reg_name != NULL for the last entry in
i386_regtab.
* config/tc-i386.h: Move many entries to opcode/i386.h and
opcodes/i386-opc.h.
* configure.in (need_opcodes): Set true for i386.
* configure: Regenerated.
include/opcode/
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* i386.h: Add entries from config/tc-i386.h and move tables
to opcodes/i386-opc.h.
opcodes/
2007-03-15 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (CFILES): Add i386-opc.c.
(ALL_MACHINES): Add i386-opc.lo.
Run "make dep-am".
* Makefile.in: Regenerated.
* configure.in: Add i386-opc.lo for bfd_i386_arch.
* configure: Regenerated.
* i386-dis.c: Include "opcode/i386.h".
(MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition.
(FWAIT_OPCODE): Remove definition.
(UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition.
(MAX_OPERANDS): Remove definition.
* i386-opc.c: New file.
* i386-opc.h: Likewise.
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* config/tc-i386.c (md_assemble): Use Opcode_XXX instead of XXX
on i.tm.base_opcode.
(match_template): Likewise.
(process_operands): Use ~0x3 mask to match MOV_AX_DISP32.
* config/tc-i386.h (Opcode_D): New.
(Opcode_FloatR): Likewise.
(Opcode_FloatD): Likewise.
(D): Redefined.
(W): Likewise.
(FloatMF): Likewise.
(FloatR): Likewise.
(FloatD): Likewise.
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* config/tc-i386.h (Seg2ShortForm, Seg3ShortForm): Delete.
* config/tc-i386.c: Wrap overly long lines, whitespace fixes.
(process_operands): Move old Seg2ShortForm and Seg3ShortForm
code, and test for these insns using a combination of
opcode_modifier and operand_types.
include/opcode/
* i386.h (i386_optab): Replace all occurrences of Seg2ShortForm
and Seg3ShortFrom with Shortform.
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(struct fix <fx_plt>): Rename to tcbit2.
* write.c (fix_new_internal): Adjust.
(TC_FORCE_RELOCATION_LOCAL): Don't test fx_plt.
* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-cris.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-i960.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-sh.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-sh64.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-sparc.h (TC_FORCE_RELOCATION_LOCAL): Likewise.
* config/tc-msp430.c (msp430_force_relocation_local): Likewise.
* config/tc-ia64.c (emit_one_bundle): Don't set fx_plt.
* config/tc-ia64.h (TC_FORCE_RELOCATION_LOCAL): Don't test fx_plt.
Instead, compare fx_r_type.
* config/tc-xtensa.c (xg_add_opcode_fix, md_apply_fix): Use
fx_tcbit in place of fx_plt.
* config/tc-xtensa.h (TC_FORCE_RELOCATION_LOCAL): Define.
* doc/internals.texi (TC_FORCE_RELOCATION_LOCAL): Remove reference
to fx_plt.
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* config/tc-i386.c: Update copyright year.
* config/tc-i386.h: Likewise.
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* config/tc-i386.c: Convert to ISO C90 formatting
* config/tc-i386.h: Likewise.
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* config/tc-i386.h (ShiftCount): Fix a comment typo.
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* config/tc-i386.h (WordMem): Document it for 64 bit memory
reference.
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* config/tc-i386.h (template): Use MAX_OPERANDS instead of 4
operand_types array.
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2006-12-06 H.J. Lu <hjl@gnu.org>
* config/tc-i386.h: Change the prefix order to SEG_PREFIX,
ADDR_PREFIX, DATA_PREFIX, LOCKREP_PREFIX.
gas/testsuite/
2006-12-06 H.J. Lu <hjl@gnu.org>
* gas/i386/amdfam10.d: Updated for operand/address-size override
prefix position change.
* gas/i386/naked.d: Likewise.
* gas/i386/rep-suffix.d: Likewise.
* gas/i386/rep.d: Likewise.
* gas/i386/white.l: Likewise.
* gas/i386/x86-64-amdfam10.d: Likewise.
* gas/i386/x86-64-rep-suffix.d: Likewise.
* gas/i386/x86-64-rep.d: Likewise.
* gas/i386/x86_64.d: Likewise.
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2006-11-08 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h (CpuPNI): Removed.
(CpuUnknownFlags): Replace CpuPNI with CpuSSE3.
* config/tc-i386.c (md_assemble): Likewise.
include/opcode/
2006-11-08 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Replace CpuPNI with CpuSSE3.
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2006-09-28 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.h (CpuMNI): Renamed to ...
(CpuSSSE3): This.
(CpuUnknownFlags): Updated.
(processor_type): Replace PROCESSOR_YONAH with PROCESSOR_CORE
and PROCESSOR_MEROM with PROCESSOR_CORE2.
* config/tc-i386.c: Updated.
* doc/c-i386.texi: Likewise.
* config/tc-i386.c (cpu_arch): Add ".ssse3", "core" and "core2".
include/opcode/
2006-09-28 H.J. Lu <hongjiu.lu@intel.com>
* i386.h: Replace CpuMNI with CpuSSSE3.
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* bfd/elf64-x86-64.c: Add FreeBSD support.
(elf64_x86_64_fbsd_post_process_headers): New function.
* bfd/targets.c (_bfd_target_vector): Add bfd_elf64_x86_64_freebsd_vec.
* bfd/config.bfd (x64_64-*-freebsd*): Add bfd_elf64_x86_64_freebsd_vec to the targ_selvecs.
* bfd/configure.in: Add entry for bfd_elf64_x86_64_freebsd_vec.
* bfd/configure: Regenerate.
* gas/config/tc-i386.c (md_parse_option): Treat any target starting with elf64_x86_64 as a viable target for the -64 switch.
(i386_target_format): For 64-bit ELF flavoured output use ELF_TARGET_FORMAT64.
* gas/config/tc-i386.h (ELF_TARGET_FORMAT64): Define.
* ld/emulparams/elf_x86_64_fbsd.sh (OUTPUT_FORMAT): Define as elf64-x86-64-freebsd.
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* config/tc-i386.c (cpu_arch): Remove Cpu086, CpuAthlon and
CpuAmdFam10.
(smallest_imm_type): Remove Cpu086.
(i386_target_format): Likewise.
* config/tc-i386.h: Remove Cpu086, CpuAthlon and CpuAmdFam10.
Update CpuXXX.
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* config/tc-i386.h (Size64): Fix a typo in comment.
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* config/tc-i386.h (processor_type): New.
(arch_entry): Add type.
* config/tc-i386.c (cpu_arch_tune): New.
(cpu_arch_tune_flags): Likewise.
(cpu_arch_isa_flags): Likewise.
(cpu_arch): Updated.
(set_cpu_arch): Also update cpu_arch_isa_flags.
(md_assemble): Update cpu_arch_isa_flags.
(OPTION_MARCH): New.
(OPTION_MTUNE): Likewise.
(md_longopts): Add -march= and -mtune=.
(md_parse_option): Support -march= and -mtune=.
(md_show_usage): Add -march=CPU/-mtune=CPU.
(i386_target_format): Also update cpu_arch_isa_flags,
cpu_arch_tune and cpu_arch_tune_flags.
* doc/as.texinfo: Add -march=CPU/-mtune=CPU.
* doc/c-i386.texi: Document -march=CPU/-mtune=CPU.
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Un-constify string argument.
* config/tc-i386.c, config/tc-i386.h (tc_x86_regname_to_dw2regnum):
Likewise.
* config/tc-m68k.c, config/tc-m68k.h (tc_m68k_regname_to_dw2regnum):
Likewise.
* config/tc-ppc.c, config/tc-ppc.h (tc_ppc_regname_to_dw2regnum):
Likewise.
* config/tc-s390.c, config/tc-s390.h (tc_s390_regname_to_dw2regnum):
Likewise.
* config/tc-sh.c, config/tc-sh.h (sh_regname_to_dw2regnum):
Likewise.
* config/tc-sparc.c, config/tc-sparc.h (sparc_regname_to_dw2regnum):
Likewise.
-------------------------------------------------------------------
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2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (output_insn): Support Intel Merom New
Instructions.
* gas/config/tc-i386.h (CpuMNI): New.
(CpuUnknownFlags): Add CpuMNI.
gas/testsuite/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add merom and x86-64-merom.
* gas/i386/merom.d: New file.
* gas/i386/merom.s: Likewise.
* gas/i386/x86-64-merom.d: Likewise.
* gas/i386/x86-64-merom.s: Likewise.
include/opcode/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel Merom New Instructions.
opcodes/
2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
Intel Merom New Instructions.
(THREE_BYTE_0): Likewise.
(THREE_BYTE_1): Likewise.
(three_byte_table): Likewise.
(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
THREE_BYTE_1 for entry 0x3a.
(twobyte_has_modrm): Updated.
(twobyte_uses_SSE_prefix): Likewise.
(print_insn): Handle 3-byte opcodes used by Intel Merom New
Instructions.
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* config/tc-i386.c (line_comment_chars): Use '/' unconditionally.
(i386_comment_chars): Add.
(md_parse_options): Process OPTION_DIVIDE.
(md_show_usage): Describe --divide option.
* doc/c-i386.texi: Document --divide option.
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2005-10-26 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (i386_operand): Don't check register prefix here.
(parse_real_register): Rename from parse_register.
(parse_register): New.
(i386_parse_name): New.
(md_operand): New.
(intel_e11): Don't tolerate registers in offset expressions anymore.
(intel_get_token): Don't check register prefix here. Copy the actual
register token, not the canonical register name.
* config/tc-i386.h (md_operand): Delete.
(i386_parse_name): Declare.
(md_parse_name): Define.
gas/testsuite/
2005-10-26 Jan Beulich <jbeulich@novell.com>
* gas/i386/intel.s: Replace register used in offset expression.
* gas/i386/intel.e: Adjust.
* gas/i386/intelbad.l: Adjust.
* gas/i386/equ.[sed]: New.
* gas/i386/i386.exp: Run new test.
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2005-09-28 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (x86_cons_fix_new): Declare unconditionally.
(TC_CONS_FIX_NEW): Define unconditionally.
(x86_pe_cons_fix_new): Remove.
* config/tc-i386.c (signed_cons): New.
(md_pseudo_table): Add slong.
(x86_cons_fix_new): Declare unconditionally.
(x86_pe_cons_fix_new): Merge into x86_cons_fix_new.
(tc_gen_reloc): Also consider BFD_RELOC_X86_64_32S for gotpc
conversion.
gas/testsuite/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc64.s: Also test .slong.
* gas/i386/reloc64.l: Adjust.
* gas/i386/reloc64.d: Adjust.
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* config-gas.com: Delete.
* makefile.vms: Delete.
* vmsconf.sh: Delete.
* config/atof-tahoe.c: Delete.
* config/m88k-opcode.h: Delete.
* config/obj-bout.c: Delete.
* config/obj-bout.h: Delete.
* config/obj-hp300.c: Delete.
* config/obj-hp300.h: Delete.
* config/tc-a29k.c: Delete.
* config/tc-a29k.h: Delete.
* config/tc-h8500.c: Delete.
* config/tc-h8500.h: Delete.
* config/tc-m88k.c: Delete.
* config/tc-m88k.h: Delete.
* config/tc-tahoe.c: Delete.
* config/tc-tahoe.h: Delete.
* config/tc-tic80.c: Delete.
* config/tc-tic80.h: Delete.
* config/tc-w65.c: Delete.
* config/tc-w65.h: Delete.
* config/te-aux.h: Delete.
* config/te-delt88.h: Delete.
* config/te-delta.h: Delete.
* config/te-dpx2.h: Delete.
* config/te-hp300.h: Delete.
* config/te-ic960.h: Delete.
* config/vms-a-conf.h: Delete.
* doc/c-a29k.texi: Delete.
* doc/c-h8500.texi: Delete.
* doc/c-m88k.texi: Delete.
* README: Remove obsolete examples, and list of supported targets.
* Makefile.am: Remove a29k, h8500, m88k, tahoe, tic80, w65,
bout and hp300 support.
(DEP_FLAGS): Don't define BFD_ASSEMBLER.
* configure.in: Remove --enable-bfd-assembler, need_bfd,
primary_bfd_gas.
* configure.tgt: Remove a29k, h8300-coff, h8500-*, i960 non-elf,
m68k non bfd, m88k, or32-coff, tic80-*, vax non-bfd, w65k-*, *-nindy.
* as.c: Remove all non-BFD_ASSEMBLER code, support for above targets.
* as.h: Likewise.
* dw2gencfi.c: Likewise.
* dwarf2dbg.c: Likewise.
* ehopt.c: Likewise.
* input-file.c: Likewise.
* listing.c: Likewise.
* literal.c: Likewise.
* messages.c: Likewise.
* obj.h: Likewise.
* output-file.c: Likewise.
* read.c: Likewise.
* stabs.c: Likewise.
* struc-symbol.h: Likewise.
* subsegs.c: Likewise.
* subsegs.h: Likewise.
* symbols.c: Likewise.
* symbols.h: Likewise.
* tc.h: Likewise.
* write.c: Likewise.
* write.h: Likewise.
* config/aout_gnu.h: Likewise.
* config/obj-aout.c: Likewise.
* config/obj-aout.h: Likewise.
* config/obj-coff.c: Likewise.
* config/obj-coff.h: Likewise.
* config/obj-evax.h: Likewise.
* config/obj-ieee.h: Likewise.
* config/tc-arm.c: Likewise.
* config/tc-arm.h: Likewise.
* config/tc-avr.c: Likewise.
* config/tc-avr.h: Likewise.
* config/tc-crx.h: Likewise.
* config/tc-d10v.h: Likewise.
* config/tc-d30v.h: Likewise.
* config/tc-dlx.h: Likewise.
* config/tc-fr30.h: Likewise.
* config/tc-frv.h: Likewise.
* config/tc-h8300.c: Likewise.
* config/tc-h8300.h: Likewise.
* config/tc-hppa.h: Likewise.
* config/tc-i370.h: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-i386.h: Likewise.
* config/tc-i860.h: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-i960.h: Likewise.
* config/tc-ip2k.h: Likewise.
* config/tc-iq2000.h: Likewise.
* config/tc-m32c.h: Likewise.
* config/tc-m32r.h: Likewise.
* config/tc-m68hc11.h: Likewise.
* config/tc-m68k.c: Likewise.
* config/tc-m68k.h: Likewise.
* config/tc-maxq.c: Likewise.
* config/tc-maxq.h: Likewise.
* config/tc-mcore.c: Likewise.
* config/tc-mcore.h: Likewise.
* config/tc-mn10200.h: Likewise.
* config/tc-mn10300.c: Likewise.
* config/tc-mn10300.h: Likewise.
* config/tc-ms1.h: Likewise.
* config/tc-msp430.c: Likewise.
* config/tc-msp430.h: Likewise.
* config/tc-ns32k.c: Likewise.
* config/tc-ns32k.h: Likewise.
* config/tc-openrisc.h: Likewise.
* config/tc-or32.c: Likewise.
* config/tc-or32.h: Likewise.
* config/tc-ppc.c: Likewise.
* config/tc-ppc.h: Likewise.
* config/tc-s390.h: Likewise.
* config/tc-sh.c: Likewise.
* config/tc-sh.h: Likewise.
* config/tc-sparc.c: Likewise.
* config/tc-tic30.c: Likewise.
* config/tc-tic30.h: Likewise.
* config/tc-tic4x.c: Likewise.
* config/tc-tic4x.h: Likewise.
* config/tc-tic54x.c: Likewise.
* config/tc-tic54x.h: Likewise.
* config/tc-v850.h: Likewise.
* config/tc-vax.c: Likewise.
* config/tc-vax.h: Likewise.
* config/tc-xstormy16.h: Likewise.
* config/tc-xtensa.h: Likewise.
* config/tc-z8k.c: Likewise.
* config/tc-z8k.h: Likewise.
* config/vms-a-conf.h
* doc/Makefile.am: Likewise.
* doc/all.texi: Likewise.
* doc/as.texinfo: Likewise.
* doc/Makefile.in: Regenerate.
* Makefile.in: Regenerate.
* configure: Regenerate.
* config.in: Regenerate.
* po/POTFILES.in: Regenerate.
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2005-07-25 Jan Hubicka <jh@suse.cz>
H.J. Lu <hongjiu.lu@intel.com>
* elf-bfd.h (_bfd_elf_large_com_section): New.
* elf.c (_bfd_elf_large_com_section): New. Defined.
* elf64-x86-64.c (elf64_x86_64_add_symbol_hook): New.
(elf64_x86_64_elf_section_from_bfd_section): New.
(elf64_x86_64_symbol_processing): New.
(elf64_x86_64_common_definition): New.
(elf64_x86_64_common_section_index): New.
(elf64_x86_64_common_section): New.
(elf64_x86_64_merge_symbol): New.
(elf64_x86_64_additional_program_headers): New.
(elf64_x86_64_special_sections): New.
(elf_backend_section_from_bfd_section): New. Defined.
(elf_backend_add_symbol_hook): Likewise.
(elf_backend_common_section_index): Likewise.
(elf_backend_common_section): Likewise.
(elf_backend_common_definition): Likewise.
(elf_backend_merge_symbol): Likewise.
(elf_backend_special_sections): Likewise.
(elf_backend_additional_program_headers): Likewise.
binutils/
2005-07-25 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (dump_relocations): Handle SHN_X86_64_LCOMMON.
(get_symbol_index_type): Likewise.
(get_elf_section_flags): Handle SHF_X86_64_LARGE.
gas/
2005-07-25 Jan Hubicka <jh@suse.cz>
H.J. Lu <hongjiu.lu@intel.com>
* config/obj-elf.c: Include "elf/x86-64.h" if TC_I386 is
defined.
(elf_com_section_ptr): New.
(elf_begin): Set elf_com_section_ptr to bfd_com_section_ptr.
(elf_common_parse): Make it global. Use elf_com_section_ptr
instead of bfd_com_section_ptr.
(obj_elf_change_section): Handle x86-64 large bss sections.
* config/obj-elf.h (elf_com_section_ptr): New.
(elf_common_parse): New.
* config/tc-i386.c (handle_large_common): New.
(md_pseudo_table): Add "largecomm".
(x86_64_section_letter): New.
(x86_64_section_word): New.
* config/tc-i386.h (x86_64_section_word): New.
(x86_64_section_letter): New.
(md_elf_section_letter): New. Defined.
(md_elf_section_word): Likewise.
include/elf/
2005-07-25 Jan Hubicka <jh@suse.cz>
* x86-64.h (SHN_X86_64_LCOMMON): New.
(SHF_X86_64_LARGE): New.
ld/
2005-07-25 Jan Hubicka <jh@suse.cz>
H.J. Lu <hongjiu.lu@intel.com>
* emulparams/elf_x86_64.sh (LARGE_SECTIONS): New.
* scripttempl/elf.sc: Updated for large section support.
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2005-07-18 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (md_begin): Use IS_ELF.
(tc_i386_fix_adjustable): Likewise.
(md_estimate_size_before_relax): Likewise.
(md_apply_fix): Likewise.
(i386_target_format): Likewise.
(lex_got): Define to NULL when not ELF or when LEX_AT. Check IS_ELF.
(i386_immediate): Remove #ifdef LEX_AT.
(i386_displacement): Likewise.
* config/tc-i386.h (x86_cons): Prototype only when ELF and when not
LEX_AT.
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2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.h (CpuVMX): New.
(CpuUnknownFlags): Add CpuVMX.
gas/testsuite/
2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add vmx and x86-64-vmx.
* gas/i386/vmx.d: New file.
* gas/i386/vmx.s: Likewise.
* gas/i386/x86-64-vmx.d: Likewise.
* gas/i386/x86-64-vmx.s: Likewise.
include/opcode/
2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel VMX Instructions.
opcodes/
2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
(VMX_Fixup): New. Fix up Intel VMX Instructions.
(Em): New.
(Gm): New.
(VM): New.
(dis386_twobyte): Updated entries 0x78 and 0x79.
(twobyte_has_modrm): Likewise.
(grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
(OP_G): Handle m_mode.
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* config/obj-elf.h: Likewise.
* config/tc-h8300.h: Likewise.
* config/tc-h8500.h: Likewise.
* config/tc-i370.h: Likewise.
* config/tc-i386.h: Likewise.
* config/tc-m68hc11.h: Likewise.
* config/tc-m68k.h: Likewise.
* config/tc-ppc.h: Likewise.
* config/tc-s390.h: Likewise.
* config/tc-sh.h: Likewise.
* config/tc-sparc.h: Likewise.
* config/tc-tic30.c: Likewise.
* config/tc-w65.h: Likewise.
* config/tc-xtensa.h: Likewise.
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* config/tc-i386.c (cpu_arch): Add sse3.
* config/tc-i386.h (CpuSSE3): Renamed from ...
(CpuPNI): This. Defined as CpuSSE3.
* doc/c-i386.texi: Document .sse3.
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2005-07-05 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (CpuSVME): New.
(CpuUnknownFlags): Include CpuSVME.
* config/tc-i386.c (cpu_arch): Add .pacifica and .svme. Add opteron
as alias of sledgehammer.
(md_assemble): Include invlpga in the check for insns with two source
operands.
(process_operands): Include SVME insns in the check for ignored
segment overrides. Adjust diagnostic.
(i386_index_check): Special-case SVME insns with memory operands.
gas/testsuite/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* gas/i386/svme.d: New.
* gas/i386/svme.s: New.
* gas/i386/svme64.d: New.
* gas/i386/i386.exp: Run new tests.
include/opcode/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): Add new insns.
opcodes/
2005-07-05 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (SVME_Fixup): New.
(grps): Use it for the lidt entry.
(PNI_Fixup): Call OP_M rather than OP_E.
(INVLPG_Fixup): Likewise.
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* cgen.c, cgen.h, tc.h, write.c, config/obj-coff.c
* config/tc-a29k.c, config/tc-alpha.c, config/tc-alpha.h
* config/tc-arc.c, config/tc-arc.h, config/tc-arm.c
* config/tc-arm.h, config/tc-avr.c, config/tc-avr.h
* config/tc-cris.c, config/tc-crx.c, config/tc-d10v.c
* config/tc-d10v.h, config/tc-d30v.c, config/tc-d30v.h
* config/tc-dlx.c, config/tc-dlx.h, config/tc-fr30.h
* config/tc-frv.c, config/tc-frv.h, config/tc-h8300.c
* config/tc-h8500.c, config/tc-hppa.c, config/tc-hppa.h
* config/tc-i370.c, config/tc-i370.h, config/tc-i386.c
* config/tc-i386.h, config/tc-i860.c, config/tc-i860.h
* config/tc-i960.c, config/tc-i960.h, config/tc-ia64.c
* config/tc-ip2k.c, config/tc-ip2k.h, config/tc-iq2000.c
* config/tc-iq2000.h, config/tc-m32r.c, config/tc-m32r.h
* config/tc-m68hc11.c, config/tc-m68hc11.h, config/tc-m68k.c
* config/tc-m68k.h, config/tc-m88k.c, config/tc-maxq.c
* config/tc-mcore.c, config/tc-mcore.h, config/tc-mips.c
* config/tc-mips.h, config/tc-mmix.c, config/tc-mn10200.c
* config/tc-mn10300.c, config/tc-msp430.c, config/tc-ns32k.c
* config/tc-openrisc.h, config/tc-or32.c, config/tc-or32.h
* config/tc-pdp11.c, config/tc-pj.c, config/tc-pj.h
* config/tc-ppc.c, config/tc-ppc.h, config/tc-s390.c
* config/tc-s390.h, config/tc-sh64.c, config/tc-sh.c
* config/tc-sh.h, config/tc-sparc.c, config/tc-sparc.h
* config/tc-tahoe.c, config/tc-tic30.c, config/tc-tic4x.c
* config/tc-tic54x.c, config/tc-tic80.c, config/tc-v850.c
* config/tc-v850.h, config/tc-vax.c, config/tc-vax.h
* config/tc-w65.c, config/tc-xstormy16.c, config/tc-xstormy16.h
* config/tc-xtensa.c, config/tc-z8k.c:
Replace all instances of the string "_apply_fix3" with
"_apply_fix".
* po/POTFILES.in, po/gas.pot: Regenerate.
bfd:
* coff-i386.c: Change md_apply_fix3 to md_apply_fix in comment.
cgen:
* doc/porting.texi: Change all mention of md_apply_fix3 and
gas_cgen_md_apply_fix3 to md_apply_fix and gas_cgen_md_apply_fix
respectively.
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bfd/
* config.bfd: Use bfd_elf32_i386_vxworks_vec for i?86-*-vxworks.
* configure.in: Add bfd_elf32_i386_vxworks_vec. i386 targets need
elf-vxworks.lo.
* configure: Regenerate.
* Makefile.am (BFD32_BACKENDS): Add elf-vxworks.lo.
(BFD32_BACKENDS_CFILES): Add elf-vxworks.c.
(elf32-i386.lo): Depend on elf-vxworks.h.
(elf-vxworks.lo): New rule.
* Makefile.in: Regenerate.
* elf-bfd.h (elf_backend_data): Update type of
elf_backend_emit_relocs.
(_bfd_elf_link_output_relocs): Update prototype.
* elflink.c (_bfd_elf_link_output_relocs): Always use
bed->elf_backend_emit_relocs when outputting relocations.
* elfxx-target.h (elf_backend_emit_relocs): Default to
_bfd_elf_link_output_relocs.
* targets.c (bfd_elf32_i386_vxworks_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_i386_vxworks_vec.
* elf32-i386.c: Add elf32-i386-vxworks target BFD.
(elf_i386_plt0_entry): Remove padding.
(elf_i386_pic_plt0_entry): Ditto.
(PLTRESOLVE_RELOCS_SHLIB, PLTRESOLVE_RELOCS): Define.
(PLT_NON_JUMP_SLOT_RELOCS): Define.
(elf_i386_link_hash_table): Add srelplt2, hgot, hplt, is_vxworks and
plt0_pad_byte fields.
(elf_i386_link_hash_table_create): Zero them.
(elf_i386_create_dynamic_sections): Create static relocation section.
(allocate_dynrelocs): Allocate space for static PLT relocations.
(elf_i386_size_dynamic_sections): Save shortcuts to PLT and GOT
symbols. Give PLT symbols function type. Don't strip PLT sections
if we have exported symbols from them.
(elf_i386_finish_dynamic_symbol): Fill in VxWorks PLT static
relocation section. Don't mark _GLOBAL_OFFSET_TABLE_ as absolute on
VxWorks.
(elf_i386_finish_dynamic_sections): Allow different pad bytes.
Add relocation for GOT location. Fill in PLT static relocations.
(elf_i386_vxworks_link_hash_table_create): New function.
(elf_i386_vxworks_link_output_symbol_hook): New function.
* elf-vxworks.h: New file.
gas/
* config/tc-i386.h (ELF_TARGET_FORMAT): Define for TE_VXWORKS.
gas/testsuite/
* gas/i386/i386.exp: Don't run divide test on vxworks.
ld/
* Makefile.am: Add eelf_i386_vxworks.
* Makefile.in: Regenerate.
* configure.tgt: Make i?86-*-vxworks use targ_emul=elf_i386_vxworks.
* emulparams/elf_i386_vxworks.sh: New file.
* emulparams/vxworks.sh: New file.
* scripttempl/elf.sc: Add DATA_END_SYMBOLS and ETEXT_NAME.
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2004-11-23 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (CpuMMX2): Declare. Artificial classifier to
indicate the MMX extensions added by both SSE and 3DNow!A.
(Cpu3dnowA): Declare.
(CpuUnknownFlags): Update.
* config/tc-i386.c (cpu_sub_arch_name): Declare.
(cpu_arch): i586 and pentium do not imply MMX. i686 and pentiumpro do
neither imply SSE nor MMX. k6 implies MMX. k6_2 additionally implies
3DNow!. Athlon additionally implies 3DNow!A. Several new
entries (those starting with a dot are for sub-arch specification).
(set_cpu_arch): Handle sub-arch specifications.
(parse_insn): Distinguish between instructions not supported because
of insufficient CPU features and because of 64-bit mode.
* doc/c-i386.texi: Describe enhanced .arch directive.
include/opcode/
2004-11-23 Jan Beulich <jbeulich@novell.com>
* i386.h (i386_optab): paddq and psubq, even in their MMX form, are
available only with SSE2. Change the MMX additions introduced by SSE
and 3DNow!A to CpuMMX2 (rather than CpuMMX). Indicate the 3DNow!A
instructions by their now designated identifier (since combining i686
and 3DNow! does not really imply 3DNow!A).
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2004-11-04 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (set_intel_syntax): Allow % in symbol names when
intel syntax and no register prefix, allow $ in symbol names when
intel syntax.
(set_16bit_gcc_code_flag): Replace literal 'l' by LONG_MNEM_SUFFIX.
(intel_float_operand): Add fourth return value indicating math control
operations. Make classification more precise.
(md_assemble): Complain if memory operand of mov[sz]x has no size
specified.
(parse_insn): Translate word operands to floating point instructions
operating on integers as well as control instructions to short ones
as expected by AT&T syntax. Translate 'd' suffix to short one only for
floating point instructions operating on non-integer operands.
(match_template): Remove fldcw special case. Adjust q-suffix handling
to permit it on fild/fistp/fisttp in AT&T mode.
(process_suffix): Don't guess DefaultSize insns' suffix from
stackop_size for certain floating point control instructions. Guess
suffix for branch and [ls][gi]dt based on flag_code. Split error
messages for Intel and AT&T syntax, and make the condition more strict
for the former. Adjust suppressing of generation of operand size
overrides.
(intel parser): Allow the full set of MASM operators. Add FWORD, TBYTE,
OWORD, and XMMWORD operand size specifiers (TBYTE replaces XWORD). Add
more error checking.
* config/tc-i386.h (BYTE_PTR WORD_PTR DWORD_PTR QWORD_PTR XWORD_PTR
SHORT OFFSET_FLAT FLAT NONE_FOUND): Remove unused defines.
gas/testsuite/
2004-11-04 Jan Beulich <jbeulich@novell.com>
* gas/i386/i386.exp: Execute new tests intelbad and intelok.
* gas/i386/intelbad.[sl]: New test to check for various things not
permitted in Intel mode.
* gas/i386/intel.d, gas/i386/opcode.d, gas/i386/x86-64-opcode.d:
Adjust for change to segment register store.
* gas/i386/intelok.[sd]: New test to check various Intel mode specific
things get handled correctly.
* gas/i386/x86_64.[sd]: Remove unsupported constructs referring to
'high' and 'low' parts of an operand, which the parser previously
accepted while neither telling that it's not supported nor that it
ignored the remainder of the line following these supposed keywords.
include/opcode/
2004-11-04 Jan Beulich <jbeulich@novell.com>
* i386.h (sldx_Suf): Remove.
(FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.
(q_FP): Define, implying no REX64.
(x_FP, sl_FP): Imply FloatMF.
(i386_optab): Split reg and mem forms of moving from segment registers
so that the memory forms can ignore the 16-/32-bit operand size
distinction. Adjust a few others for Intel mode. Remove *FP uses from
all non-floating-point instructions. Unite 32- and 64-bit forms of
movsx, movzx, and movd. Adjust floating point operations for the above
changes to the *FP macros. Add DefaultSize to floating point control
insns operating on larger memory ranges. Remove left over comments
hinting at certain insns being Intel-syntax ones where the ones
actually meant are already gone.
opcodes/
2004-11-04 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
(indirEb): Remove.
(Mp): Use f_mode rather than none at all.
(t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
replaces what previously was x_mode; x_mode now means 128-bit SSE
operands.
(dis386): Make far jumps and calls have an 'l' prefix only in AT&T
mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
pinsrw's second operand is Edqw.
(grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
mode when an operand size override is present or always suffixing.
More instructions will need to be added to this group.
(putop): Handle new macro chars 'C' (short/long suffix selector),
'I' (Intel mode override for following macro char), and 'J' (for
adding the 'l' prefix to far branches in AT&T mode). When an
alternative was specified in the template, honor macro character when
specified for Intel mode.
(OP_E): Handle new *_mode values. Correct pointer specifications for
memory operands. Consolidate output of index register.
(OP_G): Handle new *_mode values.
(OP_I): Handle const_1_mode.
(OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
respective opcode prefix bits have been consumed.
(OP_EM, OP_EX): Provide some default handling for generating pointer
specifications.
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(tc_pe_dwarf2_emit_offset): New function.
* config/tc-i386.h (O_secrel): Define as O_md1.
(TC_DWARF2_EMIT_OFFSET): Define.
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* config.bfd: Include 64-bit support for i[3-7]86-*-solaris2*.
* elf64-x86-64.c (elf64_x86_64_section_from_shdr): New function.
(elf_backend_section_from_shdr): Define.
binutils/
* readelf.c (get_x86_64_section_type_name): New function.
(get_section_type_name): Use it.
gas/
* config/tc-i386.c: Include "elf/x86-64.h".
(i386_elf_section_type): New function.
* config/tc-i386.h (md_elf_section_type): Define.
(i386_elf_section_type): New prototype.
gas/testsuite/
* gas/i386/i386.exp: Don't run divide test for targets where '/'
is a comment. Run x86-64-unwind for 64-bit ELF targets.
* gas/i386/x86-64-unwind.d, gas/i386/x86-64-unwind.s: New.
include/
* elf/common.h (PT_SUNW_EH_FRAME): Define.
* elf/x86-64.h (SHT_X86_64_UNWIND): Define.
ld/
* configure.tgt: Include elf_x86_64 for i[3-7]86-*-solaris2*.
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with COFF based x86 ports.
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* gas/config/tc-i386.c (output_insn): Handle PadLock instructions.
* gas/config/tc-i386.h (CpuPadLock): New define.
(CpuUnknownFlags): Added CpuPadLock.
* include/opcode/i386.h (i386_optab): Added xstore/xcrypt insns.
* opcodes/i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
(dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
(padlock_table): New struct with PadLock instructions.
(print_insn): Handle PADLOCK_SPECIAL.
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* config/tc-i370.c: Likewise.
* config/tc-i386.c: Likewise.
* config/tc-i386.h: Likewise.
* config/tc-i960.c: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-iq2000.h: Likewise.
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code.
* config/tc-i386.c: Likewise.
(RELOC_ENUM): Don't define. Replace throughout with enum.
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2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/config/tc-i386.c (md_assemble): Support Intel Precott New
Instructions.
* gas/config/tc-i386.h (CpuPNI): New.
(CpuUnknownFlags): Add CpuPNI.
gas/testsuite/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Add prescott.
* gas/i386/prescott.d: New file.
* gas/i386/prescott.s: Likewise.
include/opcode/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (i386_optab): Support Intel Precott New Instructions.
opcodes/
2003-06-23 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (PNI_Fixup): New. Fix up "mwait" and "monitor" in
Intel Precott New Instructions.
(PREGRP27): New. Added for "addsubpd" and "addsubps".
(PREGRP28): New. Added for "haddpd" and "haddps".
(PREGRP29): New. Added for "hsubpd" and "hsubps".
(PREGRP30): New. Added for "movsldup" and "movddup".
(PREGRP31): New. Added for "movshdup" and "movhpd".
(PREGRP32): New. Added for "lddqu".
(dis386_twobyte): Use PREGRP30 to replace the "movlpX" entry.
Use PREGRP31 to replace the "movhpX" entry. Use PREGRP28 for
entry 0x7c. Use PREGRP29 for entry 0x7d. Use PREGRP27 for
entry 0xd0. Use PREGRP32 for entry 0xf0.
(twobyte_has_modrm): Updated.
(twobyte_uses_SSE_prefix): Likewise.
(grps): Use PNI_Fixup in the "sidtQ" entry.
(prefix_user_table): Add PREGRP27, PREGRP28, PREGRP29, PREGRP30,
PREGRP31 and PREGRP32.
(float_mem): Use "fisttp{l||l|}" in entry 1 in opcode 0xdb.
Use "fisttpll" in entry 1 in opcode 0xdd.
Use "fisttp" in entry 1 in opcode 0xdf.
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* NEWS: Updated for the new -n option for the i386 assembler.
* config/tc-i386.c (optimize_align_code): New.
(md_shortopts): Add 'n'.
(md_parse_option): Handle 'n'.
(md_show_usage): Add '-n'.
* config/tc-i386.h (optimize_align_code): Declared.
(md_do_align): Optimize code alignment only if optimize_align_code
is not 0.
* doc/as.texinfo: Add the new -n option.
* doc/c-i386.texi: Document the new -n option.
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* as.c (main): Always call cfi_finish.
* config/tc-i386.c (x86_dwarf2_return_column): New.
(x86_cie_data_alignment): New.
(md_begin): Set them.
(tc_x86_cfi_init): Remove.
(tc_x86_regname_to_dw2regnum): Fix 32-bit register numbers;
return int, not unsigned long; don't as_bad here.
(tc_x86_frame_initial_instructions): Streamline; use
updated api.
* config/tc-i386.h (tc_cfi_init): Remove.
(DWARF2_DEFAULT_RETURN_COLUMN): New.
(DWARF2_CIE_DATA_ALIGNMENT): New.
* gas/cfi/cfi-i386.d: Update for dw2gencfi rewrite.
* gas/cfi/cfi-x86_64.d: Likewise.
* gas/cfi/cfi-i386-2.d: New.
* gas/cfi/cfi-i386-2.s: New.
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* config/tc-i386.c (tc_x86_cfi_init): New function.
* config/tc-i386.h (TARGET_USE_CFIPOP, tc_cfi_init): New defines.
* as.c (parse_args): Set verbose flag on --verbose.
(main): Call tc_cfi_init()/cfi_finish().
* as.h (verbose): New external variable.
* read.c (pobegin): Insert CFI pops to the list.
* symbols.c (local_symbol_make): Make symbol external.
* symbols.h (local_symbol_make): New prototype.
* Makefile.am: Add dw2gencfi.[ch] files. Run "make dep-am".
* Makefile.in: Regenerate.
* doc/as.texinfo: Added node "CFI directives" with description of
all implemented .cfi_* directives.
* doc/Makefile.in: Regenerate.
* po/POTFILES.in: Regenerate.
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