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* x86: Encode EVEX instructions with VEX128 if possibleH.J. Lu2018-03-094-25/+33
* x86: Strip whitespace in check_VecOperationsH.J. Lu2018-03-094-2/+15
* x86: Optimize with EVEX128 encoding for AVX512VLH.J. Lu2018-03-0813-56/+459
* x86-64: Also optimize "clr reg64"H.J. Lu2018-03-084-7/+23
* x86: Remove support for old (<= 2.8.1) versions of gccH.J. Lu2018-03-0810-54/+44
* x86: fold several AVX512VL templatesJan Beulich2018-03-082-6/+47
* x86: fold certain AVX512 rotate and shift templatesJan Beulich2018-03-082-3/+9
* x86: drop {X,Y,Z}MMWORD_MNEM_SUFFIXJan Beulich2018-03-083-43/+32
* x86: correct operand size match checks for BMI/BMI2 insnsJan Beulich2018-03-085-7/+64
* x86: fold redundant expressions in process_suffix()Jan Beulich2018-03-082-20/+18
* x86: simplify result processing of cpu_flags_match()Jan Beulich2018-03-082-24/+21
* x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()Jan Beulich2018-03-0819-2/+177
* x86: change AVX512VL handling in cpu_flags_match()Jan Beulich2018-03-082-11/+9
* x86: drop CPU_FLAGS_32BIT_MATCHJan Beulich2018-03-082-5/+10
* x86: simplify AVX checks in cpu_flags_match()Jan Beulich2018-03-082-22/+14
* x86: avoid cpu_flags_match() bogusly setting CPU_FLAGS_ARCH_MATCHJan Beulich2018-03-082-6/+5
* x86: extend SSE check to PCLMULQDQ, AES, and GFNI insnsJan Beulich2018-03-0816-126/+88
* x86: drop FloatDJan Beulich2018-03-082-7/+12
* x86/Intel: correct disassembly of fsub*/fdiv*Jan Beulich2018-03-083-0/+716
* x86: adjust 4-XMM-register-group related warningJan Beulich2018-03-084-30/+39
* x86: bogus VMOVD with 64-bit operands should only allow for registersJan Beulich2018-03-084-6/+6
* x86: fold AVX vcvtpd2ps memory formsJan Beulich2018-03-082-10/+42
* Really remove unnecessary power9 group terminating nopAlan Modra2018-03-082-4/+8
* Remove unnecessary power9 group terminating nopAlan Modra2018-03-082-10/+13
* x86: Rewrite NOP generation for fill and alignmentH.J. Lu2018-03-0765-3363/+2392
* XCOFF disassemblerAlan Modra2018-03-074-74/+81
* [ARM] Fix NULL dereference of march_ext_optThomas Preud'homme2018-03-022-1/+6
* [ARM] Clean up selection of feature bitsThomas Preud'homme2018-03-012-111/+171
* x86: Encode AVX256/AVX512 vpsub[bwdq] with VEX128/EVEX128H.J. Lu2018-03-016-2/+121
* Add missing translations to ALL_LINGUASAlan Modra2018-03-013-2/+7
* gas: Rename .nop directive to .nopsH.J. Lu2018-02-2726-44/+77
* x86: Add -O[2|s] assembler command-line optionsH.J. Lu2018-02-2721-2/+773
* Add a new Portuguese translation for the binutils sub-directory, and update t...Nick Clifton2018-02-272-1006/+1094
* GAS/doc: Clean up `.dc' and `.ds' directive descriptionsMaciej W. Rozycki2018-02-262-5/+9
* Fix typo in documentation of assembler's .dc directive.Nick Clifton2018-02-262-1/+5
* BFD messagesAlan Modra2018-02-262-1/+5
* MIPS messagesAlan Modra2018-02-262-1/+5
* Document the assembler's .dc, .dcb and .ds directives.Nick Clifton2018-02-232-5/+107
* nds32: Support target directive .ict_model.Kuan-Lin Chen2018-02-232-1/+59
* Diagnose when trying to assemble conditional FP16 vmovx and vinsAndre Simoes Dias Vieira2018-02-223-205/+279
* x86: Add {rex} pseudo prefixH.J. Lu2018-02-225-0/+94
* Fix memory access violation when attempting to shorten a suffixed micromips i...A. Wilcox2018-02-222-1/+7
* MIPS16/GAS/testsuite: Add cross-section R_MIPS16_PC16_S1 relocation testsMaciej W. Rozycki2018-02-206-0/+122
* gas: xtensa: limit size of auto litpoolsMax Filippov2018-02-207-45/+119
* Clarify .arch_extension possible valuesThomas Preud'homme2018-02-202-1/+6
* Add .nop assembler directiveH.J. Lu2018-02-1730-111/+812
* Fix AArch32 build attributes for Armv8.4-A.Tamar Christina2018-02-153-1/+23
* gas: xtensa: fix trampoline placementMax Filippov2018-02-132-0/+11
* Fix ARm assembler so that it rejects invalid immediate values for the Thumb O...Nick Clifton2018-02-135-3/+28
* x86-64: Generate branch with PLT32 relocationH.J. Lu2018-02-1310-23/+85
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