| Commit message (Collapse) | Author | Age | Files | Lines |
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- allowing true forward references (which will always assume the referenced
symbols have at the point of use) through the new .eqv pseudo-op and the
new == operator
- disallowing changing .equiv-generated equates (so that the protection this
provides is both forward and backward)
- snapshotting equates when their value gets changed so that previous uses
don't get affected by the new value.
- allowing expressions in places where absolute expressions (or register
names) are needed which were not completely resolvable at the point of
their definition but which are fully resolvable at the point of use
In addition it fixes PR/288.
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* Makefile.in: Regenerate.
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* doc/as.texinfo (Infix Op): Mention "!=".
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* gas/sh/reg-prefix.d: Force little endian assembly.
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(pa_ip): Promote from PA 1.0 to 1.1 immediately when 1.1 match is
found. Simplify handling of "ma" and "mb" completers.
* hppa.h (FLAG_STRICT): Revise comment.
(pa_opcode): Revise ordering rules. Add/move strict pa10 variants
before corresponding pa11 opcodes. Add strict pa10 register-immediate
entries for "fdc".
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bfd/
* elf32-arm.c: Move #include "elf/arm.h" after libbfd.h.
(NUM_KNOWN_ATTRIBUTES): Define.
(aeabi_attribute, aeabi_attribute_list): Define.
(elf32_arm_obj_tdata): Add known_eabi_attributes and
other_eabi_attributes.
(uleb128_size, is_default_attr, eabi_attr_size,
elf32_arm_eabi_attr_size, write_uleb128, write_eabi_attribute,
elf32_arm_set_eabi_attr_contents, elf32_arm_bfd_final_link,
elf32_arm_new_eabi_attr, attr_strdup, elf32_arm_add_eabi_attr_int,
elf32_arm_add_eabi_attr_compat, copy_eabi_attributes,
elf32_arm_merge_eabi_attributes): New functions.
(elf32_arm_copy_private_bfd_data): Copy EABI object attributes.
(elf32_arm_fake_sections): Handle .ARM.attributes.
(elf32_arm_parse_attributes): New function.
(elf32_arm_section_from_shdr): Use it.
(bfd_elf32_bfd_final_link): Define.
gas/
* config/tc-arm.c: Don't provide fallback default for CPU_DEFAULT.
(arm_arch_used, thumb_arch_used, selected_cpu, selected_cpu_name):
New variables.
(arm_cpu_option_table): Add canonical_name.
(arm_cpus): Populate canonical_name field.
(s_arm_eabi_attribute, s_arm_arch, s_arm_cpu, s_arm_fpu,
aeabi_set_public_attributes, arm_md_end): New functions.
(md_pseudo_table): Add "cpu", "arch", "fpu" and "eabi_attribute".
(md_assemble): Set thumb_arch_used and arm_arch_used.
(md_begin): Set defaut cpu if CPU_DEFAULT not defined.
* config/tc-arm.h (md_end): Define.
* doc/c-arm.texi: Document .cpu, .arch, .fpu and .eabi_attribute.
gas/testsuite/
* gas/arm/eabi_attr_1.s: New test.
* gas/arm/eabi_attr_1.d: New test.
* gas/arm/arm7t.d: Only disassemble code sections.
* gas/arm/bignum1.d: Ignore Arm object attribute sections.
* gas/arm/mapping.d: Ditto.
* gas/arm/unwind.d: Ditto.
* gas/elf/section0.d: Ditto.
* gas/elf/section1.d: Ditto.
* gas/elf/elf.exp: Set target_machine for Arm EABI based targets.
* gas/elf/section2.e-armeabi: New file.
include/elf/
* arm.h: Add prototypes for BFD object attribute routines.
ld/testsuite/
* ld-arm/arm-rel31.d: Ignore Arm object attribute sections.
* ld-arm/arm-target1-abs.d: Ditto.
* ld-arm/arm-target1-rel.d: Ditto.
* ld-arm/arm-target2-abs.d: Ditto.
* ld-arm/arm-target2-got-rel.d: Ditto.
* ld-arm/arm-target2-rel.d: Ditto.
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(parse_reg_without_prefix): New function.
(parse_reg): Check for '$' register prefix if --allow-reg-prefix is set.
(option md_longopts): Add allow-reg-prefix option.
* doc/c-sh.texi: Document --allow-reg-prefix option.
* NEWS: Mention the new switch.
* gas/sh/basic.exp: Run reg-prefix test.
* gas/sh/reg-prefix.s: New
* gas/sh/reg-prefix.d: New
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* Makefile.am: Run "make dep-am".
* Makefile.in: Regenerated.
* aclocal.m4: Likewise.
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* ar.c (main): Likewise.
* coffdump.c (main): Likewise.
* cxxfilt.c (main): Likewise.
* dlltool.c (main): Likewise.
* dllwrap.c (main): Likewise.
* nlmconv.c (main): Likewise.
* nm.c (main): Likewise.
* objcopy.c (main): Likewise.
* objdump.c (main): Likewise.
* readelf.c (main): Likewise.
* size.c (main): Likeiwse.
* srcconv.c (main): Likewise.
* strings.c (main): Likewise.
* sysdump.c (main): Likewise.
* sysinfo.c (main): Likewise.
* windres.c (main): Likewise.
* ldmain.c (main): Use expandargv.
* gprof.c (main): Use expandargv.
* as.c (main): Use expandargv.
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2005-09-30 Jan Beulich <jbeulich@novell.com>
* config/tc-tic4x.c (tic4x_set): Advance input_line_pointer past
(removed) comma.
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* gas/all/gas.exp (bfin-*-*): Expected failure for alternate
macro syntax.
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* Makefile.in: Regenerated.
* aclocal.m4: Regenerated.
* configure: Regenerated.
* configure.in: Bfin support.
* configure.tgt: Bfin support.
* config/bfin-aux.h: New file.
* config/bfin-defs.h: New file.
* config/bfin-lex.l: New file.
* config/bfin-parse.y: New file.
* config/tc-bfin.c: New file.
* config/tc-bfin.h: New file.
* doc/Makefile.am: Recognize c-bfin.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Bfin support.
* doc/as.texinfo: Likewise.
* doc/c-bfin.texi: Document bfin-specific syntax and
directives.
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gas/
* config/tc-arm.c (opcode_tag): Add OT_cinfix3_legacy.
(opcode_lookup): Handle OT_cinfix3_legacy. Revert earlier change for
normal infix conditions.
(C3E): Include Thumb-2 definition.
(CL, cCL): Define.
(insns): Use them for legacy mnemonics.
gas/testsuite/
* gas/arm/fpa-mem.s: Remove incorrect comments.
* gas/arm/fpa-mem.d: Update expected results.
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version of <locale.h> when ENABLE_NLS is not defined.
gprof.c (main):Only invoke bindtextdomain() and textdomain() if ENABLE_NLS is
defined.
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2005-09-29 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (parse_operands): Always parse first operand of
alloc.
gas/testsuite/
2005-09-29 Jan Beulich <jbeulich@novell.com>
* gas/ia64/alloc.[sl]: New.
* gas/ia64/ia64.exp: Run new test.
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Remove redundant EOF test in case 7.
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2005-09-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-stack.s, gas/i386/x86-64-stack.d,
gas/i386/x86-64-stack-suffix.d, gas/i386/x86-64-stack-intel.d: New.
* gas/i386/i386.exp: Run new tests.
ld/testsuite/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* ld-x86-64/tlspic.dd: Adjust.
opcodes/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
(indirEv): Use it.
(stackEv): New.
(Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
(dis386): Document and use new 'V' meta character. Use it for
single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
(putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
data prefix as used whenever DFLAG was examined. Handle 'V'.
(intel_operand_size): Use stack_v_mode.
(OP_E): Use stack_v_mode, but handle only the special case of
64-bit mode without operand size override here; fall through to
v_mode case otherwise.
(OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
and no operand size override is present.
(OP_J): Use get32s for obtaining the displacement also when rex64
is present.
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2005-09-28 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (reloc): Disable signedness check for 4-byte
relocations in 16- and 32-bit modes.
(i386_displacement): Make pc-relative branch handling dependent
upon operand (rather than address) size.
gas/testsuite/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/mixed-mode-reloc.s: Enable all insns.
* gas/i386/mixed-mode-reloc32.d: Adjust.
* gas/i386/mixed-mode-reloc64.d: Adjust.
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2005-09-28 Jan Beulich <jbeulich@novell.com>
* dw2gencfi.c (dot_cfi): Call ignore_rest_of_line when not fully
parsing the input.
(dot_cfi_startproc): Likewise.
(dot_cfi_endproc): Likewise. Also check no extra input was given.
(dot_cfi_escape): Likewise.
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2005-09-28 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.h (x86_cons_fix_new): Declare unconditionally.
(TC_CONS_FIX_NEW): Define unconditionally.
(x86_pe_cons_fix_new): Remove.
* config/tc-i386.c (signed_cons): New.
(md_pseudo_table): Add slong.
(x86_cons_fix_new): Declare unconditionally.
(x86_pe_cons_fix_new): Merge into x86_cons_fix_new.
(tc_gen_reloc): Also consider BFD_RELOC_X86_64_32S for gotpc
conversion.
gas/testsuite/
2005-09-28 Jan Beulich <jbeulich@novell.com>
* gas/i386/reloc64.s: Also test .slong.
* gas/i386/reloc64.l: Adjust.
* gas/i386/reloc64.d: Adjust.
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buffer after copying string.
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* config/arm.c (arm_cpus): Add more cpu names.
* doc/c-arm.texi: Document them.
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a bare nop insn.
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with label.
(dwarf2_loc_mark_labels): New.
(dwarf2_gen_line_info_1): Split out of ...
(dwarf2_gen_line_info): ... here. Create the temp symbol here.
(dwarf2_emit_label): New.
(dwarf2_directive_loc_mark_labels): New.
(out_set_addr): Take a symbol instead of frag+ofs.
(relax_inc_line_addr): Likewise.
(emit_inc_line_addr): Assert delta non-negative.
(process_entries): Remove dead code. Update to work with temp
symbols instead of frag+ofs.
* dwarf2dbg.h (dwarf2_directive_loc_mark_labels): Declare.
(dwarf2_emit_label, dwarf2_loc_mark_labels): Declare.
* config/obj-elf.c (elf_pseudo_tab): Add loc_mark_labels.
* config/obj-elf.h (obj_frob_label): New.
* config/tc-alpha.c (alpha_define_label): Call dwarf2_emit_label.
* config/tc-arm.c, config/tc-hppa.c, config/tc-m68k.c,
config/tc-mips.c, config/tc-ppc.c, config/tc-sh.c, config/tc-xtensa.c:
Similarly in the respective tc_frob_label implementation functions.
* config/tc-i386.c (md_pseudo_table): Move file and loc to
non-elf section; add loc_mark_labels.
* config/tc-ia64.c (struct label_fix): Add dw2_mark_labels.
(ia64_flush_insns): Check for marked labels; emit line entry if so.
(emit_one_bundle): Similarly.
(ia64_frob_label): Record marked labels.
* config/tc-m68hc11.h (tc_frob_label): Remove.
* config/tc-ms1.c (md_pseudo_table): Remove file and loc.
* config/tc-sh.h (tc_frob_label): Pass sym to sh_frob_label.
* config/tc-sh64.h (tc_frob_label): Likewise.
* doc/as.texinfo (LNS directives): Docuement .loc_mark_blocks.
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gas/cris/rd-dw2-12.d, gas/cris/rd-dw2-13.d, gas/cris/rd-dw2-14.d,
gas/cris/rd-dw2-15.d, gas/cris/rd-dw2-2.d, gas/cris/rd-dw2-3.d,
gas/cris/rd-dw2-4.d, gas/cris/rd-dw2-5.d, gas/cris/rd-dw2-6.d,
gas/cris/rd-dw2-7.d, gas/cris/rd-dw2-8.d, gas/cris/rd-dw2-9.d,
gas/mips/mips16-dwarf2-n32.d, gas/mips/mips16-dwarf2.d: Add 0x
prefix in "Advance PC" lines.
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2005-09-14 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (tc_x86_regname_to_dw2regnum): Add selector
registers, floating point control and status words, and mxcsr as
well as (for 64-bit code) segment base registers and rflags.
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* config/tc-msp430.c (msp430_operands): Undo last changes. Instead...
(msp430_relax_frag): add a guard check to ensure that final fr_subtype
has been reached.
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* doc/c-mips.texi: Likewise, and document ".set dsp" and ".set nodsp"
directives.
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bfd/
* reloc.c: Rename BFD_RELOC_ARM_SMI to BFD_RELOC_ARM_SMC.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
opcodes/
* arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
gas/
* config/tc-arm.c (do_smi, do_t_smi): Rename ...
(do_smc, do_t_smc): ... to this.
(insns): Remane smi to smc.
(md_apply_fix, tc_gen_reloc): Rename BFD_RELOC_ARM_SMI to
BFD_RELOC_ARM_SMC.
gas/testsuite/
* gas/arm/arch6zk.d: Rename smi to smc.
* gas/arm/arch6zk.s: Ditto.
* gas/arm/thumb32.d: Ditto.
* gas/arm/thumb32.s: Ditto.
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(dwarf2_set_isa): New.
(dwarf2_directive_loc): Rearrange to allow all options on one line.
* dwarf2dbg.h (dwarf2_set_isa): Declare.
* doc/as.texinfo: Update .loc documentation.
* gas/lns/lns-common-1.d: Don't match header or special opcode numbers.
* gas/lns/lns-common-1.s: Update for syntax change.
* gas/lns/lns-diag-1.[sl]: Likewise.
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number increments. Adjust relocation address.
* gas/mips/mips16-dwarf2-n32.d: Likewise. Add "N32" to test name.
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number increments.
* gas/cris/rd-dw2-10.d, gas/cris/rd-dw2-11.d, gas/cris/rd-dw2-12.d,
gas/cris/rd-dw2-13.d, gas/cris/rd-dw2-14.d, gas/cris/rd-dw2-15.d,
gas/cris/rd-dw2-2.d, gas/cris/rd-dw2-3.d, gas/cris/rd-dw2-4.d,
gas/cris/rd-dw2-5.d, gas/cris/rd-dw2-6.d, gas/cris/rd-dw2-7.d,
gas/cris/rd-dw2-8.d, gas/cris/rd-dw2-9.d: Likewise.
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(DWARF2_LINE_OPCODE_BASE): Bump to 13.
(current): Initialize.
(dwarf2_emit_insn): Clear DWARF2_FLAG_BASIC_BLOCK,
DWARF2_FLAG_PROLOGUE_END, DWARF2_FLAG_EPILOGUE_BEGIN.
(dwarf2_directive_file): Cope with invalid filename.
(dwarf2_directive_loc): Add handling for basic_block, prologue_end,
epilogue_begin, is_stmt, isa.
(emit_inc_line_addr): Move line_delta == 0, addr_delta == 0 special
case down lower.
(process_entries): Handle isa, DWARF2_FLAG_PROLOGUE_END,
and DWARF2_FLAG_EPILOGUE_BEGIN.
(out_debug_line): Emit sizes for DW_LNS_set_prologue_end,
DW_LNS_set_epilogue_begin, DW_LNS_set_isa.
* dwarf2dbg.h (DWARF2_FLAG_IS_STMT): Rename from DWARF2_FLAG_BEGIN_STMT. (DWARF2_FLAG_BASIC_BLOCK): Rename from DWARF2_FLAG_BEGIN_BLOCK.
(DWARF2_FLAG_PROLOGUE_END, DWARF2_FLAG_EPILOGUE_BEGIN): New.
(struct dwarf2_line_info): Add isa member.
* doc/as.texinfo (LNS directives): New node.
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guard to suppress calling frag_grow if the current instruction is
one that allows a delay slot.
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* gas/mips/mips32-mt.[sdl]: New test.
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(mips_opts): Add -1 to initialize ase_mt.
(file_ase_mt): New variable for -mmt.
(CPU_HAS_MT): New define.
(validate_mips_insn): Add supports for +t, +T, !, $, *, &, g operand
formats.
(mips_ip): Check ase_mt to enable MT instructions.
Handle !, $, *, &, +T, +t, g operand formats.
For "mftc1", "mfthc1", "cftc1", "mttc1", "mtthc1", "cttc1", we allow
odd float registers.
(OPTION_MT, OPTION_NO_MT): New define.
(OPTION_COMPAT_ARCH_BASE): Change because of inserting MT define.
(md_parse_option): Parse OPTION_MT and OPTION_NO_MT.
(mips_after_parse_args): Set ase_mt based on CPU.
(s_mipsset): Handle ".set mt" and ".set nomt".
(mips_elf_final_processing): Remind of adding new flag for MT ASE.
(md_show_usage): Show usage of -mmt and -mno-mt.
* doc/as.texinfo: Document -mmt and -mno-mt options.
* doc/c-mips.texi: Likewise, and document ".set mt" and ".set nomt"
directives.
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gas/
* config/tc-arm.c (arm_it): Add relax field.
(T16_32_TAB): Add addi, addis, add_pc, add_sp, dec_sp, inc_sp,
b, bcond, ldr_pc, ldr_pc2, ldr_sp, str_sp, subi, subis.
(do_t_add_sub, do_t_addr, do_t_branch, do_t_ldst,
do_t_mov_cmp): Allow relaxation.
(output_relax_insn): New function.
(put_thumb32_insn): New function.
(output_inst): Use new functions.
(md_assemble): Don't throw error on relaxable instructions.
(insns): Change "b" entry from TCE(...) to tCE(...).
(md_estimate_size_before_relax): Return 2.
(md_convert_frag, relax_immediate, relax_adr, relax_addsub,
relax_branch, arm_relax_frag): New functions.
(arm_force_relocation): Return 0 for Thumb-2 immediate operand
relocations.
* config/tc-arm.h (md_convert_frag): Remove definition.
(md_relax_frag): Define.
(arm_relax_frag): Add prototype.
gas/testsuite/
* gas/arm/thumb2_relax.d: New test.
* gas/arm/thumb2_relax.s: New test.
* gas/arm/thumb32.d: Adjust expected results to include relaxation.
* gas/arm/thumb32.s: Tweak for better coverage of relaxable
instructions. Remove load/store tests.
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gas/
* config/tc-arm.c (do_rn_rd): Enforce SWP operand constraints.
gas/testsuite/
* gas/arm/arm3-bad.s: New test.
* gas/arm/arm3-bad.d: New test.
* gas/arm/arm3.s: Avoid illegal instructions.
* gas/arm/arm3.d: Ditto.
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bfd/
* libbdf.h: Regenerate.
* bfd-in2.h: Regenerate.
* reloc.c: Add BFD_RELOC_ARM_T32_CP_OFF_IMM and
BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/
* config/tc-arm.c (encode_arm_cp_address): Use
BFD_RELOC_ARM_T32_CP_OFF_IMM in thumb mode.
(do_iwmmxt_wldstbh): Use BFD_RELOC_ARM_T32_CP_OFF_IMM_S2 in thumb
mode.
(md_assemble): Only allow coprocessor instructions when Thumb-2 is
available.
(cCE, cC3): Define.
(insns): Use them for coprocessor instructions.
(md_pcrel_from_section): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM.
(get_thumb32_insn): New function.
(put_thumb32_insn): New function.
(md_apply_fix): Handle BFD_RELOC_ARM_T32_CP_OFF_IMM and
BFD_RELOC_ARM_T32_CP_OFF_IMM_S2.
gas/testsuite/
* gas/arm/vfp-bad_t2.d, gas/arm/vfp-bad_t2.l, arm/vfp-bad_t2.s,
gas/arm/vfp1_t2.d, gas/arm/vfp1_t2.s, gas/arm/vfp1xD_t2.d,
gas/arm/vfp1xD_t2.s, gas/arm/vfp2_t2.d, gas/arm/vfp2_t2.s): New files.
opcodes/
* arm-dis.c (coprocessor_opcodes): New.
(arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
(print_insn_coprocessor): New function.
(print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
format characters.
(print_insn_thumb32): Use print_insn_coprocessor.
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gas/
* config/tc-arm.c (opcode_lookup): Look for infix opcode when
incorrect suffix matches.
gas/testsuite/
* gas/arm/fpa-mem.d: Test "stfpls".
* gas/arm/fpa-mem.s: Ditto.
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when the frags are different for the 2 instructions we want to
swap. If the lengths of the 2 instructions are not the same, we
won't do the swap but emit an nop.
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* config/tc-msp430.c (msp430_operands): Emit dwarf2_emit_insn()
as appropriate. Change frag_variant() to frag_var() for relaxes.
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cris-axis-linux-gnu.
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