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* Update year range in copyright notice of all files.Alan Modra2017-01-02320-319/+323
* ChangeLog rotationAlan Modra2017-01-022-822/+836
* MIPS16: Add ASMACRO instruction supportMaciej W. Rozycki2016-12-232-2/+13
* MIPS16: Reassign `0' and `4' operand codesMaciej W. Rozycki2016-12-232-5/+10
* MIPS16: Handle non-extensible instructions correctlyMaciej W. Rozycki2016-12-232-0/+8
* Remove high bit set charactersAlan Modra2016-12-213-9/+14
* MIPS16: Switch to 32-bit opcode table interpretationMaciej W. Rozycki2016-12-202-0/+12
* Re-work RISC-V gas flags: now we just support -mabi and -marchAndrew Waterman2016-12-202-2/+21
* Rework RISC-V relocationsAndrew Waterman2016-12-202-0/+13
* Implement and document --gc-keep-exportedfincs2016-12-162-0/+7
* MIPS/opcodes: Also set disassembler's ASE flags from ELF structuresMaciej W. Rozycki2016-12-142-1/+6
* [Binutils][AARCH64]Remove Cn register for coprocessor CRn, CRm fieldRenlin Li2016-12-132-3/+11
* MIPS16: Remove unused `>' operand codeMaciej W. Rozycki2016-12-092-2/+5
* MIPS/include: opcode/mips.h: Correct INSN_CHIP_MASKMaciej W. Rozycki2016-12-072-1/+5
* MIPS/include: opcode/mips.h: Add a comment for ASE_DSPR3Maciej W. Rozycki2016-12-072-0/+5
* [ARM] Add ARMv8.3 command line option and feature flagSzabolcs Nagy2016-12-052-0/+9
* [ARC] Add checking for LP_COUNT reg usage, improve error reporting.Claudiu Zissulescu2016-11-292-0/+10
* gas,opcodes: fix hardware capabilities bumping in the sparc assembler.Jose E. Marchesi2016-11-222-0/+9
* PR20744, Incorrect PowerPC VLE relocsAlan Modra2016-11-222-0/+22
* libiberty: Add Rust symbol demangling.David Tolnay2016-11-182-2/+39
* Implement P0012R1, Make exception specifications part of the type system.Jason Merrill2016-11-182-1/+8
* [AArch64] Add ARMv8.3 FCMLA and FCADD instructionsSzabolcs Nagy2016-11-182-0/+11
* [AArch64] Add ARMv8.3 combined pointer authentication load instructionsSzabolcs Nagy2016-11-182-0/+7
* [AArch64] Add ARMv8.3 PACGA instructionSzabolcs Nagy2016-11-112-0/+5
* [AArch64] Add ARMv8.3 command line option and feature flagSzabolcs Nagy2016-11-112-14/+13
* Commit missing ChangeLog entry for Cortex-M33 supportThomas Preud'homme2016-11-041-0/+6
* Add support for ARM Cortex-M33 processorThomas Preud'homme2016-11-041-0/+4
* arc: Implement NPS-400 dcmac instructionGraham Markall2016-11-032-0/+5
* arc: Change max instruction length to 64-bitsAndrew Burgess2016-11-032-28/+15
* opcodes/arc: Make some macros 64-bit safeGraham Markall2016-11-032-26/+32
* arc: Replace ARC_SHORT macro with arc_opcode_len functionGraham Markall2016-11-032-4/+8
* Add support for RISC-V architecture.Nick Clifton2016-11-015-0/+1606
* Update list of ELF machine numbers.Nick Clifton2016-10-172-2/+41
* FINAL/OVERRIDE: Define to empty on g++ < 4.7Pedro Alves2016-10-142-5/+24
* Move OVERRIDE/FINAL from gcc/coretypes.h to include/ansidecl.hPedro Alves2016-10-142-6/+27
* [ARC] Disassembler: fix LIMM detection for short instructions.Claudiu Zissulescu2016-10-142-0/+5
* Disallow 3-operand cmp[l][i] for ppc64Alan Modra2016-09-292-0/+8
* [ARC] ISA alignment.Claudiu Zissulescu2016-09-262-1/+7
* PowerPC .gnu.attributesAlan Modra2016-09-262-5/+16
* [AArch64] Add SVE condition codesRichard Sandiford2016-09-212-1/+5
* [AArch64][SVE 31/32] Add SVE instructionsRichard Sandiford2016-09-212-0/+20
* [AArch64][SVE 30/32] Add SVE instruction classesRichard Sandiford2016-09-212-0/+19
* [AArch64][SVE 29/32] Add new SVE core & FP register operandsRichard Sandiford2016-09-212-0/+12
* [AArch64][SVE 28/32] Add SVE FP immediate operandsRichard Sandiford2016-09-212-0/+10
* [AArch64][SVE 27/32] Add SVE integer immediate operandsRichard Sandiford2016-09-212-0/+35
* [AArch64][SVE 26/32] Add SVE MUL VL addressing modesRichard Sandiford2016-09-212-0/+15
* [AArch64][SVE 25/32] Add support for SVE addressing modesRichard Sandiford2016-09-212-0/+59
* [AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALEDRichard Sandiford2016-09-212-1/+11
* [AArch64][SVE 23/32] Add SVE pattern and prfop operandsRichard Sandiford2016-09-212-0/+12
* [AArch64][SVE 22/32] Add qualifiers for merging and zeroing predicationRichard Sandiford2016-09-212-0/+8