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* This commit was manufactured by cvs2svn to create branchcagney_offbyone-20030303-branchpointnobody2003-03-033-3/+18
* This commit was manufactured by cvs2svn to create branchinterps-20030202-branchpointnobody2003-02-022-23/+6
* Add support for -m option. Fix PR gdb/433.Andrew Cagney2002-09-272-2/+25
* oops - fix typo in previous deltaNick Clifton2002-08-161-2/+2
* Catch and ignore SWIs of -1, they can be caused by an interrupted systemNick Clifton2002-08-152-0/+19
* Add checks to catch invaliud XScale MIA, MIAPH and MIAxy instructions.Nick Clifton2002-07-052-68/+79
* Set correct value for ADP_Stopped_RunTimeErrorNick Clifton2002-06-212-40/+41
* Import current --enable-gdb-build-warnings.Andrew Cagney2002-06-162-0/+6
* Add the file include/gdb/sim-arm.h defining an enum that specifies theAndrew Cagney2002-06-123-12/+91
* Move include/callback.h and include/remote-sim.h to include/gdb/.Andrew Cagney2002-06-093-3/+8
* Set the FSR and FAR registers if a Data Abort is detected.Nick Clifton2002-05-292-1/+13
* Only perform access checks if 'check' is set.Nick Clifton2002-05-277-18/+25
* Thumb BL instruction: Do not set LR to pc + 2, it has already been advanced.Nick Clifton2002-05-272-4/+11
* When decoding a BLX(1) instruction do not add in the second bit of the baseNick Clifton2002-05-232-5/+8
* Simulate XScale BCUMOD registerNick Clifton2002-05-212-3/+15
* Add support for target specific command line switches to old-style simualtors.Nick Clifton2002-05-205-250/+464
* Uses sim callback interface for system calls in RedBoot SWI support.Nick Clifton2002-05-091-8/+13
* Support the RedBoot SWI in ARM mode and some of its system calls.Nick Clifton2002-05-092-30/+109
* Increase default memory size to 8MB.Anthony Green2002-03-182-1/+5
* * armos.c (SWIWrite0): Use generic host_callback mechanismKeith Seitz2002-02-212-31/+50
* Modify previous patch so that it is only triggered for COFF format executables.Nick Clifton2002-02-052-11/+20
* If a v5 architecture is detected, assume it might be an XScale binary, sinceNick Clifton2002-02-042-0/+15
* Fix parameters passed to CPRead[13] and CPRead[14].Nick Clifton2002-01-104-423/+478
* General format tidy upsNick Clifton2002-01-092-45/+51
* Fix bug detected by GDB testsuite - when fetching registers more than 4Nick Clifton2002-01-092-5/+19
* 2001-11-16 Ben Harris <bjh21@netbsd.org>Ben Harris2001-11-162-2/+8
* Add support for XScale's coprocessor access check register.Nick Clifton2001-10-185-988/+944
* Fix handling of XScale LDRD and STRD instructions with post indexed addressin...Nick Clifton2001-05-112-6/+11
* Check Mode not Bank in order to determine rocesor mode.Nick Clifton2001-05-082-1/+7
* * XScale coprocessor support.Matthew Green2001-04-186-22/+284
* Do not enable alignment checking when loading unaligned thumb instructions.Nick Clifton2001-03-202-2/+7
* Fix BLX(1) for ThumbNick Clifton2001-03-062-5/+24
* Add support for disabling alignment checks when performing GDB interfaceNick Clifton2001-02-288-44/+95
* Remove Prefetch abort for breakpoints. Instead set the state to RESUME.Nick Clifton2001-02-162-12/+7
* Add code to preserve processor mode when a prefetchNick Clifton2001-02-152-0/+14
* Reset processor into ARM mode for any machine type except the early ARMs.Nick Clifton2001-02-142-12/+20
* remove spurious whitespaceNick Clifton2001-02-141-6/+6
* Prevent Aborts from happening whilst emulating a SWINick Clifton2001-02-142-62/+83
* Fix definition of NEGBRANCHNick Clifton2001-02-122-1/+6
* Add parentheses ready for future conbtributionNick Clifton2001-02-011-39/+63
* Update base address register after restoring register bank.Nick Clifton2001-02-012-26/+64
* Detect installation of SWI vector by running program as well as loading program.Nick Clifton2001-02-015-7/+18
* Fix test for StoreDouble Instruction.Nick Clifton2000-12-192-12/+17
* Add 0x91 as an FPE SWI.Nick Clifton2000-12-112-0/+5
* oops - remove redundant prototype introduced in previous deltaNick Clifton2000-12-081-2/+0
* Add emulation of double word load and store instructions.Nick Clifton2000-12-082-3/+348
* Suppress support of DEMON swi's in XScale mode.Nick Clifton2000-12-032-71/+109
* Add support for ARM's v5TE architecture and Intel's XScale extenstionsNick Clifton2000-11-3010-250/+1763
* Replace StrongARM property with v4 and v5 properties.Nick Clifton2000-09-156-90/+119
* Compute write back value for post increment loads beforeNick Clifton2000-08-152-34/+47
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