From 39cc5fc44cc24ac002f6622c5c2bb88b63fa700b Mon Sep 17 00:00:00 2001 From: John Baldwin Date: Wed, 18 Mar 2020 16:40:35 -0700 Subject: Handle JALR.CAP in riscv_next_pc(). This fixes stepping into some functions in purecap. --- gdb/riscv-tdep.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/gdb/riscv-tdep.c b/gdb/riscv-tdep.c index 49f6fe8cb8c..f7da7165056 100644 --- a/gdb/riscv-tdep.c +++ b/gdb/riscv-tdep.c @@ -1570,6 +1570,7 @@ public: BGE, BLTU, BGEU, + JALR_CAP, /* These are needed for stepping over atomic sequences. */ LR, SC, @@ -1866,6 +1867,8 @@ riscv_insn::decode (struct gdbarch *gdbarch, CORE_ADDR pc) decode_b_type_insn (BLTU, ival); else if (is_bgeu_insn (ival)) decode_b_type_insn (BGEU, ival); + else if (is_jalr_cap_insn (ival)) + decode_r_type_insn (JALR_CAP, ival); else if (is_lr_w_insn (ival)) decode_r_type_insn (LR, ival); else if (is_lr_d_insn (ival)) @@ -4178,6 +4181,13 @@ riscv_next_pc (struct regcache *regcache, CORE_ADDR pc) if (tdep->syscall_next_pc != nullptr) next_pc = tdep->syscall_next_pc (get_current_frame ()); } + else if (insn.opcode () == riscv_insn::JALR_CAP && riscv_has_cheri (gdbarch)) + { + gdb_byte source[register_size (gdbarch, RISCV_CNULL_REGNUM)]; + regcache->cooked_read (RISCV_CNULL_REGNUM + insn.rs1 (), source); + next_pc = extract_unsigned_integer (source, riscv_isa_xlen (gdbarch), + gdbarch_byte_order (gdbarch)); + } return next_pc; } -- cgit v1.2.1