From 07d6d2b8345ef3dc82eab49635acac9ee67dbb18 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Wed, 6 Dec 2017 09:26:00 +1030 Subject: BFD whitespace fixes Binutils is supposed to use tabs. In my git config I have whitespace = indent-with-non-tab,space-before-tab,trailing-space and I got annoyed enough seeing red in "git diff" output to fix the problems. * doc/header.sed: Trim trailing space when splitting lines. * aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aout-tic30.c, * aoutf1.h, * aoutx.h, * arc-got.h, * arc-plt.def, * arc-plt.h, * archive.c, * archive64.c, * archures.c, * armnetbsd.c, * bfd-in.h, * bfd.c, * bfdio.c, * binary.c, * bout.c, * cache.c, * cisco-core.c, * coff-alpha.c, * coff-apollo.c, * coff-arm.c, * coff-h8300.c, * coff-i386.c, * coff-i860.c, * coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mcore.c, * coff-mips.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * coffswap.h, * compress.c, * corefile.c, * cpu-alpha.c, * cpu-arm.c, * cpu-avr.c, * cpu-bfin.c, * cpu-cr16.c, * cpu-cr16c.c, * cpu-crx.c, * cpu-d10v.c, * cpu-frv.c, * cpu-ft32.c, * cpu-i370.c, * cpu-i960.c, * cpu-ia64-opc.c, * cpu-ip2k.c, * cpu-lm32.c, * cpu-m32r.c, * cpu-mcore.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-moxie.c, * cpu-mt.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-sh.c, * cpu-spu.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-xgate.c, * cpu-z80.c, * dwarf1.c, * dwarf2.c, * ecoff.c, * ecofflink.c, * ecoffswap.h, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-m10200.c, * elf-m10300.c, * elf-s390-common.c, * elf-strtab.c, * elf-vxworks.c, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-i860.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nds32.h, * elf32-nios2.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-symbian.c, * elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilegx.h, * elf32-tilepro.c, * elf32-tilepro.h, * elf32-v850.c, * elf32-vax.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xgate.h, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-tilegx.h, * elf64-x86-64.c, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * elfxx-x86.h, * freebsd.h, * hash.c, * host-aout.c, * hp300hpux.c, * hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386linux.c, * i386lynx.c, * i386mach3.c, * i386msdos.c, * i386netbsd.c, * ieee.c, * ihex.c, * irix-core.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libnlm.h, * libpei.h, * libxcoff.h, * linker.c, * lynx-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c, * m88kmach3.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-target.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mipsbsd.c, * mmo.c, * netbsd.h, * netbsd-core.c, * newsos3.c, * nlm-target.h, * nlm32-ppc.c, * nlm32-sparc.c, * nlmcode.h, * ns32k.h, * ns32knetbsd.c, * oasys.c, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pef.h, * pei-arm.c, * pei-i386.c, * pei-mcore.c, * pei-x86_64.c, * peicode.h, * plugin.c, * ppcboot.c, * ptrace-core.c, * reloc.c, * riscix.c, * rs6000-core.c, * section.c, * som.c, * som.h, * sparclinux.c, * sparcnetbsd.c, * srec.c, * stabs.c, * sunos.c, * syms.c, * targets.c, * tekhex.c, * trad-core.c, * vax1knetbsd.c, * vaxnetbsd.c, * verilog.c, * versados.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * wasm-module.c, * wasm-module.h, * xcofflink.c, * xsym.c, * xsym.h: Whitespace fixes. * bfd-in2.h, * libbfd.h, * libcoff.h: Regenerate. --- bfd/coff-arm.c | 362 ++++++++++++++++++++++++++++----------------------------- 1 file changed, 181 insertions(+), 181 deletions(-) (limited to 'bfd/coff-arm.c') diff --git a/bfd/coff-arm.c b/bfd/coff-arm.c index 1e66cbcaf81..79d4d9cefa0 100644 --- a/bfd/coff-arm.c +++ b/bfd/coff-arm.c @@ -180,14 +180,14 @@ coff_arm_reloc (bfd *abfd, #else -#define ARM_8 0 -#define ARM_16 1 -#define ARM_32 2 -#define ARM_26 3 +#define ARM_8 0 +#define ARM_16 1 +#define ARM_32 2 +#define ARM_26 3 #define ARM_DISP8 4 #define ARM_DISP16 5 #define ARM_DISP32 6 -#define ARM_26D 7 +#define ARM_26D 7 /* 8 is unused. */ #define ARM_NEG16 9 #define ARM_NEG32 10 @@ -223,7 +223,7 @@ static reloc_howto_type aoutarm_std_reloc_howto[] = complain_overflow_dont, aoutarm_fix_pcrel_26_done, "ARM_26D", - TRUE, /* partial_inplace. */ + TRUE, /* partial_inplace. */ 0x00ffffff, 0x0, PCRELOFFSET), @@ -236,7 +236,7 @@ static reloc_howto_type aoutarm_std_reloc_howto[] = complain_overflow_bitfield, coff_arm_reloc, "ARM_32", - TRUE, /* partial_inplace. */ + TRUE, /* partial_inplace. */ 0xffffffff, 0xffffffff, PCRELOFFSET), @@ -249,7 +249,7 @@ static reloc_howto_type aoutarm_std_reloc_howto[] = complain_overflow_bitfield, coff_arm_reloc, "ARM_RVA32", - TRUE, /* partial_inplace. */ + TRUE, /* partial_inplace. */ 0xffffffff, 0xffffffff, PCRELOFFSET), @@ -297,7 +297,7 @@ static reloc_howto_type aoutarm_std_reloc_howto[] = complain_overflow_bitfield, coff_arm_reloc, "ARM_SECTION", - TRUE, /* partial_inplace. */ + TRUE, /* partial_inplace. */ 0x0000ffff, 0x0000ffff, PCRELOFFSET), @@ -310,7 +310,7 @@ static reloc_howto_type aoutarm_std_reloc_howto[] = complain_overflow_bitfield, coff_arm_reloc, "ARM_SECREL", - TRUE, /* partial_inplace. */ + TRUE, /* partial_inplace. */ 0xffffffff, 0xffffffff, PCRELOFFSET), @@ -781,7 +781,7 @@ coff_thumb_pcrel_23 (bfd *abfd, char **error_message) { return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, - input_section, output_bfd, error_message, + input_section, output_bfd, error_message, b23); } @@ -795,7 +795,7 @@ coff_thumb_pcrel_9 (bfd *abfd, char **error_message) { return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, - input_section, output_bfd, error_message, + input_section, output_bfd, error_message, b9); } #endif /* not ARM_WINCE */ @@ -810,7 +810,7 @@ coff_thumb_pcrel_12 (bfd *abfd, char **error_message) { return coff_thumb_pcrel_common (abfd, reloc_entry, symbol, data, - input_section, output_bfd, error_message, + input_section, output_bfd, error_message, b12); } @@ -823,8 +823,8 @@ coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code) switch (bfd_arch_bits_per_address (abfd)) { case 32: - code = BFD_RELOC_32; - break; + code = BFD_RELOC_32; + break; default: return NULL; } @@ -832,25 +832,25 @@ coff_arm_reloc_type_lookup (bfd * abfd, bfd_reloc_code_real_type code) switch (code) { #ifdef ARM_WINCE - ASTD (BFD_RELOC_32, ARM_32); - ASTD (BFD_RELOC_RVA, ARM_RVA32); - ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26); + ASTD (BFD_RELOC_32, ARM_32); + ASTD (BFD_RELOC_RVA, ARM_RVA32); + ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26); ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12); - ASTD (BFD_RELOC_32_SECREL, ARM_SECREL); + ASTD (BFD_RELOC_32_SECREL, ARM_SECREL); #else - ASTD (BFD_RELOC_8, ARM_8); - ASTD (BFD_RELOC_16, ARM_16); - ASTD (BFD_RELOC_32, ARM_32); - ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26); - ASTD (BFD_RELOC_ARM_PCREL_BLX, ARM_26); - ASTD (BFD_RELOC_8_PCREL, ARM_DISP8); - ASTD (BFD_RELOC_16_PCREL, ARM_DISP16); - ASTD (BFD_RELOC_32_PCREL, ARM_DISP32); - ASTD (BFD_RELOC_RVA, ARM_RVA32); + ASTD (BFD_RELOC_8, ARM_8); + ASTD (BFD_RELOC_16, ARM_16); + ASTD (BFD_RELOC_32, ARM_32); + ASTD (BFD_RELOC_ARM_PCREL_BRANCH, ARM_26); + ASTD (BFD_RELOC_ARM_PCREL_BLX, ARM_26); + ASTD (BFD_RELOC_8_PCREL, ARM_DISP8); + ASTD (BFD_RELOC_16_PCREL, ARM_DISP16); + ASTD (BFD_RELOC_32_PCREL, ARM_DISP32); + ASTD (BFD_RELOC_RVA, ARM_RVA32); ASTD (BFD_RELOC_THUMB_PCREL_BRANCH9, ARM_THUMB9); ASTD (BFD_RELOC_THUMB_PCREL_BRANCH12, ARM_THUMB12); ASTD (BFD_RELOC_THUMB_PCREL_BRANCH23, ARM_THUMB23); - ASTD (BFD_RELOC_THUMB_PCREL_BLX, ARM_THUMB23); + ASTD (BFD_RELOC_THUMB_PCREL_BLX, ARM_THUMB23); #endif default: return NULL; } @@ -874,12 +874,12 @@ coff_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, } #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER 2 -#define COFF_PAGE_SIZE 0x1000 +#define COFF_PAGE_SIZE 0x1000 /* Turn a howto into a reloc nunmber. */ #define SELECT_RELOC(x,howto) { x.r_type = howto->type; } -#define BADMAG(x) ARMBADMAG(x) -#define ARM 1 /* Customize coffcode.h. */ +#define BADMAG(x) ARMBADMAG(x) +#define ARM 1 /* Customize coffcode.h. */ #ifndef ARM_WINCE /* Make sure that the 'r_offset' field is copied properly @@ -906,7 +906,7 @@ struct coff_arm_link_hash_table bfd * bfd_of_glue_owner; /* Support interworking with old, non-interworking aware ARM code. */ - int support_old_code; + int support_old_code; }; /* Get the ARM coff linker hash table from a link_info structure. */ @@ -997,8 +997,8 @@ insert_thumb_branch (insn32 br_insn, int rel_off) BFD_ASSERT ((rel_off & 1) != 1); - rel_off >>= 1; /* Half word aligned address. */ - low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */ + rel_off >>= 1; /* Half word aligned address. */ + low_bits = rel_off & 0x000007FF; /* The bottom 11 bits. */ high_bits = (rel_off >> 11) & 0x000007FF; /* The top 11 bits. */ if ((br_insn & LOW_HI_ORDER) == LOW_HI_ORDER) @@ -1079,7 +1079,7 @@ find_arm_glue (struct bfd_link_info *info, ldr r12, __func_addr bx r12 __func_addr: - .word func @ behave as if you saw a ARM_32 reloc + .word func @ behave as if you saw a ARM_32 reloc */ #define ARM2THUMB_GLUE_SIZE 12 @@ -1097,12 +1097,12 @@ static const insn32 a2t3_func_addr_insn = 0x00000001; nop ldr r6, __func_addr .arm mov lr, pc __func_change_to_arm: bx r6 - b func .arm + b func .arm __func_back_to_thumb: - ldmia r13! {r6, lr} - bx lr - __func_addr: - .word func + ldmia r13! {r6, lr} + bx lr + __func_addr: + .word func */ #define THUMB2ARM_GLUE_SIZE (globals->support_old_code ? 20 : 8) @@ -1181,15 +1181,15 @@ coff_arm_relocate_section (bfd *output_bfd, for (; rel < relend; rel++) { - int done = 0; - long symndx; + int done = 0; + long symndx; struct coff_link_hash_entry * h; - struct internal_syment * sym; - bfd_vma addend; - bfd_vma val; - reloc_howto_type * howto; - bfd_reloc_status_type rstat; - bfd_vma h_val; + struct internal_syment * sym; + bfd_vma addend; + bfd_vma val; + reloc_howto_type * howto; + bfd_reloc_status_type rstat; + bfd_vma h_val; symndx = rel->r_symndx; @@ -1205,9 +1205,9 @@ coff_arm_relocate_section (bfd *output_bfd, } /* COFF treats common symbols in one of two ways. Either the - size of the symbol is included in the section contents, or it - is not. We assume that the size is not included, and force - the rtype_to_howto function to adjust the addend as needed. */ + size of the symbol is included in the section contents, or it + is not. We assume that the size is not included, and force + the rtype_to_howto function to adjust the addend as needed. */ if (sym != NULL && sym->n_scnum != 0) addend = - sym->n_value; @@ -1220,42 +1220,42 @@ coff_arm_relocate_section (bfd *output_bfd, return FALSE; /* The relocation_section function will skip pcrel_offset relocs - when doing a relocatable link. However, we want to convert - ARM_26 to ARM_26D relocs if possible. We return a fake howto in - this case without pcrel_offset set, and adjust the addend to - compensate. 'partial_inplace' is also set, since we want 'done' - relocations to be reflected in section's data. */ + when doing a relocatable link. However, we want to convert + ARM_26 to ARM_26D relocs if possible. We return a fake howto in + this case without pcrel_offset set, and adjust the addend to + compensate. 'partial_inplace' is also set, since we want 'done' + relocations to be reflected in section's data. */ if (rel->r_type == ARM_26 - && h != NULL - && bfd_link_relocatable (info) - && (h->root.type == bfd_link_hash_defined + && h != NULL + && bfd_link_relocatable (info) + && (h->root.type == bfd_link_hash_defined || h->root.type == bfd_link_hash_defweak) - && (h->root.u.def.section->output_section + && (h->root.u.def.section->output_section == input_section->output_section)) - { - static reloc_howto_type fake_arm26_reloc = + { + static reloc_howto_type fake_arm26_reloc = HOWTO (ARM_26, - 2, - 2, - 24, - TRUE, - 0, - complain_overflow_signed, - aoutarm_fix_pcrel_26 , - "ARM_26", - TRUE, - 0x00ffffff, - 0x00ffffff, - FALSE); - - addend -= rel->r_vaddr - input_section->vma; + 2, + 2, + 24, + TRUE, + 0, + complain_overflow_signed, + aoutarm_fix_pcrel_26 , + "ARM_26", + TRUE, + 0x00ffffff, + 0x00ffffff, + FALSE); + + addend -= rel->r_vaddr - input_section->vma; #ifdef ARM_WINCE - /* FIXME: I don't know why, but the hack is necessary for correct - generation of bl's instruction offset. */ - addend -= 8; + /* FIXME: I don't know why, but the hack is necessary for correct + generation of bl's instruction offset. */ + addend -= 8; #endif - howto = & fake_arm26_reloc; - } + howto = & fake_arm26_reloc; + } #ifdef ARM_WINCE /* MS ARM-CE makes the reloc relative to the opcode's pc, not @@ -1265,13 +1265,13 @@ coff_arm_relocate_section (bfd *output_bfd, #endif /* If we are doing a relocatable link, then we can just ignore - a PC relative reloc that is pcrel_offset. It will already - have the correct value. If this is not a relocatable link, - then we should ignore the symbol value. */ + a PC relative reloc that is pcrel_offset. It will already + have the correct value. If this is not a relocatable link, + then we should ignore the symbol value. */ if (howto->pc_relative && howto->pcrel_offset) - { - if (bfd_link_relocatable (info)) - continue; + { + if (bfd_link_relocatable (info)) + continue; /* FIXME - it is not clear which targets need this next test and which do not. It is known that it is needed for the VxWorks and EPOC-PE targets, but it is also known that it @@ -1284,10 +1284,10 @@ coff_arm_relocate_section (bfd *output_bfd, the beginning of the symbol's section, so we must not cancel out the symbol's value, otherwise we'll be adding it in twice. */ - if (sym != NULL && sym->n_scnum != 0) - addend += sym->n_value; + if (sym != NULL && sym->n_scnum != 0) + addend += sym->n_value; #endif - } + } val = 0; @@ -1303,7 +1303,7 @@ coff_arm_relocate_section (bfd *output_bfd, else { sec = sections[symndx]; - val = (sec->output_section->vma + val = (sec->output_section->vma + sec->output_offset + sym->n_value - sec->vma); @@ -1311,15 +1311,15 @@ coff_arm_relocate_section (bfd *output_bfd, } else { - /* We don't output the stubs if we are generating a - relocatable output file, since we may as well leave the - stub generation to the final linker pass. If we fail to + /* We don't output the stubs if we are generating a + relocatable output file, since we may as well leave the + stub generation to the final linker pass. If we fail to verify that the name is defined, we'll try to build stubs for an undefined name... */ - if (! bfd_link_relocatable (info) + if (! bfd_link_relocatable (info) && ( h->root.type == bfd_link_hash_defined || h->root.type == bfd_link_hash_defweak)) - { + { asection * h_sec = h->root.u.def.section; const char * name = h->root.root.string; @@ -1328,17 +1328,17 @@ coff_arm_relocate_section (bfd *output_bfd, + h_sec->output_section->vma + h_sec->output_offset); - if (howto->type == ARM_26) - { - if ( h->symbol_class == C_THUMBSTATFUNC + if (howto->type == ARM_26) + { + if ( h->symbol_class == C_THUMBSTATFUNC || h->symbol_class == C_THUMBEXTFUNC) { /* Arm code calling a Thumb function. */ - unsigned long int tmp; - bfd_vma my_offset; - asection * s; - long int ret_offset; - struct coff_link_hash_entry * myh; + unsigned long int tmp; + bfd_vma my_offset; + asection * s; + long int ret_offset; + struct coff_link_hash_entry * myh; struct coff_arm_link_hash_table * globals; myh = find_arm_glue (info, name, input_bfd); @@ -1382,7 +1382,7 @@ coff_arm_relocate_section (bfd *output_bfd, bfd_put_32 (output_bfd, h_val | a2t3_func_addr_insn, s->contents + my_offset + 8); - if (info->base_file + if (info->base_file && !arm_emit_base_file_entry (info, output_bfd, s, my_offset + 8)) return FALSE; @@ -1411,23 +1411,23 @@ coff_arm_relocate_section (bfd *output_bfd, contents + rel->r_vaddr - input_section->vma); done = 1; } - } + } #ifndef ARM_WINCE /* Note: We used to check for ARM_THUMB9 and ARM_THUMB12. */ - else if (howto->type == ARM_THUMB23) - { - if ( h->symbol_class == C_EXT + else if (howto->type == ARM_THUMB23) + { + if ( h->symbol_class == C_EXT || h->symbol_class == C_STAT || h->symbol_class == C_LABEL) { /* Thumb code calling an ARM function. */ - asection * s = 0; - bfd_vma my_offset; - unsigned long int tmp; - long int ret_offset; - struct coff_link_hash_entry * myh; - struct coff_arm_link_hash_table * globals; + asection * s = 0; + bfd_vma my_offset; + unsigned long int tmp; + long int ret_offset; + struct coff_link_hash_entry * myh; + struct coff_arm_link_hash_table * globals; myh = find_thumb_glue (info, name, input_bfd); if (myh == NULL) @@ -1487,7 +1487,7 @@ coff_arm_relocate_section (bfd *output_bfd, bfd_put_32 (output_bfd, h_val, s->contents + my_offset + 16); - if (info->base_file + if (info->base_file && !arm_emit_base_file_entry (info, output_bfd, s, my_offset + 16)) @@ -1543,14 +1543,14 @@ coff_arm_relocate_section (bfd *output_bfd, contents + rel->r_vaddr - input_section->vma); done = 1; - } - } + } + } #endif - } + } - /* If the relocation type and destination symbol does not - fall into one of the above categories, then we can just - perform a direct link. */ + /* If the relocation type and destination symbol does not + fall into one of the above categories, then we can just + perform a direct link. */ if (done) rstat = bfd_reloc_ok; @@ -1586,22 +1586,22 @@ coff_arm_relocate_section (bfd *output_bfd, /* Only perform this fix during the final link, not a relocatable link. */ else if (! bfd_link_relocatable (info) && howto->type == ARM_THUMB23) - { - /* This is pretty much a copy of what the default - _bfd_final_link_relocate and _bfd_relocate_contents - routines do to perform a relocation, with special - processing for the split addressing of the Thumb BL - instruction. Again, it would probably be simpler adding a - ThumbBRANCH23 specific macro expansion into the default - code. */ + { + /* This is pretty much a copy of what the default + _bfd_final_link_relocate and _bfd_relocate_contents + routines do to perform a relocation, with special + processing for the split addressing of the Thumb BL + instruction. Again, it would probably be simpler adding a + ThumbBRANCH23 specific macro expansion into the default + code. */ - bfd_vma address = rel->r_vaddr - input_section->vma; + bfd_vma address = rel->r_vaddr - input_section->vma; if (address > high_address) rstat = bfd_reloc_outofrange; - else - { - bfd_vma relocation = val + addend; + else + { + bfd_vma relocation = val + addend; int size = bfd_get_reloc_size (howto); bfd_boolean overflow = FALSE; bfd_byte *location = contents + address; @@ -1616,12 +1616,12 @@ coff_arm_relocate_section (bfd *output_bfd, BFD_ASSERT (size == 4); - /* howto->pc_relative should be TRUE for type 14 BRANCH23. */ - relocation -= (input_section->output_section->vma - + input_section->output_offset); + /* howto->pc_relative should be TRUE for type 14 BRANCH23. */ + relocation -= (input_section->output_section->vma + + input_section->output_offset); - /* howto->pcrel_offset should be TRUE for type 14 BRANCH23. */ - relocation -= address; + /* howto->pcrel_offset should be TRUE for type 14 BRANCH23. */ + relocation -= address; /* No need to negate the relocation with BRANCH23. */ /* howto->complain_on_overflow == complain_overflow_signed for BRANCH23. */ @@ -1677,13 +1677,13 @@ coff_arm_relocate_section (bfd *output_bfd, which specifies that bit 1 of the target address will come from bit 1 of the base address. */ if (bfd_big_endian (input_bfd)) - { + { if ((x & 0x1800) == 0x0800 && (relocation & 0x02)) relocation += 2; relocation = (((relocation & 0xffe) >> 1) | ((relocation << 4) & 0x07ff0000)); } else - { + { if ((x & 0x18000000) == 0x08000000 && (relocation & 0x02)) relocation += 2; relocation = (((relocation & 0xffe) << 15) | ((relocation >> 12) & 0x7ff)); @@ -1696,13 +1696,13 @@ coff_arm_relocate_section (bfd *output_bfd, bfd_put_32 (input_bfd, x, location); rstat = overflow ? bfd_reloc_overflow : bfd_reloc_ok; - } - } + } + } #endif else - if (bfd_link_relocatable (info) && ! howto->partial_inplace) - rstat = bfd_reloc_ok; - else + if (bfd_link_relocatable (info) && ! howto->partial_inplace) + rstat = bfd_reloc_ok; + else rstat = _bfd_final_link_relocate (howto, input_bfd, input_section, contents, rel->r_vaddr - input_section->vma, @@ -1733,7 +1733,7 @@ coff_arm_relocate_section (bfd *output_bfd, if (patchit) { bfd_byte * location = contents + rel->r_vaddr - input_section->vma; - bfd_vma x = bfd_get_32 (input_bfd, location); + bfd_vma x = bfd_get_32 (input_bfd, location); bfd_put_32 (input_bfd, x | 1, location); } @@ -1783,8 +1783,8 @@ coff_arm_relocate_section (bfd *output_bfd, bfd_boolean bfd_arm_allocate_interworking_sections (struct bfd_link_info * info) { - asection * s; - bfd_byte * foo; + asection * s; + bfd_byte * foo; struct coff_arm_link_hash_table * globals; globals = coff_arm_hash_table (info); @@ -1825,14 +1825,14 @@ bfd_arm_allocate_interworking_sections (struct bfd_link_info * info) } static void -record_arm_to_thumb_glue (struct bfd_link_info * info, +record_arm_to_thumb_glue (struct bfd_link_info * info, struct coff_link_hash_entry * h) { - const char * name = h->root.root.string; - register asection * s; - char * tmp_name; - struct coff_link_hash_entry * myh; - struct bfd_link_hash_entry * bh; + const char * name = h->root.root.string; + register asection * s; + char * tmp_name; + struct coff_link_hash_entry * myh; + struct bfd_link_hash_entry * bh; struct coff_arm_link_hash_table * globals; bfd_vma val; bfd_size_type amt; @@ -1881,14 +1881,14 @@ record_arm_to_thumb_glue (struct bfd_link_info * info, #ifndef ARM_WINCE static void -record_thumb_to_arm_glue (struct bfd_link_info * info, +record_thumb_to_arm_glue (struct bfd_link_info * info, struct coff_link_hash_entry * h) { - const char * name = h->root.root.string; - asection * s; - char * tmp_name; - struct coff_link_hash_entry * myh; - struct bfd_link_hash_entry * bh; + const char * name = h->root.root.string; + asection * s; + char * tmp_name; + struct coff_link_hash_entry * myh; + struct bfd_link_hash_entry * bh; struct coff_arm_link_hash_table * globals; bfd_vma val; bfd_size_type amt; @@ -1961,12 +1961,12 @@ record_thumb_to_arm_glue (struct bfd_link_info * info, {armcoff/pe}.em */ bfd_boolean -bfd_arm_get_bfd_for_interworking (bfd * abfd, +bfd_arm_get_bfd_for_interworking (bfd * abfd, struct bfd_link_info * info) { struct coff_arm_link_hash_table * globals; - flagword flags; - asection * sec; + flagword flags; + asection * sec; /* If we are only performing a partial link do not bother getting a bfd to hold the glue. */ @@ -2014,9 +2014,9 @@ bfd_arm_get_bfd_for_interworking (bfd * abfd, } bfd_boolean -bfd_arm_process_before_allocation (bfd * abfd, +bfd_arm_process_before_allocation (bfd * abfd, struct bfd_link_info * info, - int support_old_code) + int support_old_code) { asection * sec; struct coff_arm_link_hash_table * globals; @@ -2059,9 +2059,9 @@ bfd_arm_process_before_allocation (bfd * abfd, for (rel = i; rel < i + sec->reloc_count; ++rel) { - unsigned short r_type = rel->r_type; - long symndx; - struct coff_link_hash_entry * h; + unsigned short r_type = rel->r_type; + long symndx; + struct coff_link_hash_entry * h; symndx = rel->r_symndx; @@ -2130,17 +2130,17 @@ bfd_arm_process_before_allocation (bfd * abfd, #endif /* ! defined (COFF_IMAGE_WITH_PE) */ -#define coff_bfd_reloc_type_lookup coff_arm_reloc_type_lookup -#define coff_bfd_reloc_name_lookup coff_arm_reloc_name_lookup -#define coff_relocate_section coff_arm_relocate_section -#define coff_bfd_is_local_label_name coff_arm_is_local_label_name +#define coff_bfd_reloc_type_lookup coff_arm_reloc_type_lookup +#define coff_bfd_reloc_name_lookup coff_arm_reloc_name_lookup +#define coff_relocate_section coff_arm_relocate_section +#define coff_bfd_is_local_label_name coff_arm_is_local_label_name #define coff_adjust_symndx coff_arm_adjust_symndx -#define coff_link_output_has_begun coff_arm_link_output_has_begun +#define coff_link_output_has_begun coff_arm_link_output_has_begun #define coff_final_link_postscript coff_arm_final_link_postscript #define coff_bfd_merge_private_bfd_data coff_arm_merge_private_bfd_data #define coff_bfd_print_private_bfd_data coff_arm_print_private_bfd_data -#define coff_bfd_set_private_flags _bfd_coff_arm_set_private_flags -#define coff_bfd_copy_private_bfd_data coff_arm_copy_private_bfd_data +#define coff_bfd_set_private_flags _bfd_coff_arm_set_private_flags +#define coff_bfd_copy_private_bfd_data coff_arm_copy_private_bfd_data #define coff_bfd_link_hash_table_create coff_arm_link_hash_table_create /* When doing a relocatable link, we want to convert ARM_26 relocs @@ -2237,12 +2237,12 @@ error: %B passes floats in integer registers, whereas %B passes them in float re /* xgettext: c-format */ _bfd_error_handler (_("\ error: %B is compiled as position independent code, whereas target %B is absolute position"), - ibfd, obfd); + ibfd, obfd); else /* xgettext: c-format */ _bfd_error_handler (_("\ error: %B is compiled as absolute position code, whereas target %B is position independent"), - ibfd, obfd); + ibfd, obfd); bfd_set_error (bfd_error_wrong_format); return FALSE; @@ -2346,7 +2346,7 @@ _bfd_coff_arm_set_private_flags (bfd * abfd, flagword flags) if (APCS_SET (abfd) && ( (APCS_26_FLAG (abfd) != flag) || (APCS_FLOAT_FLAG (abfd) != (flags & F_APCS_FLOAT)) - || (PIC_FLAG (abfd) != (flags & F_PIC)) + || (PIC_FLAG (abfd) != (flags & F_PIC)) )) return FALSE; @@ -2456,7 +2456,7 @@ Warning: Clearing the interworking flag of %B because non-interworking code in % labels of the form Lxxx to be stripped. */ static bfd_boolean -coff_arm_is_local_label_name (bfd * abfd ATTRIBUTE_UNUSED, +coff_arm_is_local_label_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name) { #ifdef USER_LABEL_PREFIX -- cgit v1.2.1