From 0cc79db2b66aa3115ddbf84cb81d1ad8abd38c46 Mon Sep 17 00:00:00 2001 From: Samanta Navarro Date: Mon, 5 Oct 2020 14:20:15 +0100 Subject: Fix spelling mistakes --- cpu/ChangeLog | 4 ++++ cpu/m32r.cpu | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) (limited to 'cpu') diff --git a/cpu/ChangeLog b/cpu/ChangeLog index 4d68e00fc10..fe525348ebc 100644 --- a/cpu/ChangeLog +++ b/cpu/ChangeLog @@ -1,3 +1,7 @@ +2020-10-05 Samanta Navarro + + * m32r.cpu: Fix spelling mistakes. + 2020-09-18 David Faust * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD. diff --git a/cpu/m32r.cpu b/cpu/m32r.cpu index a2395259b5b..e85b640ea5e 100644 --- a/cpu/m32r.cpu +++ b/cpu/m32r.cpu @@ -742,7 +742,7 @@ (dnop disp16 "16 bit displacement" () h-iaddr f-disp16) (dnop disp24 "24 bit displacement" (RELAX) h-iaddr f-disp24) -; These hardware elements are refered to frequently. +; These hardware elements are referred to frequently. (dnop condbit "condition bit" (SEM-ONLY) h-cond f-nil) (dnop accum "accumulator" (SEM-ONLY) h-accum f-nil) -- cgit v1.2.1