From 607685ecee1015d6c37e0d800d40453dc0aadc8c Mon Sep 17 00:00:00 2001 From: Yao Qi Date: Tue, 7 Jul 2015 16:58:19 +0100 Subject: Native debug arm program by aarch64 GDB This patch is to let aarch64 GDB debug 32-bit arm program natively. In each function for fetching and storing registers, GDB will check gdbarch_bfd_arch_info (gdbarch)->bits_per_word, if it is 32, call the corresponding aarch32 functions in aarch32-linux-nat.c, otherwise fall back to aarch64 code to fetch and store registers. aarch64_linux_read_description has to return the right target description, but we don't have gdbarch available there, so GDB fetches auxv and gets AT_PHENT, in order to determine whether the target is 32-bit or 64-bit. I learned this trick from solib-svr4.c. gdb: 2015-07-07 Yao Qi * aarch32-linux-nat.h (VFP_REGS_SIZE): New macro, moved from arm-linux-nat.c. * aarch64-linux-nat.c: Include aarch32-linux-nat.h and elf/external.h. (fetch_gregs_from_thread): Call aarch32_gp_regcache_supply if target is 32-bit. (store_gregs_to_thread): Call aarch32_gp_regcache_collect if target is 32-bit. (fetch_fpregs_from_thread): Call aarch32_vfp_regcache_supply if target is 32-bit. (store_fpregs_to_thread): Call aarch32_vfp_regcache_collect if target is 32-bit. (tdesc_arm_with_vfpv3, tdesc_arm_with_neon): Declare. (aarch64_linux_read_description): Return the right target description. * arm-linux-nat.c (VFP_REGS_SIZE): Moved to aarch32-linux-nat.h. * config/aarch64/linux.mh (NATDEPFILES): Add aarch32-linux-nat.o. * configure.tgt (aarch64*-*-linux*): Add arm-tdep.o and arm-linux-tdep.o --- gdb/aarch32-linux-nat.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'gdb/aarch32-linux-nat.h') diff --git a/gdb/aarch32-linux-nat.h b/gdb/aarch32-linux-nat.h index 1b7ff83e937..d7b5e166c94 100644 --- a/gdb/aarch32-linux-nat.h +++ b/gdb/aarch32-linux-nat.h @@ -15,6 +15,11 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ +/* Fetch and store VFP Registers. The kernel object has space for 32 + 64-bit registers, and the FPSCR. This is even when on a VFPv2 or + VFPv3D16 target. */ +#define VFP_REGS_SIZE (32 * 8 + 4) + void aarch32_gp_regcache_supply (struct regcache *regcache, uint32_t *regs, int arm_apcs_32); -- cgit v1.2.1