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# frv testcase for rstbf $FRk,@($GRi,$GRj)
# mach: frv
# as(frv): -mcpu=frv
.include "testutils.inc"
start
.global add
add:
; No nesr's active
set_gr_gr sp,gr21
set_gr_gr gr21,gr22
set_fr_iimmed 0x1111,0x1111,fr20
set_gr_limmed 0x1111,0x1111,gr20
set_mem_limmed 0x2222,0x2222,gr21
set_gr_immed 0,gr7
set_fr_iimmed 0xffff,0xffff,fr8
rstbf fr8,@(sp,gr7)
test_mem_limmed 0xff22,0x2222,sp
test_gr_limmed 0x1111,0x1111,gr20
test_fr_limmed 0x1111,0x1111,fr20
; 1 nesr active with the incorrect address in neear for gr
inc_gr_immed 1,gr22
nldubi @(sp,1),gr20
test_spr_gr neear0,gr22
set_gr_limmed 0x1111,0x1111,gr20
set_fr_iimmed 0x1111,0x1111,fr20
set_mem_limmed 0x2222,0x2222,gr21
set_fr_iimmed 0xffff,0xffff,fr8
inc_gr_immed 2,gr7
rstbf fr8,@(sp,gr7)
test_mem_limmed 0x2222,0xff22,gr21
test_gr_limmed 0x1111,0x1111,gr20
test_fr_limmed 0x1111,0x1111,fr20
; 1 nesr active with the incorrect address in neear for fr
inc_gr_immed -1,gr22
nldbfi @(sp,0),fr20
test_spr_gr neear1,gr22
set_gr_limmed 0x1111,0x1111,gr20
set_fr_iimmed 0x1111,0x1111,fr20
set_mem_limmed 0x2222,0x2222,gr21
set_fr_iimmed 0xffff,0xffff,fr8
inc_gr_immed 4,sp
set_gr_immed -1,gr7
rstbf fr8,@(sp,gr7)
test_mem_limmed 0x2222,0x22ff,gr21
test_gr_limmed 0x1111,0x1111,gr20
test_fr_limmed 0x1111,0x1111,fr20
; 1 nesr active with the correct address in neear for gr
set_gr_limmed 0x1111,0x1111,gr20
set_fr_iimmed 0x1111,0x1111,fr20
set_mem_limmed 0x2222,0x2222,gr21
set_fr_iimmed 0xffff,0xffff,fr8
inc_gr_immed -4,sp
set_gr_immed 1,gr7
rstbf fr8,@(sp,gr7)
test_mem_limmed 0x22ff,0x2222,gr21
test_gr_limmed 0x0000,0x00ff,gr20
test_fr_limmed 0x1111,0x1111,fr20
; 1 nesr active with the correct address in neear for fr
set_gr_limmed 0x1111,0x1111,gr20
set_fr_iimmed 0x1111,0x1111,fr20
set_mem_limmed 0x2222,0x2222,gr21
set_fr_iimmed 0xffff,0xffff,fr8
set_gr_immed 0,gr7
rstbf fr8,@(sp,gr7)
test_mem_limmed 0xff22,0x2222,gr21
test_gr_limmed 0x1111,0x1111,gr20
test_fr_limmed 0x0000,0x00ff,fr20
pass
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