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# frv testcase for rstf $FRk,@($GRi,$GRj)
# mach: frv
# as(frv): -mcpu=frv
.include "testutils.inc"
start
.global add
add:
; No nesr's active
set_gr_gr sp,gr10
set_gr_gr sp,gr24
set_mem_limmed 0x2222,0x2222,gr24
set_gr_gr gr24,gr27
inc_gr_immed -4,gr27
set_mem_limmed 0x3333,0x3333,gr27
set_gr_gr gr27,gr26
inc_gr_immed -4,gr26
set_mem_limmed 0x4444,0x4444,gr26
set_gr_gr gr26,gr25
inc_gr_immed -4,gr25
set_mem_limmed 0x5555,0x5555,gr25
set_gr_limmed 0x1111,0x1111,gr20
set_fr_iimmed 0x1111,0x1111,fr20
set_gr_immed 0,gr7
set_fr_iimmed 0xffff,0xffff,fr8
rstf fr8,@(sp,gr7)
test_mem_limmed 0xffff,0xffff,gr24
test_mem_limmed 0x3333,0x3333,gr27
test_mem_limmed 0x4444,0x4444,gr26
test_mem_limmed 0x5555,0x5555,gr25
test_gr_limmed 0x1111,0x1111,gr20
test_fr_limmed 0x1111,0x1111,fr20
; 1 nesr active with the incorrect address in neear for gr
inc_gr_immed -8,gr10
nldi @(sp,-8),gr20
test_spr_gr neear0,gr10
set_mem_limmed 0x2222,0x2222,gr24
set_mem_limmed 0x3333,0x3333,gr27
set_mem_limmed 0x4444,0x4444,gr26
set_mem_limmed 0x5555,0x5555,gr25
set_gr_limmed 0x1111,0x1111,gr20
set_fr_iimmed 0x1111,0x1111,fr20
set_fr_iimmed 0xffff,0xffff,fr8
set_gr_immed -4,gr7
rstf fr8,@(sp,gr7)
test_mem_limmed 0x2222,0x2222,gr24
test_mem_limmed 0xffff,0xffff,gr27
test_mem_limmed 0x4444,0x4444,gr26
test_mem_limmed 0x5555,0x5555,gr25
test_gr_limmed 0x1111,0x1111,gr20
test_fr_limmed 0x1111,0x1111,fr20
; 1 nesr active with the incorrect address in neear for fr
inc_gr_immed -4,gr10
nldfi @(sp,-12),fr20
test_spr_gr neear1,gr10
set_mem_limmed 0x2222,0x2222,gr24
set_mem_limmed 0x3333,0x3333,gr27
set_mem_limmed 0x4444,0x4444,gr26
set_mem_limmed 0x5555,0x5555,gr25
set_gr_limmed 0x1111,0x1111,gr20
set_fr_iimmed 0x1111,0x1111,fr20
set_fr_iimmed 0xffff,0xffff,fr8
inc_gr_immed -4,sp
set_gr_immed 4,gr7
rstf fr8,@(sp,gr7)
test_mem_limmed 0xffff,0xffff,gr24
test_mem_limmed 0x3333,0x3333,gr27
test_mem_limmed 0x4444,0x4444,gr26
test_mem_limmed 0x5555,0x5555,gr25
test_gr_limmed 0x1111,0x1111,gr20
test_fr_limmed 0x1111,0x1111,fr20
; 1 nesr active with the correct address in neear for gr
set_mem_limmed 0x2222,0x2222,gr24
set_mem_limmed 0x3333,0x3333,gr27
set_mem_limmed 0x4444,0x4444,gr26
set_mem_limmed 0x5555,0x5555,gr25
set_gr_limmed 0x1111,0x1111,gr20
set_fr_iimmed 0x1111,0x1111,fr20
set_fr_iimmed 0xffff,0xffff,fr8
inc_gr_immed -4,sp
set_gr_immed 0,gr7
rstf fr8,@(sp,gr7)
test_mem_limmed 0x2222,0x2222,gr24
test_mem_limmed 0x3333,0x3333,gr27
test_mem_limmed 0xffff,0xffff,gr26
test_mem_limmed 0x5555,0x5555,gr25
test_gr_limmed 0xffff,0xffff,gr20
test_fr_limmed 0x1111,0x1111,fr20
; 1 nesr active with the correct address in neear for fr
set_mem_limmed 0x2222,0x2222,gr24
set_mem_limmed 0x3333,0x3333,gr27
set_mem_limmed 0x4444,0x4444,gr26
set_mem_limmed 0x5555,0x5555,gr25
set_gr_limmed 0x1111,0x1111,gr20
set_fr_iimmed 0x1111,0x1111,fr20
set_fr_iimmed 0xffff,0xffff,fr8
set_gr_immed -4,gr7
rstf fr8,@(sp,gr7)
test_mem_limmed 0x2222,0x2222,gr24
test_mem_limmed 0x3333,0x3333,gr27
test_mem_limmed 0x4444,0x4444,gr26
test_mem_limmed 0xffff,0xffff,gr25
test_gr_limmed 0x1111,0x1111,gr20
test_fr_limmed 0xffff,0xffff,fr20
pass
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