diff options
| author | Thiemo Seufer <ths@networkno.de> | 2006-04-28 13:17:00 +0000 |
|---|---|---|
| committer | Thiemo Seufer <ths@networkno.de> | 2006-04-28 13:17:00 +0000 |
| commit | 7f04959771a7678c83e246134ba3a8984a05dcb1 (patch) | |
| tree | 2ffefc46fa92ac2be89fa1f784c976097b7ffb09 | |
| parent | e98cef15466f4dd61faa3e0aedf092f31ae070a4 (diff) | |
| download | binutils-redhat-7f04959771a7678c83e246134ba3a8984a05dcb1.tar.gz | |
[ opcodes/ChangeLog ]
2006-04-28 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
Nigel Stevens <nigel@mips.com>
* mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
names.
[ gas/testsuite/ChangeLog ]
2006-04-28 Thiemo Seufer <ths@mips.com>
David Ung <davidu@mips.com>
Nigel Stevens <nigel@mips.com>
* gas/mips/cp0sel-names-mips32r2.d,
gas/mips/cp0sel-names-mips64r2.d: Update for MT register names.
| -rw-r--r-- | gas/testsuite/ChangeLog | 15 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/cp0sel-names-mips32r2.d | 42 | ||||
| -rw-r--r-- | gas/testsuite/gas/mips/cp0sel-names-mips64r2.d | 42 | ||||
| -rw-r--r-- | opcodes/ChangeLog | 7 | ||||
| -rw-r--r-- | opcodes/mips-dis.c | 21 |
5 files changed, 80 insertions, 47 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 6f0b29968b..8984e28a4c 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,10 +1,15 @@ +2006-04-28 Thiemo Seufer <ths@mips.com> + David Ung <davidu@mips.com> + Nigel Stevens <nigel@mips.com> + + * gas/mips/cp0sel-names-mips32r2.d, + gas/mips/cp0sel-names-mips64r2.d: Update for MT register names. + 2006-04-26 Julian Brown <julian@codesourcery.com> - * gas/testsuite/gas/arm/neon-const.s: New testcase. Neon floating-point - constants. - * gas/testsuite/gas/arm/neon-const.d: Expected output of above. - * gas/testsuite/gas/arm/neon-cov.d: Expect floating-point disassembly - for VMOV.F32. + * gas/arm/neon-const.s: New testcase. Neon floating-point constants. + * gas/arm/neon-const.d: Expected output of above. + * gas/arm/neon-cov.d: Expect floating-point disassembly for VMOV.F32. 2006-04-26 Julian Brown <julian@codesourcery.com> diff --git a/gas/testsuite/gas/mips/cp0sel-names-mips32r2.d b/gas/testsuite/gas/mips/cp0sel-names-mips32r2.d index 6f3660d4ca..aa4c8a5e3d 100644 --- a/gas/testsuite/gas/mips/cp0sel-names-mips32r2.d +++ b/gas/testsuite/gas/mips/cp0sel-names-mips32r2.d @@ -8,27 +8,27 @@ .*: +file format .*mips.* Disassembly of section .text: -0+0000 <[^>]*> 40800001 mtc0 \$0,\$0,1 -0+0004 <[^>]*> 40800002 mtc0 \$0,\$0,2 -0+0008 <[^>]*> 40800003 mtc0 \$0,\$0,3 +0+0000 <[^>]*> 40800001 mtc0 \$0,c0_mvpcontrol +0+0004 <[^>]*> 40800002 mtc0 \$0,c0_mvpconf0 +0+0008 <[^>]*> 40800003 mtc0 \$0,c0_mvpconf1 0+000c <[^>]*> 40800004 mtc0 \$0,\$0,4 0+0010 <[^>]*> 40800005 mtc0 \$0,\$0,5 0+0014 <[^>]*> 40800006 mtc0 \$0,\$0,6 0+0018 <[^>]*> 40800007 mtc0 \$0,\$0,7 -0+001c <[^>]*> 40800801 mtc0 \$0,\$1,1 -0+0020 <[^>]*> 40800802 mtc0 \$0,\$1,2 -0+0024 <[^>]*> 40800803 mtc0 \$0,\$1,3 -0+0028 <[^>]*> 40800804 mtc0 \$0,\$1,4 -0+002c <[^>]*> 40800805 mtc0 \$0,\$1,5 -0+0030 <[^>]*> 40800806 mtc0 \$0,\$1,6 +0+001c <[^>]*> 40800801 mtc0 \$0,c0_vpecontrol +0+0020 <[^>]*> 40800802 mtc0 \$0,c0_vpeconf0 +0+0024 <[^>]*> 40800803 mtc0 \$0,c0_vpeconf1 +0+0028 <[^>]*> 40800804 mtc0 \$0,c0_yqmask +0+002c <[^>]*> 40800805 mtc0 \$0,c0_vpeschedule +0+0030 <[^>]*> 40800806 mtc0 \$0,c0_vpeschefback 0+0034 <[^>]*> 40800807 mtc0 \$0,\$1,7 -0+0038 <[^>]*> 40801001 mtc0 \$0,\$2,1 -0+003c <[^>]*> 40801002 mtc0 \$0,\$2,2 -0+0040 <[^>]*> 40801003 mtc0 \$0,\$2,3 -0+0044 <[^>]*> 40801004 mtc0 \$0,\$2,4 -0+0048 <[^>]*> 40801005 mtc0 \$0,\$2,5 -0+004c <[^>]*> 40801006 mtc0 \$0,\$2,6 -0+0050 <[^>]*> 40801007 mtc0 \$0,\$2,7 +0+0038 <[^>]*> 40801001 mtc0 \$0,c0_tcstatus +0+003c <[^>]*> 40801002 mtc0 \$0,c0_tcbind +0+0040 <[^>]*> 40801003 mtc0 \$0,c0_tcrestart +0+0044 <[^>]*> 40801004 mtc0 \$0,c0_tchalt +0+0048 <[^>]*> 40801005 mtc0 \$0,c0_tccontext +0+004c <[^>]*> 40801006 mtc0 \$0,c0_tcschedule +0+0050 <[^>]*> 40801007 mtc0 \$0,c0_tcschefback 0+0054 <[^>]*> 40801801 mtc0 \$0,\$3,1 0+0058 <[^>]*> 40801802 mtc0 \$0,\$3,2 0+005c <[^>]*> 40801803 mtc0 \$0,\$3,3 @@ -50,11 +50,11 @@ Disassembly of section .text: 0+009c <[^>]*> 40802805 mtc0 \$0,\$5,5 0+00a0 <[^>]*> 40802806 mtc0 \$0,\$5,6 0+00a4 <[^>]*> 40802807 mtc0 \$0,\$5,7 -0+00a8 <[^>]*> 40803001 mtc0 \$0,\$6,1 -0+00ac <[^>]*> 40803002 mtc0 \$0,\$6,2 -0+00b0 <[^>]*> 40803003 mtc0 \$0,\$6,3 -0+00b4 <[^>]*> 40803004 mtc0 \$0,\$6,4 -0+00b8 <[^>]*> 40803005 mtc0 \$0,\$6,5 +0+00a8 <[^>]*> 40803001 mtc0 \$0,c0_srsconf0 +0+00ac <[^>]*> 40803002 mtc0 \$0,c0_srsconf1 +0+00b0 <[^>]*> 40803003 mtc0 \$0,c0_srsconf2 +0+00b4 <[^>]*> 40803004 mtc0 \$0,c0_srsconf3 +0+00b8 <[^>]*> 40803005 mtc0 \$0,c0_srsconf4 0+00bc <[^>]*> 40803006 mtc0 \$0,\$6,6 0+00c0 <[^>]*> 40803007 mtc0 \$0,\$6,7 0+00c4 <[^>]*> 40803801 mtc0 \$0,\$7,1 diff --git a/gas/testsuite/gas/mips/cp0sel-names-mips64r2.d b/gas/testsuite/gas/mips/cp0sel-names-mips64r2.d index 9222800a67..22aa180ee2 100644 --- a/gas/testsuite/gas/mips/cp0sel-names-mips64r2.d +++ b/gas/testsuite/gas/mips/cp0sel-names-mips64r2.d @@ -8,27 +8,27 @@ .*: +file format .*mips.* Disassembly of section .text: -0+0000 <[^>]*> 40800001 mtc0 \$0,\$0,1 -0+0004 <[^>]*> 40800002 mtc0 \$0,\$0,2 -0+0008 <[^>]*> 40800003 mtc0 \$0,\$0,3 +0+0000 <[^>]*> 40800001 mtc0 \$0,c0_mvpcontrol +0+0004 <[^>]*> 40800002 mtc0 \$0,c0_mvpconf0 +0+0008 <[^>]*> 40800003 mtc0 \$0,c0_mvpconf1 0+000c <[^>]*> 40800004 mtc0 \$0,\$0,4 0+0010 <[^>]*> 40800005 mtc0 \$0,\$0,5 0+0014 <[^>]*> 40800006 mtc0 \$0,\$0,6 0+0018 <[^>]*> 40800007 mtc0 \$0,\$0,7 -0+001c <[^>]*> 40800801 mtc0 \$0,\$1,1 -0+0020 <[^>]*> 40800802 mtc0 \$0,\$1,2 -0+0024 <[^>]*> 40800803 mtc0 \$0,\$1,3 -0+0028 <[^>]*> 40800804 mtc0 \$0,\$1,4 -0+002c <[^>]*> 40800805 mtc0 \$0,\$1,5 -0+0030 <[^>]*> 40800806 mtc0 \$0,\$1,6 +0+001c <[^>]*> 40800801 mtc0 \$0,c0_vpecontrol +0+0020 <[^>]*> 40800802 mtc0 \$0,c0_vpeconf0 +0+0024 <[^>]*> 40800803 mtc0 \$0,c0_vpeconf1 +0+0028 <[^>]*> 40800804 mtc0 \$0,c0_yqmask +0+002c <[^>]*> 40800805 mtc0 \$0,c0_vpeschedule +0+0030 <[^>]*> 40800806 mtc0 \$0,c0_vpeschefback 0+0034 <[^>]*> 40800807 mtc0 \$0,\$1,7 -0+0038 <[^>]*> 40801001 mtc0 \$0,\$2,1 -0+003c <[^>]*> 40801002 mtc0 \$0,\$2,2 -0+0040 <[^>]*> 40801003 mtc0 \$0,\$2,3 -0+0044 <[^>]*> 40801004 mtc0 \$0,\$2,4 -0+0048 <[^>]*> 40801005 mtc0 \$0,\$2,5 -0+004c <[^>]*> 40801006 mtc0 \$0,\$2,6 -0+0050 <[^>]*> 40801007 mtc0 \$0,\$2,7 +0+0038 <[^>]*> 40801001 mtc0 \$0,c0_tcstatus +0+003c <[^>]*> 40801002 mtc0 \$0,c0_tcbind +0+0040 <[^>]*> 40801003 mtc0 \$0,c0_tcrestart +0+0044 <[^>]*> 40801004 mtc0 \$0,c0_tchalt +0+0048 <[^>]*> 40801005 mtc0 \$0,c0_tccontext +0+004c <[^>]*> 40801006 mtc0 \$0,c0_tcschedule +0+0050 <[^>]*> 40801007 mtc0 \$0,c0_tcschefback 0+0054 <[^>]*> 40801801 mtc0 \$0,\$3,1 0+0058 <[^>]*> 40801802 mtc0 \$0,\$3,2 0+005c <[^>]*> 40801803 mtc0 \$0,\$3,3 @@ -50,11 +50,11 @@ Disassembly of section .text: 0+009c <[^>]*> 40802805 mtc0 \$0,\$5,5 0+00a0 <[^>]*> 40802806 mtc0 \$0,\$5,6 0+00a4 <[^>]*> 40802807 mtc0 \$0,\$5,7 -0+00a8 <[^>]*> 40803001 mtc0 \$0,\$6,1 -0+00ac <[^>]*> 40803002 mtc0 \$0,\$6,2 -0+00b0 <[^>]*> 40803003 mtc0 \$0,\$6,3 -0+00b4 <[^>]*> 40803004 mtc0 \$0,\$6,4 -0+00b8 <[^>]*> 40803005 mtc0 \$0,\$6,5 +0+00a8 <[^>]*> 40803001 mtc0 \$0,c0_srsconf0 +0+00ac <[^>]*> 40803002 mtc0 \$0,c0_srsconf1 +0+00b0 <[^>]*> 40803003 mtc0 \$0,c0_srsconf2 +0+00b4 <[^>]*> 40803004 mtc0 \$0,c0_srsconf3 +0+00b8 <[^>]*> 40803005 mtc0 \$0,c0_srsconf4 0+00bc <[^>]*> 40803006 mtc0 \$0,\$6,6 0+00c0 <[^>]*> 40803007 mtc0 \$0,\$6,7 0+00c4 <[^>]*> 40803801 mtc0 \$0,\$7,1 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index f9c0619ec3..8352f24501 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,4 +1,11 @@ 2006-04-28 Thiemo Seufer <ths@mips.com> + David Ung <davidu@mips.com> + Nigel Stevens <nigel@mips.com> + + * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register + names. + +2006-04-28 Thiemo Seufer <ths@mips.com> Nigel Stevens <nigel@mips.com> David Ung <davidu@mips.com> diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index e8a083b052..0e785cb7e3 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -184,7 +184,28 @@ static const char * const mips_cp0_names_mips3264r2[32] = static const struct mips_cp0sel_name mips_cp0sel_names_mips3264r2[] = { { 4, 1, "c0_contextconfig" }, + { 0, 1, "c0_mvpcontrol" }, + { 0, 2, "c0_mvpconf0" }, + { 0, 3, "c0_mvpconf1" }, + { 1, 1, "c0_vpecontrol" }, + { 1, 2, "c0_vpeconf0" }, + { 1, 3, "c0_vpeconf1" }, + { 1, 4, "c0_yqmask" }, + { 1, 5, "c0_vpeschedule" }, + { 1, 6, "c0_vpeschefback" }, + { 2, 1, "c0_tcstatus" }, + { 2, 2, "c0_tcbind" }, + { 2, 3, "c0_tcrestart" }, + { 2, 4, "c0_tchalt" }, + { 2, 5, "c0_tccontext" }, + { 2, 6, "c0_tcschedule" }, + { 2, 7, "c0_tcschefback" }, { 5, 1, "c0_pagegrain" }, + { 6, 1, "c0_srsconf0" }, + { 6, 2, "c0_srsconf1" }, + { 6, 3, "c0_srsconf2" }, + { 6, 4, "c0_srsconf3" }, + { 6, 5, "c0_srsconf4" }, { 12, 1, "c0_intctl" }, { 12, 2, "c0_srsctl" }, { 12, 3, "c0_srsmap" }, |