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| author | Richard Sandiford <rsandifo@nildram.co.uk> | 2013-07-07 10:15:08 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@nildram.co.uk> | 2013-07-07 10:15:08 +0000 |
| commit | b2e3f322072bf85522e5fc1bd95df32c9b5eac83 (patch) | |
| tree | c33958a0c64f82376fc9186f1d54910d67f3adec /gas/config | |
| parent | fc309cea152f42d511039ef70d367d8ebc7a43fb (diff) | |
| download | binutils-redhat-b2e3f322072bf85522e5fc1bd95df32c9b5eac83.tar.gz | |
include/opcode/
* mips.h: Remove documentation of "[" and "]". Update documentation
of "k" and the MDMX formats.
opcodes/
* mips-opc.c (mips_builtin_opcodes): Use "Q" for the INSN_5400
MDMX-like instructions.
* mips-dis.c (print_insn_arg): Use "$f" rather than "$v" when
printing "Q" operands for INSN_5400 instructions.
gas/
* config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
(mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
gas/testsuite/
* gas/mips/vr5400-ill.s, gas/mips/vr5400-ill.l: New test.
* gas/mips/mips.exp: Run it.
Diffstat (limited to 'gas/config')
| -rw-r--r-- | gas/config/tc-mips.c | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 7acb5e25fc..8fdb124a6b 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -10972,8 +10972,6 @@ validate_mips_insn (const struct mips_opcode *opc) USE_BITS (OP_MASK_RT, OP_SH_RT); break; case 'e': USE_BITS (OP_MASK_VECBYTE, OP_SH_VECBYTE); break; case '%': USE_BITS (OP_MASK_VECALIGN, OP_SH_VECALIGN); break; - case '[': break; - case ']': break; case '1': USE_BITS (OP_MASK_STYPE, OP_SH_STYPE); break; case '2': USE_BITS (OP_MASK_BP, OP_SH_BP); break; case '3': USE_BITS (OP_MASK_SA3, OP_SH_SA3); break; @@ -11785,13 +11783,6 @@ mips_ip (char *str, struct mips_cl_insn *ip) continue; break; - case '[': /* These must match exactly. */ - case ']': - gas_assert (!mips_opts.micromips); - if (*s++ == *args) - continue; - break; - case '+': /* Opcode extension character. */ switch (*++args) { @@ -12656,7 +12647,7 @@ mips_ip (char *str, struct mips_cl_insn *ip) case 'X': /* MDMX destination register. */ case 'Y': /* MDMX source register. */ case 'Z': /* MDMX target register. */ - is_mdmx = 1; + is_mdmx = !(insn->membership & INSN_5400); case 'W': gas_assert (!mips_opts.micromips); case 'D': /* Floating point destination register. */ @@ -12712,6 +12703,11 @@ mips_ip (char *str, struct mips_cl_insn *ip) /* This is like 'Z', but also needs to fix the MDMX vector/scalar select bits. Note that the scalar immediate case is handled above. */ + if ((ip->insn_mo->membership & INSN_5400) + && strcmp (insn->name, "rzu.ob") == 0) + as_bad (_("Operand %d of `%s' must be an immediate"), + argnum, ip->insn_mo->name); + if (*s == '[') { int is_qh = (ip->insn_opcode & (1 << OP_SH_VSEL)); @@ -12734,7 +12730,13 @@ mips_ip (char *str, struct mips_cl_insn *ip) s++; } else - { + { + if ((ip->insn_mo->membership & INSN_5400) + && (strcmp (insn->name, "sll.ob") == 0 + || strcmp (insn->name, "srl.ob") == 0)) + as_bad (_("Operand %d of `%s' must be scalar"), + argnum, ip->insn_mo->name); + if (ip->insn_opcode & (OP_MASK_VSEL << OP_SH_VSEL)) ip->insn_opcode |= (MDMX_FMTSEL_VEC_QH << OP_SH_VSEL); |