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| author | Nick Clifton <nickc@redhat.com> | 2008-06-12 21:44:54 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2008-06-12 21:44:54 +0000 |
| commit | dd1ca61c85f06a957fe2f5d7b0dd83e9a7f2af8d (patch) | |
| tree | ef52181566fe9eca345768ebb73c29cfc7bc18d5 /opcodes | |
| parent | d73f1714b55b31e4f19465f5fd961cd1861041ba (diff) | |
| download | binutils-redhat-dd1ca61c85f06a957fe2f5d7b0dd83e9a7f2af8d.tar.gz | |
* mips.h: Document new field descriptors +Q.
(OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.
opcodes/
* mips-dis.c (print_insn_args): Handle field descriptor +Q.
* mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
seqi, sne and snei.
gas/
* config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q.
(mips_ip): Likewise.
(macro_build): Likewise.
(CPU_HAS_SEQ): New macro.
(macro2) <M_SEQ_I, M_SNE_I>: Use it. Emit seq/sne and seqi/snei.
gas/testsuite/
* gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*.
* gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi
and snei.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 4 | ||||
| -rw-r--r-- | opcodes/mips-dis.c | 7 | ||||
| -rw-r--r-- | opcodes/mips-opc.c | 4 |
3 files changed, 15 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 886431c8fb..125397550e 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -6,6 +6,10 @@ baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs, syncw, syncws, vm3mulu, vm0 and vmulu. + * mips-dis.c (print_insn_args): Handle field descriptor +Q. + * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq, + seqi, sne and snei. + 2008-05-30 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.tbl: Add vmovd with 64bit operand. diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 4202b7d1db..ada753f4f8 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -902,6 +902,13 @@ print_insn_args (const char *d, (l >> OP_SH_CINSLM1) & OP_MASK_CINSLM1); break; + case 'Q': /* seqi/snei immediate field */ + op = (l >> OP_SH_SEQI) & OP_MASK_SEQI; + /* Sign-extend it. */ + op = (op ^ 512) - 512; + (*info->fprintf_func) (info->stream, "%d", op); + break; + default: /* xgettext:c-format */ (*info->fprintf_func) (info->stream, diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 29c136847b..75503fa32a 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -1191,10 +1191,12 @@ const struct mips_opcode mips_builtin_opcodes[] = {"seh", "d,w", 0x7c000620, 0xffe007ff, WR_d|RD_t, 0, I33 }, {"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t, 0, L1 }, {"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t, 0, L1 }, +{"seq", "d,v,t", 0x7000002a, 0xfc0007ff, WR_d|RD_s|RD_t, 0, IOCT }, {"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, 0, I1 }, {"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO, 0, I1 }, {"seq", "S,T", 0x46a00032, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, 0, IL2E }, {"seq", "S,T", 0x4ba0000c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, 0, IL2F }, +{"seqi", "t,r,+Q", 0x7000002e, 0xfc00003f, WR_t|RD_s, 0, IOCT }, {"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO, 0, I1 }, {"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO, 0, I1 }, {"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO, 0, I1 }, @@ -1246,8 +1248,10 @@ const struct mips_opcode mips_builtin_opcodes[] = {"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO, 0, I1 }, {"sltu", "S,T", 0x4680003c, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, 0, IL2E }, {"sltu", "S,T", 0x4b80000d, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, 0, IL2F }, +{"sne", "d,v,t", 0x7000002b, 0xfc0007ff, WR_d|RD_s|RD_t, 0, IOCT }, {"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO, 0, I1 }, {"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO, 0, I1 }, +{"snei", "t,r,+Q", 0x7000002f, 0xfc00003f, WR_t|RD_s, 0, IOCT }, {"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D|RD_S|FP_D, 0, I2 }, {"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D|RD_S|FP_S, 0, I2 }, {"sqrt.ps", "D,S", 0x46c00004, 0xffff003f, WR_D|RD_S|FP_D, 0, SB1 }, |