diff options
| -rw-r--r-- | opcodes/ChangeLog | 2 | ||||
| -rw-r--r-- | opcodes/i386-opc.c | 2 | ||||
| -rw-r--r-- | opcodes/i386-opc.h | 2 |
3 files changed, 4 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index a827e7532b..f0f8af8066 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,6 +1,8 @@ 2007-04-13 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c: Remove trailing white spaces. + * i386-opc.c: Likewise. + * i386-opc.h: Likewise. 2007-04-11 H.J. Lu <hongjiu.lu@intel.com> diff --git a/opcodes/i386-opc.c b/opcodes/i386-opc.c index 9314f6a014..7d9d44fb12 100644 --- a/opcodes/i386-opc.c +++ b/opcodes/i386-opc.c @@ -142,7 +142,7 @@ const template i386_optab[] = /* Exchange instructions. xchg commutes: we allow both operand orders. - + In the 64bit code, xchg rax, rax is reused for new nop instruction. */ {"xchg", 2, 0x90, X, 0, wlq_Suf|ShortForm, { WordReg, Acc, 0 } }, {"xchg", 2, 0x90, X, 0, wlq_Suf|ShortForm, { Acc, WordReg, 0 } }, diff --git a/opcodes/i386-opc.h b/opcodes/i386-opc.h index 39ebfbc824..8e0a842a50 100644 --- a/opcodes/i386-opc.h +++ b/opcodes/i386-opc.h @@ -67,7 +67,7 @@ typedef struct template #define CpuSVME 0x20000 /* AMD Secure Virtual Machine Ext-s required */ #define CpuVMX 0x40000 /* VMX Instructions required */ #define CpuSSSE3 0x80000 /* Supplemental Streaming SIMD extensions 3 required */ -#define CpuSSE4a 0x100000 /* SSE4a New Instuctions required */ +#define CpuSSE4a 0x100000 /* SSE4a New Instuctions required */ #define CpuABM 0x200000 /* ABM New Instructions required */ /* These flags are set by gas depending on the flag_code. */ |