diff options
Diffstat (limited to 'gas/testsuite/gas/mips/cp0sel-names-mips64r2.d')
| -rw-r--r-- | gas/testsuite/gas/mips/cp0sel-names-mips64r2.d | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/gas/testsuite/gas/mips/cp0sel-names-mips64r2.d b/gas/testsuite/gas/mips/cp0sel-names-mips64r2.d index 9222800a67..22aa180ee2 100644 --- a/gas/testsuite/gas/mips/cp0sel-names-mips64r2.d +++ b/gas/testsuite/gas/mips/cp0sel-names-mips64r2.d @@ -8,27 +8,27 @@ .*: +file format .*mips.* Disassembly of section .text: -0+0000 <[^>]*> 40800001 mtc0 \$0,\$0,1 -0+0004 <[^>]*> 40800002 mtc0 \$0,\$0,2 -0+0008 <[^>]*> 40800003 mtc0 \$0,\$0,3 +0+0000 <[^>]*> 40800001 mtc0 \$0,c0_mvpcontrol +0+0004 <[^>]*> 40800002 mtc0 \$0,c0_mvpconf0 +0+0008 <[^>]*> 40800003 mtc0 \$0,c0_mvpconf1 0+000c <[^>]*> 40800004 mtc0 \$0,\$0,4 0+0010 <[^>]*> 40800005 mtc0 \$0,\$0,5 0+0014 <[^>]*> 40800006 mtc0 \$0,\$0,6 0+0018 <[^>]*> 40800007 mtc0 \$0,\$0,7 -0+001c <[^>]*> 40800801 mtc0 \$0,\$1,1 -0+0020 <[^>]*> 40800802 mtc0 \$0,\$1,2 -0+0024 <[^>]*> 40800803 mtc0 \$0,\$1,3 -0+0028 <[^>]*> 40800804 mtc0 \$0,\$1,4 -0+002c <[^>]*> 40800805 mtc0 \$0,\$1,5 -0+0030 <[^>]*> 40800806 mtc0 \$0,\$1,6 +0+001c <[^>]*> 40800801 mtc0 \$0,c0_vpecontrol +0+0020 <[^>]*> 40800802 mtc0 \$0,c0_vpeconf0 +0+0024 <[^>]*> 40800803 mtc0 \$0,c0_vpeconf1 +0+0028 <[^>]*> 40800804 mtc0 \$0,c0_yqmask +0+002c <[^>]*> 40800805 mtc0 \$0,c0_vpeschedule +0+0030 <[^>]*> 40800806 mtc0 \$0,c0_vpeschefback 0+0034 <[^>]*> 40800807 mtc0 \$0,\$1,7 -0+0038 <[^>]*> 40801001 mtc0 \$0,\$2,1 -0+003c <[^>]*> 40801002 mtc0 \$0,\$2,2 -0+0040 <[^>]*> 40801003 mtc0 \$0,\$2,3 -0+0044 <[^>]*> 40801004 mtc0 \$0,\$2,4 -0+0048 <[^>]*> 40801005 mtc0 \$0,\$2,5 -0+004c <[^>]*> 40801006 mtc0 \$0,\$2,6 -0+0050 <[^>]*> 40801007 mtc0 \$0,\$2,7 +0+0038 <[^>]*> 40801001 mtc0 \$0,c0_tcstatus +0+003c <[^>]*> 40801002 mtc0 \$0,c0_tcbind +0+0040 <[^>]*> 40801003 mtc0 \$0,c0_tcrestart +0+0044 <[^>]*> 40801004 mtc0 \$0,c0_tchalt +0+0048 <[^>]*> 40801005 mtc0 \$0,c0_tccontext +0+004c <[^>]*> 40801006 mtc0 \$0,c0_tcschedule +0+0050 <[^>]*> 40801007 mtc0 \$0,c0_tcschefback 0+0054 <[^>]*> 40801801 mtc0 \$0,\$3,1 0+0058 <[^>]*> 40801802 mtc0 \$0,\$3,2 0+005c <[^>]*> 40801803 mtc0 \$0,\$3,3 @@ -50,11 +50,11 @@ Disassembly of section .text: 0+009c <[^>]*> 40802805 mtc0 \$0,\$5,5 0+00a0 <[^>]*> 40802806 mtc0 \$0,\$5,6 0+00a4 <[^>]*> 40802807 mtc0 \$0,\$5,7 -0+00a8 <[^>]*> 40803001 mtc0 \$0,\$6,1 -0+00ac <[^>]*> 40803002 mtc0 \$0,\$6,2 -0+00b0 <[^>]*> 40803003 mtc0 \$0,\$6,3 -0+00b4 <[^>]*> 40803004 mtc0 \$0,\$6,4 -0+00b8 <[^>]*> 40803005 mtc0 \$0,\$6,5 +0+00a8 <[^>]*> 40803001 mtc0 \$0,c0_srsconf0 +0+00ac <[^>]*> 40803002 mtc0 \$0,c0_srsconf1 +0+00b0 <[^>]*> 40803003 mtc0 \$0,c0_srsconf2 +0+00b4 <[^>]*> 40803004 mtc0 \$0,c0_srsconf3 +0+00b8 <[^>]*> 40803005 mtc0 \$0,c0_srsconf4 0+00bc <[^>]*> 40803006 mtc0 \$0,\$6,6 0+00c0 <[^>]*> 40803007 mtc0 \$0,\$6,7 0+00c4 <[^>]*> 40803801 mtc0 \$0,\$7,1 |