| Commit message (Collapse) | Author | Age | Files | Lines |
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of an architecture-specific test first and use it if found,
before falling back to the generic one.
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branch-likely instructions and place them...
* gas/mips/mips4-branch-likely.d, gas/mips/mips4-branch-likely.s:
... in this new test.
* gas/mips/mips4-fp.l: Update accordingly.
* gas/mips/mips4-branch-likely.l: New stderr output for the new
test.
* gas/mips/mips.exp (mips4-branch-likely): Run a dump test and
a list test with mips4-branch-likely similarly to mips4-fp.
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branch-likely instructions.
* gas/mips/bge.d, gas/mips/bge.s: Likewise.
* gas/mips/bgeu.d, gas/mips/bgeu.s: Likewise.
* gas/mips/blt.d, gas/mips/blt.s: Likewise.
* gas/mips/bltu.d, gas/mips/bltu.s: Likewise.
* gas/mips/branch-likely.d, gas/mips/branch-likely.s: New test,
collecting checks for branch-likely instructions removed from
the above.
* gas/mips/mips.exp: Run the new test and update the
constraints for the updated tests to include MIPS I.
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* gas/mips/bge.d, gas/mips/bgeu.d: Likewise.
* gas/mips/blt.d, gas/mips/bltu.d: Likewise.
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change on 2009-02-06.
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gas/testsuite/
2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* gas/i386/rdrnd.s: Replace rdrnd with rdrand.
* gas/i386/rdrnd-intel.d: Likewise.
* gas/i386/rdrnd.d: Likewise.
* gas/i386/x86-64-rdrnd-intel.d: Likewise.
* gas/i386/x86-64-rdrnd.d: Likewise.
* gas/i386/x86-64-rdrnd.s: Likewise.
opcodes/
2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* i386-dis.c (mod_table): Replace rdrnd with rdrand.
* i386-opc.tbl: Likewise.
* i386-tbl.h: Regenerated.
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2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-opc.h (CpuFSGSBase): Fix a typo in comments.
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binutils/testsuite/
2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10531
PR gas/11789
* binutils-all/objdump.W: Remove bogus line debug info.
gas/
2010-07-05 Jim Wilson <wilson@codesourcery.com>
PR gas/10531
PR gas/11789
* dwarf2dbg.c (dwarf2_finish): Don't generate .debug_line section
if it isn't empty.
gas/testsuite/
2010-07-05 H.J. Lu <hongjiu.lu@intel.com>
PR gas/10531
PR gas/11789
* gas/i386/dw2-compress-1.d: Remove bogus line debug info.
* gas/elf/dwarf2-1.d: New.
* gas/elf/dwarf2-1.s: Likewise.
* gas/elf/dwarf2-2.d: Likewise.
* gas/elf/dwarf2-2.s: Likewise.
* gas/elf/dwarf2-3.d: Likewise.
* gas/elf/dwarf2-3.s: Likewise.
* gas/i386/debug1.d: Likewise.
* gas/i386/debug1.s: Likewise.
* gas/elf/elf.exp: Run dwarf2-1, dwarf2-2 and dwarf2-3.
* gas/i386/i386.exp: Run debug1 for both 32bit and 64bit.
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(ppc_elf_finish_dynamic_sections): Don't make plt_entry var static.
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unused var.
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2010-07-04 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/dw2-compress-1.d: New.
* gas/i386/dw2-compress-1.s: Likewise.
* gas/i386/i386.exp: Run dw2-compress-1 for Linux.
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2010-07-04 H.J. Lu <hongjiu.lu@intel.com>
* Makefile.am (CONFIG_OBJS): Removed.
(GENERIC_OBJS): Likewise.
(OBJS): Likewise.
* Makefile.in: Regenerated.
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gas/
2010-07-03 Jan Beulich <jbeulich@novell.com>
PR gas/11732
* config/tc-i386.c (i386_finalize_displacement): Don't call
section_symbol() with expr_section.
gas/testsuite/
2010-07-03 Jan Beulich <jbeulich@novell.com>
PR gas/11732
* gas/i386/i386.exp: Run new tests.
* gas/i386/intel-got{32,64}.{s,d}: New.
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* compress.c (bfd_uncompress_section_contents): Add ATTRIBUTE_UNUSED.
* dwarf2.c (read_and_uncompress_section): New function.
(read_section): Call it.
(find_line): Likewise.
binutils/ChangeLog:
* objdump.c (load_specific_debug_section): Decompress section contents
before applying relocations.
* readelf.c (load_specific_debug_section): Update section size after
decompression.
gas/ChangeLog:
* Makefile.am: Add compress-debug.c and compress-debug.h.
* Makefile.in: Regenerate.
* config.in: Add HAVE_ZLIB_H.
* configure.in: Check for zlib.h.
* configure: Regenerate.
* as.c (parse_args): Add --compress-debug-sections and
--nocompress-debug-sections.
* as.h (flag_compress_debug): New variable.
* compress-debug.c: New file.
* compress-debug.h: New file.
* write.c: Include compress-debug.h.
(compress_frag): New function.
(compress_debug): New function.
(write_object_file): Compress debug sections if requested.
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* config/tc-ppc.c (ppc_set_cpu): Cast PPC_OPCODE_xxx to ppc_cpu_t
before inverting.
binutils/:
* ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
ppc_cpu_t before inverting.
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* ppc.h (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC): Delete.
Renumber other PPC_OPCODE defines.
gas/
* config/tc-ppc.c (ppc_set_cpu): Remove old opcode flags.
(ppc_setup_opcodes): Likewise. Simplify opcode selection.
opcodes/
* ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
* ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
(PPC64, MFDEC2): Update.
(NON32, NO371): Define.
(powerpc_opcode): Update to not use old opcode flags, and avoid
-m601 duplicates.
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* m32c-ibld.c: Regenerate.
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(PPCPWR2): Add PPC_OPCODE_COMMON.
(powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
"fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst",
"rac" from -mcom.
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(MAX_MEM_FOR_RS_ALIGN_CODE): New.
* config/tc-rx.c (nops): New.
(rx_handle_align): Use various sized nops to align code.
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relaxation.
(rx_relax_frag): Prevent infinite loops of grow/shrink/grow/etc.
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gas/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* config/tc-i386.c (cpu_arch): Add .xsaveopt, .fsgsbase, .rdrnd
and .f16c.
* doc/c-i386.texi: Document xsaveopt, fsgsbase, rdrnd and f16c.
gas/testsuite/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* gas/i386/arch-10.s: Add xsaveopt.
* gas/i386/x86-64-arch-2.s: Likwise.
* gas/i386/arch-10.d: Updated.
* gas/i386/arch-10-1.l: Likewise.
* gas/i386/arch-10-2.l: Likewise.
* gas/i386/arch-10-3.l: Likewise.
* gas/i386/arch-10-4.l: Likewise.
* gas/i386/x86-64-arch-2.d: Likewise.
* gas/i386/f16c-intel.d: New.
* gas/i386/f16c.d: Likewise.
* gas/i386/f16c.s: Likewise.
* gas/i386/fsgs-intel.d: Likewise.
* gas/i386/fsgs.d: Likewise.
* gas/i386/fsgs.s: Likewise.
* gas/i386/rdrnd-intel.d: Likewise.
* gas/i386/rdrnd.d: Likewise.
* gas/i386/rdrnd.s: Likewise.
* gas/i386/x86-64-f16c-intel.d: Likewise.
* gas/i386/x86-64-f16c.d: Likewise.
* gas/i386/x86-64-f16c.s: Likewise.
* gas/i386/x86-64-fsgs-intel.d: Likewise.
* gas/i386/x86-64-fsgs.d: Likewise.
* gas/i386/x86-64-fsgs.s: Likewise.
* gas/i386/x86-64-rdrnd-intel.d: Likewise.
* gas/i386/x86-64-rdrnd.d: Likewise.
* gas/i386/x86-64-rdrnd.s: Likewise.
* gas/i386/i386.exp: Run f16c, f16c-intel, fsgs, fsgs-intel,
rdrnd, rdrnd-intel, x86-64-f16c, x86-64-f16c-intel, x86-64-fsgs,
x86-64-fsgs-intel, x86-64-rdrnd, x86-64-rdrnd-intel.
* gas/i386/x86-64-xsave.s: Add tests for xsaveopt64.
* gas/i386/x86-64-xsave-intel.d: Updated.
* gas/i386/x86-64-xsave.d: Likewise.
opcodes/
2010-07-01 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (June, 2010)
* i386-dis.c (PREFIX_0FAE_REG_0): New.
(PREFIX_0FAE_REG_1): Likewise.
(PREFIX_0FAE_REG_2): Likewise.
(PREFIX_0FAE_REG_3): Likewise.
(PREFIX_VEX_3813): Likewise.
(PREFIX_VEX_3A1D): Likewise.
(prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
PREFIX_VEX_3A1D.
(vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
(mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
* i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
(cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
* i386-opc.h (CpuXsaveopt): New.
(CpuFSGSBase):Likewise.
(CpuRdRnd): Likewise.
(CpuF16C): Likewise.
(i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
cpuf16c.
* i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
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any other options in $ld.
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deprecated mov register instructions.
* gas/testsuite/gas/arm/thumb2_bad_reg.s: Update mov register tests.
* gas/testsuite/gas/arm/thumb2_bad_reg.l: Likewise.
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than SYMBOL_REFERENCES_LOCAL.
(ppc64_elf_relocate_section): Likewise.
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(md_assemble): Set it.
(ppc_frob_file_before_adjust): Don't warn about toc section size
if we have large toc relocs and no small toc relocs.
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and mtocrf on EFS.
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* arm-reloc-property.cc (Arm_reloc_property::Arm_reloc_property):
Initialize USE_SYMBOL_.
* arm-reloc-property.h (Arm_reloc_property::uses_symbol): New method
definition.
(Arm_reloc_property::uses_symbol_): New data member declaration.
* arm.cc (Target_arm::Relocate::relocate): Exit early if relocation
uses symbol value and symbol is undefined but not weakly undefined.
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with the .gcc_except_table. prefix.
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* objcopy.c (is_strip_section): Revert 2006-09-05.
(setup_section): Make SHT_GROUP section nobits.
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* plugin.cc (Plugin::load): Use dlerror.
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