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* 2012-07-27 Sean Keys <skeys@ipdatasys.com>seank2012-07-271-53/+49
| | | | | | | | | | | gas/config/ * tc-xgate.c: Consolidated inc/dec/hi/low modifieres into one function. (xgate_parse_operand): Added %hi and %lo handling. gas/testsuite/gas/xgate * xgate.exp: Added hi/lo test. * hilo.d: New test file * hilo.s: Net test source file.
* 2012-07-27 James Murray <jsm@jsm-net.demon.co.uk>seank2012-07-271-1/+1
| | | | * config/tc-m68hc11.c: Replace binary with hex for cygwin.
* MASM accepts ESP/RSP being specified second in a memory addressJan Beulich2012-07-251-1/+15
| | | | | | | | | | | | | | operand, by silently making it the base register despite not being specified first. Consequently, we also permit an xmm/ymm index to be specified first (possibly alone), nevertheless putting it in as index register. 2012-07-24 Jan Beulich <jbeulich@suse.com> * config/tc-i386-intel.c (i386_intel_simplify_register): Handle xmm/ymm index register being specified first as well as esp/rsp base register being specified last in a memory operand.
* Using the dedicated manifest constant is more descriptive.Jan Beulich2012-07-251-2/+2
| | | | | | | 2012-07-24 Jan Beulich <jbeulich@suse.com> * config/tc-i386-intel.c (i386_intel_simplify_register): Replace literal 4 by corresponding ESP_REG_NUM.
* 2012-07-24 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore2012-07-241-5/+14
| | | | | | | | | | | | Jie Zhang <jzhang918@gmail.com> gas/ * config/tc-arm.c (md_apply_fix): Use encoding A2 of ADR if offset is negative. gas/testsuite/ * gas/arm/adr.d: New test. * gas/arm/adr.s: New test.
* Implement RDRSEED, ADX and PRFCHW instructionsH.J. Lu2012-07-161-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gas/ * config/tc-i386.c: Add ADX, RDSEED and PRFCHW asm directives. * doc/c-i386.texi: Document the new directives. gas/testsuite/ * gas/i386/i386.exp: Run adx, rdseed and prefetchw tests. * gas/i386/x86-64-arch-2.s: Use prefetchw as 3dnow and Prfchw tests. * gas/i386/arch-10.s: Likewise. * gas/i386/arch-10-1.l: Changed correspondingly. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/arch-10.d: Likewise. * gas/i386/arch-10-lzcnt.d: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/x86-64-arch-2-lzcnt.d: Likewise. * gas/i386/ilp32/x86-64-arch-2.d: Likewise. * gas/i386/arch-10-prefetchw.d: New file. * gas/i386/x86-64-arch-2-prefetchw.d: Likewise. * gas/i386/rdseed.s: Likewise. * gas/i386/rdseed.d: Likewise. * gas/i386/rdseed-intel.d: Likewise. * gas/i386/adx.s: Likewise. * gas/i386/adx.d: Likewise. * gas/i386/adx-intel.d: Likewise. * gas/i386/x86-64-rdseed.s: Likewise. * gas/i386/x86-64-rdseed.d: Likewise. * gas/i386/x86-64-rdseed-intel.d: Likewise. * gas/i386/x86-64-adx.s: Likewise. * gas/i386/x86-64-adx.d: Likewise. * gas/i386/x86-64-adx-intel.d: Likewise. opcodes/ * i386-dis.c (PREFIX_0F38F6): New. (prefix_table): Add adcx, adox instructions. (three_byte_table): Use PREFIX_0F38F6. (mod_table): Add rdseed instruction. * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW. (cpu_flags): Likewise. * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW. (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw. * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend prefetchw. * i386-tbl.h: Regenerate. * i386-init.h: Likewise.
* gas/config/seank2012-07-051-425/+362
| | | | | | | | | | | | | | | | * tc-xgate.c: Revised assembler so that operands are collected before the addressing mode is determined. include/opcode/ * xgate.h: Changed the format string for mode XGATE_OP_DYA_MON. opcodes/ * xgate-dis.c: Removed an IF statement that will always be false due to overlapping operand masks. * xgate-opc.c: Corrected 'com' opcode entry and fixed spacing.
* * write.c (fixup_segment): Only perform the subtraction of anNick Clifton2012-07-021-0/+2
| | | | | | fx_subsy symbol if MD_APPLY_SYM_VALUE allows it and the symbol is properly defined. * config/tc-msp430.h (MD_APPLY_SYM_VALUE): Define.
* PR gas/14315Alan Modra2012-06-301-1/+0
| | | | * config/obj-elf.c (obj_elf_weak): Don't set local.
* PR gas/14263Nick Clifton2012-06-291-1/+1
| | | | * config/tc-arm.c (parse_operands): Initialise val.
* gas/config/seank2012-06-282-0/+25
| | | | | | | | | | | * tc-xgate.h: Defined tc_frob_symbol. * tc-xgate.c (xgate_frob_symbol): Wrote new function to mark symbols as being XGATE by setting st_target_internal value. bfd/ * elf32-xgate.c (elf32_xgate_add_symbol_hook): Added a temp patch that forces st_target_internal to equal 1, since tc_frob_symbol seems to need adjusting.
* PR gas/14260Nick Clifton2012-06-281-12/+16
| | | | | | | | | | * config/tc-arm.c (encode_arm_addr_mode_common): Generate an error message if literal pool addressing is used. * gas/arm/ldr-t-bad.s: Add test of bogus use of literal pool addressing. * gas/arm/ldr-t-bad.l: Update expected assembler error message output.
* * dwarf2dbg.c (DWARF2_USE_FIXED_ADVANCE_PC): Enable when usingNick Clifton2012-06-281-0/+1
| | | | | | | | | | | | | | | | | | | | linker relaxation. (dwarf2_gen_line_info): Generate real, local, labels for line numbers. (dwarf2dbg_convert_frag): Do not finalize the computation of the frag's symbol value when linker relaxation is enabled. (ADDR_DELTA_LIMIT): Define. (size_fixed_inc_line_addr): Use ADDR_DELTA_LIMIT. (emit_fixed_inc_line_addr): Likewise. * write.c (fixup_segment): If the subtraction of two symbols cannot be resolved but is valid, then prevent bogus range warnings by pre-biasing add_number. * config/tc-h8300.h (DWARF2_USE_FIXED_ADVANCE_PC): Define to 0. * gas/lns/lns.exp: Use alternate lns-common test for targets enabling linker relaxation. * gas/lns/lns-big-delta.d: Allow for output from architectures with 32-bit addresses.
* gas/Roland McGrath2012-06-221-3/+3
| | | | | | | | | | | | | | | | | | | * config/tc-i386.c (parse_insn): Don't complain about REP prefix when the template has opcode_modifier.repprefixok set. * NEWS: Mention the change. gas/testsuite/ * gas/i386/rep-bsf.d: New file. * gas/i386/rep-bsf.s: New file. * gas/i386/i386.exp: Add the new test. opcodes/ * i386-opc.h (RepPrefixOk): New enum constant. (i386_opcode_modifier): New bitfield 'repprefixok'. * i386-gen.c (opcode_modifiers): Add RepPrefixOk. * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all instructions that have IsString. * i386-tbl.h: Regenerate.
* Fix .dc.a for x32H.J. Lu2012-06-132-0/+14
| | | | | | | | | | | | | gas/ * config/tc-i386.c (x86_address_bytes): New. * config/tc-i386.h (TC_ADDRESS_BYTES): Likewise. (x86_address_bytes): Likewise. gas/testsuite/ * gas/i386/ilp32/x86-64-dc_a.d: New. * gas/i386/ilp32/x86-64-dc_a.s: Likewise.
* PR gas/12698Nick Clifton2012-06-131-8/+18
| | | | | | * config/tc-arm.c (do_t_mrs): Do not require an m-profile architecure when assembling for all archiectures. (do_t_msr): Likewise.
* PR 13503Nick Clifton2012-06-111-1/+1
| | | | | * config/tc-avr.c (exp_mod): Fix typo introduced in 1.82 from 2012-05-16.
* gas/seank2012-05-311-28/+24
| | | | * tc-xgate.c (md_begin): Refactored code.
* gas: mips: fix segfault with invalid default cpu stringsMike Frysinger2012-05-221-1/+4
| | | | | | | | | | | | | | | | | If you configure gas for a mips32el-* target, the default cpu calculation gets mangled, and we end up passing and invalid value as the default cpu. If you try executing gas after that, it segfaults. This is because it assumes that the default cpu value is always valid. $ ./gas/as-new Assembler messages: Error: Bad value (2) for default CPU Segmentation fault (core dumped) I'm not debating that the target tuple is valid, just that gas shouldn't crash. So add a friendly assert to avoid that. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* * config/obj-elf.c (obj_elf_section): Cater for TC_KEEP_OPERAND_SPACESAlan Modra2012-05-191-3/+8
| | | | targets when checking for "comdat".
* * config/tc-dlx.c (s_proc): Don't use asprintf.Alan Modra2012-05-181-2/+4
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* * config/tc-dlx.c (s_proc): Avoid warning about ignoring asprintfAlan Modra2012-05-181-1/+4
| | | | return value.
* * config/tc-ppc.c: Don't capitalise error and warning messages.Alan Modra2012-05-181-24/+31
| | | | (md_parse_option): Add checks for -a32 -mvle.
* * config/obj-evax.c: Include as.h first.Alan Modra2012-05-181-2/+3
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* PR 14072Nick Clifton2012-05-1712-31/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * sysdep.h: Generate an error if included before config.h. * alpha-opc.c: Include sysdep.h before any other header file. * alpha-dis.c: Likewise. * avr-dis.c: Likewise. * cgen-opc.c: Likewise. * cr16-dis.c: Likewise. * cris-dis.c: Likewise. * crx-dis.c: Likewise. * d10v-dis.c: Likewise. * d10v-opc.c: Likewise. * d30v-dis.c: Likewise. * d30v-opc.c: Likewise. * h8500-dis.c: Likewise. * i370-dis.c: Likewise. * i370-opc.c: Likewise. * m10200-dis.c: Likewise. * m10300-dis.c: Likewise. * micromips-opc.c: Likewise. * mips-opc.c: Likewise. * mips61-opc.c: Likewise. * moxie-dis.c: Likewise. * or32-opc.c: Likewise. * pj-dis.c: Likewise. * ppc-dis.c: Likewise. * ppc-opc.c: Likewise. * s390-dis.c: Likewise. * sh-dis.c: Likewise. * sh64-dis.c: Likewise. * sparc-dis.c: Likewise. * sparc-opc.c: Likewise. * spu-dis.c: Likewise. * tic30-dis.c: Likewise. * tic54x-dis.c: Likewise. * tic80-dis.c: Likewise. * tic80-opc.c: Likewise. * tilegx-dis.c: Likewise. * tilepro-dis.c: Likewise. * v850-dis.c: Likewise. * v850-opc.c: Likewise. * vax-dis.c: Likewise. * w65-dis.c: Likewise. * xgate-dis.c: Likewise. * xtensa-dis.c: Likewise. * rl78-decode.opc: Likewise. * rl78-decode.c: Regenerate. * rx-decode.opc: Likewise. * rx-decode.c: Regenerate. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * sysdep.h: Generate an error if included before config.h. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * aclocal.m4: Regenerate. * bfd-in.h: Generate an error if included before config.h. * sysdep.h: Likewise. * bfd-in2.h: Regenerate. * compress.c: Remove #include "config.h". * plugin.c: Likewise. * elf32-m68hc1x.c: Include sysdep.h before alloca-conf.h. * elf64-hppa.c: Likewise. * som.c: Likewise. * xsymc.c: Likewise. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * aclocal.m4: Regenerate. * Makefile.am: Use wrappers around C files generated by flex. * Makefile.in: Regenerate. * doc/Makefile.in: Regenerate. * itbl-lex-wrapper.c: New file. * config/bfin-lex-wrapper.c: New file. * cgen.c: Include as.h before setjmp.h. * config/tc-dlx.c: Include as.h before any other header. * config/tc-h8300.c: Likewise. * config/tc-lm32.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-microblaze.c: Likewise. * config/tc-mmix.c: Likewise. * config/tc-msp430.c: Likewise. * config/tc-or32.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-xtensa.c: Likewise. * configure.in: Add check that sysdep.h has been included before any system header files. * configure: Regenerate. * config.in: Regenerate. * unwind-ia64.h: Include config.h.
* * bfd-in.h (bfd_get_section_name, bfd_get_section_vma,Nick Clifton2012-05-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | bfd_get_section_lma, bfd_get_section_alignment, bfd_get_section_flags, bfd_get_section_userdata): Rewrite macros in order to use the `bfd' argument. * bfd-in2.h: Regenerate. * elf-vxworks.c (elf_vxworks_finish_dynamic_entry): Pass proper `bfd' as the first argument for `bfd_get_section_alignment'. * elf32-arm.c (create_ifunc_sections): Likewise, for `bfd_set_section_alignment'. * elf32-m32r.c (m32r_elf_relocate_section): Likewise, for `bfd_get_section_name'. * elf32-microblaze.c (microblaze_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise. (ppc_elf_relocate_section): Likewise. * elf64-mmix.c (mmix_final_link_relocate): Likewise, for `bfd_get_section_vma'. * elf64-ppc.c (create_linkage_sections): Likewise, for `bfd_set_section_alignment'. * emultempl/m68hc1xelf.em (hook_in_stub): Pass proper `bfd' as the first argument for `bfd_get_section_name'. * config/tc-alpha.c (maybe_set_gp): Pass proper `bfd' as the first argument for `bfd_get_section_vma'.
* PR 13503Nick Clifton2012-05-161-8/+8
| | | | | | | | | | | | | | | | * reloc.c: Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO. * bfd-in2.h: Regenerate. * libbfd.h: Regenrate. * elf32-avr.c (elf_avr_howto_table): Rename R_AVR_8_HHI8 to R_AVR_8_HLO8. (avr_reloc_map): Ditto. * config/tc-avr.c (avr_cons_fix_new): Rename R_AVR_8_HHI8 to R_AVR_8_HLO8. (exp_mod_data) Ditto. And replace "hhi8" with "hlo8". (md_apply_fix): Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO. * avr.h (RELOC_NUMBERS): Rename R_AVR_8_HHI8 to R_AVR_8_HLO8.
* * config/tc-m68k.c (m68k_cpus): Add 51ag, 51je, 51jf, 51jg, 51mm,Nathan Sidwell2012-05-161-0/+6
| | | | 51qm variants.
* Rewrote a loop that caused a seg fault on Windows systems.seank2012-05-151-1/+1
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* * config/tc-m68hc11.c: Add S12X and XGATE co-processor support.Nick Clifton2012-05-151-176/+1393
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add option to offset S12 addresses into XGATE memory space. Tweak target flags to match other tools. (i.e. -m m68hc11). * doc/as.texinfo: Mention new options. * doc/c-m68hc11.texi: Document new options. * NEWS: Mention new support. * archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg. * config.bfd: Likewise. * cpu-m9s12x.c: New. * cpu-m9s12xg.c: New. * elf32-m68hc12.c: Add S12X and XGATE co-processor support. Add option to offset S12 addresses into XGATE memory space. Fix carry bug in IMM16 (IMM8 low/high) relocate. * Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg. (ALL_MACHINES_CFILES): Likewise. * reloc.c: Add S12X relocs. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * gas/m68hc11/insns9s12x.s: New * gas/m68hc11/insns9s12x.d: New * gas/m68hc11/hexprefix.s: New * gas/m68hc11/hexprefix.d: New * gas/m68hc11/9s12x-exg-sex-tfr.s: New * gas/m68hc11/9s12x-exg-sex-tfr.d: New * gas/m68hc11/insns9s12xg.s: New * gas/m68hc11/insns9s12xg.d: New * gas/m68hc11/9s12x-mov.s: New * gas/m68hc11/9s12x-mov.d: New * gas/m68hc11/m68hc11.exp: Updated * gas/m68hc11/*.d: Brought in line with changed objdump output. * gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3. * gas/elf/elf.exp: XFAIL all hc11/12 targets for redef. * gas/elf/dwarf2-1.d: Skip for hc11/12 targets. * gas/elf/dwarf2-2.d: Likewise. * ld-m68hc11/xgate-link.s: New. * ld-m68hc11/xgate-link.d: New. * ld-m68hc11/xgate-offset.s: New. * ld-m68hc11/xgate-offset.d: New. * ld-m68hc11/xgate1.s: New. * ld-m68hc11/xgate1.d: New. * ld-m68hc11/xgate2.s: New. * ld-m68hc11/m68hc11.exp: Updated. * ld-m68hc11/*.d: Brought in line with changed objdump output. * ld-gc/gc.exp: Update CFLAGS for m68hc11. * ld-plugin/plugin.exp: Likewise. * ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12. * configure.in: Add S12X and XGATE co-processor support to m68hc11 target. * disassemble.c: Likewise. * configure: Regenerate. * m68hc11-dis.c: Make objdump output more consistent, use hex instead of decimal and use 0x prefix for hex. * m68hc11-opc.c: Add S12X and XGATE opcodes. * dis-asm.h (print_insn_m9s12x): Prototype. (print_insn_m9s12xg): Prototype. * m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10) R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations. (E_M68HC11_XGATE_RAMOFFSET): Define. * m68hc11.h: Add XGate definitions. (struct m68hc11_opcode): Add xg_mask field.
* * config/rx-parse.y (rx_range): declare.DJ Delorie2012-05-151-8/+22
| | | | | | | (O1,O2,O3,O4): Add calls to rx_range. (UO1,UO2,UO3): Likewise. (IMM2,IMMB): Likewise. (rx_range): New.
* * config/tc-rx.c (rx_fetchalign): Declare.DJ Delorie2012-05-151-3/+96
| | | | | | | | | | | | | | (md_pseudo_table): Add .fetchalign. (RX_NBASE_FETCHALIGN): New. (fetchalign_bytes): New. (rx_fetchalign): New. (rx_frag_init): If a "magic" value is found, also init the machine-specific data. (md_assemble): Note following opcode size if called for. (rx_next_opcode): New. (rx_relax_frag): Support .fetchalign. (md_convert_frag): Likewise. * doc/c-rx.texi (RX-Directives): Add .fetchalign.
* Add support for PowerPC VLE.jwlemke2012-05-142-93/+463
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
* Remove x32 addend overflow for BFD_RELOC_64H.J. Lu2012-05-121-19/+0
| | | | | | | | | | | | | | | | | gas/ * config/tc-i386.c (tc_gen_reloc): Remove x32 addend overflow for BFD_RELOC_64. gas/testsuite/ * gas/i386/ilp32/ilp32.exp: Don't run reloc64-inval. * gas/i386/ilp32/reloc64.s: Add test for -4294967295 addend. * gas/i386/ilp32/reloc64.d: Updated. * gas/i386/ilp32/reloc64-inval.l: Removed. * gas/i386/ilp32/reloc64-inval.s: Likewise.
* PR 13503Nick Clifton2012-05-111-35/+95
| | | | | | | | | | | | | | | | | | | | | | | | | * reloc.c: Add new ENUM for BFD_RELOC_AVR_8_LO, BFD_RELOC_AVR_8_HI, BFD_RELOC_AVR_8_HHI. * bfd-in2.h: Regenerate. * libbfd.h: Regenrate. * elf32-avr.c (elf_avr_howto_table): Add entries for R_AVR_8_LO8, R_AVR_8_HI8, R_AVR_8_HHI8. (avr_reloc_map): Add RELOC mappings for R_AVR_8_LO8, R_AVR_8_HI8, R_AVR_8_HHI8. * config/tc-avr.c (exp_mod_pm): Remove variable. (exp_mod_data_t): New typedef. (pexp_mod_data, exp_mod_data): New variables. (avr_parse_cons_expression): Scan through exp_mod_data[] to find data expression modifiers "pm", "gs", "lo8", hi8", "hhi8", "hh8" and set pexp_mod_data accordingly to be used in avr_cons_fix_new. (avr_cons_fix_new): Handle new data expression modifiers shipped in pexp_mod_data. (md_apply_fix): Handle BFD_RELOC_AVR_8_LO, BFD_RELOC_AVR_8_HI, BFD_RELOC_AVR_8_HHI. * elf/avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8, R_AVR_8_HI8, R_AVR_8_HHI8.
* Use int and bfd_signed_vma in x32 addend overflow checkH.J. Lu2012-05-111-3/+5
| | | | | | | | | | | | bfd/ * elf64-x86-64.c (elf_x86_64_relocate_section): Use int in x32 addend overflow check. gas/ * config/tc-i386.c (tc_gen_reloc): Use bfd_signed_vma in x32 addend overflow check.
* Display signed hex number in x32 addend overflow checkH.J. Lu2012-05-101-4/+11
| | | | | | | | | | | | | | | | bfd/ * elf64-x86-64.c (elf_x86_64_relocate_section): Display signed hex number in x32 addend overflow check. gas/ * config/tc-i386.c (tc_gen_reloc): Display signed hex number in x32 addend overflow check. ld/testsuite/ * ld-x86-64/ilp32-11.d: Updated.
* Use fits_in_signed_long to check x32 addend overflowH.J. Lu2012-05-101-2/+1
| | | | * config/tc-i386.c (tc_gen_reloc): Use fits_in_signed_long.
* Check 64-bit relocation addend overflow for x32H.J. Lu2012-05-101-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | bfd/ * elf64-x86-64.c (elf_x86_64_relocate_section): Check addend overflow for R_X86_64_RELATIVE64. gas/ * config/tc-i386.c (tc_gen_reloc): Check x32 addend overflow for BFD_RELOC_64. gas/testsuite/ * gas/i386/ilp32/ilp32.exp: Run reloc64-inval. * gas/i386/ilp32/reloc64.s: Add tests for ".quad". * gas/i386/ilp32/reloc64.d: Updated. * gas/i386/ilp32/reloc64-inval.l: New file. * gas/i386/ilp32/reloc64-inval.s: Likewise. ld/testsuite/ * ld-x86-64/ilp32-11.d: New file. * ld-x86-64/ilp32-11.s: Likewise. * ld-x86-64/x86-64.exp: Run ilp32-11.
* 2012-05-06 Arnold Metselaar <arnold_m@operamail.com>Arnold Metselaar2012-05-062-135/+171
| | | | | | | | | | | | * config/tc-z80.h(md_register_arithmetic): Define as 0. * config/tc-z80.c(md_begin): Store register names in symbol table, prevents usage as ordinary symbol. * config/tc-z80.c(contains_register): New function. * config/tc-z80.c(parse_exp2): Removed. * config/tc-z80.c(parse_exp_not_indexed): New function. * config/tc-z80.c(parse_exp): Add code to recogize indexed addressing after parsing. * config/tc-z80.c(emit_byte, emit_word): Use contains_register. * config/tc-z80.c(emit_jp): Use parse_exp_not_indexed, simplify condition for jump to register. * config/tc-z80.c(emit_call, emit_jr, emit_ex, emit_rst): Use parse_exp_not_indexed.
* Replace all uses of bfd_abs_section, bfd_com_section, bfd_und_sectionAlan Modra2012-05-0511-36/+37
| | | | | and bfd_ind_section with their _ptr variants, or use corresponding bfd_is_* macros.
* Add `instruction' to unsupported error messageH.J. Lu2012-05-041-1/+1
| | | | | * config/tc-i386.c (match_template): Add `instruction' to unsupported error message.
* Reformat output_insnH.J. Lu2012-05-041-1/+1
| | | | * config/tc-i386.c (output_insn): Reformat.
* Remove the extra VEX checkH.J. Lu2012-05-041-2/+1
| | | | * config/tc-i386.c (output_insn): Remove the extra VEX check.
* Improve unsupported error messageH.J. Lu2012-05-041-2/+3
| | | | | * config/tc-i386.c (match_template): Improve unsupported error message.
* Add support for Motorola XGATE embedded CPUNick Clifton2012-05-032-0/+1527
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* * config/rx-parse.y (rx_intop): Add parameter for operation size.DJ Delorie2012-04-301-11/+18
| | | | | | | Check for large positive constants really being small negative ones. (BRA, BSR): Update calls to rx_intop. (immediate): Likewise.
* gas: Make dwarf2dbg.c versions specific and add DW_AT_high_pc case for DWARF 4+.mark2012-04-301-0/+1
| | | | | | | | | | | | * dwarf2dbg.c (DWARF2_ARANGES_VERSION): New define to 2. (DWARF2_LINE_VERSION): Likewise. (out_debug_line): Use DWARF2_LINE_VERSION not DWARF2_VERSION. (out_debug_aranges): Use DWARF2_ARANGES_VERSION not DWARF2_VERSION. (out_debug_abbrev): Use DW_FORM_data for DW_AT_high_pc when DWARF2_VERSION >= 4. (out_debug_info): Use difference between start and end as data value for DW_AT_high_pc when DWARF2_VERSION >= 4. * config/tc-ia64.h (DWARF2_LINE_VERSION): Override it.
* Add support for sparc %cfr ASR register.David S. Miller2012-04-271-0/+1
| | | | | | | | | | | | | | | | | opcodes/ * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'. * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr. gas/ * config/tc-sparc.c (v9a_asr_table): Add 'cfr'. gas/testsuite/ * gas/sparc/sparc.exp: Run cfr test. * gas/sparc/cfr.s: New testcase. * gas/sparc/cfr.d: Likewise.
* Add support for sparc pause instruction.David S. Miller2012-04-271-5/+6
| | | | | | | | | | | | | | | | | | | opcodes/ * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'. * sparc-dis.c (v9a_asr_reg_names): Add 'pause'. gas/ * config/tc-sparc.c (sparc_arch_table): Add HWCAP_PAUSE to sparc4, v8pluse, v8plusv, v9e, and v9v. (v9a_asr_table): Add 'pause'. gas/testsuite/ * gas/sparc/sparc.exp: Run pause test. * gas/sparc/pause.s: New testcase. * gas/sparc/pause.d: Likewise.
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