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* * symbols.c (symbol_clone_if_forward_ref): Call tc_new_dot_labelMaciej W. Rozycki2010-12-161-0/+5
| | | | | | | | | | | | | for new fake labels created off the dot special symbol. * config/tc-mips.h (tc_new_dot_label): New macro. (mips_record_label): New prototype. * config/tc-mips.c (my_getExpression): Remove MIPS16 fake label annotation. (s_cons, s_float_cons, s_gpword, s_gpdword): Only clear labels recorded once data expressions have been evaluated. (mips_define_label): Move code to record labels over to... (mips_record_label): ... this new function. * doc/internals.texi: Document tc_new_dot_label.
* gas: bfin: convert to new doc styleMike Frysinger2010-11-242-11/+19
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* 2010-11-23 Sterling Augustine <sterling@tensilica.com>Sterling Augustine2010-11-232-47/+31
| | | | | | * doc/as.texinfo: Refer to and include c-xtensa.texi for Xtensa options. Move Xtensa options to proper alphabetical location. * doc/c-xtensa.texi: Add markup for use in manpage generation.
* Refer to and include c-i386.texi for i386 options.H.J. Lu2010-11-232-1/+26
| | | | | | | | | 2010-11-23 H.J. Lu <hongjiu.lu@intel.com> * doc/as.texinfo: Refer to and include c-i386.texi for i386 options. * doc/c-i386.texi: Add markup for use in manpage generation.
* * doc/as.texinfo: Refer to or include c-alpha.texi for AlphaJoseph Myers2010-11-223-60/+44
| | | | | | | options. Refer to or include c-tic6x.texi for C6X options instead of duplicating documentation here. * doc/c-alpha.texi, doc/c-tic6x.texi: Add markup for use in manpage generation.
* bfd/Nick Clifton2010-11-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | * archures.c (bfd_mach_mips_loongson_3a): Defined. * bfd-in2.h (bfd_mach_mips_loongson_3a): Defined. * cpu-mips.c (I_loongson_3a): New add. (arch_info_struct): Add loongson_3a. * elfxx-mips.c (_bfd_elf_mips_mach): Add loongson_3a. (mips_set_isa_flags): Add loongson_3a. (mips_mach_extensions): Add loongson_3a in MIPS64 extensions. binutils/ * readelf.c (get_machine_flags): Add loongson-3a. gas/ * config/tc-mips.c (mips_cpu_info_table): Add loongson3a in MIPS 64. * doc/c-mips.texi (MIPS cpu): Add loongson3a. include/ * elf/mips.h (E_MIPS_MACH_LS3A): Defined. * opcode/mips.h (INSN_LOONGSON_3A): Defined. (CPU_LOONGSON_3A): Defined. (OPCODE_IS_MEMBER): Add LOONGSON_3A. opcodes/ * mips-dis.c (mips_arch_choices): Add loongson3a. * mips-opc.c (IL3A): Defined as INSN_LOONGSON_3A. (mips_builtin_opcodes): Modify some instructions' membership from IL2F to IL2F|IL3A, since these instructions are supported by Loongson_3A.
* bfd:Joseph Myers2010-11-022-1/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * elf32-tic6x.c (elf32_tic6x_obj_attrs_arg_type): Except for Tag_ABI_compatibility, treat odd tags as strings and even ones as integers. (elf32_tic6x_obj_attrs_order, elf32_tic6x_tag_to_array_alignment, elf32_tic6x_array_alignment_to_tag): New. (elf32_tic6x_merge_attributes): Handle more attributes. Set type for merged attributes. (elf_backend_obj_attrs_order): Define. binutils: * readelf.c (display_tic6x_attribute): Handle more attributes. gas: * config/tc-tic6x.c (OPTION_MPID, OPTION_MPIC, OPTION_MNO_PIC): New enum values. (md_longopts): Add options mpid, mpic and mno-pic. (tic6x_pid_type, tic6x_pid, tic6x_pic, tic6x_pid_type_table, tic6x_pid_types, tic6x_use_pid): New. (md_parse_option): Handle new options. (md_show_usage): Output help text for new options. (tic6x_set_attributes): Set PID and PIC attributes. * doc/as.texinfo: Document -mpid=, -mpic and -mno-pic. * doc/c-tic6x.texi (TIC6X Options): Likewise. gas/testsuite: * gas/tic6x/attr-array-directive-1.d, gas/tic6x/attr-array-directive-1.s, gas/tic6x/attr-array-directive-2.d, gas/tic6x/attr-array-directive-2.s, gas/tic6x/attr-array-directive-3.d, gas/tic6x/attr-array-directive-3.s, gas/tic6x/attr-array-directive-4.d, gas/tic6x/attr-array-directive-4.s, gas/tic6x/attr-conformance-directive-1.d, gas/tic6x/attr-conformance-directive-1.s, gas/tic6x/attr-conformance-directive-2.d, gas/tic6x/attr-conformance-directive-2.s, gas/tic6x/attr-pic-directive-1.d, gas/tic6x/attr-pic-directive-1.s, gas/tic6x/attr-pic-directive-2.d, gas/tic6x/attr-pic-directive-2.s, gas/tic6x/attr-pic-opts-mno-pic.d, gas/tic6x/attr-pic-opts-mpic.d, gas/tic6x/attr-pid-directive-1.d, gas/tic6x/attr-pid-directive-1.s, gas/tic6x/attr-pid-directive-2.d, gas/tic6x/attr-pid-directive-2.s, gas/tic6x/attr-pid-opts-mpid-far.d, gas/tic6x/attr-pid-opts-mpid-near.d, gas/tic6x/attr-pid-opts-mpid-no.d, gas/tic6x/attr-stack-directive-1.d, gas/tic6x/attr-stack-directive-1.s, gas/tic6x/attr-stack-directive-2.d, gas/tic6x/attr-stack-directive-2.s, gas/tic6x/attr-wchar-directive-1.d, gas/tic6x/attr-wchar-directive-1.s, gas/tic6x/attr-wchar-directive-2.d, gas/tic6x/attr-wchar-directive-2.s: New tests. include/elf: * tic6x-attrs.h (Tag_ABI_wchar_t, Tag_ABI_stack_align_needed, Tag_ABI_stack_align_preserved, Tag_ABI_PID, Tag_ABI_PIC, Tag_ABI_array_object_alignment, Tag_ABI_array_object_align_expected, Tag_ABI_conformance): Define. ld/testsuite: * ld-tic6x/attr-array-16-16.d, ld-tic6x/attr-array-16-4.d, ld-tic6x/attr-array-16-416.d, ld-tic6x/attr-array-16-48.d, ld-tic6x/attr-array-16-8.d, ld-tic6x/attr-array-16-816.d, ld-tic6x/attr-array-16.s, ld-tic6x/attr-array-4-16.d, ld-tic6x/attr-array-4-4.d, ld-tic6x/attr-array-4-416.d, ld-tic6x/attr-array-4-48.d, ld-tic6x/attr-array-4-8.d, ld-tic6x/attr-array-4-816.d, ld-tic6x/attr-array-4.s, ld-tic6x/attr-array-416-16.d, ld-tic6x/attr-array-416-4.d, ld-tic6x/attr-array-416-416.d, ld-tic6x/attr-array-416-48.d, ld-tic6x/attr-array-416-8.d, ld-tic6x/attr-array-416-816.d, ld-tic6x/attr-array-416.s, ld-tic6x/attr-array-48-16.d, ld-tic6x/attr-array-48-4.d, ld-tic6x/attr-array-48-416.d, ld-tic6x/attr-array-48-48.d, ld-tic6x/attr-array-48-8.d, ld-tic6x/attr-array-48-816.d, ld-tic6x/attr-array-48.s, ld-tic6x/attr-array-8-16.d, ld-tic6x/attr-array-8-4.d, ld-tic6x/attr-array-8-416.d, ld-tic6x/attr-array-8-48.d, ld-tic6x/attr-array-8-8.d, ld-tic6x/attr-array-8-816.d, ld-tic6x/attr-array-8.s, ld-tic6x/attr-array-816-16.d, ld-tic6x/attr-array-816-4.d, ld-tic6x/attr-array-816-416.d, ld-tic6x/attr-array-816-48.d, ld-tic6x/attr-array-816-8.d, ld-tic6x/attr-array-816-816.d, ld-tic6x/attr-array-816.s, ld-tic6x/attr-conformance-10-10.d, ld-tic6x/attr-conformance-10-11.d, ld-tic6x/attr-conformance-10-none.d, ld-tic6x/attr-conformance-10.s, ld-tic6x/attr-conformance-11-10.d, ld-tic6x/attr-conformance-11-11.d, ld-tic6x/attr-conformance-11-none.d, ld-tic6x/attr-conformance-11.s, ld-tic6x/attr-conformance-none-10.d, ld-tic6x/attr-conformance-none-11.d, ld-tic6x/attr-conformance-none-none.d, ld-tic6x/attr-conformance-none.s, ld-tic6x/attr-pic-0.s, ld-tic6x/attr-pic-00.d, ld-tic6x/attr-pic-01.d, ld-tic6x/attr-pic-1.s, ld-tic6x/attr-pic-10.d, ld-tic6x/attr-pic-11.d, ld-tic6x/attr-pid-0.s, ld-tic6x/attr-pid-00.d, ld-tic6x/attr-pid-01.d, ld-tic6x/attr-pid-02.d, ld-tic6x/attr-pid-1.s, ld-tic6x/attr-pid-10.d, ld-tic6x/attr-pid-11.d, ld-tic6x/attr-pid-12.d, ld-tic6x/attr-pid-2.s, ld-tic6x/attr-pid-20.d, ld-tic6x/attr-pid-21.d, ld-tic6x/attr-pid-22.d, ld-tic6x/attr-stack-16-16.d, ld-tic6x/attr-stack-16-8.d, ld-tic6x/attr-stack-16-816.d, ld-tic6x/attr-stack-16.s, ld-tic6x/attr-stack-8-16.d, ld-tic6x/attr-stack-8-8.d, ld-tic6x/attr-stack-8-816.d, ld-tic6x/attr-stack-8.s, ld-tic6x/attr-stack-816-16.d, ld-tic6x/attr-stack-816-8.d, ld-tic6x/attr-stack-816-816.d, ld-tic6x/attr-stack-816.s, ld-tic6x/attr-wchar-0.s, ld-tic6x/attr-wchar-00.d, ld-tic6x/attr-wchar-01.d, ld-tic6x/attr-wchar-02.d, ld-tic6x/attr-wchar-1.s, ld-tic6x/attr-wchar-10.d, ld-tic6x/attr-wchar-11.d, ld-tic6x/attr-wchar-12.d, ld-tic6x/attr-wchar-2.s, ld-tic6x/attr-wchar-20.d, ld-tic6x/attr-wchar-21.d, ld-tic6x/attr-wchar-22.d: New tests.
* bfd:Joseph Myers2010-10-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * elf32-tic6x.c (elf32_tic6x_obj_attrs_arg_type): Check Tag_ABI_compatibility not Tag_compatibility. (elf32_tic6x_merge_attributes): Update compatibility attribute name in comment. Return FALSE if merging common attributes fails. binutils: * readelf.c (display_tic6x_attribute): Use Tag_ABI_compatibility not hardcoded 32. Display name of this attribute. gas: * doc/c-tic6x.texi (TIC6X Directives): Mention Tag_ABI_compatibility. gas/testsuite: * gas/tic6x/attr-compatibility-directive-1.d, gas/tic6x/attr-compatibility-directive-1.s, gas/tic6x/attr-compatibility-directive-2.d, gas/tic6x/attr-compatibility-directive-2.s: New tests. include/elf: * tic6x-attrs.h (Tag_ABI_compatibility): Define. ld/testsuite: * ld-tic6x/attr-compatibility-gnu-gnu.d, ld-tic6x/attr-compatibility-gnu-other.d, ld-tic6x/attr-compatibility-gnu.s, ld-tic6x/attr-compatibility-other-gnu.d, ld-tic6x/attr-compatibility-other-other.d, ld-tic6x/attr-compatibility-other.s: New tests.
* bfd:Joseph Myers2010-10-292-5/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2010-10-29 Bernd Schmidt <bernds@codesourcery.com> Joseph Myers <joseph@codesourcery.com> * elf32-tic6x.c (elf32_tic6x_merge_attributes): Check for mismatch of DSBT attributes. binutils: 2010-10-29 Bernd Schmidt <bernds@codesourcery.com> Joseph Myers <joseph@codesourcery.com> * readelf.c (display_tic6x_attribute): Handle Tag_ABI_DSBT. gas: 2010-10-29 Bernd Schmidt <bernds@codesourcery.com> Joseph Myers <joseph@codesourcery.com> * config/tc-tic6x.c (OPTION_MDSBT, OPTION_MNO_DSBT): New enum values. (md_longopts): Add mdsbt and mno-dsbt. (tic6x_dsbt): New static variable. (md_parse_option): Handle OPTION_MDSBT and OPTION_MNO_DSBT. (md_show_usage): Output help text for -mdsbt and -mno-dsbt. (TAG): Add comma at the end. (tic6x_set_attributes): Set Tag_ABI_DSBT. * doc/as.texinfo: Document -mdsbt and -mno-dsbt. * doc/c-tic6x.texi (TIC6X Options): Likewise. (TIC6X Directives): Mention Tag_ABI_DSBT. gas/testsuite: 2010-10-29 Bernd Schmidt <bernds@codesourcery.com> Joseph Myers <joseph@codesourcery.com> * gas/tic6x/attr-dsbt-directive-1.d, gas/tic6x/attr-dsbt-directive-1.s, gas/tic6x/attr-dsbt-directive-2.d, gas/tic6x/attr-dsbt-directive-2.s, gas/tic6x/attr-dsbt-opts-mdsbt.d, gas/tic6x/attr-dsbt-opts-mno-dsbt.d: New tests. include/elf: 2010-10-29 Bernd Schmidt <bernds@codesourcery.com> Joseph Myers <joseph@codesourcery.com> * tic6x-attrs.h (Tag_ABI_DSBT): New. ld/testsuite: 2010-10-29 Bernd Schmidt <bernds@codesourcery.com> Joseph Myers <joseph@codesourcery.com> * ld-tic6x/attr-dsbt-0.s, ld-tic6x/attr-dsbt-00.d, ld-tic6x/attr-dsbt-01.d, ld-tic6x/attr-dsbt-1.s, ld-tic6x/attr-dsbt-10.d, ld-tic6x/attr-dsbt-11.d: New tests.
* Add directory section for info document.Alan Modra2010-10-281-6/+5
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* bfd:Joseph Myers2010-10-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * elf32-tic6x.c (elf32_tic6x_merge_arch_attributes): Update for attribute renaming. (elf_backend_obj_attrs_section): Change to ".c6xabi.attributes". binutils: * readelf.c (display_tic6x_attribute): Update for attribute renaming. gas: * config/tc-tic6x.c (tic6x_arch_attribute, tic6x_arches, md_assemble, tic6x_set_attributes): Update for attribute renaming. * doc/c-tic6x.texi: Update for attribute renaming. gas/testsuite: * gas/tic6x/attr-arch-directive-1.d, gas/tic6x/attr-arch-directive-2.d, gas/tic6x/attr-arch-directive-3.d, gas/tic6x/attr-arch-directive-4.d, gas/tic6x/attr-arch-directive-4.s, gas/tic6x/attr-arch-directive-5.d, gas/tic6x/attr-arch-directive-5.s, gas/tic6x/attr-arch-opts-c62x.d, gas/tic6x/attr-arch-opts-c64x+.d, gas/tic6x/attr-arch-opts-c64x.d, gas/tic6x/attr-arch-opts-c674x.d, gas/tic6x/attr-arch-opts-c67x+.d, gas/tic6x/attr-arch-opts-c67x.d, gas/tic6x/attr-arch-opts-none-1.d, gas/tic6x/attr-arch-opts-none-2.d, gas/tic6x/attr-arch-opts-override-1.d, gas/tic6x/attr-arch-opts-override-2.d: Update for attribute renaming and renumbering. include/elf: * tic6x-attrs.h (Tag_C6XABI_Tag_CPU_arch): Change to Tag_ISA, value 4. * tic6x.h (Values for Tag_C6XABI_Tag_CPU_arch): Rename for attribute renaming. ld: * emulparams/elf32_tic6x_le.sh (ATTRS_SECTIONS): Use .c6xabi.attributes, not __TI_build_attributes. ld/testsuite: * ld-tic6x/attr-arch-c62x-c62x.d, ld-tic6x/attr-arch-c62x-c64x+.d, ld-tic6x/attr-arch-c62x-c64x.d, ld-tic6x/attr-arch-c62x-c674x.d, ld-tic6x/attr-arch-c62x-c67x+.d, ld-tic6x/attr-arch-c62x-c67x.d, ld-tic6x/attr-arch-c64x+-c62x.d, ld-tic6x/attr-arch-c64x+-c64x+.d, ld-tic6x/attr-arch-c64x+-c64x.d, ld-tic6x/attr-arch-c64x+-c674x.d, ld-tic6x/attr-arch-c64x+-c67x+.d, ld-tic6x/attr-arch-c64x+-c67x.d, ld-tic6x/attr-arch-c64x-c62x.d, ld-tic6x/attr-arch-c64x-c64x+.d, ld-tic6x/attr-arch-c64x-c64x.d, ld-tic6x/attr-arch-c64x-c674x.d, ld-tic6x/attr-arch-c64x-c67x+.d, ld-tic6x/attr-arch-c64x-c67x.d, ld-tic6x/attr-arch-c674x-c62x.d, ld-tic6x/attr-arch-c674x-c64x+.d, ld-tic6x/attr-arch-c674x-c64x.d, ld-tic6x/attr-arch-c674x-c674x.d, ld-tic6x/attr-arch-c674x-c67x+.d, ld-tic6x/attr-arch-c674x-c67x.d, ld-tic6x/attr-arch-c67x+-c62x.d, ld-tic6x/attr-arch-c67x+-c64x+.d, ld-tic6x/attr-arch-c67x+-c64x.d, ld-tic6x/attr-arch-c67x+-c674x.d, ld-tic6x/attr-arch-c67x+-c67x+.d, ld-tic6x/attr-arch-c67x+-c67x.d, ld-tic6x/attr-arch-c67x-c62x.d, ld-tic6x/attr-arch-c67x-c64x+.d, ld-tic6x/attr-arch-c67x-c64x.d, ld-tic6x/attr-arch-c67x-c674x.d, ld-tic6x/attr-arch-c67x-c67x+.d, ld-tic6x/attr-arch-c67x-c67x.d: Update for attribute renaming.
* Add .d32 encoding suffix.H.J. Lu2010-10-141-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | gas/ 2010-10-14 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (_i386_insn): Add disp32_encoding. (md_assemble): Don't call optimize_disp if disp32_encoding is set. (parse_insn): Support .d32 to force 32bit displacement. (output_branch): Use BIG if disp32_encoding is set. * doc/c-i386.texi: Document .d32 encoding suffix. gas/testsuite/ 2010-10-14 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/disp32.d: New. * gas/i386/disp32.s: Likewise. * gas/i386/x86-64-disp32.d: Likewise. * gas/i386/x86-64-disp32.s: Likewise. * gas/i386/i386.exp: Run disp32 and x86-64-disp32.
* 2010-10-04 David Daney <ddaney@caviumnetworks.com>David Daney2010-10-041-0/+5
| | | | | | | | | | | | | | | | | | | * config/tc-mips.c (mips_fix_cn63xxp1): New variable. (mips_ip): Add errata work around when mips_fix_cn63xxp1 set. (OPTION_FIX_CN63XXP1, OPTION_NO_FIX_CN63XXP1): New enum options enumerations. (md_longopts): Add options for -mfix-cn63xxp1 and -mno-fix-cn63xxp1. (md_parse_option): Handle OPTION_FIX_CN63XXP1 and OPTION_NO_FIX_CN63XXP1. (md_show_usage): Add documentation for -mfix-cn63xxp1. * doc/c-mips.texi (-mfix-cn63xxp1, -mno-fix-cn63xxp1): Document the new options. 2010-10-04 David Daney <ddaney@caviumnetworks.com> * gas/mips/mips.exp (octeon-pref): Run the new test. * gas/mips/octeon-pref.s: New test. * gas/mips/octeon-pref.d: New expected results for the new test.
* 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel2010-09-271-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | * s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196. (main): Recognize the new CPU string. * s390-opc.c: Add new instruction formats and masks. * s390-opc.txt: Add new z196 instructions. 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val. 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * config/tc-s390.c: (md_parse_option): New option -march=z196. * doc/c-s390.texi: Document new option. 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gas/s390/s390.exp: Run the zarch-z196 test. * gas/s390/zarch-z196.d: Add new instructions. * gas/s390/zarch-z196.s: Likewise. * gas/s390/zarch-z9-109.d: Likewise. * gas/s390/zarch-z9-109.s: Likewise.
* * bfd/bfd-in2.h (BFD_RELOC_ARM_HVC): New enum value.mgretton2010-09-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * gas/config/tc-arm.c (arm_ext_virt): New variable. (arm_reg_type): Add REG_TYPE_RNB for banked registers. (reg_entry): Allow registers to be larger than a byte. (reg_alias): Fix type warning. (parse_operands): Parse banked registers when appropriate. (do_mrs): Add support for Virtualization Extensions. (do_hvc): New function. (do_t_mrs): Add support for Virtualization Extensions. (do_t_msr): Likewise. (do_t_hvc): New function. (SPLRBANK): New define. (reg_names): Add banked registers. (insns): Add support for Virtualization Extensions. (md_apply_fixup): Likewise. (arm_cpus): -mcpu=cortex-a15 implies the Virtualization Extensions. (arm_extensions): Add 'virt' extension. (aeabi_set_public_attributes): Add support for Virtualization Extensions. * gas/doc/c-arm.texi: Document 'virt' extension. * gas/testsuite/gas/arm/armv7-a+virt.d: New test. * gas/testsuite/gas/arm/armv7-a+virt.s: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for Virtualization Extensions. * gas/testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: New test. * gas/testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise. * include/opcode/arm.h (ARM_EXT_VIRT): New define. (ARM_ARCH_V7A_IDIV_MP_SEC): Rename... (ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization Extensions. * opcodes/arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support. (thumb32_opcodes): Likewise. (banked_regname): New function. (print_insn_arm): Add Virtualization Extensions support. (print_insn_thumb32): Likewise.
* * gas/config/tc-arm.c (arm_ext_adiv): New variable.mgretton2010-09-231-1/+2
| | | | | | | | | | | | | | | | | | (do_div): New function. (insns): Accept UDIV and SDIV in ARM state. (arm_cpus): The cortex-a15 option has all current v7-A extensions. (arm_extensions): Add 'idiv' extension. (aeabi_set_public_attributes): Update Tag_DIV_use values for the Integer Divide extension. * gas/doc/c-arm.texi: Document the idiv extension. * gas/testsuite/gas/arm/armv7-a+idiv.d: New test. * gas/testsuite/gas/arm/armv7-a+idiv.s: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for Integer divide extension. * gas/testsuite/gas/arm/attr-march-armv7-a+idiv.d: New test. * include/opcode/arm.h (ARM_AEXT_ADIV): New define. (ARM_ARCH_V7A_IDIV_MP_SEC): Likewise. * opcodes/arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in ARM state.
* * config/tc-arm.c (arm_ext_v6m): New variable.mgretton2010-09-231-0/+3
| | | | | | | | | | | | | | | | | | | | | | (arm_ext_m): Add support for OS extension. (arm_ext_os): New variable. (do_t_swi): In v6-M ensure we have the OS extension. (arm_cpus): The cortex-m1 and cortex-m0 options have the OS extension by default. (arm_archs): Add armv6s-m. (arm_extensions): Add 'os' extension. (cpu_arch_ver): Add support for v6S-M. * gas/doc/c-arm.texi: Document the OS Extension, and v6-m and v6s-m architecture options. * gas/testsuite/gas/arm/archv6s-m-bad.d: New test. * gas/testsuite/gas/arm/archv6s-m-bad.l: Likewise. * gas/testsuite/gas/arm/archv6s-m.d: Likewise. * gas/testsuite/gas/arm/archv6s-m.s: Likewise. * gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise. * include/opcode/arm.h (ARM_EXT_OS): New define. (ARM_AEXT_V6SM): Likewise. (ARM_ARCH_V6SM): Likewise.
* * gas/config/tc-arm.c (arm_ext_v6z): Remove.mgretton2010-09-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (arm_ext_sec): New variable. (do_t_smc): In Thumb state SMC requires v7-A. (insns): Make SMC depend on Security Extensions. (arm_cpus): All -mcpu=cortex-a* options have the Security Extensions. (arm_extensions): Add 'sec' extension. (cpu_arch_ver): Reorder. (aeabi_set_public_attributes): Emit Tag_Virtualization_use as appropriate. * gas/doc/c-arm.texi: Document Security Extensions. * gas/testsuite/gas/arm/attr-march-all.d: Update for Security Extensions.. * gas/testsuite/gas/arm/attr-march-armv6k+sec.d: New test. * gas/testsuite/gas/arm/attr-march-armv6z.d: Update for Security Extensions. * gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: New test. * gas/testsuite/gas/arm/attr-mcpu.d: Update for Security Extensions. * gas/testsuite/gas/arm/thumb32.d: Likewise. * gas/testsuite/gas/arm/thumb32.s: Likewise. * include/opcode/arm.h (ARM_EXT_V6Z): Remove. (ARM_EXT_SEC): New define. (ARM_AEXT_V6Z): Use Security Extensions. (ARM_AEXT_V6ZK): Likeiwse. (ARM_AEXT_V6ZT2): Likewise. (ARM_AEXT_V6ZKT2): Likewise. (ARM_AEXT_V7_ARM): Base v7 does not have Security Extensions. (ARM_ARCH_V7A_SEC): New define. (ARM_ARCH_V7A_MP): Rename... (ARM_ARCH_V7A_MP_SEC): ...to this and add Security Extensions. * ld/testsuite/ld-arm/attr-merge-6.attr: Update for Security Extensions. * ld/testsuite/ld-arm/attr-merge-7.attr: Likewise. * opcodes/arm-dis.c (arm_opcodes): SMC implies Security Extensions. (thumb32_opcodes): Likewise.
* * gas/config/tc-arm.c (arm_ext_mp): Add.mgretton2010-09-231-0/+4
| | | | | | | | | | | | | | | | | | | | | | | (do_pld): Update comment. (insns): Add support for pldw. (arm_cpus): Update cortex-a5, cortex-a9, and cortex-a15 to support MP extension. (arm_extensions): Add 'mp' extension. (aeabi_set_public_attributes): Emit correct build attribute when MP extension is enabled. * gas/doc/c-arm.texi: Update for MP extensions. * gas/testsuite/gas/arm/arch7a-mp.d: Add. * gas/testsuite/gas/arm/arch7ar-mp.s: Likewise. * gas/testsuite/gas/arm/arch7r-mp.d: Likewise. * gas/testsuite/gas/arm/armv2-mp-bad.d: Likewise. * gas/testsuite/gas/arm/armv2-mp-bad.l: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for MP extension. * gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Add. * gas/testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise. * include/opcode/arm.h (ARM_EXT_MP): Add. (ARM_ARCH_V7A_MP): Likewise. * opcodes/arm-dis.c (arm_opcodes): Add support for pldw. (thumb32_opcodes): Likewise.
* * gas/config/tc-arm.c (md_pseduo_table): Add .arch_extension directive.mgretton2010-09-231-5/+32
| | | | | | | | | | | | | | (arm_option_extension_value_table): Add. (arm_extensions): Change type. (arm_option_cpu_table): Rename... (arm_option_fpu_table): ...to this. (arm_fpus): Change type. (arm_parse_extension): Enforce alphabetical order. Allow extensions to be removed. (arm_parse_arch): Allow extensions to be specified with -march. (s_arm_arch_extension): Add. (s_arm_fpu): Update for type changes. * gas/doc/c-arm.texi: Document changes to infrastructure.
* gas: blackfin: add support for BF592 processorsMike Frysinger2010-09-221-2/+3
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* * doc/c-arm.texi: Document -mcpu=cortex-m4.Jie Zhang2010-09-141-0/+1
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* * doc/c-tic6x.texi (.c6xabi_attribute): Document directive.Joseph Myers2010-09-091-0/+9
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* * gas/config/tc-arm.c (arm_cpus): Add cortex-a15 entry.mgretton2010-09-091-0/+1
| | | | * gas/doc/c-arm.texi: Document -mcpu=cortex-a15.
* * doc/c-arm.texi (ARM Options): Document -mfpu=fp4-sp-d16.Maciej W. Rozycki2010-08-201-0/+1
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* Add "?" pseudo-flag to ELF .section/.pushsection directives.Roland McGrath2010-08-171-72/+81
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* * as.c (show_usage): Don't list --compress-debug-sections if zlib notCary Coutant2010-08-091-0/+9
| | | | | | | | installed. (main): Warn if --compress-debug-sections requested and zlib not installed. * doc/as.texinfo: Add --compress-debug-sections, --nocompress-debug-sections.
* Add support for v850E2 and v850E2V3Nick Clifton2010-07-231-0/+24
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* Support AVX Programming Reference (June, 2010)H.J. Lu2010-07-011-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gas/ 2010-07-01 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (June, 2010) * config/tc-i386.c (cpu_arch): Add .xsaveopt, .fsgsbase, .rdrnd and .f16c. * doc/c-i386.texi: Document xsaveopt, fsgsbase, rdrnd and f16c. gas/testsuite/ 2010-07-01 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (June, 2010) * gas/i386/arch-10.s: Add xsaveopt. * gas/i386/x86-64-arch-2.s: Likwise. * gas/i386/arch-10.d: Updated. * gas/i386/arch-10-1.l: Likewise. * gas/i386/arch-10-2.l: Likewise. * gas/i386/arch-10-3.l: Likewise. * gas/i386/arch-10-4.l: Likewise. * gas/i386/x86-64-arch-2.d: Likewise. * gas/i386/f16c-intel.d: New. * gas/i386/f16c.d: Likewise. * gas/i386/f16c.s: Likewise. * gas/i386/fsgs-intel.d: Likewise. * gas/i386/fsgs.d: Likewise. * gas/i386/fsgs.s: Likewise. * gas/i386/rdrnd-intel.d: Likewise. * gas/i386/rdrnd.d: Likewise. * gas/i386/rdrnd.s: Likewise. * gas/i386/x86-64-f16c-intel.d: Likewise. * gas/i386/x86-64-f16c.d: Likewise. * gas/i386/x86-64-f16c.s: Likewise. * gas/i386/x86-64-fsgs-intel.d: Likewise. * gas/i386/x86-64-fsgs.d: Likewise. * gas/i386/x86-64-fsgs.s: Likewise. * gas/i386/x86-64-rdrnd-intel.d: Likewise. * gas/i386/x86-64-rdrnd.d: Likewise. * gas/i386/x86-64-rdrnd.s: Likewise. * gas/i386/i386.exp: Run f16c, f16c-intel, fsgs, fsgs-intel, rdrnd, rdrnd-intel, x86-64-f16c, x86-64-f16c-intel, x86-64-fsgs, x86-64-fsgs-intel, x86-64-rdrnd, x86-64-rdrnd-intel. * gas/i386/x86-64-xsave.s: Add tests for xsaveopt64. * gas/i386/x86-64-xsave-intel.d: Updated. * gas/i386/x86-64-xsave.d: Likewise. opcodes/ 2010-07-01 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (June, 2010) * i386-dis.c (PREFIX_0FAE_REG_0): New. (PREFIX_0FAE_REG_1): Likewise. (PREFIX_0FAE_REG_2): Likewise. (PREFIX_0FAE_REG_3): Likewise. (PREFIX_VEX_3813): Likewise. (PREFIX_VEX_3A1D): Likewise. (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1, PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and PREFIX_VEX_3A1D. (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D. (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1, PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd. * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS, CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS. (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C. * i386-opc.h (CpuXsaveopt): New. (CpuFSGSBase):Likewise. (CpuRdRnd): Likewise. (CpuF16C): Likewise. (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and cpuf16c. * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd, wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
* * doc/as.texinfo (Overview): Use @itemx for grouped @tableAndreas Schwab2010-06-2110-45/+47
| | | | | | | | | | | | | items. * doc/c-alpha.texi (Alpha Options): Likewise. * doc/c-arm.texi (ARM Directives): Likewise. * doc/c-bfin.texi (Blackfin Options): Likewise. * doc/c-d10v.texi (D10V-Opts): Likewise. * doc/c-i386.texi (i386-Options): Likewise. * doc/c-ia64.texi (IA-64 Options): Likewise. * doc/c-m68k.texi (M68K-Opts): Likewise. * doc/c-tic54x.texi (TIC54X-Directives): Likewise. * doc/internals.texi (Symbols): Likewise.
* etc/ChangeLogNick Clifton2010-06-081-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | * standards.texi: Relicense under GFDL v1.3. * fdl.texi: Replace with v1.3 text. gas/ChangeLog * doc/as.texinfo: Replace abbreviated 20th century year numbers with full versions. gprof/ChangeLog * gprof.texi: Replace abbreviated 20th century year numbers with full versions. ld/ChangeLog * fdl.texi: Replace with v1.3 text. * ld.texinfo: Replace abbreviated 20th century year numbers with full versions. * ldint.texinfo: Likewise. Relicense under GFDL v1.3. Replace text of v1.1 FDL with an include of the fdl.texi file.
* 2010-05-21 Daniel Jacobowitz <dan@codesourcery.com>Nick Clifton2010-05-251-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Joseph Myers <joseph@codesourcery.com> Andrew Stubbs <ams@codesourcery.com> bfd/ * config.bfd (sh-*-uclinux* | sh[12]-*-uclinux*): Add bfd_elf32_shl_vec, and FDPIC vectors to targ_selvecs. * configure.in: Handle FDPIC vectors. * elf32-sh-relocs.h: Add FDPIC and movi20 relocations. * elf32-sh.c (DEFAULT_STACK_SIZE): Define. (SYMBOL_FUNCDESC_LOCAL): Define. Use it instead of SYMBOL_REFERENCES_LOCAL for function descriptors. (fdpic_object_p): New. (sh_reloc_map): Add FDPIC and movi20 relocations. (sh_elf_info_to_howto, sh_elf_relocate_section): Handle new invalid range. (struct elf_sh_plt_info): Add got20 and short_plt. Update all definitions. (FDPIC_PLT_ENTRY_SIZE, FDPIC_PLT_LAZY_OFFSET): Define. (fdpic_sh_plt_entry_be, fdpic_sh_plt_entry_le, fdpic_sh_plts): New. (FDPIC_SH2A_PLT_ENTRY_SIZE, FDPIC_SH2A_PLT_LAZY_OFFSET): Define. (fdpic_sh2a_plt_entry_be, fdpic_sh2a_plt_entry_le) (fdpic_sh2a_short_plt_be, fdpic_sh2a_short_plt_le, fdpic_sh2a_plts): New. (get_plt_info): Handle FDPIC. (MAX_SHORT_PLT): Define. (get_plt_index, get_plt_offset): Handle short_plt. (union gotref): New. (struct elf_sh_link_hash_entry): Add funcdesc, rename tls_type to got_type and adjust all uses. Add GOT_FUNCDESC. (struct sh_elf_obj_tdata): Add local_funcdesc. Rename local_got_tls_type to local_got_type. (sh_elf_local_got_type): Renamed from sh_elf_local_got_tls_type. All users changed. (sh_elf_local_funcdesc): Define. (struct elf_sh_link_hash_table): Add sfuncdesc, srelfuncdesc, fdpic_p, and srofixup. (sh_elf_link_hash_newfunc): Initialize new fields. (sh_elf_link_hash_table_create): Set fdpic_p. (sh_elf_omit_section_dynsym): New. (create_got_section): Create .got.funcdesc, .rela.got.funcdesc and .rofixup. (allocate_dynrelocs): Allocate local function descriptors and space for R_SH_FUNCDESC-related relocations, and for rofixups. Handle GOT_FUNCDESC. Create fixups. Handle GOT entries which require function descriptors. (sh_elf_always_size_sections): Handle PT_GNU_STACK and __stacksize. (sh_elf_modify_program_headers): New. (sh_elf_size_dynamic_sections): Allocate function descriptors for local symbols. Allocate .got.funcdesc contents. Allocate rofixups. Handle local GOT entries of type GOT_FUNCDESC. Create fixups for local GOT entries. Ensure that FDPIC libraries always have a PLTGOT entry in the .dynamic section. (sh_elf_add_dyn_reloc, sh_elf_got_offset, sh_elf_initialize_funcdesc) (sh_elf_add_rofixup, sh_elf_osec_to_segment) (sh_elf_osec_readonly_p, install_movi20_field): New functions. (sh_elf_relocate_section): Handle new relocations, R_SH_FUNCDESC, R_SH_GOTFUNCDESC and R_SH_GOTOFFFUNCDESC. Use sh_elf_got_offset and .got.plt throughout to find _GLOBAL_OFFSET_TABLE_. Add rofixup read-only section warnings. Handle undefined weak symbols. Generate fixups for R_SH_DIR32 and GOT entries. Check for cross-segment relocations and clear EF_SH_PIC. Handle 20-bit relocations. Always generate R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE. (sh_elf_gc_sweep_hook): Handle R_SH_FUNCDESC, R_SH_GOTOFF20, R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20, and R_SH_GOTOFFFUNCDESC. Handle 20-bit relocations. (sh_elf_copy_indirect_symbol): Copy function descriptor reference counts. (sh_elf_check_relocs): Handle new relocations. Make symbols dynamic for FDPIC relocs. Account for rofixups. Error for FDPIC symbol mismatches. Allocate a GOT for R_SH_DIR32. Allocate fixups for R_SH_DIR32. (sh_elf_copy_private_data): Copy PT_GNU_STACK size. (sh_elf_merge_private_data): Copy initial flags. Do not clobber non-mach flags. Set EF_SH_PIC for FDPIC. Reject FDPIC mismatches. (sh_elf_finish_dynamic_symbol): Do not handle got_funcdesc entries here. Rename sgot to sgotplt and srel to srelplt. Handle short_plt, FDPIC descriptors, and got20. Create R_SH_FUNCDESC_VALUE for FDPIC. Use install_movi20_field. Rename srel to srelgot. Always generate R_SH_DIR32 for FDPIC instead of R_SH_RELATIVE. (sh_elf_finish_dynamic_sections): Fill in the GOT pointer in rofixup. Do not fill in reserved GOT entries for FDPIC. Correct DT_PLTGOT. Rename sgot to sgotplt. Assert that the right number of rofixups and dynamic relocations were allocated. (sh_elf_use_relative_eh_frame, sh_elf_encode_eh_address): New. (elf_backend_omit_section_dynsym): Use sh_elf_omit_section_dynsym. (elf_backend_can_make_relative_eh_frame) (elf_backend_can_make_lsda_relative_eh_frame) (elf_backend_encode_eh_address): Define. (TARGET_BIG_SYM, TARGET_BIG_NAME, TARGET_LITTLE_SYM) (TARGET_LITTLE_NAME, elf_backend_modify_program_headers, elf32_bed): Redefine for FDPIC vector. * reloc.c: Add SH FDPIC and movi20 relocations. * targets.c (_bfd_target_vector): Add FDPIC vectors. * configure, bfd-in2.h, libbfd.h: Regenerated. binutils/ * readelf.c (get_machine_flags): Handle EF_SH_PIC and EF_SH_FDPIC. gas/ * config/tc-sh.c (sh_fdpic): New. (sh_check_fixup): Handle relocations on movi20. (parse_exp): Do not reject PIC operators here. (build_Mytes): Check for unhandled PIC operators here. Use sh_check_fixup for movi20. (enum options): Add OPTION_FDPIC. (md_longopts, md_parse_option, md_show_usage): Add --fdpic. (sh_fix_adjustable, md_apply_fix): Handle FDPIC and movi20 relocations. (sh_elf_final_processing): Handle --fdpic. (sh_uclinux_target_format): New. (sh_parse_name): Handle FDPIC relocation operators. * config/tc-sh.h (TARGET_FORMAT): Define specially for TE_UCLINUX. (sh_uclinux_target_format): Declare for TE_UCLINUX. * configure.tgt (sh-*-uclinux* | sh[12]-*-uclinux*): Set em=uclinux. * doc/c-sh.texi (SH Options): Document --fdpic. gas/testsuite/ * gas/sh/basic.exp: Run new tests. Handle uClinux like Linux. * gas/sh/fdpic.d: New file. * gas/sh/fdpic.s: New file. * gas/sh/reg-prefix.d: Force big-endian. * gas/sh/sh2a-pic.d: New file. * gas/sh/sh2a-pic.s: New file. * lib/gas-defs.exp (is_elf_format): Include sh*-*-uclinux*. include/elf/ * sh.h (EF_SH_PIC, EF_SH_FDPIC): Define. (R_SH_FIRST_INVALID_RELOC_6, R_SH_LAST_INVALID_RELOC_6): New. Adjust other invalid ranges. (R_SH_GOT20, R_SH_GOTOFF20, R_SH_GOTFUNCDESC, R_SH_GOTFUNCDESC20) (R_SH_GOTOFFFUNCDESC, R_SH_GOTOFFFUNCDESC20, R_SH_FUNCDESC) (R_SH_FUNCDESC_VALUE): New. ld/ * Makefile.am (ALL_EMULATIONS): Add eshelf_fd.o and eshlelf_fd.o. (eshelf_fd.c, eshlelf_fd.c): New rules. * Makefile.in: Regenerate. * configure.tgt (sh-*-uclinux*): Add shelf_fd and shlelf_fd emulations. * emulparams/shelf_fd.sh: New file. * emulparams/shlelf_fd.sh: New file. * emulparams/shlelf_linux.sh: Update comment. ld/testsuite/ * ld-sh/sh.exp: Handle uClinux like Linux. * lib/ld-lib.exp (is_elf_format): Include sh*-*-uclinux*. * ld-sh/fdpic-funcdesc-shared.d: New file. * ld-sh/fdpic-funcdesc-shared.s: New file. * ld-sh/fdpic-funcdesc-static.d: New file. * ld-sh/fdpic-funcdesc-static.s: New file. * ld-sh/fdpic-gotfuncdesc-shared.d: New file. * ld-sh/fdpic-gotfuncdesc-shared.s: New file. * ld-sh/fdpic-gotfuncdesc-static.d: New file. * ld-sh/fdpic-gotfuncdesc-static.s: New file. * ld-sh/fdpic-gotfuncdesci20-shared.d: New file. * ld-sh/fdpic-gotfuncdesci20-shared.s: New file. * ld-sh/fdpic-gotfuncdesci20-static.d: New file. * ld-sh/fdpic-gotfuncdesci20-static.s: New file. * ld-sh/fdpic-goti20-shared.d: New file. * ld-sh/fdpic-goti20-shared.s: New file. * ld-sh/fdpic-goti20-static.d: New file. * ld-sh/fdpic-goti20-static.s: New file. * ld-sh/fdpic-gotofffuncdesc-shared.d: New file. * ld-sh/fdpic-gotofffuncdesc-shared.s: New file. * ld-sh/fdpic-gotofffuncdesc-static.d: New file. * ld-sh/fdpic-gotofffuncdesc-static.s: New file. * ld-sh/fdpic-gotofffuncdesci20-shared.d: New file. * ld-sh/fdpic-gotofffuncdesci20-shared.s: New file. * ld-sh/fdpic-gotofffuncdesci20-static.d: New file. * ld-sh/fdpic-gotofffuncdesci20-static.s: New file. * ld-sh/fdpic-gotoffi20-shared.d: New file. * ld-sh/fdpic-gotoffi20-shared.s: New file. * ld-sh/fdpic-gotoffi20-static.d: New file. * ld-sh/fdpic-gotoffi20-static.s: New file. * ld-sh/fdpic-plt-be.d: New file. * ld-sh/fdpic-plt-le.d: New file. * ld-sh/fdpic-plt.s: New file. * ld-sh/fdpic-plti20-be.d: New file. * ld-sh/fdpic-plti20-le.d: New file. * ld-sh/fdpic-stack-default.d: New file. * ld-sh/fdpic-stack-size.d: New file. * ld-sh/fdpic-stack.s: New file.
* Implement generic SHF_EXCLUDE.H.J. Lu2010-05-181-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bfd/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * elf.c (_bfd_elf_make_section_from_shdr): Handle SHF_EXCLUDE (elf_fake_sections): Likewise. * elf32-i370.c (i370_elf_section_from_shdr): Don't handle SHF_EXCLUDE here. * elf32-ppc.c (ppc_elf_fake_sections): Likewise. binutils/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * readelf.c (get_elf_section_flags): Treat SHF_EXCLUDE as a generic flag. binutils/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * binutils-all/objcopy.exp: Run exclude-1a and exclude-1b for ELF targets. * binutils-all/exclude-1.s: New. * binutils-all/exclude-1a.d: Likewise. * binutils-all/exclude-1b.d: Likewise. gas/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * obj-elf.c (obj_elf_change_section): Handle SHF_EXCLUDE. (obj_elf_parse_section_letters): Likewise. (obj_elf_section_word): Likewise. * config/tc-ppc.c (ppc_section_letter): Removed. (ppc_section_word): Likewise. * config/tc-ppc.h (ppc_section_letter): Likewise. (ppc_section_word): Likewise. (md_elf_section_letter): Likewise. (md_elf_section_word): Likewise. * doc/as.texinfo: Document `e' and `#exclude'. gas/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * gas/elf/elf.exp: Run section8. * gas/elf/section8.d: New. * gas/elf/section8.s: Likewise. include/elf/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * common.h (SHF_EXCLUDE): New. * i370.h (SHF_EXCLUDE): Removed. * or32.h (SHF_EXCLUDE): Likewise. * ppc.h (SHF_EXCLUDE): Likewise. * sparc.h (SHF_EXCLUDE): Likewise. ld/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * ld-elf/exclude3.s: New. * ld-elf/exclude3a.d: Likewise. * ld-elf/exclude3b.d: Likewise. * ld-elf/exclude3c.d: Likewise.
* bfd/Tristan Gingold2010-05-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2010-05-07 Tristan Gingold <gingold@adacore.com> * Makefile.in: Regenerate with automake 1.11.1. * aclocal.m4: Ditto. bfd/doc/ 2010-05-07 Tristan Gingold <gingold@adacore.com> * Makefile.in: Regenerate with automake 1.11.1. binutils/ 2010-05-07 Tristan Gingold <gingold@adacore.com> * Makefile.in: Regenerate with automake 1.11.1. * aclocal.m4: Ditto. * doc/Makefile.in: Ditto. gas/ 2010-05-07 Tristan Gingold <gingold@adacore.com> * Makefile.in: Regenerate with automake 1.11.1. * aclocal.m4: Ditto. * doc/Makefile.in: Ditto. gprof/ 2010-05-07 Tristan Gingold <gingold@adacore.com> * Makefile.in: Regenerate with automake 1.11.1. * aclocal.m4: Ditto. ld/ 2010-05-07 Tristan Gingold <gingold@adacore.com> * Makefile.in: Regenerate with automake 1.11.1. * aclocal.m4: Ditto. opcodes/ 2010-05-07 Tristan Gingold <gingold@adacore.com> * Makefile.in: Regenerate with automake 1.11.1. * aclocal.m4: Ditto.
* * ld/testsuite/ld-arm/attr-merge-2.attr: Update for changes in attribute ↵mgretton2010-04-151-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | output. * ld/testsuite/ld-arm/attr-merge-3.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-1.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-1r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-2.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-2r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-3.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likeiwse. * ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-00-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-00.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-02-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-02.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-04-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-04.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-20-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-20.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-22-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-22.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-24-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-40-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-40.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-42-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-44-nowarn.d: Likewise. * ld/testsuite/ld-arm/attr-merge-wchar-44.d: Likewise. * ld/testsuite/ld-arm/attr-merge.attr: Likewise. * binutils/readelf.c (arm_attr_tag_FP_arch): Rename from arm_attr_tag_VFP_arch. (arm_attr_tag_ABI_align8_needed): Remove. (arm_attr_tag_ABI_align8_preserved): Remove. (arm_attr_tag_ABI_HardFP_use): Update text strings. (arm_attr_public_tags): Add strings for ABI v2.08 attribute tags. (display_arm_attribute): Add decoding of ABI v2.08 attributes. * include/elf/arm.h (Tag_FP_arch, Tag_ABI_align_needed, Tag_ABI_align_preserved, Tag_FP_HP_extension): Add new ABI attribute tags. * gas/config/tc-arm.c (arm_convert_symbolic_attribute): Add support for new tag names in v2.08 of ARM ABI. * gas/doc/c-arm.texi: Document new tag names in ABI. * gas/testsuite/gas/arm/attr-mcpu.d: Update for new attribute tag names. * gas/testsuite/gas/arm/attr-mfpu-arm1020e.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm1020t.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-neon-fp16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-neon.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp10.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp3.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfp9.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv2.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv3.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpxd.d: Likewise. * gas/testsuite/gas/arm/attr-names.d: Add test to make sure all attribute names are recognised. * gas/testsuite/gas/arm/attr-names.s: Likewise.
* 2010-04-07 Eric B. Weddington <eric.weddington@atmel.com>Eric B. Weddington2010-04-091-16/+21
| | | | | | | | | | | | | * config/tc-avr.c (mcu_types): Add support for atmega16a, atmega168a, atmega164a, atmega165a, atmega169a, atmega169pa, atmega16hva2, atmega324a, atmega324pa, atmega325a, atmega3250a, atmega328, atmega329a, atmega329pa, atmega3290a, atmega48a, atmega644a, atmega645a, atmega645p, atmega6450a, atmega6450p, atmega649a, atmega649p, atmega6490a, atmega6490p, atmega64hve, atmega88a, atmega88pa, attiny461a, attiny84a, m3000. Remove support for atmega8m1, atmega8c1, atmega16c1, atmega4hvd, atmega8hvd, attiny327, m3000f, m3000s, m3001b. * doc/c-avr.texi: Same.
* bfd:Joseph Myers2010-03-255-4/+173
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
* * doc/c-arm.texi (.setfp): Correct example.Daniel Jacobowitz2010-03-181-2/+2
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* bfd/Nick Clifton2010-03-181-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | 2010-03-15 Wei Guozhi <carrot@google.com> PR gas/11323 * bfd-in2.h (enum bfd_reloc_code_real): New BFD_RELOC_GOT_PREL type. * elf32-arm.c (elf32_arm_reloc_map): BFD_RELOC_GOT_PREL to R_ARM_GOT_PREL map. * libbfd.h (bfd_reloc_code_real_names): BFD_RELOC_GOT_PREL name. * reloc.c (comments): Document the new relocation. gas/ 2010-03-15 Wei Guozhi <carrot@google.com> PR gas/11323 * config/tc-arm.c (reloc_names): New relocation names. (md_apply_fix): New case for BFD_RELOC_ARM_GOT_PREL. (tc_gen_reloc): New case for BFD_RELOC_ARM_GOT_PREL. * doc/c-arm.texi (ARM-Relocations): Document the new relocation. gas/testsuite 2010-03-15 Wei Guozhi <carrot@google.com> PR gas/11323 * gas/arm/got_prel.s: New test case. * gas/arm/got_prel.d: Likewise.
* add support for Blackfin bf504/bf506Mike Frysinger2010-03-101-0/+2
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* * doc/as.texinfo: Add Blackfin options.Jie Zhang2010-03-102-0/+34
| | | | | | * doc/c-bfin.texi: Document -mfdpic, -mno-fdpic and -mnopic. * config/tc-bfin.c (md_show_usage): Show usage for all Blackfin specific options.
* * config/tc-mips.c (mips_fix_loongson2f, mips_fix_loongson2f_nop,Nick Clifton2010-02-251-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | mips_fix_loongson2f_jump): New variables. (md_longopts): Add New options -mfix-loongson2f-nop/jump, -mno-fix-loongson2f-nop/jump. (md_parse_option): Initialize variables via above options. (options): New enums for the above options. (md_begin): Initialize nop_insn from LOONGSON2F_NOP_INSN. (fix_loongson2f, fix_loongson2f_nop, fix_loongson2f_jump): New functions. (append_insn): call fix_loongson2f(). (mips_handle_align): Replace the implicit nops. * config/tc-mips.h (MAX_MEM_FOR_RS_ALIGN_CODE): Modified for the new mips_handle_align(). * doc/c-mips.texi: Document the new options. * gas/mips/loongson-2f-2.s: New test of -mfix-loongson2f-nop. * gas/mips/loongson-2f-2.d: Likewise. * gas/mips/loongson-2f-3.s: New test of -mfix-loongson2f-jump. * gas/mips/loongson-2f-3.d: Likewise. * gas/mips/mips.exp: Run the new tests. * opcode/mips.h (LOONGSON2F_NOP_INSN): New macro.
* * bfd/elf32-arm.c (elf32_arm_merge_eabi_attributes): Add support formgretton2010-02-181-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | merging Tag_DIV_use, Tag_MPextension_use, and Tag_MPextension_use_legacy tags. * binutils/readelf.c (arm_attr_tag_Advanced_SIMD_arch): Add description of newly permitted attribute values. (arm_attr_tag_Virtualization_use): Likewise. (arm_attr_tag_DIV_use): Add description of new attribute. (arm_attr_tag_MPextension_use_legacy): Likewise. * gas/config/tc-arm.c (arm_convert_symbolic_attribute): Add Tag_DIV_use. * gas/doc/c-arm.texi: Likewise. * gas/testsuite/gas/arm/attr-order.d: Fix test for new names for attribute values. * include/elf/arm.h (Tag_MPextension_use): Renumber. (Tag_DIV_use): Add. (Tag_MPextension_use_legacy): Likewise. * ld/testsuite/ld-arm/attr-merge-3.attr: Fix test for new attribute values. * ld/testsuite/ld-arm/attr-merge-3b.s: Likewise. * ld/testsuite/ld-arm/attr-merge-unknown-1.d: Fix test now that 42 is a recognised attribute ID. * ld/testsuite/ld-arm/attr-merge-unknown-1.s: Likewise. * ld/testsuite/ld-arm/attr-merge-6.attr: New test. * ld/testsuite/ld-arm/attr-merge-6a.s: Likewise. * ld/testsuite/ld-arm/attr-merge-6b.s: Likewise. * ld/testsuite/ld-arm/attr-merge-7.attr: Likewise. * ld/testsuite/ld-arm/attr-merge-7a.s: Likewise. * ld/testsuite/ld-arm/attr-merge-7b.s: Likewise. * ld/testsuite/ld-arm/arm-elf.exp: Run the new tests.
* gas/Tristan Gingold2010-02-121-1/+16
| | | | | | | | | | | | | | | | | | | | 2010-02-12 Tristan Gingold <gingold@adacore.com> Douglas B Rupp <rupp@gnat.com> * config/tc-ia64.c (enum reloc_func): Add FUNC_SLOTCOUNT_RELOC. (DUMMY_RELOC_IA64_SLOTCOUNT): Added. (pseudo_func): Add an entry for slotcount. (md_begin): Initialize slotcount pseudo symbol. (ia64_parse_name): Handle @slotcount parameter. (ia64_gen_real_reloc_type): Handle slotcount. (md_apply_fix): Ditto. * doc/c-ia64.texi (IA-64-Relocs): Document @slotcount. gas/testsuite/ 2010-02-12 Tristan Gingold <gingold@adacore.com> * gas/ia64/slotcount.s, gas/ia64/slotcount.s: New test. * gas/ia64/ia64.exp: Add slotcount test (vms only).
* include/Alan Modra2010-02-081-1/+4
| | | | | | | | | | | | | | | | | | | * opcode/ppc.h (PPC_OPCODE_TITAN): Define. bfd/ * archures.c (bfd_mach_ppc_titan): Define. * bfd-in2.h: Regenerate. * cpu-powerpc.c (bfd_powerpc_archs): Add titan entry. opcodes/ * ppc-dis.c (ppc_opts): Add titan entry. * ppc-opc.c (TITAN, MULHW): Define. (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx). gas/ * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs. (ppc_mach): Handle titan. * doc/c-ppc.texi: Mention -mtitan. gas/testsuite/ * gas/ppc/titan.d, * gas/ppc/titan.s: New test. * gas/ppc/ppc.exp: Run it.
* 2010-02-03 Quentin Neill <quentin.neill@amd.com>spop2010-02-031-2/+2
| | | | | | | | | | | | | | | | | | | | gas/ * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1. (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1. * config/tc-i386.h (processor_type): Same. * doc/c-i386.texi: Change amdfam15 to bdver1. opcodes/ * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS to CPU_BDVER1_FLAGS * i386-init.h: Regenerated. testsuite/ * gas/i386/i386.exp: Rename amdfam15 test cases to bdver1. * gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to gas/i386/x86-64-nops-1-bdver1.d. * gas/i386/nops-1-amdfam15.d: Renamed test case to gas/i386/nops-1-bdver1.d.
* gas/ChangeLog:Dave Korn2010-01-271-0/+2
| | | | | | | | | | | | | | | * NEWS: Mention new feature. * config/obj-coff.c (obj_coff_section): Accept digits and use to override default section alignment power if specified. * doc/as.texinfo (.section directive): Update documentation. gas/testsuite/ChangeLog: * gas/pe/section-align-1.s: New test source file. * gas/pe/section-align-1.d: Likewise control script. * gas/pe/section-align-2.s: Likewise ... * gas/pe/section-align-2.d: ... and likewise. * gas/pe/pe.exp: Invoke new testcases.
* Allow VL=1 on AVX scalar instructions.H.J. Lu2010-01-271-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gas/ 2010-01-27 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (avxscalar): New. (OPTION_MAVXSCALAR): Likewise. (build_vex_prefix): Select vector_length for scalar instructions based on avxscalar. (md_longopts): Add OPTION_MAVXSCALAR. (md_parse_option): Handle OPTION_MAVXSCALAR. (md_show_usage): Add -mavxscalar=. * doc/c-i386.texi: Document -mavxscalar=. gas/testsuite/ 2010-01-27 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/avx-scalar-intel.d: New. * gas/i386/avx-scalar.d: Likewise. * gas/i386/avx-scalar.s: Likewise. * gas/i386/x86-64-avx-scalar-intel.d: Likewise. * gas/i386/x86-64-avx-scalar.d: Likewise. * gas/i386/x86-64-avx-scalar.s: Likewise. * gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel, x86-64-avx-scalar and x86-64-avx-scalar-intel. opcodes/ 2010-01-27 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (XMScalar): New. (EXdScalar): Likewise. (EXqScalar): Likewise. (EXqScalarS): Likewise. (VexScalar): Likewise. (EXdVexScalarS): Likewise. (EXqVexScalarS): Likewise. (XMVexScalar): Likewise. (scalar_mode): Likewise. (d_scalar_mode): Likewise. (d_scalar_swap_mode): Likewise. (q_scalar_mode): Likewise. (q_scalar_swap_mode): Likewise. (vex_scalar_mode): Likewise. (vex_len_table): Duplcate entries for VEX_LEN_10_P_1, VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1, VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0, VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3, VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3, VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1, VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1, VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2, VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1, VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2. (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3, VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2, VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3, VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3, VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3, VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3, VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3, VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3, VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2. (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode, q_scalar_swap_mode. (OP_XMM): Handle scalar_mode. (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode and q_scalar_swap_mode. (OP_VEX): Handle vex_scalar_mode.
* Sync Libtool from GCC.Ralf Wildenhues2010-01-091-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | /: * libtool.m4: Sync from git Libtool. * ltmain.sh: Likewise. * ltoptions.m4: Likewise. * ltversion.m4: Likewise. * lt~obsolete.m4: Likewise. sim/iq2000/: * configure: Regenerate. sim/d10v/: * configure: Regenerate. sim/m32r/: * configure: Regenerate. sim/frv/: * configure: Regenerate. sim/: * avr/configure: Regenerate. * cris/configure: Regenerate. * microblaze/configure: Regenerate. sim/h8300/: * configure: Regenerate. sim/mn10300/: * configure: Regenerate. sim/erc32/: * configure: Regenerate. sim/arm/: * configure: Regenerate. sim/m68hc11/: * configure: Regenerate. sim/lm32/: * configure: Regenerate. sim/sh64/: * configure: Regenerate. sim/v850/: * configure: Regenerate. sim/cr16/: * configure: Regenerate. sim/moxie/: * configure: Regenerate. sim/m32c/: * configure: Regenerate. sim/mips/: * configure: Regenerate. sim/mcore/: * configure: Regenerate. sim/sh/: * configure: Regenerate. gprof/: * Makefile.in: Regenerate. * configure: Regenerate. opcodes/: * Makefile.in: Regenerate. * configure: Regenerate. gas/: * Makefile.in: Regenerate. * configure: Regenerate. * doc/Makefile.in: Regenerate. ld/: * configure: Regenerate. gdb/testsuite/: * gdb.cell/configure: Regenerate. binutils/: * Makefile.in: Regenerate. * configure: Regenerate. * doc/Makefile.in: Regenerate. bfd/: * Makefile.in: Regenerate. * configure: Regenerate. bfd/doc/: * Makefile.in: Regenerate.
* 2010-01-06 Quentin Neill <quentin.neill@amd.com>spop2010-01-061-1/+2
| | | | | | | | | | | | | | | | gas/ * config/tc-i386.c (cpu_arch): Add amdfam15. (i386_align_code): Add PROCESSOR_AMDFAM15 cases. * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15. * doc/c-i386.texi: Add amdfam15. opcodes/ * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS. * i386-init.h: Regenerated. testsuite/ * gas/i386/i386.exp: Add new amdfam15 test cases. * gas/i386/nops-1-amdfam15.d: New.
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