summaryrefslogtreecommitdiff
path: root/gas
Commit message (Collapse)AuthorAgeFilesLines
* * gas/config/tc-arm.c (NEON_ENC_TAB): Add vmaxnm, vminnm entries.mgretton2012-08-247-3/+185
| | | | | | | | | | | | | (vfp_or_neon_is_neon_bits): Add NEON_CHECK_ARCH8 enumerator. (vfp_or_neon_is_neon): Add check for SIMD for ARMv8. (do_maxnm): New function. (insns): Add vmaxnm, vminnm entries. * gas/testsuite/gas/testsuite/gas/armv8-a+fp.d: Update testcase. * gas/testsuite/gas/testsuite/gas/armv8-a+fp.s: Likewise. * gas/testsuite/gas/testsuite/gas/armv8-a+simd.d: New testcase. * gas/testsuite/gas/testsuite/gas/armv8-a+simd.s: Likewise. * opcodes/arm-dis.c (coprocessor_opcodes): Add VMAXNM/VMINNM. (neon_opcodes): Likewise.
* * gas/config/tc-arm.c (NEON_ENC_TAB): Add entries for VSEL.mgretton2012-08-245-1/+104
| | | | | | | | | | | | (NEON_ENC_FPV8_): New define. (do_vfp_nsyn_fpv8): New function. (do_vsel): Likewise. (insns): Add VSEL instructions. * gas/testsuite/gas/arm/armv8-a+fp.d: New testcase. * gas/testsuite/gas/arm/armv8-a+fp.s: Likewise. * opcodes/arm-dis.c (coprocessor_opcodes): Add VSEL. (print_insn_coprocessor): Add new %<>c bitfield format specifier.
* * gas/config/tc-arm.c (do_rm_rn): New function.mgretton2012-08-247-0/+405
| | | | | | | | | | | | | (do_strlex): Likewise. (do_t_strlex): Likewise. (insns): Add support for LDRA/STRL instructions. * gas/testsuite/gas/arm/armv8-a-bad.l: Update testcase. * gas/testsuite/gas/arm/armv8-a-bad.s: Likewise. * gas/testsuite/gas/arm/armv8-a.d: Likewise. * gas/testsuite/gas/arm/armv8-a.s: Likewise. * opcodes/arm-dis.c (arm_opcodes): Add LDRA/STRL instructions. (thumb32_opcodes): Likewise. (print_arm_insn): Add support for %<>T formatter.
* * gas/config/tc-arm.c (do_t_bkpt_hlt1): New function.mgretton2012-08-247-3/+61
| | | | | | | | | | | | (do_t_hlt): New function. (do_t_bkpt): Use do_t_bkpt_hlt1. (insns): Add HLT. * gas/testsuite/gas/arm/armv8-a-bad.l: Update for HLT. * gas/testsuite/gas/arm/armv8-a-bad.s: Likewise. * gas/testsuite/gas/arm/armv8-a.d: Likewise. * gas/testsuite/gas/arm/armv8-a.s: Likewise. * opcodes/arm-dis.c (arm_opcodes): Add HLT. (thumb_opcodes): Likewise.
* * gas/config/tc-arm.c (insns): Add DCPS instruction.mgretton2012-08-245-0/+21
| | | | | | * gas/testsuite/gas/arm/armv8-a.d: Update. * gas/testsuite/gas/arm/armv8-a.s: Likewise. * opcodes/arm-dis.c (thumb32_opcodes): Add DCPS instruction.
* * gas/config/tc-arm.c (T16_32_TAB): Add _sevl.mgretton2012-08-245-1/+46
| | | | | | | | | (insns): Add SEVL. * gas/testsuite/gas/arm/armv8-a.s: New testcase. * gas/testsuite/gas/arm/armv8-a.d: Likewise. * opcodes/arm-dis.c (arm_opcodes): Add SEVL. (thumb_opcodes): Likewise. (thumb32_opcodes): Likewise.
* * gas/config/tc-arm.c (asm_barrier_opt): Add arch field.mgretton2012-08-246-14/+128
| | | | | | | | | | | | | | (mark_feature_used): New function. (parse_barrier): Check specified option is valid for the specified architecture. (UL_BARRIER): New macro. (barrier_opt_names): Update for new barrier options. * gas/testsuite/gas/arm/armv8-a-barrier.s: New testcase. * gas/testsuite/gas/arm/armv8-a-barrier-arm.d: Likewise. * gas/testsuite/gas/arm/armv8-a-barrier-thumb.d: Likewise. * opcodes/arm-dis.c (data_barrier_option): New function. (print_insn_arm): Use data_barrier_option. (print_insn_thumb32): Use data_barrier_option.
* * gas/config/tc-arm.c (do_setend): Warn on deprecated SETEND.mgretton2012-08-245-0/+26
| | | | | | (do_t_setend): Likewise. * gas/testsuite/gas/arm/armv8-a-bad.l: Update * gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
* * gas/config/tc-arm.c (do_t_it): Fully initialise now_it.mgretton2012-08-2414-15/+195
| | | | | | | | | | | | | | | | | | | | (new_automatic_it_block): Likewise. (handle_it_block): Record whether current instruction is conditionally executed. * gas/config/tc-arm.c (depr_insn_mask): New structure. (depr_it_insns): New variable. (it_fsm_post_encode): Warn on deprecated uses. * gas/config/tc-arm.h (current_it): Add new fields. * gas/testsuite/gas/arm/armv8-a-it-bad.d: New testcase. * gas/testsuite/gas/arm/armv8-a-it-bad.l: Likewise. * gas/testsuite/gas/arm/armv8-a-it-bad.s: Likewise. * gas/testsuite/gas/arm/ldr-t-bad.s: Update testcase. * gas/testsuite/gas/arm/ldr-t.d: Likewise. * gas/testsuite/gas/arm/ldr-t.s: Likewise. * gas/testsuite/gas/arm/neon-cond-bad-inc.s: Likewise. * gas/testsuite/gas/arm/sp-pc-validations-bad-t: Likewise. * gas/testsuite/gas/arm/vfp-fma-inc.s: Likewise. * gas/testsuite/gas/arm/vfp-neon-syntax-inc.s: Likewise.
* * gas/config/tc-arm.c (deprecated_coproc_regs_s): New structure.mgretton2012-08-245-0/+83
| | | | | | | | (deprecated_coproc_regs): New variable. (deprecated_coproc_reg_count): Likewise. (do_co_reg): Error on obsolete & warn on deprecated registers. * gas/testsuite/gas/arm/armv8-a-bad.l: Update testcase. * gas/testsuite/gas/arm/armv8-a-bad.s: Likewise.
* * gas/config/tc-arm.c (check_obsolete): New function.mgretton2012-08-248-7/+53
| | | | | | | | | | (do_rd_rm_rn): Check swp{b} for obsoletion. * gas/testsuite/gas/arm/armv8-a-bad.d: New testcase. * gas/testsuite/gas/arm/armv8-a-bad.l: Likewise. * gas/testsuite/gas/arm/armv8-a-bad.s: Likewise. * gas/testsuite/gas/arm/depr-swp.l: Update for change in expected output. * gas/testsuite/gas/arm/depr-swp.s: Add additional test. * include/opcode/arm.h (ARM_CPU_IS_ANY): New define.
* * bfd/elf32-arm.c (v8): New array.mgretton2012-08-2411-20/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | (tag_cpu_arch_combine): Add support for ARMv8 attributes. (elf32_arm_merge_eabi_attributes): Likewise. (VFP_VERSION_COUNT): New define. * binutils/readelf.c (arm_attr_tag_CPU_arch): Update for ARMv8. (arm_attr_tag_FP_arch): Likewise. (arm_attr_tag_Advanced_SIMD_arch): Likewise. * gas/config/tc-arm.h (arm_ext_v8): New variable. (fpu_vfp_ext_armv8): Likewise. (fpu_neon_ext_armv8): Likewise. (fpu_crypto_ext_armv8): Likewise. (arm_archs): Add armv8-a. (arm_extensions): Add crypto, fp, and simd. (arm_fpus): Add fp-armv8, neon-fp-armv8, crypto-neon-fp-armv8. (cpu_arch_ver): Add support for ARMv8. (aeabi_set_public_sttributes): Likewise. * gas/doc/c-arm.texi (ARM Options): Document new architecture and extension options for ARMv8. * gas/testsuite/gas/arm/attr-march-all.d: Update for change in expected output. * gas/testsuite/gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/testsuite/gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv8-a+crypto.d: New testcase. * gas/testsuite/gas/arm/attr-march-armv8-a+fp.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv8-a+simd.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv8-a.d: Likewise. * include/elf/arm.h (TAG_CPU_ARCH_V8): New define. (MAX_TAG_CPU_ARCH): Update. * include/opcode/arm.h (ARM_EXT_V8): New define. (FPU_VFP_EXT_ARMV8): Likewise. (FPU_NEON_EXT_ARMV8): Likewise. (FPU_CRYPTO_EXT_ARMV8): Likewise. (ARM_AEXT_V8A): Likewise. (FPU_VFP_ARMV8): Likwise. (FPU_NEON_ARMV8): Likewise. (FPU_CRYPTO_ARMV8): Likewise. (FPU_ARCH_VFP_ARMV8): Likewise. (FPU_ARCH_NEON_VFP_ARMV8): Likewise. (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8): Likewise. (ARM_ARCH_V8A): Likwise. (ARM_ARCH_V8A_FP): Likewise. (ARM_ARCH_V8A_SIMD): Likewise. (ARM_ARCH_V8A_CRYPTO): Likewise. * ld/testsuite/ld-arm/arm-elf.exp: Add new testcases. * ld/testsuite/ld-arm/attr-merge-vfp-3.d: Update for change in expected output. * ld/testsuite/ld-arm/attr-merge-vfp-3r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-4.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-4r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-5r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-7.d: New testcase. * ld/testsuite/ld-arm/attr-merge-vfp-7r.d: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-armv8-hard.s: Likewise. * ld/testsuite/ld-arm/attr-merge-vfp-armv8.s: Likewise.
* Move aarch64 announcement into 2.23 section.Nick Clifton2012-08-221-2/+2
|
* Fix sparc opcode encoding for 4-arg crypto instructions.David S. Miller2012-08-212-14/+18
| | | | | | | | | | | | | | | include/opcode * sparc.h (F3F4): New macro. opcodes * sparc-opc.c (4-argument crypto instructions): Fix encoding using F3F4 macro. gas/testsuite * gas/sparc/crypto.d: Fix opcodes for 4-arg crypto instructions.
* Replace --n32 with --x32H.J. Lu2012-08-202-1/+5
| | | | * doc/as.texinfo: Replace --n32 with --x32.
* opcodes/ChangeLogAlan Modra2012-08-202-13/+18
| | | | | | | | * ppc-opc.c (powerpc_opcodes): Changed opcode for vabsdub, vabsduh, vabsduw, mviwsplt. gas/testsuite/ChangeLog * gas/ppc/e6500.d: Changed opcode for vabsdub, vabsduh, vabsduw, mviwsplt.
* Add AMD btver1 and btver2 supportH.J. Lu2012-08-1714-2/+857
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gas/ 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com> * config/tc-i386.c (cpu_arch): Add CPU_BTVER1_FLAGS and CPU_BTVER2_FLAGS. (i386_align_code): Add case for PROCESSOR_BT. * config/tc-i386.h (enum processor_type): Add PROCESSOR_BT. * doc/c-i386.texi: Add -march={btver1, btver2} options. gas/testsuite/ 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com> * gas/i386/i386.exp: Run btver1 and btver2 test cases. * gas/i386/nops-1-btver1.d: New. * gas/i386/nops-1-btver2.d: New. * gas/i386/arch-10-btver1.d: New. * gas/i386/arch-10-btver2.d: New. * gas/i386/x86-64-nops-1-btver1.d: New. * gas/i386/x86-64-nops-1-btver2.d: New. * gas/i386/x86-64-arch-2-btver1.d: New. * gas/i386/x86-64-arch-2-btver2.d: New. opcodes/ 2012-08-17 Nagajyothi Eggone <nagajyothi.eggone@amd.com> * i386-gen.c (cpu_flag_init): Add CPU_BTVER1_FLAGS and CPU_BTVER2_FLAGS. * i386-opc.h: Update CpuPRFCHW comment. * i386-opc.tbl: Enable prefetch instruction for CpuPRFCHW. * i386-init.h: Regenerated. * i386-tbl.h: Likewise.
* opcodes/Peter Bergner2012-08-153-1/+19
| | | | | | | | * ppc-opc.c <RSQ, RTQ>: Use PPC_OPERAND_GPR. gas/testsuite/ * gas/ppc/power4.s <lq, stq>: Add more tests. * gas/ppc/power4.d: Likewise.
* opcodes/Peter Bergner2012-08-155-0/+27
| | | | | | | | | | * ppc-opc.c <xnop, yield, mdoio, mdoom>: New extended mnemonics. gas/testsuite/ * gas/ppc/common.d ("nop", "xnop"): Add tests. * gas/ppc/common.s: Likewise. * gas/ppc/power7.d ("yield", "mdoio", "mdoom"): Add tests. * gas/ppc/power7.s: Likewise.
* Terminate register name when reporting bad registerH.J. Lu2012-08-146-0/+31
| | | | | | | | | | | | | | | | gas/ PR gas/14457 * config/tc-i386.c (i386_att_operand): Terminate register name when reporting bad register. gas/testsuite/ PR gas/14457 * gas/i386/i386.exp: Run reg-bad. * gas/i386/reg-bad.l: New. * gas/i386/reg-bad.s: Likewise.
* * gas/mmix/err-fb-2.s: New test.Hans-Peter Nilsson2012-08-142-0/+30
|
* * config/tc-mmix.c (loc_asserts): New variable.Hans-Peter Nilsson2012-08-142-5/+110
| | | | | | | | | | (mmix_greg_internal): Handle expressions not determinable at first pass. (s_loc): Ditto. Record expressions where the section isn't determinable at the first pass, and assume they don't refer to other sections. (mmix_md_end): Verify that recorded LOC expressions weren't to other sections, else emit error messages.
* Add support for 64-bit ARM architecture: AArch64Nick Clifton2012-08-13124-8/+37480
|
* include/opcode/Maciej W. Rozycki2012-08-132-39/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * mips.h (mips_opcode): Add the exclusions field. (OPCODE_IS_MEMBER): Remove macro. (cpu_is_member): New inline function. (opcode_is_member): Likewise. opcodes/ * micromips-opc.c (micromips_opcodes): Update comment. * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor instructions for IOCT as appropriate. * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with opcode_is_member. * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with the result of a check for the -Wno-missing-field-initializers GCC option. * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable. (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to compilation. (mips16-opc.lo): Likewise. (micromips-opc.lo): Likewise. * aclocal.m4: Regenerate. * configure: Regenerate. * Makefile.in: Regenerate. gas/ * config/tc-mips.c (NO_ISA_COP, COP_INSN): Remove macros. (is_opcode_valid): Remove coprocessor instruction exclusions. Replace OPCODE_IS_MEMBER with opcode_is_member. (is_opcode_valid_16): Replace OPCODE_IS_MEMBER with opcode_is_member. (macro): Remove coprocessor instruction exclusions.
* * config/tc-mips.c (s_cpload, s_cpsetup): Fail if MIPS16 mode.Maciej W. Rozycki2012-08-132-0/+40
| | | | (s_cplocal, s_cprestore, s_cpreturn): Likewise.
* Enable FMA instructions for bdver2H.J. Lu2012-08-104-0/+92
| | | | | | | | | | | | | | | | | gas/testsuite/ PR gas/14423 * gas/i386/arch-10-bdver2.d: New file. * gas/i386/x86-64-arch-2-bdver2.d: Likewise. * gas/i386/i386.exp: Run new test opcodes/ 2012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com> PR gas/14423 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS. * i386-init.h: Regenerated.
* gas/testsuite/Roland McGrath2012-08-077-0/+138
| | | | | | | | | | | | | | | | | * gas/i386/prefetch.s: New file. * gas/i386/prefetch.d: New file. * gas/i386/prefetch-intel.d: New file. * gas/i386/x86-64-prefetch.d: New file. * gas/i386/x86-64-prefetch-intel.d: New file. * gas/i386/i386.exp: Run them. opcodes/ * i386-dis.c (reg_table): Fill out REG_0F0D table with AMD-reserved cases as "prefetch". (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants. (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise. (reg_table): Use those under REG_0F18. (mod_table): Add those cases as "nop/reserved".
* Despite them being ignored by the CPU, gas issues segment overrideJan Beulich2012-08-076-10/+68
| | | | | | | | | | | | | | | | | | | | prefixes for other than FS/GS in 64-bit mode. If doing so at all, it should clearly do this correctly. Determining the default segment, however, requires to take into consideration RegRex (so far, RSP, RBP, R12, and R13 were all treated equally here). gas/ 2012-08-07 Jan Beulich <jbeulich@suse.com> * config/tc-i386-intel.c (build_modrm_byte): Split determining default segment from figuring out encoding. Honor RegRex for the former. gas/testsuite/ 2012-08-07 Jan Beulich <jbeulich@suse.com> * gas/i386/x86-64-segovr.{s,l}: New. * gas/i386/i386.exp: Run new test.
* The VGATHER group of instructions requires that all three involvedJan Beulich2012-08-0720-29/+259
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xmm/ymm registers are distinct. This patch adds code to check for this, and at once eliminates a superfluous check for not using PC-relative addressing for these instructions (the fact that an index register is required here already excludes valid PC-relative addresses). The severity of the resulting diagnostics can be controlled via command line option or directive. gas/ 2012-08-07 Jan Beulich <jbeulich@suse.com> * config/tc-i386.c (set_check): Renamed from set_sse_check. Generalize to also handle operand checking option. (enum i386_error): New enumerator 'invalid_vector_register_set'. (match_template): Handle it. (enum check_kind): Give it a tag. Drop sse_ prefixes from enumerators. (operand_check): New. (md_pseudo_table): Add "operand_check". (check_VecOperands): Don't special case RIP addressing. Check that vSIB operands use distinct vector registers unless no checking was requested. (OPTION_MOPERAND_CHECK): New. (md_parse_option): Handle it. (OPTION_MAVXSCALAR, OPTION_X32): Adjust. (md_longopts): Add "moperand-check". (md_show_usage): Add help text for it. gas/testsuite/ 2012-08-07 Jan Beulich <jbeulich@suse.com> * gas/i386/vgather-check-error.{s,l}: New. * gas/i386/vgather-check-none.{s,d}: New. * gas/i386/vgather-check-warn.{d,e}: New. * gas/i386/vgather-check.{s,d}: New. * gas/i386/x86-64-vgather-check-error.{s,l}: New. * gas/i386/x86-64-vgather-check-none.{s,d}: New. * gas/i386/x86-64-vgather-check-warn.{d,e}: New. * gas/i386/x86-64-vgather-check.{s,d}: New. * gas/i386/i386.exp: Run new tests.
* There were several cases where the registers in the REX encoded rangeJan Beulich2012-08-076-23/+503
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | got treated identically to the ones in the base range, due to not paying attention to the fact that reg_entry's reg_num field doesn't fully specify the register number (reg_flags also needs to be checked for RegRex). This patch introduces and uses a new (inline) function to obtain the full register number, and uses it to fix all those cases. It additionally adds the missing operand checks for SVME instructions (which match the monitor/mwait ones). gas/ 2012-08-07 Jan Beulich <jbeulich@suse.com> * config/tc-i386.c (register_number): New function. (build_vex_prefix, process_immext, process_operands, build_modrm_byte, i386_index_check): Use it. gas/testsuite/ 2012-08-07 Jan Beulich <jbeulich@suse.com> * gas/i386/x86-64-specific-reg.{s,l}: New. * gas/i386/i386.exp: Run new test. opcodes/ 2012-08-07 Jan Beulich <jbeulich@suse.com> * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
* * config/tc-i386.c (lex_got): Provide implementation for PENick Clifton2012-08-075-1/+117
| | | | | | | | | | | | | | | format. * gas/i386/secrel.s: Add test of <symbol>@SECREL32. * gas/i386/secrel.d: Add expected disassembly. * scripttempl/pe.sc (R_TLS): Add .tls$AAA and .tls$ZZZ. * scripttempl/pep.sc (R_TLS): Add .tls$AAA and .tls$ZZZ. * archive.c (_bfd_delete_archive_data): New function. * libbfd-in.h (_bfd_delete_archive_data): Declare. * libbfd.h: Rebuild. * opncls.c (_bfd_delete_bfd): Call _bfd_delete_archive_data.
* gas/testsuite/Roland McGrath2012-08-068-0/+73
| | | | | | | | | | | | | | | | | * gas/i386/x86-64-stack.s: Add cases for push segment register. * gas/i386/x86-64-stack.d: Updated. * gas/i386/x86-64-stack-suffix.d: Updated. * gas/i386/x86-64-stack-intel.d: Updated. * gas/i386/ilp32/x86-64-stack.d: Updated. * gas/i386/ilp32/x86-64-stack-suffix.d: Updated. * gas/i386/ilp32/x86-64-stack-intel.d: Updated. opcodes/ * i386-dis.c (print_insn): Print spaces between multiple excess prefixes. Return actual number of excess prefixes consumed, not always one. * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
* gas/testsuite/Maciej W. Rozycki2012-08-0617-16/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * gas/mips/mips.exp: Set has_newabi for all Linux targets. * gas/mips/cfi-n64-1.d: Adjust for targets that do not infer the ISA from the ABI. * gas/mips/elf-rel-got-n32.d: Likewise. * gas/mips/elf-rel-got-n64.d: Likewise. * gas/mips/elf-rel-xgot-n32.d: Likewise. * gas/mips/elf-rel-xgot-n64.d: Likewise. * gas/mips/elf-rel18.d: Likewise. * gas/mips/elf-rel28-n32.d: Likewise. * gas/mips/elf-rel28-n64.d: Likewise. * gas/mips/jal-newabi.d: Likewise. * gas/mips/ldstla-n64-shared.d: Likewise. * gas/mips/ldstla-n64-sym32.d: Likewise. * gas/mips/ldstla-n64.d: Likewise. * gas/mips/macro-warn-1-n32.d: Likewise. * gas/mips/macro-warn-2-n32.d: Likewise. * gas/mips/n32-consec.d: Likewise. ld/testsuite/ * ld-mips-elf/mips-elf.exp: Set has_newabi for all Linux targets. Adjust abi_asflags for targets that do not infer the ISA from the ABI. * ld-mips-elf/eh-frame1-n32.d: Adjust for targets that do not infer the ISA from the ABI. * ld-mips-elf/eh-frame1-n64.d: Likewise. * ld-mips-elf/eh-frame2-n32.d: Likewise. * ld-mips-elf/eh-frame2-n64.d: Likewise. * ld-mips-elf/elf-rel-got-n32-embed.d: Likewise. * ld-mips-elf/elf-rel-got-n32.d: Likewise. * ld-mips-elf/elf-rel-got-n64-embed.d: Likewise. * ld-mips-elf/elf-rel-got-n64-linux.d: Likewise. * ld-mips-elf/elf-rel-got-n64.d: Likewise. * ld-mips-elf/elf-rel-xgot-n32-embed.d: Likewise. * ld-mips-elf/elf-rel-xgot-n32.d: Likewise. * ld-mips-elf/elf-rel-xgot-n64-embed.d: Likewise. * ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise. * ld-mips-elf/elf-rel-xgot-n64.d: Likewise. * ld-mips-elf/emit-relocs-1.d: Likewise. * ld-mips-elf/got-page-2.d: Likewise. * ld-mips-elf/no-shared-1-n32.d: Likewise. * ld-mips-elf/no-shared-1-n64.d: Likewise. * ld-mips-elf/rel32-n32.d: Likewise. * ld-mips-elf/rel64.d: Likewise. * ld-mips-elf/relax-jalr-n32-shared.d: Likewise. * ld-mips-elf/relax-jalr-n32.d: Likewise. * ld-mips-elf/relax-jalr-n64-shared.d: Likewise. * ld-mips-elf/relax-jalr-n64.d: Likewise. * ld-mips-elf/reloc-1-n32.d: Likewise. * ld-mips-elf/reloc-1-n64.d: Likewise. * ld-mips-elf/textrel-1.d: Likewise.
* gas/testsuite/Maciej W. Rozycki2012-08-0613-4/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * gas/mips/mips.exp: Set has_newabi for mips*-sde-elf* too. * gas/mips/elf-rel-got-n32.s: Adjust padding. * gas/mips/elf-rel-got-n64.s: Likewise. * gas/mips/elf-rel23.s: Likewise. * gas/mips/elf-rel28.s: Likewise. * gas/mips/n32-consec.s: Likewise. * gas/mips/elf-rel-xgot-n32.d: Adjust output expected. * gas/mips/elf-rel-xgot-n64.d: Likewise. * gas/mips/elf-rel23.d: Likewise. * gas/mips/elf-rel23a.d: Likewise. * gas/mips/elf-rel23b.d: Likewise. * gas/mips/elf-rel28-n32.d: Likewise. ld/testsuite/ * lib/ld-lib.exp (run_dump_test): Implement the EXTRA_OPTIONS argument and the "dump" keyword. * ld-mips-elf/emit-relocs-1a.s: Make section alignment uniform across targets. * ld-mips-elf/emit-relocs-1b.s: Likewise. * ld-mips-elf/jalbal.s: Adjust padding. * ld-mips-elf/elf-rel-got-n32-embed.d: New test. * ld-mips-elf/elf-rel-got-n64-embed.d: New test. * ld-mips-elf/elf-rel-xgot-n32-embed.d: New test. * ld-mips-elf/elf-rel-xgot-n64-embed.d: New test. * ld-mips-elf/elf-rel-got-n32.d: Remove -melf32btsmipn32. * ld-mips-elf/elf-rel-got-n64.d: Remove -melf64btsmip. Adjust output. * ld-mips-elf/elf-rel-got-n64-linux.d: Remove -melf64btsmip. * ld-mips-elf/elf-rel-xgot-n32.d: Remove -melf32btsmipn32. Adjust output. * ld-mips-elf/elf-rel-xgot-n64.d: Remove -melf64btsmip. Adjust output. * ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise. * ld-mips-elf/reloc-1-n64.d: Remove -melf64btsmip. * ld-mips-elf/mips-elf.exp: Set has_newabi for mips*-sde-elf* too. Move tool flags from o32_as_flags and o32_ld_flags variables into abi_asflags and abi_ldflags arrays. Adjust test cases run to use them. Run the new tests.
* gas/Maciej W. Rozycki2012-08-066-1/+35
| | | | | | | | | | * config/tc-mips.c (append_insn): Also handle moving delay-slot instruction across frags for fixed branches. gas/testsuite/ * gas/mips/branch-swap-2.l: New list test. * gas/mips/branch-swap-2.s: New test source. * gas/mips/mips.exp: Run the new test.
* gas/testsuite/Roland McGrath2012-08-068-61/+139
| | | | | | | | | | | | | | | | | * gas/i386/x86-64-stack.s: Add cases for push immediate. * gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d: Updated. * gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d: Updated. * gas/testsuite/gas/i386/ilp32/x86-64-stack.d: Updated. * gas/testsuite/gas/i386/x86-64-stack-intel.d: Updated. * gas/testsuite/gas/i386/x86-64-stack-suffix.d: Updated. * gas/testsuite/gas/i386/x86-64-stack.d: Updated. opcodes/ * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG. (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG. (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG. (OP_E_register): Likewise. (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
* * frags.c (frag_grow): Never shrink the obstack size requestedMaciej W. Rozycki2012-08-032-2/+9
| | | | below the default.
* gas/testsuite/Roland McGrath2012-08-038-0/+71
| | | | | | | | | | * gas/i386/x86-64-stack.s (try): Also try just rex.W (0x48) prefix. * gas/testsuite/gas/i386/ilp32/x86-64-stack-intel.d: Updated. * gas/testsuite/gas/i386/ilp32/x86-64-stack-suffix.d: Updated. * gas/testsuite/gas/i386/ilp32/x86-64-stack.d: Updated. * gas/testsuite/gas/i386/x86-64-stack-intel.d: Updated. * gas/testsuite/gas/i386/x86-64-stack-suffix.d: Updated. * gas/testsuite/gas/i386/x86-64-stack.d: Updated.
* * config/tc-m68hc11.c (s_m68hc11_parse_pseudo_instruction):seank2012-08-021-0/+6
| | | | | New function to parse pseudo ops that are unreleated to existing pseudo ops.
* * tc-m68hc11.c (s_m68hc11_parse_pseudo_instruction):seank2012-08-021-0/+20
| | | | | New function to parse pseudo ops that are unreleated to existing pseudo ops.
* Display null bytes in DWARF debug infoH.J. Lu2012-08-024-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | binutils/ PR binutils/14420 * dwarf.c (process_abbrev_section): Add attribute terminator. Warn missing section terminator. (get_FORM_name): Special check for 0 value. (get_AT_name): Likewise. (process_debug_info): Display zero abbrev number. Check attribute terminator. binutils/testsuite/ PR binutils/14420 * binutils-all/i386/compressed-1a.d: Updated. * binutils-all/objdump.W: Likewise. * binutils-all/readelf.wa: Likewise. * binutils-all/x86-64/compressed-1a.d: Likewise. gas/testsuite/ PR binutils/14420 * gas/elf/dwarf2-1.d: Updated. * gas/elf/dwarf2-2.d: Likwise. * gas/i386/dw2-compress-1.d: Likwise.
* 2012-08-01 Catherine Moore <clm@codesourcery.com>Sandra Loosemore2012-08-013-0/+9
| | | | | | | | Sandra Loosemore <sandra@codesourcery.com> gas/ * config/mips/tc-mips.c (mips_cpu_info): Add the 34kn. * doc/c-mips.texi (MIPS Opts): Document it.
* Reformat ChangeLog filesH.J. Lu2012-08-012-17/+18
|
* gas/ChangeLog:jwlemke2012-08-016-14/+41
| | | | | | | | | | | | | | | | | | | | | | 2012-08-01 James Lemke <jwlemke@codesourcery.com> * gas/dwarf2dbg.c (out_set_addr): Allow for non-constant value of DWARF2_LINE_MIN_INSN_LENGTH * gas/config/tc-ppc.c (ppc_dwarf2_line_min_insn_length): Declare and initialize. (md_apply_fix): Branch addr can be a multiple of 2 or 4. * gas/config/tc-ppc.h (DWARF2_LINE_MIN_INSN_LENGTH): Now a variable reference. gas/testsuite/ChangeLog: 2012-08-01 James Lemke <jwlemke@codesourcery.com> * gas/cfi/cfi-ppc-1.d: Allow for code alignment of 2 or 4. ld/ChangeLog: 2012-08-01 James Lemke <jwlemke@codesourcery.com> * ld/testsuite/ld-gc/pr13683.d: XFAIL for powerpc*-*-eabivle.
* Correct ChangeLog.Maciej W. Rozycki2012-08-012-5/+10
|
* include/opcode/Maciej W. Rozycki2012-07-3110-102/+414
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * mips.h: Document microMIPS DSP ASE usage. (MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for microMIPS DSP ASE support. (MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise. (MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise. (MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise. (MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise. (MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise. (MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise. (MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise. gas/ * config/tc-mips.c (macro_build) <'2'>: Handle microMIPS. (macro) <M_BALIGN>: Update error handling. (validate_micromips_insn) <'2', '3', '4', '5', '6'>: New cases. <'7', '8', '0', '@', '^'>: Likewise. (mips_ip) <'2', '3', '4', '5', '6', '7', '8'>: Handle microMIPS. <'9'>: Fix formatting. <'0', '@'>: Handle microMIPS. <'^'>: New case. gas/testsuite/ * gas/mips/micromips@mips32-dsp.d: New. * gas/mips/micromips@mips32-dspr2.d: New. * gas/mips/mips32-dsp.d: Remove -mips32r2. * gas/mips/mips32-dspr2.d: Likewise. * gas/mips/mips.exp: (mips_create_arch): Use -mips64r2 for micromips. Use run_dump_test_arches to run dsp tests. opcodes/ * micromips-opc.c (WR_a, RD_a, MOD_a): New macros. (DSP_VOLA): Likewise. (D32, D33): Likewise. (micromips_opcodes): Add DSP ASE instructions. * micromips-dis.c (print_insn_micromips) <'2', '3'>: New cases. <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
* Update gas/d30v/bittest.lH.J. Lu2012-07-312-0/+5
| | | | * gas/d30v/bittest.l: Updated.
* Append "#pass" to gas/i386/rdseed-intel.dH.J. Lu2012-07-312-0/+5
| | | | * gas/i386/rdseed-intel.d: Append "#pass".
* The current error message for bad imm4 operands wasn't really helpful,Jan Beulich2012-07-312-1/+6
| | | | | | | | | | | and was pointing at the wrong operand in Intel mode. Since non-constant operands are being taken care of by other means anyway, adjust it to simply state that the constant doesn't fit. 2012-07-31 Jan Beulich <jbeulich@suse.com> * config/tc-i386.c (match_template): Adjust error message for 'bad_imm4' case.
* Since the word to byte register conversion isn't active for x86-64Jan Beulich2012-07-312-13/+15
| | | | | | | | | | | | anyway, there's also no need to issue a separate, inconsistent diagnostic in some of the cases - non-matching operands will be complained about anyway. 2012-07-31 Jan Beulich <jbeulich@suse.com> * config/tc-i386.c (check_byte_reg): Check for I/O port register earlier, and just once. Drop diagnostic that got issued only for some registers.