summaryrefslogtreecommitdiff
path: root/opcodes
Commit message (Collapse)AuthorAgeFilesLines
* * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,Alan Modra2010-05-192-16/+24
| | | | divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
* Correct wclr encoding.Alan Modra2010-05-132-4/+8
|
* 2010-05-10 Andrew Stubbs <ams@codesourcery.com>Nick Clifton2010-05-112-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gas/ * config/tc-arm.c (aeabi_set_public_attributes): Set Tag_DIV_use. gas/testsuite/ * gas/arm/attr-cpu-directive.d: Add Tag_DIV_use. * gas/arm/attr-default.d: Likewise. * gas/arm/attr-march-armv1.d: Likewise. * gas/arm/attr-march-armv2.d: Likewise. * gas/arm/attr-march-armv2a.d: Likewise. * gas/arm/attr-march-armv2s.d: Likewise. * gas/arm/attr-march-armv3.d: Likewise. * gas/arm/attr-march-armv3m.d: Likewise. * gas/arm/attr-march-armv4.d: Likewise. * gas/arm/attr-march-armv4t.d: Likewise. * gas/arm/attr-march-armv4txm.d: Likewise. * gas/arm/attr-march-armv4xm.d: Likewise. * gas/arm/attr-march-armv5.d: Likewise. * gas/arm/attr-march-armv5t.d: Likewise. * gas/arm/attr-march-armv5te.d: Likewise. * gas/arm/attr-march-armv5tej.d: Likewise. * gas/arm/attr-march-armv5texp.d: Likewise. * gas/arm/attr-march-armv5txm.d: Likewise. * gas/arm/attr-march-armv6-m.d: Likewise. * gas/arm/attr-march-armv6.d: Likewise. * gas/arm/attr-march-armv6j.d: Likewise. * gas/arm/attr-march-armv6k.d: Likewise. * gas/arm/attr-march-armv6kt2.d: Likewise. * gas/arm/attr-march-armv6t2.d: Likewise. * gas/arm/attr-march-armv6z.d: Likewise. * gas/arm/attr-march-armv6zk.d: Likewise. * gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/arm/attr-march-armv6zt2.d: Likewise. * gas/arm/attr-march-armv7-a.d: Likewise. * gas/arm/attr-march-armv7.d: Likewise. * gas/arm/attr-march-armv7a.d: Likewise. * gas/arm/attr-march-iwmmxt.d: Likewise. * gas/arm/attr-march-iwmmxt2.d: Likewise. * gas/arm/attr-march-marvell-f.d: Likewise. * gas/arm/attr-march-xscale.d: Likewise. * gas/arm/attr-mcpu.d: Likewise. * gas/arm/attr-mfpu-arm1020e.d: Likewise. * gas/arm/attr-mfpu-arm1020t.d: Likewise. * gas/arm/attr-mfpu-arm1136jf-s.d: Likewise. * gas/arm/attr-mfpu-arm1136jfs.d: Likewise. * gas/arm/attr-mfpu-arm7500fe.d: Likewise. * gas/arm/attr-mfpu-fpa.d: Likewise. * gas/arm/attr-mfpu-fpa10.d: Likewise. * gas/arm/attr-mfpu-fpa11.d: Likewise. * gas/arm/attr-mfpu-fpe.d: Likewise. * gas/arm/attr-mfpu-fpe2.d: Likewise. * gas/arm/attr-mfpu-fpe3.d: Likewise. * gas/arm/attr-mfpu-maverick.d: Likewise. * gas/arm/attr-mfpu-neon-fp16.d: Likewise. * gas/arm/attr-mfpu-neon.d: Likewise. * gas/arm/attr-mfpu-softfpa.d: Likewise. * gas/arm/attr-mfpu-softvfp+vfp.d: Likewise. * gas/arm/attr-mfpu-softvfp.d: Likewise. * gas/arm/attr-mfpu-vfp.d: Likewise. * gas/arm/attr-mfpu-vfp10-r0.d: Likewise. * gas/arm/attr-mfpu-vfp10.d: Likewise. * gas/arm/attr-mfpu-vfp3.d: Likewise. * gas/arm/attr-mfpu-vfp9.d: Likewise. * gas/arm/attr-mfpu-vfpv2.d: Likewise. * gas/arm/attr-mfpu-vfpv3-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv3.d: Likewise. * gas/arm/attr-mfpu-vfpv4-d16.d: Likewise. * gas/arm/attr-mfpu-vfpv4.d: Likewise. * gas/arm/attr-mfpu-vfpxd.d: Likewise. * gas/arm/attr-order.d: Likewise. * gas/arm/attr-override-cpu-directive.d: Likewise. * gas/arm/attr-override-mcpu.d: Likewise. * gas/arm/eabi_attr_1.d: Likewise. ld/testsuite/ * ld-arm/attr-merge-2.attr: Add Tag_DIV_use. * ld-arm/attr-merge-2a.s: Likewise. * ld-arm/attr-merge-2b.s: Likewise. * ld-arm/attr-merge-3a.s: Likewise. * ld-arm/attr-merge-3b.s: Likewise. * ld-arm/attr-merge-4.attr: Likewise. * ld-arm/attr-merge-5.attr: Likewise. * ld-arm/attr-merge-6.attr: Likewise. * ld-arm/attr-merge-7.attr: Likewise. * ld-arm/attr-merge-arch-1.attr: Likewise. * ld-arm/attr-merge-arch-2.attr: Likewise. * ld-arm/attr-merge-unknown-2.d: Likewise. * ld-arm/attr-merge-unknown-2r.d: Likewise. * ld-arm/attr-merge-unknown-3.d: Likewise. * ld-arm/attr-merge-vfp-1.d: Likewise. * ld-arm/attr-merge-vfp-1r.d: Likewise. * ld-arm/attr-merge-vfp-2.d: Likewise. * ld-arm/attr-merge-vfp-2r.d: Likewise. * ld-arm/attr-merge-vfp-3.d: Likewise. * ld-arm/attr-merge-vfp-3r.d: Likewise. * ld-arm/attr-merge-vfp-4.d: Likewise. * ld-arm/attr-merge-vfp-4r.d: Likewise. * ld-arm/attr-merge-vfp-5.d: Likewise. * ld-arm/attr-merge-vfp-5r.d: Likewise. * ld-arm/attr-merge-wchar-00-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-00.d: Likewise. * ld-arm/attr-merge-wchar-02-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-02.d: Likewise. * ld-arm/attr-merge-wchar-04-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-04.d: Likewise. * ld-arm/attr-merge-wchar-20-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-20.d: Likewise. * ld-arm/attr-merge-wchar-22-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-22.d: Likewise. * ld-arm/attr-merge-wchar-24-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-40-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-40.d: Likewise. * ld-arm/attr-merge-wchar-42-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-44-nowarn.d: Likewise. * ld-arm/attr-merge-wchar-44.d: Likewise. * ld-arm/attr-merge.attr: Likewise. 2010-04-07 Jie Zhang <jie@codesourcery.com> gas/ * config/tc-arm.c (aeabi_set_public_attributes): Set Tag_ABI_HardFP_use to 1 if a single precision FPU is selected. gas/testsuite/ * gas/arm/attr-mfpu-vfpxd.d: New test. bfd/ * elf32-arm.c (elf32_arm_merge_eabi_attributes): Merge Tag_ABI_HardFP_use correctly. ld/testsuite/ * ld-arm/attr-merge-vfp-6.d: New test. * ld-arm/attr-merge-vfp-6r.d: New test. * ld-arm/attr-merge-vfpv3xd.s: New test. * ld-arm/arm-elf.exp: Add attr-merge-vfp-6 and attr-merge-vfp-6r. 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W format. (print_insn_thumb16): Add support for new %W format. * gas/arm/thumb32.d: Fix expected disassembly of ldmia instruction.
* bfd/Tristan Gingold2010-05-073-6/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2010-05-07 Tristan Gingold <gingold@adacore.com> * Makefile.in: Regenerate with automake 1.11.1. * aclocal.m4: Ditto. bfd/doc/ 2010-05-07 Tristan Gingold <gingold@adacore.com> * Makefile.in: Regenerate with automake 1.11.1. binutils/ 2010-05-07 Tristan Gingold <gingold@adacore.com> * Makefile.in: Regenerate with automake 1.11.1. * aclocal.m4: Ditto. * doc/Makefile.in: Ditto. gas/ 2010-05-07 Tristan Gingold <gingold@adacore.com> * Makefile.in: Regenerate with automake 1.11.1. * aclocal.m4: Ditto. * doc/Makefile.in: Ditto. gprof/ 2010-05-07 Tristan Gingold <gingold@adacore.com> * Makefile.in: Regenerate with automake 1.11.1. * aclocal.m4: Ditto. ld/ 2010-05-07 Tristan Gingold <gingold@adacore.com> * Makefile.in: Regenerate with automake 1.11.1. * aclocal.m4: Ditto. opcodes/ 2010-05-07 Tristan Gingold <gingold@adacore.com> * Makefile.in: Regenerate with automake 1.11.1. * aclocal.m4: Ditto.
* Updated Spanish translations.Nick Clifton2010-05-052-21/+25
|
* Updated translation templates.Nick Clifton2010-04-223-34/+39
| | | | | | | Updated Bulgarian translation. Updated Finnish translations. Updated French translations. Updated Vietnamese translations.
* Remove extra breack.H.J. Lu2010-04-161-1/+0
|
* Return bad_opcode on unknown bits in opcode.H.J. Lu2010-04-162-5/+22
| | | | | | | 2010-04-16 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown bits in opcode.
* bfd/ChangeLogNick Clifton2010-04-092-8/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2010-04-09 Nick Clifton <nickc@redhat.com> * aoutx.h (aout_link_input_bfd): Remove unused variable sym_count. * elf-eh-frame.c (_bfd_elf_eh_frame_section_offset): Remove unused variables htab and hdr_info and mark info parameter as unused. * elf.c (prep_headers): Remove unused variable i_phdrp. (_bfd_elf_write_object_contents): Remove unused variable i_ehdrp. * elf32-i386.c (elf_i386_relocate_section): Mark variabled warned as unused. * peXXigen.c (pe_print_reloc): Remove unused variable datasize. * verilog.c (verilog_write_section): Remove unused variable address. binutils/ChangeLog 2010-04-09 Nick Clifton <nickc@redhat.com> * dwarf.c (process_debug_info): Remove unused variable cu_abbrev_offset_ptr. (display_debug_lines_decoded): Remove unused variable prev_line. * elfedit.c (process_archive): Remove unused variable file_name_size. * ieee.c (ieee_start_compilation_unit): Remove unused variable nindx. (ieee_set_type): Remove unused variables info, targetindx and baseindx. * objdump.c (disassmble_byte): Remove unused variable done_dot. * rddbg.c (read_section_stabs_debugging_info): Remove unused variable other. * readelf.c (dump_section_as_strings): Remove unused variable addr. (process_archive): Remove unused variable file_name_size. * stabs.c (parse_stab_string): Mark desc parameter as unused. Remove unused variable lineno. (parse_stab_struct_type): Remove unused variable orig. (stab_demangle_type): Remove unused variables constp, volatilep and hold. gas/ChangeLog 2010-04-09 Nick Clifton <nickc@redhat.com> * as.c (create_obj_attrs_section): Remove unused variable addr. * listing.c (listing_listing): Remove unused variable message. * read.c: Remove unnecessary register type qualifiers. (s_mri): Only define/use old_flag variable if MRI_MODE_CHANGE is defined. ld/ChangeLog 2010-04-09 Nick Clifton <nickc@redhat.com> * ldlang.c (wild_sort): Remove unused variable section_name. opcodes/ChangeLog 2010-04-09 Nick Clifton <nickc@redhat.com> * i386-dis.c (print_insn): Remove unused variable op. (OP_sI): Remove unused variable mask.
* * configure: Regenerate.Alan Modra2010-04-072-2/+18
|
* opcodes/Peter Bergner2010-04-062-4/+15
| | | | | | | | | | | | * ppc-opc.c (RBOPT): New define. ("dccci"): Enable for PPCA2. Make operands optional. ("iccci"): Likewise. Do not deprecate for PPC476. gas/testsuite/ * gas/ppc/476.d ("dccci", "dci", "iccci"): Add tests. * gas/ppc/476.s: Likewise. * gas/ppc/a2.d ("dccci", "dci", "iccci", "ici"): Add tests. * gas/ppc/a2.s: Likewise.
* * cr16-opc.c (cr16_instruction): Fix typo in comment.Nick Clifton2010-04-062-2/+6
|
* bfd:Joseph Myers2010-03-257-1/+1132
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x-*-elf): New. * configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "||^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x-*-*): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x-*-*): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x-*-*. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x-*-*. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New.
* Blackfin disassmbler: fix typo where M2.H was decoded as L2.HMike Frysinger2010-03-242-1/+5
|
* * dis-buf.c (buffer_read_memory): Give error for reading justJoseph Myers2010-03-232-1/+7
| | | | before the start of memory.
* 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>spop2010-03-235-80/+21
| | | | | | | | | | | | | | | | | | | Quentin Neill <quentin.neill@amd.com> opcodes/ * i386-dis.c (OP_LWP_I): Removed. (reg_table): Do not use OP_LWP_I, use Iq. (OP_LWPCB_E): Remove use of names16. (OP_LWP_E): Same. * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns should not set the Vex.length bit. * i386-tbl.h: Regenerated. gas/ * testsuite/gas/i386/x86-64-lwp.s: Remove use of 16bit LWP insns. * testsuite/gas/i386/lwp.s: Same. * testsuite/gas/i386/x86-64-lwp.d: Updated. * testsuite/gas/i386/lwp.d: Updated.
* * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".Alan Modra2010-02-252-2/+6
|
* PR binutils/6773Nick Clifton2010-02-242-25/+32
| | | | | | | | | | | | * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with <prefix>asx. Replace <prefix>subaddx with <prefix>sax. (thumb32_opcodes): Likewise. * gas/arm/arch7em.d: Replace expected disassembly of <prefix>addsubx with <prefix>asx. Also replace <prefix>subaddx with <prefix>sax. * gas/arm/archv6.d: Likewise. * gas/arm/thumb32.d: Likewise.
* Updated Vietnamese translation.Nick Clifton2010-02-152-4/+8
|
* * lm32-opinst.c: Regenerate.Doug Evans2010-02-132-2/+20
|
* * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.Doug Evans2010-02-1216-150/+119
| | | | | | | | (print_address): Delete CGEN_PRINT_ADDRESS. * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c, * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c, * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
* * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,Doug Evans2010-02-1239-646/+27
| | | | | | | | | | | | | | * frv-desc.c, * frv-desc.h, * frv-opc.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c, * m32c-desc.c, * m32c-desc.h, * m32c-opc.c, * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c, * mep-desc.c, * mep-desc.h, * mep-opc.c, * mt-desc.c, * mt-desc.h, * mt-opc.c, * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c, * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c, * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
* Update copyright.H.J. Lu2010-02-115-5/+12
| | | | | | | | | | | | | | | | | gas/ 2010-02-11 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c: Update copyright. opcodes/ 2010-02-11 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c: Update copyright. * i386-gen.c: Likewise. * i386-opc.h: Likewise. * i386-opc.tbl: Likewise.
* 2010-02-10 Quentin Neill <quentin.neill@amd.com>spop2010-02-117-5591/+5881
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sebastian Pop <sebastian.pop@amd.com> gas: * config/tc-i386.c (vec_imm4) New operand type. (fits_in_imm4): New. (VEX_check_operands): New. (check_reverse): Call VEX_check_operands. (build_modrm_byte): Reintroduce code for 5 operand insns. Fix whitespace. gas/testsuite: * gas/i386/x86-64-xop.d: Add vpermil2p[sd] tests. * gas/i386/x86-64-xop.s: Likewise. * gas/i386/xop.d: Likewise. * gas/i386/xop.s: Likewise. opcodes: * i386-dis.c (OP_EX_VexImmW): Reintroduced function to handle 5th imm8 operand. (PREFIX_VEX_3A48): Added. (PREFIX_VEX_3A49): Added. (VEX_W_3A48_P_2): Added. (VEX_W_3A49_P_2): Added. (prefix table): Added entries for PREFIX_VEX_3A48 and PREFIX_VEX_3A49. (vex table): Added entries for VEX_W_3A48_P_2 and and VEX_W_3A49_P_2. * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4 for Vec_Imm4 operands. * i386-opc.h (enum): Added Vec_Imm4. (i386_operand_type): Added vec_imm4. * i386-opc.tbl: Add entries for vpermilp[ds]. * i386-init.h: Regenerated. * i386-tbl.h: Regenerated.
* gas/Richard Sandiford2010-02-102-4/+27
| | | | | | | | | * config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x, -mpwr6 and -mpwr7. opcodes/ * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6" and "pwr7". Move "a2" into alphabetical order.
* include/Alan Modra2010-02-083-141/+172
| | | | | | | | | | | | | | | | | | | * opcode/ppc.h (PPC_OPCODE_TITAN): Define. bfd/ * archures.c (bfd_mach_ppc_titan): Define. * bfd-in2.h: Regenerate. * cpu-powerpc.c (bfd_powerpc_archs): Add titan entry. opcodes/ * ppc-dis.c (ppc_opts): Add titan entry. * ppc-opc.c (TITAN, MULHW): Define. (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx). gas/ * config/tc-ppc.c (md_show_usage): Mention -mtitan. Don't use tabs. (ppc_mach): Handle titan. * doc/c-ppc.texi: Mention -mtitan. gas/testsuite/ * gas/ppc/titan.d, * gas/ppc/titan.s: New test. * gas/ppc/ppc.exp: Run it.
* 2010-02-03 Quentin Neill <quentin.neill@amd.com>spop2010-02-033-2/+8
| | | | | | | | | | | | | | | | | | | | gas/ * config/tc-i386.c (cpu_arch): Change amdfam15 to bdver1. (i386_align_code): Rename PROCESSOR_AMDFAM15 to PROCESSOR_BDVER1. * config/tc-i386.h (processor_type): Same. * doc/c-i386.texi: Change amdfam15 to bdver1. opcodes/ * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS to CPU_BDVER1_FLAGS * i386-init.h: Regenerated. testsuite/ * gas/i386/i386.exp: Rename amdfam15 test cases to bdver1. * gas/i386/x86-64-nops-1-amdfam15.d: Renamed test case to gas/i386/x86-64-nops-1-bdver1.d. * gas/i386/nops-1-amdfam15.d: Renamed test case to gas/i386/nops-1-bdver1.d.
* Move NOP from 0x00 to 0x0f.Anthony Green2010-02-032-3/+11
|
* gas/testsuite/Daniel Jacobowitz2010-01-292-54/+164
| | | | | | | | | | | | | | | | | | * gas/arm/dis-data.d: Update test name. Do not expect .word output. * gas/arm/dis-data2.d, gas/arm/dis-data2.s, gas/arm/dis-data3.d, gas/arm/dis-data3.s: New tests. opcodes/ * opcodes/arm-dis.c (struct arm_private_data): New. (print_insn_coprocessor, print_insn_arm): Update to use struct arm_private_data. (is_mapping_symbol, get_map_sym_type): New functions. (get_sym_code_type): Check the symbol's section. Do not check mapping symbols. (print_insn): Default to disassembling ARM mode code. Check for mapping symbols separately from other symbols. Use struct arm_private_data.
* Allow VL=1 on scalar FMA instructions.H.J. Lu2010-01-282-13/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gas/testsuite/ 2010-01-28 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/fma-scalar-intel.d: New. * gas/i386/fma-scalar.d: Likewise. * gas/i386/fma-scalar.s: Likewise. * gas/i386/x86-64-fma-scalar-intel.d: Likewise. * gas/i386/x86-64-fma-scalar.d: Likewise. * gas/i386/x86-64-fma-scalar.s: Likewise. * gas/i386/i386.exp: Run fma-scalar, fma-scalar-intel, x86-64-fma-scalar and x86-64-fma-scalar-intel. opcodes/ 2010-01-28 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (EXVexWdqScalar): New. (vex_scalar_w_dq_mode): Likewise. (prefix_table): Update entries for PREFIX_VEX_3899, PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F, PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD, PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB, PREFIX_VEX_38BD and PREFIX_VEX_38BF. (intel_operand_size): Handle vex_scalar_w_dq_mode. (OP_EX): Likewise.
* Allow VL=1 on AVX scalar instructions.H.J. Lu2010-01-272-44/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gas/ 2010-01-27 H.J. Lu <hongjiu.lu@intel.com> * config/tc-i386.c (avxscalar): New. (OPTION_MAVXSCALAR): Likewise. (build_vex_prefix): Select vector_length for scalar instructions based on avxscalar. (md_longopts): Add OPTION_MAVXSCALAR. (md_parse_option): Handle OPTION_MAVXSCALAR. (md_show_usage): Add -mavxscalar=. * doc/c-i386.texi: Document -mavxscalar=. gas/testsuite/ 2010-01-27 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/avx-scalar-intel.d: New. * gas/i386/avx-scalar.d: Likewise. * gas/i386/avx-scalar.s: Likewise. * gas/i386/x86-64-avx-scalar-intel.d: Likewise. * gas/i386/x86-64-avx-scalar.d: Likewise. * gas/i386/x86-64-avx-scalar.s: Likewise. * gas/i386/i386.exp: Run avx-scalar, avx-scalar-intel, x86-64-avx-scalar and x86-64-avx-scalar-intel. opcodes/ 2010-01-27 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (XMScalar): New. (EXdScalar): Likewise. (EXqScalar): Likewise. (EXqScalarS): Likewise. (VexScalar): Likewise. (EXdVexScalarS): Likewise. (EXqVexScalarS): Likewise. (XMVexScalar): Likewise. (scalar_mode): Likewise. (d_scalar_mode): Likewise. (d_scalar_swap_mode): Likewise. (q_scalar_mode): Likewise. (q_scalar_swap_mode): Likewise. (vex_scalar_mode): Likewise. (vex_len_table): Duplcate entries for VEX_LEN_10_P_1, VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1, VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0, VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3, VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3, VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1, VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1, VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2, VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1, VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2. (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3, VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2, VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3, VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3, VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3, VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3, VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3, VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3, VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2. (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode, q_scalar_swap_mode. (OP_XMM): Handle scalar_mode. (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode and q_scalar_swap_mode. (OP_VEX): Handle vex_scalar_mode.
* Remove trailing { Bad_Opcode }.H.J. Lu2010-01-242-1/+4
|
* Remove trailing { Bad_Opcode } in vex_len_table.H.J. Lu2010-01-242-1/+4
| | | | | | 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
* Remove trailing { Bad_Opcode }.H.J. Lu2010-01-242-1/+4
| | | | | | 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
* Remove trailing "(bad)" entries and replace { "(bad)", { XX } }H.J. Lu2010-01-242-3561/+2670
| | | | | | | | | | | | | | | | | | | | | | | | | | | with { Bad_Opcode }. 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (Bad_Opcode): New. (bad_opcode): Likewise. (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }. (dis386_twobyte): Likewise. (reg_table): Likewise. (prefix_table): Likewise. (x86_64_table): Likewise. (vex_len_table): Likewise. (vex_w_table): Likewise. (mod_table): Likewise. (rm_table): Likewise. (float_reg): Likewise. (reg_table): Remove trailing "(bad)" entries. (prefix_table): Likewise. (x86_64_table): Likewise. (vex_len_table): Likewise. (vex_w_table): Likewise. (mod_table): Likewise. (rm_table): Likewise. (get_valid_dis386): Handle bytemode 0.
* Replace "Vex" with "Vex=3" on AVX scalar instructions.H.J. Lu2010-01-244-418/+428
| | | | | | | | | | 2010-01-23 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.h (VEXScalar): New. * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar instructions. * i386-tbl.h: Regenerated.
* Correct month.H.J. Lu2010-01-211-1/+1
|
* Add xsave64 and xrstor64.H.J. Lu2010-01-214-3/+32
| | | | | | | | | | | | | | | | | | | | gas/testsuite/ 2010-02-21 H.J. Lu <hongjiu.lu@intel.com> * gas/i386/x86-64-xsave.s: Add tests for xsave64 and xrstor64. * gas/i386/x86-64-xsave-intel.d: Updated. * gas/i386/x86-64-xsave.d: Likewise. opcodes/ 2010-02-21 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor. * i386-opc.tbl: Add xsave64 and xrstor64. * i386-tbl.h: Regenerated.
* PR 11170Nick Clifton2010-01-202-3/+9
| | | | | * arm-dis.c (print_arm_address): Do not ignore negative bit in PC based post-indexed addressing.
* 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>spop2010-01-153-0/+1093
| | | | | | | | | | | | | | | | gas/ * config/tc-i386.c (md_assemble): Before accessing the IMM field check that it's not an XOP insn. gas/testsuite/ * gas/i386/x86-64-xop.d: Add missing patterns. * gas/i386/x86-64-xop.s: Same. * gas/i386/xop.d: Same. * gas/i386/xop.s: Same. opcodes/ * i386-opc.tbl: Support all the possible aliases for VPCOM* insns. * i386-tbl.h: Regenerated.
* Replace VEX.DNS with VEX.NDS in comments.H.J. Lu2010-01-142-2/+7
| | | | | | | 2010-01-14 H.J. Lu <hongjiu.lu@intel.com> * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in comments.
* Add names_mm, names_xmm and names_ymm.H.J. Lu2010-01-142-58/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 2010-01-14 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (names_mm): New. (intel_names_mm): Likewise. (att_names_mm): Likewise. (names_xmm): Likewise. (intel_names_xmm): Likewise. (att_names_xmm): Likewise. (names_ymm): Likewise. (intel_names_ymm): Likewise. (att_names_ymm): Likewise. (print_insn): Set names_mm, names_xmm and names_ymm. (OP_MMX): Use names_mm, names_xmm and names_ymm. (OP_XMM): Likewise. (OP_EM): Likewise. (OP_EMC): Likewise. (OP_MXC): Likewise. (OP_EX): Likewise. (XMM_Fixup): Likewise. (OP_VEX): Likewise. (OP_EX_VexReg): Likewise. (OP_Vex_2src): Likewise. (OP_Vex_2src_1): Likewise. (OP_Vex_2src_2): Likewise. (OP_REG_VexI4): Likewise.
* Update commentsH.J. Lu2010-01-132-3/+7
| | | | | | 2010-01-13 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (print_insn): Update comments.
* Remove rex_originalH.J. Lu2010-01-132-7/+8
| | | | | | | | 2010-01-12 H.J. Lu <hongjiu.lu@intel.com> * i386-dis.c (rex_original): Removed. (ckprefix): Remove rex_original. (print_insn): Update comments.
* Sync Libtool from GCC.Ralf Wildenhues2010-01-093-434/+562
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | /: * libtool.m4: Sync from git Libtool. * ltmain.sh: Likewise. * ltoptions.m4: Likewise. * ltversion.m4: Likewise. * lt~obsolete.m4: Likewise. sim/iq2000/: * configure: Regenerate. sim/d10v/: * configure: Regenerate. sim/m32r/: * configure: Regenerate. sim/frv/: * configure: Regenerate. sim/: * avr/configure: Regenerate. * cris/configure: Regenerate. * microblaze/configure: Regenerate. sim/h8300/: * configure: Regenerate. sim/mn10300/: * configure: Regenerate. sim/erc32/: * configure: Regenerate. sim/arm/: * configure: Regenerate. sim/m68hc11/: * configure: Regenerate. sim/lm32/: * configure: Regenerate. sim/sh64/: * configure: Regenerate. sim/v850/: * configure: Regenerate. sim/cr16/: * configure: Regenerate. sim/moxie/: * configure: Regenerate. sim/m32c/: * configure: Regenerate. sim/mips/: * configure: Regenerate. sim/mcore/: * configure: Regenerate. sim/sh/: * configure: Regenerate. gprof/: * Makefile.in: Regenerate. * configure: Regenerate. opcodes/: * Makefile.in: Regenerate. * configure: Regenerate. gas/: * Makefile.in: Regenerate. * configure: Regenerate. * doc/Makefile.in: Regenerate. ld/: * configure: Regenerate. gdb/testsuite/: * gdb.cell/configure: Regenerate. binutils/: * Makefile.in: Regenerate. * configure: Regenerate. * doc/Makefile.in: Regenerate. bfd/: * Makefile.in: Regenerate. * configure: Regenerate. bfd/doc/: * Makefile.in: Regenerate.
* * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.Doug Evans2010-01-0714-39/+47
| | | | | | | * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
* 2010-01-06 Quentin Neill <quentin.neill@amd.com>spop2010-01-063-0/+12
| | | | | | | | | | | | | | | | gas/ * config/tc-i386.c (cpu_arch): Add amdfam15. (i386_align_code): Add PROCESSOR_AMDFAM15 cases. * config/tc-i386.h (processor_type): Add PROCESSOR_AMDFAM15. * doc/c-i386.texi: Add amdfam15. opcodes/ * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS. * i386-init.h: Regenerated. testsuite/ * gas/i386/i386.exp: Add new amdfam15 test cases. * gas/i386/nops-1-amdfam15.d: New.
* * arm-dis.c (print_insn): Fixed search for nextNick Clifton2010-01-062-3/+11
| | | | | | | | symbol and data dumping condition, and the initial mapping symbol state. * gas/arm/dis-data.d: New test case. * gas/arm/dis-data.s: New file.
* cpu/Doug Evans2010-01-0614-188/+209
| | | | | | | | | | | * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler. (f-dsp-40-u20, f-dsp-40-u24): Ditto. opcodes/ * cgen-ibld.in: #include "cgen/basic-modes.h". * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
* PR 11123Nick Clifton2010-01-042-1/+6
| | | | * arm-dis.c (print_insn_coprocessor): Initialise value.
View Lorry Controller Status