From 04561d5e82286884d0ae9a9c9d7bd8153027a301 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Fri, 23 Nov 2012 03:28:09 +0000 Subject: include/opcode/ * ppc.h (ppc_parse_cpu): Update prototype. opcodes/ * ppc-dis.c (ppc_parse_cpu): Add "sticky" param. Track bits set from ppc_opts.sticky in it. Delete "retain_mask". (powerpc_init_dialect): Choose default dialect from info->mach before parsing -M options. Handle more bfd_mach_ppc variants. Update common default to power7. gas/ * config/tc-ppc.c (sticky): New var. (md_parse_option, ppc_machine): Update ppc_parse_cpu calls. gas/testsuite/ * gas/ppc/astest2.d: Pass -Mppc to objdump. ld/testsuite/ * ld-powerpc/plt1.d: Update for default "at" branch hints. * ld-powerpc/tlsexe.d: Likewise. * ld-powerpc/tlsexetoc.d: Likewise. * ld-powerpc/tlsopt1.d: Likewise. * ld-powerpc/tlsopt1_32.d: Likewise. * ld-powerpc/tlsopt2.d: Likewise. * ld-powerpc/tlsopt2_32.d: Likewise. * ld-powerpc/tlsopt4.d: Likewise. * ld-powerpc/tlsopt4_32.d: Likewise. * ld-powerpc/tlsso.d: Likewise. * ld-powerpc/tlstocso.d: Likewise. --- ld/testsuite/ld-powerpc/plt1.d | 2 +- ld/testsuite/ld-powerpc/tlsexe.d | 2 +- ld/testsuite/ld-powerpc/tlsexetoc.d | 2 +- ld/testsuite/ld-powerpc/tlsopt1.d | 2 +- ld/testsuite/ld-powerpc/tlsopt1_32.d | 2 +- ld/testsuite/ld-powerpc/tlsopt2.d | 2 +- ld/testsuite/ld-powerpc/tlsopt2_32.d | 2 +- ld/testsuite/ld-powerpc/tlsopt4.d | 4 ++-- ld/testsuite/ld-powerpc/tlsopt4_32.d | 4 ++-- ld/testsuite/ld-powerpc/tlsso.d | 2 +- ld/testsuite/ld-powerpc/tlstocso.d | 2 +- 11 files changed, 13 insertions(+), 13 deletions(-) (limited to 'ld/testsuite/ld-powerpc') diff --git a/ld/testsuite/ld-powerpc/plt1.d b/ld/testsuite/ld-powerpc/plt1.d index 98851a2c7a..73617025dc 100644 --- a/ld/testsuite/ld-powerpc/plt1.d +++ b/ld/testsuite/ld-powerpc/plt1.d @@ -8,7 +8,7 @@ Disassembly of section .text: 0+ <_start>: - 0: (42 9f 00 05|05 00 9f 42) bcl- 20,4\*cr7\+so,4 .* + 0: (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,4 .* 4: (7f c8 02 a6|a6 02 c8 7f) mflr r30 8: (3f de 00 00|00 00 de 3f) addis r30,r30,0 (a|8): R_PPC_REL16_HA _GLOBAL_OFFSET_TABLE_\+0x(6|4) diff --git a/ld/testsuite/ld-powerpc/tlsexe.d b/ld/testsuite/ld-powerpc/tlsexe.d index 7b374c0292..01796df724 100644 --- a/ld/testsuite/ld-powerpc/tlsexe.d +++ b/ld/testsuite/ld-powerpc/tlsexe.d @@ -71,7 +71,7 @@ Disassembly of section \.text: .* (00 01 02 00|00 00 00 00) .* .* <__glink_PLTresolve>: .* (7d 88 02 a6|a6 02 88 7d) mflr r12 -.* (42 9f 00 05|05 00 9f 42) bcl- 20,4\*cr7\+so,.* +.* (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,.* .* (7d 68 02 a6|a6 02 68 7d) mflr r11 .* (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\) .* (7d 88 03 a6|a6 03 88 7d) mtlr r12 diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.d b/ld/testsuite/ld-powerpc/tlsexetoc.d index cdfeaa696c..48bde59dda 100644 --- a/ld/testsuite/ld-powerpc/tlsexetoc.d +++ b/ld/testsuite/ld-powerpc/tlsexetoc.d @@ -55,7 +55,7 @@ Disassembly of section \.text: .* (00 01 02 28|00 00 00 00) .* .* <__glink_PLTresolve>: .* (7d 88 02 a6|a6 02 88 7d) mflr r12 -.* (42 9f 00 05|05 00 9f 42) bcl- 20,4\*cr7\+so,.* +.* (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,.* .* (7d 68 02 a6|a6 02 68 7d) mflr r11 .* (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\) .* (7d 88 03 a6|a6 03 88 7d) mtlr r12 diff --git a/ld/testsuite/ld-powerpc/tlsopt1.d b/ld/testsuite/ld-powerpc/tlsopt1.d index 4d57c352ae..df50d77d20 100644 --- a/ld/testsuite/ld-powerpc/tlsopt1.d +++ b/ld/testsuite/ld-powerpc/tlsopt1.d @@ -17,7 +17,7 @@ Disassembly of section \.no_opt1: 0+100000ec <\.no_opt1>: .*: (38 62 80 08|08 80 62 38) addi r3,r2,-32760 .*: (2c 24 00 00|00 00 24 2c) cmpdi r4,0 -.*: (41 82 00 10|10 00 82 41) beq- .* +.*: (41 82 00 10|10 00 82 41) beq .* .*: (4b ff ff f1|f1 ff ff 4b) bl 100000e8 <\.__tls_get_addr> .*: (60 00 00 00|00 00 00 60) nop .*: (48 00 00 0c|0c 00 00 48) b .* diff --git a/ld/testsuite/ld-powerpc/tlsopt1_32.d b/ld/testsuite/ld-powerpc/tlsopt1_32.d index 07a559ea18..ec9c7caf5a 100644 --- a/ld/testsuite/ld-powerpc/tlsopt1_32.d +++ b/ld/testsuite/ld-powerpc/tlsopt1_32.d @@ -17,7 +17,7 @@ Disassembly of section \.no_opt1: 0+1800098 <\.no_opt1>: .*: (38 6d ff f4|f4 ff 6d 38) addi r3,r13,-12 .*: (2c 04 00 00|00 00 04 2c) cmpwi r4,0 -.*: (41 82 00 0c|0c 00 82 41) beq- .* +.*: (41 82 00 0c|0c 00 82 41) beq .* .*: (4b ff ff f1|f1 ff ff 4b) bl 1800094 <__tls_get_addr> .*: (48 00 00 08|08 00 00 48) b .* .*: (4b ff ff e9|e9 ff ff 4b) bl 1800094 <__tls_get_addr> diff --git a/ld/testsuite/ld-powerpc/tlsopt2.d b/ld/testsuite/ld-powerpc/tlsopt2.d index af6464c613..73a9b87662 100644 --- a/ld/testsuite/ld-powerpc/tlsopt2.d +++ b/ld/testsuite/ld-powerpc/tlsopt2.d @@ -17,7 +17,7 @@ Disassembly of section \.no_opt2: 0+100000ec <\.no_opt2>: .*: (38 62 80 08|08 80 62 38) addi r3,r2,-32760 .*: (2c 24 00 00|00 00 24 2c) cmpdi r4,0 -.*: (41 82 00 08|08 00 82 41) beq- .* +.*: (41 82 00 08|08 00 82 41) beq .* .*: (38 62 80 08|08 80 62 38) addi r3,r2,-32760 .*: (4b ff ff ed|ed ff ff 4b) bl 100000e8 <\.__tls_get_addr> .*: (60 00 00 00|00 00 00 60) nop diff --git a/ld/testsuite/ld-powerpc/tlsopt2_32.d b/ld/testsuite/ld-powerpc/tlsopt2_32.d index 9bde3c51e0..baffe91e97 100644 --- a/ld/testsuite/ld-powerpc/tlsopt2_32.d +++ b/ld/testsuite/ld-powerpc/tlsopt2_32.d @@ -17,7 +17,7 @@ Disassembly of section \.no_opt2: 0+1800098 <\.no_opt2>: .*: (38 6d ff f4|f4 ff 6d 38) addi r3,r13,-12 .*: (2c 04 00 00|00 00 04 2c) cmpwi r4,0 -.*: (41 82 00 08|08 00 82 41) beq- .* +.*: (41 82 00 08|08 00 82 41) beq .* .*: (38 6d ff f4|f4 ff 6d 38) addi r3,r13,-12 .*: (4b ff ff ed|ed ff ff 4b) bl 1800094 <__tls_get_addr> #pass diff --git a/ld/testsuite/ld-powerpc/tlsopt4.d b/ld/testsuite/ld-powerpc/tlsopt4.d index e27c8ca338..944e97f959 100644 --- a/ld/testsuite/ld-powerpc/tlsopt4.d +++ b/ld/testsuite/ld-powerpc/tlsopt4.d @@ -17,7 +17,7 @@ Disassembly of section \.opt1: 0+100000ec <\.opt1>: .*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0 .*: (2c 24 00 00|00 00 24 2c) cmpdi r4,0 -.*: (41 82 00 10|10 00 82 41) beq- .* +.*: (41 82 00 10|10 00 82 41) beq .* .*: (60 00 00 00|00 00 00 60) nop .*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656 .*: (48 00 00 0c|0c 00 00 48) b .* @@ -29,7 +29,7 @@ Disassembly of section \.opt2: 0+1000010c <\.opt2>: .*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0 .*: (2c 24 00 00|00 00 24 2c) cmpdi r4,0 -.*: (41 82 00 08|08 00 82 41) beq- .* +.*: (41 82 00 08|08 00 82 41) beq .* .*: (3c 6d 00 00|00 00 6d 3c) addis r3,r13,0 .*: (60 00 00 00|00 00 00 60) nop .*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656 diff --git a/ld/testsuite/ld-powerpc/tlsopt4_32.d b/ld/testsuite/ld-powerpc/tlsopt4_32.d index f62a0ea005..59c0a6aae3 100644 --- a/ld/testsuite/ld-powerpc/tlsopt4_32.d +++ b/ld/testsuite/ld-powerpc/tlsopt4_32.d @@ -17,7 +17,7 @@ Disassembly of section \.opt1: 0+1800098 <\.opt1>: .*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0 .*: (2c 04 00 00|00 00 04 2c) cmpwi r4,0 -.*: (41 82 00 0c|0c 00 82 41) beq- .* +.*: (41 82 00 0c|0c 00 82 41) beq .* .*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656 .*: (48 00 00 08|08 00 00 48) b .* .*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656 @@ -27,7 +27,7 @@ Disassembly of section \.opt2: 0+18000b0 <\.opt2>: .*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0 .*: (2c 04 00 00|00 00 04 2c) cmpwi r4,0 -.*: (41 82 00 08|08 00 82 41) beq- .* +.*: (41 82 00 08|08 00 82 41) beq .* .*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0 .*: (38 63 90 10|10 90 63 38) addi r3,r3,-28656 diff --git a/ld/testsuite/ld-powerpc/tlsso.d b/ld/testsuite/ld-powerpc/tlsso.d index 21449a7f67..38c7d95c39 100644 --- a/ld/testsuite/ld-powerpc/tlsso.d +++ b/ld/testsuite/ld-powerpc/tlsso.d @@ -59,7 +59,7 @@ Disassembly of section \.text: .* (00 01 02 20|00 00 00 00) .* .* <__glink_PLTresolve>: .* (7d 88 02 a6|a6 02 88 7d) mflr r12 -.* (42 9f 00 05|05 00 9f 42) bcl- 20,4\*cr7\+so,.* +.* (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,.* .* (7d 68 02 a6|a6 02 68 7d) mflr r11 .* (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\) .* (7d 88 03 a6|a6 03 88 7d) mtlr r12 diff --git a/ld/testsuite/ld-powerpc/tlstocso.d b/ld/testsuite/ld-powerpc/tlstocso.d index 5163266a70..32c1682a37 100644 --- a/ld/testsuite/ld-powerpc/tlstocso.d +++ b/ld/testsuite/ld-powerpc/tlstocso.d @@ -43,7 +43,7 @@ Disassembly of section \.text: .* (00 01 02 18|00 00 00 00) .* .* <__glink_PLTresolve>: .* (7d 88 02 a6|a6 02 88 7d) mflr r12 -.* (42 9f 00 05|05 00 9f 42) bcl- 20,4\*cr7\+so,.* +.* (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,.* .* (7d 68 02 a6|a6 02 68 7d) mflr r11 .* (e8 4b ff f0|f0 ff 4b e8) ld r2,-16\(r11\) .* (7d 88 03 a6|a6 03 88 7d) mtlr r12 -- cgit v1.2.1