From bacce3bf0fb3fce50cdcd387bbc34fe9b78c471b Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Sun, 7 Jul 2013 09:41:03 +0000 Subject: include/opcode/ * mips.h: Remove "mi" documentation. Update "mh" documentation. (OP_MASK_MI, OP_SH_MI, MICROMIPSOP_MASK_MI, MICROMIPSOP_MASK_MI): Delete. (INSN2_WRITE_GPR_MHI): Rename to... (INSN2_WRITE_GPR_MH): ...this. opcodes/ * micromips-opc.c (WR_mhi): Rename to.. (WR_mh): ...this. (micromips_opcodes): Update "movep" entry accordingly. Replace "mh,mi" with "mh". * mips-dis.c (micromips_to_32_reg_h_map): Rename to... (micromips_to_32_reg_h_map1): ...this. (micromips_to_32_reg_i_map): Rename to... (micromips_to_32_reg_h_map2): ...this. (print_micromips_insn): Remove "mi" case. Print both registers in the pair for "mh". gas/ * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete. (micromips_to_32_reg_h_map): Rename to... (micromips_to_32_reg_h_map1): ...this. (micromips_to_32_reg_i_map): Rename to... (micromips_to_32_reg_h_map2): ...this. (mips_lookup_reg_pair): New function. (gpr_write_mask, macro): Adjust after above renaming. (validate_micromips_insn): Remove "mi" handling. (mips_ip): Likewise. Parse both registers in a pair for "mh". --- opcodes/micromips-opc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'opcodes/micromips-opc.c') diff --git a/opcodes/micromips-opc.c b/opcodes/micromips-opc.c index 64caf8aec8..9a9a32cc5a 100644 --- a/opcodes/micromips-opc.c +++ b/opcodes/micromips-opc.c @@ -42,7 +42,7 @@ #define RD_mf INSN2_MOD_GPR_MF #define WR_mf INSN2_MOD_GPR_MF #define RD_mg INSN2_READ_GPR_MG -#define WR_mhi INSN2_WRITE_GPR_MHI +#define WR_mh INSN2_WRITE_GPR_MH #define RD_mj INSN2_READ_GPR_MJ #define WR_mj INSN2_WRITE_GPR_MJ #define RD_ml RD_mc /* Reuse, since the bit position is the same. */ @@ -703,10 +703,10 @@ const struct mips_opcode micromips_opcodes[] = {"mov.d", "T,S", 0x5400207b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, {"mov.s", "T,S", 0x5400007b, 0xfc00ffff, WR_T|RD_S|FP_S, 0, I1 }, {"mov.ps", "T,S", 0x5400407b, 0xfc00ffff, WR_T|RD_S|FP_D, 0, I1 }, -{"movep", "mh,mi,mm,mn", 0x8400, 0xfc01, NODS, WR_mhi|RD_mmn, I1 }, +{"movep", "mh,mm,mn", 0x8400, 0xfc01, NODS, WR_mh|RD_mmn, I1 }, /* This macro is after the real instruction so that it only matches with -minsn32. */ -{"movep", "mh,mi,mm,mn", 0, (int) M_MOVEP, INSN_MACRO, 0, I1 }, +{"movep", "mh,mm,mn", 0, (int) M_MOVEP, INSN_MACRO, 0, I1 }, {"movf", "t,s,M", 0x5400017b, 0xfc001fff, WR_t|RD_s|RD_CC|FP_S|FP_D, 0, I1 }, {"movf.d", "T,S,M", 0x54000220, 0xfc001fff, WR_T|RD_S|RD_CC|FP_D, 0, I1 }, {"movf.s", "T,S,M", 0x54000020, 0xfc001fff, WR_T|RD_S|RD_CC|FP_S, 0, I1 }, -- cgit v1.2.1