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| author | Michael Zuckerman <Michael.zuckerman@intel.com> | 2016-05-03 12:45:04 +0000 |
|---|---|---|
| committer | Michael Zuckerman <Michael.zuckerman@intel.com> | 2016-05-03 12:45:04 +0000 |
| commit | e9c6482b0021a1895a1b0acbb59221091d872a3c (patch) | |
| tree | 868e9e52cea771628b34f5c40c4d250107a4df0c /lib | |
| parent | 231ca7b7efc4f19af0c3cdec2a77fd8f1ca94097 (diff) | |
| download | clang-e9c6482b0021a1895a1b0acbb59221091d872a3c.tar.gz | |
[Clang][AVX512][Builtin] Adding intrinsics for vcvt{ph|ps}2{ps|ph} instruction set
Differential Revision: http://reviews.llvm.org/D19767
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@268376 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Headers/avx512vlintrin.h | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/lib/Headers/avx512vlintrin.h b/lib/Headers/avx512vlintrin.h index 37a4fa11a2..dc6e0ba828 100644 --- a/lib/Headers/avx512vlintrin.h +++ b/lib/Headers/avx512vlintrin.h @@ -9453,6 +9453,65 @@ _mm256_maskz_mov_ps (__mmask8 __U, __m256 __A) (__mmask8) __U); } +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_mask_cvtph_ps (__m128 __W, __mmask8 __U, __m128i __A) +{ + return (__m128) __builtin_ia32_vcvtph2ps_mask ((__v8hi) __A, + (__v4sf) __W, + (__mmask8) __U); +} + +static __inline__ __m128 __DEFAULT_FN_ATTRS +_mm_maskz_cvtph_ps (__mmask8 __U, __m128i __A) +{ + return (__m128) __builtin_ia32_vcvtph2ps_mask ((__v8hi) __A, + (__v4sf) + _mm_setzero_ps (), + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS +_mm256_mask_cvtph_ps (__m256 __W, __mmask8 __U, __m128i __A) +{ + return (__m256) __builtin_ia32_vcvtph2ps256_mask ((__v8hi) __A, + (__v8sf) __W, + (__mmask8) __U); +} + +static __inline__ __m256 __DEFAULT_FN_ATTRS +_mm256_maskz_cvtph_ps (__mmask8 __U, __m128i __A) +{ + return (__m256) __builtin_ia32_vcvtph2ps256_mask ((__v8hi) __A, + (__v8sf) + _mm256_setzero_ps (), + (__mmask8) __U); +} + +#define _mm_mask_cvtps_ph( __W, __U, __A, __I) __extension__ ({ \ +__builtin_ia32_vcvtps2ph_mask ((__v4sf)( __A),( __I),\ + (__v8hi)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm_maskz_cvtps_ph( __U, __A, __I) __extension__ ({ \ +__builtin_ia32_vcvtps2ph_mask ((__v4sf)( __A),( __I),\ + (__v8hi)\ + _mm_setzero_si128 (),\ + (__mmask8)( __U));\ +}) + +#define _mm256_mask_cvtps_ph( __W, __U, __A, __I) __extension__ ({ \ +__builtin_ia32_vcvtps2ph256_mask ((__v8sf)( __A),( __I),\ + (__v8hi)( __W),\ + (__mmask8)( __U));\ +}) + +#define _mm256_maskz_cvtps_ph( __U, __A, __I) __extension__ ({ \ +__builtin_ia32_vcvtps2ph256_mask ((__v8sf)( __A),( __I),\ + (__v8hi)\ + _mm_setzero_si128 (),\ + (__mmask8)( __U));\ +}) #undef __DEFAULT_FN_ATTRS #undef __DEFAULT_FN_ATTRS_BOTH |